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Add SCVTF and UCVTF (vector, fixed-point) variants to the opcode table

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This commit is contained in:
gdkchan 2019-06-15 13:00:05 -03:00
parent 3c09d49067
commit 0d553aff83
3 changed files with 7 additions and 1 deletions
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4
ARMeilleure/Decoders/OpCodeTable.cs
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@ -413,6 +413,8 @@ namespace ARMeilleure.Decoders
SetA64(">00111100x000010>xxxxxxxxxxxxxxx", InstName.Scvtf_Gp_Fixed, InstEmit.Scvtf_Gp_Fixed, typeof(OpCodeSimdCvt));
SetA64("010111100x100001110110xxxxxxxxxx", InstName.Scvtf_S, InstEmit.Scvtf_S, typeof(OpCodeSimd));
SetA64("0>0011100<100001110110xxxxxxxxxx", InstName.Scvtf_V, InstEmit.Scvtf_V, typeof(OpCodeSimd));
SetA64("0x001111001xxxxx111001xxxxxxxxxx", InstName.Scvtf_V_Fixed, InstEmit.Scvtf_V_Fixed, typeof(OpCodeSimdShImm));
SetA64("0100111101xxxxxx111001xxxxxxxxxx", InstName.Scvtf_V_Fixed, InstEmit.Scvtf_V_Fixed, typeof(OpCodeSimdShImm));
SetA64("01011110000xxxxx000000xxxxxxxxxx", InstName.Sha1c_V, null, typeof(OpCodeSimdReg));
SetA64("0101111000101000000010xxxxxxxxxx", InstName.Sha1h_V, null, typeof(OpCodeSimd));
SetA64("01011110000xxxxx001000xxxxxxxxxx", InstName.Sha1m_V, null, typeof(OpCodeSimdReg));
@ -526,6 +528,8 @@ namespace ARMeilleure.Decoders
SetA64(">00111100x000011>xxxxxxxxxxxxxxx", InstName.Ucvtf_Gp_Fixed, InstEmit.Ucvtf_Gp_Fixed, typeof(OpCodeSimdCvt));
SetA64("011111100x100001110110xxxxxxxxxx", InstName.Ucvtf_S, InstEmit.Ucvtf_S, typeof(OpCodeSimd));
SetA64("0>1011100<100001110110xxxxxxxxxx", InstName.Ucvtf_V, InstEmit.Ucvtf_V, typeof(OpCodeSimd));
SetA64("0x101111001xxxxx111001xxxxxxxxxx", InstName.Ucvtf_V_Fixed, InstEmit.Ucvtf_V_Fixed, typeof(OpCodeSimdShImm));
SetA64("0110111101xxxxxx111001xxxxxxxxxx", InstName.Ucvtf_V_Fixed, InstEmit.Ucvtf_V_Fixed, typeof(OpCodeSimdShImm));
SetA64("0x101110<<1xxxxx000001xxxxxxxxxx", InstName.Uhadd_V, InstEmit.Uhadd_V, typeof(OpCodeSimdReg));
SetA64("0x101110<<1xxxxx001001xxxxxxxxxx", InstName.Uhsub_V, InstEmit.Uhsub_V, typeof(OpCodeSimdReg));
SetA64("0x101110<<1xxxxx011001xxxxxxxxxx", InstName.Umax_V, InstEmit.Umax_V, typeof(OpCodeSimdReg));

2
ARMeilleure/Instructions/InstEmitSimdCvt.cs
View file

@ -1099,7 +1099,7 @@ namespace ARMeilleure.Instructions
res = context.AddIntrinsic(Instruction.X86Cvtdq2ps, res);
Operand mask = X86GetScalar(context, 0x47800000); // 65536.0f (1 << 16)
Operand mask = X86GetAllElements(context, 0x47800000); // 65536.0f (1 << 16)
res = context.AddIntrinsic(Instruction.X86Mulps, res, mask);

2
ARMeilleure/Instructions/InstName.cs
View file

@ -296,6 +296,7 @@ namespace ARMeilleure.Instructions
Scvtf_Gp_Fixed,
Scvtf_S,
Scvtf_V,
Scvtf_V_Fixed,
Sha1c_V,
Sha1h_V,
Sha1m_V,
@ -389,6 +390,7 @@ namespace ARMeilleure.Instructions
Ucvtf_Gp_Fixed,
Ucvtf_S,
Ucvtf_V,
Ucvtf_V_Fixed,
Uhadd_V,
Uhsub_V,
Umax_V,