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LightningJit: Ensure that dest register is saved for load ops that do partial updates

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This commit is contained in:
Gabriel A 2024-02-23 23:43:13 -03:00
parent dda4da7daf
commit 1112d86882
2 changed files with 20 additions and 2 deletions
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18
src/Ryujinx.Cpu/LightningJit/Arm64/InstName.cs
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@ -1131,5 +1131,23 @@ namespace Ryujinx.Cpu.LightningJit.Arm64
return false;
}
public static bool IsRmwMemory(this InstName name)
{
switch (name)
{
case InstName.Ld1AdvsimdSnglAsNoPostIndex:
case InstName.Ld1AdvsimdSnglAsPostIndex:
case InstName.Ld2AdvsimdSnglAsNoPostIndex:
case InstName.Ld2AdvsimdSnglAsPostIndex:
case InstName.Ld3AdvsimdSnglAsNoPostIndex:
case InstName.Ld3AdvsimdSnglAsPostIndex:
case InstName.Ld4AdvsimdSnglAsNoPostIndex:
case InstName.Ld4AdvsimdSnglAsPostIndex:
return true;
}
return false;
}
}
}

4
src/Ryujinx.Cpu/LightningJit/Arm64/RegisterUtils.cs
View file

@ -247,7 +247,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64
}
}
if (!flags.HasFlag(InstFlags.ReadRt))
if (!flags.HasFlag(InstFlags.ReadRt) || name.IsRmwMemory())
{
if (flags.HasFlag(InstFlags.Rt))
{
@ -281,7 +281,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64
gprMask |= MaskFromIndex(ExtractRd(flags, encoding));
}
if (!flags.HasFlag(InstFlags.ReadRt))
if (!flags.HasFlag(InstFlags.ReadRt) || name.IsRmwMemory())
{
if (flags.HasFlag(InstFlags.Rt))
{