mirrors/Ryujinx
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

Update CpuTestSimd.cs

Browse source
This commit is contained in:
LDj3SNuD 2018-11-12 00:12:39 +01:00 • committed by GitHub
parent 8e3041b505
commit 218d0f7fa1
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
1 changed files with 75 additions and 21 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

96
Ryujinx.Tests/Cpu/CpuTestSimd.cs
View file

@ -39,6 +39,12 @@ namespace Ryujinx.Tests.Cpu
0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul };
}
private static ulong[] _1S_()
{
return new ulong[] { 0x0000000000000000ul, 0x000000007FFFFFFFul,
0x0000000080000000ul, 0x00000000FFFFFFFFul };
}
private static ulong[] _4H2S1D_()
{
return new ulong[] { 0x0000000000000000ul, 0x7FFF7FFF7FFF7FFFul,
@ -352,44 +358,66 @@ namespace Ryujinx.Tests.Cpu
};
}
private static uint[] _F_Abs_Recpx_Sqrt_S_S_()
private static uint[] _F_Abs_Neg_Recpx_Sqrt_S_S_()
{
return new uint[]
{
0x1E20C020u, // FABS S0, S1
0x1E214020u, // FNEG S0, S1
0x5EA1F820u, // FRECPX S0, S1
0x1E21C020u // FSQRT S0, S1
};
}
private static uint[] _F_Abs_Recpx_Sqrt_S_D_()
private static uint[] _F_Abs_Neg_Recpx_Sqrt_S_D_()
{
return new uint[]
{
0x1E60C020u, // FABS D0, D1
0x1E614020u, // FNEG D0, D1
0x5EE1F820u, // FRECPX D0, D1
0x1E61C020u // FSQRT D0, D1
};
}
private static uint[] _F_Abs_Sqrt_V_2S_4S_()
private static uint[] _F_Abs_Neg_Sqrt_V_2S_4S_()
{
return new uint[]
{
0x0EA0F800u, // FABS V0.2S, V0.2S
0x2EA0F800u, // FNEG V0.2S, V0.2S
0x2EA1F800u // FSQRT V0.2S, V0.2S
};
}
private static uint[] _F_Abs_Sqrt_V_2D_()
private static uint[] _F_Abs_Neg_Sqrt_V_2D_()
{
return new uint[]
{
0x4EE0F800u, // FABS V0.2D, V0.2D
0x6EE0F800u, // FNEG V0.2D, V0.2D
0x6EE1F800u // FSQRT V0.2D, V0.2D
};
}
private static uint[] _SU_Cvt_F_S_S_()
{
return new uint[]
{
0x5E21D820u, // SCVTF S0, S1
0x7E21D820u // UCVTF S0, S1
};
}
private static uint[] _SU_Cvt_F_S_D_()
{
return new uint[]
{
0x5E61D820u, // SCVTF D0, D1
0x7E61D820u // UCVTF D0, D1
};
}
private static uint[] _Sha1h_Sha1su1_V_()
{
return new uint[]
@ -1122,12 +1150,12 @@ namespace Ryujinx.Tests.Cpu
}
[Test, Pairwise] [Explicit]
public void F_Abs_Recpx_Sqrt_S_S([ValueSource("_F_Abs_Recpx_Sqrt_S_S_")] uint opcodes,
[ValueSource("_1S_F_")] ulong a)
public void F_Abs_Neg_Recpx_Sqrt_S_S([ValueSource("_F_Abs_Neg_Recpx_Sqrt_S_S_")] uint opcodes,
[ValueSource("_1S_F_")] ulong a)
{
ulong z = TestContext.CurrentContext.Random.NextULong();
Vector128<float> v0 = MakeVectorE0E1(z, z);
Vector128<float> v1 = MakeVectorE0(a);
Vector128<float> v1 = MakeVectorE0E1(a, z);
int rnd = (int)TestContext.CurrentContext.Random.NextUInt();
@ -1140,12 +1168,12 @@ namespace Ryujinx.Tests.Cpu
}
[Test, Pairwise] [Explicit]
public void F_Abs_Recpx_Sqrt_S_D([ValueSource("_F_Abs_Recpx_Sqrt_S_D_")] uint opcodes,
[ValueSource("_1D_F_")] ulong a)
public void F_Abs_Neg_Recpx_Sqrt_S_D([ValueSource("_F_Abs_Neg_Recpx_Sqrt_S_D_")] uint opcodes,
[ValueSource("_1D_F_")] ulong a)
{
ulong z = TestContext.CurrentContext.Random.NextULong();
Vector128<float> v0 = MakeVectorE1(z);
Vector128<float> v1 = MakeVectorE0(a);
Vector128<float> v1 = MakeVectorE0E1(a, z);
int rnd = (int)TestContext.CurrentContext.Random.NextUInt();
@ -1158,12 +1186,12 @@ namespace Ryujinx.Tests.Cpu
}
[Test, Pairwise] [Explicit]
public void F_Abs_Sqrt_V_2S_4S([ValueSource("_F_Abs_Sqrt_V_2S_4S_")] uint opcodes,
[Values(0u)] uint rd,
[Values(1u, 0u)] uint rn,
[ValueSource("_2S_F_")] ulong z,
[ValueSource("_2S_F_")] ulong a,
[Values(0b0u, 0b1u)] uint q) // <2S, 4S>
public void F_Abs_Neg_Sqrt_V_2S_4S([ValueSource("_F_Abs_Neg_Sqrt_V_2S_4S_")] uint opcodes,
[Values(0u)] uint rd,
[Values(1u, 0u)] uint rn,
[ValueSource("_2S_F_")] ulong z,
[ValueSource("_2S_F_")] ulong a,
[Values(0b0u, 0b1u)] uint q) // <2S, 4S>
{
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
opcodes |= ((q & 1) << 30);
@ -1182,11 +1210,11 @@ namespace Ryujinx.Tests.Cpu
}
[Test, Pairwise] [Explicit]
public void F_Abs_Sqrt_V_2D([ValueSource("_F_Abs_Sqrt_V_2D_")] uint opcodes,
[Values(0u)] uint rd,
[Values(1u, 0u)] uint rn,
[ValueSource("_1D_F_")] ulong z,
[ValueSource("_1D_F_")] ulong a)
public void F_Abs_Neg_Sqrt_V_2D([ValueSource("_F_Abs_Neg_Sqrt_V_2D_")] uint opcodes,
[Values(0u)] uint rd,
[Values(1u, 0u)] uint rn,
[ValueSource("_1D_F_")] ulong z,
[ValueSource("_1D_F_")] ulong a)
{
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
@ -1512,6 +1540,32 @@ namespace Ryujinx.Tests.Cpu
CompareAgainstUnicorn();
}
[Test, Pairwise] [Explicit]
public void SU_Cvt_F_S_S([ValueSource("_SU_Cvt_F_S_S_")] uint opcodes,
[ValueSource("_1S_")] [Random(RndCnt)] ulong a)
{
ulong z = TestContext.CurrentContext.Random.NextULong();
Vector128<float> v0 = MakeVectorE0E1(z, z);
Vector128<float> v1 = MakeVectorE0(a);
SingleOpcode(opcodes, v0: v0, v1: v1);
CompareAgainstUnicorn();
}
[Test, Pairwise] [Explicit]
public void SU_Cvt_F_S_D([ValueSource("_SU_Cvt_F_S_D_")] uint opcodes,
[ValueSource("_1D_")] [Random(RndCnt)] ulong a)
{
ulong z = TestContext.CurrentContext.Random.NextULong();
Vector128<float> v0 = MakeVectorE1(z);
Vector128<float> v1 = MakeVectorE0(a);
SingleOpcode(opcodes, v0: v0, v1: v1);
CompareAgainstUnicorn();
}
[Test, Pairwise]
public void Sha1h_Sha1su1_V([ValueSource("_Sha1h_Sha1su1_V_")] uint opcodes,
[Values(0u)] uint rd,