Update CpuTestSimdShImm.cs
This commit is contained in:
LDj3SNuD
GitHub
parent
75ab883adc
commit
23b733f65f
1 changed files with 166 additions and 0 deletions
|
|
@ -2,6 +2,7 @@
|
|||
|
||||
using NUnit.Framework;
|
||||
|
||||
using System.Collections.Generic;
|
||||
using System.Runtime.Intrinsics;
|
||||
|
||||
namespace Ryujinx.Tests.Cpu
|
||||
|
|
@ -47,9 +48,125 @@ namespace Ryujinx.Tests.Cpu
|
|||
return new ulong[] { 0x0000000000000000ul, 0x7F7F7F7F7F7F7F7Ful,
|
||||
0x8080808080808080ul, 0xFFFFFFFFFFFFFFFFul };
|
||||
}
|
||||
|
||||
private static IEnumerable<ulong> _2S_F_Cvt_()
|
||||
{
|
||||
// int
|
||||
yield return 0xCF000001CF000001; // -2.1474839E9f (-2147483904)
|
||||
yield return 0xCF000000CF000000; // -2.14748365E9f (-2147483648)
|
||||
yield return 0xCEFFFFFFCEFFFFFF; // -2.14748352E9f (-2147483520)
|
||||
yield return 0x4F0000014F000001; // 2.1474839E9f (2147483904)
|
||||
yield return 0x4F0000004F000000; // 2.14748365E9f (2147483648)
|
||||
yield return 0x4EFFFFFF4EFFFFFF; // 2.14748352E9f (2147483520)
|
||||
|
||||
yield return 0xFF7FFFFFFF7FFFFFul; // -Max Normal (float.MinValue)
|
||||
yield return 0x8080000080800000ul; // -Min Normal
|
||||
yield return 0x807FFFFF807FFFFFul; // -Max Subnormal
|
||||
yield return 0x8000000180000001ul; // -Min Subnormal (-float.Epsilon)
|
||||
yield return 0x7F7FFFFF7F7FFFFFul; // +Max Normal (float.MaxValue)
|
||||
yield return 0x0080000000800000ul; // +Min Normal
|
||||
yield return 0x007FFFFF007FFFFFul; // +Max Subnormal
|
||||
yield return 0x0000000100000001ul; // +Min Subnormal (float.Epsilon)
|
||||
|
||||
if (!NoZeros)
|
||||
{
|
||||
yield return 0x8000000080000000ul; // -Zero
|
||||
yield return 0x0000000000000000ul; // +Zero
|
||||
}
|
||||
|
||||
if (!NoInfs)
|
||||
{
|
||||
yield return 0xFF800000FF800000ul; // -Infinity
|
||||
yield return 0x7F8000007F800000ul; // +Infinity
|
||||
}
|
||||
|
||||
if (!NoNaNs)
|
||||
{
|
||||
yield return 0xFFC00000FFC00000ul; // -QNaN (all zeros payload) (float.NaN)
|
||||
yield return 0xFFBFFFFFFFBFFFFFul; // -SNaN (all ones payload)
|
||||
yield return 0x7FC000007FC00000ul; // +QNaN (all zeros payload) (-float.NaN) (DefaultNaN)
|
||||
yield return 0x7FBFFFFF7FBFFFFFul; // +SNaN (all ones payload)
|
||||
}
|
||||
|
||||
for (int cnt = 1; cnt <= RndCnt; cnt++)
|
||||
{
|
||||
ulong rnd1 = GenNormalS();
|
||||
ulong rnd2 = GenSubnormalS();
|
||||
|
||||
yield return (rnd1 << 32) | rnd1;
|
||||
yield return (rnd2 << 32) | rnd2;
|
||||
}
|
||||
}
|
||||
|
||||
private static IEnumerable<ulong> _1D_F_Cvt_()
|
||||
{
|
||||
// long
|
||||
yield return 0xC3E0000000000001ul; // -9.2233720368547780E18d (-9223372036854778000)
|
||||
yield return 0xC3E0000000000000ul; // -9.2233720368547760E18d (-9223372036854776000)
|
||||
yield return 0xC3DFFFFFFFFFFFFFul; // -9.2233720368547750E18d (-9223372036854775000)
|
||||
yield return 0x43E0000000000001ul; // 9.2233720368547780E18d (9223372036854778000)
|
||||
yield return 0x43E0000000000000ul; // 9.2233720368547760E18d (9223372036854776000)
|
||||
yield return 0x43DFFFFFFFFFFFFFul; // 9.2233720368547750E18d (9223372036854775000)
|
||||
|
||||
yield return 0xFFEFFFFFFFFFFFFFul; // -Max Normal (double.MinValue)
|
||||
yield return 0x8010000000000000ul; // -Min Normal
|
||||
yield return 0x800FFFFFFFFFFFFFul; // -Max Subnormal
|
||||
yield return 0x8000000000000001ul; // -Min Subnormal (-double.Epsilon)
|
||||
yield return 0x7FEFFFFFFFFFFFFFul; // +Max Normal (double.MaxValue)
|
||||
yield return 0x0010000000000000ul; // +Min Normal
|
||||
yield return 0x000FFFFFFFFFFFFFul; // +Max Subnormal
|
||||
yield return 0x0000000000000001ul; // +Min Subnormal (double.Epsilon)
|
||||
|
||||
if (!NoZeros)
|
||||
{
|
||||
yield return 0x8000000000000000ul; // -Zero
|
||||
yield return 0x0000000000000000ul; // +Zero
|
||||
}
|
||||
|
||||
if (!NoInfs)
|
||||
{
|
||||
yield return 0xFFF0000000000000ul; // -Infinity
|
||||
yield return 0x7FF0000000000000ul; // +Infinity
|
||||
}
|
||||
|
||||
if (!NoNaNs)
|
||||
{
|
||||
yield return 0xFFF8000000000000ul; // -QNaN (all zeros payload) (double.NaN)
|
||||
yield return 0xFFF7FFFFFFFFFFFFul; // -SNaN (all ones payload)
|
||||
yield return 0x7FF8000000000000ul; // +QNaN (all zeros payload) (-double.NaN) (DefaultNaN)
|
||||
yield return 0x7FF7FFFFFFFFFFFFul; // +SNaN (all ones payload)
|
||||
}
|
||||
|
||||
for (int cnt = 1; cnt <= RndCnt; cnt++)
|
||||
{
|
||||
ulong rnd1 = GenNormalD();
|
||||
ulong rnd2 = GenSubnormalD();
|
||||
|
||||
yield return rnd1;
|
||||
yield return rnd2;
|
||||
}
|
||||
}
|
||||
#endregion
|
||||
|
||||
#region "ValueSource (Opcodes)"
|
||||
private static uint[] _F_Cvt_Z_SU_V_Fixed_2S_4S_()
|
||||
{
|
||||
return new uint[]
|
||||
{
|
||||
0x0F20FC00u, // FCVTZS V0.2S, V0.2S, #32
|
||||
0x2F20FC00u // FCVTZU V0.2S, V0.2S, #32
|
||||
};
|
||||
}
|
||||
|
||||
private static uint[] _F_Cvt_Z_SU_V_Fixed_2D_()
|
||||
{
|
||||
return new uint[]
|
||||
{
|
||||
0x4F40FC00u, // FCVTZS V0.2D, V0.2D, #64
|
||||
0x6F40FC00u // FCVTZU V0.2D, V0.2D, #64
|
||||
};
|
||||
}
|
||||
|
||||
private static uint[] _SU_Shll_V_8B8H_16B8H_()
|
||||
{
|
||||
return new uint[]
|
||||
|
|
@ -259,8 +376,57 @@ namespace Ryujinx.Tests.Cpu
|
|||
#endregion
|
||||
|
||||
private const int RndCnt = 2;
|
||||
private const int RndCntFBits = 2;
|
||||
private const int RndCntShift = 2;
|
||||
|
||||
private static readonly bool NoZeros = false;
|
||||
private static readonly bool NoInfs = false;
|
||||
private static readonly bool NoNaNs = false;
|
||||
|
||||
[Test, Pairwise] [Explicit]
|
||||
public void F_Cvt_Z_SU_V_Fixed_2S_4S([ValueSource("_F_Cvt_Z_SU_V_Fixed_2S_4S_")] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource("_2S_F_Cvt_")] ulong z,
|
||||
[ValueSource("_2S_F_Cvt_")] ulong a,
|
||||
[Values(1u, 32u)] [Random(2u, 31u, RndCntFBits)] uint fBits,
|
||||
[Values(0b0u, 0b1u)] uint q) // <2S, 4S>
|
||||
{
|
||||
uint immHb = (64 - fBits) & 0x7F;
|
||||
|
||||
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcodes |= (immHb << 16);
|
||||
opcodes |= ((q & 1) << 30);
|
||||
|
||||
Vector128<float> v0 = MakeVectorE0E1(z, z);
|
||||
Vector128<float> v1 = MakeVectorE0E1(a, a * q);
|
||||
|
||||
SingleOpcode(opcodes, v0: v0, v1: v1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise] [Explicit]
|
||||
public void F_Cvt_Z_SU_V_Fixed_2D([ValueSource("_F_Cvt_Z_SU_V_Fixed_2D_")] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
[ValueSource("_1D_F_Cvt_")] ulong z,
|
||||
[ValueSource("_1D_F_Cvt_")] ulong a,
|
||||
[Values(1u, 64u)] [Random(2u, 63u, RndCntFBits)] uint fBits)
|
||||
{
|
||||
uint immHb = (128 - fBits) & 0x7F;
|
||||
|
||||
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcodes |= (immHb << 16);
|
||||
|
||||
Vector128<float> v0 = MakeVectorE0E1(z, z);
|
||||
Vector128<float> v1 = MakeVectorE0E1(a, a);
|
||||
|
||||
SingleOpcode(opcodes, v0: v0, v1: v1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise, Description("SHL <V><d>, <V><n>, #<shift>")]
|
||||
public void Shl_S_D([Values(0u)] uint rd,
|
||||
[Values(1u, 0u)] uint rn,
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue