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Fix V128 return pointer passing, RCX is clobbered

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This commit is contained in:
gdkchan 2019-07-08 11:42:37 -03:00
commit 2910e1e670
3 changed files with 28 additions and 81 deletions
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29
ARMeilleure/CodeGen/RegisterAllocators/LiveInterval.cs
View file

@ -103,35 +103,6 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
return _ranges[_ranges.Count - 1].End; return _ranges[_ranges.Count - 1].End;
} }
public void Expand(int position)
{
Expand(position, position + 1);
_usePositions.Add(position);
}
public void Expand(int start, int end)
{
if (_ranges.Count == 0)
{
_ranges.Add(new LiveRange(start, end));
return;
}
int lastIdx = _ranges.Count - 1;
if (_ranges[0].Start > start)
{
_ranges[0] = new LiveRange(start, _ranges[0].End);
}
if (_ranges[lastIdx].End < end)
{
_ranges[lastIdx] = new LiveRange(_ranges[lastIdx].Start, end);
}
}
public void AddRange(int start, int end) public void AddRange(int start, int end)
{ {
if (start >= end) if (start >= end)

4
ARMeilleure/CodeGen/X86/CodeGenerator.cs
View file

@ -530,10 +530,6 @@ namespace ARMeilleure.CodeGen.X86
context.Assembler.Movdqu(dest, source); context.Assembler.Movdqu(dest, source);
} }
} }
else if (dest.Type == OperandType.I32 && source.Kind == OperandKind.Register)
{
context.Assembler.Mov(dest, Get32BitsRegister(source.GetRegister()));
}
else else
{ {
context.Assembler.Mov(dest, source); context.Assembler.Mov(dest, source);

76
ARMeilleure/CodeGen/X86/PreAllocator.cs
View file

@ -275,9 +275,7 @@ namespace ARMeilleure.CodeGen.X86
Operand rax = Gpr(X86Register.Rax, src1.Type); Operand rax = Gpr(X86Register.Rax, src1.Type);
Operand rdx = Gpr(X86Register.Rdx, src1.Type); Operand rdx = Gpr(X86Register.Rdx, src1.Type);
Operation srcCopyOp = new Operation(Instruction.Copy, rax, src1); node.List.AddBefore(node, new Operation(Instruction.Copy, rax, src1));
node.List.AddBefore(node, srcCopyOp);
operation.SetSource(0, rax); operation.SetSource(0, rax);
@ -285,9 +283,7 @@ namespace ARMeilleure.CodeGen.X86
node.List.AddBefore(node, clobberCopyOp); node.List.AddBefore(node, clobberCopyOp);
Operation destCopyOp = new Operation(Instruction.Copy, dest, rax); node.List.AddAfter(node, new Operation(Instruction.Copy, dest, rax));
node.List.AddAfter(node, destCopyOp);
operation.Dest = rax; operation.Dest = rax;
} }
@ -301,19 +297,11 @@ namespace ARMeilleure.CodeGen.X86
Operand rax = Gpr(X86Register.Rax, src1.Type); Operand rax = Gpr(X86Register.Rax, src1.Type);
Operand rdx = Gpr(X86Register.Rdx, src1.Type); Operand rdx = Gpr(X86Register.Rdx, src1.Type);
Operation srcCopyOp = new Operation(Instruction.Copy, rax, src1); node.List.AddBefore(node, new Operation(Instruction.Copy, rax, src1));
node.List.AddBefore(node, srcCopyOp);
operation.SetSource(0, rax); operation.SetSource(0, rax);
Operation destCopyOp = new Operation(Instruction.Copy, dest, rdx); node.List.AddAfter(node, new Operation(Instruction.Copy, dest, rdx));
node.List.AddAfter(node, destCopyOp);
Operation clobberCopyOp = new Operation(Instruction.Copy, rax, rax);
node.List.AddAfter(node, clobberCopyOp);
operation.Dest = rdx; operation.Dest = rdx;
} }
@ -329,11 +317,8 @@ namespace ARMeilleure.CodeGen.X86
Operand lr = Gpr(lowReg, OperandType.I64); Operand lr = Gpr(lowReg, OperandType.I64);
Operand hr = Gpr(highReg, OperandType.I64); Operand hr = Gpr(highReg, OperandType.I64);
Operation extrL = new Operation(Instruction.VectorExtract, lr, source, Const(0)); node.List.AddBefore(node, new Operation(Instruction.VectorExtract, lr, source, Const(0)));
Operation extrH = new Operation(Instruction.VectorExtract, hr, source, Const(1)); node.List.AddBefore(node, new Operation(Instruction.VectorExtract, hr, source, Const(1)));
node.List.AddBefore(node, extrL);
node.List.AddBefore(node, extrH);
} }
Operand src2 = operation.GetSource(1); Operand src2 = operation.GetSource(1);
@ -345,11 +330,8 @@ namespace ARMeilleure.CodeGen.X86
Operand rax = Gpr(X86Register.Rax, OperandType.I64); Operand rax = Gpr(X86Register.Rax, OperandType.I64);
Operand rdx = Gpr(X86Register.Rdx, OperandType.I64); Operand rdx = Gpr(X86Register.Rdx, OperandType.I64);
Operation insL = new Operation(Instruction.Copy, dest, rax); node.List.AddAfter(node, new Operation(Instruction.VectorInsert, dest, dest, rdx, Const(1)));
Operation insH = new Operation(Instruction.VectorInsert, dest, dest, rdx, Const(1)); node.List.AddAfter(node, new Operation(Instruction.Copy, dest, rax));
node.List.AddAfter(node, insH);
node.List.AddAfter(node, insL);
operation.SetSource(1, Undef()); operation.SetSource(1, Undef());
operation.SetSource(2, Undef()); operation.SetSource(2, Undef());
@ -360,9 +342,7 @@ namespace ARMeilleure.CodeGen.X86
{ {
Operand rcx = Gpr(X86Register.Rcx, OperandType.I32); Operand rcx = Gpr(X86Register.Rcx, OperandType.I32);
Operation copyOp = new Operation(Instruction.Copy, rcx, operation.GetSource(1)); node.List.AddBefore(node, new Operation(Instruction.Copy, rcx, operation.GetSource(1)));
node.List.AddBefore(node, copyOp);
operation.SetSource(1, rcx); operation.SetSource(1, rcx);
} }
@ -378,8 +358,6 @@ namespace ARMeilleure.CodeGen.X86
//Handle struct arguments. //Handle struct arguments.
int retArgs = 0; int retArgs = 0;
Operand retValueAddr = null;
int stackAllocOffset = 0; int stackAllocOffset = 0;
int AllocateOnStack(int size) int AllocateOnStack(int size)
@ -402,19 +380,13 @@ namespace ARMeilleure.CodeGen.X86
if (dest != null && dest.Type == OperandType.V128) if (dest != null && dest.Type == OperandType.V128)
{ {
retValueAddr = Local(OperandType.I64);
int stackOffset = AllocateOnStack(dest.Type.GetSizeInBytes()); int stackOffset = AllocateOnStack(dest.Type.GetSizeInBytes());
Operation allocOp = new Operation(Instruction.StackAlloc, retValueAddr, Const(stackOffset));
node.List.AddBefore(node, allocOp);
Operand arg0Reg = Gpr(CallingConvention.GetIntArgumentRegister(0), OperandType.I64); Operand arg0Reg = Gpr(CallingConvention.GetIntArgumentRegister(0), OperandType.I64);
Operation copyOp = new Operation(Instruction.Copy, arg0Reg, retValueAddr); Operation allocOp = new Operation(Instruction.StackAlloc, arg0Reg, Const(stackOffset));
node.List.AddBefore(node, copyOp); node.List.AddBefore(node, allocOp);
retArgs = 1; retArgs = 1;
} }
@ -494,7 +466,23 @@ namespace ARMeilleure.CodeGen.X86
if (dest != null) if (dest != null)
{ {
if (retValueAddr == null) if (dest.Type == OperandType.V128)
{
Operand retValueAddr = Local(OperandType.I64);
Operand arg0Reg = Gpr(CallingConvention.GetIntArgumentRegister(0), OperandType.I64);
Operation copyOp = new Operation(Instruction.Copy, retValueAddr, arg0Reg);
node.List.AddBefore(node, copyOp);
Operation loadOp = new Operation(Instruction.Load, dest, retValueAddr);
node.List.AddAfter(node, loadOp);
operation.Dest = null;
}
else
{ {
RegisterType regType = dest.Type.ToRegisterType(); RegisterType regType = dest.Type.ToRegisterType();
@ -515,14 +503,6 @@ namespace ARMeilleure.CodeGen.X86
operation.Dest = retReg; operation.Dest = retReg;
} }
else
{
Operation loadOp = new Operation(Instruction.Load, dest, retValueAddr);
node.List.AddAfter(node, loadOp);
operation.Dest = null;
}
} }
} }