mirrors/Ryujinx
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

Follow-up (Not_V & Orn_V).

Browse source
This commit is contained in:
LDj3SNuD 2019-03-13 18:16:06 +01:00 • committed by GitHub
parent dfed0dc6b7
commit 3d8aa9ce94
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
1 changed files with 6 additions and 6 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

12
ChocolArm64/Instructions/InstEmitSimdLogical.cs
View file

@ -193,12 +193,12 @@ namespace ChocolArm64.Instructions
{
OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
Type[] typesSav = new Type[] { typeof(byte) };
Type[] typesAnt = new Type[] { typeof(Vector128<byte>), typeof(Vector128<byte>) };
Type[] typesSav = new Type[] { typeof(long) };
Type[] typesAnt = new Type[] { typeof(Vector128<long>), typeof(Vector128<long>) };
context.EmitLdvec(op.Rn);
context.EmitLdc_I4(byte.MaxValue);
context.EmitLdc_I8(-1L);
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.SetAllVector128), typesSav));
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.AndNot), typesAnt));
@ -222,13 +222,13 @@ namespace ChocolArm64.Instructions
{
OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
Type[] typesSav = new Type[] { typeof(byte) };
Type[] typesAntOr = new Type[] { typeof(Vector128<byte>), typeof(Vector128<byte>) };
Type[] typesSav = new Type[] { typeof(long) };
Type[] typesAntOr = new Type[] { typeof(Vector128<long>), typeof(Vector128<long>) };
context.EmitLdvec(op.Rn);
context.EmitLdvec(op.Rm);
context.EmitLdc_I4(byte.MaxValue);
context.EmitLdc_I8(-1L);
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.SetAllVector128), typesSav));
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.AndNot), typesAntOr));