Optimize LD4/ST4 (Multiple structures) using SSE
This commit is contained in:
gdkchan
parent
a2a4650108
commit
40f4d4bc1d
3 changed files with 213 additions and 23 deletions
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@ -42,7 +42,7 @@ namespace ChocolArm64.Instructions
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//Save the address into a temp.
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context.EmitStint(_tempIntAddress);
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bool isSimd = IsSimd(context);
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bool isSimd = IsSimd(context) || size == 4;
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if (size < 0 || size > (isSimd ? 4 : 3))
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{
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@ -96,7 +96,7 @@ namespace ChocolArm64.Instructions
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public static void EmitWriteCall(ILEmitterCtx context, int size)
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{
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bool isSimd = IsSimd(context);
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bool isSimd = IsSimd(context) || size == 4;
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//Save the value into a temp.
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if (isSimd)
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@ -3,6 +3,7 @@ using ChocolArm64.State;
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using ChocolArm64.Translation;
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using System;
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using System.Reflection.Emit;
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using System.Runtime.Intrinsics.X86;
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using static ChocolArm64.Instructions.InstEmitMemoryHelper;
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using static ChocolArm64.Instructions.InstEmitSimdHelper;
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@ -11,6 +12,11 @@ namespace ChocolArm64.Instructions
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{
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static partial class InstEmit
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{
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private static int StVecTemp0 = ILEmitterCtx.GetVecTempIndex();
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private static int StVecTemp1 = ILEmitterCtx.GetVecTempIndex();
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private static int StVecTemp2 = ILEmitterCtx.GetVecTempIndex();
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private static int StVecTemp3 = ILEmitterCtx.GetVecTempIndex();
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public static void Ld__Vms(ILEmitterCtx context)
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{
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EmitSimdMemMs(context, isLoad: true);
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@ -35,43 +41,226 @@ namespace ChocolArm64.Instructions
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{
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OpCodeSimdMemMs64 op = (OpCodeSimdMemMs64)context.CurrOp;
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const int vectorSizeLog2 = 4;
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const int vectorSize = 1 << vectorSizeLog2;
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int offset = 0;
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for (int rep = 0; rep < op.Reps; rep++)
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for (int elem = 0; elem < op.Elems; elem++)
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for (int sElem = 0; sElem < op.SElems; sElem++)
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bool sseOptPath = Optimizations.UseSse2 && op.SElems == 4;
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if (sseOptPath && isLoad)
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{
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int rtt = (op.Rt + rep + sElem) & 0x1f;
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//Load as if the data was linear.
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int totalVecs = op.Reps * op.SElems;
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if (isLoad)
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for (int index = 0; index < totalVecs; index++)
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{
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context.EmitLdint(op.Rn);
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context.EmitLdc_I8(offset);
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int rtt = (op.Rt + index) & 0x1f;
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context.Emit(OpCodes.Add);
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EmitReadZxCall(context, op.Size);
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EmitVectorInsert(context, rtt, elem, op.Size);
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if (op.RegisterSize == RegisterSize.Simd64 && elem == op.Elems - 1)
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if (op.RegisterSize == RegisterSize.Simd64 && index >= totalVecs / 2)
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{
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EmitVectorZeroUpper(context, rtt);
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EmitVectorZeroAll(context, rtt);
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}
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else
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{
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context.EmitLdint(op.Rn);
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context.EmitLdc_I8(offset);
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context.Emit(OpCodes.Add);
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EmitReadZxCall(context, vectorSizeLog2);
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context.EmitStvec(rtt);
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offset += vectorSize;
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}
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}
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else
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int structsTotalSize = op.SElems * vectorSize;
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int structSize = op.SElems * (1 << op.Size);
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for (int extensionSize = structSize; extensionSize < structsTotalSize; extensionSize <<= 1)
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{
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int rt0 = (op.Rt + 0) & 0x1f;
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int rt1 = (op.Rt + 1) & 0x1f;
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int rt2 = (op.Rt + 2) & 0x1f;
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int rt3 = (op.Rt + 3) & 0x1f;
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int elemSize = op.Size;
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if (extensionSize > vectorSize)
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{
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//The struct elements are spanning two vectors.
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//We need to skip a vector for the second operand.
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//To do that, we just invert two registers (rt1 and rt2).
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context.EmitLdvec(rt1);
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context.EmitLdvec(rt2);
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context.EmitStvec(rt1);
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context.EmitStvec(rt2);
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elemSize = vectorSizeLog2 - 1;
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}
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context.EmitLdvec(rt0);
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context.EmitLdvec(rt1);
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context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.UnpackLow), GetTypesSflUpk(elemSize)));
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context.EmitLdvec(rt0);
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context.EmitLdvec(rt1);
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context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.UnpackHigh), GetTypesSflUpk(elemSize)));
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context.EmitLdvec(rt2);
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context.EmitLdvec(rt3);
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context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.UnpackLow), GetTypesSflUpk(elemSize)));
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context.EmitLdvec(rt2);
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context.EmitLdvec(rt3);
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context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.UnpackHigh), GetTypesSflUpk(elemSize)));
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context.EmitStvec(rt3);
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context.EmitStvec(rt2);
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context.EmitStvec(rt1);
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context.EmitStvec(rt0);
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}
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}
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else if (sseOptPath /* && !isLoad */)
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{
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int totalVecs = op.Reps * op.SElems;
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int elemSize = op.Size;
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int rt0 = (op.Rt + 0) & 0x1f;
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int rt1 = (op.Rt + 1) & 0x1f;
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int rt2 = (op.Rt + 2) & 0x1f;
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int rt3 = (op.Rt + 3) & 0x1f;
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context.EmitLdvec(rt0);
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context.EmitLdvec(rt1);
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context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.UnpackLow), GetTypesSflUpk(elemSize)));
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context.EmitLdvec(rt2);
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context.EmitLdvec(rt3);
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context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.UnpackLow), GetTypesSflUpk(elemSize)));
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context.EmitLdvec(rt0);
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context.EmitLdvec(rt1);
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context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.UnpackHigh), GetTypesSflUpk(elemSize)));
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context.EmitLdvec(rt2);
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context.EmitLdvec(rt3);
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context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.UnpackHigh), GetTypesSflUpk(elemSize)));
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context.EmitStvec(StVecTemp3);
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context.EmitStvec(StVecTemp2);
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context.EmitStvec(StVecTemp1);
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context.EmitStvec(StVecTemp0);
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if (elemSize < 3)
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{
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//This only runs if the struct fits into the vector.
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//For the case where the struct doesn't fit (it's split across two vectors),
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//this step is not necessary.
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elemSize++;
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context.EmitLdvec(StVecTemp0);
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context.EmitLdvec(StVecTemp1);
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context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.UnpackLow), GetTypesSflUpk(elemSize)));
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context.EmitLdvec(StVecTemp0);
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context.EmitLdvec(StVecTemp1);
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context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.UnpackHigh), GetTypesSflUpk(elemSize)));
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context.EmitLdvec(StVecTemp2);
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context.EmitLdvec(StVecTemp3);
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context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.UnpackLow), GetTypesSflUpk(elemSize)));
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context.EmitLdvec(StVecTemp2);
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context.EmitLdvec(StVecTemp3);
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context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.UnpackHigh), GetTypesSflUpk(elemSize)));
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context.EmitStvec(StVecTemp3);
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context.EmitStvec(StVecTemp2);
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context.EmitStvec(StVecTemp1);
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context.EmitStvec(StVecTemp0);
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}
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//Store as if the data was linear.
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if (op.RegisterSize == RegisterSize.Simd64)
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{
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totalVecs /= 2;
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}
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for (int index = 0; index < totalVecs; index++)
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{
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context.EmitLdint(op.Rn);
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context.EmitLdc_I8(offset);
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context.Emit(OpCodes.Add);
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EmitVectorExtractZx(context, rtt, elem, op.Size);
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switch (index)
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{
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case 0: context.EmitLdvec(StVecTemp0); break;
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case 1: context.EmitLdvec(StVecTemp1); break;
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case 2: context.EmitLdvec(StVecTemp2); break;
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case 3: context.EmitLdvec(StVecTemp3); break;
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}
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EmitWriteCall(context, op.Size);
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EmitWriteCall(context, vectorSizeLog2);
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offset += vectorSize;
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}
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}
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else
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{
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for (int rep = 0; rep < op.Reps; rep++)
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for (int elem = 0; elem < op.Elems; elem++)
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for (int sElem = 0; sElem < op.SElems; sElem++)
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{
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int rtt = (op.Rt + rep + sElem) & 0x1f;
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offset += 1 << op.Size;
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if (isLoad)
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{
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context.EmitLdint(op.Rn);
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context.EmitLdc_I8(offset);
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context.Emit(OpCodes.Add);
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EmitReadZxCall(context, op.Size);
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EmitVectorInsert(context, rtt, elem, op.Size);
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if (op.RegisterSize == RegisterSize.Simd64 && elem == op.Elems - 1)
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{
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EmitVectorZeroUpper(context, rtt);
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}
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}
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else
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{
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context.EmitLdint(op.Rn);
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context.EmitLdc_I8(offset);
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context.Emit(OpCodes.Add);
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EmitVectorExtractZx(context, rtt, elem, op.Size);
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EmitWriteCall(context, op.Size);
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}
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offset += 1 << op.Size;
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}
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}
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if (op.WBack)
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@ -6,6 +6,7 @@ using System;
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using System.Collections.Generic;
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using System.Reflection;
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using System.Reflection.Emit;
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using System.Threading;
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namespace ChocolArm64.Translation
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{
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@ -105,12 +106,12 @@ namespace ChocolArm64.Translation
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public static int GetIntTempIndex()
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{
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return UserIntTempStart + _userIntTempCount++;
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return UserIntTempStart + Interlocked.Increment(ref _userIntTempCount) - 1;
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}
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public static int GetVecTempIndex()
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{
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return UserVecTempStart + _userVecTempCount++;
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return UserVecTempStart + Interlocked.Increment(ref _userVecTempCount) - 1;
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}
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public ILBlock[] GetILBlocks()
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