diff --git a/Ryujinx.Tests/Cpu/CpuTestAlu.cs b/Ryujinx.Tests/Cpu/CpuTestAlu.cs index 8c968203ac..81fc265b73 100644 --- a/Ryujinx.Tests/Cpu/CpuTestAlu.cs +++ b/Ryujinx.Tests/Cpu/CpuTestAlu.cs @@ -1,7 +1,5 @@ #define Alu -using ChocolArm64.State; - using NUnit.Framework; namespace Ryujinx.Tests.Cpu diff --git a/Ryujinx.Tests/Cpu/CpuTestAluImm.cs b/Ryujinx.Tests/Cpu/CpuTestAluImm.cs index 0ba16154c9..9551ce2ce4 100644 --- a/Ryujinx.Tests/Cpu/CpuTestAluImm.cs +++ b/Ryujinx.Tests/Cpu/CpuTestAluImm.cs @@ -1,7 +1,5 @@ #define AluImm -using ChocolArm64.State; - using NUnit.Framework; namespace Ryujinx.Tests.Cpu diff --git a/Ryujinx.Tests/Cpu/CpuTestAluRs.cs b/Ryujinx.Tests/Cpu/CpuTestAluRs.cs index 6502bb5712..2d4013e2fb 100644 --- a/Ryujinx.Tests/Cpu/CpuTestAluRs.cs +++ b/Ryujinx.Tests/Cpu/CpuTestAluRs.cs @@ -1,7 +1,5 @@ #define AluRs -using ChocolArm64.State; - using NUnit.Framework; namespace Ryujinx.Tests.Cpu diff --git a/Ryujinx.Tests/Cpu/CpuTestAluRx.cs b/Ryujinx.Tests/Cpu/CpuTestAluRx.cs index f0e87bd559..357a96ab94 100644 --- a/Ryujinx.Tests/Cpu/CpuTestAluRx.cs +++ b/Ryujinx.Tests/Cpu/CpuTestAluRx.cs @@ -1,7 +1,5 @@ #define AluRx -using ChocolArm64.State; - using NUnit.Framework; namespace Ryujinx.Tests.Cpu diff --git a/Ryujinx.Tests/Cpu/CpuTestBfm.cs b/Ryujinx.Tests/Cpu/CpuTestBfm.cs index d2e9d961de..24f69036e4 100644 --- a/Ryujinx.Tests/Cpu/CpuTestBfm.cs +++ b/Ryujinx.Tests/Cpu/CpuTestBfm.cs @@ -1,7 +1,5 @@ #define Bfm -using ChocolArm64.State; - using NUnit.Framework; namespace Ryujinx.Tests.Cpu diff --git a/Ryujinx.Tests/Cpu/CpuTestCcmpImm.cs b/Ryujinx.Tests/Cpu/CpuTestCcmpImm.cs index e0f925c48d..a2c7344944 100644 --- a/Ryujinx.Tests/Cpu/CpuTestCcmpImm.cs +++ b/Ryujinx.Tests/Cpu/CpuTestCcmpImm.cs @@ -1,7 +1,5 @@ #define CcmpImm -using ChocolArm64.State; - using NUnit.Framework; namespace Ryujinx.Tests.Cpu diff --git a/Ryujinx.Tests/Cpu/CpuTestCcmpReg.cs b/Ryujinx.Tests/Cpu/CpuTestCcmpReg.cs index 077bf8ff54..8cf5268ebf 100644 --- a/Ryujinx.Tests/Cpu/CpuTestCcmpReg.cs +++ b/Ryujinx.Tests/Cpu/CpuTestCcmpReg.cs @@ -1,7 +1,5 @@ #define CcmpReg -using ChocolArm64.State; - using NUnit.Framework; namespace Ryujinx.Tests.Cpu diff --git a/Ryujinx.Tests/Cpu/CpuTestCsel.cs b/Ryujinx.Tests/Cpu/CpuTestCsel.cs index 567ef48ecc..9764c2b782 100644 --- a/Ryujinx.Tests/Cpu/CpuTestCsel.cs +++ b/Ryujinx.Tests/Cpu/CpuTestCsel.cs @@ -1,7 +1,5 @@ #define Csel -using ChocolArm64.State; - using NUnit.Framework; namespace Ryujinx.Tests.Cpu diff --git a/Ryujinx.Tests/Cpu/CpuTestMov.cs b/Ryujinx.Tests/Cpu/CpuTestMov.cs index 28ba3d8581..a5ecafca0b 100644 --- a/Ryujinx.Tests/Cpu/CpuTestMov.cs +++ b/Ryujinx.Tests/Cpu/CpuTestMov.cs @@ -1,7 +1,5 @@ #define Mov -using ChocolArm64.State; - using NUnit.Framework; namespace Ryujinx.Tests.Cpu diff --git a/Ryujinx.Tests/Cpu/CpuTestMul.cs b/Ryujinx.Tests/Cpu/CpuTestMul.cs index 959e54f90b..4ad7cf1104 100644 --- a/Ryujinx.Tests/Cpu/CpuTestMul.cs +++ b/Ryujinx.Tests/Cpu/CpuTestMul.cs @@ -1,7 +1,5 @@ #define Mul -using ChocolArm64.State; - using NUnit.Framework; namespace Ryujinx.Tests.Cpu diff --git a/Ryujinx.Tests/Cpu/CpuTestSimd.cs b/Ryujinx.Tests/Cpu/CpuTestSimd.cs index a1e89fff5f..c5d806b9a1 100644 --- a/Ryujinx.Tests/Cpu/CpuTestSimd.cs +++ b/Ryujinx.Tests/Cpu/CpuTestSimd.cs @@ -1,7 +1,5 @@ #define Simd -using ChocolArm64.State; - using NUnit.Framework; using System.Collections.Generic; diff --git a/Ryujinx.Tests/Cpu/CpuTestSimdIns.cs b/Ryujinx.Tests/Cpu/CpuTestSimdIns.cs index 4ce1ba40fb..f4d6ed8e87 100644 --- a/Ryujinx.Tests/Cpu/CpuTestSimdIns.cs +++ b/Ryujinx.Tests/Cpu/CpuTestSimdIns.cs @@ -1,7 +1,5 @@ #define SimdIns -using ChocolArm64.State; - using NUnit.Framework; using System.Runtime.Intrinsics; diff --git a/Ryujinx.Tests/Cpu/CpuTestSimdReg.cs b/Ryujinx.Tests/Cpu/CpuTestSimdReg.cs index 013e6dc75d..434237253b 100644 --- a/Ryujinx.Tests/Cpu/CpuTestSimdReg.cs +++ b/Ryujinx.Tests/Cpu/CpuTestSimdReg.cs @@ -1,7 +1,5 @@ #define SimdReg -using ChocolArm64.State; - using NUnit.Framework; using System.Collections.Generic; diff --git a/Ryujinx.Tests/Cpu/CpuTestSimdRegElem.cs b/Ryujinx.Tests/Cpu/CpuTestSimdRegElem.cs index f142adb10f..d97bd7b082 100644 --- a/Ryujinx.Tests/Cpu/CpuTestSimdRegElem.cs +++ b/Ryujinx.Tests/Cpu/CpuTestSimdRegElem.cs @@ -1,7 +1,5 @@ #define SimdRegElem -using ChocolArm64.State; - using NUnit.Framework; using System.Runtime.Intrinsics;