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Add v4, v5, v30, v31 required for Tbl_V Tests.

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LDj3SNuD 2019-03-18 11:33:18 +01:00 • committed by LDj3SNuD
commit 47df8cfd78
1 changed files with 33 additions and 17 deletions
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18
Ryujinx.Tests/Cpu/CpuTest.cs
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@ -97,6 +97,10 @@ namespace Ryujinx.Tests.Cpu
Vector128<float> v1 = default(Vector128<float>), Vector128<float> v1 = default(Vector128<float>),
Vector128<float> v2 = default(Vector128<float>), Vector128<float> v2 = default(Vector128<float>),
Vector128<float> v3 = default(Vector128<float>), Vector128<float> v3 = default(Vector128<float>),
Vector128<float> v4 = default(Vector128<float>),
Vector128<float> v5 = default(Vector128<float>),
Vector128<float> v30 = default(Vector128<float>),
Vector128<float> v31 = default(Vector128<float>),
bool overflow = false, bool carry = false, bool zero = false, bool negative = false, bool overflow = false, bool carry = false, bool zero = false, bool negative = false,
int fpcr = 0x0, int fpsr = 0x0) int fpcr = 0x0, int fpsr = 0x0)
{ {
@ -111,6 +115,10 @@ namespace Ryujinx.Tests.Cpu
_thread.ThreadState.V1 = v1; _thread.ThreadState.V1 = v1;
_thread.ThreadState.V2 = v2; _thread.ThreadState.V2 = v2;
_thread.ThreadState.V3 = v3; _thread.ThreadState.V3 = v3;
_thread.ThreadState.V4 = v4;
_thread.ThreadState.V5 = v5;
_thread.ThreadState.V30 = v30;
_thread.ThreadState.V31 = v31;
_thread.ThreadState.Overflow = overflow; _thread.ThreadState.Overflow = overflow;
_thread.ThreadState.Carry = carry; _thread.ThreadState.Carry = carry;
@ -133,6 +141,10 @@ namespace Ryujinx.Tests.Cpu
_unicornEmu.Q[1] = v1; _unicornEmu.Q[1] = v1;
_unicornEmu.Q[2] = v2; _unicornEmu.Q[2] = v2;
_unicornEmu.Q[3] = v3; _unicornEmu.Q[3] = v3;
_unicornEmu.Q[4] = v4;
_unicornEmu.Q[5] = v5;
_unicornEmu.Q[30] = v30;
_unicornEmu.Q[31] = v31;
_unicornEmu.OverflowFlag = overflow; _unicornEmu.OverflowFlag = overflow;
_unicornEmu.CarryFlag = carry; _unicornEmu.CarryFlag = carry;
@ -169,13 +181,17 @@ namespace Ryujinx.Tests.Cpu
Vector128<float> v1 = default(Vector128<float>), Vector128<float> v1 = default(Vector128<float>),
Vector128<float> v2 = default(Vector128<float>), Vector128<float> v2 = default(Vector128<float>),
Vector128<float> v3 = default(Vector128<float>), Vector128<float> v3 = default(Vector128<float>),
Vector128<float> v4 = default(Vector128<float>),
Vector128<float> v5 = default(Vector128<float>),
Vector128<float> v30 = default(Vector128<float>),
Vector128<float> v31 = default(Vector128<float>),
bool overflow = false, bool carry = false, bool zero = false, bool negative = false, bool overflow = false, bool carry = false, bool zero = false, bool negative = false,
int fpcr = 0x0, int fpsr = 0x0) int fpcr = 0x0, int fpsr = 0x0)
{ {
Opcode(opcode); Opcode(opcode);
Opcode(0xD4200000); // BRK #0 Opcode(0xD4200000); // BRK #0
Opcode(0xD65F03C0); // RET Opcode(0xD65F03C0); // RET
SetThreadState(x0, x1, x2, x3, x31, v0, v1, v2, v3, overflow, carry, zero, negative, fpcr, fpsr); SetThreadState(x0, x1, x2, x3, x31, v0, v1, v2, v3, v4, v5, v30, v31, overflow, carry, zero, negative, fpcr, fpsr);
ExecuteOpcodes(); ExecuteOpcodes();
return GetThreadState(); return GetThreadState();