diff --git a/ChocolArm64/Instructions/InstEmitFlow.cs b/ChocolArm64/Instructions/InstEmitFlow.cs
index 8bcbd301d0..5eae89cc09 100644
--- a/ChocolArm64/Instructions/InstEmitFlow.cs
+++ b/ChocolArm64/Instructions/InstEmitFlow.cs
@@ -39,7 +39,6 @@ namespace ChocolArm64.Instructions
 
             context.EmitLdc_I(op.Position + 4);
             context.EmitStint(RegisterAlias.Lr);
-            context.EmitStoreState();
 
             EmitCall(context, op.Imm);
         }
diff --git a/ChocolArm64/Instructions/InstEmitFlow32.cs b/ChocolArm64/Instructions/InstEmitFlow32.cs
index 61f1d34c53..dea490c775 100644
--- a/ChocolArm64/Instructions/InstEmitFlow32.cs
+++ b/ChocolArm64/Instructions/InstEmitFlow32.cs
@@ -65,7 +65,6 @@ namespace ChocolArm64.Instructions
             }
 
             context.EmitStint(GetBankedRegisterAlias(context.Mode, RegisterAlias.Aarch32Lr));
-            context.EmitStoreState();
 
             //If x is true, then this is a branch with link and exchange.
             //In this case we need to swap the mode between Arm <-> Thumb.
diff --git a/ChocolArm64/Translation/ILBlock.cs b/ChocolArm64/Translation/ILBlock.cs
index 25183e4bd4..12773705a1 100644
--- a/ChocolArm64/Translation/ILBlock.cs
+++ b/ChocolArm64/Translation/ILBlock.cs
@@ -39,7 +39,7 @@ namespace ChocolArm64.Translation
             }
             else if (emitter is ILOpCodeLoad ld && ILMethodBuilder.IsRegIndex(ld.Index))
             {
-                switch (ld.IoType)
+                switch (ld.VarType)
                 {
                     case VarType.Flag:   IntInputs |= ((1L << ld.Index) << 32) & ~_intAwOutputs; break;
                     case VarType.Int:    IntInputs |=  (1L << ld.Index)        & ~_intAwOutputs; break;
@@ -48,7 +48,7 @@ namespace ChocolArm64.Translation
             }
             else if (emitter is ILOpCodeStore st && ILMethodBuilder.IsRegIndex(st.Index))
             {
-                switch (st.IoType)
+                switch (st.VarType)
                 {
                     case VarType.Flag:   IntOutputs |= (1L << st.Index) << 32; break;
                     case VarType.Int:    IntOutputs |=  1L << st.Index;        break;
diff --git a/ChocolArm64/Translation/ILEmitterCtx.cs b/ChocolArm64/Translation/ILEmitterCtx.cs
index 9aa5767682..f0bb8d179b 100644
--- a/ChocolArm64/Translation/ILEmitterCtx.cs
+++ b/ChocolArm64/Translation/ILEmitterCtx.cs
@@ -644,19 +644,19 @@ namespace ChocolArm64.Translation
             Stloc(index, VarType.Flag);
         }
 
-        private void Ldloc(int index, VarType ioType)
+        private void Ldloc(int index, VarType varType)
         {
-            _ilBlock.Add(new ILOpCodeLoad(index, ioType, CurrOp.RegisterSize));
+            _ilBlock.Add(new ILOpCodeLoad(index, varType, CurrOp.RegisterSize));
         }
 
-        private void Ldloc(int index, VarType ioType, RegisterSize registerSize)
+        private void Ldloc(int index, VarType varType, RegisterSize registerSize)
         {
-            _ilBlock.Add(new ILOpCodeLoad(index, ioType, registerSize));
+            _ilBlock.Add(new ILOpCodeLoad(index, varType, registerSize));
         }
 
-        private void Stloc(int index, VarType ioType)
+        private void Stloc(int index, VarType varType)
         {
-            _ilBlock.Add(new ILOpCodeStore(index, ioType, CurrOp.RegisterSize));
+            _ilBlock.Add(new ILOpCodeStore(index, varType, CurrOp.RegisterSize));
         }
 
         public void EmitCallPropGet(Type objType, string propName)
diff --git a/ChocolArm64/Translation/ILOpCodeLoad.cs b/ChocolArm64/Translation/ILOpCodeLoad.cs
index 5f4e5dad34..0d11eeaa4b 100644
--- a/ChocolArm64/Translation/ILOpCodeLoad.cs
+++ b/ChocolArm64/Translation/ILOpCodeLoad.cs
@@ -7,20 +7,20 @@ namespace ChocolArm64.Translation
     {
         public int Index { get; }
 
-        public VarType IoType { get; }
+        public VarType VarType { get; }
 
         public RegisterSize RegisterSize { get; }
 
-        public ILOpCodeLoad(int index, VarType ioType, RegisterSize registerSize = 0)
+        public ILOpCodeLoad(int index, VarType varType, RegisterSize registerSize = 0)
         {
             Index        = index;
-            IoType       = ioType;
+            VarType      = varType;
             RegisterSize = registerSize;
         }
 
         public void Emit(ILMethodBuilder context)
         {
-            switch (IoType)
+            switch (VarType)
             {
                 case VarType.Arg: context.Generator.EmitLdarg(Index); break;
 
diff --git a/ChocolArm64/Translation/ILOpCodeStore.cs b/ChocolArm64/Translation/ILOpCodeStore.cs
index 6d562add11..7ac78e9ae4 100644
--- a/ChocolArm64/Translation/ILOpCodeStore.cs
+++ b/ChocolArm64/Translation/ILOpCodeStore.cs
@@ -7,20 +7,20 @@ namespace ChocolArm64.Translation
     {
         public int Index { get; }
 
-        public VarType IoType { get; }
+        public VarType VarType { get; }
 
         public RegisterSize RegisterSize { get; }
 
-        public ILOpCodeStore(int index, VarType ioType, RegisterSize registerSize = 0)
+        public ILOpCodeStore(int index, VarType varType, RegisterSize registerSize = 0)
         {
             Index        = index;
-            IoType       = ioType;
+            VarType      = varType;
             RegisterSize = registerSize;
         }
 
         public void Emit(ILMethodBuilder context)
         {
-            switch (IoType)
+            switch (VarType)
             {
                 case VarType.Arg: context.Generator.EmitStarg(Index); break;