From 4af52935b43a0fb17cdbfcd2f00619ddb6a12e1c Mon Sep 17 00:00:00 2001
From: ReinUsesLisp <reinuseslisp@airmail.cc>
Date: Mon, 20 Aug 2018 23:27:53 -0300
Subject: [PATCH] Ignore invalid registers

---
 Ryujinx.Graphics/Gal/Shader/ShaderDecodeMem.cs | 5 +++++
 Ryujinx.Graphics/Gal/Shader/ShaderIrOperGpr.cs | 2 ++
 2 files changed, 7 insertions(+)

diff --git a/Ryujinx.Graphics/Gal/Shader/ShaderDecodeMem.cs b/Ryujinx.Graphics/Gal/Shader/ShaderDecodeMem.cs
index c78f223573..a183b0c69a 100644
--- a/Ryujinx.Graphics/Gal/Shader/ShaderDecodeMem.cs
+++ b/Ryujinx.Graphics/Gal/Shader/ShaderDecodeMem.cs
@@ -76,6 +76,11 @@ namespace Ryujinx.Graphics.Gal.Shader
                 OperA.Pos   += Index;
                 OperD.Index += Index;
 
+                if (!OperD.IsValidRegister)
+                {
+                    break;
+                }
+
                 ShaderIrNode Node = OperA;
 
                 if (Type < 4)
diff --git a/Ryujinx.Graphics/Gal/Shader/ShaderIrOperGpr.cs b/Ryujinx.Graphics/Gal/Shader/ShaderIrOperGpr.cs
index 29ea545309..9dd196e693 100644
--- a/Ryujinx.Graphics/Gal/Shader/ShaderIrOperGpr.cs
+++ b/Ryujinx.Graphics/Gal/Shader/ShaderIrOperGpr.cs
@@ -6,6 +6,8 @@ namespace Ryujinx.Graphics.Gal.Shader
 
         public bool IsConst => Index == ZRIndex;
 
+        public bool IsValidRegister => (Index <= ZRIndex);
+
         public int Index { get; set; }
 
         public ShaderIrOperGpr(int Index)