From 4f38a65509e1decb2bd042a6a6956cceaf1c3bb8 Mon Sep 17 00:00:00 2001 From: gdkchan Date: Sat, 29 Jun 2019 23:08:05 -0300 Subject: [PATCH] Update tests --- Ryujinx.Tests/Cpu/CpuTestSimd.cs | 28 +++++++++++++-------------- Ryujinx.Tests/Cpu/CpuTestSimdFcond.cs | 12 ++++++------ Ryujinx.Tests/Cpu/CpuTestSimdFmov.cs | 8 ++++---- 3 files changed, 24 insertions(+), 24 deletions(-) diff --git a/Ryujinx.Tests/Cpu/CpuTestSimd.cs b/Ryujinx.Tests/Cpu/CpuTestSimd.cs index c7372695d0..30dec59ac2 100644 --- a/Ryujinx.Tests/Cpu/CpuTestSimd.cs +++ b/Ryujinx.Tests/Cpu/CpuTestSimd.cs @@ -2144,7 +2144,7 @@ namespace Ryujinx.Tests.Cpu ulong x0 = (ulong)TestContext.CurrentContext.Random.NextUInt() << 32; uint w31 = TestContext.CurrentContext.Random.NextUInt(); - Vector128 v1 = MakeVectorE0(a); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, x0: x0, x31: w31, v1: v1); @@ -2160,7 +2160,7 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); ulong x31 = TestContext.CurrentContext.Random.NextULong(); - Vector128 v1 = MakeVectorE0(a); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, x31: x31, v1: v1); @@ -2176,7 +2176,7 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); ulong x31 = TestContext.CurrentContext.Random.NextULong(); - Vector128 v1 = MakeVectorE1(a); + V128 v1 = MakeVectorE1(a); SingleOpcode(opcodes, x31: x31, v1: v1); @@ -2193,7 +2193,7 @@ namespace Ryujinx.Tests.Cpu uint w31 = TestContext.CurrentContext.Random.NextUInt(); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128 v0 = MakeVectorE0E1(z, z); + V128 v0 = MakeVectorE0E1(z, z); SingleOpcode(opcodes, x1: wn, x31: w31, v0: v0); @@ -2210,7 +2210,7 @@ namespace Ryujinx.Tests.Cpu ulong x31 = TestContext.CurrentContext.Random.NextULong(); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128 v0 = MakeVectorE1(z); + V128 v0 = MakeVectorE1(z); SingleOpcode(opcodes, x1: xn, x31: x31, v0: v0); @@ -2227,7 +2227,7 @@ namespace Ryujinx.Tests.Cpu ulong x31 = TestContext.CurrentContext.Random.NextULong(); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128 v0 = MakeVectorE0(z); + V128 v0 = MakeVectorE0(z); SingleOpcode(opcodes, x1: xn, x31: x31, v0: v0); @@ -2239,8 +2239,8 @@ namespace Ryujinx.Tests.Cpu [ValueSource("_1S_F_")] ulong a) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128 v0 = MakeVectorE0E1(z, z); - Vector128 v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -2252,8 +2252,8 @@ namespace Ryujinx.Tests.Cpu [ValueSource("_1D_F_")] ulong a) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128 v0 = MakeVectorE1(z); - Vector128 v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE1(z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -2806,8 +2806,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= ((size & 3) << 22); - Vector128 v0 = MakeVectorE0E1(z, z); - Vector128 v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -2825,8 +2825,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= ((size & 3) << 22); - Vector128 v0 = MakeVectorE0E1(z, z); - Vector128 v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcodes, v0: v0, v1: v1); diff --git a/Ryujinx.Tests/Cpu/CpuTestSimdFcond.cs b/Ryujinx.Tests/Cpu/CpuTestSimdFcond.cs index cd199ce469..825a1c78ca 100644 --- a/Ryujinx.Tests/Cpu/CpuTestSimdFcond.cs +++ b/Ryujinx.Tests/Cpu/CpuTestSimdFcond.cs @@ -203,9 +203,9 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((cond & 15) << 12); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128 v0 = MakeVectorE0E1(z, z); - Vector128 v1 = MakeVectorE0(a); - Vector128 v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2); @@ -224,9 +224,9 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((cond & 15) << 12); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128 v0 = MakeVectorE1(z); - Vector128 v1 = MakeVectorE0(a); - Vector128 v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE1(z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2); diff --git a/Ryujinx.Tests/Cpu/CpuTestSimdFmov.cs b/Ryujinx.Tests/Cpu/CpuTestSimdFmov.cs index a7e0e0f968..534dba57d1 100644 --- a/Ryujinx.Tests/Cpu/CpuTestSimdFmov.cs +++ b/Ryujinx.Tests/Cpu/CpuTestSimdFmov.cs @@ -1,8 +1,8 @@ #define SimdFmov -using NUnit.Framework; +using ARMeilleure.State; -using System.Runtime.Intrinsics; +using NUnit.Framework; namespace Ryujinx.Tests.Cpu { @@ -36,7 +36,7 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((imm8 & 0xFFu) << 13); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128 v0 = MakeVectorE0E1(z, z); + V128 v0 = MakeVectorE0E1(z, z); SingleOpcode(opcodes, v0: v0); @@ -50,7 +50,7 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((imm8 & 0xFFu) << 13); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128 v0 = MakeVectorE1(z); + V128 v0 = MakeVectorE1(z); SingleOpcode(opcodes, v0: v0);