diff --git a/ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs b/ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs index 634ac1031a..8edb7932fd 100644 --- a/ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs +++ b/ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs @@ -285,7 +285,6 @@ namespace ChocolArm64.Instruction public static void Frintx_S(AILEmitterCtx Context) { - Console.WriteLine("Frintx_S"); AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp; EmitScalarUnaryOpF(Context, () => @@ -311,7 +310,6 @@ namespace ChocolArm64.Instruction public static void Frintx_V(AILEmitterCtx Context) { - Console.WriteLine("Frintx_V"); AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp; EmitVectorUnaryOpF(Context, () => @@ -321,11 +319,11 @@ namespace ChocolArm64.Instruction Context.EmitCallPropGet(typeof(AThreadState), nameof(AThreadState.Fpcr)); if (Op.Size == 0) - { + { ASoftFallback.EmitCall(Context, nameof(ASoftFallback.RoundF)); } else if (Op.Size == 1) - { + { ASoftFallback.EmitCall(Context, nameof(ASoftFallback.Round)); } else diff --git a/ChocolArm64/Instruction/ASoftFallback.cs b/ChocolArm64/Instruction/ASoftFallback.cs index f79628ad03..c76f65cd57 100644 --- a/ChocolArm64/Instruction/ASoftFallback.cs +++ b/ChocolArm64/Instruction/ASoftFallback.cs @@ -263,12 +263,13 @@ namespace ChocolArm64.Instruction public static double Round(double Value, int Fpcr) { + Console.Write("Value : {0}", Value); switch ((ARoundMode)((Fpcr >> 22) & 3)) { - case ARoundMode.ToNearest: return Math.Round (Value); - case ARoundMode.TowardsPlusInfinity: return Math.Ceiling (Value); - case ARoundMode.TowardsMinusInfinity: return Math.Floor (Value); - case ARoundMode.TowardsZero: return Math.Truncate(Value); + case ARoundMode.ToNearest: Console.Write("Result ToNearest: {0}\n", Math.Round (Value)); return Math.Round (Value); + case ARoundMode.TowardsPlusInfinity: Console.Write("Result PlusInf: {0}\n", Math.Ceiling (Value)); return Math.Ceiling (Value); + case ARoundMode.TowardsMinusInfinity: Console.Write("Result MinusInf: {0}\n", Math.Floor (Value)); return Math.Floor (Value); + case ARoundMode.TowardsZero: Console.Write("Result TowardsZero: {0}\n", Math.Truncate(Value)); return Math.Truncate(Value); } throw new InvalidOperationException(); diff --git a/Ryujinx.Tests/Cpu/CpuTestSimdArithmetic.cs b/Ryujinx.Tests/Cpu/CpuTestSimdArithmetic.cs index 2347b8d8f5..522e01fd7f 100644 --- a/Ryujinx.Tests/Cpu/CpuTestSimdArithmetic.cs +++ b/Ryujinx.Tests/Cpu/CpuTestSimdArithmetic.cs @@ -1,5 +1,6 @@ using ChocolArm64.State; using NUnit.Framework; +using System; namespace Ryujinx.Tests.Cpu { @@ -58,7 +59,7 @@ namespace Ryujinx.Tests.Cpu }); } - [TestCase(0x3FE66666u, 'N', false, 0x40000000u)] + /*[TestCase(0x3FE66666u, 'N', false, 0x40000000u)] [TestCase(0x3F99999Au, 'N', false, 0x3F800000u)] [TestCase(0x404CCCCDu, 'P', false, 0x40800000u)] [TestCase(0x40733333u, 'P', false, 0x40800000u)] @@ -126,33 +127,32 @@ namespace Ryujinx.Tests.Cpu AVec V1 = new AVec { X0 = A }; AThreadState ThreadState = SingleOpcode(0x1E274020, V1: V1, Fpcr: FpcrTemp); Assert.AreEqual(Result, ThreadState.V0.X0); - } + }*/ - [TestCase(0x3FE66666u, 0x3FE66666u, 'N', false, 0x40000000u, 0x40000000u)] - [TestCase(0x3F99999Au, 0x3F99999Au, 'N', false, 0x3F800000u, 0x3F800000u)] - [TestCase(0x404CCCCDu, 0x404CCCCDu, 'P', false, 0x40800000u, 0x40800000u)] - [TestCase(0x40733333u, 0x40733333u, 'P', false, 0x40800000u, 0x40800000u)] - [TestCase(0x404CCCCDu, 0x404CCCCDu, 'M', false, 0x40400000u, 0x40400000u)] - [TestCase(0x40733333u, 0x40733333u, 'M', false, 0x40400000u, 0x40400000u)] - [TestCase(0x3F99999Au, 0x3F99999Au, 'Z', false, 0x3F800000u, 0x3F800000u)] - [TestCase(0x3FE66666u, 0x3FE66666u, 'Z', false, 0x3F800000u, 0x3F800000u)] - [TestCase(0x00000000u, 0x00000000u, 'N', false, 0x00000000u, 0x00000000u)] - [TestCase(0x00000000u, 0x00000000u, 'P', false, 0x00000000u, 0x00000000u)] - [TestCase(0x00000000u, 0x00000000u, 'M', false, 0x00000000u, 0x00000000u)] - [TestCase(0x00000000u, 0x00000000u, 'Z', false, 0x00000000u, 0x00000000u)] - [TestCase(0x80000000u, 0x80000000u, 'N', false, 0x80000000u, 0x80000000u)] - [TestCase(0x80000000u, 0x80000000u, 'P', false, 0x80000000u, 0x80000000u)] - [TestCase(0x80000000u, 0x80000000u, 'M', false, 0x80000000u, 0x80000000u)] - [TestCase(0x80000000u, 0x80000000u, 'Z', false, 0x80000000u, 0x80000000u)] - [TestCase(0x7F800000u, 0x7F800000u, 'N', false, 0x7F800000u, 0x7F800000u)] - [TestCase(0x7F800000u, 0x7F800000u, 'P', false, 0x7F800000u, 0x7F800000u)] - [TestCase(0x7F800000u, 0x7F800000u, 'M', false, 0x7F800000u, 0x7F800000u)] - [TestCase(0x7F800000u, 0x7F800000u, 'Z', false, 0x7F800000u, 0x7F800000u)] - [TestCase(0xFF800000u, 0xFF800000u, 'N', false, 0xFF800000u, 0xFF800000u)] - [TestCase(0xFF800000u, 0xFF800000u, 'P', false, 0xFF800000u, 0xFF800000u)] - [TestCase(0xFF800000u, 0xFF800000u, 'M', false, 0xFF800000u, 0xFF800000u)] - [TestCase(0xFF800000u, 0xFF800000u, 'Z', false, 0xFF800000u, 0xFF800000u)] - public void Frintx_V(uint A, uint B, char RoundType, bool DefaultNaN, uint Result0, uint Result1) + + //2D + [TestCase(0x6E619820u, 0x3FF3333333333333ul, 0x3FF3333333333333ul, 'N', false, 0x3FF0000000000000ul, 0x3FF0000000000000ul)] + [TestCase(0x6E619820u, 0x3FFCCCCCCCCCCCCDul, 0x3FFCCCCCCCCCCCCDul, 'N', false, 0x4000000000000000ul, 0x4000000000000000ul)] + [TestCase(0x6E619820u, 0x3FF3333333333333ul, 0x3FF3333333333333ul, 'P', false, 0x4000000000000000ul, 0x4000000000000000ul)] + [TestCase(0x6E619820u, 0x3FFCCCCCCCCCCCCDul, 0x3FFCCCCCCCCCCCCDul, 'P', false, 0x4000000000000000ul, 0x4000000000000000ul)] + [TestCase(0x6E619820u, 0x3FF3333333333333ul, 0x3FF3333333333333ul, 'M', false, 0x3FF0000000000000ul, 0x3FF0000000000000ul)] + [TestCase(0x6E619820u, 0x3FFCCCCCCCCCCCCDul, 0x3FFCCCCCCCCCCCCDul, 'M', false, 0x3FF0000000000000ul, 0x3FF0000000000000ul)] + [TestCase(0x6E619820u, 0x3FF3333333333333ul, 0x3FF3333333333333ul, 'Z', false, 0x3FF0000000000000ul, 0x3FF0000000000000ul)] + [TestCase(0x6E619820u, 0x3FFCCCCCCCCCCCCDul, 0x3FFCCCCCCCCCCCCDul, 'Z', false, 0x3FF0000000000000ul, 0x3FF0000000000000ul)] + + //4S + [TestCase(0x6E219820u, 0x3f99999a3fe66666ul, 0x3f99999a3fe66666ul, 'N', false, 0x3f80000040000000ul, 0x3f80000040000000ul)] + [TestCase(0x6E219820u, 0x3f99999a3fe66666ul, 0x3f99999a3fe66666ul, 'P', false, 0x4000000040000000ul, 0x4000000040000000ul)] + [TestCase(0x6E219820u, 0x3f99999a3fe66666ul, 0x3f99999a3fe66666ul, 'M', false, 0x3f8000003f800000ul, 0x3f8000003f800000ul)] + [TestCase(0x6E219820u, 0x3f99999a3fe66666ul, 0x3f99999a3fe66666ul, 'Z', false, 0x3f8000003f800000ul, 0x3f8000003f800000ul)] + + //2S + [TestCase(0x2E219820u, 0x3f99999a3fe66666ul, 0x3f99999a3fe66666ul, 'N', false, 0x3f80000040000000ul, 0x0000000000000000ul)] + [TestCase(0x2E219820u, 0x3f99999a3fe66666ul, 0x3f99999a3fe66666ul, 'P', false, 0x4000000040000000ul, 0x0000000000000000ul)] + [TestCase(0x2E219820u, 0x3f99999a3fe66666ul, 0x3f99999a3fe66666ul, 'M', false, 0x3f8000003f800000ul, 0x0000000000000000ul)] + [TestCase(0x2E219820u, 0x3f99999a3fe66666ul, 0x3f99999a3fe66666ul, 'Z', false, 0x3f8000003f800000ul, 0x0000000000000000ul)] + + public void Frintx_V(uint Opcode, ulong A, ulong B, char RoundType, bool DefaultNaN, ulong Result0, ulong Result1) { int FpcrTemp = 0x0; switch(RoundType) @@ -178,7 +178,7 @@ namespace Ryujinx.Tests.Cpu FpcrTemp |= 1 << 25; } AVec V1 = new AVec { X0 = A, X1 = B }; - AThreadState ThreadState = SingleOpcode(0x6E619820, V1: V1, Fpcr: FpcrTemp); + AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp); Assert.Multiple(() => { Assert.AreEqual(Result0, ThreadState.V0.X0);