Update Pseudocode.cs
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1 changed files with 475 additions and 15 deletions
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@ -5,21 +5,19 @@
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// https://alastairreid.github.io/asl-lexical-syntax/
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// | ------------------------|----------------------------------- |
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// | ASL | C# |
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// | ------------------------|----------------------------------- |
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// | bit, bits(1); boolean | bool |
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// | bits | Bits |
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// | integer | BigInteger, int |
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// | real | decimal |
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// | ------------------------|----------------------------------- |
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// | '0'; FALSE | false |
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// | '1'; TRUE | true |
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// | '010' | "010" |
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// | bitsX IN {bitsY, bitsZ} | (bitsX == bitsY || bitsX == bitsZ) |
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// | DIV | / |
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// | MOD | % |
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// | ------------------------|----------------------------------- |
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// | ------------------------|-------------------------------- |
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// | ASL | C# |
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// | ------------------------|-------------------------------- |
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// | bit, bits(1); boolean | bool |
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// | bits | Bits |
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// | integer | BigInteger, int |
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// | real | decimal; double, float |
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// | ------------------------|-------------------------------- |
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// | '0'; FALSE | false |
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// | '1'; TRUE | true |
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// | '010' | "010" |
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// | DIV, MOD | /, % |
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// | ------------------------|-------------------------------- |
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using System;
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using System.Numerics;
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@ -107,6 +105,7 @@ namespace Ryujinx.Tests.Cpu.Tester
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/* SP_EL1 = bits(64) UNKNOWN; */
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SP_EL1.SetAll(false);
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FPCR.SetAll(false); // TODO: Add named fields.
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FPSR.SetAll(false); // TODO: Add named fields.
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}
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@ -458,6 +457,7 @@ namespace Ryujinx.Tests.Cpu.Tester
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#endregion
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#region "instrs/vector/reduce/reduceop/"
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// shared_pseudocode.html#impl-aarch64.Reduce.3
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public static Bits Reduce(ReduceOp op, Bits input, int esize)
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{
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int N = input.Count;
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@ -528,6 +528,7 @@ namespace Ryujinx.Tests.Cpu.Tester
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SP_EL0 = new Bits(64, false);
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SP_EL1 = new Bits(64, false);
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FPCR = new Bits(32, false); // TODO: Add named fields.
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FPSR = new Bits(32, false); // TODO: Add named fields.
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PSTATE.N = false;
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@ -817,6 +818,36 @@ namespace Ryujinx.Tests.Cpu.Tester
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return (decimal)value;
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}
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/* */
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public static float Real_32(BigInteger value)
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{
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if (value == BigInteger.Pow((BigInteger)2.0f, 1000))
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{
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return float.PositiveInfinity;
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}
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if (value == -BigInteger.Pow((BigInteger)2.0f, 1000))
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{
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return float.NegativeInfinity;
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}
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return (float)value;
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}
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/* */
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public static double Real_64(BigInteger value)
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{
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if (value == BigInteger.Pow((BigInteger)2.0, 10000))
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{
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return double.PositiveInfinity;
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}
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if (value == -BigInteger.Pow((BigInteger)2.0, 10000))
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{
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return double.NegativeInfinity;
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}
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return (double)value;
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}
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// shared_pseudocode.html#impl-shared.ROR.2
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public static Bits ROR(Bits x, int shift)
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{
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@ -881,6 +912,36 @@ namespace Ryujinx.Tests.Cpu.Tester
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return (BigInteger)Decimal.Floor(x);
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}
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/* */
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public static BigInteger RoundDown_32(float x)
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{
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if (float.IsPositiveInfinity(x))
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{
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return BigInteger.Pow((BigInteger)2.0f, 1000);
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}
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if (float.IsNegativeInfinity(x))
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{
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return -BigInteger.Pow((BigInteger)2.0f, 1000);
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}
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return (BigInteger)MathF.Floor(x);
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}
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/* */
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public static BigInteger RoundDown_64(double x)
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{
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if (double.IsPositiveInfinity(x))
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{
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return BigInteger.Pow((BigInteger)2.0, 10000);
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}
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if (double.IsNegativeInfinity(x))
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{
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return -BigInteger.Pow((BigInteger)2.0, 10000);
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}
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return (BigInteger)Math.Floor(x);
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}
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// shared_pseudocode.html#impl-shared.RoundTowardsZero.1
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public static BigInteger RoundTowardsZero(decimal x)
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{
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@ -1091,6 +1152,398 @@ namespace Ryujinx.Tests.Cpu.Tester
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}
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#endregion
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#region "functions/float/fpdecoderounding/"
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/* shared_pseudocode.html#impl-shared.FPDecodeRounding.1 */
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public static FPRounding FPDecodeRounding(Bits rmode)
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{
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switch (rmode)
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{
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default:
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case Bits bits when bits == "00":
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return FPRounding.FPRounding_TIEEVEN; // N
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case Bits bits when bits == "01":
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return FPRounding.FPRounding_POSINF; // P
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case Bits bits when bits == "10":
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return FPRounding.FPRounding_NEGINF; // M
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case Bits bits when bits == "11":
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return FPRounding.FPRounding_ZERO; // Z
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}
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}
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#endregion
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#region "functions/float/fpexc/"
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// shared_pseudocode.html#FPExc
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public enum FPExc {FPExc_InvalidOp, FPExc_DivideByZero, FPExc_Overflow,
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FPExc_Underflow, FPExc_Inexact, FPExc_InputDenorm};
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#endregion
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#region "functions/float/fpprocessexception/"
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// shared_pseudocode.html#impl-shared.FPProcessException.2
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public static void FPProcessException(FPExc exception, Bits _fpcr)
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{
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Bits fpcr = new Bits(_fpcr); // Clone.
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int cumul;
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// Determine the cumulative exception bit number
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switch (exception)
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{
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default:
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case FPExc.FPExc_InvalidOp: cumul = 0; break;
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case FPExc.FPExc_DivideByZero: cumul = 1; break;
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case FPExc.FPExc_Overflow: cumul = 2; break;
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case FPExc.FPExc_Underflow: cumul = 3; break;
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case FPExc.FPExc_Inexact: cumul = 4; break;
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case FPExc.FPExc_InputDenorm: cumul = 7; break;
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}
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int enable = cumul + 8;
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if (fpcr[enable])
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{
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// Trapping of the exception enabled.
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// It is IMPLEMENTATION DEFINED whether the enable bit may be set at all, and
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// if so then how exceptions may be accumulated before calling FPTrapException()
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/* IMPLEMENTATION_DEFINED "floating-point trap handling"; */
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throw new NotImplementedException();
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}/*
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else if (UsingAArch32())
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{
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// Set the cumulative exception bit
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FPSCR<cumul> = '1';
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}*/
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else
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{
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// Set the cumulative exception bit
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FPSR[cumul] = true;
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}
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}
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#endregion
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#region "functions/float/fprounding/"
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// shared_pseudocode.html#FPRounding
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public enum FPRounding {FPRounding_TIEEVEN, FPRounding_POSINF,
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FPRounding_NEGINF, FPRounding_ZERO,
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FPRounding_TIEAWAY, FPRounding_ODD};
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#endregion
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#region "functions/float/fptofixed/"
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/* shared_pseudocode.html#impl-shared.FPToFixed.5 */
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public static Bits FPToFixed(int M, Bits op, int fbits, bool unsigned, Bits _fpcr, FPRounding rounding)
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{
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int N = op.Count;
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/* assert N IN {16,32,64}; */
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/* assert M IN {16,32,64}; */
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/* assert fbits >= 0; */
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/* assert rounding != FPRounding_ODD; */
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Bits fpcr = new Bits(_fpcr); // Clone.
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if (N == 16)
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{
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throw new NotImplementedException();
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}
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else if (N == 32)
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{
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// Unpack using fpcr to determine if subnormals are flushed-to-zero
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(FPType type, bool sign, float value) = FPUnpack_32(op, fpcr);
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// If NaN, set cumulative flag or take exception
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if (type == FPType.FPType_SNaN || type == FPType.FPType_QNaN)
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{
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FPProcessException(FPExc.FPExc_InvalidOp, fpcr);
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}
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// Scale by fractional bits and produce integer rounded towards minus-infinity
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value = value * MathF.Pow(2.0f, fbits);
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BigInteger int_result = RoundDown_32(value);
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float error = value - Real_32(int_result);
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if (float.IsNaN(error))
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{
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error = 0.0f;
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}
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// Determine whether supplied rounding mode requires an increment
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bool round_up;
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switch (rounding)
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{
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default:
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case FPRounding.FPRounding_TIEEVEN:
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round_up = (error > 0.5f || (error == 0.5f && int_result.SubBigInteger(0)));
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break;
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case FPRounding.FPRounding_POSINF:
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round_up = (error != 0.0f);
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break;
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case FPRounding.FPRounding_NEGINF:
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round_up = false;
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break;
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case FPRounding.FPRounding_ZERO:
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round_up = (error != 0.0f && int_result < (BigInteger)0);
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break;
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case FPRounding.FPRounding_TIEAWAY:
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round_up = (error > 0.5f || (error == 0.5f && int_result >= (BigInteger)0));
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break;
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}
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if (round_up)
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{
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int_result = int_result + 1;
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}
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// Generate saturated result and exceptions
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(Bits result, bool overflow) = SatQ(int_result, M, unsigned);
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if (overflow)
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{
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FPProcessException(FPExc.FPExc_InvalidOp, fpcr);
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}
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else if (error != 0.0f)
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{
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FPProcessException(FPExc.FPExc_Inexact, fpcr);
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}
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return result;
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}
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else /* if (N == 64) */
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{
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// Unpack using fpcr to determine if subnormals are flushed-to-zero
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(FPType type, bool sign, double value) = FPUnpack_64(op, fpcr);
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// If NaN, set cumulative flag or take exception
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if (type == FPType.FPType_SNaN || type == FPType.FPType_QNaN)
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{
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FPProcessException(FPExc.FPExc_InvalidOp, fpcr);
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}
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// Scale by fractional bits and produce integer rounded towards minus-infinity
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value = value * Math.Pow(2.0, fbits);
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BigInteger int_result = RoundDown_64(value);
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double error = value - Real_64(int_result);
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if (double.IsNaN(error))
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{
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error = 0.0;
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}
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// Determine whether supplied rounding mode requires an increment
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bool round_up;
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switch (rounding)
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{
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default:
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case FPRounding.FPRounding_TIEEVEN:
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round_up = (error > 0.5 || (error == 0.5 && int_result.SubBigInteger(0)));
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break;
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case FPRounding.FPRounding_POSINF:
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round_up = (error != 0.0);
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break;
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case FPRounding.FPRounding_NEGINF:
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round_up = false;
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break;
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case FPRounding.FPRounding_ZERO:
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round_up = (error != 0.0 && int_result < (BigInteger)0);
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break;
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case FPRounding.FPRounding_TIEAWAY:
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round_up = (error > 0.5 || (error == 0.5 && int_result >= (BigInteger)0));
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break;
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}
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if (round_up)
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{
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int_result = int_result + 1;
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}
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// Generate saturated result and exceptions
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(Bits result, bool overflow) = SatQ(int_result, M, unsigned);
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if (overflow)
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{
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FPProcessException(FPExc.FPExc_InvalidOp, fpcr);
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}
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else if (error != 0.0)
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{
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FPProcessException(FPExc.FPExc_Inexact, fpcr);
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}
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return result;
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}
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}
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#endregion
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#region "functions/float/fptype/"
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// shared_pseudocode.html#FPType
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public enum FPType {FPType_Nonzero, FPType_Zero, FPType_Infinity,
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FPType_QNaN, FPType_SNaN};
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#endregion
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#region "functions/float/fpunpack/"
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/* shared_pseudocode.html#impl-shared.FPUnpack.2 */
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/* shared_pseudocode.html#impl-shared.FPUnpackBase.2 */
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/*public static (FPType, bool, real) FPUnpack_16(Bits fpval, Bits _fpcr)
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{
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int N = fpval.Count;
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// assert N == 16;
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Bits fpcr = new Bits(_fpcr); // Clone.
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fpcr[26] = false;
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return FPUnpackBase_16(fpval, fpcr);
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}*/
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public static (FPType, bool, float) FPUnpack_32(Bits fpval, Bits _fpcr)
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{
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int N = fpval.Count;
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/* assert N == 32; */
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Bits fpcr = new Bits(_fpcr); // Clone.
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FPType type;
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float value;
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bool sign = fpval[31];
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Bits exp32 = fpval[30, 23];
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Bits frac32 = fpval[22, 0];
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if (IsZero(exp32))
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{
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// Produce zero if value is zero or flush-to-zero is selected.
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if (IsZero(frac32) || fpcr[24])
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{
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type = FPType.FPType_Zero;
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value = 0.0f;
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// Denormalized input flushed to zero
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if (!IsZero(frac32))
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{
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FPProcessException(FPExc.FPExc_InputDenorm, fpcr);
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}
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}
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else
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{
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type = FPType.FPType_Nonzero;
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value = MathF.Pow(2.0f, -126) * (Real_32(UInt(frac32)) * MathF.Pow(2.0f, -23));
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}
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}
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else if (IsOnes(exp32))
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{
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if (IsZero(frac32))
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{
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type = FPType.FPType_Infinity;
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/* value = 2.0^1000000; */
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value = MathF.Pow(2.0f, 1000);
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}
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else
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{
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type = frac32[22] ? FPType.FPType_QNaN : FPType.FPType_SNaN;
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value = 0.0f;
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}
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}
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else
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{
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type = FPType.FPType_Nonzero;
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value = MathF.Pow(2.0f, (int)UInt(exp32) - 127) * (1.0f + Real_32(UInt(frac32)) * MathF.Pow(2.0f, -23));
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}
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if (sign)
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{
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value = -value;
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}
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return (type, sign, value);
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}
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public static (FPType, bool, double) FPUnpack_64(Bits fpval, Bits _fpcr)
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{
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int N = fpval.Count;
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/* assert N == 64; */
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Bits fpcr = new Bits(_fpcr); // Clone.
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FPType type;
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double value;
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bool sign = fpval[63];
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Bits exp64 = fpval[62, 52];
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Bits frac64 = fpval[51, 0];
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if (IsZero(exp64))
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{
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// Produce zero if value is zero or flush-to-zero is selected.
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if (IsZero(frac64) || fpcr[24])
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{
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type = FPType.FPType_Zero;
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value = 0.0;
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// Denormalized input flushed to zero
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if (!IsZero(frac64))
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{
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FPProcessException(FPExc.FPExc_InputDenorm, fpcr);
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}
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}
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else
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{
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type = FPType.FPType_Nonzero;
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value = Math.Pow(2.0, -1022) * (Real_64(UInt(frac64)) * Math.Pow(2.0, -52));
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}
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}
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else if (IsOnes(exp64))
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{
|
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if (IsZero(frac64))
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{
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type = FPType.FPType_Infinity;
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/* value = 2.0^1000000; */
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value = Math.Pow(2.0, 10000);
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}
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else
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{
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type = frac64[51] ? FPType.FPType_QNaN : FPType.FPType_SNaN;
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value = 0.0;
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}
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}
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else
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{
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type = FPType.FPType_Nonzero;
|
||||
value = Math.Pow(2.0, (int)UInt(exp64) - 1023) * (1.0 + Real_64(UInt(frac64)) * Math.Pow(2.0, -52));
|
||||
}
|
||||
|
||||
if (sign)
|
||||
{
|
||||
value = -value;
|
||||
}
|
||||
|
||||
return (type, sign, value);
|
||||
}
|
||||
|
||||
/* shared_pseudocode.html#impl-shared.FPUnpackCV.2 */
|
||||
/* shared_pseudocode.html#impl-shared.FPUnpackBase.2 */
|
||||
/*public static (FPType, bool, real) FPUnpackCV_16(Bits fpval, Bits _fpcr)
|
||||
{
|
||||
int N = fpval.Count;
|
||||
|
||||
// assert N == 16;
|
||||
|
||||
Bits fpcr = new Bits(_fpcr); // Clone.
|
||||
|
||||
fpcr[19] = false;
|
||||
|
||||
return FPUnpackBase_16(fpval, fpcr);
|
||||
}*/
|
||||
public static (FPType, bool, float) FPUnpackCV_32(Bits fpval, Bits _fpcr)
|
||||
{
|
||||
return FPUnpack_32(fpval, _fpcr);
|
||||
}
|
||||
public static (FPType, bool, double) FPUnpackCV_64(Bits fpval, Bits _fpcr)
|
||||
{
|
||||
return FPUnpack_64(fpval, _fpcr);
|
||||
}
|
||||
#endregion
|
||||
|
||||
#region "functions/integer/"
|
||||
/* shared_pseudocode.html#impl-shared.AddWithCarry.3 */
|
||||
public static (Bits, Bits) AddWithCarry(int N, Bits x, Bits y, bool carry_in)
|
||||
|
|
@ -1117,7 +1570,12 @@ namespace Ryujinx.Tests.Cpu.Tester
|
|||
public static Bits SP_EL0;
|
||||
public static Bits SP_EL1;
|
||||
|
||||
public static Bits FPCR; // TODO: Add named fields.
|
||||
// [ 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 22 | 21 20 | 19 | 18 17 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 ]
|
||||
// [ 0 | 0 | 0 | 0 | 0 | AHP | DN | FZ | RMode | Stride | FZ16 | Len | IDE | 0 | 0 | IXE | UFE | OFE | DZE | IOE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 ]
|
||||
public static Bits FPSR; // TODO: Add named fields.
|
||||
// [ 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 ]
|
||||
// [ N | Z | C | V | QC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | IDC | 0 | 0 | IXC | UFC | OFC | DZC | IOC ]
|
||||
#endregion
|
||||
|
||||
#region "functions/system/"
|
||||
|
|
@ -1178,6 +1636,8 @@ namespace Ryujinx.Tests.Cpu.Tester
|
|||
/* shared_pseudocode.html#impl-shared.HaveEL.1 */
|
||||
public static bool HaveEL(Bits el)
|
||||
{
|
||||
// TODO: Implement ASL: "IN" as C#: "Bits.In()".
|
||||
/* if el IN {EL1,EL0} then */
|
||||
if (el == EL1 || el == EL0)
|
||||
{
|
||||
return true; // EL1 and EL0 must exist
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue