diff --git a/Ryujinx.Tests/Cpu/CpuTest.cs b/Ryujinx.Tests/Cpu/CpuTest.cs
index 14ef0a15df..67e836f0fc 100644
--- a/Ryujinx.Tests/Cpu/CpuTest.cs
+++ b/Ryujinx.Tests/Cpu/CpuTest.cs
@@ -55,7 +55,8 @@ namespace Ryujinx.Tests.Cpu
 
         protected void SetThreadState(ulong X0 = 0, ulong X1 = 0, ulong X2 = 0, ulong X3 = 0, ulong X31 = 0,
                                       AVec V0 = default(AVec), AVec V1 = default(AVec), AVec V2 = default(AVec),
-                                      bool Overflow = false, bool Carry = false, bool Zero = false, bool Negative = false, int Fpcr = 0x0)
+                                      bool Overflow = false, bool Carry = false, bool Zero = false, bool Negative = false,
+                                      int Fpcr = 0x0, int Fpsr = 0x0)
         {
             Thread.ThreadState.X0 = X0;
             Thread.ThreadState.X1 = X1;
@@ -70,6 +71,7 @@ namespace Ryujinx.Tests.Cpu
             Thread.ThreadState.Zero = Zero;
             Thread.ThreadState.Negative = Negative;
             Thread.ThreadState.Fpcr = Fpcr;
+            Thread.ThreadState.Fpsr = Fpsr;
         }
 
         protected void ExecuteOpcodes()
@@ -92,12 +94,13 @@ namespace Ryujinx.Tests.Cpu
         protected AThreadState SingleOpcode(uint Opcode,
                                             ulong X0 = 0, ulong X1 = 0, ulong X2 = 0, ulong X3 = 0, ulong X31 = 0,
                                             AVec V0 = default(AVec), AVec V1 = default(AVec), AVec V2 = default(AVec),
-                                            bool Overflow = false, bool Carry = false, bool Zero = false, bool Negative = false, int Fpcr = 0x0)
+                                            bool Overflow = false, bool Carry = false, bool Zero = false, bool Negative = false,
+                                            int Fpcr = 0x0, int Fpsr = 0x0)
         {
             this.Opcode(Opcode);
             this.Opcode(0xD4200000); // BRK #0
             this.Opcode(0xD65F03C0); // RET
-            SetThreadState(X0, X1, X2, X3, X31, V0, V1, V2, Overflow, Carry, Zero, Negative, Fpcr);
+            SetThreadState(X0, X1, X2, X3, X31, V0, V1, V2, Overflow, Carry, Zero, Negative, Fpcr, Fpsr);
             ExecuteOpcodes();
 
             return GetThreadState();