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Update InstEmitSimdCvt.cs

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LDj3SNuD 2018-11-15 13:28:47 +01:00 • committed by GitHub
commit 893f5454f1
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1 changed files with 23 additions and 11 deletions
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32
ChocolArm64/Instructions/InstEmitSimdCvt.cs
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@ -307,9 +307,31 @@ namespace ChocolArm64.Instructions
} }
public static void Scvtf_V(ILEmitterCtx context) public static void Scvtf_V(ILEmitterCtx context)
{
OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
int sizeF = op.Size & 1;
if (Optimizations.UseSse2 && sizeF == 0)
{
Type[] typesCvt = new Type[] { typeof(Vector128<int>) };
EmitLdvecWithSignedCast(context, op.Rn, 2);
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.ConvertToVector128Single), typesCvt));
context.EmitStvec(op.Rd);
if (op.RegisterSize == RegisterSize.Simd64)
{
EmitVectorZeroUpper(context, op.Rd);
}
}
else
{ {
EmitVectorCvtf(context, signed: true); EmitVectorCvtf(context, signed: true);
} }
}
public static void Ucvtf_Gp(ILEmitterCtx context) public static void Ucvtf_Gp(ILEmitterCtx context)
{ {
@ -489,16 +511,6 @@ namespace ChocolArm64.Instructions
context.EmitStintzr(op.Rd); context.EmitStintzr(op.Rd);
} }
private static void EmitVectorScvtf(ILEmitterCtx context)
{
EmitVectorCvtf(context, true);
}
private static void EmitVectorUcvtf(ILEmitterCtx context)
{
EmitVectorCvtf(context, false);
}
private static void EmitVectorCvtf(ILEmitterCtx context, bool signed) private static void EmitVectorCvtf(ILEmitterCtx context, bool signed)
{ {
OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp; OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;