Update CpuTestSimdShImm.cs
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1 changed files with 318 additions and 0 deletions
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@ -20,6 +20,18 @@ namespace Ryujinx.Tests.Cpu
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul };
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}
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private static ulong[] _1H_()
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{
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return new ulong[] { 0x0000000000000000ul, 0x0000000000007FFFul,
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0x0000000000008000ul, 0x000000000000FFFFul };
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}
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private static ulong[] _1S_()
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{
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return new ulong[] { 0x0000000000000000ul, 0x000000007FFFFFFFul,
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0x0000000080000000ul, 0x00000000FFFFFFFFul };
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}
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private static ulong[] _2S_()
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{
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return new ulong[] { 0x0000000000000000ul, 0x7FFFFFFF7FFFFFFFul,
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@ -114,6 +126,111 @@ namespace Ryujinx.Tests.Cpu
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0x6F401400u // USRA V0.2D, V0.2D, #64
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};
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}
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private static uint[] _ShrImmNarrow_V_8H8B_8H16B_()
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{
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return new uint[]
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{
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0x0F088C00u, // RSHRN V0.8B, V0.8H, #8
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0x0F088400u // SHRN V0.8B, V0.8H, #8
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};
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}
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private static uint[] _ShrImmNarrow_V_4S4H_4S8H_()
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{
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return new uint[]
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{
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0x0F108C00u, // RSHRN V0.4H, V0.4S, #16
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0x0F108400u // SHRN V0.4H, V0.4S, #16
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};
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}
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private static uint[] _ShrImmNarrow_V_2D2S_2D4S_()
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{
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return new uint[]
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{
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0x0F208C00u, // RSHRN V0.2S, V0.2D, #32
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0x0F208400u // SHRN V0.2S, V0.2D, #32
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};
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}
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private static uint[] _ShrImmSaturatingNarrow_S_HB_()
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{
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return new uint[]
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{
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0x5F089C00u, // SQRSHRN B0, H0, #8
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0x7F089C00u, // UQRSHRN B0, H0, #8
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0x7F088C00u, // SQRSHRUN B0, H0, #8
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0x5F089400u, // SQSHRN B0, H0, #8
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0x7F089400u, // UQSHRN B0, H0, #8
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0x7F088400u // SQSHRUN B0, H0, #8
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};
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}
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private static uint[] _ShrImmSaturatingNarrow_S_SH_()
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{
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return new uint[]
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{
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0x5F109C00u, // SQRSHRN H0, S0, #16
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0x7F109C00u, // UQRSHRN H0, S0, #16
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0x7F108C00u, // SQRSHRUN H0, S0, #16
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0x5F109400u, // SQSHRN H0, S0, #16
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0x7F109400u, // UQSHRN H0, S0, #16
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0x7F108400u // SQSHRUN H0, S0, #16
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};
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}
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private static uint[] _ShrImmSaturatingNarrow_S_DS_()
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{
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return new uint[]
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{
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0x5F209C00u, // SQRSHRN S0, D0, #32
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0x7F209C00u, // UQRSHRN S0, D0, #32
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0x7F208C00u, // SQRSHRUN S0, D0, #32
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0x5F209400u, // SQSHRN S0, D0, #32
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0x7F209400u, // UQSHRN S0, D0, #32
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0x7F208400u // SQSHRUN S0, D0, #32
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};
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}
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private static uint[] _ShrImmSaturatingNarrow_V_8H8B_8H16B_()
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{
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return new uint[]
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{
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0x0F089C00u, // SQRSHRN V0.8B, V0.8H, #8
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0x2F089C00u, // UQRSHRN V0.8B, V0.8H, #8
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0x2F088C00u, // SQRSHRUN V0.8B, V0.8H, #8
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0x0F089400u, // SQSHRN V0.8B, V0.8H, #8
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0x2F089400u, // UQSHRN V0.8B, V0.8H, #8
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0x2F088400u // SQSHRUN V0.8B, V0.8H, #8
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};
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}
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private static uint[] _ShrImmSaturatingNarrow_V_4S4H_4S8H_()
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{
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return new uint[]
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{
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0x0F109C00u, // SQRSHRN V0.4H, V0.4S, #16
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0x2F109C00u, // UQRSHRN V0.4H, V0.4S, #16
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0x2F108C00u, // SQRSHRUN V0.4H, V0.4S, #16
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0x0F109400u, // SQSHRN V0.4H, V0.4S, #16
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0x2F109400u, // UQSHRN V0.4H, V0.4S, #16
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0x2F108400u // SQSHRUN V0.4H, V0.4S, #16
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};
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}
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private static uint[] _ShrImmSaturatingNarrow_V_2D2S_2D4S_()
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{
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return new uint[]
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{
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0x0F209C00u, // SQRSHRN V0.2S, V0.2D, #32
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0x2F209C00u, // UQRSHRN V0.2S, V0.2D, #32
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0x2F208C00u, // SQRSHRUN V0.2S, V0.2D, #32
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0x0F209400u, // SQSHRN V0.2S, V0.2D, #32
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0x2F209400u, // UQSHRN V0.2S, V0.2D, #32
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0x2F208400u // SQSHRUN V0.2S, V0.2D, #32
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};
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}
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#endregion
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private const int RndCnt = 2;
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@ -339,6 +456,207 @@ namespace Ryujinx.Tests.Cpu
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CompareAgainstUnicorn();
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}
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[Test, Pairwise]
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public void ShrImmNarrow_V_8H8B_8H16B([ValueSource("_ShrImmNarrow_V_8H8B_8H16B_")] uint Opcodes,
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[Values(0u)] uint Rd,
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[Values(1u, 0u)] uint Rn,
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[ValueSource("_4H_")] [Random(RndCnt)] ulong Z,
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[ValueSource("_4H_")] [Random(RndCnt)] ulong A,
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[Range(1u, 8u)] uint Shift,
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[Values(0b0u, 0b1u)] uint Q) // <8H8B, 8H16B>
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{
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uint ImmHB = (16 - Shift) & 0x7F;
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Opcodes |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
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Opcodes |= (ImmHB << 16);
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Opcodes |= ((Q & 1) << 30);
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Vector128<float> V0 = MakeVectorE0E1(Z, Z);
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Vector128<float> V1 = MakeVectorE0E1(A, A);
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AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise]
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public void ShrImmNarrow_V_4S4H_4S8H([ValueSource("_ShrImmNarrow_V_4S4H_4S8H_")] uint Opcodes,
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[Values(0u)] uint Rd,
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[Values(1u, 0u)] uint Rn,
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[ValueSource("_2S_")] [Random(RndCnt)] ulong Z,
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[ValueSource("_2S_")] [Random(RndCnt)] ulong A,
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[Range(1u, 16u)] uint Shift,
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[Values(0b0u, 0b1u)] uint Q) // <4S4H, 4S8H>
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{
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uint ImmHB = (32 - Shift) & 0x7F;
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Opcodes |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
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Opcodes |= (ImmHB << 16);
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Opcodes |= ((Q & 1) << 30);
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Vector128<float> V0 = MakeVectorE0E1(Z, Z);
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Vector128<float> V1 = MakeVectorE0E1(A, A);
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AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise]
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public void ShrImmNarrow_V_2D2S_2D4S([ValueSource("_ShrImmNarrow_V_2D2S_2D4S_")] uint Opcodes,
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[Values(0u)] uint Rd,
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[Values(1u, 0u)] uint Rn,
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[ValueSource("_1D_")] [Random(RndCnt)] ulong Z,
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[ValueSource("_1D_")] [Random(RndCnt)] ulong A,
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[Range(1u, 32u)] uint Shift,
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[Values(0b0u, 0b1u)] uint Q) // <2D2S, 2D4S>
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{
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uint ImmHB = (64 - Shift) & 0x7F;
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Opcodes |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
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Opcodes |= (ImmHB << 16);
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Opcodes |= ((Q & 1) << 30);
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Vector128<float> V0 = MakeVectorE0E1(Z, Z);
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Vector128<float> V1 = MakeVectorE0E1(A, A);
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AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise]
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public void ShrImmSaturatingNarrow_S_HB([ValueSource("_ShrImmSaturatingNarrow_S_HB_")] uint Opcodes,
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[Values(0u)] uint Rd,
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[Values(1u, 0u)] uint Rn,
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[ValueSource("_1H_")] [Random(RndCnt)] ulong Z,
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[ValueSource("_1H_")] [Random(RndCnt)] ulong A,
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[Range(1u, 8u)] uint Shift)
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{
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uint ImmHB = (16 - Shift) & 0x7F;
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Opcodes |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
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Opcodes |= (ImmHB << 16);
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Vector128<float> V0 = MakeVectorE0E1(Z, Z);
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Vector128<float> V1 = MakeVectorE0(A);
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AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
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CompareAgainstUnicorn(FpsrMask: FPSR.QC);
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}
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[Test, Pairwise]
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public void ShrImmSaturatingNarrow_S_SH([ValueSource("_ShrImmSaturatingNarrow_S_SH_")] uint Opcodes,
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[Values(0u)] uint Rd,
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[Values(1u, 0u)] uint Rn,
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[ValueSource("_1S_")] [Random(RndCnt)] ulong Z,
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[ValueSource("_1S_")] [Random(RndCnt)] ulong A,
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[Range(1u, 16u)] uint Shift)
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{
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uint ImmHB = (32 - Shift) & 0x7F;
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Opcodes |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
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Opcodes |= (ImmHB << 16);
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Vector128<float> V0 = MakeVectorE0E1(Z, Z);
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Vector128<float> V1 = MakeVectorE0(A);
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AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
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CompareAgainstUnicorn(FpsrMask: FPSR.QC);
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}
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[Test, Pairwise]
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public void ShrImmSaturatingNarrow_S_DS([ValueSource("_ShrImmSaturatingNarrow_S_DS_")] uint Opcodes,
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[Values(0u)] uint Rd,
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[Values(1u, 0u)] uint Rn,
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[ValueSource("_1D_")] [Random(RndCnt)] ulong Z,
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[ValueSource("_1D_")] [Random(RndCnt)] ulong A,
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[Range(1u, 32u)] uint Shift)
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{
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uint ImmHB = (64 - Shift) & 0x7F;
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Opcodes |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
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Opcodes |= (ImmHB << 16);
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Vector128<float> V0 = MakeVectorE0E1(Z, Z);
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Vector128<float> V1 = MakeVectorE0(A);
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AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
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CompareAgainstUnicorn(FpsrMask: FPSR.QC);
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}
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[Test, Pairwise]
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public void ShrImmSaturatingNarrow_V_8H8B_8H16B([ValueSource("_ShrImmSaturatingNarrow_V_8H8B_8H16B_")] uint Opcodes,
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[Values(0u)] uint Rd,
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[Values(1u, 0u)] uint Rn,
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[ValueSource("_4H_")] [Random(RndCnt)] ulong Z,
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[ValueSource("_4H_")] [Random(RndCnt)] ulong A,
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[Range(1u, 8u)] uint Shift,
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[Values(0b0u, 0b1u)] uint Q) // <8H8B, 8H16B>
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{
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uint ImmHB = (16 - Shift) & 0x7F;
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Opcodes |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
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Opcodes |= (ImmHB << 16);
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Opcodes |= ((Q & 1) << 30);
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Vector128<float> V0 = MakeVectorE0E1(Z, Z);
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Vector128<float> V1 = MakeVectorE0(A);
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AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
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CompareAgainstUnicorn(FpsrMask: FPSR.QC);
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}
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[Test, Pairwise]
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public void ShrImmSaturatingNarrow_V_4S4H_4S8H([ValueSource("_ShrImmSaturatingNarrow_V_4S4H_4S8H_")] uint Opcodes,
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[Values(0u)] uint Rd,
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[Values(1u, 0u)] uint Rn,
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[ValueSource("_2S_")] [Random(RndCnt)] ulong Z,
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[ValueSource("_2S_")] [Random(RndCnt)] ulong A,
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[Range(1u, 16u)] uint Shift,
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[Values(0b0u, 0b1u)] uint Q) // <4S4H, 4S8H>
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{
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uint ImmHB = (32 - Shift) & 0x7F;
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Opcodes |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
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Opcodes |= (ImmHB << 16);
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Opcodes |= ((Q & 1) << 30);
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Vector128<float> V0 = MakeVectorE0E1(Z, Z);
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Vector128<float> V1 = MakeVectorE0(A);
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AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
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CompareAgainstUnicorn(FpsrMask: FPSR.QC);
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}
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[Test, Pairwise]
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public void ShrImmSaturatingNarrow_V_2D2S_2D4S([ValueSource("_ShrImmSaturatingNarrow_V_2D2S_2D4S_")] uint Opcodes,
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[Values(0u)] uint Rd,
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[Values(1u, 0u)] uint Rn,
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[ValueSource("_1D_")] [Random(RndCnt)] ulong Z,
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[ValueSource("_1D_")] [Random(RndCnt)] ulong A,
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[Range(1u, 32u)] uint Shift,
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[Values(0b0u, 0b1u)] uint Q) // <2D2S, 2D4S>
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{
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uint ImmHB = (64 - Shift) & 0x7F;
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Opcodes |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
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Opcodes |= (ImmHB << 16);
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Opcodes |= ((Q & 1) << 30);
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Vector128<float> V0 = MakeVectorE0E1(Z, Z);
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Vector128<float> V1 = MakeVectorE0(A);
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AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
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CompareAgainstUnicorn(FpsrMask: FPSR.QC);
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}
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#endif
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}
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}
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