diff --git a/ChocolArm64/Instruction/ASoftFallback.cs b/ChocolArm64/Instruction/ASoftFallback.cs
index 4af21fdc44..13222f46e7 100644
--- a/ChocolArm64/Instruction/ASoftFallback.cs
+++ b/ChocolArm64/Instruction/ASoftFallback.cs
@@ -112,13 +112,13 @@ namespace ChocolArm64.Instruction
 
             if (op > tMaxValue)
             {
-                state.SetFpsrFlag(Fpsr.Qc);
+                state.SetFpsrFlag(AFpsr.Qc);
 
                 return tMaxValue;
             }
             else if (op < tMinValue)
             {
-                state.SetFpsrFlag(Fpsr.Qc);
+                state.SetFpsrFlag(AFpsr.Qc);
 
                 return tMinValue;
             }
@@ -137,13 +137,13 @@ namespace ChocolArm64.Instruction
 
             if (op > (long)tMaxValue)
             {
-                state.SetFpsrFlag(Fpsr.Qc);
+                state.SetFpsrFlag(AFpsr.Qc);
 
                 return tMaxValue;
             }
             else if (op < (long)tMinValue)
             {
-                state.SetFpsrFlag(Fpsr.Qc);
+                state.SetFpsrFlag(AFpsr.Qc);
 
                 return tMinValue;
             }
@@ -161,7 +161,7 @@ namespace ChocolArm64.Instruction
 
             if (op > (ulong)tMaxValue)
             {
-                state.SetFpsrFlag(Fpsr.Qc);
+                state.SetFpsrFlag(AFpsr.Qc);
 
                 return tMaxValue;
             }
@@ -179,7 +179,7 @@ namespace ChocolArm64.Instruction
 
             if (op > tMaxValue)
             {
-                state.SetFpsrFlag(Fpsr.Qc);
+                state.SetFpsrFlag(AFpsr.Qc);
 
                 return tMaxValue;
             }
@@ -193,7 +193,7 @@ namespace ChocolArm64.Instruction
         {
             if (op == long.MinValue)
             {
-                state.SetFpsrFlag(Fpsr.Qc);
+                state.SetFpsrFlag(AFpsr.Qc);
 
                 return long.MaxValue;
             }
@@ -209,7 +209,7 @@ namespace ChocolArm64.Instruction
 
             if ((~(op1 ^ op2) & (op1 ^ add)) < 0L)
             {
-                state.SetFpsrFlag(Fpsr.Qc);
+                state.SetFpsrFlag(AFpsr.Qc);
 
                 if (op1 < 0L)
                 {
@@ -232,7 +232,7 @@ namespace ChocolArm64.Instruction
 
             if ((add < op1) && (add < op2))
             {
-                state.SetFpsrFlag(Fpsr.Qc);
+                state.SetFpsrFlag(AFpsr.Qc);
 
                 return ulong.MaxValue;
             }
@@ -248,7 +248,7 @@ namespace ChocolArm64.Instruction
 
             if (((op1 ^ op2) & (op1 ^ sub)) < 0L)
             {
-                state.SetFpsrFlag(Fpsr.Qc);
+                state.SetFpsrFlag(AFpsr.Qc);
 
                 if (op1 < 0L)
                 {
@@ -271,7 +271,7 @@ namespace ChocolArm64.Instruction
 
             if (op1 < op2)
             {
-                state.SetFpsrFlag(Fpsr.Qc);
+                state.SetFpsrFlag(AFpsr.Qc);
 
                 return ulong.MinValue;
             }
@@ -292,7 +292,7 @@ namespace ChocolArm64.Instruction
 
                 if ((~op2 & add) < 0L)
                 {
-                    state.SetFpsrFlag(Fpsr.Qc);
+                    state.SetFpsrFlag(AFpsr.Qc);
 
                     return long.MaxValue;
                 }
@@ -306,7 +306,7 @@ namespace ChocolArm64.Instruction
                 // Op1 from (ulong)long.MaxValue + 1UL to ulong.MaxValue
                 // Op2 from (long)ulong.MinValue to long.MaxValue
 
-                state.SetFpsrFlag(Fpsr.Qc);
+                state.SetFpsrFlag(AFpsr.Qc);
 
                 return long.MaxValue;
             }
@@ -319,7 +319,7 @@ namespace ChocolArm64.Instruction
 
                 if (add > (ulong)long.MaxValue)
                 {
-                    state.SetFpsrFlag(Fpsr.Qc);
+                    state.SetFpsrFlag(AFpsr.Qc);
 
                     return long.MaxValue;
                 }
@@ -341,7 +341,7 @@ namespace ChocolArm64.Instruction
 
                 if ((add < (ulong)op1) && (add < op2))
                 {
-                    state.SetFpsrFlag(Fpsr.Qc);
+                    state.SetFpsrFlag(AFpsr.Qc);
 
                     return ulong.MaxValue;
                 }
@@ -366,7 +366,7 @@ namespace ChocolArm64.Instruction
 
                 if (add < (long)ulong.MinValue)
                 {
-                    state.SetFpsrFlag(Fpsr.Qc);
+                    state.SetFpsrFlag(AFpsr.Qc);
 
                     return ulong.MinValue;
                 }
diff --git a/ChocolArm64/Instruction/ASoftFloat.cs b/ChocolArm64/Instruction/ASoftFloat.cs
index 0f7281122b..64562c9a2d 100644
--- a/ChocolArm64/Instruction/ASoftFloat.cs
+++ b/ChocolArm64/Instruction/ASoftFloat.cs
@@ -209,7 +209,7 @@ namespace ChocolArm64.Instruction
 
             if (type == FPType.SNaN || type == FPType.QNaN)
             {
-                if (state.GetFpcrFlag(Fpcr.Dn))
+                if (state.GetFpcrFlag(AFpcr.Dn))
                 {
                     result = FPDefaultNaN();
                 }
@@ -220,7 +220,7 @@ namespace ChocolArm64.Instruction
 
                 if (type == FPType.SNaN)
                 {
-                    FPProcessException(FPExc.InvalidOp, state);
+                    FPProcessException(AFpExc.InvalidOp, state);
                 }
             }
             else if (type == FPType.Infinity)
@@ -281,7 +281,7 @@ namespace ChocolArm64.Instruction
                     real = Math.Pow(2d, -14) * ((double)frac16 * Math.Pow(2d, -10));
                 }
             }
-            else if (exp16 == 0x1Fu && !state.GetFpcrFlag(Fpcr.Ahp))
+            else if (exp16 == 0x1Fu && !state.GetFpcrFlag(AFpcr.Ahp))
             {
                 if (frac16 == 0u)
                 {
@@ -338,9 +338,9 @@ namespace ChocolArm64.Instruction
                 exponent++;
             }
 
-            if (state.GetFpcrFlag(Fpcr.Fz) && exponent < minimumExp)
+            if (state.GetFpcrFlag(AFpcr.Fz) && exponent < minimumExp)
             {
-                state.SetFpsrFlag(Fpsr.Ufc);
+                state.SetFpsrFlag(AFpsr.Ufc);
 
                 return FPZero(sign);
             }
@@ -355,9 +355,9 @@ namespace ChocolArm64.Instruction
             uint intMant = (uint)Math.Floor(mantissa * Math.Pow(2d, f));
             double error = mantissa * Math.Pow(2d, f) - (double)intMant;
 
-            if (biasedExp == 0u && (error != 0d || state.GetFpcrFlag(Fpcr.Ufe)))
+            if (biasedExp == 0u && (error != 0d || state.GetFpcrFlag(AFpcr.Ufe)))
             {
-                FPProcessException(FPExc.Underflow, state);
+                FPProcessException(AFpExc.Underflow, state);
             }
 
             bool overflowToInf;
@@ -409,7 +409,7 @@ namespace ChocolArm64.Instruction
             {
                 result = overflowToInf ? FPInfinity(sign) : FPMaxNormal(sign);
 
-                FPProcessException(FPExc.Overflow, state);
+                FPProcessException(AFpExc.Overflow, state);
 
                 error = 1d;
             }
@@ -421,7 +421,7 @@ namespace ChocolArm64.Instruction
 
             if (error != 0d)
             {
-                FPProcessException(FPExc.Inexact, state);
+                FPProcessException(AFpExc.Inexact, state);
             }
 
             return result;
@@ -433,7 +433,7 @@ namespace ChocolArm64.Instruction
                 (int)(((uint)valueBits & 0x8000u) << 16 | 0x7FC00000u | ((uint)valueBits & 0x01FFu) << 13));
         }
 
-        private static void FPProcessException(FPExc exc, AThreadState state)
+        private static void FPProcessException(AFpExc exc, AThreadState state)
         {
             int enable = (int)exc + 8;
 
@@ -456,7 +456,7 @@ namespace ChocolArm64.Instruction
 
             double real = value.FPUnpackCv(out FPType type, out bool sign, state, out uint valueBits);
 
-            bool altHp = state.GetFpcrFlag(Fpcr.Ahp);
+            bool altHp = state.GetFpcrFlag(AFpcr.Ahp);
 
             ushort resultBits;
 
@@ -466,7 +466,7 @@ namespace ChocolArm64.Instruction
                 {
                     resultBits = FPZero(sign);
                 }
-                else if (state.GetFpcrFlag(Fpcr.Dn))
+                else if (state.GetFpcrFlag(AFpcr.Dn))
                 {
                     resultBits = FPDefaultNaN();
                 }
@@ -477,7 +477,7 @@ namespace ChocolArm64.Instruction
 
                 if (type == FPType.SNaN || altHp)
                 {
-                    FPProcessException(FPExc.InvalidOp, state);
+                    FPProcessException(AFpExc.InvalidOp, state);
                 }
             }
             else if (type == FPType.Infinity)
@@ -486,7 +486,7 @@ namespace ChocolArm64.Instruction
                 {
                     resultBits = (ushort)((sign ? 1u : 0u) << 15 | 0x7FFFu);
 
-                    FPProcessException(FPExc.InvalidOp, state);
+                    FPProcessException(AFpExc.InvalidOp, state);
                 }
                 else
                 {
@@ -538,12 +538,12 @@ namespace ChocolArm64.Instruction
 
             if (exp32 == 0u)
             {
-                if (frac32 == 0u || state.GetFpcrFlag(Fpcr.Fz))
+                if (frac32 == 0u || state.GetFpcrFlag(AFpcr.Fz))
                 {
                     type = FPType.Zero;
                     real = 0d;
 
-                    if (frac32 != 0u) FPProcessException(FPExc.InputDenorm, state);
+                    if (frac32 != 0u) FPProcessException(AFpExc.InputDenorm, state);
                 }
                 else
                 {
@@ -618,9 +618,9 @@ namespace ChocolArm64.Instruction
             uint intMant = (uint)Math.Floor(mantissa * Math.Pow(2d, f));
             double error = mantissa * Math.Pow(2d, f) - (double)intMant;
 
-            if (biasedExp == 0u && (error != 0d || state.GetFpcrFlag(Fpcr.Ufe)))
+            if (biasedExp == 0u && (error != 0d || state.GetFpcrFlag(AFpcr.Ufe)))
             {
-                FPProcessException(FPExc.Underflow, state);
+                FPProcessException(AFpExc.Underflow, state);
             }
 
             bool overflowToInf;
@@ -668,13 +668,13 @@ namespace ChocolArm64.Instruction
 
             ushort resultBits;
 
-            if (!state.GetFpcrFlag(Fpcr.Ahp))
+            if (!state.GetFpcrFlag(AFpcr.Ahp))
             {
                 if (biasedExp >= (uint)Math.Pow(2d, e) - 1u)
                 {
                     resultBits = overflowToInf ? FPInfinity(sign) : FPMaxNormal(sign);
 
-                    FPProcessException(FPExc.Overflow, state);
+                    FPProcessException(AFpExc.Overflow, state);
 
                     error = 1d;
                 }
@@ -689,7 +689,7 @@ namespace ChocolArm64.Instruction
                 {
                     resultBits = (ushort)((sign ? 1u : 0u) << 15 | 0x7FFFu);
 
-                    FPProcessException(FPExc.InvalidOp, state);
+                    FPProcessException(AFpExc.InvalidOp, state);
 
                     error = 0d;
                 }
@@ -701,7 +701,7 @@ namespace ChocolArm64.Instruction
 
             if (error != 0d)
             {
-                FPProcessException(FPExc.Inexact, state);
+                FPProcessException(AFpExc.Inexact, state);
             }
 
             return resultBits;
@@ -712,7 +712,7 @@ namespace ChocolArm64.Instruction
             return (ushort)((valueBits & 0x80000000u) >> 16 | 0x7E00u | (valueBits & 0x003FE000u) >> 13);
         }
 
-        private static void FPProcessException(FPExc exc, AThreadState state)
+        private static void FPProcessException(AFpExc exc, AThreadState state)
         {
             int enable = (int)exc + 8;
 
@@ -747,7 +747,7 @@ namespace ChocolArm64.Instruction
                 {
                     result = FPDefaultNaN();
 
-                    FPProcessException(FPExc.InvalidOp, state);
+                    FPProcessException(AFpExc.InvalidOp, state);
                 }
                 else if ((inf1 && !sign1) || (inf2 && !sign2))
                 {
@@ -788,13 +788,13 @@ namespace ChocolArm64.Instruction
                 {
                     result = FPDefaultNaN();
 
-                    FPProcessException(FPExc.InvalidOp, state);
+                    FPProcessException(AFpExc.InvalidOp, state);
                 }
                 else if (inf1 || zero2)
                 {
                     result = FPInfinity(sign1 ^ sign2);
 
-                    if (!inf1) FPProcessException(FPExc.DivideByZero, state);
+                    if (!inf1) FPProcessException(AFpExc.DivideByZero, state);
                 }
                 else if (zero1 || inf2)
                 {
@@ -957,7 +957,7 @@ namespace ChocolArm64.Instruction
                 {
                     result = FPDefaultNaN();
 
-                    FPProcessException(FPExc.InvalidOp, state);
+                    FPProcessException(AFpExc.InvalidOp, state);
                 }
                 else if (inf1 || inf2)
                 {
@@ -993,7 +993,7 @@ namespace ChocolArm64.Instruction
             {
                 result = FPDefaultNaN();
 
-                FPProcessException(FPExc.InvalidOp, state);
+                FPProcessException(AFpExc.InvalidOp, state);
             }
 
             if (!done)
@@ -1008,7 +1008,7 @@ namespace ChocolArm64.Instruction
                 {
                     result = FPDefaultNaN();
 
-                    FPProcessException(FPExc.InvalidOp, state);
+                    FPProcessException(AFpExc.InvalidOp, state);
                 }
                 else if ((infA && !signA) || (infP && !signP))
                 {
@@ -1199,7 +1199,7 @@ namespace ChocolArm64.Instruction
             {
                 result = FPDefaultNaN();
 
-                FPProcessException(FPExc.InvalidOp, state);
+                FPProcessException(AFpExc.InvalidOp, state);
             }
             else
             {
@@ -1227,7 +1227,7 @@ namespace ChocolArm64.Instruction
                 {
                     result = FPDefaultNaN();
 
-                    FPProcessException(FPExc.InvalidOp, state);
+                    FPProcessException(AFpExc.InvalidOp, state);
                 }
                 else if ((inf1 && !sign1) || (inf2 && sign2))
                 {
@@ -1400,10 +1400,10 @@ namespace ChocolArm64.Instruction
             {
                 op |= 1u << 22;
 
-                FPProcessException(FPExc.InvalidOp, state);
+                FPProcessException(AFpExc.InvalidOp, state);
             }
 
-            if (state.GetFpcrFlag(Fpcr.Dn))
+            if (state.GetFpcrFlag(AFpcr.Dn))
             {
                 return FPDefaultNaN();
             }
@@ -1411,7 +1411,7 @@ namespace ChocolArm64.Instruction
             return BitConverter.Int32BitsToSingle((int)op);
         }
 
-        private static void FPProcessException(FPExc exc, AThreadState state)
+        private static void FPProcessException(AFpExc exc, AThreadState state)
         {
             int enable = (int)exc + 8;
 
@@ -1446,7 +1446,7 @@ namespace ChocolArm64.Instruction
                 {
                     result = FPDefaultNaN();
 
-                    FPProcessException(FPExc.InvalidOp, state);
+                    FPProcessException(AFpExc.InvalidOp, state);
                 }
                 else if ((inf1 && !sign1) || (inf2 && !sign2))
                 {
@@ -1487,13 +1487,13 @@ namespace ChocolArm64.Instruction
                 {
                     result = FPDefaultNaN();
 
-                    FPProcessException(FPExc.InvalidOp, state);
+                    FPProcessException(AFpExc.InvalidOp, state);
                 }
                 else if (inf1 || zero2)
                 {
                     result = FPInfinity(sign1 ^ sign2);
 
-                    if (!inf1) FPProcessException(FPExc.DivideByZero, state);
+                    if (!inf1) FPProcessException(AFpExc.DivideByZero, state);
                 }
                 else if (zero1 || inf2)
                 {
@@ -1656,7 +1656,7 @@ namespace ChocolArm64.Instruction
                 {
                     result = FPDefaultNaN();
 
-                    FPProcessException(FPExc.InvalidOp, state);
+                    FPProcessException(AFpExc.InvalidOp, state);
                 }
                 else if (inf1 || inf2)
                 {
@@ -1692,7 +1692,7 @@ namespace ChocolArm64.Instruction
             {
                 result = FPDefaultNaN();
 
-                FPProcessException(FPExc.InvalidOp, state);
+                FPProcessException(AFpExc.InvalidOp, state);
             }
 
             if (!done)
@@ -1707,7 +1707,7 @@ namespace ChocolArm64.Instruction
                 {
                     result = FPDefaultNaN();
 
-                    FPProcessException(FPExc.InvalidOp, state);
+                    FPProcessException(AFpExc.InvalidOp, state);
                 }
                 else if ((infA && !signA) || (infP && !signP))
                 {
@@ -1898,7 +1898,7 @@ namespace ChocolArm64.Instruction
             {
                 result = FPDefaultNaN();
 
-                FPProcessException(FPExc.InvalidOp, state);
+                FPProcessException(AFpExc.InvalidOp, state);
             }
             else
             {
@@ -1926,7 +1926,7 @@ namespace ChocolArm64.Instruction
                 {
                     result = FPDefaultNaN();
 
-                    FPProcessException(FPExc.InvalidOp, state);
+                    FPProcessException(AFpExc.InvalidOp, state);
                 }
                 else if ((inf1 && !sign1) || (inf2 && sign2))
                 {
@@ -2099,10 +2099,10 @@ namespace ChocolArm64.Instruction
             {
                 op |= 1ul << 51;
 
-                FPProcessException(FPExc.InvalidOp, state);
+                FPProcessException(AFpExc.InvalidOp, state);
             }
 
-            if (state.GetFpcrFlag(Fpcr.Dn))
+            if (state.GetFpcrFlag(AFpcr.Dn))
             {
                 return FPDefaultNaN();
             }
@@ -2110,7 +2110,7 @@ namespace ChocolArm64.Instruction
             return BitConverter.Int64BitsToDouble((long)op);
         }
 
-        private static void FPProcessException(FPExc exc, AThreadState state)
+        private static void FPProcessException(AFpExc exc, AThreadState state)
         {
             int enable = (int)exc + 8;
 
diff --git a/ChocolArm64/State/FPExc.cs b/ChocolArm64/State/AFpExc.cs
similarity index 92%
rename from ChocolArm64/State/FPExc.cs
rename to ChocolArm64/State/AFpExc.cs
index a665957d6d..04c11045dd 100644
--- a/ChocolArm64/State/FPExc.cs
+++ b/ChocolArm64/State/AFpExc.cs
@@ -1,6 +1,6 @@
 namespace ChocolArm64.State
 {
-    enum FPExc
+    enum AFpExc
     {
         InvalidOp    = 0,
         DivideByZero = 1,
diff --git a/ChocolArm64/State/FPType.cs b/ChocolArm64/State/AFpType.cs
similarity index 87%
rename from ChocolArm64/State/FPType.cs
rename to ChocolArm64/State/AFpType.cs
index b00f5fee0d..1e353e485f 100644
--- a/ChocolArm64/State/FPType.cs
+++ b/ChocolArm64/State/AFpType.cs
@@ -1,6 +1,6 @@
 namespace ChocolArm64.State
 {
-    enum FPType
+    enum AFpType
     {
         Nonzero,
         Zero,
diff --git a/ChocolArm64/State/FPCR.cs b/ChocolArm64/State/AFpcr.cs
similarity index 90%
rename from ChocolArm64/State/FPCR.cs
rename to ChocolArm64/State/AFpcr.cs
index 908faee5f4..d794622b0d 100644
--- a/ChocolArm64/State/FPCR.cs
+++ b/ChocolArm64/State/AFpcr.cs
@@ -1,6 +1,6 @@
 namespace ChocolArm64.State
 {
-    enum Fpcr
+    enum AFpcr
     {
         Ufe   = 11,
         RMode = 22,
diff --git a/ChocolArm64/State/FPSR.cs b/ChocolArm64/State/AFpsr.cs
similarity index 83%
rename from ChocolArm64/State/FPSR.cs
rename to ChocolArm64/State/AFpsr.cs
index ba551eefaa..a546a62033 100644
--- a/ChocolArm64/State/FPSR.cs
+++ b/ChocolArm64/State/AFpsr.cs
@@ -1,6 +1,6 @@
 namespace ChocolArm64.State
 {
-    enum Fpsr
+    enum AFpsr
     {
         Ufc = 3,
         Qc  = 27
diff --git a/ChocolArm64/State/AThreadState.cs b/ChocolArm64/State/AThreadState.cs
index e220fba7f0..644317988e 100644
--- a/ChocolArm64/State/AThreadState.cs
+++ b/ChocolArm64/State/AThreadState.cs
@@ -146,19 +146,19 @@ namespace ChocolArm64.State
             Undefined?.Invoke(this, new AInstUndefinedEventArgs(position, rawOpCode));
         }
 
-        internal bool GetFpcrFlag(Fpcr flag)
+        internal bool GetFpcrFlag(AFpcr flag)
         {
             return (Fpcr & (1 << (int)flag)) != 0;
         }
 
-        internal void SetFpsrFlag(Fpsr flag)
+        internal void SetFpsrFlag(AFpsr flag)
         {
             Fpsr |= 1 << (int)flag;
         }
 
         internal ARoundMode FPRoundingMode()
         {
-            return (ARoundMode)((Fpcr >> (int)State.Fpcr.RMode) & 3);
+            return (ARoundMode)((Fpcr >> (int)State.AFpcr.RMode) & 3);
         }
     }
 }