ChocolArm64: Handle infinities and zeros in Frecps
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05e4a6ec0a
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905c9bc96c
4 changed files with 67 additions and 48 deletions
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@ -657,55 +657,18 @@ namespace ChocolArm64.Instruction
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public static void Frecps_S(AILEmitterCtx Context)
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{
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EmitFrecps(Context, 0, Scalar: true);
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EmitScalarBinaryOpF(Context, () =>
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{
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EmitBinarySoftFloatCall(Context, nameof(ASoftFloat.RecipStep));
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});
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}
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public static void Frecps_V(AILEmitterCtx Context)
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{
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AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
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int SizeF = Op.Size & 1;
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int Bytes = Context.CurrOp.GetBitsCount() >> 3;
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for (int Index = 0; Index < Bytes >> SizeF + 2; Index++)
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EmitVectorBinaryOpF(Context, () =>
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{
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EmitFrecps(Context, Index, Scalar: false);
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}
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if (Op.RegisterSize == ARegisterSize.SIMD64)
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{
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EmitVectorZeroUpper(Context, Op.Rd);
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}
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}
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private static void EmitFrecps(AILEmitterCtx Context, int Index, bool Scalar)
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{
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AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
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int SizeF = Op.Size & 1;
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if (SizeF == 0)
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{
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Context.EmitLdc_R4(2);
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}
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else /* if (SizeF == 1) */
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{
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Context.EmitLdc_R8(2);
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}
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EmitVectorExtractF(Context, Op.Rn, Index, SizeF);
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EmitVectorExtractF(Context, Op.Rm, Index, SizeF);
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Context.Emit(OpCodes.Mul);
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Context.Emit(OpCodes.Sub);
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if (Scalar)
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{
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EmitVectorZeroAll(Context, Op.Rd);
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}
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EmitVectorInsertF(Context, Op.Rd, Index, SizeF);
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EmitBinarySoftFloatCall(Context, nameof(ASoftFloat.RecipStep));
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});
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}
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public static void Frinta_S(AILEmitterCtx Context)
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@ -253,6 +253,26 @@ namespace ChocolArm64.Instruction
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Context.EmitCall(MthdInfo);
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}
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public static void EmitBinarySoftFloatCall(AILEmitterCtx Context, string Name)
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{
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IAOpCodeSimd Op = (IAOpCodeSimd)Context.CurrOp;
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int SizeF = Op.Size & 1;
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MethodInfo MthdInfo;
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if (SizeF == 0)
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{
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MthdInfo = typeof(ASoftFloat).GetMethod(Name, new Type[] { typeof(float), typeof(float) });
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}
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else /* if (SizeF == 1) */
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{
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MthdInfo = typeof(ASoftFloat).GetMethod(Name, new Type[] { typeof(double), typeof(double) });
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}
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Context.EmitCall(MthdInfo);
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}
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public static void EmitScalarBinaryOpByElemF(AILEmitterCtx Context, Action Emit)
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{
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AOpCodeSimdRegElemF Op = (AOpCodeSimdRegElemF)Context.CurrOp;
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@ -184,5 +184,40 @@ namespace ChocolArm64.Instruction
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ulong result = x_sign | (result_exp << 52) | fraction;
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return BitConverter.Int64BitsToDouble((long)result);
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}
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public static float RecipStep(float op1, float op2)
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{
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return (float)RecipStep((double)op1, (double)op2);
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}
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public static double RecipStep(double op1, double op2)
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{
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op1 = -op1;
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ulong op1_bits = (ulong)BitConverter.DoubleToInt64Bits(op1);
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ulong op2_bits = (ulong)BitConverter.DoubleToInt64Bits(op2);
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ulong op1_sign = op1_bits & 0x8000000000000000;
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ulong op2_sign = op2_bits & 0x8000000000000000;
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ulong op1_other = op1_bits & 0x7FFFFFFFFFFFFFFF;
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ulong op2_other = op2_bits & 0x7FFFFFFFFFFFFFFF;
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bool inf1 = op1_other == 0x7ff0000000000000;
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bool inf2 = op2_other == 0x7ff0000000000000;
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bool zero1 = op1_other == 0;
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bool zero2 = op2_other == 0;
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if ((inf1 && zero2) || (zero1 && inf2))
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{
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return 2.0;
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}
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else if (inf1 || inf2)
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{
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// Infinity
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return BitConverter.Int64BitsToDouble((long)(0x7ff0000000000000 | (op1_sign ^ op2_sign)));
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}
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return 2.0 + op1 * op2;
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}
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}
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}
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@ -194,12 +194,13 @@ namespace Ryujinx.Tests.Cpu
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V2: Sse.SetAllVector128(A),
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V0: Sse.SetAllVector128(B));
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float Result = (float)(2 - ((double)A * (double)B));
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Assert.Multiple(() =>
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{
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Assert.That(Sse41.Extract(ThreadState.V4, (byte)0), Is.EqualTo(2 - (A * B)));
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Assert.That(Sse41.Extract(ThreadState.V4, (byte)1), Is.EqualTo(2 - (A * B)));
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Assert.That(Sse41.Extract(ThreadState.V4, (byte)2), Is.EqualTo(2 - (A * B)));
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Assert.That(Sse41.Extract(ThreadState.V4, (byte)3), Is.EqualTo(2 - (A * B)));
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Assert.That(Sse41.Extract(ThreadState.V4, (byte)0), Is.EqualTo(Result));
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Assert.That(Sse41.Extract(ThreadState.V4, (byte)1), Is.EqualTo(Result));
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Assert.That(Sse41.Extract(ThreadState.V4, (byte)2), Is.EqualTo(Result));
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Assert.That(Sse41.Extract(ThreadState.V4, (byte)3), Is.EqualTo(Result));
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});
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}
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