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Add SCVTF (fixed-point GP to Scalar) instruction

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This commit is contained in:
gdkchan 2019-02-18 01:03:19 -03:00
commit 98be55e58d
2 changed files with 53 additions and 33 deletions
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84
ChocolArm64/Instructions/InstEmitSimdCvt.cs
View file

@ -244,7 +244,7 @@ namespace ChocolArm64.Instructions
public static void Fcvtzs_Gp_Fixed(ILEmitterCtx context) public static void Fcvtzs_Gp_Fixed(ILEmitterCtx context)
{ {
EmitFcvtzs_Gp_Fix(context); EmitFcvtzs_Gp_Fixed(context);
} }
public static void Fcvtzs_S(ILEmitterCtx context) public static void Fcvtzs_S(ILEmitterCtx context)
@ -264,7 +264,7 @@ namespace ChocolArm64.Instructions
public static void Fcvtzu_Gp_Fixed(ILEmitterCtx context) public static void Fcvtzu_Gp_Fixed(ILEmitterCtx context)
{ {
EmitFcvtzu_Gp_Fix(context); EmitFcvtzu_Gp_Fixed(context);
} }
public static void Fcvtzu_S(ILEmitterCtx context) public static void Fcvtzu_S(ILEmitterCtx context)
@ -293,6 +293,24 @@ namespace ChocolArm64.Instructions
EmitScalarSetF(context, op.Rd, op.Size); EmitScalarSetF(context, op.Rd, op.Size);
} }
public static void Scvtf_Gp_Fixed(ILEmitterCtx context)
{
OpCodeSimdCvt64 op = (OpCodeSimdCvt64)context.CurrOp;
context.EmitLdintzr(op.Rn);
if (context.CurrOp.RegisterSize == RegisterSize.Int32)
{
context.Emit(OpCodes.Conv_I4);
}
EmitFloatCast(context, op.Size);
EmitI2fFBitsMul(context, op.Size, op.FBits);
EmitScalarSetF(context, op.Rd, op.Size);
}
public static void Scvtf_S(ILEmitterCtx context) public static void Scvtf_S(ILEmitterCtx context)
{ {
OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp; OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
@ -387,32 +405,6 @@ namespace ChocolArm64.Instructions
EmitVectorCvtf(context, signed: false); EmitVectorCvtf(context, signed: false);
} }
private static int GetFBits(ILEmitterCtx context)
{
if (context.CurrOp is OpCodeSimdShImm64 op)
{
return GetImmShr(op);
}
return 0;
}
private static void EmitFloatCast(ILEmitterCtx context, int size)
{
if (size == 0)
{
context.Emit(OpCodes.Conv_R4);
}
else if (size == 1)
{
context.Emit(OpCodes.Conv_R8);
}
else
{
throw new ArgumentOutOfRangeException(nameof(size));
}
}
private static void EmitFcvtn(ILEmitterCtx context, bool signed, bool scalar) private static void EmitFcvtn(ILEmitterCtx context, bool signed, bool scalar)
{ {
OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp; OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
@ -496,17 +488,17 @@ namespace ChocolArm64.Instructions
context.EmitStintzr(op.Rd); context.EmitStintzr(op.Rd);
} }
private static void EmitFcvtzs_Gp_Fix(ILEmitterCtx context) private static void EmitFcvtzs_Gp_Fixed(ILEmitterCtx context)
{ {
EmitFcvtz__Gp_Fix(context, true); EmitFcvtz__Gp_Fixed(context, true);
} }
private static void EmitFcvtzu_Gp_Fix(ILEmitterCtx context) private static void EmitFcvtzu_Gp_Fixed(ILEmitterCtx context)
{ {
EmitFcvtz__Gp_Fix(context, false); EmitFcvtz__Gp_Fixed(context, false);
} }
private static void EmitFcvtz__Gp_Fix(ILEmitterCtx context, bool signed) private static void EmitFcvtz__Gp_Fixed(ILEmitterCtx context, bool signed)
{ {
OpCodeSimdCvt64 op = (OpCodeSimdCvt64)context.CurrOp; OpCodeSimdCvt64 op = (OpCodeSimdCvt64)context.CurrOp;
@ -662,6 +654,32 @@ namespace ChocolArm64.Instructions
} }
} }
private static int GetFBits(ILEmitterCtx context)
{
if (context.CurrOp is OpCodeSimdShImm64 op)
{
return GetImmShr(op);
}
return 0;
}
private static void EmitFloatCast(ILEmitterCtx context, int size)
{
if (size == 0)
{
context.Emit(OpCodes.Conv_R4);
}
else if (size == 1)
{
context.Emit(OpCodes.Conv_R8);
}
else
{
throw new ArgumentOutOfRangeException(nameof(size));
}
}
private static void EmitScalarFcvts(ILEmitterCtx context, int size, int fBits) private static void EmitScalarFcvts(ILEmitterCtx context, int size, int fBits)
{ {
if (size < 0 || size > 1) if (size < 0 || size > 1)

2
ChocolArm64/OpCodeTable.cs
View file

@ -436,6 +436,8 @@ namespace ChocolArm64
SetA64("0x001110<<100000001010xxxxxxxxxx", InstEmit.Saddlp_V, typeof(OpCodeSimd64)); SetA64("0x001110<<100000001010xxxxxxxxxx", InstEmit.Saddlp_V, typeof(OpCodeSimd64));
SetA64("0x001110<<1xxxxx000100xxxxxxxxxx", InstEmit.Saddw_V, typeof(OpCodeSimdReg64)); SetA64("0x001110<<1xxxxx000100xxxxxxxxxx", InstEmit.Saddw_V, typeof(OpCodeSimdReg64));
SetA64("x00111100x100010000000xxxxxxxxxx", InstEmit.Scvtf_Gp, typeof(OpCodeSimdCvt64)); SetA64("x00111100x100010000000xxxxxxxxxx", InstEmit.Scvtf_Gp, typeof(OpCodeSimdCvt64));
SetA64("000111100x0000101xxxxxxxxxxxxxxx", InstEmit.Scvtf_Gp_Fixed, typeof(OpCodeSimdCvt64));
SetA64("100111100x000010xxxxxxxxxxxxxxxx", InstEmit.Scvtf_Gp_Fixed, typeof(OpCodeSimdCvt64));
SetA64("010111100x100001110110xxxxxxxxxx", InstEmit.Scvtf_S, typeof(OpCodeSimd64)); SetA64("010111100x100001110110xxxxxxxxxx", InstEmit.Scvtf_S, typeof(OpCodeSimd64));
SetA64("0>0011100<100001110110xxxxxxxxxx", InstEmit.Scvtf_V, typeof(OpCodeSimd64)); SetA64("0>0011100<100001110110xxxxxxxxxx", InstEmit.Scvtf_V, typeof(OpCodeSimd64));
SetA64("01011110000xxxxx000000xxxxxxxxxx", InstEmit.Sha1c_V, typeof(OpCodeSimdReg64)); SetA64("01011110000xxxxx000000xxxxxxxxxx", InstEmit.Sha1c_V, typeof(OpCodeSimdReg64));