From 9f55d3b77c1fca269a688bf920e5a55500f667ca Mon Sep 17 00:00:00 2001 From: gdkchan Date: Fri, 25 Jan 2019 22:59:11 -0200 Subject: [PATCH] Rename some opcode classes and flag masks for consistency --- ChocolArm64/Decoders/Decoder.cs | 12 +++--- .../{IOpCodeAlu32.cs => IOpCode32Alu.cs} | 2 +- ChocolArm64/Decoders/IOpCode32BImm.cs | 4 ++ .../{IOpCodeBReg32.cs => IOpCode32BReg.cs} | 2 +- .../{IOpCodeMem32.cs => IOpCode32Mem.cs} | 2 +- ...OpCodeMemMult32.cs => IOpCode32MemMult.cs} | 2 +- ChocolArm64/Decoders/IOpCodeBImm32.cs | 4 -- .../{OpCodeAlu32.cs => OpCode32Alu.cs} | 4 +- .../{OpCodeAluImm32.cs => OpCode32AluImm.cs} | 4 +- ...pCodeAluRsImm32.cs => OpCode32AluRsImm.cs} | 4 +- .../{OpCodeBImm32.cs => OpCode32BImm.cs} | 4 +- .../{OpCodeBReg32.cs => OpCode32BReg.cs} | 4 +- .../{OpCodeMem32.cs => OpCode32Mem.cs} | 4 +- .../{OpCodeMemImm32.cs => OpCode32MemImm.cs} | 4 +- ChocolArm64/Decoders/OpCode32MemImm8.cs | 2 +- ...{OpCodeMemMult32.cs => OpCode32MemMult.cs} | 4 +- ...pCodeAluImm8T16.cs => OpCodeT16AluImm8.cs} | 4 +- .../{OpCodeBRegT16.cs => OpCodeT16BReg.cs} | 4 +- ChocolArm64/Instructions/InstEmitAlu32.cs | 10 ++--- ChocolArm64/Instructions/InstEmitAluHelper.cs | 12 +++--- ChocolArm64/Instructions/InstEmitFlow32.cs | 6 +-- ChocolArm64/Instructions/InstEmitMemory32.cs | 6 +-- ChocolArm64/OpCodeTable.cs | 40 +++++++++---------- ChocolArm64/State/CpuThreadState.cs | 10 ++--- ChocolArm64/State/PState.cs | 17 +++----- 25 files changed, 82 insertions(+), 89 deletions(-) rename ChocolArm64/Decoders/{IOpCodeAlu32.cs => IOpCode32Alu.cs} (76%) create mode 100644 ChocolArm64/Decoders/IOpCode32BImm.cs rename ChocolArm64/Decoders/{IOpCodeBReg32.cs => IOpCode32BReg.cs} (63%) rename ChocolArm64/Decoders/{IOpCodeMem32.cs => IOpCode32Mem.cs} (75%) rename ChocolArm64/Decoders/{IOpCodeMemMult32.cs => IOpCode32MemMult.cs} (76%) delete mode 100644 ChocolArm64/Decoders/IOpCodeBImm32.cs rename ChocolArm64/Decoders/{OpCodeAlu32.cs => OpCode32Alu.cs} (78%) rename ChocolArm64/Decoders/{OpCodeAluImm32.cs => OpCode32AluImm.cs} (80%) rename ChocolArm64/Decoders/{OpCodeAluRsImm32.cs => OpCode32AluRsImm.cs} (80%) rename ChocolArm64/Decoders/{OpCodeBImm32.cs => OpCode32BImm.cs} (83%) rename ChocolArm64/Decoders/{OpCodeBReg32.cs => OpCode32BReg.cs} (64%) rename ChocolArm64/Decoders/{OpCodeMem32.cs => OpCode32Mem.cs} (88%) rename ChocolArm64/Decoders/{OpCodeMemImm32.cs => OpCode32MemImm.cs} (61%) rename ChocolArm64/Decoders/{OpCodeMemMult32.cs => OpCode32MemMult.cs} (90%) rename ChocolArm64/Decoders/{OpCodeAluImm8T16.cs => OpCodeT16AluImm8.cs} (77%) rename ChocolArm64/Decoders/{OpCodeBRegT16.cs => OpCodeT16BReg.cs} (65%) diff --git a/ChocolArm64/Decoders/Decoder.cs b/ChocolArm64/Decoders/Decoder.cs index 1c41020b13..bc9358f32a 100644 --- a/ChocolArm64/Decoders/Decoder.cs +++ b/ChocolArm64/Decoders/Decoder.cs @@ -168,7 +168,7 @@ namespace ChocolArm64.Decoders { //Note: On ARM32, most ALU operations can write to R15 (PC), //so we must consider such operations as a branch in potential aswell. - if (opCode is IOpCodeAlu32 opAlu && opAlu.Rd == RegisterAlias.Aarch32Pc) + if (opCode is IOpCode32Alu opAlu && opAlu.Rd == RegisterAlias.Aarch32Pc) { return true; } @@ -177,19 +177,19 @@ namespace ChocolArm64.Decoders //register (Rt == 15 or (mask & (1 << 15)) != 0), and cases where there is //a write back to PC (wback == true && Rn == 15), however the later may //be "undefined" depending on the CPU, so compilers should not produce that. - if (opCode is IOpCodeMem32 || opCode is IOpCodeMemMult32) + if (opCode is IOpCode32Mem || opCode is IOpCode32MemMult) { int rt, rn; bool wBack; - if (opCode is IOpCodeMem32 opMem) + if (opCode is IOpCode32Mem opMem) { rt = opMem.Rt; rn = opMem.Rn; wBack = opMem.WBack; } - else if (opCode is IOpCodeMemMult32 opMemMult) + else if (opCode is IOpCode32MemMult opMemMult) { const int pcMask = 1 << RegisterAlias.Aarch32Pc; @@ -210,8 +210,8 @@ namespace ChocolArm64.Decoders } //Explicit branch instructions. - return opCode is IOpCodeBImm32 || - opCode is IOpCodeBReg32; + return opCode is IOpCode32BImm || + opCode is IOpCode32BReg; } private static bool IsException(OpCode64 opCode) diff --git a/ChocolArm64/Decoders/IOpCodeAlu32.cs b/ChocolArm64/Decoders/IOpCode32Alu.cs similarity index 76% rename from ChocolArm64/Decoders/IOpCodeAlu32.cs rename to ChocolArm64/Decoders/IOpCode32Alu.cs index 9a46488653..d6f6d82a4f 100644 --- a/ChocolArm64/Decoders/IOpCodeAlu32.cs +++ b/ChocolArm64/Decoders/IOpCode32Alu.cs @@ -1,6 +1,6 @@ namespace ChocolArm64.Decoders { - interface IOpCodeAlu32 : IOpCode32 + interface IOpCode32Alu : IOpCode32 { int Rd { get; } int Rn { get; } diff --git a/ChocolArm64/Decoders/IOpCode32BImm.cs b/ChocolArm64/Decoders/IOpCode32BImm.cs new file mode 100644 index 0000000000..b69c1e369f --- /dev/null +++ b/ChocolArm64/Decoders/IOpCode32BImm.cs @@ -0,0 +1,4 @@ +namespace ChocolArm64.Decoders +{ + interface IOpCode32BImm : IOpCode32, IOpCodeBImm { } +} \ No newline at end of file diff --git a/ChocolArm64/Decoders/IOpCodeBReg32.cs b/ChocolArm64/Decoders/IOpCode32BReg.cs similarity index 63% rename from ChocolArm64/Decoders/IOpCodeBReg32.cs rename to ChocolArm64/Decoders/IOpCode32BReg.cs index fb9d94eafe..a498b02d7c 100644 --- a/ChocolArm64/Decoders/IOpCodeBReg32.cs +++ b/ChocolArm64/Decoders/IOpCode32BReg.cs @@ -1,6 +1,6 @@ namespace ChocolArm64.Decoders { - interface IOpCodeBReg32 : IOpCode32 + interface IOpCode32BReg : IOpCode32 { int Rm { get; } } diff --git a/ChocolArm64/Decoders/IOpCodeMem32.cs b/ChocolArm64/Decoders/IOpCode32Mem.cs similarity index 75% rename from ChocolArm64/Decoders/IOpCodeMem32.cs rename to ChocolArm64/Decoders/IOpCode32Mem.cs index 4db67535f7..7822178d6d 100644 --- a/ChocolArm64/Decoders/IOpCodeMem32.cs +++ b/ChocolArm64/Decoders/IOpCode32Mem.cs @@ -1,6 +1,6 @@ namespace ChocolArm64.Decoders { - interface IOpCodeMem32 : IOpCode32 + interface IOpCode32Mem : IOpCode32 { int Rt { get; } int Rn { get; } diff --git a/ChocolArm64/Decoders/IOpCodeMemMult32.cs b/ChocolArm64/Decoders/IOpCode32MemMult.cs similarity index 76% rename from ChocolArm64/Decoders/IOpCodeMemMult32.cs rename to ChocolArm64/Decoders/IOpCode32MemMult.cs index d4fffd55df..76b38efee8 100644 --- a/ChocolArm64/Decoders/IOpCodeMemMult32.cs +++ b/ChocolArm64/Decoders/IOpCode32MemMult.cs @@ -1,6 +1,6 @@ namespace ChocolArm64.Decoders { - interface IOpCodeMemMult32 : IOpCode32 + interface IOpCode32MemMult : IOpCode32 { int Rn { get; } diff --git a/ChocolArm64/Decoders/IOpCodeBImm32.cs b/ChocolArm64/Decoders/IOpCodeBImm32.cs deleted file mode 100644 index cc8248f27b..0000000000 --- a/ChocolArm64/Decoders/IOpCodeBImm32.cs +++ /dev/null @@ -1,4 +0,0 @@ -namespace ChocolArm64.Decoders -{ - interface IOpCodeBImm32 : IOpCode32, IOpCodeBImm { } -} \ No newline at end of file diff --git a/ChocolArm64/Decoders/OpCodeAlu32.cs b/ChocolArm64/Decoders/OpCode32Alu.cs similarity index 78% rename from ChocolArm64/Decoders/OpCodeAlu32.cs rename to ChocolArm64/Decoders/OpCode32Alu.cs index 9612d9c29d..0cf066966b 100644 --- a/ChocolArm64/Decoders/OpCodeAlu32.cs +++ b/ChocolArm64/Decoders/OpCode32Alu.cs @@ -2,14 +2,14 @@ using ChocolArm64.Instructions; namespace ChocolArm64.Decoders { - class OpCodeAlu32 : OpCode32, IOpCodeAlu32 + class OpCode32Alu : OpCode32, IOpCode32Alu { public int Rd { get; private set; } public int Rn { get; private set; } public bool SetFlags { get; private set; } - public OpCodeAlu32(Inst inst, long position, int opCode) : base(inst, position, opCode) + public OpCode32Alu(Inst inst, long position, int opCode) : base(inst, position, opCode) { Rd = (opCode >> 12) & 0xf; Rn = (opCode >> 16) & 0xf; diff --git a/ChocolArm64/Decoders/OpCodeAluImm32.cs b/ChocolArm64/Decoders/OpCode32AluImm.cs similarity index 80% rename from ChocolArm64/Decoders/OpCodeAluImm32.cs rename to ChocolArm64/Decoders/OpCode32AluImm.cs index 22436709c6..4302f117e4 100644 --- a/ChocolArm64/Decoders/OpCodeAluImm32.cs +++ b/ChocolArm64/Decoders/OpCode32AluImm.cs @@ -2,13 +2,13 @@ using ChocolArm64.Instructions; namespace ChocolArm64.Decoders { - class OpCodeAluImm32 : OpCodeAlu32 + class OpCode32AluImm : OpCode32Alu { public int Imm { get; private set; } public bool IsRotated { get; private set; } - public OpCodeAluImm32(Inst inst, long position, int opCode) : base(inst, position, opCode) + public OpCode32AluImm(Inst inst, long position, int opCode) : base(inst, position, opCode) { int value = (opCode >> 0) & 0xff; int shift = (opCode >> 8) & 0xf; diff --git a/ChocolArm64/Decoders/OpCodeAluRsImm32.cs b/ChocolArm64/Decoders/OpCode32AluRsImm.cs similarity index 80% rename from ChocolArm64/Decoders/OpCodeAluRsImm32.cs rename to ChocolArm64/Decoders/OpCode32AluRsImm.cs index 7b86044860..f23916be55 100644 --- a/ChocolArm64/Decoders/OpCodeAluRsImm32.cs +++ b/ChocolArm64/Decoders/OpCode32AluRsImm.cs @@ -2,14 +2,14 @@ using ChocolArm64.Instructions; namespace ChocolArm64.Decoders { - class OpCodeAluRsImm32 : OpCodeAlu32 + class OpCode32AluRsImm : OpCode32Alu { public int Rm { get; private set; } public int Imm { get; private set; } public ShiftType ShiftType { get; private set; } - public OpCodeAluRsImm32(Inst inst, long position, int opCode) : base(inst, position, opCode) + public OpCode32AluRsImm(Inst inst, long position, int opCode) : base(inst, position, opCode) { Rm = (opCode >> 0) & 0xf; Imm = (opCode >> 7) & 0x1f; diff --git a/ChocolArm64/Decoders/OpCodeBImm32.cs b/ChocolArm64/Decoders/OpCode32BImm.cs similarity index 83% rename from ChocolArm64/Decoders/OpCodeBImm32.cs rename to ChocolArm64/Decoders/OpCode32BImm.cs index 127ac17473..43f191eb4d 100644 --- a/ChocolArm64/Decoders/OpCodeBImm32.cs +++ b/ChocolArm64/Decoders/OpCode32BImm.cs @@ -2,11 +2,11 @@ using ChocolArm64.Instructions; namespace ChocolArm64.Decoders { - class OpCodeBImm32 : OpCode32, IOpCodeBImm32 + class OpCode32BImm : OpCode32, IOpCode32BImm { public long Imm { get; private set; } - public OpCodeBImm32(Inst inst, long position, int opCode) : base(inst, position, opCode) + public OpCode32BImm(Inst inst, long position, int opCode) : base(inst, position, opCode) { uint pc = GetPc(); diff --git a/ChocolArm64/Decoders/OpCodeBReg32.cs b/ChocolArm64/Decoders/OpCode32BReg.cs similarity index 64% rename from ChocolArm64/Decoders/OpCodeBReg32.cs rename to ChocolArm64/Decoders/OpCode32BReg.cs index f89b1ae124..4a0fa5376b 100644 --- a/ChocolArm64/Decoders/OpCodeBReg32.cs +++ b/ChocolArm64/Decoders/OpCode32BReg.cs @@ -2,11 +2,11 @@ using ChocolArm64.Instructions; namespace ChocolArm64.Decoders { - class OpCodeBReg32 : OpCode32, IOpCodeBReg32 + class OpCode32BReg : OpCode32, IOpCode32BReg { public int Rm { get; private set; } - public OpCodeBReg32(Inst inst, long position, int opCode) : base(inst, position, opCode) + public OpCode32BReg(Inst inst, long position, int opCode) : base(inst, position, opCode) { Rm = opCode & 0xf; } diff --git a/ChocolArm64/Decoders/OpCodeMem32.cs b/ChocolArm64/Decoders/OpCode32Mem.cs similarity index 88% rename from ChocolArm64/Decoders/OpCodeMem32.cs rename to ChocolArm64/Decoders/OpCode32Mem.cs index 74536c81b4..7fcccbeec0 100644 --- a/ChocolArm64/Decoders/OpCodeMem32.cs +++ b/ChocolArm64/Decoders/OpCode32Mem.cs @@ -2,7 +2,7 @@ using ChocolArm64.Instructions; namespace ChocolArm64.Decoders { - class OpCodeMem32 : OpCode32, IOpCodeMem32 + class OpCode32Mem : OpCode32, IOpCode32Mem { public int Rt { get; private set; } public int Rn { get; private set; } @@ -14,7 +14,7 @@ namespace ChocolArm64.Decoders public bool WBack { get; private set; } public bool Unprivileged { get; private set; } - public OpCodeMem32(Inst inst, long position, int opCode) : base(inst, position, opCode) + public OpCode32Mem(Inst inst, long position, int opCode) : base(inst, position, opCode) { Rt = (opCode >> 12) & 0xf; Rn = (opCode >> 16) & 0xf; diff --git a/ChocolArm64/Decoders/OpCodeMemImm32.cs b/ChocolArm64/Decoders/OpCode32MemImm.cs similarity index 61% rename from ChocolArm64/Decoders/OpCodeMemImm32.cs rename to ChocolArm64/Decoders/OpCode32MemImm.cs index 1703f368d8..ca46e08f87 100644 --- a/ChocolArm64/Decoders/OpCodeMemImm32.cs +++ b/ChocolArm64/Decoders/OpCode32MemImm.cs @@ -2,9 +2,9 @@ using ChocolArm64.Instructions; namespace ChocolArm64.Decoders { - class OpCodeMemImm32 : OpCodeMem32 + class OpCode32MemImm : OpCode32Mem { - public OpCodeMemImm32(Inst inst, long position, int opCode) : base(inst, position, opCode) + public OpCode32MemImm(Inst inst, long position, int opCode) : base(inst, position, opCode) { Imm = opCode & 0xfff; } diff --git a/ChocolArm64/Decoders/OpCode32MemImm8.cs b/ChocolArm64/Decoders/OpCode32MemImm8.cs index 11d08b52fd..02e446e8f1 100644 --- a/ChocolArm64/Decoders/OpCode32MemImm8.cs +++ b/ChocolArm64/Decoders/OpCode32MemImm8.cs @@ -2,7 +2,7 @@ using ChocolArm64.Instructions; namespace ChocolArm64.Decoders { - class OpCode32MemImm8 : OpCodeMem32 + class OpCode32MemImm8 : OpCode32Mem { public OpCode32MemImm8(Inst inst, long position, int opCode) : base(inst, position, opCode) { diff --git a/ChocolArm64/Decoders/OpCodeMemMult32.cs b/ChocolArm64/Decoders/OpCode32MemMult.cs similarity index 90% rename from ChocolArm64/Decoders/OpCodeMemMult32.cs rename to ChocolArm64/Decoders/OpCode32MemMult.cs index fd2a714ed4..bc00048cad 100644 --- a/ChocolArm64/Decoders/OpCodeMemMult32.cs +++ b/ChocolArm64/Decoders/OpCode32MemMult.cs @@ -2,7 +2,7 @@ using ChocolArm64.Instructions; namespace ChocolArm64.Decoders { - class OpCodeMemMult32 : OpCode32, IOpCodeMemMult32 + class OpCode32MemMult : OpCode32, IOpCode32MemMult { public int Rn { get; private set; } @@ -10,7 +10,7 @@ namespace ChocolArm64.Decoders public int Offset { get; private set; } public int PostOffset { get; private set; } - public OpCodeMemMult32(Inst inst, long position, int opCode) : base(inst, position, opCode) + public OpCode32MemMult(Inst inst, long position, int opCode) : base(inst, position, opCode) { Rn = (opCode >> 16) & 0xf; diff --git a/ChocolArm64/Decoders/OpCodeAluImm8T16.cs b/ChocolArm64/Decoders/OpCodeT16AluImm8.cs similarity index 77% rename from ChocolArm64/Decoders/OpCodeAluImm8T16.cs rename to ChocolArm64/Decoders/OpCodeT16AluImm8.cs index beb6dcaa57..52c059f40e 100644 --- a/ChocolArm64/Decoders/OpCodeAluImm8T16.cs +++ b/ChocolArm64/Decoders/OpCodeT16AluImm8.cs @@ -2,7 +2,7 @@ using ChocolArm64.Instructions; namespace ChocolArm64.Decoders { - class OpCodeAluImm8T16 : OpCodeT16, IOpCodeAlu32 + class OpCodeT16AluImm8 : OpCodeT16, IOpCode32Alu { private int _rdn; @@ -13,7 +13,7 @@ namespace ChocolArm64.Decoders public int Imm { get; private set; } - public OpCodeAluImm8T16(Inst inst, long position, int opCode) : base(inst, position, opCode) + public OpCodeT16AluImm8(Inst inst, long position, int opCode) : base(inst, position, opCode) { Imm = (opCode >> 0) & 0xff; _rdn = (opCode >> 8) & 0x7; diff --git a/ChocolArm64/Decoders/OpCodeBRegT16.cs b/ChocolArm64/Decoders/OpCodeT16BReg.cs similarity index 65% rename from ChocolArm64/Decoders/OpCodeBRegT16.cs rename to ChocolArm64/Decoders/OpCodeT16BReg.cs index c6c251308a..2951470055 100644 --- a/ChocolArm64/Decoders/OpCodeBRegT16.cs +++ b/ChocolArm64/Decoders/OpCodeT16BReg.cs @@ -2,11 +2,11 @@ using ChocolArm64.Instructions; namespace ChocolArm64.Decoders { - class OpCodeBRegT16 : OpCodeT16, IOpCodeBReg32 + class OpCodeT16BReg : OpCodeT16, IOpCode32BReg { public int Rm { get; private set; } - public OpCodeBRegT16(Inst inst, long position, int opCode) : base(inst, position, opCode) + public OpCodeT16BReg(Inst inst, long position, int opCode) : base(inst, position, opCode) { Rm = (opCode >> 3) & 0xf; } diff --git a/ChocolArm64/Instructions/InstEmitAlu32.cs b/ChocolArm64/Instructions/InstEmitAlu32.cs index 5b3164e5fb..539e7c4366 100644 --- a/ChocolArm64/Instructions/InstEmitAlu32.cs +++ b/ChocolArm64/Instructions/InstEmitAlu32.cs @@ -12,7 +12,7 @@ namespace ChocolArm64.Instructions { public static void Add(ILEmitterCtx context) { - IOpCodeAlu32 op = (IOpCodeAlu32)context.CurrOp; + IOpCode32Alu op = (IOpCode32Alu)context.CurrOp; EmitAluLoadOpers(context, setCarry: false); @@ -31,7 +31,7 @@ namespace ChocolArm64.Instructions public static void Cmp(ILEmitterCtx context) { - IOpCodeAlu32 op = (IOpCodeAlu32)context.CurrOp; + IOpCode32Alu op = (IOpCode32Alu)context.CurrOp; EmitAluLoadOpers(context, setCarry: false); @@ -47,7 +47,7 @@ namespace ChocolArm64.Instructions public static void Mov(ILEmitterCtx context) { - IOpCodeAlu32 op = (IOpCodeAlu32)context.CurrOp; + IOpCode32Alu op = (IOpCode32Alu)context.CurrOp; EmitAluLoadOper2(context); @@ -61,7 +61,7 @@ namespace ChocolArm64.Instructions public static void Sub(ILEmitterCtx context) { - IOpCodeAlu32 op = (IOpCodeAlu32)context.CurrOp; + IOpCode32Alu op = (IOpCode32Alu)context.CurrOp; EmitAluLoadOpers(context, setCarry: false); @@ -80,7 +80,7 @@ namespace ChocolArm64.Instructions private static void EmitAluStore(ILEmitterCtx context) { - IOpCodeAlu32 op = (IOpCodeAlu32)context.CurrOp; + IOpCode32Alu op = (IOpCode32Alu)context.CurrOp; if (op.Rd == RegisterAlias.Aarch32Pc) { diff --git a/ChocolArm64/Instructions/InstEmitAluHelper.cs b/ChocolArm64/Instructions/InstEmitAluHelper.cs index db8fd0e57d..181f645ab9 100644 --- a/ChocolArm64/Instructions/InstEmitAluHelper.cs +++ b/ChocolArm64/Instructions/InstEmitAluHelper.cs @@ -127,7 +127,7 @@ namespace ChocolArm64.Instructions { context.EmitLdintzr(op.Rm); } - else if (context.CurrOp is OpCodeAluRsImm32 op32) + else if (context.CurrOp is OpCode32AluRsImm op32) { InstEmit32Helper.EmitLoadFromRegister(context, op32.Rm); } @@ -156,7 +156,7 @@ namespace ChocolArm64.Instructions context.EmitLdint(op.Rn); } } - else if (context.CurrOp is IOpCodeAlu32 op32) + else if (context.CurrOp is IOpCode32Alu op32) { InstEmit32Helper.EmitLoadFromRegister(context, op32.Rn); } @@ -171,7 +171,7 @@ namespace ChocolArm64.Instructions switch (context.CurrOp) { //ARM32. - case OpCodeAluImm32 op: + case OpCode32AluImm op: context.EmitLdc_I4(op.Imm); if (op.SetFlags && op.IsRotated) @@ -182,11 +182,11 @@ namespace ChocolArm64.Instructions } break; - case OpCodeAluRsImm32 op: + case OpCode32AluRsImm op: EmitLoadRmShiftedByImmediate(context, op, setCarry); break; - case OpCodeAluImm8T16 op: + case OpCodeT16AluImm8 op: context.EmitLdc_I4(op.Imm); break; @@ -246,7 +246,7 @@ namespace ChocolArm64.Instructions } //ARM32 helpers. - private static void EmitLoadRmShiftedByImmediate(ILEmitterCtx context, OpCodeAluRsImm32 op, bool setCarry) + private static void EmitLoadRmShiftedByImmediate(ILEmitterCtx context, OpCode32AluRsImm op, bool setCarry) { int shift = op.Imm; diff --git a/ChocolArm64/Instructions/InstEmitFlow32.cs b/ChocolArm64/Instructions/InstEmitFlow32.cs index dd7e9d9ee3..61f1d34c53 100644 --- a/ChocolArm64/Instructions/InstEmitFlow32.cs +++ b/ChocolArm64/Instructions/InstEmitFlow32.cs @@ -11,7 +11,7 @@ namespace ChocolArm64.Instructions { public static void B(ILEmitterCtx context) { - IOpCodeBImm32 op = (IOpCodeBImm32)context.CurrOp; + IOpCode32BImm op = (IOpCode32BImm)context.CurrOp; if (context.CurrBlock.Branch != null) { @@ -38,7 +38,7 @@ namespace ChocolArm64.Instructions public static void Bx(ILEmitterCtx context) { - IOpCodeBReg32 op = (IOpCodeBReg32)context.CurrOp; + IOpCode32BReg op = (IOpCode32BReg)context.CurrOp; context.EmitStoreState(); @@ -49,7 +49,7 @@ namespace ChocolArm64.Instructions private static void Blx(ILEmitterCtx context, bool x) { - IOpCodeBImm32 op = (IOpCodeBImm32)context.CurrOp; + IOpCode32BImm op = (IOpCode32BImm)context.CurrOp; uint pc = op.GetPc(); diff --git a/ChocolArm64/Instructions/InstEmitMemory32.cs b/ChocolArm64/Instructions/InstEmitMemory32.cs index 3a02a03b48..4d6a57a472 100644 --- a/ChocolArm64/Instructions/InstEmitMemory32.cs +++ b/ChocolArm64/Instructions/InstEmitMemory32.cs @@ -29,7 +29,7 @@ namespace ChocolArm64.Instructions public static void Ldm(ILEmitterCtx context) { - OpCodeMemMult32 op = (OpCodeMemMult32)context.CurrOp; + OpCode32MemMult op = (OpCode32MemMult)context.CurrOp; EmitLoadFromRegister(context, op.Rn); @@ -112,7 +112,7 @@ namespace ChocolArm64.Instructions public static void Stm(ILEmitterCtx context) { - OpCodeMemMult32 op = (OpCodeMemMult32)context.CurrOp; + OpCode32MemMult op = (OpCode32MemMult)context.CurrOp; EmitLoadFromRegister(context, op.Rn); @@ -185,7 +185,7 @@ namespace ChocolArm64.Instructions private static void EmitLoadOrStore(ILEmitterCtx context, int size, AccessType accType) { - OpCodeMem32 op = (OpCodeMem32)context.CurrOp; + OpCode32Mem op = (OpCode32Mem)context.CurrOp; if (op.Index || op.WBack) { diff --git a/ChocolArm64/OpCodeTable.cs b/ChocolArm64/OpCodeTable.cs index 897a1df6a2..b078ebf7cd 100644 --- a/ChocolArm64/OpCodeTable.cs +++ b/ChocolArm64/OpCodeTable.cs @@ -37,32 +37,32 @@ namespace ChocolArm64 { #region "OpCode Table (AArch32)" //Integer - SetA32("<<<<0010100xxxxxxxxxxxxxxxxxxxxx", InstEmit32.Add, typeof(OpCodeAluImm32)); - SetA32("<<<<0000100xxxxxxxxxxxxxxxx0xxxx", InstEmit32.Add, typeof(OpCodeAluRsImm32)); - SetA32("<<<<1010xxxxxxxxxxxxxxxxxxxxxxxx", InstEmit32.B, typeof(OpCodeBImm32)); - SetA32("<<<<1011xxxxxxxxxxxxxxxxxxxxxxxx", InstEmit32.Bl, typeof(OpCodeBImm32)); - SetA32("1111101xxxxxxxxxxxxxxxxxxxxxxxxx", InstEmit32.Blx, typeof(OpCodeBImm32)); - SetA32("<<<<000100101111111111110001xxxx", InstEmit32.Bx, typeof(OpCodeBReg32)); - SetT32("010001110xxxx000", InstEmit32.Bx, typeof(OpCodeBRegT16)); - SetA32("<<<<00110101xxxx0000xxxxxxxxxxxx", InstEmit32.Cmp, typeof(OpCodeAluImm32)); - SetA32("<<<<00010101xxxx0000xxxxxxx0xxxx", InstEmit32.Cmp, typeof(OpCodeAluRsImm32)); - SetA32("<<<<100xx0x1xxxxxxxxxxxxxxxxxxxx", InstEmit32.Ldm, typeof(OpCodeMemMult32)); - SetA32("<<<<010xx0x1xxxxxxxxxxxxxxxxxxxx", InstEmit32.Ldr, typeof(OpCodeMemImm32)); - SetA32("<<<<010xx1x1xxxxxxxxxxxxxxxxxxxx", InstEmit32.Ldrb, typeof(OpCodeMemImm32)); + SetA32("<<<<0010100xxxxxxxxxxxxxxxxxxxxx", InstEmit32.Add, typeof(OpCode32AluImm)); + SetA32("<<<<0000100xxxxxxxxxxxxxxxx0xxxx", InstEmit32.Add, typeof(OpCode32AluRsImm)); + SetA32("<<<<1010xxxxxxxxxxxxxxxxxxxxxxxx", InstEmit32.B, typeof(OpCode32BImm)); + SetA32("<<<<1011xxxxxxxxxxxxxxxxxxxxxxxx", InstEmit32.Bl, typeof(OpCode32BImm)); + SetA32("1111101xxxxxxxxxxxxxxxxxxxxxxxxx", InstEmit32.Blx, typeof(OpCode32BImm)); + SetA32("<<<<000100101111111111110001xxxx", InstEmit32.Bx, typeof(OpCode32BReg)); + SetT32("010001110xxxx000", InstEmit32.Bx, typeof(OpCodeT16BReg)); + SetA32("<<<<00110101xxxx0000xxxxxxxxxxxx", InstEmit32.Cmp, typeof(OpCode32AluImm)); + SetA32("<<<<00010101xxxx0000xxxxxxx0xxxx", InstEmit32.Cmp, typeof(OpCode32AluRsImm)); + SetA32("<<<<100xx0x1xxxxxxxxxxxxxxxxxxxx", InstEmit32.Ldm, typeof(OpCode32MemMult)); + SetA32("<<<<010xx0x1xxxxxxxxxxxxxxxxxxxx", InstEmit32.Ldr, typeof(OpCode32MemImm)); + SetA32("<<<<010xx1x1xxxxxxxxxxxxxxxxxxxx", InstEmit32.Ldrb, typeof(OpCode32MemImm)); SetA32("<<<<000xx1x0xxxxxxxxxxxx1101xxxx", InstEmit32.Ldrd, typeof(OpCode32MemImm8)); SetA32("<<<<000xx1x1xxxxxxxxxxxx1011xxxx", InstEmit32.Ldrh, typeof(OpCode32MemImm8)); SetA32("<<<<000xx1x1xxxxxxxxxxxx1101xxxx", InstEmit32.Ldrsb, typeof(OpCode32MemImm8)); SetA32("<<<<000xx1x1xxxxxxxxxxxx1111xxxx", InstEmit32.Ldrsh, typeof(OpCode32MemImm8)); - SetA32("<<<<0011101x0000xxxxxxxxxxxxxxxx", InstEmit32.Mov, typeof(OpCodeAluImm32)); - SetA32("<<<<0001101x0000xxxxxxxxxxx0xxxx", InstEmit32.Mov, typeof(OpCodeAluRsImm32)); - SetT32("00100xxxxxxxxxxx", InstEmit32.Mov, typeof(OpCodeAluImm8T16)); - SetA32("<<<<100xx0x0xxxxxxxxxxxxxxxxxxxx", InstEmit32.Stm, typeof(OpCodeMemMult32)); - SetA32("<<<<010xx0x0xxxxxxxxxxxxxxxxxxxx", InstEmit32.Str, typeof(OpCodeMemImm32)); - SetA32("<<<<010xx1x0xxxxxxxxxxxxxxxxxxxx", InstEmit32.Strb, typeof(OpCodeMemImm32)); + SetA32("<<<<0011101x0000xxxxxxxxxxxxxxxx", InstEmit32.Mov, typeof(OpCode32AluImm)); + SetA32("<<<<0001101x0000xxxxxxxxxxx0xxxx", InstEmit32.Mov, typeof(OpCode32AluRsImm)); + SetT32("00100xxxxxxxxxxx", InstEmit32.Mov, typeof(OpCodeT16AluImm8)); + SetA32("<<<<100xx0x0xxxxxxxxxxxxxxxxxxxx", InstEmit32.Stm, typeof(OpCode32MemMult)); + SetA32("<<<<010xx0x0xxxxxxxxxxxxxxxxxxxx", InstEmit32.Str, typeof(OpCode32MemImm)); + SetA32("<<<<010xx1x0xxxxxxxxxxxxxxxxxxxx", InstEmit32.Strb, typeof(OpCode32MemImm)); SetA32("<<<<000xx1x0xxxxxxxxxxxx1111xxxx", InstEmit32.Strd, typeof(OpCode32MemImm8)); SetA32("<<<<000xx1x0xxxxxxxxxxxx1011xxxx", InstEmit32.Strh, typeof(OpCode32MemImm8)); - SetA32("<<<<0010010xxxxxxxxxxxxxxxxxxxxx", InstEmit32.Sub, typeof(OpCodeAluImm32)); - SetA32("<<<<0000010xxxxxxxxxxxxxxxx0xxxx", InstEmit32.Sub, typeof(OpCodeAluRsImm32)); + SetA32("<<<<0010010xxxxxxxxxxxxxxxxxxxxx", InstEmit32.Sub, typeof(OpCode32AluImm)); + SetA32("<<<<0000010xxxxxxxxxxxxxxxx0xxxx", InstEmit32.Sub, typeof(OpCode32AluRsImm)); #endregion #region "OpCode Table (AArch64)" diff --git a/ChocolArm64/State/CpuThreadState.cs b/ChocolArm64/State/CpuThreadState.cs index a0cc241522..12edc429a0 100644 --- a/ChocolArm64/State/CpuThreadState.cs +++ b/ChocolArm64/State/CpuThreadState.cs @@ -13,8 +13,6 @@ namespace ChocolArm64.State private const int MinInstForCheck = 4000000; - - public ulong X0, X1, X2, X3, X4, X5, X6, X7, X8, X9, X10, X11, X12, X13, X14, X15, X16, X17, X18, X19, X20, X21, X22, X23, @@ -54,10 +52,10 @@ namespace ChocolArm64.State { get { - return (Negative ? (int)PState.N : 0) | - (Zero ? (int)PState.Z : 0) | - (Carry ? (int)PState.C : 0) | - (Overflow ? (int)PState.V : 0); + return (Negative ? (int)PState.NMask : 0) | + (Zero ? (int)PState.ZMask : 0) | + (Carry ? (int)PState.CMask : 0) | + (Overflow ? (int)PState.VMask : 0); } } diff --git a/ChocolArm64/State/PState.cs b/ChocolArm64/State/PState.cs index f892e7c1bb..053a5357c1 100644 --- a/ChocolArm64/State/PState.cs +++ b/ChocolArm64/State/PState.cs @@ -13,17 +13,12 @@ namespace ChocolArm64.State ZBit = 30, NBit = 31, - T = 1 << TBit, - E = 1 << EBit, + TMask = 1 << TBit, + EMask = 1 << EBit, - V = 1 << VBit, - C = 1 << CBit, - Z = 1 << ZBit, - N = 1 << NBit, - - Nz = N | Z, - Cv = C | V, - - Nzcv = Nz | Cv + VMask = 1 << VBit, + CMask = 1 << CBit, + ZMask = 1 << ZBit, + NMask = 1 << NBit } }