Update CpuTestSimdCvt.cs
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1 changed files with 70 additions and 20 deletions
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@ -2,6 +2,7 @@
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using NUnit.Framework;
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using System;
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using System.Collections.Generic;
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using System.Runtime.Intrinsics;
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@ -13,15 +14,15 @@ namespace Ryujinx.Tests.Cpu
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#if SimdCvt
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#region "ValueSource (Types)"
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private static IEnumerable<ulong> _1S_F_Cvt_()
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private static IEnumerable<ulong> _1S_F_WX_()
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{
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// int
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yield return 0x00000000CF000001; // -2.1474839E9f (-2147483904)
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yield return 0x00000000CF000000; // -2.14748365E9f (-2147483648)
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yield return 0x00000000CEFFFFFF; // -2.14748352E9f (-2147483520)
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yield return 0x000000004F000001; // 2.1474839E9f (2147483904)
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yield return 0x000000004F000000; // 2.14748365E9f (2147483648)
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yield return 0x000000004EFFFFFF; // 2.14748352E9f (2147483520)
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yield return 0x00000000CF000001ul; // -2.1474839E9f (-2147483904)
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yield return 0x00000000CF000000ul; // -2.14748365E9f (-2147483648)
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yield return 0x00000000CEFFFFFFul; // -2.14748352E9f (-2147483520)
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yield return 0x000000004F000001ul; // 2.1474839E9f (2147483904)
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yield return 0x000000004F000000ul; // 2.14748365E9f (2147483648)
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yield return 0x000000004EFFFFFFul; // 2.14748352E9f (2147483520)
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// long
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yield return 0x00000000DF000001ul; // -9.223373E18f (-9223373136366403584)
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@ -31,6 +32,16 @@ namespace Ryujinx.Tests.Cpu
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yield return 0x000000005F000000ul; // 9.223372E18f (9223372036854775808)
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yield return 0x000000005EFFFFFFul; // 9.2233715E18f (9223371487098961920)
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// uint
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yield return 0x000000004F800001ul; // 4.2949678E9f (4294967808)
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yield return 0x000000004F800000ul; // 4.2949673E9f (4294967296)
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yield return 0x000000004F7FFFFFul; // 4.29496704E9f (4294967040)
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// ulong
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yield return 0x000000005F800001ul; // 1.8446746E19f (18446746272732807168)
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yield return 0x000000005F800000ul; // 1.8446744E19f (18446744073709551616)
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yield return 0x000000005F7FFFFFul; // 1.8446743E19f (18446742974197923840)
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yield return 0x00000000FF7FFFFFul; // -Max Normal (float.MinValue)
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yield return 0x0000000080800000ul; // -Min Normal
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yield return 0x00000000807FFFFFul; // -Max Subnormal
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@ -63,15 +74,30 @@ namespace Ryujinx.Tests.Cpu
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for (int cnt = 1; cnt <= RndCnt; cnt++)
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{
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ulong grbg = TestContext.CurrentContext.Random.NextUInt();
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ulong rnd1 = GenNormalS();
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ulong rnd2 = GenSubnormalS();
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ulong rnd1 = (uint)BitConverter.SingleToInt32Bits(
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(float)((int)TestContext.CurrentContext.Random.NextUInt()));
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ulong rnd2 = (uint)BitConverter.SingleToInt32Bits(
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(float)((long)TestContext.CurrentContext.Random.NextULong()));
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ulong rnd3 = (uint)BitConverter.SingleToInt32Bits(
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(float)((uint)TestContext.CurrentContext.Random.NextUInt()));
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ulong rnd4 = (uint)BitConverter.SingleToInt32Bits(
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(float)((ulong)TestContext.CurrentContext.Random.NextULong()));
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ulong rnd5 = GenNormalS();
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ulong rnd6 = GenSubnormalS();
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yield return (grbg << 32) | rnd1;
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yield return (grbg << 32) | rnd2;
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yield return (grbg << 32) | rnd3;
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yield return (grbg << 32) | rnd4;
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yield return (grbg << 32) | rnd5;
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yield return (grbg << 32) | rnd6;
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}
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}
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private static IEnumerable<ulong> _1D_F_Cvt_()
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private static IEnumerable<ulong> _1D_F_WX_()
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{
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// int
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yield return 0xC1E0000000200000ul; // -2147483649.0000000d (-2147483649)
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@ -89,6 +115,16 @@ namespace Ryujinx.Tests.Cpu
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yield return 0x43E0000000000000ul; // 9.2233720368547760E18d (9223372036854776000)
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yield return 0x43DFFFFFFFFFFFFFul; // 9.2233720368547750E18d (9223372036854775000)
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// uint
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yield return 0x41F0000000100000ul; // 4294967297.0000000d (4294967297)
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yield return 0x41F0000000000000ul; // 4294967296.0000000d (4294967296)
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yield return 0x41EFFFFFFFE00000ul; // 4294967295.0000000d (4294967295)
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// ulong
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yield return 0x43F0000000000001ul; // 1.8446744073709556e19d (18446744073709556000)
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yield return 0x43F0000000000000ul; // 1.8446744073709552E19d (18446744073709552000)
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yield return 0x43EFFFFFFFFFFFFFul; // 1.8446744073709550e19d (18446744073709550000)
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yield return 0xFFEFFFFFFFFFFFFFul; // -Max Normal (double.MinValue)
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yield return 0x8010000000000000ul; // -Min Normal
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yield return 0x800FFFFFFFFFFFFFul; // -Max Subnormal
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@ -120,11 +156,25 @@ namespace Ryujinx.Tests.Cpu
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for (int cnt = 1; cnt <= RndCnt; cnt++)
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{
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ulong rnd1 = GenNormalD();
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ulong rnd2 = GenSubnormalD();
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ulong rnd1 = (ulong)BitConverter.DoubleToInt64Bits(
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(double)((int)TestContext.CurrentContext.Random.NextUInt()));
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ulong rnd2 = (ulong)BitConverter.DoubleToInt64Bits(
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(double)((long)TestContext.CurrentContext.Random.NextULong()));
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ulong rnd3 = (ulong)BitConverter.DoubleToInt64Bits(
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(double)((uint)TestContext.CurrentContext.Random.NextUInt()));
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ulong rnd4 = (ulong)BitConverter.DoubleToInt64Bits(
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(double)((ulong)TestContext.CurrentContext.Random.NextULong()));
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ulong rnd5 = GenNormalD();
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ulong rnd6 = GenSubnormalD();
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yield return rnd1;
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yield return rnd2;
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yield return rnd3;
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yield return rnd4;
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yield return rnd5;
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yield return rnd6;
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}
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}
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@ -286,7 +336,7 @@ namespace Ryujinx.Tests.Cpu
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public void F_Cvt_AMPZ_SU_Gp_SW([ValueSource("_F_Cvt_AMPZ_SU_Gp_SW_")] uint opcodes,
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[Values(0u, 31u)] uint rd,
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[Values(1u)] uint rn,
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[ValueSource("_1S_F_Cvt_")] ulong a)
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[ValueSource("_1S_F_WX_")] ulong a)
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{
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opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
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@ -303,7 +353,7 @@ namespace Ryujinx.Tests.Cpu
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public void F_Cvt_AMPZ_SU_Gp_SX([ValueSource("_F_Cvt_AMPZ_SU_Gp_SX_")] uint opcodes,
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[Values(0u, 31u)] uint rd,
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[Values(1u)] uint rn,
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[ValueSource("_1S_F_Cvt_")] ulong a)
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[ValueSource("_1S_F_WX_")] ulong a)
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{
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opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
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@ -319,7 +369,7 @@ namespace Ryujinx.Tests.Cpu
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public void F_Cvt_AMPZ_SU_Gp_DW([ValueSource("_F_Cvt_AMPZ_SU_Gp_DW_")] uint opcodes,
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[Values(0u, 31u)] uint rd,
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[Values(1u)] uint rn,
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[ValueSource("_1D_F_Cvt_")] ulong a)
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[ValueSource("_1D_F_WX_")] ulong a)
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{
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opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
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@ -336,7 +386,7 @@ namespace Ryujinx.Tests.Cpu
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public void F_Cvt_AMPZ_SU_Gp_DX([ValueSource("_F_Cvt_AMPZ_SU_Gp_DX_")] uint opcodes,
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[Values(0u, 31u)] uint rd,
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[Values(1u)] uint rn,
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[ValueSource("_1D_F_Cvt_")] ulong a)
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[ValueSource("_1D_F_WX_")] ulong a)
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{
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opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
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@ -352,7 +402,7 @@ namespace Ryujinx.Tests.Cpu
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public void F_Cvt_Z_SU_Gp_Fixed_SW([ValueSource("_F_Cvt_Z_SU_Gp_Fixed_SW_")] uint opcodes,
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[Values(0u, 31u)] uint rd,
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[Values(1u)] uint rn,
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[ValueSource("_1S_F_Cvt_")] ulong a,
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[ValueSource("_1S_F_WX_")] ulong a,
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[Values(1u, 32u)] [Random(2u, 31u, RndCntFBits)] uint fBits)
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{
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uint scale = (64u - fBits) & 0x3Fu;
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@ -373,7 +423,7 @@ namespace Ryujinx.Tests.Cpu
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public void F_Cvt_Z_SU_Gp_Fixed_SX([ValueSource("_F_Cvt_Z_SU_Gp_Fixed_SX_")] uint opcodes,
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[Values(0u, 31u)] uint rd,
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[Values(1u)] uint rn,
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[ValueSource("_1S_F_Cvt_")] ulong a,
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[ValueSource("_1S_F_WX_")] ulong a,
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[Values(1u, 64u)] [Random(2u, 63u, RndCntFBits)] uint fBits)
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{
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uint scale = (64u - fBits) & 0x3Fu;
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@ -393,7 +443,7 @@ namespace Ryujinx.Tests.Cpu
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public void F_Cvt_Z_SU_Gp_Fixed_DW([ValueSource("_F_Cvt_Z_SU_Gp_Fixed_DW_")] uint opcodes,
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[Values(0u, 31u)] uint rd,
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[Values(1u)] uint rn,
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[ValueSource("_1D_F_Cvt_")] ulong a,
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[ValueSource("_1D_F_WX_")] ulong a,
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[Values(1u, 32u)] [Random(2u, 31u, RndCntFBits)] uint fBits)
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{
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uint scale = (64u - fBits) & 0x3Fu;
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@ -414,7 +464,7 @@ namespace Ryujinx.Tests.Cpu
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public void F_Cvt_Z_SU_Gp_Fixed_DX([ValueSource("_F_Cvt_Z_SU_Gp_Fixed_DX_")] uint opcodes,
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[Values(0u, 31u)] uint rd,
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[Values(1u)] uint rn,
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[ValueSource("_1D_F_Cvt_")] ulong a,
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[ValueSource("_1D_F_WX_")] ulong a,
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[Values(1u, 64u)] [Random(2u, 63u, RndCntFBits)] uint fBits)
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{
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uint scale = (64u - fBits) & 0x3Fu;
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