Update CpuTestSimd.cs
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1 changed files with 202 additions and 30 deletions
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@ -13,6 +13,71 @@ namespace Ryujinx.Tests.Cpu
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{
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#if Simd
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#region "Helper methods"
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private static byte GenLeadingSignsMinus8(int cnt) // 0 <= cnt <= 7
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{
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return (byte)(~(uint)GenLeadingZeros8(cnt + 1));
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}
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private static ushort GenLeadingSignsMinus16(int cnt) // 0 <= cnt <= 15
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{
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return (ushort)(~(uint)GenLeadingZeros16(cnt + 1));
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}
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private static uint GenLeadingSignsMinus32(int cnt) // 0 <= cnt <= 31
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{
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return ~GenLeadingZeros32(cnt + 1);
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}
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private static byte GenLeadingSignsPlus8(int cnt) // 0 <= cnt <= 7
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{
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return GenLeadingZeros8(cnt + 1);
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}
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private static ushort GenLeadingSignsPlus16(int cnt) // 0 <= cnt <= 15
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{
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return GenLeadingZeros16(cnt + 1);
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}
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private static uint GenLeadingSignsPlus32(int cnt) // 0 <= cnt <= 31
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{
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return GenLeadingZeros32(cnt + 1);
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}
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private static byte GenLeadingZeros8(int cnt) // 0 <= cnt <= 8
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{
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if (cnt == 8) return (byte)0;
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if (cnt == 7) return (byte)1;
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byte rnd = TestContext.CurrentContext.Random.NextByte();
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sbyte mask = sbyte.MinValue;
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return (byte)(((uint)rnd >> (cnt + 1)) | ((uint)((byte)mask) >> cnt));
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}
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private static ushort GenLeadingZeros16(int cnt) // 0 <= cnt <= 16
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{
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if (cnt == 16) return (ushort)0;
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if (cnt == 15) return (ushort)1;
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ushort rnd = TestContext.CurrentContext.Random.NextUShort();
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short mask = short.MinValue;
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return (ushort)(((uint)rnd >> (cnt + 1)) | ((uint)((ushort)mask) >> cnt));
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}
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private static uint GenLeadingZeros32(int cnt) // 0 <= cnt <= 32
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{
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if (cnt == 32) return 0u;
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if (cnt == 31) return 1u;
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uint rnd = TestContext.CurrentContext.Random.NextUInt();
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int mask = int.MinValue;
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return (rnd >> (cnt + 1)) | ((uint)mask >> cnt);
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}
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#endregion
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#region "ValueSource (Types)"
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private static ulong[] _1B1H1S1D_()
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{
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@ -90,6 +155,75 @@ namespace Ryujinx.Tests.Cpu
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul };
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}
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private static IEnumerable<ulong> _GenLeadingSigns8B_()
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{
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for (int cnt = 0; cnt <= 7; cnt++)
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{
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ulong rnd1 = GenLeadingSignsMinus8(cnt);
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ulong rnd2 = GenLeadingSignsPlus8(cnt);
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yield return (rnd1 << 56) | (rnd1 << 48) | (rnd1 << 40) | (rnd1 << 32) |
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(rnd1 << 24) | (rnd1 << 16) | (rnd1 << 08) | rnd1;
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yield return (rnd2 << 56) | (rnd2 << 48) | (rnd2 << 40) | (rnd2 << 32) |
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(rnd2 << 24) | (rnd2 << 16) | (rnd2 << 08) | rnd2;
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}
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}
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private static IEnumerable<ulong> _GenLeadingSigns4H_()
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{
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for (int cnt = 0; cnt <= 15; cnt++)
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{
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ulong rnd1 = GenLeadingSignsMinus16(cnt);
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ulong rnd2 = GenLeadingSignsPlus16(cnt);
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yield return (rnd1 << 48) | (rnd1 << 32) | (rnd1 << 16) | rnd1;
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yield return (rnd2 << 48) | (rnd2 << 32) | (rnd2 << 16) | rnd2;
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}
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}
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private static IEnumerable<ulong> _GenLeadingSigns2S_()
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{
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for (int cnt = 0; cnt <= 31; cnt++)
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{
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ulong rnd1 = GenLeadingSignsMinus32(cnt);
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ulong rnd2 = GenLeadingSignsPlus32(cnt);
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yield return (rnd1 << 32) | rnd1;
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yield return (rnd2 << 32) | rnd2;
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}
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}
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private static IEnumerable<ulong> _GenLeadingZeros8B_()
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{
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for (int cnt = 0; cnt <= 8; cnt++)
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{
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ulong rnd = GenLeadingZeros8(cnt);
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yield return (rnd << 56) | (rnd << 48) | (rnd << 40) | (rnd << 32) |
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(rnd << 24) | (rnd << 16) | (rnd << 08) | rnd;
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}
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}
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private static IEnumerable<ulong> _GenLeadingZeros4H_()
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{
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for (int cnt = 0; cnt <= 16; cnt++)
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{
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ulong rnd = GenLeadingZeros16(cnt);
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yield return (rnd << 48) | (rnd << 32) | (rnd << 16) | rnd;
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}
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}
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private static IEnumerable<ulong> _GenLeadingZeros2S_()
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{
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for (int cnt = 0; cnt <= 32; cnt++)
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{
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ulong rnd = GenLeadingZeros32(cnt);
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yield return (rnd << 32) | rnd;
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}
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}
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private static IEnumerable<ulong> _1H_F_()
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{
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yield return 0x000000000000FBFFul; // -Max Normal
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@ -1034,18 +1168,18 @@ namespace Ryujinx.Tests.Cpu
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}
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[Test, Pairwise, Description("CLS <Vd>.<T>, <Vn>.<T>")]
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public void Cls_V_8B_4H_2S([Values(0u)] uint rd,
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[Values(1u, 0u)] uint rn,
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[ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong z,
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[ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong a,
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[Values(0b00u, 0b01u, 0b10u)] uint size) // <8B, 4H, 2S>
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public void Cls_V_8B_16B([Values(0u)] uint rd,
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[Values(1u, 0u)] uint rn,
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[ValueSource("_GenLeadingSigns8B_")] [Random(RndCnt)] ulong z,
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[ValueSource("_GenLeadingSigns8B_")] [Random(RndCnt)] ulong a,
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[Values(0b0u, 0b1u)] uint q) // <8B, 16B>
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{
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uint opcode = 0x0E204800; // CLS V0.8B, V0.8B
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opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
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opcode |= ((size & 3) << 22);
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opcode |= ((q & 1) << 30);
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Vector128<float> v0 = MakeVectorE0E1(z, z);
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Vector128<float> v1 = MakeVectorE0(a);
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Vector128<float> v1 = MakeVectorE0E1(a, a * q);
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SingleOpcode(opcode, v0: v0, v1: v1);
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@ -1053,18 +1187,37 @@ namespace Ryujinx.Tests.Cpu
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}
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[Test, Pairwise, Description("CLS <Vd>.<T>, <Vn>.<T>")]
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public void Cls_V_16B_8H_4S([Values(0u)] uint rd,
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[Values(1u, 0u)] uint rn,
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[ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong z,
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[ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong a,
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[Values(0b00u, 0b01u, 0b10u)] uint size) // <16B, 8H, 4S>
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public void Cls_V_4H_8H([Values(0u)] uint rd,
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[Values(1u, 0u)] uint rn,
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[ValueSource("_GenLeadingSigns4H_")] [Random(RndCnt)] ulong z,
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[ValueSource("_GenLeadingSigns4H_")] [Random(RndCnt)] ulong a,
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[Values(0b0u, 0b1u)] uint q) // <4H, 8H>
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{
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uint opcode = 0x4E204800; // CLS V0.16B, V0.16B
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uint opcode = 0x0E604800; // CLS V0.4H, V0.4H
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opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
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opcode |= ((size & 3) << 22);
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opcode |= ((q & 1) << 30);
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Vector128<float> v0 = MakeVectorE0E1(z, z);
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Vector128<float> v1 = MakeVectorE0E1(a, a);
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Vector128<float> v1 = MakeVectorE0E1(a, a * q);
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SingleOpcode(opcode, v0: v0, v1: v1);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("CLS <Vd>.<T>, <Vn>.<T>")]
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public void Cls_V_2S_4S([Values(0u)] uint rd,
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[Values(1u, 0u)] uint rn,
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[ValueSource("_GenLeadingSigns2S_")] [Random(RndCnt)] ulong z,
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[ValueSource("_GenLeadingSigns2S_")] [Random(RndCnt)] ulong a,
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[Values(0b0u, 0b1u)] uint q) // <2S, 4S>
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{
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uint opcode = 0x0EA04800; // CLS V0.2S, V0.2S
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opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
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opcode |= ((q & 1) << 30);
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Vector128<float> v0 = MakeVectorE0E1(z, z);
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Vector128<float> v1 = MakeVectorE0E1(a, a * q);
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SingleOpcode(opcode, v0: v0, v1: v1);
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@ -1072,18 +1225,18 @@ namespace Ryujinx.Tests.Cpu
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}
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[Test, Pairwise, Description("CLZ <Vd>.<T>, <Vn>.<T>")]
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public void Clz_V_8B_4H_2S([Values(0u)] uint rd,
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[Values(1u, 0u)] uint rn,
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[ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong z,
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[ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong a,
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[Values(0b00u, 0b01u, 0b10u)] uint size) // <8B, 4H, 2S>
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public void Clz_V_8B_16B([Values(0u)] uint rd,
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[Values(1u, 0u)] uint rn,
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[ValueSource("_GenLeadingZeros8B_")] [Random(RndCnt)] ulong z,
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[ValueSource("_GenLeadingZeros8B_")] [Random(RndCnt)] ulong a,
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[Values(0b0u, 0b1u)] uint q) // <8B, 16B>
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{
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uint opcode = 0x2E204800; // CLZ V0.8B, V0.8B
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opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
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opcode |= ((size & 3) << 22);
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opcode |= ((q & 1) << 30);
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Vector128<float> v0 = MakeVectorE0E1(z, z);
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Vector128<float> v1 = MakeVectorE0(a);
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Vector128<float> v1 = MakeVectorE0E1(a, a * q);
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SingleOpcode(opcode, v0: v0, v1: v1);
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@ -1091,18 +1244,37 @@ namespace Ryujinx.Tests.Cpu
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}
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[Test, Pairwise, Description("CLZ <Vd>.<T>, <Vn>.<T>")]
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public void Clz_V_16B_8H_4S([Values(0u)] uint rd,
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[Values(1u, 0u)] uint rn,
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[ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong z,
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[ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong a,
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[Values(0b00u, 0b01u, 0b10u)] uint size) // <16B, 8H, 4S>
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public void Clz_V_4H_8H([Values(0u)] uint rd,
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[Values(1u, 0u)] uint rn,
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[ValueSource("_GenLeadingZeros4H_")] [Random(RndCnt)] ulong z,
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[ValueSource("_GenLeadingZeros4H_")] [Random(RndCnt)] ulong a,
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[Values(0b0u, 0b1u)] uint q) // <4H, 8H>
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{
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uint opcode = 0x6E204800; // CLZ V0.16B, V0.16B
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uint opcode = 0x2E604800; // CLZ V0.4H, V0.4H
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opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
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opcode |= ((size & 3) << 22);
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opcode |= ((q & 1) << 30);
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Vector128<float> v0 = MakeVectorE0E1(z, z);
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Vector128<float> v1 = MakeVectorE0E1(a, a);
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Vector128<float> v1 = MakeVectorE0E1(a, a * q);
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SingleOpcode(opcode, v0: v0, v1: v1);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("CLZ <Vd>.<T>, <Vn>.<T>")]
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public void Clz_V_2S_4S([Values(0u)] uint rd,
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[Values(1u, 0u)] uint rn,
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[ValueSource("_GenLeadingZeros2S_")] [Random(RndCnt)] ulong z,
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[ValueSource("_GenLeadingZeros2S_")] [Random(RndCnt)] ulong a,
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[Values(0b0u, 0b1u)] uint q) // <2S, 4S>
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{
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uint opcode = 0x2EA04800; // CLZ V0.2S, V0.2S
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opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
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opcode |= ((q & 1) << 30);
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Vector128<float> v0 = MakeVectorE0E1(z, z);
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Vector128<float> v1 = MakeVectorE0E1(a, a * q);
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SingleOpcode(opcode, v0: v0, v1: v1);
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