Update InstEmitSimdCvt.cs
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1 changed files with 93 additions and 45 deletions
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@ -76,6 +76,26 @@ namespace ChocolArm64.Instructions
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int sizeF = op.Size & 1;
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int sizeF = op.Size & 1;
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if (Optimizations.UseSse2 && sizeF == 1)
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{
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Type[] typesMov = new Type[] { typeof(Vector128<float>), typeof(Vector128<float>) };
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Type[] typesCvt = new Type[] { typeof(Vector128<float>) };
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string nameMov = op.RegisterSize == RegisterSize.Simd128
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? nameof(Sse.MoveHighToLow)
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: nameof(Sse.MoveLowToHigh);
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context.EmitLdvec(op.Rn);
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context.Emit(OpCodes.Dup);
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context.EmitCall(typeof(Sse).GetMethod(nameMov, typesMov));
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context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.ConvertToVector128Double), typesCvt));
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EmitStvecWithCastFromDouble(context, op.Rd);
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}
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else
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{
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int elems = 4 >> sizeF;
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int elems = 4 >> sizeF;
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int part = op.RegisterSize == RegisterSize.Simd128 ? elems : 0;
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int part = op.RegisterSize == RegisterSize.Simd128 ? elems : 0;
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@ -104,6 +124,7 @@ namespace ChocolArm64.Instructions
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context.EmitLdvectmp();
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context.EmitLdvectmp();
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context.EmitStvec(op.Rd);
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context.EmitStvec(op.Rd);
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}
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}
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}
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public static void Fcvtms_Gp(ILEmitterCtx context)
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public static void Fcvtms_Gp(ILEmitterCtx context)
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{
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{
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@ -121,6 +142,32 @@ namespace ChocolArm64.Instructions
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int sizeF = op.Size & 1;
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int sizeF = op.Size & 1;
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if (Optimizations.UseSse2 && sizeF == 1)
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{
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Type[] typesMov = new Type[] { typeof(Vector128<float>), typeof(Vector128<float>) };
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Type[] typesCvt = new Type[] { typeof(Vector128<double>) };
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string nameMov = op.RegisterSize == RegisterSize.Simd128
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? nameof(Sse.MoveLowToHigh)
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: nameof(Sse.MoveHighToLow);
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context.EmitLdvec(op.Rd);
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VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleZero));
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context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.MoveLowToHigh), typesMov));
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EmitLdvecWithCastToDouble(context, op.Rn);
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context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.ConvertToVector128Single), typesCvt));
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context.Emit(OpCodes.Dup);
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context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.MoveLowToHigh), typesMov));
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context.EmitCall(typeof(Sse).GetMethod(nameMov, typesMov));
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context.EmitStvec(op.Rd);
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}
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else
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{
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int elems = 4 >> sizeF;
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int elems = 4 >> sizeF;
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int part = op.RegisterSize == RegisterSize.Simd128 ? elems : 0;
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int part = op.RegisterSize == RegisterSize.Simd128 ? elems : 0;
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@ -160,6 +207,7 @@ namespace ChocolArm64.Instructions
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EmitVectorZeroUpper(context, op.Rd);
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EmitVectorZeroUpper(context, op.Rd);
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}
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}
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}
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}
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}
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public static void Fcvtns_S(ILEmitterCtx context)
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public static void Fcvtns_S(ILEmitterCtx context)
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{
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{
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