Remove prefix from ChocolArm64 classes - Part 2
This commit is contained in:
parent
ded51fdb07
commit
c34588db60
75 changed files with 814 additions and 814 deletions
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@ -5,10 +5,10 @@ using System.Threading;
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namespace ChocolArm64
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{
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public class AThread
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public class CpuThread
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{
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public AThreadState ThreadState { get; private set; }
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public AMemory Memory { get; private set; }
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public CpuThreadState ThreadState { get; private set; }
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public MemoryManager Memory { get; private set; }
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private Translator _translator;
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@ -18,12 +18,12 @@ namespace ChocolArm64
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private int _isExecuting;
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public AThread(Translator translator, AMemory memory, long entryPoint)
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public CpuThread(Translator translator, MemoryManager memory, long entryPoint)
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{
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_translator = translator;
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Memory = memory;
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ThreadState = new AThreadState();
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ThreadState = new CpuThreadState();
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ThreadState.ExecutionMode = ExecutionMode.AArch64;
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@ -19,7 +19,7 @@ namespace ChocolArm64.Decoder
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_opActivators = new ConcurrentDictionary<Type, OpActivator>();
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}
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public static Block DecodeBasicBlock(AThreadState state, AMemory memory, long start)
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public static Block DecodeBasicBlock(CpuThreadState state, MemoryManager memory, long start)
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{
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Block block = new Block(start);
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@ -30,8 +30,8 @@ namespace ChocolArm64.Decoder
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public static (Block[] Graph, Block Root) DecodeSubroutine(
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TranslatorCache cache,
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AThreadState state,
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AMemory memory,
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CpuThreadState state,
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MemoryManager memory,
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long start)
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{
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Dictionary<long, Block> visited = new Dictionary<long, Block>();
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@ -147,7 +147,7 @@ namespace ChocolArm64.Decoder
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return (graph, root);
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}
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private static void FillBlock(AThreadState state, AMemory memory, Block block)
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private static void FillBlock(CpuThreadState state, MemoryManager memory, Block block)
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{
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long position = block.Position;
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@ -181,7 +181,7 @@ namespace ChocolArm64.Decoder
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opCode.Emitter == InstEmit.Und;
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}
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public static AOpCode DecodeOpCode(AThreadState state, AMemory memory, long position)
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public static AOpCode DecodeOpCode(CpuThreadState state, MemoryManager memory, long position)
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{
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int opCode = memory.ReadInt32(position);
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@ -25,7 +25,7 @@ namespace ChocolArm64.Decoder
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Cond = (Cond)((opCode >> 12) & 0xf);
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RmImm = (opCode >> 16) & 0x1f;
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Rd = AThreadState.ZrIndex;
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Rd = CpuThreadState.ZrIndex;
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}
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}
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}
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@ -9,12 +9,12 @@ namespace ChocolArm64.Instruction
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{
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public static void Brk(ILEmitterCtx context)
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{
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EmitExceptionCall(context, nameof(AThreadState.OnBreak));
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EmitExceptionCall(context, nameof(CpuThreadState.OnBreak));
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}
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public static void Svc(ILEmitterCtx context)
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{
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EmitExceptionCall(context, nameof(AThreadState.OnSvcCall));
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EmitExceptionCall(context, nameof(CpuThreadState.OnSvcCall));
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}
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private static void EmitExceptionCall(ILEmitterCtx context, string mthdName)
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@ -28,13 +28,13 @@ namespace ChocolArm64.Instruction
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context.EmitLdc_I8(op.Position);
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context.EmitLdc_I4(op.Id);
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context.EmitPrivateCall(typeof(AThreadState), mthdName);
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context.EmitPrivateCall(typeof(CpuThreadState), mthdName);
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//Check if the thread should still be running, if it isn't then we return 0
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//to force a return to the dispatcher and then exit the thread.
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context.EmitLdarg(TranslatedSub.StateArgIdx);
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context.EmitCallPropGet(typeof(AThreadState), nameof(AThreadState.Running));
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context.EmitCallPropGet(typeof(CpuThreadState), nameof(CpuThreadState.Running));
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ILLabel lblEnd = new ILLabel();
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@ -69,7 +69,7 @@ namespace ChocolArm64.Instruction
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context.EmitLdc_I8(op.Position);
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context.EmitLdc_I4(op.RawOpCode);
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context.EmitPrivateCall(typeof(AThreadState), nameof(AThreadState.OnUndefined));
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context.EmitPrivateCall(typeof(CpuThreadState), nameof(CpuThreadState.OnUndefined));
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if (context.CurrBlock.Next != null)
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{
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@ -36,7 +36,7 @@ namespace ChocolArm64.Instruction
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OpCodeBImmAl op = (OpCodeBImmAl)context.CurrOp;
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context.EmitLdc_I(op.Position + 4);
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context.EmitStint(AThreadState.LrIndex);
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context.EmitStint(CpuThreadState.LrIndex);
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context.EmitStoreState();
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if (context.TryOptEmitSubroutineCall())
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@ -73,7 +73,7 @@ namespace ChocolArm64.Instruction
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OpCodeBReg op = (OpCodeBReg)context.CurrOp;
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context.EmitLdc_I(op.Position + 4);
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context.EmitStint(AThreadState.LrIndex);
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context.EmitStint(CpuThreadState.LrIndex);
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context.EmitStoreState();
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context.EmitLdintzr(op.Rn);
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@ -106,7 +106,7 @@ namespace ChocolArm64.Instruction
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public static void Ret(ILEmitterCtx context)
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{
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context.EmitStoreState();
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context.EmitLdint(AThreadState.LrIndex);
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context.EmitLdint(CpuThreadState.LrIndex);
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context.Emit(OpCodes.Ret);
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}
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@ -23,7 +23,7 @@ namespace ChocolArm64.Instruction
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public static void Clrex(ILEmitterCtx context)
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{
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EmitMemoryCall(context, nameof(AMemory.ClearExclusive));
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EmitMemoryCall(context, nameof(MemoryManager.ClearExclusive));
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}
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public static void Dmb(ILEmitterCtx context) => EmitBarrier(context);
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@ -59,7 +59,7 @@ namespace ChocolArm64.Instruction
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if (exclusive)
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{
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EmitMemoryCall(context, nameof(AMemory.SetExclusive), op.Rn);
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EmitMemoryCall(context, nameof(MemoryManager.SetExclusive), op.Rn);
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}
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context.EmitLdint(op.Rn);
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@ -124,7 +124,7 @@ namespace ChocolArm64.Instruction
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if (exclusive)
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{
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EmitMemoryCall(context, nameof(AMemory.TestExclusive), op.Rn);
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EmitMemoryCall(context, nameof(MemoryManager.TestExclusive), op.Rn);
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context.Emit(OpCodes.Brtrue_S, lblEx);
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@ -160,7 +160,7 @@ namespace ChocolArm64.Instruction
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context.EmitLdc_I8(0);
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context.EmitStintzr(op.Rs);
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EmitMemoryCall(context, nameof(AMemory.ClearExclusiveForStore));
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EmitMemoryCall(context, nameof(MemoryManager.ClearExclusiveForStore));
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}
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context.MarkLabel(lblEnd);
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@ -171,14 +171,14 @@ namespace ChocolArm64.Instruction
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context.EmitLdarg(TranslatedSub.MemoryArgIdx);
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context.EmitLdarg(TranslatedSub.StateArgIdx);
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context.EmitCallPropGet(typeof(AThreadState), nameof(AThreadState.Core));
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context.EmitCallPropGet(typeof(CpuThreadState), nameof(CpuThreadState.Core));
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if (rn != -1)
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{
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context.EmitLdint(rn);
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}
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context.EmitCall(typeof(AMemory), name);
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context.EmitCall(typeof(MemoryManager), name);
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}
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private static void EmitBarrier(ILEmitterCtx context)
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@ -45,25 +45,25 @@ namespace ChocolArm64.Instruction
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{
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switch (size)
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{
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case 0: name = nameof(AMemory.ReadVector8); break;
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case 1: name = nameof(AMemory.ReadVector16); break;
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case 2: name = nameof(AMemory.ReadVector32); break;
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case 3: name = nameof(AMemory.ReadVector64); break;
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case 4: name = nameof(AMemory.ReadVector128); break;
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case 0: name = nameof(MemoryManager.ReadVector8); break;
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case 1: name = nameof(MemoryManager.ReadVector16); break;
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case 2: name = nameof(MemoryManager.ReadVector32); break;
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case 3: name = nameof(MemoryManager.ReadVector64); break;
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case 4: name = nameof(MemoryManager.ReadVector128); break;
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}
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}
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else
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{
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switch (size)
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{
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case 0: name = nameof(AMemory.ReadByte); break;
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case 1: name = nameof(AMemory.ReadUInt16); break;
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case 2: name = nameof(AMemory.ReadUInt32); break;
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case 3: name = nameof(AMemory.ReadUInt64); break;
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case 0: name = nameof(MemoryManager.ReadByte); break;
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case 1: name = nameof(MemoryManager.ReadUInt16); break;
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case 2: name = nameof(MemoryManager.ReadUInt32); break;
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case 3: name = nameof(MemoryManager.ReadUInt64); break;
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}
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}
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context.EmitCall(typeof(AMemory), name);
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context.EmitCall(typeof(MemoryManager), name);
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if (!isSimd)
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{
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@ -107,25 +107,25 @@ namespace ChocolArm64.Instruction
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{
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switch (size)
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{
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case 0: name = nameof(AMemory.WriteVector8); break;
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case 1: name = nameof(AMemory.WriteVector16); break;
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case 2: name = nameof(AMemory.WriteVector32); break;
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case 3: name = nameof(AMemory.WriteVector64); break;
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case 4: name = nameof(AMemory.WriteVector128); break;
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case 0: name = nameof(MemoryManager.WriteVector8); break;
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case 1: name = nameof(MemoryManager.WriteVector16); break;
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case 2: name = nameof(MemoryManager.WriteVector32); break;
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case 3: name = nameof(MemoryManager.WriteVector64); break;
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case 4: name = nameof(MemoryManager.WriteVector128); break;
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}
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}
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else
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{
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switch (size)
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{
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case 0: name = nameof(AMemory.WriteByte); break;
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case 1: name = nameof(AMemory.WriteUInt16); break;
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case 2: name = nameof(AMemory.WriteUInt32); break;
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case 3: name = nameof(AMemory.WriteUInt64); break;
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case 0: name = nameof(MemoryManager.WriteByte); break;
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case 1: name = nameof(MemoryManager.WriteUInt16); break;
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case 2: name = nameof(MemoryManager.WriteUInt32); break;
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case 3: name = nameof(MemoryManager.WriteUInt64); break;
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}
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}
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context.EmitCall(typeof(AMemory), name);
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context.EmitCall(typeof(MemoryManager), name);
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}
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private static bool GetIsSimd(ILEmitterCtx context)
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@ -168,7 +168,7 @@ namespace ChocolArm64.Instruction
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context.EmitLdint(op.Rn);
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if (op.Rm != AThreadState.ZrIndex)
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if (op.Rm != CpuThreadState.ZrIndex)
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{
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context.EmitLdint(op.Rm);
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}
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@ -29,21 +29,21 @@ namespace ChocolArm64.Instruction
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switch (GetPackedId(op))
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{
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case 0b11_011_0000_0000_001: propName = nameof(AThreadState.CtrEl0); break;
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case 0b11_011_0000_0000_111: propName = nameof(AThreadState.DczidEl0); break;
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case 0b11_011_0100_0100_000: propName = nameof(AThreadState.Fpcr); break;
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case 0b11_011_0100_0100_001: propName = nameof(AThreadState.Fpsr); break;
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case 0b11_011_1101_0000_010: propName = nameof(AThreadState.TpidrEl0); break;
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case 0b11_011_1101_0000_011: propName = nameof(AThreadState.Tpidr); break;
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case 0b11_011_1110_0000_000: propName = nameof(AThreadState.CntfrqEl0); break;
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case 0b11_011_1110_0000_001: propName = nameof(AThreadState.CntpctEl0); break;
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case 0b11_011_0000_0000_001: propName = nameof(CpuThreadState.CtrEl0); break;
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case 0b11_011_0000_0000_111: propName = nameof(CpuThreadState.DczidEl0); break;
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case 0b11_011_0100_0100_000: propName = nameof(CpuThreadState.Fpcr); break;
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case 0b11_011_0100_0100_001: propName = nameof(CpuThreadState.Fpsr); break;
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case 0b11_011_1101_0000_010: propName = nameof(CpuThreadState.TpidrEl0); break;
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case 0b11_011_1101_0000_011: propName = nameof(CpuThreadState.Tpidr); break;
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case 0b11_011_1110_0000_000: propName = nameof(CpuThreadState.CntfrqEl0); break;
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case 0b11_011_1110_0000_001: propName = nameof(CpuThreadState.CntpctEl0); break;
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default: throw new NotImplementedException($"Unknown MRS at {op.Position:x16}");
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}
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context.EmitCallPropGet(typeof(AThreadState), propName);
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context.EmitCallPropGet(typeof(CpuThreadState), propName);
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PropertyInfo propInfo = typeof(AThreadState).GetProperty(propName);
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PropertyInfo propInfo = typeof(CpuThreadState).GetProperty(propName);
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if (propInfo.PropertyType != typeof(long) &&
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propInfo.PropertyType != typeof(ulong))
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@ -65,14 +65,14 @@ namespace ChocolArm64.Instruction
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switch (GetPackedId(op))
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{
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case 0b11_011_0100_0100_000: propName = nameof(AThreadState.Fpcr); break;
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case 0b11_011_0100_0100_001: propName = nameof(AThreadState.Fpsr); break;
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case 0b11_011_1101_0000_010: propName = nameof(AThreadState.TpidrEl0); break;
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case 0b11_011_0100_0100_000: propName = nameof(CpuThreadState.Fpcr); break;
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case 0b11_011_0100_0100_001: propName = nameof(CpuThreadState.Fpsr); break;
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case 0b11_011_1101_0000_010: propName = nameof(CpuThreadState.TpidrEl0); break;
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default: throw new NotImplementedException($"Unknown MSR at {op.Position:x16}");
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}
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PropertyInfo propInfo = typeof(AThreadState).GetProperty(propName);
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PropertyInfo propInfo = typeof(CpuThreadState).GetProperty(propName);
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if (propInfo.PropertyType != typeof(long) &&
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propInfo.PropertyType != typeof(ulong))
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@ -80,7 +80,7 @@ namespace ChocolArm64.Instruction
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context.Emit(OpCodes.Conv_U4);
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}
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context.EmitCallPropSet(typeof(AThreadState), propName);
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context.EmitCallPropSet(typeof(CpuThreadState), propName);
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}
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public static void Nop(ILEmitterCtx context)
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@ -100,7 +100,7 @@ namespace ChocolArm64.Instruction
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case 0b11_011_0111_0100_001:
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{
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//DC ZVA
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for (int offs = 0; offs < (4 << AThreadState.DczSizeLog2); offs += 8)
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for (int offs = 0; offs < (4 << CpuThreadState.DczSizeLog2); offs += 8)
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{
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context.EmitLdarg(TranslatedSub.MemoryArgIdx);
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context.EmitLdintzr(op.Rt);
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@ -4,5 +4,5 @@ using ChocolArm64.State;
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namespace ChocolArm64.Instruction
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{
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delegate void InstInterpreter(AThreadState state, AMemory memory, AOpCode opCode);
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delegate void InstInterpreter(CpuThreadState state, MemoryManager memory, AOpCode opCode);
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}
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@ -103,7 +103,7 @@ namespace ChocolArm64.Instruction
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#endregion
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#region "Saturating"
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public static long SignedSrcSignedDstSatQ(long op, int size, AThreadState state)
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public static long SignedSrcSignedDstSatQ(long op, int size, CpuThreadState state)
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{
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int eSize = 8 << size;
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@ -128,7 +128,7 @@ namespace ChocolArm64.Instruction
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}
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}
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public static ulong SignedSrcUnsignedDstSatQ(long op, int size, AThreadState state)
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public static ulong SignedSrcUnsignedDstSatQ(long op, int size, CpuThreadState state)
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{
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int eSize = 8 << size;
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@ -153,7 +153,7 @@ namespace ChocolArm64.Instruction
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}
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}
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public static long UnsignedSrcSignedDstSatQ(ulong op, int size, AThreadState state)
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public static long UnsignedSrcSignedDstSatQ(ulong op, int size, CpuThreadState state)
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{
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int eSize = 8 << size;
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@ -171,7 +171,7 @@ namespace ChocolArm64.Instruction
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}
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}
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public static ulong UnsignedSrcUnsignedDstSatQ(ulong op, int size, AThreadState state)
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public static ulong UnsignedSrcUnsignedDstSatQ(ulong op, int size, CpuThreadState state)
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{
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int eSize = 8 << size;
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@ -189,7 +189,7 @@ namespace ChocolArm64.Instruction
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}
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}
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public static long UnarySignedSatQAbsOrNeg(long op, AThreadState state)
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public static long UnarySignedSatQAbsOrNeg(long op, CpuThreadState state)
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{
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if (op == long.MinValue)
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{
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@ -203,7 +203,7 @@ namespace ChocolArm64.Instruction
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}
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}
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public static long BinarySignedSatQAdd(long op1, long op2, AThreadState state)
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public static long BinarySignedSatQAdd(long op1, long op2, CpuThreadState state)
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{
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long add = op1 + op2;
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@ -226,7 +226,7 @@ namespace ChocolArm64.Instruction
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}
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}
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public static ulong BinaryUnsignedSatQAdd(ulong op1, ulong op2, AThreadState state)
|
||||
public static ulong BinaryUnsignedSatQAdd(ulong op1, ulong op2, CpuThreadState state)
|
||||
{
|
||||
ulong add = op1 + op2;
|
||||
|
||||
|
@ -242,7 +242,7 @@ namespace ChocolArm64.Instruction
|
|||
}
|
||||
}
|
||||
|
||||
public static long BinarySignedSatQSub(long op1, long op2, AThreadState state)
|
||||
public static long BinarySignedSatQSub(long op1, long op2, CpuThreadState state)
|
||||
{
|
||||
long sub = op1 - op2;
|
||||
|
||||
|
@ -265,7 +265,7 @@ namespace ChocolArm64.Instruction
|
|||
}
|
||||
}
|
||||
|
||||
public static ulong BinaryUnsignedSatQSub(ulong op1, ulong op2, AThreadState state)
|
||||
public static ulong BinaryUnsignedSatQSub(ulong op1, ulong op2, CpuThreadState state)
|
||||
{
|
||||
ulong sub = op1 - op2;
|
||||
|
||||
|
@ -281,7 +281,7 @@ namespace ChocolArm64.Instruction
|
|||
}
|
||||
}
|
||||
|
||||
public static long BinarySignedSatQAcc(ulong op1, long op2, AThreadState state)
|
||||
public static long BinarySignedSatQAcc(ulong op1, long op2, CpuThreadState state)
|
||||
{
|
||||
if (op1 <= (ulong)long.MaxValue)
|
||||
{
|
||||
|
@ -330,7 +330,7 @@ namespace ChocolArm64.Instruction
|
|||
}
|
||||
}
|
||||
|
||||
public static ulong BinaryUnsignedSatQAcc(long op1, ulong op2, AThreadState state)
|
||||
public static ulong BinaryUnsignedSatQAcc(long op1, ulong op2, CpuThreadState state)
|
||||
{
|
||||
if (op1 >= 0L)
|
||||
{
|
||||
|
|
|
@ -199,7 +199,7 @@ namespace ChocolArm64.Instruction
|
|||
|
||||
static class ASoftFloat1632
|
||||
{
|
||||
public static float FPConvert(ushort valueBits, AThreadState state)
|
||||
public static float FPConvert(ushort valueBits, CpuThreadState state)
|
||||
{
|
||||
Debug.WriteLineIf(state.Fpcr != 0, $"ASoftFloat16_32.FPConvert: State.Fpcr = 0x{state.Fpcr:X8}");
|
||||
|
||||
|
@ -259,7 +259,7 @@ namespace ChocolArm64.Instruction
|
|||
return sign ? float.MinValue : float.MaxValue;
|
||||
}
|
||||
|
||||
private static double FPUnpackCv(this ushort valueBits, out FpType type, out bool sign, AThreadState state)
|
||||
private static double FPUnpackCv(this ushort valueBits, out FpType type, out bool sign, CpuThreadState state)
|
||||
{
|
||||
sign = (~(uint)valueBits & 0x8000u) == 0u;
|
||||
|
||||
|
@ -303,7 +303,7 @@ namespace ChocolArm64.Instruction
|
|||
return sign ? -real : real;
|
||||
}
|
||||
|
||||
private static float FPRoundCv(double real, AThreadState state)
|
||||
private static float FPRoundCv(double real, CpuThreadState state)
|
||||
{
|
||||
const int minimumExp = -126;
|
||||
|
||||
|
@ -433,7 +433,7 @@ namespace ChocolArm64.Instruction
|
|||
(int)(((uint)valueBits & 0x8000u) << 16 | 0x7FC00000u | ((uint)valueBits & 0x01FFu) << 13));
|
||||
}
|
||||
|
||||
private static void FPProcessException(FpExc exc, AThreadState state)
|
||||
private static void FPProcessException(FpExc exc, CpuThreadState state)
|
||||
{
|
||||
int enable = (int)exc + 8;
|
||||
|
||||
|
@ -450,7 +450,7 @@ namespace ChocolArm64.Instruction
|
|||
|
||||
static class ASoftFloat3216
|
||||
{
|
||||
public static ushort FPConvert(float value, AThreadState state)
|
||||
public static ushort FPConvert(float value, CpuThreadState state)
|
||||
{
|
||||
Debug.WriteLineIf(state.Fpcr != 0, $"ASoftFloat32_16.FPConvert: State.Fpcr = 0x{state.Fpcr:X8}");
|
||||
|
||||
|
@ -525,7 +525,7 @@ namespace ChocolArm64.Instruction
|
|||
return sign ? (ushort)0xFBFFu : (ushort)0x7BFFu;
|
||||
}
|
||||
|
||||
private static double FPUnpackCv(this float value, out FpType type, out bool sign, AThreadState state, out uint valueBits)
|
||||
private static double FPUnpackCv(this float value, out FpType type, out bool sign, CpuThreadState state, out uint valueBits)
|
||||
{
|
||||
valueBits = (uint)BitConverter.SingleToInt32Bits(value);
|
||||
|
||||
|
@ -573,7 +573,7 @@ namespace ChocolArm64.Instruction
|
|||
return sign ? -real : real;
|
||||
}
|
||||
|
||||
private static ushort FPRoundCv(double real, AThreadState state)
|
||||
private static ushort FPRoundCv(double real, CpuThreadState state)
|
||||
{
|
||||
const int minimumExp = -14;
|
||||
|
||||
|
@ -712,7 +712,7 @@ namespace ChocolArm64.Instruction
|
|||
return (ushort)((valueBits & 0x80000000u) >> 16 | 0x7E00u | (valueBits & 0x003FE000u) >> 13);
|
||||
}
|
||||
|
||||
private static void FPProcessException(FpExc exc, AThreadState state)
|
||||
private static void FPProcessException(FpExc exc, CpuThreadState state)
|
||||
{
|
||||
int enable = (int)exc + 8;
|
||||
|
||||
|
@ -729,7 +729,7 @@ namespace ChocolArm64.Instruction
|
|||
|
||||
static class ASoftFloat32
|
||||
{
|
||||
public static float FPAdd(float value1, float value2, AThreadState state)
|
||||
public static float FPAdd(float value1, float value2, CpuThreadState state)
|
||||
{
|
||||
Debug.WriteLineIf(state.Fpcr != 0, $"ASoftFloat_32.FPAdd: State.Fpcr = 0x{state.Fpcr:X8}");
|
||||
|
||||
|
@ -770,7 +770,7 @@ namespace ChocolArm64.Instruction
|
|||
return result;
|
||||
}
|
||||
|
||||
public static float FPDiv(float value1, float value2, AThreadState state)
|
||||
public static float FPDiv(float value1, float value2, CpuThreadState state)
|
||||
{
|
||||
Debug.WriteLineIf(state.Fpcr != 0, $"ASoftFloat_32.FPDiv: State.Fpcr = 0x{state.Fpcr:X8}");
|
||||
|
||||
|
@ -809,7 +809,7 @@ namespace ChocolArm64.Instruction
|
|||
return result;
|
||||
}
|
||||
|
||||
public static float FPMax(float value1, float value2, AThreadState state)
|
||||
public static float FPMax(float value1, float value2, CpuThreadState state)
|
||||
{
|
||||
Debug.WriteLineIf(state.Fpcr != 0, $"ASoftFloat_32.FPMax: State.Fpcr = 0x{state.Fpcr:X8}");
|
||||
|
||||
|
@ -855,7 +855,7 @@ namespace ChocolArm64.Instruction
|
|||
return result;
|
||||
}
|
||||
|
||||
public static float FPMaxNum(float value1, float value2, AThreadState state)
|
||||
public static float FPMaxNum(float value1, float value2, CpuThreadState state)
|
||||
{
|
||||
Debug.WriteIf(state.Fpcr != 0, "ASoftFloat_32.FPMaxNum: ");
|
||||
|
||||
|
@ -874,7 +874,7 @@ namespace ChocolArm64.Instruction
|
|||
return FPMax(value1, value2, state);
|
||||
}
|
||||
|
||||
public static float FPMin(float value1, float value2, AThreadState state)
|
||||
public static float FPMin(float value1, float value2, CpuThreadState state)
|
||||
{
|
||||
Debug.WriteLineIf(state.Fpcr != 0, $"ASoftFloat_32.FPMin: State.Fpcr = 0x{state.Fpcr:X8}");
|
||||
|
||||
|
@ -920,7 +920,7 @@ namespace ChocolArm64.Instruction
|
|||
return result;
|
||||
}
|
||||
|
||||
public static float FPMinNum(float value1, float value2, AThreadState state)
|
||||
public static float FPMinNum(float value1, float value2, CpuThreadState state)
|
||||
{
|
||||
Debug.WriteIf(state.Fpcr != 0, "ASoftFloat_32.FPMinNum: ");
|
||||
|
||||
|
@ -939,7 +939,7 @@ namespace ChocolArm64.Instruction
|
|||
return FPMin(value1, value2, state);
|
||||
}
|
||||
|
||||
public static float FPMul(float value1, float value2, AThreadState state)
|
||||
public static float FPMul(float value1, float value2, CpuThreadState state)
|
||||
{
|
||||
Debug.WriteLineIf(state.Fpcr != 0, $"ASoftFloat_32.FPMul: State.Fpcr = 0x{state.Fpcr:X8}");
|
||||
|
||||
|
@ -976,7 +976,7 @@ namespace ChocolArm64.Instruction
|
|||
return result;
|
||||
}
|
||||
|
||||
public static float FPMulAdd(float valueA, float value1, float value2, AThreadState state)
|
||||
public static float FPMulAdd(float valueA, float value1, float value2, CpuThreadState state)
|
||||
{
|
||||
Debug.WriteLineIf(state.Fpcr != 0, $"ASoftFloat_32.FPMulAdd: State.Fpcr = 0x{state.Fpcr:X8}");
|
||||
|
||||
|
@ -1035,7 +1035,7 @@ namespace ChocolArm64.Instruction
|
|||
}
|
||||
|
||||
[MethodImpl(MethodImplOptions.AggressiveInlining)]
|
||||
public static float FPMulSub(float valueA, float value1, float value2, AThreadState state)
|
||||
public static float FPMulSub(float valueA, float value1, float value2, CpuThreadState state)
|
||||
{
|
||||
Debug.WriteIf(state.Fpcr != 0, "ASoftFloat_32.FPMulSub: ");
|
||||
|
||||
|
@ -1044,7 +1044,7 @@ namespace ChocolArm64.Instruction
|
|||
return FPMulAdd(valueA, value1, value2, state);
|
||||
}
|
||||
|
||||
public static float FPMulX(float value1, float value2, AThreadState state)
|
||||
public static float FPMulX(float value1, float value2, CpuThreadState state)
|
||||
{
|
||||
Debug.WriteLineIf(state.Fpcr != 0, $"ASoftFloat_32.FPMulX: State.Fpcr = 0x{state.Fpcr:X8}");
|
||||
|
||||
|
@ -1079,7 +1079,7 @@ namespace ChocolArm64.Instruction
|
|||
return result;
|
||||
}
|
||||
|
||||
public static float FPRecipStepFused(float value1, float value2, AThreadState state)
|
||||
public static float FPRecipStepFused(float value1, float value2, CpuThreadState state)
|
||||
{
|
||||
Debug.WriteLineIf(state.Fpcr != 0, $"ASoftFloat_32.FPRecipStepFused: State.Fpcr = 0x{state.Fpcr:X8}");
|
||||
|
||||
|
@ -1115,7 +1115,7 @@ namespace ChocolArm64.Instruction
|
|||
return result;
|
||||
}
|
||||
|
||||
public static float FPRecpX(float value, AThreadState state)
|
||||
public static float FPRecpX(float value, CpuThreadState state)
|
||||
{
|
||||
Debug.WriteLineIf(state.Fpcr != 0, $"ASoftFloat_32.FPRecpX: State.Fpcr = 0x{state.Fpcr:X8}");
|
||||
|
||||
|
@ -1139,7 +1139,7 @@ namespace ChocolArm64.Instruction
|
|||
return result;
|
||||
}
|
||||
|
||||
public static float FprSqrtStepFused(float value1, float value2, AThreadState state)
|
||||
public static float FprSqrtStepFused(float value1, float value2, CpuThreadState state)
|
||||
{
|
||||
Debug.WriteLineIf(state.Fpcr != 0, $"ASoftFloat_32.FPRSqrtStepFused: State.Fpcr = 0x{state.Fpcr:X8}");
|
||||
|
||||
|
@ -1175,7 +1175,7 @@ namespace ChocolArm64.Instruction
|
|||
return result;
|
||||
}
|
||||
|
||||
public static float FPSqrt(float value, AThreadState state)
|
||||
public static float FPSqrt(float value, CpuThreadState state)
|
||||
{
|
||||
Debug.WriteLineIf(state.Fpcr != 0, $"ASoftFloat_32.FPSqrt: State.Fpcr = 0x{state.Fpcr:X8}");
|
||||
|
||||
|
@ -1209,7 +1209,7 @@ namespace ChocolArm64.Instruction
|
|||
return result;
|
||||
}
|
||||
|
||||
public static float FPSub(float value1, float value2, AThreadState state)
|
||||
public static float FPSub(float value1, float value2, CpuThreadState state)
|
||||
{
|
||||
Debug.WriteLineIf(state.Fpcr != 0, $"ASoftFloat_32.FPSub: State.Fpcr = 0x{state.Fpcr:X8}");
|
||||
|
||||
|
@ -1325,7 +1325,7 @@ namespace ChocolArm64.Instruction
|
|||
FpType type2,
|
||||
uint op1,
|
||||
uint op2,
|
||||
AThreadState state,
|
||||
CpuThreadState state,
|
||||
out bool done)
|
||||
{
|
||||
done = true;
|
||||
|
@ -1359,7 +1359,7 @@ namespace ChocolArm64.Instruction
|
|||
uint op1,
|
||||
uint op2,
|
||||
uint op3,
|
||||
AThreadState state,
|
||||
CpuThreadState state,
|
||||
out bool done)
|
||||
{
|
||||
done = true;
|
||||
|
@ -1394,7 +1394,7 @@ namespace ChocolArm64.Instruction
|
|||
return FPZero(false);
|
||||
}
|
||||
|
||||
private static float FPProcessNaN(FpType type, uint op, AThreadState state)
|
||||
private static float FPProcessNaN(FpType type, uint op, CpuThreadState state)
|
||||
{
|
||||
if (type == FpType.SNaN)
|
||||
{
|
||||
|
@ -1411,7 +1411,7 @@ namespace ChocolArm64.Instruction
|
|||
return BitConverter.Int32BitsToSingle((int)op);
|
||||
}
|
||||
|
||||
private static void FPProcessException(FpExc exc, AThreadState state)
|
||||
private static void FPProcessException(FpExc exc, CpuThreadState state)
|
||||
{
|
||||
int enable = (int)exc + 8;
|
||||
|
||||
|
@ -1428,7 +1428,7 @@ namespace ChocolArm64.Instruction
|
|||
|
||||
static class ASoftFloat64
|
||||
{
|
||||
public static double FPAdd(double value1, double value2, AThreadState state)
|
||||
public static double FPAdd(double value1, double value2, CpuThreadState state)
|
||||
{
|
||||
Debug.WriteLineIf(state.Fpcr != 0, $"ASoftFloat_64.FPAdd: State.Fpcr = 0x{state.Fpcr:X8}");
|
||||
|
||||
|
@ -1469,7 +1469,7 @@ namespace ChocolArm64.Instruction
|
|||
return result;
|
||||
}
|
||||
|
||||
public static double FPDiv(double value1, double value2, AThreadState state)
|
||||
public static double FPDiv(double value1, double value2, CpuThreadState state)
|
||||
{
|
||||
Debug.WriteLineIf(state.Fpcr != 0, $"ASoftFloat_64.FPDiv: State.Fpcr = 0x{state.Fpcr:X8}");
|
||||
|
||||
|
@ -1508,7 +1508,7 @@ namespace ChocolArm64.Instruction
|
|||
return result;
|
||||
}
|
||||
|
||||
public static double FPMax(double value1, double value2, AThreadState state)
|
||||
public static double FPMax(double value1, double value2, CpuThreadState state)
|
||||
{
|
||||
Debug.WriteLineIf(state.Fpcr != 0, $"ASoftFloat_64.FPMax: State.Fpcr = 0x{state.Fpcr:X8}");
|
||||
|
||||
|
@ -1554,7 +1554,7 @@ namespace ChocolArm64.Instruction
|
|||
return result;
|
||||
}
|
||||
|
||||
public static double FPMaxNum(double value1, double value2, AThreadState state)
|
||||
public static double FPMaxNum(double value1, double value2, CpuThreadState state)
|
||||
{
|
||||
Debug.WriteIf(state.Fpcr != 0, "ASoftFloat_64.FPMaxNum: ");
|
||||
|
||||
|
@ -1573,7 +1573,7 @@ namespace ChocolArm64.Instruction
|
|||
return FPMax(value1, value2, state);
|
||||
}
|
||||
|
||||
public static double FPMin(double value1, double value2, AThreadState state)
|
||||
public static double FPMin(double value1, double value2, CpuThreadState state)
|
||||
{
|
||||
Debug.WriteLineIf(state.Fpcr != 0, $"ASoftFloat_64.FPMin: State.Fpcr = 0x{state.Fpcr:X8}");
|
||||
|
||||
|
@ -1619,7 +1619,7 @@ namespace ChocolArm64.Instruction
|
|||
return result;
|
||||
}
|
||||
|
||||
public static double FPMinNum(double value1, double value2, AThreadState state)
|
||||
public static double FPMinNum(double value1, double value2, CpuThreadState state)
|
||||
{
|
||||
Debug.WriteIf(state.Fpcr != 0, "ASoftFloat_64.FPMinNum: ");
|
||||
|
||||
|
@ -1638,7 +1638,7 @@ namespace ChocolArm64.Instruction
|
|||
return FPMin(value1, value2, state);
|
||||
}
|
||||
|
||||
public static double FPMul(double value1, double value2, AThreadState state)
|
||||
public static double FPMul(double value1, double value2, CpuThreadState state)
|
||||
{
|
||||
Debug.WriteLineIf(state.Fpcr != 0, $"ASoftFloat_64.FPMul: State.Fpcr = 0x{state.Fpcr:X8}");
|
||||
|
||||
|
@ -1675,7 +1675,7 @@ namespace ChocolArm64.Instruction
|
|||
return result;
|
||||
}
|
||||
|
||||
public static double FPMulAdd(double valueA, double value1, double value2, AThreadState state)
|
||||
public static double FPMulAdd(double valueA, double value1, double value2, CpuThreadState state)
|
||||
{
|
||||
Debug.WriteLineIf(state.Fpcr != 0, $"ASoftFloat_64.FPMulAdd: State.Fpcr = 0x{state.Fpcr:X8}");
|
||||
|
||||
|
@ -1734,7 +1734,7 @@ namespace ChocolArm64.Instruction
|
|||
}
|
||||
|
||||
[MethodImpl(MethodImplOptions.AggressiveInlining)]
|
||||
public static double FPMulSub(double valueA, double value1, double value2, AThreadState state)
|
||||
public static double FPMulSub(double valueA, double value1, double value2, CpuThreadState state)
|
||||
{
|
||||
Debug.WriteIf(state.Fpcr != 0, "ASoftFloat_64.FPMulSub: ");
|
||||
|
||||
|
@ -1743,7 +1743,7 @@ namespace ChocolArm64.Instruction
|
|||
return FPMulAdd(valueA, value1, value2, state);
|
||||
}
|
||||
|
||||
public static double FPMulX(double value1, double value2, AThreadState state)
|
||||
public static double FPMulX(double value1, double value2, CpuThreadState state)
|
||||
{
|
||||
Debug.WriteLineIf(state.Fpcr != 0, $"ASoftFloat_64.FPMulX: State.Fpcr = 0x{state.Fpcr:X8}");
|
||||
|
||||
|
@ -1778,7 +1778,7 @@ namespace ChocolArm64.Instruction
|
|||
return result;
|
||||
}
|
||||
|
||||
public static double FPRecipStepFused(double value1, double value2, AThreadState state)
|
||||
public static double FPRecipStepFused(double value1, double value2, CpuThreadState state)
|
||||
{
|
||||
Debug.WriteLineIf(state.Fpcr != 0, $"ASoftFloat_64.FPRecipStepFused: State.Fpcr = 0x{state.Fpcr:X8}");
|
||||
|
||||
|
@ -1814,7 +1814,7 @@ namespace ChocolArm64.Instruction
|
|||
return result;
|
||||
}
|
||||
|
||||
public static double FPRecpX(double value, AThreadState state)
|
||||
public static double FPRecpX(double value, CpuThreadState state)
|
||||
{
|
||||
Debug.WriteLineIf(state.Fpcr != 0, $"ASoftFloat_64.FPRecpX: State.Fpcr = 0x{state.Fpcr:X8}");
|
||||
|
||||
|
@ -1838,7 +1838,7 @@ namespace ChocolArm64.Instruction
|
|||
return result;
|
||||
}
|
||||
|
||||
public static double FprSqrtStepFused(double value1, double value2, AThreadState state)
|
||||
public static double FprSqrtStepFused(double value1, double value2, CpuThreadState state)
|
||||
{
|
||||
Debug.WriteLineIf(state.Fpcr != 0, $"ASoftFloat_64.FPRSqrtStepFused: State.Fpcr = 0x{state.Fpcr:X8}");
|
||||
|
||||
|
@ -1874,7 +1874,7 @@ namespace ChocolArm64.Instruction
|
|||
return result;
|
||||
}
|
||||
|
||||
public static double FPSqrt(double value, AThreadState state)
|
||||
public static double FPSqrt(double value, CpuThreadState state)
|
||||
{
|
||||
Debug.WriteLineIf(state.Fpcr != 0, $"ASoftFloat_64.FPSqrt: State.Fpcr = 0x{state.Fpcr:X8}");
|
||||
|
||||
|
@ -1908,7 +1908,7 @@ namespace ChocolArm64.Instruction
|
|||
return result;
|
||||
}
|
||||
|
||||
public static double FPSub(double value1, double value2, AThreadState state)
|
||||
public static double FPSub(double value1, double value2, CpuThreadState state)
|
||||
{
|
||||
Debug.WriteLineIf(state.Fpcr != 0, $"ASoftFloat_64.FPSub: State.Fpcr = 0x{state.Fpcr:X8}");
|
||||
|
||||
|
@ -2024,7 +2024,7 @@ namespace ChocolArm64.Instruction
|
|||
FpType type2,
|
||||
ulong op1,
|
||||
ulong op2,
|
||||
AThreadState state,
|
||||
CpuThreadState state,
|
||||
out bool done)
|
||||
{
|
||||
done = true;
|
||||
|
@ -2058,7 +2058,7 @@ namespace ChocolArm64.Instruction
|
|||
ulong op1,
|
||||
ulong op2,
|
||||
ulong op3,
|
||||
AThreadState state,
|
||||
CpuThreadState state,
|
||||
out bool done)
|
||||
{
|
||||
done = true;
|
||||
|
@ -2093,7 +2093,7 @@ namespace ChocolArm64.Instruction
|
|||
return FPZero(false);
|
||||
}
|
||||
|
||||
private static double FPProcessNaN(FpType type, ulong op, AThreadState state)
|
||||
private static double FPProcessNaN(FpType type, ulong op, CpuThreadState state)
|
||||
{
|
||||
if (type == FpType.SNaN)
|
||||
{
|
||||
|
@ -2110,7 +2110,7 @@ namespace ChocolArm64.Instruction
|
|||
return BitConverter.Int64BitsToDouble((long)op);
|
||||
}
|
||||
|
||||
private static void FPProcessException(FpExc exc, AThreadState state)
|
||||
private static void FPProcessException(FpExc exc, CpuThreadState state)
|
||||
{
|
||||
int enable = (int)exc + 8;
|
||||
|
||||
|
|
|
@ -105,7 +105,7 @@ namespace ChocolArm64.Instruction
|
|||
value < ulong.MinValue ? ulong.MinValue : (ulong)value;
|
||||
}
|
||||
|
||||
public static double Round(double value, AThreadState state)
|
||||
public static double Round(double value, CpuThreadState state)
|
||||
{
|
||||
switch (state.FPRoundingMode())
|
||||
{
|
||||
|
@ -118,7 +118,7 @@ namespace ChocolArm64.Instruction
|
|||
throw new InvalidOperationException();
|
||||
}
|
||||
|
||||
public static float RoundF(float value, AThreadState state)
|
||||
public static float RoundF(float value, CpuThreadState state)
|
||||
{
|
||||
switch (state.FPRoundingMode())
|
||||
{
|
||||
|
|
|
@ -9,7 +9,7 @@ namespace ChocolArm64.Instruction32
|
|||
{
|
||||
static partial class A32InstInterpret
|
||||
{
|
||||
public static void B(AThreadState state, AMemory memory, AOpCode opCode)
|
||||
public static void B(CpuThreadState state, MemoryManager memory, AOpCode opCode)
|
||||
{
|
||||
A32OpCodeBImmAl op = (A32OpCodeBImmAl)opCode;
|
||||
|
||||
|
@ -19,17 +19,17 @@ namespace ChocolArm64.Instruction32
|
|||
}
|
||||
}
|
||||
|
||||
public static void Bl(AThreadState state, AMemory memory, AOpCode opCode)
|
||||
public static void Bl(CpuThreadState state, MemoryManager memory, AOpCode opCode)
|
||||
{
|
||||
Blx(state, memory, opCode, false);
|
||||
}
|
||||
|
||||
public static void Blx(AThreadState state, AMemory memory, AOpCode opCode)
|
||||
public static void Blx(CpuThreadState state, MemoryManager memory, AOpCode opCode)
|
||||
{
|
||||
Blx(state, memory, opCode, true);
|
||||
}
|
||||
|
||||
public static void Blx(AThreadState state, AMemory memory, AOpCode opCode, bool x)
|
||||
public static void Blx(CpuThreadState state, MemoryManager memory, AOpCode opCode, bool x)
|
||||
{
|
||||
A32OpCodeBImmAl op = (A32OpCodeBImmAl)opCode;
|
||||
|
||||
|
@ -60,7 +60,7 @@ namespace ChocolArm64.Instruction32
|
|||
}
|
||||
}
|
||||
|
||||
private static void BranchWritePc(AThreadState state, uint pc)
|
||||
private static void BranchWritePc(CpuThreadState state, uint pc)
|
||||
{
|
||||
state.R15 = state.Thumb
|
||||
? pc & ~1U
|
||||
|
|
|
@ -6,7 +6,7 @@ namespace ChocolArm64.Instruction32
|
|||
{
|
||||
static class A32InstInterpretHelper
|
||||
{
|
||||
public static bool IsConditionTrue(AThreadState state, Cond cond)
|
||||
public static bool IsConditionTrue(CpuThreadState state, Cond cond)
|
||||
{
|
||||
switch (cond)
|
||||
{
|
||||
|
@ -29,7 +29,7 @@ namespace ChocolArm64.Instruction32
|
|||
return true;
|
||||
}
|
||||
|
||||
public unsafe static uint GetReg(AThreadState state, int reg)
|
||||
public unsafe static uint GetReg(CpuThreadState state, int reg)
|
||||
{
|
||||
if ((uint)reg > 15)
|
||||
{
|
||||
|
@ -42,7 +42,7 @@ namespace ChocolArm64.Instruction32
|
|||
}
|
||||
}
|
||||
|
||||
public unsafe static void SetReg(AThreadState state, int reg, uint value)
|
||||
public unsafe static void SetReg(CpuThreadState state, int reg, uint value)
|
||||
{
|
||||
if ((uint)reg > 15)
|
||||
{
|
||||
|
@ -55,7 +55,7 @@ namespace ChocolArm64.Instruction32
|
|||
}
|
||||
}
|
||||
|
||||
public static uint GetPc(AThreadState state)
|
||||
public static uint GetPc(CpuThreadState state)
|
||||
{
|
||||
//Due to the old fetch-decode-execute pipeline of old ARM CPUs,
|
||||
//the PC is 4 or 8 bytes (2 instructions) ahead of the current instruction.
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
namespace ChocolArm64.Memory
|
||||
{
|
||||
public interface IAMemory
|
||||
public interface IMemory
|
||||
{
|
||||
sbyte ReadSByte(long position);
|
||||
|
|
@ -5,9 +5,9 @@ using System.Text;
|
|||
|
||||
namespace ChocolArm64.Memory
|
||||
{
|
||||
public static class AMemoryHelper
|
||||
public static class MemoryHelper
|
||||
{
|
||||
public static void FillWithZeros(AMemory memory, long position, int size)
|
||||
public static void FillWithZeros(MemoryManager memory, long position, int size)
|
||||
{
|
||||
int size8 = size & ~(8 - 1);
|
||||
|
||||
|
@ -22,7 +22,7 @@ namespace ChocolArm64.Memory
|
|||
}
|
||||
}
|
||||
|
||||
public unsafe static T Read<T>(AMemory memory, long position) where T : struct
|
||||
public unsafe static T Read<T>(MemoryManager memory, long position) where T : struct
|
||||
{
|
||||
long size = Marshal.SizeOf<T>();
|
||||
|
||||
|
@ -33,7 +33,7 @@ namespace ChocolArm64.Memory
|
|||
return Marshal.PtrToStructure<T>(ptr);
|
||||
}
|
||||
|
||||
public unsafe static void Write<T>(AMemory memory, long position, T value) where T : struct
|
||||
public unsafe static void Write<T>(MemoryManager memory, long position, T value) where T : struct
|
||||
{
|
||||
long size = Marshal.SizeOf<T>();
|
||||
|
||||
|
@ -44,7 +44,7 @@ namespace ChocolArm64.Memory
|
|||
Marshal.StructureToPtr<T>(value, ptr, false);
|
||||
}
|
||||
|
||||
public static string ReadAsciiString(AMemory memory, long position, long maxSize = -1)
|
||||
public static string ReadAsciiString(MemoryManager memory, long position, long maxSize = -1)
|
||||
{
|
||||
using (MemoryStream ms = new MemoryStream())
|
||||
{
|
|
@ -12,7 +12,7 @@ using System.Threading;
|
|||
|
||||
namespace ChocolArm64.Memory
|
||||
{
|
||||
public unsafe class AMemory : IAMemory, IDisposable
|
||||
public unsafe class MemoryManager : IMemory, IDisposable
|
||||
{
|
||||
private const int PtLvl0Bits = 13;
|
||||
private const int PtLvl1Bits = 14;
|
||||
|
@ -29,7 +29,7 @@ namespace ChocolArm64.Memory
|
|||
private const int PtLvl0Bit = PtPageBits + PtLvl1Bits;
|
||||
private const int PtLvl1Bit = PtPageBits;
|
||||
|
||||
private const long ErgMask = (4 << AThreadState.ErgSizeLog2) - 1;
|
||||
private const long ErgMask = (4 << CpuThreadState.ErgSizeLog2) - 1;
|
||||
|
||||
private class ArmMonitor
|
||||
{
|
||||
|
@ -54,7 +54,7 @@ namespace ChocolArm64.Memory
|
|||
|
||||
public event EventHandler<InvalidAccessEventArgs> InvalidAccess;
|
||||
|
||||
public AMemory(IntPtr ram)
|
||||
public MemoryManager(IntPtr ram)
|
||||
{
|
||||
_monitors = new Dictionary<int, ArmMonitor>();
|
||||
|
|
@ -6,7 +6,7 @@ using System.Runtime.Intrinsics;
|
|||
|
||||
namespace ChocolArm64.State
|
||||
{
|
||||
public class AThreadState
|
||||
public class CpuThreadState
|
||||
{
|
||||
internal const int LrIndex = 30;
|
||||
internal const int ZrIndex = 31;
|
||||
|
@ -89,7 +89,7 @@ namespace ChocolArm64.State
|
|||
|
||||
private static double _hostTickFreq;
|
||||
|
||||
static AThreadState()
|
||||
static CpuThreadState()
|
||||
{
|
||||
_hostTickFreq = 1.0 / Stopwatch.Frequency;
|
||||
|
|
@ -43,10 +43,10 @@ namespace ChocolArm64.State
|
|||
{
|
||||
switch ((PState)Index)
|
||||
{
|
||||
case PState.VBit: return GetField(nameof(AThreadState.Overflow));
|
||||
case PState.CBit: return GetField(nameof(AThreadState.Carry));
|
||||
case PState.ZBit: return GetField(nameof(AThreadState.Zero));
|
||||
case PState.NBit: return GetField(nameof(AThreadState.Negative));
|
||||
case PState.VBit: return GetField(nameof(CpuThreadState.Overflow));
|
||||
case PState.CBit: return GetField(nameof(CpuThreadState.Carry));
|
||||
case PState.ZBit: return GetField(nameof(CpuThreadState.Zero));
|
||||
case PState.NBit: return GetField(nameof(CpuThreadState.Negative));
|
||||
}
|
||||
|
||||
throw new InvalidOperationException();
|
||||
|
@ -56,38 +56,38 @@ namespace ChocolArm64.State
|
|||
{
|
||||
switch (Index)
|
||||
{
|
||||
case 0: return GetField(nameof(AThreadState.X0));
|
||||
case 1: return GetField(nameof(AThreadState.X1));
|
||||
case 2: return GetField(nameof(AThreadState.X2));
|
||||
case 3: return GetField(nameof(AThreadState.X3));
|
||||
case 4: return GetField(nameof(AThreadState.X4));
|
||||
case 5: return GetField(nameof(AThreadState.X5));
|
||||
case 6: return GetField(nameof(AThreadState.X6));
|
||||
case 7: return GetField(nameof(AThreadState.X7));
|
||||
case 8: return GetField(nameof(AThreadState.X8));
|
||||
case 9: return GetField(nameof(AThreadState.X9));
|
||||
case 10: return GetField(nameof(AThreadState.X10));
|
||||
case 11: return GetField(nameof(AThreadState.X11));
|
||||
case 12: return GetField(nameof(AThreadState.X12));
|
||||
case 13: return GetField(nameof(AThreadState.X13));
|
||||
case 14: return GetField(nameof(AThreadState.X14));
|
||||
case 15: return GetField(nameof(AThreadState.X15));
|
||||
case 16: return GetField(nameof(AThreadState.X16));
|
||||
case 17: return GetField(nameof(AThreadState.X17));
|
||||
case 18: return GetField(nameof(AThreadState.X18));
|
||||
case 19: return GetField(nameof(AThreadState.X19));
|
||||
case 20: return GetField(nameof(AThreadState.X20));
|
||||
case 21: return GetField(nameof(AThreadState.X21));
|
||||
case 22: return GetField(nameof(AThreadState.X22));
|
||||
case 23: return GetField(nameof(AThreadState.X23));
|
||||
case 24: return GetField(nameof(AThreadState.X24));
|
||||
case 25: return GetField(nameof(AThreadState.X25));
|
||||
case 26: return GetField(nameof(AThreadState.X26));
|
||||
case 27: return GetField(nameof(AThreadState.X27));
|
||||
case 28: return GetField(nameof(AThreadState.X28));
|
||||
case 29: return GetField(nameof(AThreadState.X29));
|
||||
case 30: return GetField(nameof(AThreadState.X30));
|
||||
case 31: return GetField(nameof(AThreadState.X31));
|
||||
case 0: return GetField(nameof(CpuThreadState.X0));
|
||||
case 1: return GetField(nameof(CpuThreadState.X1));
|
||||
case 2: return GetField(nameof(CpuThreadState.X2));
|
||||
case 3: return GetField(nameof(CpuThreadState.X3));
|
||||
case 4: return GetField(nameof(CpuThreadState.X4));
|
||||
case 5: return GetField(nameof(CpuThreadState.X5));
|
||||
case 6: return GetField(nameof(CpuThreadState.X6));
|
||||
case 7: return GetField(nameof(CpuThreadState.X7));
|
||||
case 8: return GetField(nameof(CpuThreadState.X8));
|
||||
case 9: return GetField(nameof(CpuThreadState.X9));
|
||||
case 10: return GetField(nameof(CpuThreadState.X10));
|
||||
case 11: return GetField(nameof(CpuThreadState.X11));
|
||||
case 12: return GetField(nameof(CpuThreadState.X12));
|
||||
case 13: return GetField(nameof(CpuThreadState.X13));
|
||||
case 14: return GetField(nameof(CpuThreadState.X14));
|
||||
case 15: return GetField(nameof(CpuThreadState.X15));
|
||||
case 16: return GetField(nameof(CpuThreadState.X16));
|
||||
case 17: return GetField(nameof(CpuThreadState.X17));
|
||||
case 18: return GetField(nameof(CpuThreadState.X18));
|
||||
case 19: return GetField(nameof(CpuThreadState.X19));
|
||||
case 20: return GetField(nameof(CpuThreadState.X20));
|
||||
case 21: return GetField(nameof(CpuThreadState.X21));
|
||||
case 22: return GetField(nameof(CpuThreadState.X22));
|
||||
case 23: return GetField(nameof(CpuThreadState.X23));
|
||||
case 24: return GetField(nameof(CpuThreadState.X24));
|
||||
case 25: return GetField(nameof(CpuThreadState.X25));
|
||||
case 26: return GetField(nameof(CpuThreadState.X26));
|
||||
case 27: return GetField(nameof(CpuThreadState.X27));
|
||||
case 28: return GetField(nameof(CpuThreadState.X28));
|
||||
case 29: return GetField(nameof(CpuThreadState.X29));
|
||||
case 30: return GetField(nameof(CpuThreadState.X30));
|
||||
case 31: return GetField(nameof(CpuThreadState.X31));
|
||||
}
|
||||
|
||||
throw new InvalidOperationException();
|
||||
|
@ -97,38 +97,38 @@ namespace ChocolArm64.State
|
|||
{
|
||||
switch (Index)
|
||||
{
|
||||
case 0: return GetField(nameof(AThreadState.V0));
|
||||
case 1: return GetField(nameof(AThreadState.V1));
|
||||
case 2: return GetField(nameof(AThreadState.V2));
|
||||
case 3: return GetField(nameof(AThreadState.V3));
|
||||
case 4: return GetField(nameof(AThreadState.V4));
|
||||
case 5: return GetField(nameof(AThreadState.V5));
|
||||
case 6: return GetField(nameof(AThreadState.V6));
|
||||
case 7: return GetField(nameof(AThreadState.V7));
|
||||
case 8: return GetField(nameof(AThreadState.V8));
|
||||
case 9: return GetField(nameof(AThreadState.V9));
|
||||
case 10: return GetField(nameof(AThreadState.V10));
|
||||
case 11: return GetField(nameof(AThreadState.V11));
|
||||
case 12: return GetField(nameof(AThreadState.V12));
|
||||
case 13: return GetField(nameof(AThreadState.V13));
|
||||
case 14: return GetField(nameof(AThreadState.V14));
|
||||
case 15: return GetField(nameof(AThreadState.V15));
|
||||
case 16: return GetField(nameof(AThreadState.V16));
|
||||
case 17: return GetField(nameof(AThreadState.V17));
|
||||
case 18: return GetField(nameof(AThreadState.V18));
|
||||
case 19: return GetField(nameof(AThreadState.V19));
|
||||
case 20: return GetField(nameof(AThreadState.V20));
|
||||
case 21: return GetField(nameof(AThreadState.V21));
|
||||
case 22: return GetField(nameof(AThreadState.V22));
|
||||
case 23: return GetField(nameof(AThreadState.V23));
|
||||
case 24: return GetField(nameof(AThreadState.V24));
|
||||
case 25: return GetField(nameof(AThreadState.V25));
|
||||
case 26: return GetField(nameof(AThreadState.V26));
|
||||
case 27: return GetField(nameof(AThreadState.V27));
|
||||
case 28: return GetField(nameof(AThreadState.V28));
|
||||
case 29: return GetField(nameof(AThreadState.V29));
|
||||
case 30: return GetField(nameof(AThreadState.V30));
|
||||
case 31: return GetField(nameof(AThreadState.V31));
|
||||
case 0: return GetField(nameof(CpuThreadState.V0));
|
||||
case 1: return GetField(nameof(CpuThreadState.V1));
|
||||
case 2: return GetField(nameof(CpuThreadState.V2));
|
||||
case 3: return GetField(nameof(CpuThreadState.V3));
|
||||
case 4: return GetField(nameof(CpuThreadState.V4));
|
||||
case 5: return GetField(nameof(CpuThreadState.V5));
|
||||
case 6: return GetField(nameof(CpuThreadState.V6));
|
||||
case 7: return GetField(nameof(CpuThreadState.V7));
|
||||
case 8: return GetField(nameof(CpuThreadState.V8));
|
||||
case 9: return GetField(nameof(CpuThreadState.V9));
|
||||
case 10: return GetField(nameof(CpuThreadState.V10));
|
||||
case 11: return GetField(nameof(CpuThreadState.V11));
|
||||
case 12: return GetField(nameof(CpuThreadState.V12));
|
||||
case 13: return GetField(nameof(CpuThreadState.V13));
|
||||
case 14: return GetField(nameof(CpuThreadState.V14));
|
||||
case 15: return GetField(nameof(CpuThreadState.V15));
|
||||
case 16: return GetField(nameof(CpuThreadState.V16));
|
||||
case 17: return GetField(nameof(CpuThreadState.V17));
|
||||
case 18: return GetField(nameof(CpuThreadState.V18));
|
||||
case 19: return GetField(nameof(CpuThreadState.V19));
|
||||
case 20: return GetField(nameof(CpuThreadState.V20));
|
||||
case 21: return GetField(nameof(CpuThreadState.V21));
|
||||
case 22: return GetField(nameof(CpuThreadState.V22));
|
||||
case 23: return GetField(nameof(CpuThreadState.V23));
|
||||
case 24: return GetField(nameof(CpuThreadState.V24));
|
||||
case 25: return GetField(nameof(CpuThreadState.V25));
|
||||
case 26: return GetField(nameof(CpuThreadState.V26));
|
||||
case 27: return GetField(nameof(CpuThreadState.V27));
|
||||
case 28: return GetField(nameof(CpuThreadState.V28));
|
||||
case 29: return GetField(nameof(CpuThreadState.V29));
|
||||
case 30: return GetField(nameof(CpuThreadState.V30));
|
||||
case 31: return GetField(nameof(CpuThreadState.V31));
|
||||
}
|
||||
|
||||
throw new InvalidOperationException();
|
||||
|
@ -136,7 +136,7 @@ namespace ChocolArm64.State
|
|||
|
||||
private FieldInfo GetField(string name)
|
||||
{
|
||||
return typeof(AThreadState).GetField(name);
|
||||
return typeof(CpuThreadState).GetField(name);
|
||||
}
|
||||
}
|
||||
}
|
|
@ -11,7 +11,7 @@ namespace ChocolArm64
|
|||
{
|
||||
class TranslatedSub
|
||||
{
|
||||
private delegate long Aa64Subroutine(AThreadState register, AMemory memory);
|
||||
private delegate long Aa64Subroutine(CpuThreadState register, MemoryManager memory);
|
||||
|
||||
private const int MinCallCountForReJit = 250;
|
||||
|
||||
|
@ -68,11 +68,11 @@ namespace ChocolArm64
|
|||
|
||||
FixedArgTypes[index] = paramType;
|
||||
|
||||
if (paramType == typeof(AThreadState))
|
||||
if (paramType == typeof(CpuThreadState))
|
||||
{
|
||||
StateArgIdx = index;
|
||||
}
|
||||
else if (paramType == typeof(AMemory))
|
||||
else if (paramType == typeof(MemoryManager))
|
||||
{
|
||||
MemoryArgIdx = index;
|
||||
}
|
||||
|
@ -114,7 +114,7 @@ namespace ChocolArm64
|
|||
return _needsReJit;
|
||||
}
|
||||
|
||||
public long Execute(AThreadState threadState, AMemory memory)
|
||||
public long Execute(CpuThreadState threadState, MemoryManager memory)
|
||||
{
|
||||
return _execDelegate(threadState, memory);
|
||||
}
|
||||
|
|
|
@ -111,7 +111,7 @@ namespace ChocolArm64.Translation
|
|||
|
||||
EmitLdc_I4(CurrBlock.OpCodes.Count);
|
||||
|
||||
EmitPrivateCall(typeof(AThreadState), nameof(AThreadState.Synchronize));
|
||||
EmitPrivateCall(typeof(CpuThreadState), nameof(CpuThreadState.Synchronize));
|
||||
|
||||
EmitLdc_I4(0);
|
||||
|
||||
|
@ -358,7 +358,7 @@ namespace ChocolArm64.Translation
|
|||
|
||||
public void EmitLdintzr(int index)
|
||||
{
|
||||
if (index != AThreadState.ZrIndex)
|
||||
if (index != CpuThreadState.ZrIndex)
|
||||
{
|
||||
EmitLdint(index);
|
||||
}
|
||||
|
@ -370,7 +370,7 @@ namespace ChocolArm64.Translation
|
|||
|
||||
public void EmitStintzr(int index)
|
||||
{
|
||||
if (index != AThreadState.ZrIndex)
|
||||
if (index != CpuThreadState.ZrIndex)
|
||||
{
|
||||
EmitStint(index);
|
||||
}
|
||||
|
|
|
@ -21,13 +21,13 @@ namespace ChocolArm64
|
|||
_cache = new TranslatorCache();
|
||||
}
|
||||
|
||||
internal void ExecuteSubroutine(AThread thread, long position)
|
||||
internal void ExecuteSubroutine(CpuThread thread, long position)
|
||||
{
|
||||
//TODO: Both the execute A32/A64 methods should be merged on the future,
|
||||
//when both ISAs are implemented with the interpreter and JIT.
|
||||
//As of now, A32 only has a interpreter and A64 a JIT.
|
||||
AThreadState state = thread.ThreadState;
|
||||
AMemory memory = thread.Memory;
|
||||
CpuThreadState state = thread.ThreadState;
|
||||
MemoryManager memory = thread.Memory;
|
||||
|
||||
if (state.ExecutionMode == ExecutionMode.AArch32)
|
||||
{
|
||||
|
@ -39,7 +39,7 @@ namespace ChocolArm64
|
|||
}
|
||||
}
|
||||
|
||||
private void ExecuteSubroutineA32(AThreadState state, AMemory memory)
|
||||
private void ExecuteSubroutineA32(CpuThreadState state, MemoryManager memory)
|
||||
{
|
||||
do
|
||||
{
|
||||
|
@ -50,7 +50,7 @@ namespace ChocolArm64
|
|||
while (state.R15 != 0 && state.Running);
|
||||
}
|
||||
|
||||
private void ExecuteSubroutineA64(AThreadState state, AMemory memory, long position)
|
||||
private void ExecuteSubroutineA64(CpuThreadState state, MemoryManager memory, long position)
|
||||
{
|
||||
do
|
||||
{
|
||||
|
@ -79,7 +79,7 @@ namespace ChocolArm64
|
|||
return _cache.HasSubroutine(position);
|
||||
}
|
||||
|
||||
private TranslatedSub TranslateTier0(AThreadState state, AMemory memory, long position)
|
||||
private TranslatedSub TranslateTier0(CpuThreadState state, MemoryManager memory, long position)
|
||||
{
|
||||
Block block = ADecoder.DecodeBasicBlock(state, memory, position);
|
||||
|
||||
|
@ -106,7 +106,7 @@ namespace ChocolArm64
|
|||
return subroutine;
|
||||
}
|
||||
|
||||
private void TranslateTier1(AThreadState state, AMemory memory, long position)
|
||||
private void TranslateTier1(CpuThreadState state, MemoryManager memory, long position)
|
||||
{
|
||||
(Block[] graph, Block root) = ADecoder.DecodeSubroutine(_cache, state, memory, position);
|
||||
|
||||
|
|
|
@ -4,7 +4,7 @@ using System;
|
|||
|
||||
namespace Ryujinx.Graphics.Memory
|
||||
{
|
||||
public class NvGpuVmm : IAMemory, IGalMemory
|
||||
public class NvGpuVmm : IMemory, IGalMemory
|
||||
{
|
||||
public const long AddrSize = 1L << 40;
|
||||
|
||||
|
@ -23,7 +23,7 @@ namespace Ryujinx.Graphics.Memory
|
|||
private const int PTLvl0Bit = PTPageBits + PTLvl1Bits;
|
||||
private const int PTLvl1Bit = PTPageBits;
|
||||
|
||||
public AMemory Memory { get; private set; }
|
||||
public MemoryManager Memory { get; private set; }
|
||||
|
||||
private NvGpuVmmCache Cache;
|
||||
|
||||
|
@ -32,7 +32,7 @@ namespace Ryujinx.Graphics.Memory
|
|||
|
||||
private long[][] PageTable;
|
||||
|
||||
public NvGpuVmm(AMemory Memory)
|
||||
public NvGpuVmm(MemoryManager Memory)
|
||||
{
|
||||
this.Memory = Memory;
|
||||
|
||||
|
|
|
@ -12,7 +12,7 @@ namespace Ryujinx.Graphics.Memory
|
|||
CachedRanges = new ValueRangeSet<int>();
|
||||
}
|
||||
|
||||
public bool IsRegionModified(AMemory Memory, NvGpuBufferType BufferType, long PA, long Size)
|
||||
public bool IsRegionModified(MemoryManager Memory, NvGpuBufferType BufferType, long PA, long Size)
|
||||
{
|
||||
(bool[] Modified, long ModifiedCount) = Memory.IsRegionModified(PA, Size);
|
||||
|
||||
|
|
|
@ -216,9 +216,9 @@ namespace Ryujinx.Graphics.Texture
|
|||
throw new NotImplementedException(Format.ToString());
|
||||
}
|
||||
|
||||
public static byte[] ReadTexture(IAMemory Memory, GalImage Image, long Position)
|
||||
public static byte[] ReadTexture(IMemory Memory, GalImage Image, long Position)
|
||||
{
|
||||
AMemory CpuMemory;
|
||||
MemoryManager CpuMemory;
|
||||
|
||||
if (Memory is NvGpuVmm Vmm)
|
||||
{
|
||||
|
@ -226,7 +226,7 @@ namespace Ryujinx.Graphics.Texture
|
|||
}
|
||||
else
|
||||
{
|
||||
CpuMemory = (AMemory)Memory;
|
||||
CpuMemory = (MemoryManager)Memory;
|
||||
}
|
||||
|
||||
ISwizzle Swizzle = TextureHelper.GetSwizzle(Image);
|
||||
|
|
|
@ -27,8 +27,8 @@ namespace Ryujinx.Graphics.Texture
|
|||
}
|
||||
}
|
||||
|
||||
public static (AMemory Memory, long Position) GetMemoryAndPosition(
|
||||
IAMemory Memory,
|
||||
public static (MemoryManager Memory, long Position) GetMemoryAndPosition(
|
||||
IMemory Memory,
|
||||
long Position)
|
||||
{
|
||||
if (Memory is NvGpuVmm Vmm)
|
||||
|
@ -36,7 +36,7 @@ namespace Ryujinx.Graphics.Texture
|
|||
return (Vmm.Memory, Vmm.GetPhysicalAddress(Position));
|
||||
}
|
||||
|
||||
return ((AMemory)Memory, Position);
|
||||
return ((MemoryManager)Memory, Position);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
@ -8,7 +8,7 @@ namespace Ryujinx.HLE.HOS
|
|||
public const string TemporaryNroSuffix = ".ryu_tmp.nro";
|
||||
|
||||
//http://switchbrew.org/index.php?title=Homebrew_ABI
|
||||
public static void WriteHbAbiData(AMemory Memory, long Position, int MainThreadHandle, string SwitchPath)
|
||||
public static void WriteHbAbiData(MemoryManager Memory, long Position, int MainThreadHandle, string SwitchPath)
|
||||
{
|
||||
//MainThreadHandle.
|
||||
WriteConfigEntry(Memory, ref Position, 1, 0, MainThreadHandle);
|
||||
|
@ -31,7 +31,7 @@ namespace Ryujinx.HLE.HOS
|
|||
}
|
||||
|
||||
private static void WriteConfigEntry(
|
||||
AMemory Memory,
|
||||
MemoryManager Memory,
|
||||
ref long Position,
|
||||
int Key,
|
||||
int Flags = 0,
|
||||
|
@ -46,7 +46,7 @@ namespace Ryujinx.HLE.HOS
|
|||
Position += 0x18;
|
||||
}
|
||||
|
||||
public static string ReadHbAbiNextLoadPath(AMemory Memory, long Position)
|
||||
public static string ReadHbAbiNextLoadPath(MemoryManager Memory, long Position)
|
||||
{
|
||||
string FileName = null;
|
||||
|
||||
|
@ -59,7 +59,7 @@ namespace Ryujinx.HLE.HOS
|
|||
long Value0 = Memory.ReadInt64(Position + 0x08);
|
||||
long Value1 = Memory.ReadInt64(Position + 0x10);
|
||||
|
||||
FileName = AMemoryHelper.ReadAsciiString(Memory, Value0, Value1 - Value0);
|
||||
FileName = MemoryHelper.ReadAsciiString(Memory, Value0, Value1 - Value0);
|
||||
|
||||
break;
|
||||
}
|
||||
|
|
|
@ -10,7 +10,7 @@ namespace Ryujinx.HLE.HOS.Ipc
|
|||
public static long IpcCall(
|
||||
Switch Ns,
|
||||
Process Process,
|
||||
AMemory Memory,
|
||||
MemoryManager Memory,
|
||||
KSession Session,
|
||||
IpcMessage Request,
|
||||
long CmdPtr)
|
||||
|
|
|
@ -25,7 +25,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
|
||||
public long ArbitrateLock(
|
||||
Process Process,
|
||||
AMemory Memory,
|
||||
MemoryManager Memory,
|
||||
int OwnerHandle,
|
||||
long MutexAddress,
|
||||
int RequesterHandle)
|
||||
|
@ -80,7 +80,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
return (uint)CurrentThread.ObjSyncResult;
|
||||
}
|
||||
|
||||
public long ArbitrateUnlock(AMemory Memory, long MutexAddress)
|
||||
public long ArbitrateUnlock(MemoryManager Memory, long MutexAddress)
|
||||
{
|
||||
System.CriticalSectionLock.Lock();
|
||||
|
||||
|
@ -100,7 +100,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
}
|
||||
|
||||
public long WaitProcessWideKeyAtomic(
|
||||
AMemory Memory,
|
||||
MemoryManager Memory,
|
||||
long MutexAddress,
|
||||
long CondVarAddress,
|
||||
int ThreadHandle,
|
||||
|
@ -167,7 +167,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
return (uint)CurrentThread.ObjSyncResult;
|
||||
}
|
||||
|
||||
private (long, KThread) MutexUnlock(AMemory Memory, KThread CurrentThread, long MutexAddress)
|
||||
private (long, KThread) MutexUnlock(MemoryManager Memory, KThread CurrentThread, long MutexAddress)
|
||||
{
|
||||
KThread NewOwnerThread = CurrentThread.RelinquishMutex(MutexAddress, out int Count);
|
||||
|
||||
|
@ -198,7 +198,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
return (Result, NewOwnerThread);
|
||||
}
|
||||
|
||||
public void SignalProcessWideKey(Process Process, AMemory Memory, long Address, int Count)
|
||||
public void SignalProcessWideKey(Process Process, MemoryManager Memory, long Address, int Count)
|
||||
{
|
||||
Queue<KThread> SignaledThreads = new Queue<KThread>();
|
||||
|
||||
|
@ -227,7 +227,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
System.CriticalSectionLock.Unlock();
|
||||
}
|
||||
|
||||
private KThread TryAcquireMutex(Process Process, AMemory Memory, KThread Requester)
|
||||
private KThread TryAcquireMutex(Process Process, MemoryManager Memory, KThread Requester)
|
||||
{
|
||||
long Address = Requester.MutexAddress;
|
||||
|
||||
|
@ -301,7 +301,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
return MutexOwner;
|
||||
}
|
||||
|
||||
public long WaitForAddressIfEqual(AMemory Memory, long Address, int Value, long Timeout)
|
||||
public long WaitForAddressIfEqual(MemoryManager Memory, long Address, int Value, long Timeout)
|
||||
{
|
||||
KThread CurrentThread = System.Scheduler.GetCurrentThread();
|
||||
|
||||
|
@ -373,7 +373,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
}
|
||||
|
||||
public long WaitForAddressIfLessThan(
|
||||
AMemory Memory,
|
||||
MemoryManager Memory,
|
||||
long Address,
|
||||
int Value,
|
||||
bool ShouldDecrement,
|
||||
|
@ -507,7 +507,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
return 0;
|
||||
}
|
||||
|
||||
public long SignalAndIncrementIfEqual(AMemory Memory, long Address, int Value, int Count)
|
||||
public long SignalAndIncrementIfEqual(MemoryManager Memory, long Address, int Value, int Count)
|
||||
{
|
||||
System.CriticalSectionLock.Lock();
|
||||
|
||||
|
@ -552,7 +552,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
return 0;
|
||||
}
|
||||
|
||||
public long SignalAndModifyIfEqual(AMemory Memory, long Address, int Value, int Count)
|
||||
public long SignalAndModifyIfEqual(MemoryManager Memory, long Address, int Value, int Count)
|
||||
{
|
||||
System.CriticalSectionLock.Lock();
|
||||
|
||||
|
@ -649,7 +649,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
}
|
||||
}
|
||||
|
||||
private bool UserToKernelInt32(AMemory Memory, long Address, out int Value)
|
||||
private bool UserToKernelInt32(MemoryManager Memory, long Address, out int Value)
|
||||
{
|
||||
if (Memory.IsMapped(Address))
|
||||
{
|
||||
|
@ -663,7 +663,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
return false;
|
||||
}
|
||||
|
||||
private bool KernelToUserInt32(AMemory Memory, long Address, int Value)
|
||||
private bool KernelToUserInt32(MemoryManager Memory, long Address, int Value)
|
||||
{
|
||||
if (Memory.IsMapped(Address))
|
||||
{
|
||||
|
|
|
@ -13,7 +13,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
|
||||
private LinkedList<KMemoryBlock> Blocks;
|
||||
|
||||
private AMemory CpuMemory;
|
||||
private MemoryManager CpuMemory;
|
||||
|
||||
private ArenaAllocator Allocator;
|
||||
|
||||
|
|
|
@ -53,7 +53,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
|
||||
if (CoreContext.ContextSwitchNeeded)
|
||||
{
|
||||
AThread CurrentHleThread = CoreContext.CurrentThread?.Context;
|
||||
CpuThread CurrentHleThread = CoreContext.CurrentThread?.Context;
|
||||
|
||||
if (CurrentHleThread == null)
|
||||
{
|
||||
|
|
|
@ -9,7 +9,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
{
|
||||
class KThread : KSynchronizationObject, IKFutureSchedulerObject
|
||||
{
|
||||
public AThread Context { get; private set; }
|
||||
public CpuThread Context { get; private set; }
|
||||
|
||||
public long AffinityMask { get; set; }
|
||||
|
||||
|
@ -66,7 +66,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
public long LastPc { get; set; }
|
||||
|
||||
public KThread(
|
||||
AThread Thread,
|
||||
CpuThread Thread,
|
||||
Process Process,
|
||||
Horizon System,
|
||||
int ProcessorId,
|
||||
|
|
|
@ -10,14 +10,14 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
{
|
||||
partial class SvcHandler
|
||||
{
|
||||
private delegate void SvcFunc(AThreadState ThreadState);
|
||||
private delegate void SvcFunc(CpuThreadState ThreadState);
|
||||
|
||||
private Dictionary<int, SvcFunc> SvcFuncs;
|
||||
|
||||
private Switch Device;
|
||||
private Process Process;
|
||||
private Horizon System;
|
||||
private AMemory Memory;
|
||||
private MemoryManager Memory;
|
||||
|
||||
private struct HleIpcMessage
|
||||
{
|
||||
|
@ -103,7 +103,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
|
||||
public void SvcCall(object sender, InstExceptionEventArgs e)
|
||||
{
|
||||
AThreadState ThreadState = (AThreadState)sender;
|
||||
CpuThreadState ThreadState = (CpuThreadState)sender;
|
||||
|
||||
Process.GetThread(ThreadState.Tpidr).LastPc = e.Position;
|
||||
|
||||
|
|
|
@ -7,7 +7,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
{
|
||||
partial class SvcHandler
|
||||
{
|
||||
private void SvcSetHeapSize(AThreadState ThreadState)
|
||||
private void SvcSetHeapSize(CpuThreadState ThreadState)
|
||||
{
|
||||
ulong Size = ThreadState.X1;
|
||||
|
||||
|
@ -34,7 +34,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
}
|
||||
}
|
||||
|
||||
private void SvcSetMemoryAttribute(AThreadState ThreadState)
|
||||
private void SvcSetMemoryAttribute(CpuThreadState ThreadState)
|
||||
{
|
||||
long Position = (long)ThreadState.X0;
|
||||
long Size = (long)ThreadState.X1;
|
||||
|
@ -90,7 +90,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
ThreadState.X0 = (ulong)Result;
|
||||
}
|
||||
|
||||
private void SvcMapMemory(AThreadState ThreadState)
|
||||
private void SvcMapMemory(CpuThreadState ThreadState)
|
||||
{
|
||||
long Dst = (long)ThreadState.X0;
|
||||
long Src = (long)ThreadState.X1;
|
||||
|
@ -151,7 +151,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
ThreadState.X0 = (ulong)Result;
|
||||
}
|
||||
|
||||
private void SvcUnmapMemory(AThreadState ThreadState)
|
||||
private void SvcUnmapMemory(CpuThreadState ThreadState)
|
||||
{
|
||||
long Dst = (long)ThreadState.X0;
|
||||
long Src = (long)ThreadState.X1;
|
||||
|
@ -212,7 +212,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
ThreadState.X0 = (ulong)Result;
|
||||
}
|
||||
|
||||
private void SvcQueryMemory(AThreadState ThreadState)
|
||||
private void SvcQueryMemory(CpuThreadState ThreadState)
|
||||
{
|
||||
long InfoPtr = (long)ThreadState.X0;
|
||||
long Position = (long)ThreadState.X2;
|
||||
|
@ -232,7 +232,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
ThreadState.X1 = 0;
|
||||
}
|
||||
|
||||
private void SvcMapSharedMemory(AThreadState ThreadState)
|
||||
private void SvcMapSharedMemory(CpuThreadState ThreadState)
|
||||
{
|
||||
int Handle = (int)ThreadState.X0;
|
||||
long Position = (long)ThreadState.X1;
|
||||
|
@ -315,7 +315,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
ThreadState.X0 = (ulong)Result;
|
||||
}
|
||||
|
||||
private void SvcUnmapSharedMemory(AThreadState ThreadState)
|
||||
private void SvcUnmapSharedMemory(CpuThreadState ThreadState)
|
||||
{
|
||||
int Handle = (int)ThreadState.X0;
|
||||
long Position = (long)ThreadState.X1;
|
||||
|
@ -378,7 +378,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
ThreadState.X0 = (ulong)Result;
|
||||
}
|
||||
|
||||
private void SvcCreateTransferMemory(AThreadState ThreadState)
|
||||
private void SvcCreateTransferMemory(CpuThreadState ThreadState)
|
||||
{
|
||||
long Position = (long)ThreadState.X1;
|
||||
long Size = (long)ThreadState.X2;
|
||||
|
@ -431,7 +431,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
ThreadState.X1 = (ulong)Handle;
|
||||
}
|
||||
|
||||
private void SvcMapPhysicalMemory(AThreadState ThreadState)
|
||||
private void SvcMapPhysicalMemory(CpuThreadState ThreadState)
|
||||
{
|
||||
long Position = (long)ThreadState.X0;
|
||||
long Size = (long)ThreadState.X1;
|
||||
|
@ -482,7 +482,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
ThreadState.X0 = (ulong)Result;
|
||||
}
|
||||
|
||||
private void SvcUnmapPhysicalMemory(AThreadState ThreadState)
|
||||
private void SvcUnmapPhysicalMemory(CpuThreadState ThreadState)
|
||||
{
|
||||
long Position = (long)ThreadState.X0;
|
||||
long Size = (long)ThreadState.X1;
|
||||
|
|
|
@ -17,12 +17,12 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
|
||||
private const bool EnableProcessDebugging = false;
|
||||
|
||||
private void SvcExitProcess(AThreadState ThreadState)
|
||||
private void SvcExitProcess(CpuThreadState ThreadState)
|
||||
{
|
||||
Device.System.ExitProcess(Process.ProcessId);
|
||||
}
|
||||
|
||||
private void SignalEvent64(AThreadState ThreadState)
|
||||
private void SignalEvent64(CpuThreadState ThreadState)
|
||||
{
|
||||
ThreadState.X0 = (ulong)SignalEvent((int)ThreadState.X0);
|
||||
}
|
||||
|
@ -52,7 +52,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
return Result;
|
||||
}
|
||||
|
||||
private void ClearEvent64(AThreadState ThreadState)
|
||||
private void ClearEvent64(CpuThreadState ThreadState)
|
||||
{
|
||||
ThreadState.X0 = (ulong)ClearEvent((int)ThreadState.X0);
|
||||
}
|
||||
|
@ -82,7 +82,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
return Result;
|
||||
}
|
||||
|
||||
private void SvcCloseHandle(AThreadState ThreadState)
|
||||
private void SvcCloseHandle(CpuThreadState ThreadState)
|
||||
{
|
||||
int Handle = (int)ThreadState.X0;
|
||||
|
||||
|
@ -113,7 +113,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
ThreadState.X0 = 0;
|
||||
}
|
||||
|
||||
private void ResetSignal64(AThreadState ThreadState)
|
||||
private void ResetSignal64(CpuThreadState ThreadState)
|
||||
{
|
||||
ThreadState.X0 = (ulong)ResetSignal((int)ThreadState.X0);
|
||||
}
|
||||
|
@ -146,17 +146,17 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
return Result;
|
||||
}
|
||||
|
||||
private void SvcGetSystemTick(AThreadState ThreadState)
|
||||
private void SvcGetSystemTick(CpuThreadState ThreadState)
|
||||
{
|
||||
ThreadState.X0 = ThreadState.CntpctEl0;
|
||||
}
|
||||
|
||||
private void SvcConnectToNamedPort(AThreadState ThreadState)
|
||||
private void SvcConnectToNamedPort(CpuThreadState ThreadState)
|
||||
{
|
||||
long StackPtr = (long)ThreadState.X0;
|
||||
long NamePtr = (long)ThreadState.X1;
|
||||
|
||||
string Name = AMemoryHelper.ReadAsciiString(Memory, NamePtr, 8);
|
||||
string Name = MemoryHelper.ReadAsciiString(Memory, NamePtr, 8);
|
||||
|
||||
//TODO: Validate that app has perms to access the service, and that the service
|
||||
//actually exists, return error codes otherwise.
|
||||
|
@ -171,12 +171,12 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
ThreadState.X1 = (uint)Handle;
|
||||
}
|
||||
|
||||
private void SvcSendSyncRequest(AThreadState ThreadState)
|
||||
private void SvcSendSyncRequest(CpuThreadState ThreadState)
|
||||
{
|
||||
SendSyncRequest(ThreadState, ThreadState.Tpidr, 0x100, (int)ThreadState.X0);
|
||||
}
|
||||
|
||||
private void SvcSendSyncRequestWithUserBuffer(AThreadState ThreadState)
|
||||
private void SvcSendSyncRequestWithUserBuffer(CpuThreadState ThreadState)
|
||||
{
|
||||
SendSyncRequest(
|
||||
ThreadState,
|
||||
|
@ -185,7 +185,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
(int)ThreadState.X2);
|
||||
}
|
||||
|
||||
private void SendSyncRequest(AThreadState ThreadState, long MessagePtr, long Size, int Handle)
|
||||
private void SendSyncRequest(CpuThreadState ThreadState, long MessagePtr, long Size, int Handle)
|
||||
{
|
||||
KThread CurrThread = Process.GetThread(ThreadState.Tpidr);
|
||||
|
||||
|
@ -241,7 +241,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
IpcMessage.Thread.Reschedule(ThreadSchedState.Running);
|
||||
}
|
||||
|
||||
private void SvcBreak(AThreadState ThreadState)
|
||||
private void SvcBreak(CpuThreadState ThreadState)
|
||||
{
|
||||
long Reason = (long)ThreadState.X0;
|
||||
long Unknown = (long)ThreadState.X1;
|
||||
|
@ -260,19 +260,19 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
}
|
||||
}
|
||||
|
||||
private void SvcOutputDebugString(AThreadState ThreadState)
|
||||
private void SvcOutputDebugString(CpuThreadState ThreadState)
|
||||
{
|
||||
long Position = (long)ThreadState.X0;
|
||||
long Size = (long)ThreadState.X1;
|
||||
|
||||
string Str = AMemoryHelper.ReadAsciiString(Memory, Position, Size);
|
||||
string Str = MemoryHelper.ReadAsciiString(Memory, Position, Size);
|
||||
|
||||
Logger.PrintWarning(LogClass.KernelSvc, Str);
|
||||
|
||||
ThreadState.X0 = 0;
|
||||
}
|
||||
|
||||
private void SvcGetInfo(AThreadState ThreadState)
|
||||
private void SvcGetInfo(CpuThreadState ThreadState)
|
||||
{
|
||||
long StackPtr = (long)ThreadState.X0;
|
||||
int InfoType = (int)ThreadState.X1;
|
||||
|
@ -366,7 +366,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
ThreadState.X0 = 0;
|
||||
}
|
||||
|
||||
private void CreateEvent64(AThreadState State)
|
||||
private void CreateEvent64(CpuThreadState State)
|
||||
{
|
||||
KernelResult Result = CreateEvent(out int WEventHandle, out int REventHandle);
|
||||
|
||||
|
|
|
@ -7,7 +7,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
{
|
||||
partial class SvcHandler
|
||||
{
|
||||
private void SvcCreateThread(AThreadState ThreadState)
|
||||
private void SvcCreateThread(CpuThreadState ThreadState)
|
||||
{
|
||||
long EntryPoint = (long)ThreadState.X1;
|
||||
long ArgsPtr = (long)ThreadState.X2;
|
||||
|
@ -49,7 +49,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
ThreadState.X1 = (ulong)Handle;
|
||||
}
|
||||
|
||||
private void SvcStartThread(AThreadState ThreadState)
|
||||
private void SvcStartThread(CpuThreadState ThreadState)
|
||||
{
|
||||
int Handle = (int)ThreadState.X0;
|
||||
|
||||
|
@ -74,7 +74,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
}
|
||||
}
|
||||
|
||||
private void SvcExitThread(AThreadState ThreadState)
|
||||
private void SvcExitThread(CpuThreadState ThreadState)
|
||||
{
|
||||
KThread CurrentThread = System.Scheduler.GetCurrentThread();
|
||||
|
||||
|
@ -83,7 +83,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
System.Scheduler.StopThread(CurrentThread);
|
||||
}
|
||||
|
||||
private void SvcSleepThread(AThreadState ThreadState)
|
||||
private void SvcSleepThread(CpuThreadState ThreadState)
|
||||
{
|
||||
long Timeout = (long)ThreadState.X0;
|
||||
|
||||
|
@ -108,7 +108,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
}
|
||||
}
|
||||
|
||||
private void SvcGetThreadPriority(AThreadState ThreadState)
|
||||
private void SvcGetThreadPriority(CpuThreadState ThreadState)
|
||||
{
|
||||
int Handle = (int)ThreadState.X1;
|
||||
|
||||
|
@ -127,7 +127,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
}
|
||||
}
|
||||
|
||||
private void SvcSetThreadPriority(AThreadState ThreadState)
|
||||
private void SvcSetThreadPriority(CpuThreadState ThreadState)
|
||||
{
|
||||
int Handle = (int)ThreadState.X0;
|
||||
int Priority = (int)ThreadState.X1;
|
||||
|
@ -154,7 +154,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
ThreadState.X0 = 0;
|
||||
}
|
||||
|
||||
private void SvcGetThreadCoreMask(AThreadState ThreadState)
|
||||
private void SvcGetThreadCoreMask(CpuThreadState ThreadState)
|
||||
{
|
||||
int Handle = (int)ThreadState.X2;
|
||||
|
||||
|
@ -176,7 +176,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
}
|
||||
}
|
||||
|
||||
private void SvcSetThreadCoreMask(AThreadState ThreadState)
|
||||
private void SvcSetThreadCoreMask(CpuThreadState ThreadState)
|
||||
{
|
||||
int Handle = (int)ThreadState.X0;
|
||||
int PrefferedCore = (int)ThreadState.X1;
|
||||
|
@ -240,12 +240,12 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
ThreadState.X0 = (ulong)Result;
|
||||
}
|
||||
|
||||
private void SvcGetCurrentProcessorNumber(AThreadState ThreadState)
|
||||
private void SvcGetCurrentProcessorNumber(CpuThreadState ThreadState)
|
||||
{
|
||||
ThreadState.X0 = (ulong)Process.GetThread(ThreadState.Tpidr).CurrentCore;
|
||||
}
|
||||
|
||||
private void SvcGetThreadId(AThreadState ThreadState)
|
||||
private void SvcGetThreadId(CpuThreadState ThreadState)
|
||||
{
|
||||
int Handle = (int)ThreadState.X1;
|
||||
|
||||
|
@ -264,7 +264,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
}
|
||||
}
|
||||
|
||||
private void SvcSetThreadActivity(AThreadState ThreadState)
|
||||
private void SvcSetThreadActivity(CpuThreadState ThreadState)
|
||||
{
|
||||
int Handle = (int)ThreadState.X0;
|
||||
bool Pause = (int)ThreadState.X1 == 1;
|
||||
|
@ -299,7 +299,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
ThreadState.X0 = (ulong)Result;
|
||||
}
|
||||
|
||||
private void SvcGetThreadContext3(AThreadState ThreadState)
|
||||
private void SvcGetThreadContext3(CpuThreadState ThreadState)
|
||||
{
|
||||
long Position = (long)ThreadState.X0;
|
||||
int Handle = (int)ThreadState.X1;
|
||||
|
|
|
@ -8,7 +8,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
{
|
||||
partial class SvcHandler
|
||||
{
|
||||
private void SvcWaitSynchronization(AThreadState ThreadState)
|
||||
private void SvcWaitSynchronization(CpuThreadState ThreadState)
|
||||
{
|
||||
long HandlesPtr = (long)ThreadState.X1;
|
||||
int HandlesCount = (int)ThreadState.X2;
|
||||
|
@ -65,7 +65,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
ThreadState.X1 = (uint)HndIndex | High;
|
||||
}
|
||||
|
||||
private void SvcCancelSynchronization(AThreadState ThreadState)
|
||||
private void SvcCancelSynchronization(CpuThreadState ThreadState)
|
||||
{
|
||||
int ThreadHandle = (int)ThreadState.X0;
|
||||
|
||||
|
@ -87,7 +87,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
ThreadState.X0 = 0;
|
||||
}
|
||||
|
||||
private void SvcArbitrateLock(AThreadState ThreadState)
|
||||
private void SvcArbitrateLock(CpuThreadState ThreadState)
|
||||
{
|
||||
int OwnerHandle = (int)ThreadState.X0;
|
||||
long MutexAddress = (long)ThreadState.X1;
|
||||
|
@ -131,7 +131,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
ThreadState.X0 = (ulong)Result;
|
||||
}
|
||||
|
||||
private void SvcArbitrateUnlock(AThreadState ThreadState)
|
||||
private void SvcArbitrateUnlock(CpuThreadState ThreadState)
|
||||
{
|
||||
long MutexAddress = (long)ThreadState.X0;
|
||||
|
||||
|
@ -165,7 +165,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
ThreadState.X0 = (ulong)Result;
|
||||
}
|
||||
|
||||
private void SvcWaitProcessWideKeyAtomic(AThreadState ThreadState)
|
||||
private void SvcWaitProcessWideKeyAtomic(CpuThreadState ThreadState)
|
||||
{
|
||||
long MutexAddress = (long)ThreadState.X0;
|
||||
long CondVarAddress = (long)ThreadState.X1;
|
||||
|
@ -218,7 +218,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
ThreadState.X0 = (ulong)Result;
|
||||
}
|
||||
|
||||
private void SvcSignalProcessWideKey(AThreadState ThreadState)
|
||||
private void SvcSignalProcessWideKey(CpuThreadState ThreadState)
|
||||
{
|
||||
long Address = (long)ThreadState.X0;
|
||||
int Count = (int)ThreadState.X1;
|
||||
|
@ -232,7 +232,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
ThreadState.X0 = 0;
|
||||
}
|
||||
|
||||
private void SvcWaitForAddress(AThreadState ThreadState)
|
||||
private void SvcWaitForAddress(CpuThreadState ThreadState)
|
||||
{
|
||||
long Address = (long)ThreadState.X0;
|
||||
ArbitrationType Type = (ArbitrationType)ThreadState.X1;
|
||||
|
@ -292,7 +292,7 @@ namespace Ryujinx.HLE.HOS.Kernel
|
|||
ThreadState.X0 = (ulong)Result;
|
||||
}
|
||||
|
||||
private void SvcSignalToAddress(AThreadState ThreadState)
|
||||
private void SvcSignalToAddress(CpuThreadState ThreadState)
|
||||
{
|
||||
long Address = (long)ThreadState.X0;
|
||||
SignalType Type = (SignalType)ThreadState.X1;
|
||||
|
|
|
@ -35,7 +35,7 @@ namespace Ryujinx.HLE.HOS
|
|||
|
||||
private Translator Translator;
|
||||
|
||||
public AMemory Memory { get; private set; }
|
||||
public MemoryManager Memory { get; private set; }
|
||||
|
||||
public KMemoryManager MemoryManager { get; private set; }
|
||||
|
||||
|
@ -65,7 +65,7 @@ namespace Ryujinx.HLE.HOS
|
|||
this.MetaData = MetaData;
|
||||
this.ProcessId = ProcessId;
|
||||
|
||||
Memory = new AMemory(Device.Memory.RamPointer);
|
||||
Memory = new MemoryManager(Device.Memory.RamPointer);
|
||||
|
||||
Memory.InvalidAccess += CpuInvalidAccessHandler;
|
||||
|
||||
|
@ -221,7 +221,7 @@ namespace Ryujinx.HLE.HOS
|
|||
throw new ObjectDisposedException(nameof(Process));
|
||||
}
|
||||
|
||||
AThread CpuThread = new AThread(GetTranslator(), Memory, EntryPoint);
|
||||
CpuThread CpuThread = new CpuThread(GetTranslator(), Memory, EntryPoint);
|
||||
|
||||
long Tpidr = GetFreeTls();
|
||||
|
||||
|
@ -358,7 +358,7 @@ namespace Ryujinx.HLE.HOS
|
|||
}
|
||||
}
|
||||
|
||||
public void PrintStackTrace(AThreadState ThreadState)
|
||||
public void PrintStackTrace(CpuThreadState ThreadState)
|
||||
{
|
||||
StringBuilder Trace = new StringBuilder();
|
||||
|
||||
|
@ -457,7 +457,7 @@ namespace Ryujinx.HLE.HOS
|
|||
|
||||
private void ThreadFinished(object sender, EventArgs e)
|
||||
{
|
||||
if (sender is AThread Thread)
|
||||
if (sender is CpuThread Thread)
|
||||
{
|
||||
if (Threads.TryRemove(Thread.ThreadState.Tpidr, out KThread KernelThread))
|
||||
{
|
||||
|
|
|
@ -9,7 +9,7 @@ namespace Ryujinx.HLE.HOS
|
|||
{
|
||||
public Switch Device { get; private set; }
|
||||
public Process Process { get; private set; }
|
||||
public AMemory Memory { get; private set; }
|
||||
public MemoryManager Memory { get; private set; }
|
||||
public KSession Session { get; private set; }
|
||||
public IpcMessage Request { get; private set; }
|
||||
public IpcMessage Response { get; private set; }
|
||||
|
@ -19,7 +19,7 @@ namespace Ryujinx.HLE.HOS
|
|||
public ServiceCtx(
|
||||
Switch Device,
|
||||
Process Process,
|
||||
AMemory Memory,
|
||||
MemoryManager Memory,
|
||||
KSession Session,
|
||||
IpcMessage Request,
|
||||
IpcMessage Response,
|
||||
|
|
|
@ -41,7 +41,7 @@ namespace Ryujinx.HLE.HOS.Services.Acc
|
|||
|
||||
long Position = Context.Request.ReceiveBuff[0].Position;
|
||||
|
||||
AMemoryHelper.FillWithZeros(Context.Memory, Position, 0x80);
|
||||
MemoryHelper.FillWithZeros(Context.Memory, Position, 0x80);
|
||||
|
||||
Context.Memory.WriteInt32(Position, 0);
|
||||
Context.Memory.WriteInt32(Position + 4, 1);
|
||||
|
|
|
@ -105,7 +105,7 @@ namespace Ryujinx.HLE.HOS.Services.Aud.AudioOut
|
|||
{
|
||||
long Tag = Context.RequestData.ReadInt64();
|
||||
|
||||
AudioOutData Data = AMemoryHelper.Read<AudioOutData>(
|
||||
AudioOutData Data = MemoryHelper.Read<AudioOutData>(
|
||||
Context.Memory,
|
||||
Position);
|
||||
|
||||
|
|
|
@ -26,7 +26,7 @@ namespace Ryujinx.HLE.HOS.Services.Aud.AudioRenderer
|
|||
|
||||
private KEvent UpdateEvent;
|
||||
|
||||
private AMemory Memory;
|
||||
private MemoryManager Memory;
|
||||
|
||||
private IAalOutput AudioOut;
|
||||
|
||||
|
@ -42,7 +42,7 @@ namespace Ryujinx.HLE.HOS.Services.Aud.AudioRenderer
|
|||
|
||||
public IAudioRenderer(
|
||||
Horizon System,
|
||||
AMemory Memory,
|
||||
MemoryManager Memory,
|
||||
IAalOutput AudioOut,
|
||||
AudioRendererParameter Params)
|
||||
{
|
||||
|
@ -143,7 +143,7 @@ namespace Ryujinx.HLE.HOS.Services.Aud.AudioRenderer
|
|||
long OutputPosition = Context.Request.ReceiveBuff[0].Position;
|
||||
long OutputSize = Context.Request.ReceiveBuff[0].Size;
|
||||
|
||||
AMemoryHelper.FillWithZeros(Context.Memory, OutputPosition, (int)OutputSize);
|
||||
MemoryHelper.FillWithZeros(Context.Memory, OutputPosition, (int)OutputSize);
|
||||
|
||||
long InputPosition = Context.Request.SendBuff[0].Position;
|
||||
|
||||
|
|
|
@ -61,7 +61,7 @@ namespace Ryujinx.HLE.HOS.Services.Aud.AudioRenderer
|
|||
OutStatus.VoiceDropsCount = 0;
|
||||
}
|
||||
|
||||
public int[] GetBufferData(AMemory Memory, int MaxSamples, out int SamplesCount)
|
||||
public int[] GetBufferData(MemoryManager Memory, int MaxSamples, out int SamplesCount)
|
||||
{
|
||||
if (!Playing)
|
||||
{
|
||||
|
@ -118,7 +118,7 @@ namespace Ryujinx.HLE.HOS.Services.Aud.AudioRenderer
|
|||
return Output;
|
||||
}
|
||||
|
||||
private void UpdateBuffer(AMemory Memory)
|
||||
private void UpdateBuffer(MemoryManager Memory)
|
||||
{
|
||||
//TODO: Implement conversion for formats other
|
||||
//than interleaved stereo (2 channels).
|
||||
|
|
|
@ -96,7 +96,7 @@ namespace Ryujinx.HLE.HOS.Services.Aud
|
|||
|
||||
private long OpenAudioOutImpl(ServiceCtx Context, long SendPosition, long SendSize, long ReceivePosition, long ReceiveSize)
|
||||
{
|
||||
string DeviceName = AMemoryHelper.ReadAsciiString(
|
||||
string DeviceName = MemoryHelper.ReadAsciiString(
|
||||
Context.Memory,
|
||||
SendPosition,
|
||||
SendSize);
|
||||
|
|
|
@ -60,7 +60,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv
|
|||
{
|
||||
long NamePtr = Context.Request.SendBuff[0].Position;
|
||||
|
||||
string Name = AMemoryHelper.ReadAsciiString(Context.Memory, NamePtr);
|
||||
string Name = MemoryHelper.ReadAsciiString(Context.Memory, NamePtr);
|
||||
|
||||
int Fd = Fds.Add(Context.Process, new NvFd(Name));
|
||||
|
||||
|
|
|
@ -52,7 +52,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvGpuAS
|
|||
long InputPosition = Context.Request.GetBufferType0x21().Position;
|
||||
long OutputPosition = Context.Request.GetBufferType0x22().Position;
|
||||
|
||||
NvGpuASAllocSpace Args = AMemoryHelper.Read<NvGpuASAllocSpace>(Context.Memory, InputPosition);
|
||||
NvGpuASAllocSpace Args = MemoryHelper.Read<NvGpuASAllocSpace>(Context.Memory, InputPosition);
|
||||
|
||||
NvGpuASCtx ASCtx = GetASCtx(Context);
|
||||
|
||||
|
@ -88,7 +88,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvGpuAS
|
|||
}
|
||||
}
|
||||
|
||||
AMemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
MemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
|
||||
return Result;
|
||||
}
|
||||
|
@ -98,7 +98,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvGpuAS
|
|||
long InputPosition = Context.Request.GetBufferType0x21().Position;
|
||||
long OutputPosition = Context.Request.GetBufferType0x22().Position;
|
||||
|
||||
NvGpuASAllocSpace Args = AMemoryHelper.Read<NvGpuASAllocSpace>(Context.Memory, InputPosition);
|
||||
NvGpuASAllocSpace Args = MemoryHelper.Read<NvGpuASAllocSpace>(Context.Memory, InputPosition);
|
||||
|
||||
NvGpuASCtx ASCtx = GetASCtx(Context);
|
||||
|
||||
|
@ -130,7 +130,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvGpuAS
|
|||
long InputPosition = Context.Request.GetBufferType0x21().Position;
|
||||
long OutputPosition = Context.Request.GetBufferType0x22().Position;
|
||||
|
||||
NvGpuASUnmapBuffer Args = AMemoryHelper.Read<NvGpuASUnmapBuffer>(Context.Memory, InputPosition);
|
||||
NvGpuASUnmapBuffer Args = MemoryHelper.Read<NvGpuASUnmapBuffer>(Context.Memory, InputPosition);
|
||||
|
||||
NvGpuASCtx ASCtx = GetASCtx(Context);
|
||||
|
||||
|
@ -159,7 +159,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvGpuAS
|
|||
long InputPosition = Context.Request.GetBufferType0x21().Position;
|
||||
long OutputPosition = Context.Request.GetBufferType0x22().Position;
|
||||
|
||||
NvGpuASMapBufferEx Args = AMemoryHelper.Read<NvGpuASMapBufferEx>(Context.Memory, InputPosition);
|
||||
NvGpuASMapBufferEx Args = MemoryHelper.Read<NvGpuASMapBufferEx>(Context.Memory, InputPosition);
|
||||
|
||||
NvGpuASCtx ASCtx = GetASCtx(Context);
|
||||
|
||||
|
@ -255,7 +255,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvGpuAS
|
|||
}
|
||||
}
|
||||
|
||||
AMemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
MemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
|
||||
return Result;
|
||||
}
|
||||
|
@ -288,7 +288,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvGpuAS
|
|||
|
||||
for (int Index = 0; Index < Count; Index++, InputPosition += 0x14)
|
||||
{
|
||||
NvGpuASRemap Args = AMemoryHelper.Read<NvGpuASRemap>(Context.Memory, InputPosition);
|
||||
NvGpuASRemap Args = MemoryHelper.Read<NvGpuASRemap>(Context.Memory, InputPosition);
|
||||
|
||||
NvGpuVmm Vmm = GetASCtx(Context).Vmm;
|
||||
|
||||
|
|
|
@ -44,7 +44,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvGpuGpu
|
|||
|
||||
Args.Size = 1;
|
||||
|
||||
AMemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
MemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
|
||||
Logger.PrintStub(LogClass.ServiceNv, "Stubbed.");
|
||||
|
||||
|
@ -68,7 +68,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvGpuGpu
|
|||
Args.SubregionHeightAlignPixels = 0x40;
|
||||
Args.SubregionCount = 0x10;
|
||||
|
||||
AMemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
MemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
|
||||
Logger.PrintStub(LogClass.ServiceNv, "Stubbed.");
|
||||
|
||||
|
@ -90,7 +90,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvGpuGpu
|
|||
long InputPosition = Context.Request.GetBufferType0x21().Position;
|
||||
long OutputPosition = Context.Request.GetBufferType0x22().Position;
|
||||
|
||||
NvGpuGpuGetCharacteristics Args = AMemoryHelper.Read<NvGpuGpuGetCharacteristics>(Context.Memory, InputPosition);
|
||||
NvGpuGpuGetCharacteristics Args = MemoryHelper.Read<NvGpuGpuGetCharacteristics>(Context.Memory, InputPosition);
|
||||
|
||||
Args.BufferSize = 0xa0;
|
||||
|
||||
|
@ -130,7 +130,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvGpuGpu
|
|||
Args.ChipName = 0x6230326d67;
|
||||
Args.GrCompbitStoreBaseHw = 0x0;
|
||||
|
||||
AMemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
MemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
|
||||
return NvResult.Success;
|
||||
}
|
||||
|
@ -140,14 +140,14 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvGpuGpu
|
|||
long InputPosition = Context.Request.GetBufferType0x21().Position;
|
||||
long OutputPosition = Context.Request.GetBufferType0x22().Position;
|
||||
|
||||
NvGpuGpuGetTpcMasks Args = AMemoryHelper.Read<NvGpuGpuGetTpcMasks>(Context.Memory, InputPosition);
|
||||
NvGpuGpuGetTpcMasks Args = MemoryHelper.Read<NvGpuGpuGetTpcMasks>(Context.Memory, InputPosition);
|
||||
|
||||
if (Args.MaskBufferSize != 0)
|
||||
{
|
||||
Args.TpcMask = 3;
|
||||
}
|
||||
|
||||
AMemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
MemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
|
||||
return NvResult.Success;
|
||||
}
|
||||
|
@ -161,7 +161,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvGpuGpu
|
|||
Args.Slot = 0x07;
|
||||
Args.Mask = 0x01;
|
||||
|
||||
AMemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
MemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
|
||||
Logger.PrintStub(LogClass.ServiceNv, "Stubbed.");
|
||||
|
||||
|
|
|
@ -86,7 +86,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvHostChannel
|
|||
long InputPosition = Context.Request.GetBufferType0x21().Position;
|
||||
long OutputPosition = Context.Request.GetBufferType0x22().Position;
|
||||
|
||||
NvHostChannelSubmitGpfifo Args = AMemoryHelper.Read<NvHostChannelSubmitGpfifo>(Context.Memory, InputPosition);
|
||||
NvHostChannelSubmitGpfifo Args = MemoryHelper.Read<NvHostChannelSubmitGpfifo>(Context.Memory, InputPosition);
|
||||
|
||||
NvGpuVmm Vmm = NvGpuASIoctl.GetASCtx(Context).Vmm;;
|
||||
|
||||
|
@ -100,7 +100,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvHostChannel
|
|||
Args.SyncptId = 0;
|
||||
Args.SyncptValue = 0;
|
||||
|
||||
AMemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
MemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
|
||||
return NvResult.Success;
|
||||
}
|
||||
|
@ -160,7 +160,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvHostChannel
|
|||
long InputPosition = Context.Request.GetBufferType0x21().Position;
|
||||
long OutputPosition = Context.Request.GetBufferType0x22().Position;
|
||||
|
||||
NvHostChannelSubmitGpfifo Args = AMemoryHelper.Read<NvHostChannelSubmitGpfifo>(Context.Memory, InputPosition);
|
||||
NvHostChannelSubmitGpfifo Args = MemoryHelper.Read<NvHostChannelSubmitGpfifo>(Context.Memory, InputPosition);
|
||||
|
||||
NvGpuVmm Vmm = NvGpuASIoctl.GetASCtx(Context).Vmm;;
|
||||
|
||||
|
@ -174,7 +174,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvHostChannel
|
|||
Args.SyncptId = 0;
|
||||
Args.SyncptValue = 0;
|
||||
|
||||
AMemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
MemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
|
||||
return NvResult.Success;
|
||||
}
|
||||
|
|
|
@ -84,8 +84,8 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvHostCtrl
|
|||
long InputPosition = Context.Request.GetBufferType0x21().Position;
|
||||
long OutputPosition = Context.Request.GetBufferType0x22().Position;
|
||||
|
||||
string Domain = AMemoryHelper.ReadAsciiString(Context.Memory, InputPosition + 0, 0x41);
|
||||
string Name = AMemoryHelper.ReadAsciiString(Context.Memory, InputPosition + 0x41, 0x41);
|
||||
string Domain = MemoryHelper.ReadAsciiString(Context.Memory, InputPosition + 0, 0x41);
|
||||
string Name = MemoryHelper.ReadAsciiString(Context.Memory, InputPosition + 0x41, 0x41);
|
||||
|
||||
if (Set.NxSettings.Settings.TryGetValue($"{Domain}!{Name}", out object NvSetting))
|
||||
{
|
||||
|
@ -154,7 +154,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvHostCtrl
|
|||
long InputPosition = Context.Request.GetBufferType0x21().Position;
|
||||
long OutputPosition = Context.Request.GetBufferType0x22().Position;
|
||||
|
||||
NvHostCtrlSyncptRead Args = AMemoryHelper.Read<NvHostCtrlSyncptRead>(Context.Memory, InputPosition);
|
||||
NvHostCtrlSyncptRead Args = MemoryHelper.Read<NvHostCtrlSyncptRead>(Context.Memory, InputPosition);
|
||||
|
||||
if ((uint)Args.Id >= NvHostSyncpt.SyncptsCount)
|
||||
{
|
||||
|
@ -170,7 +170,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvHostCtrl
|
|||
Args.Value = GetUserCtx(Context).Syncpt.GetMin(Args.Id);
|
||||
}
|
||||
|
||||
AMemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
MemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
|
||||
return NvResult.Success;
|
||||
}
|
||||
|
@ -180,7 +180,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvHostCtrl
|
|||
long InputPosition = Context.Request.GetBufferType0x21().Position;
|
||||
long OutputPosition = Context.Request.GetBufferType0x22().Position;
|
||||
|
||||
NvHostCtrlSyncptWait Args = AMemoryHelper.Read<NvHostCtrlSyncptWait>(Context.Memory, InputPosition);
|
||||
NvHostCtrlSyncptWait Args = MemoryHelper.Read<NvHostCtrlSyncptWait>(Context.Memory, InputPosition);
|
||||
|
||||
NvHostSyncpt Syncpt = GetUserCtx(Context).Syncpt;
|
||||
|
||||
|
@ -248,7 +248,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvHostCtrl
|
|||
long InputPosition = Context.Request.GetBufferType0x21().Position;
|
||||
long OutputPosition = Context.Request.GetBufferType0x22().Position;
|
||||
|
||||
NvHostCtrlSyncptWaitEx Args = AMemoryHelper.Read<NvHostCtrlSyncptWaitEx>(Context.Memory, InputPosition);
|
||||
NvHostCtrlSyncptWaitEx Args = MemoryHelper.Read<NvHostCtrlSyncptWaitEx>(Context.Memory, InputPosition);
|
||||
|
||||
if ((uint)Args.Id >= NvHostSyncpt.SyncptsCount)
|
||||
{
|
||||
|
@ -257,7 +257,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvHostCtrl
|
|||
|
||||
void WriteArgs()
|
||||
{
|
||||
AMemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
MemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
}
|
||||
|
||||
NvHostSyncpt Syncpt = GetUserCtx(Context).Syncpt;
|
||||
|
|
|
@ -39,7 +39,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvMap
|
|||
long InputPosition = Context.Request.GetBufferType0x21().Position;
|
||||
long OutputPosition = Context.Request.GetBufferType0x22().Position;
|
||||
|
||||
NvMapCreate Args = AMemoryHelper.Read<NvMapCreate>(Context.Memory, InputPosition);
|
||||
NvMapCreate Args = MemoryHelper.Read<NvMapCreate>(Context.Memory, InputPosition);
|
||||
|
||||
if (Args.Size == 0)
|
||||
{
|
||||
|
@ -54,7 +54,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvMap
|
|||
|
||||
Logger.PrintInfo(LogClass.ServiceNv, $"Created map {Args.Handle} with size 0x{Size:x8}!");
|
||||
|
||||
AMemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
MemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
|
||||
return NvResult.Success;
|
||||
}
|
||||
|
@ -64,7 +64,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvMap
|
|||
long InputPosition = Context.Request.GetBufferType0x21().Position;
|
||||
long OutputPosition = Context.Request.GetBufferType0x22().Position;
|
||||
|
||||
NvMapFromId Args = AMemoryHelper.Read<NvMapFromId>(Context.Memory, InputPosition);
|
||||
NvMapFromId Args = MemoryHelper.Read<NvMapFromId>(Context.Memory, InputPosition);
|
||||
|
||||
NvMapHandle Map = GetNvMap(Context, Args.Id);
|
||||
|
||||
|
@ -79,7 +79,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvMap
|
|||
|
||||
Args.Handle = Args.Id;
|
||||
|
||||
AMemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
MemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
|
||||
return NvResult.Success;
|
||||
}
|
||||
|
@ -89,7 +89,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvMap
|
|||
long InputPosition = Context.Request.GetBufferType0x21().Position;
|
||||
long OutputPosition = Context.Request.GetBufferType0x22().Position;
|
||||
|
||||
NvMapAlloc Args = AMemoryHelper.Read<NvMapAlloc>(Context.Memory, InputPosition);
|
||||
NvMapAlloc Args = MemoryHelper.Read<NvMapAlloc>(Context.Memory, InputPosition);
|
||||
|
||||
NvMapHandle Map = GetNvMap(Context, Args.Handle);
|
||||
|
||||
|
@ -143,7 +143,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvMap
|
|||
}
|
||||
}
|
||||
|
||||
AMemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
MemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
|
||||
return Result;
|
||||
}
|
||||
|
@ -153,7 +153,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvMap
|
|||
long InputPosition = Context.Request.GetBufferType0x21().Position;
|
||||
long OutputPosition = Context.Request.GetBufferType0x22().Position;
|
||||
|
||||
NvMapFree Args = AMemoryHelper.Read<NvMapFree>(Context.Memory, InputPosition);
|
||||
NvMapFree Args = MemoryHelper.Read<NvMapFree>(Context.Memory, InputPosition);
|
||||
|
||||
NvMapHandle Map = GetNvMap(Context, Args.Handle);
|
||||
|
||||
|
@ -181,7 +181,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvMap
|
|||
|
||||
Args.Size = Map.Size;
|
||||
|
||||
AMemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
MemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
|
||||
return NvResult.Success;
|
||||
}
|
||||
|
@ -191,7 +191,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvMap
|
|||
long InputPosition = Context.Request.GetBufferType0x21().Position;
|
||||
long OutputPosition = Context.Request.GetBufferType0x22().Position;
|
||||
|
||||
NvMapParam Args = AMemoryHelper.Read<NvMapParam>(Context.Memory, InputPosition);
|
||||
NvMapParam Args = MemoryHelper.Read<NvMapParam>(Context.Memory, InputPosition);
|
||||
|
||||
NvMapHandle Map = GetNvMap(Context, Args.Handle);
|
||||
|
||||
|
@ -215,7 +215,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvMap
|
|||
default: return NvResult.InvalidInput;
|
||||
}
|
||||
|
||||
AMemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
MemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
|
||||
return NvResult.Success;
|
||||
}
|
||||
|
@ -225,7 +225,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvMap
|
|||
long InputPosition = Context.Request.GetBufferType0x21().Position;
|
||||
long OutputPosition = Context.Request.GetBufferType0x22().Position;
|
||||
|
||||
NvMapGetId Args = AMemoryHelper.Read<NvMapGetId>(Context.Memory, InputPosition);
|
||||
NvMapGetId Args = MemoryHelper.Read<NvMapGetId>(Context.Memory, InputPosition);
|
||||
|
||||
NvMapHandle Map = GetNvMap(Context, Args.Handle);
|
||||
|
||||
|
@ -238,7 +238,7 @@ namespace Ryujinx.HLE.HOS.Services.Nv.NvMap
|
|||
|
||||
Args.Id = Args.Handle;
|
||||
|
||||
AMemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
MemoryHelper.Write(Context.Memory, OutputPosition, Args);
|
||||
|
||||
return NvResult.Success;
|
||||
}
|
||||
|
|
|
@ -77,7 +77,7 @@ namespace Ryujinx.HLE.HOS.Services.Vi
|
|||
{
|
||||
long RecBuffPtr = Context.Request.ReceiveBuff[0].Position;
|
||||
|
||||
AMemoryHelper.FillWithZeros(Context.Memory, RecBuffPtr, 0x60);
|
||||
MemoryHelper.FillWithZeros(Context.Memory, RecBuffPtr, 0x60);
|
||||
|
||||
//Add only the default display to buffer
|
||||
Context.Memory.WriteBytes(RecBuffPtr, Encoding.ASCII.GetBytes("Default"));
|
||||
|
|
|
@ -13,7 +13,7 @@ namespace Ryujinx.HLE.Loaders
|
|||
{
|
||||
class Executable
|
||||
{
|
||||
private AMemory Memory;
|
||||
private MemoryManager Memory;
|
||||
|
||||
private List<ElfDyn> Dynamic;
|
||||
|
||||
|
@ -28,7 +28,7 @@ namespace Ryujinx.HLE.Loaders
|
|||
|
||||
private KMemoryManager MemoryManager;
|
||||
|
||||
public Executable(IExecutable Exe, KMemoryManager MemoryManager, AMemory Memory, long ImageBase)
|
||||
public Executable(IExecutable Exe, KMemoryManager MemoryManager, MemoryManager Memory, long ImageBase)
|
||||
{
|
||||
Dynamic = new List<ElfDyn>();
|
||||
|
||||
|
|
|
@ -5,11 +5,11 @@ namespace Ryujinx.HLE.Utilities
|
|||
{
|
||||
class StructReader
|
||||
{
|
||||
private AMemory Memory;
|
||||
private MemoryManager Memory;
|
||||
|
||||
public long Position { get; private set; }
|
||||
|
||||
public StructReader(AMemory Memory, long Position)
|
||||
public StructReader(MemoryManager Memory, long Position)
|
||||
{
|
||||
this.Memory = Memory;
|
||||
this.Position = Position;
|
||||
|
@ -17,7 +17,7 @@ namespace Ryujinx.HLE.Utilities
|
|||
|
||||
public T Read<T>() where T : struct
|
||||
{
|
||||
T Value = AMemoryHelper.Read<T>(Memory, Position);
|
||||
T Value = MemoryHelper.Read<T>(Memory, Position);
|
||||
|
||||
Position += Marshal.SizeOf<T>();
|
||||
|
||||
|
@ -34,7 +34,7 @@ namespace Ryujinx.HLE.Utilities
|
|||
|
||||
for (int Index = 0; Index < Count; Index++)
|
||||
{
|
||||
Output[Index] = AMemoryHelper.Read<T>(Memory, Position);
|
||||
Output[Index] = MemoryHelper.Read<T>(Memory, Position);
|
||||
|
||||
Position += StructSize;
|
||||
}
|
||||
|
|
|
@ -5,11 +5,11 @@ namespace Ryujinx.HLE.Utilities
|
|||
{
|
||||
class StructWriter
|
||||
{
|
||||
private AMemory Memory;
|
||||
private MemoryManager Memory;
|
||||
|
||||
public long Position { get; private set; }
|
||||
|
||||
public StructWriter(AMemory Memory, long Position)
|
||||
public StructWriter(MemoryManager Memory, long Position)
|
||||
{
|
||||
this.Memory = Memory;
|
||||
this.Position = Position;
|
||||
|
@ -17,7 +17,7 @@ namespace Ryujinx.HLE.Utilities
|
|||
|
||||
public void Write<T>(T Value) where T : struct
|
||||
{
|
||||
AMemoryHelper.Write(Memory, Position, Value);
|
||||
MemoryHelper.Write(Memory, Position, Value);
|
||||
|
||||
Position += Marshal.SizeOf<T>();
|
||||
}
|
||||
|
|
|
@ -24,8 +24,8 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
private IntPtr RamPointer;
|
||||
|
||||
private AMemory Memory;
|
||||
private AThread Thread;
|
||||
private MemoryManager Memory;
|
||||
private CpuThread Thread;
|
||||
|
||||
private static bool UnicornAvailable;
|
||||
private UnicornAArch64 UnicornEmu;
|
||||
|
@ -50,9 +50,9 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
Translator Translator = new Translator();
|
||||
RamPointer = Marshal.AllocHGlobal(new IntPtr(Size));
|
||||
Memory = new AMemory(RamPointer);
|
||||
Memory = new MemoryManager(RamPointer);
|
||||
Memory.Map(Position, 0, Size);
|
||||
Thread = new AThread(Translator, Memory, EntryPoint);
|
||||
Thread = new CpuThread(Translator, Memory, EntryPoint);
|
||||
|
||||
if (UnicornAvailable)
|
||||
{
|
||||
|
@ -158,9 +158,9 @@ namespace Ryujinx.Tests.Cpu
|
|||
}
|
||||
}
|
||||
|
||||
protected AThreadState GetThreadState() => Thread.ThreadState;
|
||||
protected CpuThreadState GetThreadState() => Thread.ThreadState;
|
||||
|
||||
protected AThreadState SingleOpcode(uint Opcode,
|
||||
protected CpuThreadState SingleOpcode(uint Opcode,
|
||||
ulong X0 = 0, ulong X1 = 0, ulong X2 = 0, ulong X3 = 0, ulong X31 = 0,
|
||||
Vector128<float> V0 = default(Vector128<float>),
|
||||
Vector128<float> V1 = default(Vector128<float>),
|
||||
|
|
|
@ -23,7 +23,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -39,7 +39,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -55,7 +55,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -71,7 +71,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -87,7 +87,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -103,7 +103,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -119,7 +119,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -135,7 +135,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -151,7 +151,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -167,7 +167,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -183,7 +183,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
|
|
@ -27,7 +27,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((shift & 3) << 22) | ((imm & 4095) << 10);
|
||||
|
||||
AThreadState ThreadState;
|
||||
CpuThreadState ThreadState;
|
||||
|
||||
if (Rn != 31)
|
||||
{
|
||||
|
@ -53,7 +53,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((shift & 3) << 22) | ((imm & 4095) << 10);
|
||||
|
||||
AThreadState ThreadState;
|
||||
CpuThreadState ThreadState;
|
||||
|
||||
if (Rn != 31)
|
||||
{
|
||||
|
@ -79,7 +79,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((shift & 3) << 22) | ((imm & 4095) << 10);
|
||||
|
||||
AThreadState ThreadState;
|
||||
CpuThreadState ThreadState;
|
||||
|
||||
if (Rn != 31)
|
||||
{
|
||||
|
@ -105,7 +105,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((shift & 3) << 22) | ((imm & 4095) << 10);
|
||||
|
||||
AThreadState ThreadState;
|
||||
CpuThreadState ThreadState;
|
||||
|
||||
if (Rn != 31)
|
||||
{
|
||||
|
@ -133,7 +133,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -152,7 +152,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -171,7 +171,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -190,7 +190,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -209,7 +209,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -228,7 +228,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -247,7 +247,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -266,7 +266,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -285,7 +285,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -304,7 +304,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -323,7 +323,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -342,7 +342,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -359,7 +359,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((shift & 3) << 22) | ((imm & 4095) << 10);
|
||||
|
||||
AThreadState ThreadState;
|
||||
CpuThreadState ThreadState;
|
||||
|
||||
if (Rn != 31)
|
||||
{
|
||||
|
@ -385,7 +385,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((shift & 3) << 22) | ((imm & 4095) << 10);
|
||||
|
||||
AThreadState ThreadState;
|
||||
CpuThreadState ThreadState;
|
||||
|
||||
if (Rn != 31)
|
||||
{
|
||||
|
@ -411,7 +411,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((shift & 3) << 22) | ((imm & 4095) << 10);
|
||||
|
||||
AThreadState ThreadState;
|
||||
CpuThreadState ThreadState;
|
||||
|
||||
if (Rn != 31)
|
||||
{
|
||||
|
@ -437,7 +437,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((shift & 3) << 22) | ((imm & 4095) << 10);
|
||||
|
||||
AThreadState ThreadState;
|
||||
CpuThreadState ThreadState;
|
||||
|
||||
if (Rn != 31)
|
||||
{
|
||||
|
|
|
@ -29,7 +29,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31, Carry: CarryIn);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31, Carry: CarryIn);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -49,7 +49,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31, Carry: CarryIn);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31, Carry: CarryIn);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -69,7 +69,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31, Carry: CarryIn);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31, Carry: CarryIn);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -89,7 +89,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31, Carry: CarryIn);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31, Carry: CarryIn);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -111,7 +111,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -133,7 +133,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -155,7 +155,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -177,7 +177,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -199,7 +199,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -221,7 +221,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -243,7 +243,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -265,7 +265,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -284,7 +284,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -303,7 +303,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -325,7 +325,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -347,7 +347,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -369,7 +369,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -391,7 +391,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -411,7 +411,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Xm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Xm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -429,7 +429,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -447,7 +447,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -465,7 +465,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -485,7 +485,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Xm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Xm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -503,7 +503,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -521,7 +521,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -539,7 +539,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -561,7 +561,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -583,7 +583,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -605,7 +605,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -627,7 +627,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -648,7 +648,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -669,7 +669,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -688,7 +688,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -707,7 +707,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -726,7 +726,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -745,7 +745,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -767,7 +767,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -789,7 +789,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -811,7 +811,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -833,7 +833,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -852,7 +852,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -871,7 +871,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -891,7 +891,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31, Carry: CarryIn);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31, Carry: CarryIn);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -911,7 +911,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31, Carry: CarryIn);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31, Carry: CarryIn);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -931,7 +931,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31, Carry: CarryIn);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31, Carry: CarryIn);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -951,7 +951,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31, Carry: CarryIn);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31, Carry: CarryIn);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -970,7 +970,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -989,7 +989,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1011,7 +1011,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1033,7 +1033,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1055,7 +1055,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1077,7 +1077,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1096,7 +1096,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1115,7 +1115,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
|
|
@ -27,7 +27,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rm & 31) << 16) | ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((extend & 7) << 13) | ((amount & 7) << 10);
|
||||
|
||||
AThreadState ThreadState;
|
||||
CpuThreadState ThreadState;
|
||||
|
||||
if (Rn != 31)
|
||||
{
|
||||
|
@ -59,7 +59,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rm & 31) << 16) | ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((extend & 7) << 13) | ((amount & 7) << 10);
|
||||
|
||||
AThreadState ThreadState;
|
||||
CpuThreadState ThreadState;
|
||||
|
||||
if (Rn != 31)
|
||||
{
|
||||
|
@ -91,7 +91,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rm & 31) << 16) | ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((extend & 7) << 13) | ((amount & 7) << 10);
|
||||
|
||||
AThreadState ThreadState;
|
||||
CpuThreadState ThreadState;
|
||||
|
||||
if (Rn != 31)
|
||||
{
|
||||
|
@ -123,7 +123,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rm & 31) << 16) | ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((extend & 7) << 13) | ((amount & 7) << 10);
|
||||
|
||||
AThreadState ThreadState;
|
||||
CpuThreadState ThreadState;
|
||||
|
||||
if (Rn != 31)
|
||||
{
|
||||
|
@ -155,7 +155,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rm & 31) << 16) | ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((extend & 7) << 13) | ((amount & 7) << 10);
|
||||
|
||||
AThreadState ThreadState;
|
||||
CpuThreadState ThreadState;
|
||||
|
||||
if (Rn != 31)
|
||||
{
|
||||
|
@ -187,7 +187,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rm & 31) << 16) | ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((extend & 7) << 13) | ((amount & 7) << 10);
|
||||
|
||||
AThreadState ThreadState;
|
||||
CpuThreadState ThreadState;
|
||||
|
||||
if (Rn != 31)
|
||||
{
|
||||
|
@ -219,7 +219,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rm & 31) << 16) | ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((extend & 7) << 13) | ((amount & 7) << 10);
|
||||
|
||||
AThreadState ThreadState;
|
||||
CpuThreadState ThreadState;
|
||||
|
||||
if (Rn != 31)
|
||||
{
|
||||
|
@ -250,7 +250,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rm & 31) << 16) | ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((extend & 7) << 13) | ((amount & 7) << 10);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn_SP, X2: Xm, X31: Xn_SP);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn_SP, X2: Xm, X31: Xn_SP);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -271,7 +271,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rm & 31) << 16) | ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((extend & 7) << 13) | ((amount & 7) << 10);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn_SP, X2: Wm, X31: Xn_SP);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn_SP, X2: Wm, X31: Xn_SP);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -292,7 +292,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rm & 31) << 16) | ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((extend & 7) << 13) | ((amount & 7) << 10);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn_SP, X2: Wm, X31: Xn_SP);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn_SP, X2: Wm, X31: Xn_SP);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -313,7 +313,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rm & 31) << 16) | ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((extend & 7) << 13) | ((amount & 7) << 10);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn_SP, X2: Wm, X31: Xn_SP);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn_SP, X2: Wm, X31: Xn_SP);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -334,7 +334,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rm & 31) << 16) | ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((extend & 7) << 13) | ((amount & 7) << 10);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn_WSP, X2: Wm, X31: Wn_WSP);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn_WSP, X2: Wm, X31: Wn_WSP);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -355,7 +355,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rm & 31) << 16) | ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((extend & 7) << 13) | ((amount & 7) << 10);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn_WSP, X2: Wm, X31: Wn_WSP);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn_WSP, X2: Wm, X31: Wn_WSP);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -376,7 +376,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rm & 31) << 16) | ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((extend & 7) << 13) | ((amount & 7) << 10);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn_WSP, X2: Wm, X31: Wn_WSP);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn_WSP, X2: Wm, X31: Wn_WSP);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -396,7 +396,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rm & 31) << 16) | ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((extend & 7) << 13) | ((amount & 7) << 10);
|
||||
|
||||
AThreadState ThreadState;
|
||||
CpuThreadState ThreadState;
|
||||
|
||||
if (Rn != 31)
|
||||
{
|
||||
|
@ -428,7 +428,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rm & 31) << 16) | ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((extend & 7) << 13) | ((amount & 7) << 10);
|
||||
|
||||
AThreadState ThreadState;
|
||||
CpuThreadState ThreadState;
|
||||
|
||||
if (Rn != 31)
|
||||
{
|
||||
|
@ -460,7 +460,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rm & 31) << 16) | ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((extend & 7) << 13) | ((amount & 7) << 10);
|
||||
|
||||
AThreadState ThreadState;
|
||||
CpuThreadState ThreadState;
|
||||
|
||||
if (Rn != 31)
|
||||
{
|
||||
|
@ -492,7 +492,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rm & 31) << 16) | ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((extend & 7) << 13) | ((amount & 7) << 10);
|
||||
|
||||
AThreadState ThreadState;
|
||||
CpuThreadState ThreadState;
|
||||
|
||||
if (Rn != 31)
|
||||
{
|
||||
|
@ -524,7 +524,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rm & 31) << 16) | ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((extend & 7) << 13) | ((amount & 7) << 10);
|
||||
|
||||
AThreadState ThreadState;
|
||||
CpuThreadState ThreadState;
|
||||
|
||||
if (Rn != 31)
|
||||
{
|
||||
|
@ -556,7 +556,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rm & 31) << 16) | ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((extend & 7) << 13) | ((amount & 7) << 10);
|
||||
|
||||
AThreadState ThreadState;
|
||||
CpuThreadState ThreadState;
|
||||
|
||||
if (Rn != 31)
|
||||
{
|
||||
|
@ -588,7 +588,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rm & 31) << 16) | ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((extend & 7) << 13) | ((amount & 7) << 10);
|
||||
|
||||
AThreadState ThreadState;
|
||||
CpuThreadState ThreadState;
|
||||
|
||||
if (Rn != 31)
|
||||
{
|
||||
|
@ -619,7 +619,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rm & 31) << 16) | ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((extend & 7) << 13) | ((amount & 7) << 10);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn_SP, X2: Xm, X31: Xn_SP);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn_SP, X2: Xm, X31: Xn_SP);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -640,7 +640,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rm & 31) << 16) | ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((extend & 7) << 13) | ((amount & 7) << 10);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn_SP, X2: Wm, X31: Xn_SP);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn_SP, X2: Wm, X31: Xn_SP);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -661,7 +661,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rm & 31) << 16) | ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((extend & 7) << 13) | ((amount & 7) << 10);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn_SP, X2: Wm, X31: Xn_SP);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn_SP, X2: Wm, X31: Xn_SP);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -682,7 +682,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rm & 31) << 16) | ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((extend & 7) << 13) | ((amount & 7) << 10);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn_SP, X2: Wm, X31: Xn_SP);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn_SP, X2: Wm, X31: Xn_SP);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -703,7 +703,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rm & 31) << 16) | ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((extend & 7) << 13) | ((amount & 7) << 10);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn_WSP, X2: Wm, X31: Wn_WSP);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn_WSP, X2: Wm, X31: Wn_WSP);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -724,7 +724,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rm & 31) << 16) | ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((extend & 7) << 13) | ((amount & 7) << 10);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn_WSP, X2: Wm, X31: Wn_WSP);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn_WSP, X2: Wm, X31: Wn_WSP);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -745,7 +745,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Opcode |= ((Rm & 31) << 16) | ((Rn & 31) << 5) | ((Rd & 31) << 0);
|
||||
Opcode |= ((extend & 7) << 13) | ((amount & 7) << 10);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn_WSP, X2: Wm, X31: Wn_WSP);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn_WSP, X2: Wm, X31: Wn_WSP);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
|
|
@ -29,7 +29,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X0: _Xd, X1: Xn, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X0: _Xd, X1: Xn, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -49,7 +49,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X0: _Wd, X1: Wn, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X0: _Wd, X1: Wn, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -68,7 +68,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -87,7 +87,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -106,7 +106,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -125,7 +125,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
|
|
@ -31,7 +31,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -53,7 +53,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -75,7 +75,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -97,7 +97,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
|
|
@ -32,7 +32,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -56,7 +56,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -80,7 +80,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -104,7 +104,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
|
|
@ -31,7 +31,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -55,7 +55,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -79,7 +79,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -103,7 +103,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -127,7 +127,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -151,7 +151,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -175,7 +175,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -199,7 +199,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
|
|
@ -262,7 +262,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
public void SanityCheck(ulong A)
|
||||
{
|
||||
uint Opcode = 0xD503201F; // NOP
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X0: A);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X0: A);
|
||||
|
||||
Assert.That(ThreadState.X0, Is.EqualTo(A));
|
||||
}
|
||||
|
|
|
@ -24,7 +24,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X0: _Xd, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X0: _Xd, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -41,7 +41,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X0: _Wd, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X0: _Wd, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -57,7 +57,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -73,7 +73,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -89,7 +89,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -105,7 +105,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
|
|
@ -29,7 +29,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X3: Xa, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X3: Xa, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -51,7 +51,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X3: Wa, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X3: Wa, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -73,7 +73,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X3: Xa, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X3: Xa, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -95,7 +95,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X3: Wa, X31: _W31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X3: Wa, X31: _W31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -117,7 +117,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X3: Xa, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X3: Xa, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -139,7 +139,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X3: Xa, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X3: Xa, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -161,7 +161,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X3: Xa, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X3: Xa, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -183,7 +183,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X3: Xa, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X2: Wm, X3: Xa, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -202,7 +202,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -221,7 +221,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X2: Xm, X31: _X31);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
|
|
@ -408,7 +408,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -427,7 +427,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -446,7 +446,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -463,7 +463,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -482,7 +482,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -501,7 +501,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -520,7 +520,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -539,7 +539,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -558,7 +558,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -577,7 +577,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -594,7 +594,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -613,7 +613,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -632,7 +632,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -649,7 +649,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -668,7 +668,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -687,7 +687,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -704,7 +704,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -723,7 +723,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -742,7 +742,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -759,7 +759,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -778,7 +778,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -797,7 +797,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -814,7 +814,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -833,7 +833,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -852,7 +852,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -869,7 +869,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -886,7 +886,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -899,7 +899,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE1(Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -912,7 +912,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -925,7 +925,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -938,7 +938,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE1(Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -957,7 +957,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A * Q);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -974,7 +974,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1001,7 +1001,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Fpcr |= Rnd & (1 << (int)FPCR.DN);
|
||||
Fpcr |= Rnd & (1 << (int)FPCR.AHP);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, Fpcr: Fpcr);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, Fpcr: Fpcr);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.IOC | FPSR.OFC | FPSR.UFC | FPSR.IXC);
|
||||
}
|
||||
|
@ -1021,7 +1021,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Q == 0u ? Z : 0ul, Q == 1u ? Z : 0ul);
|
||||
Vector128<float> V1 = MakeVectorE0E1(Q == 0u ? A : 0ul, Q == 1u ? A : 0ul);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1048,7 +1048,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Fpcr |= Rnd & (1 << (int)FPCR.DN);
|
||||
Fpcr |= Rnd & (1 << (int)FPCR.AHP);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, Fpcr: Fpcr);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, Fpcr: Fpcr);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.IOC | FPSR.OFC | FPSR.UFC | FPSR.IXC | FPSR.IDC);
|
||||
}
|
||||
|
@ -1068,7 +1068,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1083,7 +1083,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, Fpcr: Fpcr);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, Fpcr: Fpcr);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.IOC);
|
||||
}
|
||||
|
@ -1098,7 +1098,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, Fpcr: Fpcr);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, Fpcr: Fpcr);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.IOC);
|
||||
}
|
||||
|
@ -1119,7 +1119,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, Fpcr: Fpcr);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, Fpcr: Fpcr);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.IOC);
|
||||
}
|
||||
|
@ -1138,7 +1138,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, Fpcr: Fpcr);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, Fpcr: Fpcr);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.IOC);
|
||||
}
|
||||
|
@ -1155,7 +1155,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1174,7 +1174,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1193,7 +1193,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1210,7 +1210,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1227,7 +1227,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1244,7 +1244,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1261,7 +1261,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1278,7 +1278,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1295,7 +1295,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1314,7 +1314,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1333,7 +1333,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1352,7 +1352,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1371,7 +1371,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1390,7 +1390,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1409,7 +1409,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1428,7 +1428,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1447,7 +1447,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1464,7 +1464,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z0, Z1);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A0, A1);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1481,7 +1481,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z0, Z1);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A0, A1);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1500,7 +1500,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.QC);
|
||||
}
|
||||
|
@ -1519,7 +1519,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.QC);
|
||||
}
|
||||
|
@ -1538,7 +1538,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.QC);
|
||||
}
|
||||
|
@ -1557,7 +1557,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.QC);
|
||||
}
|
||||
|
@ -1576,7 +1576,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.QC);
|
||||
}
|
||||
|
@ -1595,7 +1595,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.QC);
|
||||
}
|
||||
|
@ -1614,7 +1614,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.QC);
|
||||
}
|
||||
|
@ -1633,7 +1633,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.QC);
|
||||
}
|
||||
|
@ -1652,7 +1652,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.QC);
|
||||
}
|
||||
|
@ -1671,7 +1671,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.QC);
|
||||
}
|
||||
|
@ -1690,7 +1690,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.QC);
|
||||
}
|
||||
|
@ -1709,7 +1709,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.QC);
|
||||
}
|
||||
|
@ -1728,7 +1728,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.QC);
|
||||
}
|
||||
|
@ -1747,7 +1747,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.QC);
|
||||
}
|
||||
|
@ -1766,7 +1766,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.QC);
|
||||
}
|
||||
|
@ -1785,7 +1785,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1804,7 +1804,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1823,7 +1823,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1842,7 +1842,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1861,7 +1861,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.QC);
|
||||
}
|
||||
|
@ -1880,7 +1880,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.QC);
|
||||
}
|
||||
|
@ -1899,7 +1899,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.QC);
|
||||
}
|
||||
|
@ -1918,7 +1918,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.QC);
|
||||
}
|
||||
|
@ -1937,7 +1937,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.QC);
|
||||
}
|
||||
|
@ -1956,7 +1956,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.QC);
|
||||
}
|
||||
|
@ -1975,7 +1975,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -1994,7 +1994,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
|
|
@ -21,7 +21,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V1: V1);
|
||||
|
||||
Assert.That(GetVectorE0(ThreadState.V0), Is.EqualTo(Result));
|
||||
|
||||
|
@ -78,7 +78,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
FpcrTemp = 0x2000000;
|
||||
}
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp);
|
||||
|
||||
Assert.That(GetVectorE0(ThreadState.V0), Is.EqualTo(Result));
|
||||
|
||||
|
@ -107,7 +107,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
FpcrTemp = 0x2000000;
|
||||
}
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp);
|
||||
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
|
@ -177,7 +177,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
FpcrTemp |= 1 << 25;
|
||||
}
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp);
|
||||
|
||||
Assert.That(GetVectorE0(ThreadState.V0), Is.EqualTo(Result));
|
||||
|
||||
|
@ -233,7 +233,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
FpcrTemp |= 1 << 25;
|
||||
}
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp);
|
||||
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
|
@ -294,7 +294,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
FpcrTemp = 0x2000000;
|
||||
}
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp);
|
||||
|
||||
Assert.That(GetVectorE0(ThreadState.V0), Is.EqualTo(Result));
|
||||
|
||||
|
@ -319,7 +319,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
FpcrTemp = 0x2000000;
|
||||
}
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp);
|
||||
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
|
@ -381,7 +381,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
FpcrTemp = 0x2000000;
|
||||
}
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp);
|
||||
|
||||
Assert.That(GetVectorE0(ThreadState.V0), Is.EqualTo(Result));
|
||||
|
||||
|
@ -409,7 +409,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
FpcrTemp = 0x2000000;
|
||||
}
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp);
|
||||
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
|
@ -470,7 +470,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
FpcrTemp = 0x2000000;
|
||||
}
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp);
|
||||
|
||||
Assert.That(GetVectorE0(ThreadState.V0), Is.EqualTo(Result));
|
||||
|
||||
|
@ -495,7 +495,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
FpcrTemp = 0x2000000;
|
||||
}
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp);
|
||||
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
|
@ -565,7 +565,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
FpcrTemp |= 1 << 25;
|
||||
}
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp);
|
||||
|
||||
Assert.That(GetVectorE0(ThreadState.V0), Is.EqualTo(Result));
|
||||
|
||||
|
@ -621,7 +621,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
FpcrTemp |= 1 << 25;
|
||||
}
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp);
|
||||
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
|
@ -639,7 +639,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V1: V1);
|
||||
|
||||
Assert.That(GetVectorE0(ThreadState.V0), Is.EqualTo(Result));
|
||||
|
||||
|
|
|
@ -26,7 +26,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(RoundKeyL ^ ValueL, RoundKeyH ^ ValueH);
|
||||
Vector128<float> V1 = MakeVectorE0E1(RoundKeyL, RoundKeyH);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
|
@ -58,7 +58,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(RoundKeyL ^ ValueL, RoundKeyH ^ ValueH);
|
||||
Vector128<float> V1 = MakeVectorE0E1(RoundKeyL, RoundKeyH);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
|
@ -87,7 +87,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
Vector128<float> V = MakeVectorE0E1(ValueL, ValueH);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(
|
||||
CpuThreadState ThreadState = SingleOpcode(
|
||||
Opcode,
|
||||
V0: Rn == 0u ? V : default(Vector128<float>),
|
||||
V1: Rn == 1u ? V : default(Vector128<float>));
|
||||
|
@ -122,7 +122,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
Vector128<float> V = MakeVectorE0E1(ValueL, ValueH);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(
|
||||
CpuThreadState ThreadState = SingleOpcode(
|
||||
Opcode,
|
||||
V0: Rn == 0u ? V : default(Vector128<float>),
|
||||
V1: Rn == 1u ? V : default(Vector128<float>));
|
||||
|
|
|
@ -70,7 +70,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
ulong Z = TestContext.CurrentContext.Random.NextULong();
|
||||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, V0: V0);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, V0: V0);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -86,7 +86,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
ulong Z = TestContext.CurrentContext.Random.NextULong();
|
||||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, V0: V0);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, V0: V0);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -108,7 +108,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X0: _X0, X31: _W31, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X0: _X0, X31: _W31, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -129,7 +129,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X31: _X31, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X31: _X31, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -151,7 +151,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X0: _X0, X31: _W31, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X0: _X0, X31: _W31, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -172,7 +172,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, X31: _X31, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, X31: _X31, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
|
File diff suppressed because it is too large
Load diff
|
@ -74,7 +74,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V1 = MakeVectorE0E1(A, A * Q);
|
||||
Vector128<float> V2 = MakeVectorE0E1(B, B * H);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -101,7 +101,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V1 = MakeVectorE0E1(A, A * Q);
|
||||
Vector128<float> V2 = MakeVectorE0E1(B, B * H);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
|
|
@ -238,7 +238,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2, Fpcr: Fpcr);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2, Fpcr: Fpcr);
|
||||
|
||||
CompareAgainstUnicorn(FPSR.IOC, FpSkips.IfUnderflow, FpTolerances.UpToOneUlps_S);
|
||||
}
|
||||
|
@ -260,7 +260,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2, Fpcr: Fpcr);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2, Fpcr: Fpcr);
|
||||
|
||||
CompareAgainstUnicorn(FPSR.IOC, FpSkips.IfUnderflow, FpTolerances.UpToOneUlps_D);
|
||||
}
|
||||
|
@ -289,7 +289,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2, Fpcr: Fpcr);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2, Fpcr: Fpcr);
|
||||
|
||||
CompareAgainstUnicorn(FPSR.IOC, FpSkips.IfUnderflow, FpTolerances.UpToOneUlps_S);
|
||||
}
|
||||
|
@ -315,7 +315,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2, Fpcr: Fpcr);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2, Fpcr: Fpcr);
|
||||
|
||||
CompareAgainstUnicorn(FPSR.IOC, FpSkips.IfUnderflow, FpTolerances.UpToOneUlps_D);
|
||||
}
|
||||
|
@ -338,7 +338,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2, Fpcr: Fpcr);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2, Fpcr: Fpcr);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.IOC);
|
||||
}
|
||||
|
@ -360,7 +360,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2, Fpcr: Fpcr);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2, Fpcr: Fpcr);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.IOC);
|
||||
}
|
||||
|
@ -389,7 +389,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2, Fpcr: Fpcr);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2, Fpcr: Fpcr);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.IOC);
|
||||
}
|
||||
|
@ -415,7 +415,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2, Fpcr: Fpcr);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2, Fpcr: Fpcr);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.IOC);
|
||||
}
|
||||
|
|
|
@ -251,7 +251,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -274,7 +274,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A * Q);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -297,7 +297,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A * Q);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -320,7 +320,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A * Q);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -341,7 +341,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -362,7 +362,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -385,7 +385,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A * Q);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -408,7 +408,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A * Q);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -431,7 +431,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A * Q);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -452,7 +452,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -475,7 +475,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -498,7 +498,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -521,7 +521,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0E1(A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
@ -542,7 +542,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.QC);
|
||||
}
|
||||
|
@ -563,7 +563,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.QC);
|
||||
}
|
||||
|
@ -584,7 +584,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.QC);
|
||||
}
|
||||
|
@ -607,7 +607,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.QC);
|
||||
}
|
||||
|
@ -630,7 +630,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.QC);
|
||||
}
|
||||
|
@ -653,7 +653,7 @@ namespace Ryujinx.Tests.Cpu
|
|||
Vector128<float> V0 = MakeVectorE0E1(Z, Z);
|
||||
Vector128<float> V1 = MakeVectorE0(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1);
|
||||
|
||||
CompareAgainstUnicorn(FpsrMask: FPSR.QC);
|
||||
}
|
||||
|
|
Loading…
Add table
Reference in a new issue