diff --git a/ChocolArm64/Decoders/Block.cs b/ChocolArm64/Decoders/Block.cs
index c0b3246153..c89ea7c6fb 100644
--- a/ChocolArm64/Decoders/Block.cs
+++ b/ChocolArm64/Decoders/Block.cs
@@ -10,11 +10,11 @@ namespace ChocolArm64.Decoders
         public Block Next   { get; set; }
         public Block Branch { get; set; }
 
-        public List<AOpCode> OpCodes { get; private set; }
+        public List<OpCode64> OpCodes { get; private set; }
 
         public Block()
         {
-            OpCodes = new List<AOpCode>();
+            OpCodes = new List<OpCode64>();
         }
 
         public Block(long position) : this()
@@ -22,7 +22,7 @@ namespace ChocolArm64.Decoders
             Position = position;
         }
 
-        public AOpCode GetLastOp()
+        public OpCode64 GetLastOp()
         {
             if (OpCodes.Count > 0)
             {
diff --git a/ChocolArm64/Decoders/Decoder.cs b/ChocolArm64/Decoders/Decoder.cs
index 4f00b7e49e..db43ac4fe8 100644
--- a/ChocolArm64/Decoders/Decoder.cs
+++ b/ChocolArm64/Decoders/Decoder.cs
@@ -69,9 +69,9 @@ namespace ChocolArm64.Decoders
                 {
                     bool hasCachedSub = false;
 
-                    AOpCode lastOp = current.GetLastOp();
+                    OpCode64 lastOp = current.GetLastOp();
 
-                    if (lastOp is OpCodeBImm op)
+                    if (lastOp is OpCodeBImm64 op)
                     {
                         if (op.Emitter == InstEmit.Bl)
                         {
@@ -83,8 +83,8 @@ namespace ChocolArm64.Decoders
                         }
                     }
 
-                    if (!((lastOp is OpCodeBImmAl) ||
-                          (lastOp is OpCodeBReg)) || hasCachedSub)
+                    if (!((lastOp is OpCodeBImmAl64) ||
+                          (lastOp is OpCodeBReg64)) || hasCachedSub)
                     {
                         current.Next = Enqueue(current.EndPosition);
                     }
@@ -151,7 +151,7 @@ namespace ChocolArm64.Decoders
         {
             long position = block.Position;
 
-            AOpCode opCode;
+            OpCode64 opCode;
 
             do
             {
@@ -168,20 +168,20 @@ namespace ChocolArm64.Decoders
             block.EndPosition = position;
         }
 
-        private static bool IsBranch(AOpCode opCode)
+        private static bool IsBranch(OpCode64 opCode)
         {
-            return opCode is OpCodeBImm ||
-                   opCode is OpCodeBReg;
+            return opCode is OpCodeBImm64 ||
+                   opCode is OpCodeBReg64;
         }
 
-        private static bool IsException(AOpCode opCode)
+        private static bool IsException(OpCode64 opCode)
         {
             return opCode.Emitter == InstEmit.Brk ||
                    opCode.Emitter == InstEmit.Svc ||
                    opCode.Emitter == InstEmit.Und;
         }
 
-        public static AOpCode DecodeOpCode(CpuThreadState state, MemoryManager memory, long position)
+        public static OpCode64 DecodeOpCode(CpuThreadState state, MemoryManager memory, long position)
         {
             int opCode = memory.ReadInt32(position);
 
@@ -197,7 +197,7 @@ namespace ChocolArm64.Decoders
                 inst = OpCodeTable.GetInstA32(opCode);
             }
 
-            AOpCode decodedOpCode = new AOpCode(Inst.Undefined, position, opCode);
+            OpCode64 decodedOpCode = new OpCode64(Inst.Undefined, position, opCode);
 
             if (inst.Type != null)
             {
@@ -207,7 +207,7 @@ namespace ChocolArm64.Decoders
             return decodedOpCode;
         }
 
-        private static AOpCode MakeOpCode(Type type, Inst inst, long position, int opCode)
+        private static OpCode64 MakeOpCode(Type type, Inst inst, long position, int opCode)
         {
             if (type == null)
             {
@@ -216,7 +216,7 @@ namespace ChocolArm64.Decoders
 
             OpActivator createInstance = _opActivators.GetOrAdd(type, CacheOpActivator);
 
-            return (AOpCode)createInstance(inst, position, opCode);
+            return (OpCode64)createInstance(inst, position, opCode);
         }
 
         private static OpActivator CacheOpActivator(Type type)
diff --git a/ChocolArm64/Decoders/IOpCode.cs b/ChocolArm64/Decoders/IOpCode64.cs
similarity index 90%
rename from ChocolArm64/Decoders/IOpCode.cs
rename to ChocolArm64/Decoders/IOpCode64.cs
index a381b7217c..e940712311 100644
--- a/ChocolArm64/Decoders/IOpCode.cs
+++ b/ChocolArm64/Decoders/IOpCode64.cs
@@ -3,7 +3,7 @@ using ChocolArm64.State;
 
 namespace ChocolArm64.Decoders
 {
-    interface IOpCode
+    interface IOpCode64
     {
         long Position { get; }
 
diff --git a/ChocolArm64/Decoders/IOpCodeAlu.cs b/ChocolArm64/Decoders/IOpCodeAlu64.cs
similarity index 76%
rename from ChocolArm64/Decoders/IOpCodeAlu.cs
rename to ChocolArm64/Decoders/IOpCodeAlu64.cs
index 5724edd5c2..b9a5fe9e68 100644
--- a/ChocolArm64/Decoders/IOpCodeAlu.cs
+++ b/ChocolArm64/Decoders/IOpCodeAlu64.cs
@@ -1,6 +1,6 @@
 namespace ChocolArm64.Decoders
 {
-    interface IOpCodeAlu : IOpCode
+    interface IOpCodeAlu64 : IOpCode64
     {
         int Rd { get; }
         int Rn { get; }
diff --git a/ChocolArm64/Decoders/IOpCodeAluImm.cs b/ChocolArm64/Decoders/IOpCodeAluImm64.cs
similarity index 61%
rename from ChocolArm64/Decoders/IOpCodeAluImm.cs
rename to ChocolArm64/Decoders/IOpCodeAluImm64.cs
index 203b9ae0e0..4b305e27b7 100644
--- a/ChocolArm64/Decoders/IOpCodeAluImm.cs
+++ b/ChocolArm64/Decoders/IOpCodeAluImm64.cs
@@ -1,6 +1,6 @@
 namespace ChocolArm64.Decoders
 {
-    interface IOpCodeAluImm : IOpCodeAlu
+    interface IOpCodeAluImm64 : IOpCodeAlu64
     {
         long Imm { get; }
     }
diff --git a/ChocolArm64/Decoders/IOpCodeAluRs.cs b/ChocolArm64/Decoders/IOpCodeAluRs64.cs
similarity index 75%
rename from ChocolArm64/Decoders/IOpCodeAluRs.cs
rename to ChocolArm64/Decoders/IOpCodeAluRs64.cs
index cd171313e5..df503ae9d8 100644
--- a/ChocolArm64/Decoders/IOpCodeAluRs.cs
+++ b/ChocolArm64/Decoders/IOpCodeAluRs64.cs
@@ -1,6 +1,6 @@
 namespace ChocolArm64.Decoders
 {
-    interface IOpCodeAluRs : IOpCodeAlu
+    interface IOpCodeAluRs64 : IOpCodeAlu64
     {
         int Shift { get; }
         int Rm    { get; }
diff --git a/ChocolArm64/Decoders/IOpCodeAluRx.cs b/ChocolArm64/Decoders/IOpCodeAluRx64.cs
similarity index 75%
rename from ChocolArm64/Decoders/IOpCodeAluRx.cs
rename to ChocolArm64/Decoders/IOpCodeAluRx64.cs
index 76d13a837f..f41fc4d2f0 100644
--- a/ChocolArm64/Decoders/IOpCodeAluRx.cs
+++ b/ChocolArm64/Decoders/IOpCodeAluRx64.cs
@@ -1,6 +1,6 @@
 namespace ChocolArm64.Decoders
 {
-    interface IOpCodeAluRx : IOpCodeAlu
+    interface IOpCodeAluRx64 : IOpCodeAlu64
     {
         int Shift { get; }
         int Rm    { get; }
diff --git a/ChocolArm64/Decoders/IOpCodeCond.cs b/ChocolArm64/Decoders/IOpCodeCond64.cs
similarity index 64%
rename from ChocolArm64/Decoders/IOpCodeCond.cs
rename to ChocolArm64/Decoders/IOpCodeCond64.cs
index e6ee137907..9c39d63329 100644
--- a/ChocolArm64/Decoders/IOpCodeCond.cs
+++ b/ChocolArm64/Decoders/IOpCodeCond64.cs
@@ -1,6 +1,6 @@
 namespace ChocolArm64.Decoders
 {
-    interface IOpCodeCond : IOpCode
+    interface IOpCodeCond64 : IOpCode64
     {
         Cond Cond { get; }
     }
diff --git a/ChocolArm64/Decoders/IOpCodeLit.cs b/ChocolArm64/Decoders/IOpCodeLit64.cs
similarity index 83%
rename from ChocolArm64/Decoders/IOpCodeLit.cs
rename to ChocolArm64/Decoders/IOpCodeLit64.cs
index bc5609e903..c6dc2c7fc1 100644
--- a/ChocolArm64/Decoders/IOpCodeLit.cs
+++ b/ChocolArm64/Decoders/IOpCodeLit64.cs
@@ -1,6 +1,6 @@
 namespace ChocolArm64.Decoders
 {
-    interface IOpCodeLit : IOpCode
+    interface IOpCodeLit64 : IOpCode64
     {
         int  Rt       { get; }
         long Imm      { get; }
diff --git a/ChocolArm64/Decoders/IOpCodeSimd.cs b/ChocolArm64/Decoders/IOpCodeSimd64.cs
similarity index 64%
rename from ChocolArm64/Decoders/IOpCodeSimd.cs
rename to ChocolArm64/Decoders/IOpCodeSimd64.cs
index 1c8ba1d92e..fc8f54d608 100644
--- a/ChocolArm64/Decoders/IOpCodeSimd.cs
+++ b/ChocolArm64/Decoders/IOpCodeSimd64.cs
@@ -1,6 +1,6 @@
 namespace ChocolArm64.Decoders
 {
-    interface IOpCodeSimd : IOpCode
+    interface IOpCodeSimd64 : IOpCode64
     {
         int Size { get; }
     }
diff --git a/ChocolArm64/Decoders/AOpCode.cs b/ChocolArm64/Decoders/OpCode64.cs
similarity index 91%
rename from ChocolArm64/Decoders/AOpCode.cs
rename to ChocolArm64/Decoders/OpCode64.cs
index 4d082ebb48..b2dc363b8b 100644
--- a/ChocolArm64/Decoders/AOpCode.cs
+++ b/ChocolArm64/Decoders/OpCode64.cs
@@ -4,7 +4,7 @@ using System;
 
 namespace ChocolArm64.Decoders
 {
-    class AOpCode : IOpCode
+    class OpCode64 : IOpCode64
     {
         public long Position  { get; private set; }
         public int  RawOpCode { get; private set; }
@@ -13,7 +13,7 @@ namespace ChocolArm64.Decoders
         public InstInterpreter Interpreter  { get; protected set; }
         public RegisterSize    RegisterSize { get; protected set; }
 
-        public AOpCode(Inst inst, long position, int opCode)
+        public OpCode64(Inst inst, long position, int opCode)
         {
             Position  = position;
             RawOpCode = opCode;
diff --git a/ChocolArm64/Decoders/OpCodeAluImm.cs b/ChocolArm64/Decoders/OpCode64AluImm.cs
similarity index 83%
rename from ChocolArm64/Decoders/OpCodeAluImm.cs
rename to ChocolArm64/Decoders/OpCode64AluImm.cs
index 2ee08b7132..0fb1d32b8d 100644
--- a/ChocolArm64/Decoders/OpCodeAluImm.cs
+++ b/ChocolArm64/Decoders/OpCode64AluImm.cs
@@ -3,11 +3,11 @@ using System;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeAluImm : OpCodeAlu, IOpCodeAluImm
+    class OpCode64AluImm : OpCodeAlu64, IOpCodeAluImm64
     {
         public long Imm { get; private set; }
 
-        public OpCodeAluImm(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCode64AluImm(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             if (DataOp == DataOp.Arithmetic)
             {
diff --git a/ChocolArm64/Decoders/OpCodeMemLit.cs b/ChocolArm64/Decoders/OpCode64MemLit64.cs
similarity index 84%
rename from ChocolArm64/Decoders/OpCodeMemLit.cs
rename to ChocolArm64/Decoders/OpCode64MemLit64.cs
index 5d8c63d9e4..fa5e434f37 100644
--- a/ChocolArm64/Decoders/OpCodeMemLit.cs
+++ b/ChocolArm64/Decoders/OpCode64MemLit64.cs
@@ -2,7 +2,7 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeMemLit : AOpCode, IOpCodeLit
+    class OpCode64MemLit64 : OpCode64, IOpCodeLit64
     {
         public int  Rt       { get; private set; }
         public long Imm      { get; private set; }
@@ -10,7 +10,7 @@ namespace ChocolArm64.Decoders
         public bool Signed   { get; private set; }
         public bool Prefetch { get; private set; }
 
-        public OpCodeMemLit(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCode64MemLit64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             Rt = opCode & 0x1f;
 
diff --git a/ChocolArm64/Decoders/OpCodeAdr.cs b/ChocolArm64/Decoders/OpCodeAdr64.cs
similarity index 71%
rename from ChocolArm64/Decoders/OpCodeAdr.cs
rename to ChocolArm64/Decoders/OpCodeAdr64.cs
index 713a112ac1..98b2f07bbe 100644
--- a/ChocolArm64/Decoders/OpCodeAdr.cs
+++ b/ChocolArm64/Decoders/OpCodeAdr64.cs
@@ -2,12 +2,12 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeAdr : AOpCode
+    class OpCodeAdr64 : OpCode64
     {
         public int  Rd  { get; private set; }
         public long Imm { get; private set; }
 
-         public OpCodeAdr(Inst inst, long position, int opCode) : base(inst, position, opCode)
+         public OpCodeAdr64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             Rd = opCode & 0x1f;
 
diff --git a/ChocolArm64/Decoders/OpCodeAlu.cs b/ChocolArm64/Decoders/OpCodeAlu64.cs
similarity index 79%
rename from ChocolArm64/Decoders/OpCodeAlu.cs
rename to ChocolArm64/Decoders/OpCodeAlu64.cs
index c5f1f62bcd..5f094572ef 100644
--- a/ChocolArm64/Decoders/OpCodeAlu.cs
+++ b/ChocolArm64/Decoders/OpCodeAlu64.cs
@@ -3,14 +3,14 @@ using ChocolArm64.State;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeAlu : AOpCode, IOpCodeAlu
+    class OpCodeAlu64 : OpCode64, IOpCodeAlu64
     {
         public int Rd { get; protected set; }
         public int Rn { get; private   set; }
 
         public DataOp DataOp { get; private set; }
 
-        public OpCodeAlu(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeAlu64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             Rd     =           (opCode >>  0) & 0x1f;
             Rn     =           (opCode >>  5) & 0x1f;
diff --git a/ChocolArm64/Decoders/OpCodeAluRs.cs b/ChocolArm64/Decoders/OpCodeAluRs64.cs
similarity index 79%
rename from ChocolArm64/Decoders/OpCodeAluRs.cs
rename to ChocolArm64/Decoders/OpCodeAluRs64.cs
index c32d1a99f8..f24c7f37bd 100644
--- a/ChocolArm64/Decoders/OpCodeAluRs.cs
+++ b/ChocolArm64/Decoders/OpCodeAluRs64.cs
@@ -2,14 +2,14 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeAluRs : OpCodeAlu, IOpCodeAluRs
+    class OpCodeAluRs64 : OpCodeAlu64, IOpCodeAluRs64
     {
         public int Shift { get; private set; }
         public int Rm    { get; private set; }
 
         public ShiftType ShiftType { get; private set; }
 
-        public OpCodeAluRs(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeAluRs64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             int shift = (opCode >> 10) & 0x3f;
 
diff --git a/ChocolArm64/Decoders/OpCodeAluRx.cs b/ChocolArm64/Decoders/OpCodeAluRx64.cs
similarity index 73%
rename from ChocolArm64/Decoders/OpCodeAluRx.cs
rename to ChocolArm64/Decoders/OpCodeAluRx64.cs
index 3b4860dcbe..a36f94ca89 100644
--- a/ChocolArm64/Decoders/OpCodeAluRx.cs
+++ b/ChocolArm64/Decoders/OpCodeAluRx64.cs
@@ -2,14 +2,14 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeAluRx : OpCodeAlu, IOpCodeAluRx
+    class OpCodeAluRx64 : OpCodeAlu64, IOpCodeAluRx64
     {
         public int Shift { get; private set; }
         public int Rm    { get; private set; }
 
         public IntType IntType { get; private set; }
 
-        public OpCodeAluRx(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeAluRx64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             Shift   =            (opCode >> 10) & 0x7;
             IntType = (IntType)((opCode >> 13) & 0x7);
diff --git a/ChocolArm64/Decoders/OpCodeBImm.cs b/ChocolArm64/Decoders/OpCodeBImm.cs
deleted file mode 100644
index 0fc20e2773..0000000000
--- a/ChocolArm64/Decoders/OpCodeBImm.cs
+++ /dev/null
@@ -1,11 +0,0 @@
-using ChocolArm64.Instructions;
-
-namespace ChocolArm64.Decoders
-{
-    class OpCodeBImm : AOpCode
-    {
-        public long Imm { get; protected set; }
-
-        public OpCodeBImm(Inst inst, long position, int opCode) : base(inst, position, opCode) { }
-    }
-}
\ No newline at end of file
diff --git a/ChocolArm64/Decoders/OpCodeBImm64.cs b/ChocolArm64/Decoders/OpCodeBImm64.cs
new file mode 100644
index 0000000000..71c61bab3b
--- /dev/null
+++ b/ChocolArm64/Decoders/OpCodeBImm64.cs
@@ -0,0 +1,11 @@
+using ChocolArm64.Instructions;
+
+namespace ChocolArm64.Decoders
+{
+    class OpCodeBImm64 : OpCode64
+    {
+        public long Imm { get; protected set; }
+
+        public OpCodeBImm64(Inst inst, long position, int opCode) : base(inst, position, opCode) { }
+    }
+}
\ No newline at end of file
diff --git a/ChocolArm64/Decoders/OpCodeBImmAl.cs b/ChocolArm64/Decoders/OpCodeBImmAl64.cs
similarity index 54%
rename from ChocolArm64/Decoders/OpCodeBImmAl.cs
rename to ChocolArm64/Decoders/OpCodeBImmAl64.cs
index f87877f992..f419ffa033 100644
--- a/ChocolArm64/Decoders/OpCodeBImmAl.cs
+++ b/ChocolArm64/Decoders/OpCodeBImmAl64.cs
@@ -2,9 +2,9 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeBImmAl : OpCodeBImm
+    class OpCodeBImmAl64 : OpCodeBImm64
     {
-        public OpCodeBImmAl(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeBImmAl64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             Imm = position + DecoderHelper.DecodeImm26_2(opCode);
         }
diff --git a/ChocolArm64/Decoders/OpCodeBImmCmp.cs b/ChocolArm64/Decoders/OpCodeBImmCmp64.cs
similarity index 74%
rename from ChocolArm64/Decoders/OpCodeBImmCmp.cs
rename to ChocolArm64/Decoders/OpCodeBImmCmp64.cs
index 589db284fa..6f43319918 100644
--- a/ChocolArm64/Decoders/OpCodeBImmCmp.cs
+++ b/ChocolArm64/Decoders/OpCodeBImmCmp64.cs
@@ -3,11 +3,11 @@ using ChocolArm64.State;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeBImmCmp : OpCodeBImm
+    class OpCodeBImmCmp64 : OpCodeBImm64
     {
         public int Rt { get; private set; }
 
-        public OpCodeBImmCmp(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeBImmCmp64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             Rt = opCode & 0x1f;
 
diff --git a/ChocolArm64/Decoders/OpCodeBImmCond.cs b/ChocolArm64/Decoders/OpCodeBImmCond64.cs
similarity index 72%
rename from ChocolArm64/Decoders/OpCodeBImmCond.cs
rename to ChocolArm64/Decoders/OpCodeBImmCond64.cs
index 35dd2f0dec..227023092e 100644
--- a/ChocolArm64/Decoders/OpCodeBImmCond.cs
+++ b/ChocolArm64/Decoders/OpCodeBImmCond64.cs
@@ -2,11 +2,11 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeBImmCond : OpCodeBImm, IOpCodeCond
+    class OpCodeBImmCond64 : OpCodeBImm64, IOpCodeCond64
     {
         public Cond Cond { get; private set; }
 
-        public OpCodeBImmCond(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeBImmCond64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             int o0 = (opCode >> 4) & 1;
 
diff --git a/ChocolArm64/Decoders/OpCodeBImmTest.cs b/ChocolArm64/Decoders/OpCodeBImmTest64.cs
similarity index 72%
rename from ChocolArm64/Decoders/OpCodeBImmTest.cs
rename to ChocolArm64/Decoders/OpCodeBImmTest64.cs
index de2f82495b..a2e8baeaeb 100644
--- a/ChocolArm64/Decoders/OpCodeBImmTest.cs
+++ b/ChocolArm64/Decoders/OpCodeBImmTest64.cs
@@ -2,12 +2,12 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeBImmTest : OpCodeBImm
+    class OpCodeBImmTest64 : OpCodeBImm64
     {
         public int Rt  { get; private set; }
         public int Pos { get; private set; }
 
-        public OpCodeBImmTest(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeBImmTest64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             Rt = opCode & 0x1f;
 
diff --git a/ChocolArm64/Decoders/OpCodeBReg.cs b/ChocolArm64/Decoders/OpCodeBReg64.cs
similarity index 76%
rename from ChocolArm64/Decoders/OpCodeBReg.cs
rename to ChocolArm64/Decoders/OpCodeBReg64.cs
index b42b64f2ad..74dbff5839 100644
--- a/ChocolArm64/Decoders/OpCodeBReg.cs
+++ b/ChocolArm64/Decoders/OpCodeBReg64.cs
@@ -2,11 +2,11 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeBReg : AOpCode
+    class OpCodeBReg64 : OpCode64
     {
         public int Rn { get; private set; }
 
-        public OpCodeBReg(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeBReg64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             int op4 = (opCode >>  0) & 0x1f;
             int op2 = (opCode >> 16) & 0x1f;
diff --git a/ChocolArm64/Decoders/OpCodeBfm.cs b/ChocolArm64/Decoders/OpCodeBfm64.cs
similarity index 82%
rename from ChocolArm64/Decoders/OpCodeBfm.cs
rename to ChocolArm64/Decoders/OpCodeBfm64.cs
index caf354cda5..6891a8f4fc 100644
--- a/ChocolArm64/Decoders/OpCodeBfm.cs
+++ b/ChocolArm64/Decoders/OpCodeBfm64.cs
@@ -2,14 +2,14 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeBfm : OpCodeAlu
+    class OpCodeBfm64 : OpCodeAlu64
     {
         public long WMask { get; private set; }
         public long TMask { get; private set; }
         public int  Pos   { get; private set; }
         public int  Shift { get; private set; }
 
-        public OpCodeBfm(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeBfm64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             var bm = DecoderHelper.DecodeBitMask(opCode, false);
 
diff --git a/ChocolArm64/Decoders/OpCodeCcmp.cs b/ChocolArm64/Decoders/OpCodeCcmp64.cs
similarity index 80%
rename from ChocolArm64/Decoders/OpCodeCcmp.cs
rename to ChocolArm64/Decoders/OpCodeCcmp64.cs
index a4e5bd1267..e2aae96dee 100644
--- a/ChocolArm64/Decoders/OpCodeCcmp.cs
+++ b/ChocolArm64/Decoders/OpCodeCcmp64.cs
@@ -3,14 +3,14 @@ using ChocolArm64.State;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeCcmp : OpCodeAlu, IOpCodeCond
+    class OpCodeCcmp64 : OpCodeAlu64, IOpCodeCond64
     {
         public    int Nzcv { get; private set; }
         protected int RmImm;
 
         public Cond Cond { get; private set; }
 
-        public OpCodeCcmp(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeCcmp64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             int o3 = (opCode >> 4) & 1;
 
diff --git a/ChocolArm64/Decoders/OpCodeCcmpImm.cs b/ChocolArm64/Decoders/OpCodeCcmpImm.cs
deleted file mode 100644
index c875c9bb08..0000000000
--- a/ChocolArm64/Decoders/OpCodeCcmpImm.cs
+++ /dev/null
@@ -1,11 +0,0 @@
-using ChocolArm64.Instructions;
-
-namespace ChocolArm64.Decoders
-{
-    class OpCodeCcmpImm : OpCodeCcmp, IOpCodeAluImm
-    {
-        public long Imm => RmImm;
-
-        public OpCodeCcmpImm(Inst inst, long position, int opCode) : base(inst, position, opCode) { }
-    }
-}
\ No newline at end of file
diff --git a/ChocolArm64/Decoders/OpCodeCcmpImm64.cs b/ChocolArm64/Decoders/OpCodeCcmpImm64.cs
new file mode 100644
index 0000000000..78d5de5502
--- /dev/null
+++ b/ChocolArm64/Decoders/OpCodeCcmpImm64.cs
@@ -0,0 +1,11 @@
+using ChocolArm64.Instructions;
+
+namespace ChocolArm64.Decoders
+{
+    class OpCodeCcmpImm64 : OpCodeCcmp64, IOpCodeAluImm64
+    {
+        public long Imm => RmImm;
+
+        public OpCodeCcmpImm64(Inst inst, long position, int opCode) : base(inst, position, opCode) { }
+    }
+}
\ No newline at end of file
diff --git a/ChocolArm64/Decoders/OpCodeCcmpReg.cs b/ChocolArm64/Decoders/OpCodeCcmpReg64.cs
similarity index 55%
rename from ChocolArm64/Decoders/OpCodeCcmpReg.cs
rename to ChocolArm64/Decoders/OpCodeCcmpReg64.cs
index 277870de67..a0544d987a 100644
--- a/ChocolArm64/Decoders/OpCodeCcmpReg.cs
+++ b/ChocolArm64/Decoders/OpCodeCcmpReg64.cs
@@ -2,7 +2,7 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeCcmpReg : OpCodeCcmp, IOpCodeAluRs
+    class OpCodeCcmpReg64 : OpCodeCcmp64, IOpCodeAluRs64
     {
         public int Rm => RmImm;
 
@@ -10,6 +10,6 @@ namespace ChocolArm64.Decoders
 
         public ShiftType ShiftType => ShiftType.Lsl;
 
-        public OpCodeCcmpReg(Inst inst, long position, int opCode) : base(inst, position, opCode) { }
+        public OpCodeCcmpReg64(Inst inst, long position, int opCode) : base(inst, position, opCode) { }
     }
 }
\ No newline at end of file
diff --git a/ChocolArm64/Decoders/OpCodeCsel.cs b/ChocolArm64/Decoders/OpCodeCsel64.cs
similarity index 66%
rename from ChocolArm64/Decoders/OpCodeCsel.cs
rename to ChocolArm64/Decoders/OpCodeCsel64.cs
index bb7b2bc236..d085a82378 100644
--- a/ChocolArm64/Decoders/OpCodeCsel.cs
+++ b/ChocolArm64/Decoders/OpCodeCsel64.cs
@@ -2,13 +2,13 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeCsel : OpCodeAlu, IOpCodeCond
+    class OpCodeCsel64 : OpCodeAlu64, IOpCodeCond64
     {
         public int Rm { get; private set; }
 
         public Cond Cond { get; private set; }
 
-        public OpCodeCsel(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeCsel64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             Rm   =         (opCode >> 16) & 0x1f;
             Cond = (Cond)((opCode >> 12) & 0xf);
diff --git a/ChocolArm64/Decoders/OpCodeException.cs b/ChocolArm64/Decoders/OpCodeException64.cs
similarity index 56%
rename from ChocolArm64/Decoders/OpCodeException.cs
rename to ChocolArm64/Decoders/OpCodeException64.cs
index a2d1ee3dbf..2554124c78 100644
--- a/ChocolArm64/Decoders/OpCodeException.cs
+++ b/ChocolArm64/Decoders/OpCodeException64.cs
@@ -2,11 +2,11 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeException : AOpCode
+    class OpCodeException64 : OpCode64
     {
         public int Id { get; private set; }
 
-        public OpCodeException(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeException64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             Id = (opCode >> 5) & 0xffff;
         }
diff --git a/ChocolArm64/Decoders/OpCodeMem.cs b/ChocolArm64/Decoders/OpCodeMem64.cs
similarity index 77%
rename from ChocolArm64/Decoders/OpCodeMem.cs
rename to ChocolArm64/Decoders/OpCodeMem64.cs
index a8b0878d7e..36e6758352 100644
--- a/ChocolArm64/Decoders/OpCodeMem.cs
+++ b/ChocolArm64/Decoders/OpCodeMem64.cs
@@ -2,14 +2,14 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeMem : AOpCode
+    class OpCodeMem64 : OpCode64
     {
         public int  Rt       { get; protected set; }
         public int  Rn       { get; protected set; }
         public int  Size     { get; protected set; }
         public bool Extend64 { get; protected set; }
 
-        public OpCodeMem(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeMem64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             Rt   = (opCode >>  0) & 0x1f;
             Rn   = (opCode >>  5) & 0x1f;
diff --git a/ChocolArm64/Decoders/OpCodeMemEx.cs b/ChocolArm64/Decoders/OpCodeMemEx64.cs
similarity index 66%
rename from ChocolArm64/Decoders/OpCodeMemEx.cs
rename to ChocolArm64/Decoders/OpCodeMemEx64.cs
index a7e0f61085..39935eb36e 100644
--- a/ChocolArm64/Decoders/OpCodeMemEx.cs
+++ b/ChocolArm64/Decoders/OpCodeMemEx64.cs
@@ -2,12 +2,12 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeMemEx : OpCodeMem
+    class OpCodeMemEx64 : OpCodeMem64
     {
         public int Rt2 { get; private set; }
         public int Rs  { get; private set; }
 
-        public OpCodeMemEx(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeMemEx64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             Rt2 = (opCode >> 10) & 0x1f;
             Rs  = (opCode >> 16) & 0x1f;
diff --git a/ChocolArm64/Decoders/OpCodeMemImm.cs b/ChocolArm64/Decoders/OpCodeMemImm64.cs
similarity index 91%
rename from ChocolArm64/Decoders/OpCodeMemImm.cs
rename to ChocolArm64/Decoders/OpCodeMemImm64.cs
index 1ce9691306..edaa4970ae 100644
--- a/ChocolArm64/Decoders/OpCodeMemImm.cs
+++ b/ChocolArm64/Decoders/OpCodeMemImm64.cs
@@ -2,7 +2,7 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeMemImm : OpCodeMem
+    class OpCodeMemImm64 : OpCodeMem64
     {
         public    long Imm      { get; protected set; }
         public    bool WBack    { get; protected set; }
@@ -18,7 +18,7 @@ namespace ChocolArm64.Decoders
             Unsigned
         }
 
-        public OpCodeMemImm(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeMemImm64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             Extend64 = ((opCode >> 22) & 3) == 2;
             WBack    = ((opCode >> 24) & 1) == 0;
diff --git a/ChocolArm64/Decoders/OpCodeMemPair.cs b/ChocolArm64/Decoders/OpCodeMemPair64.cs
similarity index 79%
rename from ChocolArm64/Decoders/OpCodeMemPair.cs
rename to ChocolArm64/Decoders/OpCodeMemPair64.cs
index 0e5fa826f5..5b81c75589 100644
--- a/ChocolArm64/Decoders/OpCodeMemPair.cs
+++ b/ChocolArm64/Decoders/OpCodeMemPair64.cs
@@ -2,11 +2,11 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeMemPair : OpCodeMemImm
+    class OpCodeMemPair64 : OpCodeMemImm64
     {
         public int Rt2 { get; private set; }
 
-        public OpCodeMemPair(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeMemPair64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             Rt2      =  (opCode >> 10) & 0x1f;
             WBack    = ((opCode >> 23) & 0x1) != 0;
diff --git a/ChocolArm64/Decoders/OpCodeMemReg.cs b/ChocolArm64/Decoders/OpCodeMemReg64.cs
similarity index 77%
rename from ChocolArm64/Decoders/OpCodeMemReg.cs
rename to ChocolArm64/Decoders/OpCodeMemReg64.cs
index 7dabfe585f..3dd210fbd2 100644
--- a/ChocolArm64/Decoders/OpCodeMemReg.cs
+++ b/ChocolArm64/Decoders/OpCodeMemReg64.cs
@@ -2,14 +2,14 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeMemReg : OpCodeMem
+    class OpCodeMemReg64 : OpCodeMem64
     {
         public bool Shift { get; private set; }
         public int  Rm    { get; private set; }
 
         public IntType IntType { get; private set; }
 
-        public OpCodeMemReg(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeMemReg64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             Shift    =           ((opCode >> 12) & 0x1) != 0;
             IntType  = (IntType)((opCode >> 13) & 0x7);
diff --git a/ChocolArm64/Decoders/OpCodeMov.cs b/ChocolArm64/Decoders/OpCodeMov64.cs
similarity index 85%
rename from ChocolArm64/Decoders/OpCodeMov.cs
rename to ChocolArm64/Decoders/OpCodeMov64.cs
index 20c224223c..f969785479 100644
--- a/ChocolArm64/Decoders/OpCodeMov.cs
+++ b/ChocolArm64/Decoders/OpCodeMov64.cs
@@ -3,13 +3,13 @@ using ChocolArm64.State;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeMov : AOpCode
+    class OpCodeMov64 : OpCode64
     {
         public int  Rd  { get; private set; }
         public long Imm { get; private set; }
         public int  Pos { get; private set; }
 
-        public OpCodeMov(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeMov64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             int p1 = (opCode >> 22) & 1;
             int sf = (opCode >> 31) & 1;
diff --git a/ChocolArm64/Decoders/OpCodeMul.cs b/ChocolArm64/Decoders/OpCodeMul64.cs
similarity index 67%
rename from ChocolArm64/Decoders/OpCodeMul.cs
rename to ChocolArm64/Decoders/OpCodeMul64.cs
index 7ee7dbe61d..176b7b93b5 100644
--- a/ChocolArm64/Decoders/OpCodeMul.cs
+++ b/ChocolArm64/Decoders/OpCodeMul64.cs
@@ -2,12 +2,12 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeMul : OpCodeAlu
+    class OpCodeMul64 : OpCodeAlu64
     {
         public int Rm { get; private set; }
         public int Ra { get; private set; }
 
-        public OpCodeMul(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeMul64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             Ra = (opCode >> 10) & 0x1f;
             Rm = (opCode >> 16) & 0x1f;
diff --git a/ChocolArm64/Decoders/OpCodeSimd.cs b/ChocolArm64/Decoders/OpCodeSimd64.cs
similarity index 80%
rename from ChocolArm64/Decoders/OpCodeSimd.cs
rename to ChocolArm64/Decoders/OpCodeSimd64.cs
index 1d3a13fd1f..a705e489cc 100644
--- a/ChocolArm64/Decoders/OpCodeSimd.cs
+++ b/ChocolArm64/Decoders/OpCodeSimd64.cs
@@ -3,14 +3,14 @@ using ChocolArm64.State;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeSimd : AOpCode, IOpCodeSimd
+    class OpCodeSimd64 : OpCode64, IOpCodeSimd64
     {
         public int Rd   { get; private   set; }
         public int Rn   { get; private   set; }
         public int Opc  { get; private   set; }
         public int Size { get; protected set; }
 
-        public OpCodeSimd(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeSimd64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             Rd   = (opCode >>  0) & 0x1f;
             Rn   = (opCode >>  5) & 0x1f;
diff --git a/ChocolArm64/Decoders/OpCodeSimdCvt.cs b/ChocolArm64/Decoders/OpCodeSimdCvt64.cs
similarity index 81%
rename from ChocolArm64/Decoders/OpCodeSimdCvt.cs
rename to ChocolArm64/Decoders/OpCodeSimdCvt64.cs
index c01aa8fcc4..6c68a3af26 100644
--- a/ChocolArm64/Decoders/OpCodeSimdCvt.cs
+++ b/ChocolArm64/Decoders/OpCodeSimdCvt64.cs
@@ -3,11 +3,11 @@ using ChocolArm64.State;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeSimdCvt : OpCodeSimd
+    class OpCodeSimdCvt64 : OpCodeSimd64
     {
         public int FBits { get; private set; }
 
-        public OpCodeSimdCvt(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeSimdCvt64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             //TODO:
             //Und of Fixed Point variants.
diff --git a/ChocolArm64/Decoders/OpCodeSimdExt.cs b/ChocolArm64/Decoders/OpCodeSimdExt64.cs
similarity index 56%
rename from ChocolArm64/Decoders/OpCodeSimdExt.cs
rename to ChocolArm64/Decoders/OpCodeSimdExt64.cs
index 56d119136c..1c57f19cc4 100644
--- a/ChocolArm64/Decoders/OpCodeSimdExt.cs
+++ b/ChocolArm64/Decoders/OpCodeSimdExt64.cs
@@ -2,11 +2,11 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeSimdExt : OpCodeSimdReg
+    class OpCodeSimdExt64 : OpCodeSimdReg64
     {
         public int Imm4 { get; private set; }
 
-        public OpCodeSimdExt(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeSimdExt64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             Imm4 = (opCode >> 11) & 0xf;
         }
diff --git a/ChocolArm64/Decoders/OpCodeSimdFcond.cs b/ChocolArm64/Decoders/OpCodeSimdFcond64.cs
similarity index 64%
rename from ChocolArm64/Decoders/OpCodeSimdFcond.cs
rename to ChocolArm64/Decoders/OpCodeSimdFcond64.cs
index 2d9ae09e6c..b0f1c0eb93 100644
--- a/ChocolArm64/Decoders/OpCodeSimdFcond.cs
+++ b/ChocolArm64/Decoders/OpCodeSimdFcond64.cs
@@ -2,13 +2,13 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeSimdFcond : OpCodeSimdReg, IOpCodeCond
+    class OpCodeSimdFcond64 : OpCodeSimdReg64, IOpCodeCond64
     {
         public int Nzcv { get; private set; }
 
         public Cond Cond { get; private set; }
 
-        public OpCodeSimdFcond(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeSimdFcond64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             Nzcv =         (opCode >>  0) & 0xf;
             Cond = (Cond)((opCode >> 12) & 0xf);
diff --git a/ChocolArm64/Decoders/OpCodeSimdFmov.cs b/ChocolArm64/Decoders/OpCodeSimdFmov64.cs
similarity index 81%
rename from ChocolArm64/Decoders/OpCodeSimdFmov.cs
rename to ChocolArm64/Decoders/OpCodeSimdFmov64.cs
index 2d8add94bd..6752e185e5 100644
--- a/ChocolArm64/Decoders/OpCodeSimdFmov.cs
+++ b/ChocolArm64/Decoders/OpCodeSimdFmov64.cs
@@ -2,13 +2,13 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeSimdFmov : AOpCode, IOpCodeSimd
+    class OpCodeSimdFmov64 : OpCode64, IOpCodeSimd64
     {
         public int  Rd   { get; private set; }
         public long Imm  { get; private set; }
         public int  Size { get; private set; }
 
-        public OpCodeSimdFmov(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeSimdFmov64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             int imm5 = (opCode >>  5) & 0x1f;
             int type = (opCode >> 22) & 0x3;
diff --git a/ChocolArm64/Decoders/OpCodeSimdImm.cs b/ChocolArm64/Decoders/OpCodeSimdImm64.cs
similarity index 95%
rename from ChocolArm64/Decoders/OpCodeSimdImm.cs
rename to ChocolArm64/Decoders/OpCodeSimdImm64.cs
index 28b7b5bcef..3ef6a8c6e2 100644
--- a/ChocolArm64/Decoders/OpCodeSimdImm.cs
+++ b/ChocolArm64/Decoders/OpCodeSimdImm64.cs
@@ -3,13 +3,13 @@ using ChocolArm64.State;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeSimdImm : AOpCode, IOpCodeSimd
+    class OpCodeSimdImm64 : OpCode64, IOpCodeSimd64
     {
         public int  Rd   { get; private set; }
         public long Imm  { get; private set; }
         public int  Size { get; private set; }
 
-        public OpCodeSimdImm(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeSimdImm64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             Rd = opCode & 0x1f;
 
diff --git a/ChocolArm64/Decoders/OpCodeSimdIns.cs b/ChocolArm64/Decoders/OpCodeSimdIns64.cs
similarity index 84%
rename from ChocolArm64/Decoders/OpCodeSimdIns.cs
rename to ChocolArm64/Decoders/OpCodeSimdIns64.cs
index 4c39939516..3b25faebfd 100644
--- a/ChocolArm64/Decoders/OpCodeSimdIns.cs
+++ b/ChocolArm64/Decoders/OpCodeSimdIns64.cs
@@ -2,12 +2,12 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeSimdIns : OpCodeSimd
+    class OpCodeSimdIns64 : OpCodeSimd64
     {
         public int SrcIndex { get; private set; }
         public int DstIndex { get; private set; }
 
-        public OpCodeSimdIns(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeSimdIns64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             int imm4 = (opCode >> 11) & 0xf;
             int imm5 = (opCode >> 16) & 0x1f;
diff --git a/ChocolArm64/Decoders/OpCodeSimdMemImm.cs b/ChocolArm64/Decoders/OpCodeSimdMemImm64.cs
similarity index 62%
rename from ChocolArm64/Decoders/OpCodeSimdMemImm.cs
rename to ChocolArm64/Decoders/OpCodeSimdMemImm64.cs
index 671867b1b1..9fbab5674f 100644
--- a/ChocolArm64/Decoders/OpCodeSimdMemImm.cs
+++ b/ChocolArm64/Decoders/OpCodeSimdMemImm64.cs
@@ -2,9 +2,9 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeSimdMemImm : OpCodeMemImm, IOpCodeSimd
+    class OpCodeSimdMemImm64 : OpCodeMemImm64, IOpCodeSimd64
     {
-        public OpCodeSimdMemImm(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeSimdMemImm64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             Size |= (opCode >> 21) & 4;
 
diff --git a/ChocolArm64/Decoders/OpCodeSimdMemLit.cs b/ChocolArm64/Decoders/OpCodeSimdMemLit64.cs
similarity index 78%
rename from ChocolArm64/Decoders/OpCodeSimdMemLit.cs
rename to ChocolArm64/Decoders/OpCodeSimdMemLit64.cs
index e44ac910d3..c98ffd030b 100644
--- a/ChocolArm64/Decoders/OpCodeSimdMemLit.cs
+++ b/ChocolArm64/Decoders/OpCodeSimdMemLit64.cs
@@ -2,7 +2,7 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeSimdMemLit : AOpCode, IOpCodeSimd, IOpCodeLit
+    class OpCodeSimdMemLit64 : OpCode64, IOpCodeSimd64, IOpCodeLit64
     {
         public int  Rt   { get; private set; }
         public long Imm  { get; private set; }
@@ -10,7 +10,7 @@ namespace ChocolArm64.Decoders
         public bool Signed   => false;
         public bool Prefetch => false;
 
-        public OpCodeSimdMemLit(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeSimdMemLit64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             int opc = (opCode >> 30) & 3;
 
diff --git a/ChocolArm64/Decoders/OpCodeSimdMemMs.cs b/ChocolArm64/Decoders/OpCodeSimdMemMs64.cs
similarity index 89%
rename from ChocolArm64/Decoders/OpCodeSimdMemMs.cs
rename to ChocolArm64/Decoders/OpCodeSimdMemMs64.cs
index 4feded7dc4..0748ef43f3 100644
--- a/ChocolArm64/Decoders/OpCodeSimdMemMs.cs
+++ b/ChocolArm64/Decoders/OpCodeSimdMemMs64.cs
@@ -3,14 +3,14 @@ using ChocolArm64.State;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeSimdMemMs : OpCodeMemReg, IOpCodeSimd
+    class OpCodeSimdMemMs64 : OpCodeMemReg64, IOpCodeSimd64
     {
         public int  Reps   { get; private set; }
         public int  SElems { get; private set; }
         public int  Elems  { get; private set; }
         public bool WBack  { get; private set; }
 
-        public OpCodeSimdMemMs(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeSimdMemMs64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             switch ((opCode >> 12) & 0xf)
             {
diff --git a/ChocolArm64/Decoders/OpCodeSimdMemPair.cs b/ChocolArm64/Decoders/OpCodeSimdMemPair64.cs
similarity index 55%
rename from ChocolArm64/Decoders/OpCodeSimdMemPair.cs
rename to ChocolArm64/Decoders/OpCodeSimdMemPair64.cs
index fdb75d693f..1b796742e3 100644
--- a/ChocolArm64/Decoders/OpCodeSimdMemPair.cs
+++ b/ChocolArm64/Decoders/OpCodeSimdMemPair64.cs
@@ -2,9 +2,9 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeSimdMemPair : OpCodeMemPair, IOpCodeSimd
+    class OpCodeSimdMemPair64 : OpCodeMemPair64, IOpCodeSimd64
     {
-        public OpCodeSimdMemPair(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeSimdMemPair64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             Size = ((opCode >> 30) & 3) + 2;
 
diff --git a/ChocolArm64/Decoders/OpCodeSimdMemReg.cs b/ChocolArm64/Decoders/OpCodeSimdMemReg64.cs
similarity index 50%
rename from ChocolArm64/Decoders/OpCodeSimdMemReg.cs
rename to ChocolArm64/Decoders/OpCodeSimdMemReg64.cs
index 4f1ecad8ab..4ccbbed2da 100644
--- a/ChocolArm64/Decoders/OpCodeSimdMemReg.cs
+++ b/ChocolArm64/Decoders/OpCodeSimdMemReg64.cs
@@ -2,9 +2,9 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeSimdMemReg : OpCodeMemReg, IOpCodeSimd
+    class OpCodeSimdMemReg64 : OpCodeMemReg64, IOpCodeSimd64
     {
-        public OpCodeSimdMemReg(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeSimdMemReg64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             Size |= (opCode >> 21) & 4;
 
diff --git a/ChocolArm64/Decoders/OpCodeSimdMemSs.cs b/ChocolArm64/Decoders/OpCodeSimdMemSs64.cs
similarity index 93%
rename from ChocolArm64/Decoders/OpCodeSimdMemSs.cs
rename to ChocolArm64/Decoders/OpCodeSimdMemSs64.cs
index fffad254de..07ec8ab730 100644
--- a/ChocolArm64/Decoders/OpCodeSimdMemSs.cs
+++ b/ChocolArm64/Decoders/OpCodeSimdMemSs64.cs
@@ -3,14 +3,14 @@ using ChocolArm64.State;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeSimdMemSs : OpCodeMemReg, IOpCodeSimd
+    class OpCodeSimdMemSs64 : OpCodeMemReg64, IOpCodeSimd64
     {
         public int  SElems    { get; private set; }
         public int  Index     { get; private set; }
         public bool Replicate { get; private set; }
         public bool WBack     { get; private set; }
 
-        public OpCodeSimdMemSs(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeSimdMemSs64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             int size   = (opCode >> 10) & 3;
             int s      = (opCode >> 12) & 1;
diff --git a/ChocolArm64/Decoders/OpCodeSimdReg.cs b/ChocolArm64/Decoders/OpCodeSimdReg64.cs
similarity index 72%
rename from ChocolArm64/Decoders/OpCodeSimdReg.cs
rename to ChocolArm64/Decoders/OpCodeSimdReg64.cs
index cdcb457912..4bf462dee4 100644
--- a/ChocolArm64/Decoders/OpCodeSimdReg.cs
+++ b/ChocolArm64/Decoders/OpCodeSimdReg64.cs
@@ -2,13 +2,13 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeSimdReg : OpCodeSimd
+    class OpCodeSimdReg64 : OpCodeSimd64
     {
         public bool Bit3 { get; private   set; }
         public int  Ra   { get; private   set; }
         public int  Rm   { get; protected set; }
 
-        public OpCodeSimdReg(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeSimdReg64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             Bit3 = ((opCode >>  3) & 0x1) != 0;
             Ra   =  (opCode >> 10) & 0x1f;
diff --git a/ChocolArm64/Decoders/OpCodeSimdRegElem.cs b/ChocolArm64/Decoders/OpCodeSimdRegElem64.cs
similarity index 79%
rename from ChocolArm64/Decoders/OpCodeSimdRegElem.cs
rename to ChocolArm64/Decoders/OpCodeSimdRegElem64.cs
index 5e5394a731..04e9586199 100644
--- a/ChocolArm64/Decoders/OpCodeSimdRegElem.cs
+++ b/ChocolArm64/Decoders/OpCodeSimdRegElem64.cs
@@ -2,11 +2,11 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeSimdRegElem : OpCodeSimdReg
+    class OpCodeSimdRegElem64 : OpCodeSimdReg64
     {
         public int Index { get; private set; }
 
-        public OpCodeSimdRegElem(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeSimdRegElem64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             switch (Size)
             {
diff --git a/ChocolArm64/Decoders/OpCodeSimdRegElemF.cs b/ChocolArm64/Decoders/OpCodeSimdRegElemF64.cs
similarity index 80%
rename from ChocolArm64/Decoders/OpCodeSimdRegElemF.cs
rename to ChocolArm64/Decoders/OpCodeSimdRegElemF64.cs
index 3c6142ea4b..b5db7345ca 100644
--- a/ChocolArm64/Decoders/OpCodeSimdRegElemF.cs
+++ b/ChocolArm64/Decoders/OpCodeSimdRegElemF64.cs
@@ -2,11 +2,11 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeSimdRegElemF : OpCodeSimdReg
+    class OpCodeSimdRegElemF64 : OpCodeSimdReg64
     {
         public int Index { get; private set; }
 
-        public OpCodeSimdRegElemF(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeSimdRegElemF64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             switch ((opCode >> 21) & 3) // sz:L
             {
diff --git a/ChocolArm64/Decoders/OpCodeSimdShImm.cs b/ChocolArm64/Decoders/OpCodeSimdShImm64.cs
similarity index 63%
rename from ChocolArm64/Decoders/OpCodeSimdShImm.cs
rename to ChocolArm64/Decoders/OpCodeSimdShImm64.cs
index 3d6017dd53..d4cd88d13b 100644
--- a/ChocolArm64/Decoders/OpCodeSimdShImm.cs
+++ b/ChocolArm64/Decoders/OpCodeSimdShImm64.cs
@@ -2,11 +2,11 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeSimdShImm : OpCodeSimd
+    class OpCodeSimdShImm64 : OpCodeSimd64
     {
         public int Imm { get; private set; }
 
-        public OpCodeSimdShImm(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeSimdShImm64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             Imm = (opCode >> 16) & 0x7f;
 
diff --git a/ChocolArm64/Decoders/OpCodeSimdTbl.cs b/ChocolArm64/Decoders/OpCodeSimdTbl64.cs
similarity index 50%
rename from ChocolArm64/Decoders/OpCodeSimdTbl.cs
rename to ChocolArm64/Decoders/OpCodeSimdTbl64.cs
index 37003b8707..13cc9090f5 100644
--- a/ChocolArm64/Decoders/OpCodeSimdTbl.cs
+++ b/ChocolArm64/Decoders/OpCodeSimdTbl64.cs
@@ -2,9 +2,9 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeSimdTbl : OpCodeSimdReg
+    class OpCodeSimdTbl64 : OpCodeSimdReg64
     {
-        public OpCodeSimdTbl(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeSimdTbl64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             Size = ((opCode >> 13) & 3) + 1;
         }
diff --git a/ChocolArm64/Decoders/OpCodeSystem.cs b/ChocolArm64/Decoders/OpCodeSystem64.cs
similarity index 82%
rename from ChocolArm64/Decoders/OpCodeSystem.cs
rename to ChocolArm64/Decoders/OpCodeSystem64.cs
index c979f544fc..41c51565d9 100644
--- a/ChocolArm64/Decoders/OpCodeSystem.cs
+++ b/ChocolArm64/Decoders/OpCodeSystem64.cs
@@ -2,7 +2,7 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders
 {
-    class OpCodeSystem : AOpCode
+    class OpCodeSystem64 : OpCode64
     {
         public int Rt  { get; private set; }
         public int Op2 { get; private set; }
@@ -11,7 +11,7 @@ namespace ChocolArm64.Decoders
         public int Op1 { get; private set; }
         public int Op0 { get; private set; }
 
-        public OpCodeSystem(Inst inst, long position, int opCode) : base(inst, position, opCode)
+        public OpCodeSystem64(Inst inst, long position, int opCode) : base(inst, position, opCode)
         {
             Rt  =  (opCode >>  0) & 0x1f;
             Op2 =  (opCode >>  5) & 0x7;
diff --git a/ChocolArm64/Decoders32/A32OpCode.cs b/ChocolArm64/Decoders32/A32OpCode.cs
index 8c9de0adbc..f0177a4384 100644
--- a/ChocolArm64/Decoders32/A32OpCode.cs
+++ b/ChocolArm64/Decoders32/A32OpCode.cs
@@ -3,7 +3,7 @@ using ChocolArm64.Instructions;
 
 namespace ChocolArm64.Decoders32
 {
-    class A32OpCode : AOpCode
+    class A32OpCode : OpCode64
     {
         public Cond Cond { get; private set; }
 
diff --git a/ChocolArm64/Instructions/InstEmitAlu.cs b/ChocolArm64/Instructions/InstEmitAlu.cs
index 39d027dc68..c0258ed2b7 100644
--- a/ChocolArm64/Instructions/InstEmitAlu.cs
+++ b/ChocolArm64/Instructions/InstEmitAlu.cs
@@ -101,7 +101,7 @@ namespace ChocolArm64.Instructions
 
         public static void Cls(ILEmitterCtx context)
         {
-            OpCodeAlu op = (OpCodeAlu)context.CurrOp;
+            OpCodeAlu64 op = (OpCodeAlu64)context.CurrOp;
 
             context.EmitLdintzr(op.Rn);
 
@@ -114,7 +114,7 @@ namespace ChocolArm64.Instructions
 
         public static void Clz(ILEmitterCtx context)
         {
-            OpCodeAlu op = (OpCodeAlu)context.CurrOp;
+            OpCodeAlu64 op = (OpCodeAlu64)context.CurrOp;
 
             context.EmitLdintzr(op.Rn);
 
@@ -149,7 +149,7 @@ namespace ChocolArm64.Instructions
         public static void Extr(ILEmitterCtx context)
         {
             //TODO: Ensure that the Shift is valid for the Is64Bits.
-            OpCodeAluRs op = (OpCodeAluRs)context.CurrOp;
+            OpCodeAluRs64 op = (OpCodeAluRs64)context.CurrOp;
 
             context.EmitLdintzr(op.Rm);
 
@@ -254,7 +254,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitFallback32_64(ILEmitterCtx context, string name32, string name64)
         {
-            OpCodeAlu op = (OpCodeAlu)context.CurrOp;
+            OpCodeAlu64 op = (OpCodeAlu64)context.CurrOp;
 
             context.EmitLdintzr(op.Rn);
 
@@ -272,7 +272,7 @@ namespace ChocolArm64.Instructions
 
         public static void Rev64(ILEmitterCtx context)
         {
-            OpCodeAlu op = (OpCodeAlu)context.CurrOp;
+            OpCodeAlu64 op = (OpCodeAlu64)context.CurrOp;
 
             context.EmitLdintzr(op.Rn);
 
diff --git a/ChocolArm64/Instructions/InstEmitAluHelper.cs b/ChocolArm64/Instructions/InstEmitAluHelper.cs
index 79ee7a1a13..613dd23402 100644
--- a/ChocolArm64/Instructions/InstEmitAluHelper.cs
+++ b/ChocolArm64/Instructions/InstEmitAluHelper.cs
@@ -122,7 +122,7 @@ namespace ChocolArm64.Instructions
 
         public static void EmitDataLoadRm(ILEmitterCtx context)
         {
-            context.EmitLdintzr(((IOpCodeAluRs)context.CurrOp).Rm);
+            context.EmitLdintzr(((IOpCodeAluRs64)context.CurrOp).Rm);
         }
 
         public static void EmitDataLoadOpers(ILEmitterCtx context)
@@ -133,9 +133,9 @@ namespace ChocolArm64.Instructions
 
         public static void EmitDataLoadRn(ILEmitterCtx context)
         {
-            IOpCodeAlu op = (IOpCodeAlu)context.CurrOp;
+            IOpCodeAlu64 op = (IOpCodeAlu64)context.CurrOp;
 
-            if (op.DataOp == DataOp.Logical || op is IOpCodeAluRs)
+            if (op.DataOp == DataOp.Logical || op is IOpCodeAluRs64)
             {
                 context.EmitLdintzr(op.Rn);
             }
@@ -149,11 +149,11 @@ namespace ChocolArm64.Instructions
         {
             switch (context.CurrOp)
             {
-                case IOpCodeAluImm op:
+                case IOpCodeAluImm64 op:
                     context.EmitLdc_I(op.Imm);
                     break;
 
-                case IOpCodeAluRs op:
+                case IOpCodeAluRs64 op:
                     context.EmitLdintzr(op.Rm);
 
                     switch (op.ShiftType)
@@ -165,7 +165,7 @@ namespace ChocolArm64.Instructions
                     }
                     break;
 
-                case IOpCodeAluRx op:
+                case IOpCodeAluRx64 op:
                     context.EmitLdintzr(op.Rm);
                     context.EmitCast(op.IntType);
                     context.EmitLsl(op.Shift);
@@ -178,9 +178,9 @@ namespace ChocolArm64.Instructions
 
         public static void EmitDataStore(ILEmitterCtx context, bool setFlags)
         {
-            IOpCodeAlu op = (IOpCodeAlu)context.CurrOp;
+            IOpCodeAlu64 op = (IOpCodeAlu64)context.CurrOp;
 
-            if (setFlags || op is IOpCodeAluRs)
+            if (setFlags || op is IOpCodeAluRs64)
             {
                 context.EmitStintzr(op.Rd);
             }
diff --git a/ChocolArm64/Instructions/InstEmitBfm.cs b/ChocolArm64/Instructions/InstEmitBfm.cs
index f1e1303b15..d25af8be8a 100644
--- a/ChocolArm64/Instructions/InstEmitBfm.cs
+++ b/ChocolArm64/Instructions/InstEmitBfm.cs
@@ -9,7 +9,7 @@ namespace ChocolArm64.Instructions
     {
         public static void Bfm(ILEmitterCtx context)
         {
-            OpCodeBfm op = (OpCodeBfm)context.CurrOp;
+            OpCodeBfm64 op = (OpCodeBfm64)context.CurrOp;
 
             EmitBfmLoadRn(context);
 
@@ -30,7 +30,7 @@ namespace ChocolArm64.Instructions
 
         public static void Sbfm(ILEmitterCtx context)
         {
-            OpCodeBfm op = (OpCodeBfm)context.CurrOp;
+            OpCodeBfm64 op = (OpCodeBfm64)context.CurrOp;
 
             int bitsCount = op.GetBitsCount();
 
@@ -74,7 +74,7 @@ namespace ChocolArm64.Instructions
 
         public static void Ubfm(ILEmitterCtx context)
         {
-            OpCodeBfm op = (OpCodeBfm)context.CurrOp;
+            OpCodeBfm64 op = (OpCodeBfm64)context.CurrOp;
 
             if (op.Pos + 1 == op.GetBitsCount())
             {
@@ -109,7 +109,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitBfiz(ILEmitterCtx context, bool signed)
         {
-            OpCodeBfm op = (OpCodeBfm)context.CurrOp;
+            OpCodeBfm64 op = (OpCodeBfm64)context.CurrOp;
 
             int width = op.Pos + 1;
 
@@ -141,7 +141,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitBfmCast(ILEmitterCtx context, OpCode ilOp, bool signed)
         {
-            OpCodeBfm op = (OpCodeBfm)context.CurrOp;
+            OpCodeBfm64 op = (OpCodeBfm64)context.CurrOp;
 
             context.EmitLdintzr(op.Rn);
 
@@ -169,7 +169,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitBfmShift(ILEmitterCtx context, bool signed)
         {
-            OpCodeBfm op = (OpCodeBfm)context.CurrOp;
+            OpCodeBfm64 op = (OpCodeBfm64)context.CurrOp;
 
             context.EmitLdintzr(op.Rn);
             context.EmitLdc_I4(op.Shift);
@@ -183,7 +183,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitBfmLsl(ILEmitterCtx context)
         {
-            OpCodeBfm op = (OpCodeBfm)context.CurrOp;
+            OpCodeBfm64 op = (OpCodeBfm64)context.CurrOp;
 
             context.EmitLdintzr(op.Rn);
 
@@ -194,7 +194,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitBfmLoadRn(ILEmitterCtx context)
         {
-            OpCodeBfm op = (OpCodeBfm)context.CurrOp;
+            OpCodeBfm64 op = (OpCodeBfm64)context.CurrOp;
 
             context.EmitLdintzr(op.Rn);
 
diff --git a/ChocolArm64/Instructions/InstEmitCcmp.cs b/ChocolArm64/Instructions/InstEmitCcmp.cs
index e5819183a4..b91104c938 100644
--- a/ChocolArm64/Instructions/InstEmitCcmp.cs
+++ b/ChocolArm64/Instructions/InstEmitCcmp.cs
@@ -21,7 +21,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitCcmp(ILEmitterCtx context, CcmpOp cmpOp)
         {
-            OpCodeCcmp op = (OpCodeCcmp)context.CurrOp;
+            OpCodeCcmp64 op = (OpCodeCcmp64)context.CurrOp;
 
             ILLabel lblTrue = new ILLabel();
             ILLabel lblEnd  = new ILLabel();
diff --git a/ChocolArm64/Instructions/InstEmitCsel.cs b/ChocolArm64/Instructions/InstEmitCsel.cs
index 5543e7cd08..19b073ceaf 100644
--- a/ChocolArm64/Instructions/InstEmitCsel.cs
+++ b/ChocolArm64/Instructions/InstEmitCsel.cs
@@ -21,7 +21,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitCsel(ILEmitterCtx context, CselOperation cselOp)
         {
-            OpCodeCsel op = (OpCodeCsel)context.CurrOp;
+            OpCodeCsel64 op = (OpCodeCsel64)context.CurrOp;
 
             ILLabel lblTrue = new ILLabel();
             ILLabel lblEnd  = new ILLabel();
diff --git a/ChocolArm64/Instructions/InstEmitException.cs b/ChocolArm64/Instructions/InstEmitException.cs
index e9f0c4a1ab..8325a3978f 100644
--- a/ChocolArm64/Instructions/InstEmitException.cs
+++ b/ChocolArm64/Instructions/InstEmitException.cs
@@ -19,7 +19,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitExceptionCall(ILEmitterCtx context, string mthdName)
         {
-            OpCodeException op = (OpCodeException)context.CurrOp;
+            OpCodeException64 op = (OpCodeException64)context.CurrOp;
 
             context.EmitStoreState();
 
@@ -60,7 +60,7 @@ namespace ChocolArm64.Instructions
 
         public static void Und(ILEmitterCtx context)
         {
-            AOpCode op = context.CurrOp;
+            OpCode64 op = context.CurrOp;
 
             context.EmitStoreState();
 
diff --git a/ChocolArm64/Instructions/InstEmitFlow.cs b/ChocolArm64/Instructions/InstEmitFlow.cs
index 5d36a02c0c..7d0897cd6f 100644
--- a/ChocolArm64/Instructions/InstEmitFlow.cs
+++ b/ChocolArm64/Instructions/InstEmitFlow.cs
@@ -9,7 +9,7 @@ namespace ChocolArm64.Instructions
     {
         public static void B(ILEmitterCtx context)
         {
-            OpCodeBImmAl op = (OpCodeBImmAl)context.CurrOp;
+            OpCodeBImmAl64 op = (OpCodeBImmAl64)context.CurrOp;
 
             if (context.CurrBlock.Branch != null)
             {
@@ -26,14 +26,14 @@ namespace ChocolArm64.Instructions
 
         public static void B_Cond(ILEmitterCtx context)
         {
-            OpCodeBImmCond op = (OpCodeBImmCond)context.CurrOp;
+            OpCodeBImmCond64 op = (OpCodeBImmCond64)context.CurrOp;
 
             EmitBranch(context, op.Cond);
         }
 
         public static void Bl(ILEmitterCtx context)
         {
-            OpCodeBImmAl op = (OpCodeBImmAl)context.CurrOp;
+            OpCodeBImmAl64 op = (OpCodeBImmAl64)context.CurrOp;
 
             context.EmitLdc_I(op.Position + 4);
             context.EmitStint(CpuThreadState.LrIndex);
@@ -70,7 +70,7 @@ namespace ChocolArm64.Instructions
 
         public static void Blr(ILEmitterCtx context)
         {
-            OpCodeBReg op = (OpCodeBReg)context.CurrOp;
+            OpCodeBReg64 op = (OpCodeBReg64)context.CurrOp;
 
             context.EmitLdc_I(op.Position + 4);
             context.EmitStint(CpuThreadState.LrIndex);
@@ -82,7 +82,7 @@ namespace ChocolArm64.Instructions
 
         public static void Br(ILEmitterCtx context)
         {
-            OpCodeBReg op = (OpCodeBReg)context.CurrOp;
+            OpCodeBReg64 op = (OpCodeBReg64)context.CurrOp;
 
             context.EmitStoreState();
             context.EmitLdintzr(op.Rn);
@@ -95,7 +95,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitCb(ILEmitterCtx context, OpCode ilOp)
         {
-            OpCodeBImmCmp op = (OpCodeBImmCmp)context.CurrOp;
+            OpCodeBImmCmp64 op = (OpCodeBImmCmp64)context.CurrOp;
 
             context.EmitLdintzr(op.Rt);
             context.EmitLdc_I(0);
@@ -116,7 +116,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitTb(ILEmitterCtx context, OpCode ilOp)
         {
-            OpCodeBImmTest op = (OpCodeBImmTest)context.CurrOp;
+            OpCodeBImmTest64 op = (OpCodeBImmTest64)context.CurrOp;
 
             context.EmitLdintzr(op.Rt);
             context.EmitLdc_I(1L << op.Pos);
@@ -130,7 +130,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitBranch(ILEmitterCtx context, Cond cond)
         {
-            OpCodeBImm op = (OpCodeBImm)context.CurrOp;
+            OpCodeBImm64 op = (OpCodeBImm64)context.CurrOp;
 
             if (context.CurrBlock.Next   != null &&
                 context.CurrBlock.Branch != null)
@@ -159,7 +159,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitBranch(ILEmitterCtx context, OpCode ilOp)
         {
-            OpCodeBImm op = (OpCodeBImm)context.CurrOp;
+            OpCodeBImm64 op = (OpCodeBImm64)context.CurrOp;
 
             if (context.CurrBlock.Next   != null &&
                 context.CurrBlock.Branch != null)
diff --git a/ChocolArm64/Instructions/InstEmitHash.cs b/ChocolArm64/Instructions/InstEmitHash.cs
index abc1076bec..7e21a88604 100644
--- a/ChocolArm64/Instructions/InstEmitHash.cs
+++ b/ChocolArm64/Instructions/InstEmitHash.cs
@@ -79,7 +79,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitSse42Crc32(ILEmitterCtx context, Type tCrc, Type tData)
         {
-            OpCodeAluRs op = (OpCodeAluRs)context.CurrOp;
+            OpCodeAluRs64 op = (OpCodeAluRs64)context.CurrOp;
 
             context.EmitLdintzr(op.Rn);
             context.EmitLdintzr(op.Rm);
@@ -91,7 +91,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitCrc32(ILEmitterCtx context, string name)
         {
-            OpCodeAluRs op = (OpCodeAluRs)context.CurrOp;
+            OpCodeAluRs64 op = (OpCodeAluRs64)context.CurrOp;
 
             context.EmitLdintzr(op.Rn);
 
diff --git a/ChocolArm64/Instructions/InstEmitMemory.cs b/ChocolArm64/Instructions/InstEmitMemory.cs
index 4089e2b79e..96e45b3f74 100644
--- a/ChocolArm64/Instructions/InstEmitMemory.cs
+++ b/ChocolArm64/Instructions/InstEmitMemory.cs
@@ -10,7 +10,7 @@ namespace ChocolArm64.Instructions
     {
         public static void Adr(ILEmitterCtx context)
         {
-            OpCodeAdr op = (OpCodeAdr)context.CurrOp;
+            OpCodeAdr64 op = (OpCodeAdr64)context.CurrOp;
 
             context.EmitLdc_I(op.Position + op.Imm);
             context.EmitStintzr(op.Rd);
@@ -18,7 +18,7 @@ namespace ChocolArm64.Instructions
 
         public static void Adrp(ILEmitterCtx context)
         {
-            OpCodeAdr op = (OpCodeAdr)context.CurrOp;
+            OpCodeAdr64 op = (OpCodeAdr64)context.CurrOp;
 
             context.EmitLdc_I((op.Position & ~0xfffL) + (op.Imm << 12));
             context.EmitStintzr(op.Rd);
@@ -29,7 +29,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitLdr(ILEmitterCtx context, bool signed)
         {
-            OpCodeMem op = (OpCodeMem)context.CurrOp;
+            OpCodeMem64 op = (OpCodeMem64)context.CurrOp;
 
             context.EmitLdarg(TranslatedSub.MemoryArgIdx);
 
@@ -48,7 +48,7 @@ namespace ChocolArm64.Instructions
                 EmitReadZxCall(context, op.Size);
             }
 
-            if (op is IOpCodeSimd)
+            if (op is IOpCodeSimd64)
             {
                 context.EmitStvec(op.Rt);
             }
@@ -62,7 +62,7 @@ namespace ChocolArm64.Instructions
 
         public static void LdrLit(ILEmitterCtx context)
         {
-            IOpCodeLit op = (IOpCodeLit)context.CurrOp;
+            IOpCodeLit64 op = (IOpCodeLit64)context.CurrOp;
 
             if (op.Prefetch)
             {
@@ -81,7 +81,7 @@ namespace ChocolArm64.Instructions
                 EmitReadZxCall(context, op.Size);
             }
 
-            if (op is IOpCodeSimd)
+            if (op is IOpCodeSimd64)
             {
                 context.EmitStvec(op.Rt);
             }
@@ -93,7 +93,7 @@ namespace ChocolArm64.Instructions
 
         public static void Ldp(ILEmitterCtx context)
         {
-            OpCodeMemPair op = (OpCodeMemPair)context.CurrOp;
+            OpCodeMemPair64 op = (OpCodeMemPair64)context.CurrOp;
 
             void EmitReadAndStore(int rt)
             {
@@ -106,7 +106,7 @@ namespace ChocolArm64.Instructions
                     EmitReadZxCall(context, op.Size);
                 }
 
-                if (op is IOpCodeSimd)
+                if (op is IOpCodeSimd64)
                 {
                     context.EmitStvec(rt);
                 }
@@ -135,13 +135,13 @@ namespace ChocolArm64.Instructions
 
         public static void Str(ILEmitterCtx context)
         {
-            OpCodeMem op = (OpCodeMem)context.CurrOp;
+            OpCodeMem64 op = (OpCodeMem64)context.CurrOp;
 
             context.EmitLdarg(TranslatedSub.MemoryArgIdx);
 
             EmitLoadAddress(context);
 
-            if (op is IOpCodeSimd)
+            if (op is IOpCodeSimd64)
             {
                 context.EmitLdvec(op.Rt);
             }
@@ -157,13 +157,13 @@ namespace ChocolArm64.Instructions
 
         public static void Stp(ILEmitterCtx context)
         {
-            OpCodeMemPair op = (OpCodeMemPair)context.CurrOp;
+            OpCodeMemPair64 op = (OpCodeMemPair64)context.CurrOp;
 
             context.EmitLdarg(TranslatedSub.MemoryArgIdx);
 
             EmitLoadAddress(context);
 
-            if (op is IOpCodeSimd)
+            if (op is IOpCodeSimd64)
             {
                 context.EmitLdvec(op.Rt);
             }
@@ -180,7 +180,7 @@ namespace ChocolArm64.Instructions
 
             context.Emit(OpCodes.Add);
 
-            if (op is IOpCodeSimd)
+            if (op is IOpCodeSimd64)
             {
                 context.EmitLdvec(op.Rt2);
             }
@@ -198,7 +198,7 @@ namespace ChocolArm64.Instructions
         {
             switch (context.CurrOp)
             {
-                case OpCodeMemImm op:
+                case OpCodeMemImm64 op:
                     context.EmitLdint(op.Rn);
 
                     if (!op.PostIdx)
@@ -210,7 +210,7 @@ namespace ChocolArm64.Instructions
                     }
                     break;
 
-                case OpCodeMemReg op:
+                case OpCodeMemReg64 op:
                     context.EmitLdint(op.Rn);
                     context.EmitLdintzr(op.Rm);
                     context.EmitCast(op.IntType);
@@ -234,7 +234,7 @@ namespace ChocolArm64.Instructions
         {
             //Check whenever the current OpCode has post-indexed write back, if so write it.
             //Note: AOpCodeMemPair inherits from AOpCodeMemImm, so this works for both.
-            if (context.CurrOp is OpCodeMemImm op && op.WBack)
+            if (context.CurrOp is OpCodeMemImm64 op && op.WBack)
             {
                 context.EmitLdtmp();
 
diff --git a/ChocolArm64/Instructions/InstEmitMemoryEx.cs b/ChocolArm64/Instructions/InstEmitMemoryEx.cs
index 95eb35c3b5..42daca63b7 100644
--- a/ChocolArm64/Instructions/InstEmitMemoryEx.cs
+++ b/ChocolArm64/Instructions/InstEmitMemoryEx.cs
@@ -47,7 +47,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitLoad(ILEmitterCtx context, AccessType accType, bool pair)
         {
-            OpCodeMemEx op = (OpCodeMemEx)context.CurrOp;
+            OpCodeMemEx64 op = (OpCodeMemEx64)context.CurrOp;
 
             bool ordered   = (accType & AccessType.Ordered)   != 0;
             bool exclusive = (accType & AccessType.Exclusive) != 0;
@@ -109,7 +109,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitStore(ILEmitterCtx context, AccessType accType, bool pair)
         {
-            OpCodeMemEx op = (OpCodeMemEx)context.CurrOp;
+            OpCodeMemEx64 op = (OpCodeMemEx64)context.CurrOp;
 
             bool ordered   = (accType & AccessType.Ordered)   != 0;
             bool exclusive = (accType & AccessType.Exclusive) != 0;
diff --git a/ChocolArm64/Instructions/InstEmitMemoryHelper.cs b/ChocolArm64/Instructions/InstEmitMemoryHelper.cs
index 5a74bbd6d0..f953564c46 100644
--- a/ChocolArm64/Instructions/InstEmitMemoryHelper.cs
+++ b/ChocolArm64/Instructions/InstEmitMemoryHelper.cs
@@ -130,9 +130,9 @@ namespace ChocolArm64.Instructions
 
         private static bool GetIsSimd(ILEmitterCtx context)
         {
-            return context.CurrOp is IOpCodeSimd &&
-                 !(context.CurrOp is OpCodeSimdMemMs ||
-                   context.CurrOp is OpCodeSimdMemSs);
+            return context.CurrOp is IOpCodeSimd64 &&
+                 !(context.CurrOp is OpCodeSimdMemMs64 ||
+                   context.CurrOp is OpCodeSimdMemSs64);
         }
     }
 }
\ No newline at end of file
diff --git a/ChocolArm64/Instructions/InstEmitMove.cs b/ChocolArm64/Instructions/InstEmitMove.cs
index e02e1f37ba..be3e8e2d31 100644
--- a/ChocolArm64/Instructions/InstEmitMove.cs
+++ b/ChocolArm64/Instructions/InstEmitMove.cs
@@ -8,7 +8,7 @@ namespace ChocolArm64.Instructions
     {
         public static void Movk(ILEmitterCtx context)
         {
-            OpCodeMov op = (OpCodeMov)context.CurrOp;
+            OpCodeMov64 op = (OpCodeMov64)context.CurrOp;
 
             context.EmitLdintzr(op.Rd);
             context.EmitLdc_I(~(0xffffL << op.Pos));
@@ -24,7 +24,7 @@ namespace ChocolArm64.Instructions
 
         public static void Movn(ILEmitterCtx context)
         {
-            OpCodeMov op = (OpCodeMov)context.CurrOp;
+            OpCodeMov64 op = (OpCodeMov64)context.CurrOp;
 
             context.EmitLdc_I(~op.Imm);
             context.EmitStintzr(op.Rd);
@@ -32,7 +32,7 @@ namespace ChocolArm64.Instructions
 
         public static void Movz(ILEmitterCtx context)
         {
-            OpCodeMov op = (OpCodeMov)context.CurrOp;
+            OpCodeMov64 op = (OpCodeMov64)context.CurrOp;
 
             context.EmitLdc_I(op.Imm);
             context.EmitStintzr(op.Rd);
diff --git a/ChocolArm64/Instructions/InstEmitMul.cs b/ChocolArm64/Instructions/InstEmitMul.cs
index f7991844db..b7418e6922 100644
--- a/ChocolArm64/Instructions/InstEmitMul.cs
+++ b/ChocolArm64/Instructions/InstEmitMul.cs
@@ -11,7 +11,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitMul(ILEmitterCtx context, OpCode ilOp)
         {
-            OpCodeMul op = (OpCodeMul)context.CurrOp;
+            OpCodeMul64 op = (OpCodeMul64)context.CurrOp;
 
             context.EmitLdintzr(op.Ra);
             context.EmitLdintzr(op.Rn);
@@ -30,7 +30,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitMull(ILEmitterCtx context, OpCode addSubOp, bool signed)
         {
-            OpCodeMul op = (OpCodeMul)context.CurrOp;
+            OpCodeMul64 op = (OpCodeMul64)context.CurrOp;
 
             OpCode castOp = signed
                 ? OpCodes.Conv_I8
@@ -55,7 +55,7 @@ namespace ChocolArm64.Instructions
 
         public static void Smulh(ILEmitterCtx context)
         {
-            OpCodeMul op = (OpCodeMul)context.CurrOp;
+            OpCodeMul64 op = (OpCodeMul64)context.CurrOp;
 
             context.EmitLdintzr(op.Rn);
             context.EmitLdintzr(op.Rm);
@@ -67,7 +67,7 @@ namespace ChocolArm64.Instructions
 
         public static void Umulh(ILEmitterCtx context)
         {
-            OpCodeMul op = (OpCodeMul)context.CurrOp;
+            OpCodeMul64 op = (OpCodeMul64)context.CurrOp;
 
             context.EmitLdintzr(op.Rn);
             context.EmitLdintzr(op.Rm);
diff --git a/ChocolArm64/Instructions/InstEmitSimdArithmetic.cs b/ChocolArm64/Instructions/InstEmitSimdArithmetic.cs
index e97da6378c..9217de5fd9 100644
--- a/ChocolArm64/Instructions/InstEmitSimdArithmetic.cs
+++ b/ChocolArm64/Instructions/InstEmitSimdArithmetic.cs
@@ -49,7 +49,7 @@ namespace ChocolArm64.Instructions
 
         public static void Addp_S(ILEmitterCtx context)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             EmitVectorExtractZx(context, op.Rn, 0, op.Size);
             EmitVectorExtractZx(context, op.Rn, 1, op.Size);
@@ -66,7 +66,7 @@ namespace ChocolArm64.Instructions
 
         public static void Addv_V(ILEmitterCtx context)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             int bytes = op.GetBitsCount() >> 3;
             int elems = bytes >> op.Size;
@@ -85,7 +85,7 @@ namespace ChocolArm64.Instructions
 
         public static void Cls_V(ILEmitterCtx context)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             int bytes = op.GetBitsCount() >> 3;
             int elems = bytes >> op.Size;
@@ -111,7 +111,7 @@ namespace ChocolArm64.Instructions
 
         public static void Clz_V(ILEmitterCtx context)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             int bytes = op.GetBitsCount() >> 3;
             int elems = bytes >> op.Size;
@@ -148,7 +148,7 @@ namespace ChocolArm64.Instructions
 
         public static void Cnt_V(ILEmitterCtx context)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             int elems = op.RegisterSize == RegisterSize.Simd128 ? 16 : 8;
 
@@ -234,7 +234,7 @@ namespace ChocolArm64.Instructions
 
         public static void Faddp_S(ILEmitterCtx context)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             int sizeF = op.Size & 1;
 
@@ -287,7 +287,7 @@ namespace ChocolArm64.Instructions
         {
             if (Optimizations.FastFP && Optimizations.UseSse2)
             {
-                OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+                OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
                 if (op.Size == 0)
                 {
@@ -499,7 +499,7 @@ namespace ChocolArm64.Instructions
         {
             if (Optimizations.FastFP && Optimizations.UseSse2)
             {
-                OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+                OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
                 if (op.Size == 0)
                 {
@@ -627,7 +627,7 @@ namespace ChocolArm64.Instructions
 
         public static void Fnmadd_S(ILEmitterCtx context)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             int sizeF = op.Size & 1;
 
@@ -648,7 +648,7 @@ namespace ChocolArm64.Instructions
 
         public static void Fnmsub_S(ILEmitterCtx context)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             int sizeF = op.Size & 1;
 
@@ -693,7 +693,7 @@ namespace ChocolArm64.Instructions
         {
             if (Optimizations.FastFP && Optimizations.UseSse2)
             {
-                OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+                OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
                 int sizeF = op.Size & 1;
 
@@ -747,7 +747,7 @@ namespace ChocolArm64.Instructions
         {
             if (Optimizations.FastFP && Optimizations.UseSse2)
             {
-                OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+                OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
                 int sizeF = op.Size & 1;
 
@@ -808,7 +808,7 @@ namespace ChocolArm64.Instructions
 
         public static void Frinta_S(ILEmitterCtx context)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             EmitVectorExtractF(context, op.Rn, 0, op.Size);
 
@@ -827,7 +827,7 @@ namespace ChocolArm64.Instructions
 
         public static void Frinti_S(ILEmitterCtx context)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             EmitScalarUnaryOpF(context, () =>
             {
@@ -850,7 +850,7 @@ namespace ChocolArm64.Instructions
 
         public static void Frinti_V(ILEmitterCtx context)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             int sizeF = op.Size & 1;
 
@@ -891,7 +891,7 @@ namespace ChocolArm64.Instructions
 
         public static void Frintn_S(ILEmitterCtx context)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             EmitVectorExtractF(context, op.Rn, 0, op.Size);
 
@@ -926,7 +926,7 @@ namespace ChocolArm64.Instructions
 
         public static void Frintx_S(ILEmitterCtx context)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             EmitScalarUnaryOpF(context, () =>
             {
@@ -949,7 +949,7 @@ namespace ChocolArm64.Instructions
 
         public static void Frintx_V(ILEmitterCtx context)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             EmitVectorUnaryOpF(context, () =>
             {
@@ -990,7 +990,7 @@ namespace ChocolArm64.Instructions
         {
             if (Optimizations.FastFP && Optimizations.UseSse2)
             {
-                OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+                OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
                 int sizeF = op.Size & 1;
 
@@ -1052,7 +1052,7 @@ namespace ChocolArm64.Instructions
         {
             if (Optimizations.FastFP && Optimizations.UseSse2)
             {
-                OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+                OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
                 int sizeF = op.Size & 1;
 
@@ -1290,7 +1290,7 @@ namespace ChocolArm64.Instructions
         {
             if (Optimizations.UseSse41)
             {
-                OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+                OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
                 Type[] typesSrl = new Type[] { VectorIntTypesPerSizeLog2[op.Size], typeof(byte) };
                 Type[] typesCvt = new Type[] { VectorIntTypesPerSizeLog2[op.Size] };
@@ -1339,7 +1339,7 @@ namespace ChocolArm64.Instructions
 
         public static void Shadd_V(ILEmitterCtx context)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             if (Optimizations.UseSse2 && op.Size > 0)
             {
@@ -1389,7 +1389,7 @@ namespace ChocolArm64.Instructions
 
         public static void Shsub_V(ILEmitterCtx context)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             if (Optimizations.UseSse2 && op.Size < 2)
             {
@@ -1475,7 +1475,7 @@ namespace ChocolArm64.Instructions
 
         public static void Smlal_V(ILEmitterCtx context)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             if (Optimizations.UseSse41 && op.Size < 2)
             {
@@ -1526,7 +1526,7 @@ namespace ChocolArm64.Instructions
 
         public static void Smlsl_V(ILEmitterCtx context)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             if (Optimizations.UseSse41 && op.Size < 2)
             {
@@ -1662,7 +1662,7 @@ namespace ChocolArm64.Instructions
 
         public static void Srhadd_V(ILEmitterCtx context)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             if (Optimizations.UseSse2 && op.Size < 2)
             {
@@ -1715,7 +1715,7 @@ namespace ChocolArm64.Instructions
         {
             if (Optimizations.UseSse41)
             {
-                OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+                OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
                 Type[] typesSrl = new Type[] { VectorIntTypesPerSizeLog2[op.Size], typeof(byte) };
                 Type[] typesCvt = new Type[] { VectorIntTypesPerSizeLog2[op.Size] };
@@ -1838,7 +1838,7 @@ namespace ChocolArm64.Instructions
         {
             if (Optimizations.UseSse41)
             {
-                OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+                OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
                 Type[] typesSrl = new Type[] { VectorUIntTypesPerSizeLog2[op.Size], typeof(byte) };
                 Type[] typesCvt = new Type[] { VectorUIntTypesPerSizeLog2[op.Size] };
@@ -1882,7 +1882,7 @@ namespace ChocolArm64.Instructions
 
         public static void Uaddlv_V(ILEmitterCtx context)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             int bytes = op.GetBitsCount() >> 3;
             int elems = bytes >> op.Size;
@@ -1906,7 +1906,7 @@ namespace ChocolArm64.Instructions
 
         public static void Uhadd_V(ILEmitterCtx context)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             if (Optimizations.UseSse2 && op.Size > 0)
             {
@@ -1956,7 +1956,7 @@ namespace ChocolArm64.Instructions
 
         public static void Uhsub_V(ILEmitterCtx context)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             if (Optimizations.UseSse2 && op.Size < 2)
             {
@@ -2028,7 +2028,7 @@ namespace ChocolArm64.Instructions
 
         public static void Umlal_V(ILEmitterCtx context)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             if (Optimizations.UseSse41 && op.Size < 2)
             {
@@ -2079,7 +2079,7 @@ namespace ChocolArm64.Instructions
 
         public static void Umlsl_V(ILEmitterCtx context)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             if (Optimizations.UseSse41 && op.Size < 2)
             {
@@ -2165,7 +2165,7 @@ namespace ChocolArm64.Instructions
 
         public static void Urhadd_V(ILEmitterCtx context)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             if (Optimizations.UseSse2 && op.Size < 2)
             {
@@ -2212,7 +2212,7 @@ namespace ChocolArm64.Instructions
         {
             if (Optimizations.UseSse41)
             {
-                OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+                OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
                 Type[] typesSrl = new Type[] { VectorUIntTypesPerSizeLog2[op.Size], typeof(byte) };
                 Type[] typesCvt = new Type[] { VectorUIntTypesPerSizeLog2[op.Size] };
@@ -2269,7 +2269,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitAddLongPairwise(ILEmitterCtx context, bool signed, bool accumulate)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             int words = op.GetBitsCount() >> 4;
             int pairs = words >> op.Size;
@@ -2304,7 +2304,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitDoublingMultiplyHighHalf(ILEmitterCtx context, bool round)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             int eSize = 8 << op.Size;
 
@@ -2340,7 +2340,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitHighNarrow(ILEmitterCtx context, Action emit, bool round)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             int elems = 8 >> op.Size;
 
diff --git a/ChocolArm64/Instructions/InstEmitSimdCmp.cs b/ChocolArm64/Instructions/InstEmitSimdCmp.cs
index 533eebcd5c..c473c0aea1 100644
--- a/ChocolArm64/Instructions/InstEmitSimdCmp.cs
+++ b/ChocolArm64/Instructions/InstEmitSimdCmp.cs
@@ -19,7 +19,7 @@ namespace ChocolArm64.Instructions
 
         public static void Cmeq_V(ILEmitterCtx context)
         {
-            if (context.CurrOp is OpCodeSimdReg op)
+            if (context.CurrOp is OpCodeSimdReg64 op)
             {
                 if (op.Size < 3 && Optimizations.UseSse2)
                 {
@@ -57,7 +57,7 @@ namespace ChocolArm64.Instructions
 
         public static void Cmgt_V(ILEmitterCtx context)
         {
-            if (context.CurrOp is OpCodeSimdReg op)
+            if (context.CurrOp is OpCodeSimdReg64 op)
             {
                 if (op.Size < 3 && Optimizations.UseSse2)
                 {
@@ -130,7 +130,7 @@ namespace ChocolArm64.Instructions
 
         public static void Fccmp_S(ILEmitterCtx context)
         {
-            OpCodeSimdFcond op = (OpCodeSimdFcond)context.CurrOp;
+            OpCodeSimdFcond64 op = (OpCodeSimdFcond64)context.CurrOp;
 
             ILLabel lblTrue = new ILLabel();
             ILLabel lblEnd  = new ILLabel();
@@ -155,7 +155,7 @@ namespace ChocolArm64.Instructions
 
         public static void Fcmeq_S(ILEmitterCtx context)
         {
-            if (context.CurrOp is OpCodeSimdReg && Optimizations.UseSse
+            if (context.CurrOp is OpCodeSimdReg64 && Optimizations.UseSse
                                                  && Optimizations.UseSse2)
             {
                 EmitScalarSseOrSse2OpF(context, nameof(Sse.CompareEqualScalar));
@@ -168,7 +168,7 @@ namespace ChocolArm64.Instructions
 
         public static void Fcmeq_V(ILEmitterCtx context)
         {
-            if (context.CurrOp is OpCodeSimdReg && Optimizations.UseSse
+            if (context.CurrOp is OpCodeSimdReg64 && Optimizations.UseSse
                                                  && Optimizations.UseSse2)
             {
                 EmitVectorSseOrSse2OpF(context, nameof(Sse.CompareEqual));
@@ -181,7 +181,7 @@ namespace ChocolArm64.Instructions
 
         public static void Fcmge_S(ILEmitterCtx context)
         {
-            if (context.CurrOp is OpCodeSimdReg && Optimizations.UseSse
+            if (context.CurrOp is OpCodeSimdReg64 && Optimizations.UseSse
                                                  && Optimizations.UseSse2)
             {
                 EmitScalarSseOrSse2OpF(context, nameof(Sse.CompareGreaterThanOrEqualScalar));
@@ -194,7 +194,7 @@ namespace ChocolArm64.Instructions
 
         public static void Fcmge_V(ILEmitterCtx context)
         {
-            if (context.CurrOp is OpCodeSimdReg && Optimizations.UseSse
+            if (context.CurrOp is OpCodeSimdReg64 && Optimizations.UseSse
                                                  && Optimizations.UseSse2)
             {
                 EmitVectorSseOrSse2OpF(context, nameof(Sse.CompareGreaterThanOrEqual));
@@ -207,7 +207,7 @@ namespace ChocolArm64.Instructions
 
         public static void Fcmgt_S(ILEmitterCtx context)
         {
-            if (context.CurrOp is OpCodeSimdReg && Optimizations.UseSse
+            if (context.CurrOp is OpCodeSimdReg64 && Optimizations.UseSse
                                                  && Optimizations.UseSse2)
             {
                 EmitScalarSseOrSse2OpF(context, nameof(Sse.CompareGreaterThanScalar));
@@ -220,7 +220,7 @@ namespace ChocolArm64.Instructions
 
         public static void Fcmgt_V(ILEmitterCtx context)
         {
-            if (context.CurrOp is OpCodeSimdReg && Optimizations.UseSse
+            if (context.CurrOp is OpCodeSimdReg64 && Optimizations.UseSse
                                                  && Optimizations.UseSse2)
             {
                 EmitVectorSseOrSse2OpF(context, nameof(Sse.CompareGreaterThan));
@@ -253,9 +253,9 @@ namespace ChocolArm64.Instructions
 
         public static void Fcmp_S(ILEmitterCtx context)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
-            bool cmpWithZero = !(op is OpCodeSimdFcond) ? op.Bit3 : false;
+            bool cmpWithZero = !(op is OpCodeSimdFcond64) ? op.Bit3 : false;
 
             //Handle NaN case.
             //If any number is NaN, then NZCV = 0011.
@@ -341,7 +341,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitNaNCheck(ILEmitterCtx context, int reg)
         {
-            IOpCodeSimd op = (IOpCodeSimd)context.CurrOp;
+            IOpCodeSimd64 op = (IOpCodeSimd64)context.CurrOp;
 
             EmitVectorExtractF(context, reg, 0, op.Size);
 
@@ -361,7 +361,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitCmp(ILEmitterCtx context, OpCode ilOp, bool scalar)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             int bytes = op.GetBitsCount() >> 3;
             int elems = !scalar ? bytes >> op.Size : 1;
@@ -372,7 +372,7 @@ namespace ChocolArm64.Instructions
             {
                 EmitVectorExtractSx(context, op.Rn, index, op.Size);
 
-                if (op is OpCodeSimdReg binOp)
+                if (op is OpCodeSimdReg64 binOp)
                 {
                     EmitVectorExtractSx(context, binOp.Rm, index, op.Size);
                 }
@@ -405,7 +405,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitCmtst(ILEmitterCtx context, bool scalar)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             int bytes = op.GetBitsCount() >> 3;
             int elems = !scalar ? bytes >> op.Size : 1;
@@ -450,7 +450,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitVectorFcmp(ILEmitterCtx context, OpCode ilOp)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             int sizeF = op.Size & 1;
 
@@ -470,7 +470,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitFcmp(ILEmitterCtx context, OpCode ilOp, int index, bool scalar)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             int sizeF = op.Size & 1;
 
@@ -478,7 +478,7 @@ namespace ChocolArm64.Instructions
 
             EmitVectorExtractF(context, op.Rn, index, sizeF);
 
-            if (op is OpCodeSimdReg binOp)
+            if (op is OpCodeSimdReg64 binOp)
             {
                 EmitVectorExtractF(context, binOp.Rm, index, sizeF);
             }
diff --git a/ChocolArm64/Instructions/InstEmitSimdCrypto.cs b/ChocolArm64/Instructions/InstEmitSimdCrypto.cs
index 179edfadcc..33c81aab0a 100644
--- a/ChocolArm64/Instructions/InstEmitSimdCrypto.cs
+++ b/ChocolArm64/Instructions/InstEmitSimdCrypto.cs
@@ -7,7 +7,7 @@ namespace ChocolArm64.Instructions
     {
         public static void Aesd_V(ILEmitterCtx context)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             context.EmitLdvec(op.Rd);
             context.EmitLdvec(op.Rn);
@@ -19,7 +19,7 @@ namespace ChocolArm64.Instructions
 
         public static void Aese_V(ILEmitterCtx context)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             context.EmitLdvec(op.Rd);
             context.EmitLdvec(op.Rn);
@@ -31,7 +31,7 @@ namespace ChocolArm64.Instructions
 
         public static void Aesimc_V(ILEmitterCtx context)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             context.EmitLdvec(op.Rn);
 
@@ -42,7 +42,7 @@ namespace ChocolArm64.Instructions
 
         public static void Aesmc_V(ILEmitterCtx context)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             context.EmitLdvec(op.Rn);
 
diff --git a/ChocolArm64/Instructions/InstEmitSimdCvt.cs b/ChocolArm64/Instructions/InstEmitSimdCvt.cs
index 0c791721dd..fa17c09dcd 100644
--- a/ChocolArm64/Instructions/InstEmitSimdCvt.cs
+++ b/ChocolArm64/Instructions/InstEmitSimdCvt.cs
@@ -14,7 +14,7 @@ namespace ChocolArm64.Instructions
     {
         public static void Fcvt_S(ILEmitterCtx context)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             if (Optimizations.UseSse2)
             {
@@ -72,7 +72,7 @@ namespace ChocolArm64.Instructions
 
         public static void Fcvtl_V(ILEmitterCtx context)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             int sizeF = op.Size & 1;
 
@@ -117,7 +117,7 @@ namespace ChocolArm64.Instructions
 
         public static void Fcvtn_V(ILEmitterCtx context)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             int sizeF = op.Size & 1;
 
@@ -233,7 +233,7 @@ namespace ChocolArm64.Instructions
 
         public static void Scvtf_Gp(ILEmitterCtx context)
         {
-            OpCodeSimdCvt op = (OpCodeSimdCvt)context.CurrOp;
+            OpCodeSimdCvt64 op = (OpCodeSimdCvt64)context.CurrOp;
 
             context.EmitLdintzr(op.Rn);
 
@@ -249,7 +249,7 @@ namespace ChocolArm64.Instructions
 
         public static void Scvtf_S(ILEmitterCtx context)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             EmitVectorExtractSx(context, op.Rn, 0, op.Size + 2);
 
@@ -265,7 +265,7 @@ namespace ChocolArm64.Instructions
 
         public static void Ucvtf_Gp(ILEmitterCtx context)
         {
-            OpCodeSimdCvt op = (OpCodeSimdCvt)context.CurrOp;
+            OpCodeSimdCvt64 op = (OpCodeSimdCvt64)context.CurrOp;
 
             context.EmitLdintzr(op.Rn);
 
@@ -283,7 +283,7 @@ namespace ChocolArm64.Instructions
 
         public static void Ucvtf_S(ILEmitterCtx context)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             EmitVectorExtractZx(context, op.Rn, 0, op.Size + 2);
 
@@ -301,7 +301,7 @@ namespace ChocolArm64.Instructions
 
         private static int GetFBits(ILEmitterCtx context)
         {
-            if (context.CurrOp is OpCodeSimdShImm op)
+            if (context.CurrOp is OpCodeSimdShImm64 op)
             {
                 return GetImmShr(op);
             }
@@ -327,7 +327,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitFcvtn(ILEmitterCtx context, bool signed, bool scalar)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             int sizeF = op.Size & 1;
             int sizeI = sizeF + 2;
@@ -385,7 +385,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitFcvt___Gp(ILEmitterCtx context, Action emit, bool signed)
         {
-            OpCodeSimdCvt op = (OpCodeSimdCvt)context.CurrOp;
+            OpCodeSimdCvt64 op = (OpCodeSimdCvt64)context.CurrOp;
 
             EmitVectorExtractF(context, op.Rn, 0, op.Size);
 
@@ -420,7 +420,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitFcvtz__Gp_Fix(ILEmitterCtx context, bool signed)
         {
-            OpCodeSimdCvt op = (OpCodeSimdCvt)context.CurrOp;
+            OpCodeSimdCvt64 op = (OpCodeSimdCvt64)context.CurrOp;
 
             EmitVectorExtractF(context, op.Rn, 0, op.Size);
 
@@ -453,7 +453,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitVectorCvtf(ILEmitterCtx context, bool signed)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             int sizeF = op.Size & 1;
             int sizeI = sizeF + 2;
@@ -499,7 +499,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitScalarFcvtz(ILEmitterCtx context, bool signed)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             int sizeF = op.Size & 1;
             int sizeI = sizeF + 2;
@@ -543,7 +543,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitVectorFcvtz(ILEmitterCtx context, bool signed)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             int sizeF = op.Size & 1;
             int sizeI = sizeF + 2;
diff --git a/ChocolArm64/Instructions/InstEmitSimdHash.cs b/ChocolArm64/Instructions/InstEmitSimdHash.cs
index 8e9a63a82d..bb767fec07 100644
--- a/ChocolArm64/Instructions/InstEmitSimdHash.cs
+++ b/ChocolArm64/Instructions/InstEmitSimdHash.cs
@@ -10,7 +10,7 @@ namespace ChocolArm64.Instructions
 #region "Sha1"
         public static void Sha1c_V(ILEmitterCtx context)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             context.EmitLdvec(op.Rd);
             EmitVectorExtractZx(context, op.Rn, 0, 2);
@@ -23,7 +23,7 @@ namespace ChocolArm64.Instructions
 
         public static void Sha1h_V(ILEmitterCtx context)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             EmitVectorExtractZx(context, op.Rn, 0, 2);
 
@@ -34,7 +34,7 @@ namespace ChocolArm64.Instructions
 
         public static void Sha1m_V(ILEmitterCtx context)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             context.EmitLdvec(op.Rd);
             EmitVectorExtractZx(context, op.Rn, 0, 2);
@@ -47,7 +47,7 @@ namespace ChocolArm64.Instructions
 
         public static void Sha1p_V(ILEmitterCtx context)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             context.EmitLdvec(op.Rd);
             EmitVectorExtractZx(context, op.Rn, 0, 2);
@@ -60,7 +60,7 @@ namespace ChocolArm64.Instructions
 
         public static void Sha1su0_V(ILEmitterCtx context)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             context.EmitLdvec(op.Rd);
             context.EmitLdvec(op.Rn);
@@ -73,7 +73,7 @@ namespace ChocolArm64.Instructions
 
         public static void Sha1su1_V(ILEmitterCtx context)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             context.EmitLdvec(op.Rd);
             context.EmitLdvec(op.Rn);
@@ -87,7 +87,7 @@ namespace ChocolArm64.Instructions
 #region "Sha256"
         public static void Sha256h_V(ILEmitterCtx context)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             context.EmitLdvec(op.Rd);
             context.EmitLdvec(op.Rn);
@@ -100,7 +100,7 @@ namespace ChocolArm64.Instructions
 
         public static void Sha256h2_V(ILEmitterCtx context)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             context.EmitLdvec(op.Rd);
             context.EmitLdvec(op.Rn);
@@ -113,7 +113,7 @@ namespace ChocolArm64.Instructions
 
         public static void Sha256su0_V(ILEmitterCtx context)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             context.EmitLdvec(op.Rd);
             context.EmitLdvec(op.Rn);
@@ -125,7 +125,7 @@ namespace ChocolArm64.Instructions
 
         public static void Sha256su1_V(ILEmitterCtx context)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             context.EmitLdvec(op.Rd);
             context.EmitLdvec(op.Rn);
diff --git a/ChocolArm64/Instructions/InstEmitSimdHelper.cs b/ChocolArm64/Instructions/InstEmitSimdHelper.cs
index ac28b9a4fa..fad5151029 100644
--- a/ChocolArm64/Instructions/InstEmitSimdHelper.cs
+++ b/ChocolArm64/Instructions/InstEmitSimdHelper.cs
@@ -57,12 +57,12 @@ namespace ChocolArm64.Instructions
             RdRnRm = Rd | Rn | Rm
         }
 
-        public static int GetImmShl(OpCodeSimdShImm op)
+        public static int GetImmShl(OpCodeSimdShImm64 op)
         {
             return op.Imm - (8 << op.Size);
         }
 
-        public static int GetImmShr(OpCodeSimdShImm op)
+        public static int GetImmShr(OpCodeSimdShImm64 op)
         {
             return (8 << (op.Size + 1)) - op.Imm;
         }
@@ -84,13 +84,13 @@ namespace ChocolArm64.Instructions
 
         private static void EmitSseOp(ILEmitterCtx context, string name, Type type)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             EmitLdvecWithSignedCast(context, op.Rn, op.Size);
 
             Type baseType = VectorIntTypesPerSizeLog2[op.Size];
 
-            if (op is OpCodeSimdReg binOp)
+            if (op is OpCodeSimdReg64 binOp)
             {
                 EmitLdvecWithSignedCast(context, binOp.Rm, op.Size);
 
@@ -195,7 +195,7 @@ namespace ChocolArm64.Instructions
 
         public static void EmitSseOrSse2OpF(ILEmitterCtx context, string name, bool scalar)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             int sizeF = op.Size & 1;
 
@@ -225,7 +225,7 @@ namespace ChocolArm64.Instructions
                 baseType = typeof(Vector128<double>);
             }
 
-            if (op is OpCodeSimdReg binOp)
+            if (op is OpCodeSimdReg64 binOp)
             {
                 Ldvec(binOp.Rm);
 
@@ -262,7 +262,7 @@ namespace ChocolArm64.Instructions
 
         public static void EmitUnaryMathCall(ILEmitterCtx context, string name)
         {
-            IOpCodeSimd op = (IOpCodeSimd)context.CurrOp;
+            IOpCodeSimd64 op = (IOpCodeSimd64)context.CurrOp;
 
             int sizeF = op.Size & 1;
 
@@ -282,7 +282,7 @@ namespace ChocolArm64.Instructions
 
         public static void EmitBinaryMathCall(ILEmitterCtx context, string name)
         {
-            IOpCodeSimd op = (IOpCodeSimd)context.CurrOp;
+            IOpCodeSimd64 op = (IOpCodeSimd64)context.CurrOp;
 
             int sizeF = op.Size & 1;
 
@@ -302,7 +302,7 @@ namespace ChocolArm64.Instructions
 
         public static void EmitRoundMathCall(ILEmitterCtx context, MidpointRounding roundMode)
         {
-            IOpCodeSimd op = (IOpCodeSimd)context.CurrOp;
+            IOpCodeSimd64 op = (IOpCodeSimd64)context.CurrOp;
 
             int sizeF = op.Size & 1;
 
@@ -324,7 +324,7 @@ namespace ChocolArm64.Instructions
 
         public static void EmitUnarySoftFloatCall(ILEmitterCtx context, string name)
         {
-            IOpCodeSimd op = (IOpCodeSimd)context.CurrOp;
+            IOpCodeSimd64 op = (IOpCodeSimd64)context.CurrOp;
 
             int sizeF = op.Size & 1;
 
@@ -344,7 +344,7 @@ namespace ChocolArm64.Instructions
 
         public static void EmitSoftFloatCall(ILEmitterCtx context, string name)
         {
-            IOpCodeSimd op = (IOpCodeSimd)context.CurrOp;
+            IOpCodeSimd64 op = (IOpCodeSimd64)context.CurrOp;
 
             Type type = (op.Size & 1) == 0
                 ? typeof(SoftFloat32)
@@ -357,21 +357,21 @@ namespace ChocolArm64.Instructions
 
         public static void EmitScalarBinaryOpByElemF(ILEmitterCtx context, Action emit)
         {
-            OpCodeSimdRegElemF op = (OpCodeSimdRegElemF)context.CurrOp;
+            OpCodeSimdRegElemF64 op = (OpCodeSimdRegElemF64)context.CurrOp;
 
             EmitScalarOpByElemF(context, emit, op.Index, ternary: false);
         }
 
         public static void EmitScalarTernaryOpByElemF(ILEmitterCtx context, Action emit)
         {
-            OpCodeSimdRegElemF op = (OpCodeSimdRegElemF)context.CurrOp;
+            OpCodeSimdRegElemF64 op = (OpCodeSimdRegElemF64)context.CurrOp;
 
             EmitScalarOpByElemF(context, emit, op.Index, ternary: true);
         }
 
         public static void EmitScalarOpByElemF(ILEmitterCtx context, Action emit, int elem, bool ternary)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             int sizeF = op.Size & 1;
 
@@ -415,7 +415,7 @@ namespace ChocolArm64.Instructions
 
         public static void EmitScalarOp(ILEmitterCtx context, Action emit, OperFlags opers, bool signed)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             bool rd = (opers & OperFlags.Rd) != 0;
             bool rn = (opers & OperFlags.Rn) != 0;
@@ -433,7 +433,7 @@ namespace ChocolArm64.Instructions
 
             if (rm)
             {
-                EmitVectorExtract(context, ((OpCodeSimdReg)op).Rm, 0, op.Size, signed);
+                EmitVectorExtract(context, ((OpCodeSimdReg64)op).Rm, 0, op.Size, signed);
             }
 
             emit();
@@ -458,7 +458,7 @@ namespace ChocolArm64.Instructions
 
         public static void EmitScalarOpF(ILEmitterCtx context, Action emit, OperFlags opers)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             int sizeF = op.Size & 1;
 
@@ -468,7 +468,7 @@ namespace ChocolArm64.Instructions
 
             if (ra)
             {
-                EmitVectorExtractF(context, ((OpCodeSimdReg)op).Ra, 0, sizeF);
+                EmitVectorExtractF(context, ((OpCodeSimdReg64)op).Ra, 0, sizeF);
             }
 
             if (rn)
@@ -478,7 +478,7 @@ namespace ChocolArm64.Instructions
 
             if (rm)
             {
-                EmitVectorExtractF(context, ((OpCodeSimdReg)op).Rm, 0, sizeF);
+                EmitVectorExtractF(context, ((OpCodeSimdReg64)op).Rm, 0, sizeF);
             }
 
             emit();
@@ -503,7 +503,7 @@ namespace ChocolArm64.Instructions
 
         public static void EmitVectorOpF(ILEmitterCtx context, Action emit, OperFlags opers)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             int sizeF = op.Size & 1;
 
@@ -528,7 +528,7 @@ namespace ChocolArm64.Instructions
 
                 if (rm)
                 {
-                    EmitVectorExtractF(context, ((OpCodeSimdReg)op).Rm, index, sizeF);
+                    EmitVectorExtractF(context, ((OpCodeSimdReg64)op).Rm, index, sizeF);
                 }
 
                 emit();
@@ -544,21 +544,21 @@ namespace ChocolArm64.Instructions
 
         public static void EmitVectorBinaryOpByElemF(ILEmitterCtx context, Action emit)
         {
-            OpCodeSimdRegElemF op = (OpCodeSimdRegElemF)context.CurrOp;
+            OpCodeSimdRegElemF64 op = (OpCodeSimdRegElemF64)context.CurrOp;
 
             EmitVectorOpByElemF(context, emit, op.Index, ternary: false);
         }
 
         public static void EmitVectorTernaryOpByElemF(ILEmitterCtx context, Action emit)
         {
-            OpCodeSimdRegElemF op = (OpCodeSimdRegElemF)context.CurrOp;
+            OpCodeSimdRegElemF64 op = (OpCodeSimdRegElemF64)context.CurrOp;
 
             EmitVectorOpByElemF(context, emit, op.Index, ternary: true);
         }
 
         public static void EmitVectorOpByElemF(ILEmitterCtx context, Action emit, int elem, bool ternary)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             int sizeF = op.Size & 1;
 
@@ -621,7 +621,7 @@ namespace ChocolArm64.Instructions
 
         public static void EmitVectorOp(ILEmitterCtx context, Action emit, OperFlags opers, bool signed)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             int bytes = op.GetBitsCount() >> 3;
             int elems = bytes >> op.Size;
@@ -644,7 +644,7 @@ namespace ChocolArm64.Instructions
 
                 if (rm)
                 {
-                    EmitVectorExtract(context, ((OpCodeSimdReg)op).Rm, index, op.Size, signed);
+                    EmitVectorExtract(context, ((OpCodeSimdReg64)op).Rm, index, op.Size, signed);
                 }
 
                 emit();
@@ -660,28 +660,28 @@ namespace ChocolArm64.Instructions
 
         public static void EmitVectorBinaryOpByElemSx(ILEmitterCtx context, Action emit)
         {
-            OpCodeSimdRegElem op = (OpCodeSimdRegElem)context.CurrOp;
+            OpCodeSimdRegElem64 op = (OpCodeSimdRegElem64)context.CurrOp;
 
             EmitVectorOpByElem(context, emit, op.Index, false, true);
         }
 
         public static void EmitVectorBinaryOpByElemZx(ILEmitterCtx context, Action emit)
         {
-            OpCodeSimdRegElem op = (OpCodeSimdRegElem)context.CurrOp;
+            OpCodeSimdRegElem64 op = (OpCodeSimdRegElem64)context.CurrOp;
 
             EmitVectorOpByElem(context, emit, op.Index, false, false);
         }
 
         public static void EmitVectorTernaryOpByElemZx(ILEmitterCtx context, Action emit)
         {
-            OpCodeSimdRegElem op = (OpCodeSimdRegElem)context.CurrOp;
+            OpCodeSimdRegElem64 op = (OpCodeSimdRegElem64)context.CurrOp;
 
             EmitVectorOpByElem(context, emit, op.Index, true, false);
         }
 
         public static void EmitVectorOpByElem(ILEmitterCtx context, Action emit, int elem, bool ternary, bool signed)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             int bytes = op.GetBitsCount() >> 3;
             int elems = bytes >> op.Size;
@@ -725,7 +725,7 @@ namespace ChocolArm64.Instructions
 
         public static void EmitVectorImmOp(ILEmitterCtx context, Action emit, bool binary)
         {
-            OpCodeSimdImm op = (OpCodeSimdImm)context.CurrOp;
+            OpCodeSimdImm64 op = (OpCodeSimdImm64)context.CurrOp;
 
             int bytes = op.GetBitsCount() >> 3;
             int elems = bytes >> op.Size;
@@ -762,7 +762,7 @@ namespace ChocolArm64.Instructions
 
         public static void EmitVectorWidenRmBinaryOp(ILEmitterCtx context, Action emit, bool signed)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             int elems = 8 >> op.Size;
 
@@ -804,7 +804,7 @@ namespace ChocolArm64.Instructions
 
         public static void EmitVectorWidenRnRmOp(ILEmitterCtx context, Action emit, bool ternary, bool signed)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             int elems = 8 >> op.Size;
 
@@ -841,7 +841,7 @@ namespace ChocolArm64.Instructions
 
         public static void EmitVectorPairwiseOp(ILEmitterCtx context, Action emit, bool signed)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             int words = op.GetBitsCount() >> 4;
             int pairs = words >> op.Size;
@@ -875,7 +875,7 @@ namespace ChocolArm64.Instructions
 
         public static void EmitVectorPairwiseOpF(ILEmitterCtx context, Action emit)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             int sizeF = op.Size & 1;
 
@@ -939,7 +939,7 @@ namespace ChocolArm64.Instructions
 
         public static void EmitSaturatingUnaryOpSx(ILEmitterCtx context, Action emit, SaturatingFlags flags)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             bool scalar = (flags & SaturatingFlags.Scalar) != 0;
 
@@ -1000,7 +1000,7 @@ namespace ChocolArm64.Instructions
 
         public static void EmitSaturatingBinaryOp(ILEmitterCtx context, Action emit, SaturatingFlags flags)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             bool scalar = (flags & SaturatingFlags.Scalar) != 0;
             bool signed = (flags & SaturatingFlags.Signed) != 0;
@@ -1023,7 +1023,7 @@ namespace ChocolArm64.Instructions
                 for (int index = 0; index < elems; index++)
                 {
                     EmitVectorExtract(context,                   op.Rn, index, op.Size, signed);
-                    EmitVectorExtract(context, ((OpCodeSimdReg)op).Rm, index, op.Size, signed);
+                    EmitVectorExtract(context, ((OpCodeSimdReg64)op).Rm, index, op.Size, signed);
 
                     if (op.Size <= 2)
                     {
@@ -1072,7 +1072,7 @@ namespace ChocolArm64.Instructions
                 for (int index = 0; index < elems; index++)
                 {
                     EmitVectorExtract(context,                   op.Rn, index, op.Size, signed);
-                    EmitVectorExtract(context, ((OpCodeSimdReg)op).Rm, index, op.Size, signed);
+                    EmitVectorExtract(context, ((OpCodeSimdReg64)op).Rm, index, op.Size, signed);
 
                     emit();
 
@@ -1109,7 +1109,7 @@ namespace ChocolArm64.Instructions
 
         public static void EmitSaturatingNarrowOp(ILEmitterCtx context, SaturatingNarrowFlags flags)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             bool scalar    = (flags & SaturatingNarrowFlags.Scalar)    != 0;
             bool signedSrc = (flags & SaturatingNarrowFlags.SignedSrc) != 0;
@@ -1180,7 +1180,7 @@ namespace ChocolArm64.Instructions
         // TSrc (64bit) == TDst (64bit); signed.
         public static void EmitUnarySignedSatQAbsOrNeg(ILEmitterCtx context)
         {
-            if (((OpCodeSimd)context.CurrOp).Size < 3)
+            if (((OpCodeSimd64)context.CurrOp).Size < 3)
             {
                 throw new InvalidOperationException();
             }
@@ -1193,7 +1193,7 @@ namespace ChocolArm64.Instructions
         // TSrcs (64bit) == TDst (64bit); signed, unsigned.
         public static void EmitBinarySatQAdd(ILEmitterCtx context, bool signed)
         {
-            if (((OpCodeSimdReg)context.CurrOp).Size < 3)
+            if (((OpCodeSimdReg64)context.CurrOp).Size < 3)
             {
                 throw new InvalidOperationException();
             }
@@ -1208,7 +1208,7 @@ namespace ChocolArm64.Instructions
         // TSrcs (64bit) == TDst (64bit); signed, unsigned.
         public static void EmitBinarySatQSub(ILEmitterCtx context, bool signed)
         {
-            if (((OpCodeSimdReg)context.CurrOp).Size < 3)
+            if (((OpCodeSimdReg64)context.CurrOp).Size < 3)
             {
                 throw new InvalidOperationException();
             }
@@ -1223,7 +1223,7 @@ namespace ChocolArm64.Instructions
         // TSrcs (64bit) == TDst (64bit); signed, unsigned.
         public static void EmitBinarySatQAccumulate(ILEmitterCtx context, bool signed)
         {
-            if (((OpCodeSimd)context.CurrOp).Size < 3)
+            if (((OpCodeSimd64)context.CurrOp).Size < 3)
             {
                 throw new InvalidOperationException();
             }
diff --git a/ChocolArm64/Instructions/InstEmitSimdLogical.cs b/ChocolArm64/Instructions/InstEmitSimdLogical.cs
index 97c4d87252..f51568ebbe 100644
--- a/ChocolArm64/Instructions/InstEmitSimdLogical.cs
+++ b/ChocolArm64/Instructions/InstEmitSimdLogical.cs
@@ -27,7 +27,7 @@ namespace ChocolArm64.Instructions
         {
             if (Optimizations.UseSse2)
             {
-                OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+                OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
                 EmitLdvecWithUnsignedCast(context, op.Rm, op.Size);
                 EmitLdvecWithUnsignedCast(context, op.Rn, op.Size);
@@ -78,7 +78,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitBitBif(ILEmitterCtx context, bool notRm)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             if (Optimizations.UseSse2)
             {
@@ -148,7 +148,7 @@ namespace ChocolArm64.Instructions
         {
             if (Optimizations.UseSse2)
             {
-                OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+                OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
                 Type[] types = new Type[]
                 {
@@ -238,7 +238,7 @@ namespace ChocolArm64.Instructions
 
         public static void Rbit_V(ILEmitterCtx context)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             int elems = op.RegisterSize == RegisterSize.Simd128 ? 16 : 8;
 
@@ -278,7 +278,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitRev_V(ILEmitterCtx context, int containerSize)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             if (op.Size >= containerSize)
             {
diff --git a/ChocolArm64/Instructions/InstEmitSimdMemory.cs b/ChocolArm64/Instructions/InstEmitSimdMemory.cs
index a2c2784d7c..eb05325786 100644
--- a/ChocolArm64/Instructions/InstEmitSimdMemory.cs
+++ b/ChocolArm64/Instructions/InstEmitSimdMemory.cs
@@ -33,7 +33,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitSimdMemMs(ILEmitterCtx context, bool isLoad)
         {
-            OpCodeSimdMemMs op = (OpCodeSimdMemMs)context.CurrOp;
+            OpCodeSimdMemMs64 op = (OpCodeSimdMemMs64)context.CurrOp;
 
             int offset = 0;
 
@@ -84,7 +84,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitSimdMemSs(ILEmitterCtx context, bool isLoad)
         {
-            OpCodeSimdMemSs op = (OpCodeSimdMemSs)context.CurrOp;
+            OpCodeSimdMemSs64 op = (OpCodeSimdMemSs64)context.CurrOp;
 
             int offset = 0;
 
@@ -164,7 +164,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitSimdMemWBack(ILEmitterCtx context, int offset)
         {
-            OpCodeMemReg op = (OpCodeMemReg)context.CurrOp;
+            OpCodeMemReg64 op = (OpCodeMemReg64)context.CurrOp;
 
             context.EmitLdint(op.Rn);
 
diff --git a/ChocolArm64/Instructions/InstEmitSimdMove.cs b/ChocolArm64/Instructions/InstEmitSimdMove.cs
index 9f19c96775..3f539b8ad4 100644
--- a/ChocolArm64/Instructions/InstEmitSimdMove.cs
+++ b/ChocolArm64/Instructions/InstEmitSimdMove.cs
@@ -13,7 +13,7 @@ namespace ChocolArm64.Instructions
     {
         public static void Dup_Gp(ILEmitterCtx context)
         {
-            OpCodeSimdIns op = (OpCodeSimdIns)context.CurrOp;
+            OpCodeSimdIns64 op = (OpCodeSimdIns64)context.CurrOp;
 
             if (Optimizations.UseSse2)
             {
@@ -58,7 +58,7 @@ namespace ChocolArm64.Instructions
 
         public static void Dup_S(ILEmitterCtx context)
         {
-            OpCodeSimdIns op = (OpCodeSimdIns)context.CurrOp;
+            OpCodeSimdIns64 op = (OpCodeSimdIns64)context.CurrOp;
 
             EmitVectorExtractZx(context, op.Rn, op.DstIndex, op.Size);
 
@@ -67,7 +67,7 @@ namespace ChocolArm64.Instructions
 
         public static void Dup_V(ILEmitterCtx context)
         {
-            OpCodeSimdIns op = (OpCodeSimdIns)context.CurrOp;
+            OpCodeSimdIns64 op = (OpCodeSimdIns64)context.CurrOp;
 
             int bytes = op.GetBitsCount() >> 3;
             int elems = bytes >> op.Size;
@@ -87,7 +87,7 @@ namespace ChocolArm64.Instructions
 
         public static void Ext_V(ILEmitterCtx context)
         {
-            OpCodeSimdExt op = (OpCodeSimdExt)context.CurrOp;
+            OpCodeSimdExt64 op = (OpCodeSimdExt64)context.CurrOp;
 
             context.EmitLdvec(op.Rd);
             context.EmitStvectmp();
@@ -120,7 +120,7 @@ namespace ChocolArm64.Instructions
 
         public static void Fcsel_S(ILEmitterCtx context)
         {
-            OpCodeSimdFcond op = (OpCodeSimdFcond)context.CurrOp;
+            OpCodeSimdFcond64 op = (OpCodeSimdFcond64)context.CurrOp;
 
             ILLabel lblTrue = new ILLabel();
             ILLabel lblEnd  = new ILLabel();
@@ -142,7 +142,7 @@ namespace ChocolArm64.Instructions
 
         public static void Fmov_Ftoi(ILEmitterCtx context)
         {
-            OpCodeSimdCvt op = (OpCodeSimdCvt)context.CurrOp;
+            OpCodeSimdCvt64 op = (OpCodeSimdCvt64)context.CurrOp;
 
             EmitVectorExtractZx(context, op.Rn, 0, 3);
 
@@ -153,7 +153,7 @@ namespace ChocolArm64.Instructions
 
         public static void Fmov_Ftoi1(ILEmitterCtx context)
         {
-            OpCodeSimdCvt op = (OpCodeSimdCvt)context.CurrOp;
+            OpCodeSimdCvt64 op = (OpCodeSimdCvt64)context.CurrOp;
 
             EmitVectorExtractZx(context, op.Rn, 1, 3);
 
@@ -164,7 +164,7 @@ namespace ChocolArm64.Instructions
 
         public static void Fmov_Itof(ILEmitterCtx context)
         {
-            OpCodeSimdCvt op = (OpCodeSimdCvt)context.CurrOp;
+            OpCodeSimdCvt64 op = (OpCodeSimdCvt64)context.CurrOp;
 
             context.EmitLdintzr(op.Rn);
 
@@ -175,7 +175,7 @@ namespace ChocolArm64.Instructions
 
         public static void Fmov_Itof1(ILEmitterCtx context)
         {
-            OpCodeSimdCvt op = (OpCodeSimdCvt)context.CurrOp;
+            OpCodeSimdCvt64 op = (OpCodeSimdCvt64)context.CurrOp;
 
             context.EmitLdintzr(op.Rn);
 
@@ -186,7 +186,7 @@ namespace ChocolArm64.Instructions
 
         public static void Fmov_S(ILEmitterCtx context)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             EmitVectorExtractF(context, op.Rn, 0, op.Size);
 
@@ -195,7 +195,7 @@ namespace ChocolArm64.Instructions
 
         public static void Fmov_Si(ILEmitterCtx context)
         {
-            OpCodeSimdFmov op = (OpCodeSimdFmov)context.CurrOp;
+            OpCodeSimdFmov64 op = (OpCodeSimdFmov64)context.CurrOp;
 
             context.EmitLdc_I8(op.Imm);
 
@@ -204,7 +204,7 @@ namespace ChocolArm64.Instructions
 
         public static void Fmov_V(ILEmitterCtx context)
         {
-            OpCodeSimdImm op = (OpCodeSimdImm)context.CurrOp;
+            OpCodeSimdImm64 op = (OpCodeSimdImm64)context.CurrOp;
 
             int elems = op.RegisterSize == RegisterSize.Simd128 ? 4 : 2;
 
@@ -223,7 +223,7 @@ namespace ChocolArm64.Instructions
 
         public static void Ins_Gp(ILEmitterCtx context)
         {
-            OpCodeSimdIns op = (OpCodeSimdIns)context.CurrOp;
+            OpCodeSimdIns64 op = (OpCodeSimdIns64)context.CurrOp;
 
             context.EmitLdintzr(op.Rn);
 
@@ -232,7 +232,7 @@ namespace ChocolArm64.Instructions
 
         public static void Ins_V(ILEmitterCtx context)
         {
-            OpCodeSimdIns op = (OpCodeSimdIns)context.CurrOp;
+            OpCodeSimdIns64 op = (OpCodeSimdIns64)context.CurrOp;
 
             EmitVectorExtractZx(context, op.Rn, op.SrcIndex, op.Size);
 
@@ -251,7 +251,7 @@ namespace ChocolArm64.Instructions
 
         public static void Smov_S(ILEmitterCtx context)
         {
-            OpCodeSimdIns op = (OpCodeSimdIns)context.CurrOp;
+            OpCodeSimdIns64 op = (OpCodeSimdIns64)context.CurrOp;
 
             EmitVectorExtractSx(context, op.Rn, op.DstIndex, op.Size);
 
@@ -262,7 +262,7 @@ namespace ChocolArm64.Instructions
 
         public static void Tbl_V(ILEmitterCtx context)
         {
-            OpCodeSimdTbl op = (OpCodeSimdTbl)context.CurrOp;
+            OpCodeSimdTbl64 op = (OpCodeSimdTbl64)context.CurrOp;
 
             context.EmitLdvec(op.Rm);
 
@@ -307,7 +307,7 @@ namespace ChocolArm64.Instructions
 
         public static void Umov_S(ILEmitterCtx context)
         {
-            OpCodeSimdIns op = (OpCodeSimdIns)context.CurrOp;
+            OpCodeSimdIns64 op = (OpCodeSimdIns64)context.CurrOp;
 
             EmitVectorExtractZx(context, op.Rn, op.DstIndex, op.Size);
 
@@ -326,7 +326,7 @@ namespace ChocolArm64.Instructions
 
         public static void Xtn_V(ILEmitterCtx context)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             int elems = 8 >> op.Size;
 
@@ -442,7 +442,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitVectorTranspose(ILEmitterCtx context, int part)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             int words = op.GetBitsCount() >> 4;
             int pairs = words >> op.Size;
@@ -469,7 +469,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitVectorUnzip(ILEmitterCtx context, int part)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             int words = op.GetBitsCount() >> 4;
             int pairs = words >> op.Size;
@@ -496,7 +496,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitVectorZip(ILEmitterCtx context, int part)
         {
-            OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
+            OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
 
             if (Optimizations.UseSse2)
             {
diff --git a/ChocolArm64/Instructions/InstEmitSimdShift.cs b/ChocolArm64/Instructions/InstEmitSimdShift.cs
index b9fe538e46..3c24ff23c2 100644
--- a/ChocolArm64/Instructions/InstEmitSimdShift.cs
+++ b/ChocolArm64/Instructions/InstEmitSimdShift.cs
@@ -20,7 +20,7 @@ namespace ChocolArm64.Instructions
 
         public static void Shl_S(ILEmitterCtx context)
         {
-            OpCodeSimdShImm op = (OpCodeSimdShImm)context.CurrOp;
+            OpCodeSimdShImm64 op = (OpCodeSimdShImm64)context.CurrOp;
 
             EmitScalarUnaryOpZx(context, () =>
             {
@@ -32,7 +32,7 @@ namespace ChocolArm64.Instructions
 
         public static void Shl_V(ILEmitterCtx context)
         {
-            OpCodeSimdShImm op = (OpCodeSimdShImm)context.CurrOp;
+            OpCodeSimdShImm64 op = (OpCodeSimdShImm64)context.CurrOp;
 
             if (Optimizations.UseSse2 && op.Size > 0)
             {
@@ -63,7 +63,7 @@ namespace ChocolArm64.Instructions
 
         public static void Shll_V(ILEmitterCtx context)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             int shift = 8 << op.Size;
 
@@ -77,7 +77,7 @@ namespace ChocolArm64.Instructions
 
         public static void Sli_V(ILEmitterCtx context)
         {
-            OpCodeSimdShImm op = (OpCodeSimdShImm)context.CurrOp;
+            OpCodeSimdShImm64 op = (OpCodeSimdShImm64)context.CurrOp;
 
             int bytes = op.GetBitsCount() >> 3;
             int elems = bytes >> op.Size;
@@ -157,7 +157,7 @@ namespace ChocolArm64.Instructions
 
         public static void Srshr_V(ILEmitterCtx context)
         {
-            OpCodeSimdShImm op = (OpCodeSimdShImm)context.CurrOp;
+            OpCodeSimdShImm64 op = (OpCodeSimdShImm64)context.CurrOp;
 
             if (Optimizations.UseSse2 && op.Size > 0
                                        && op.Size < 3)
@@ -206,7 +206,7 @@ namespace ChocolArm64.Instructions
 
         public static void Srsra_V(ILEmitterCtx context)
         {
-            OpCodeSimdShImm op = (OpCodeSimdShImm)context.CurrOp;
+            OpCodeSimdShImm64 op = (OpCodeSimdShImm64)context.CurrOp;
 
             if (Optimizations.UseSse2 && op.Size > 0
                                        && op.Size < 3)
@@ -257,7 +257,7 @@ namespace ChocolArm64.Instructions
 
         public static void Sshll_V(ILEmitterCtx context)
         {
-            OpCodeSimdShImm op = (OpCodeSimdShImm)context.CurrOp;
+            OpCodeSimdShImm64 op = (OpCodeSimdShImm64)context.CurrOp;
 
             EmitVectorShImmWidenBinarySx(context, () => context.Emit(OpCodes.Shl), GetImmShl(op));
         }
@@ -269,7 +269,7 @@ namespace ChocolArm64.Instructions
 
         public static void Sshr_V(ILEmitterCtx context)
         {
-            OpCodeSimdShImm op = (OpCodeSimdShImm)context.CurrOp;
+            OpCodeSimdShImm64 op = (OpCodeSimdShImm64)context.CurrOp;
 
             if (Optimizations.UseSse2 && op.Size > 0
                                        && op.Size < 3)
@@ -301,7 +301,7 @@ namespace ChocolArm64.Instructions
 
         public static void Ssra_V(ILEmitterCtx context)
         {
-            OpCodeSimdShImm op = (OpCodeSimdShImm)context.CurrOp;
+            OpCodeSimdShImm64 op = (OpCodeSimdShImm64)context.CurrOp;
 
             if (Optimizations.UseSse2 && op.Size > 0
                                        && op.Size < 3)
@@ -357,7 +357,7 @@ namespace ChocolArm64.Instructions
 
         public static void Urshr_V(ILEmitterCtx context)
         {
-            OpCodeSimdShImm op = (OpCodeSimdShImm)context.CurrOp;
+            OpCodeSimdShImm64 op = (OpCodeSimdShImm64)context.CurrOp;
 
             if (Optimizations.UseSse2 && op.Size > 0)
             {
@@ -405,7 +405,7 @@ namespace ChocolArm64.Instructions
 
         public static void Ursra_V(ILEmitterCtx context)
         {
-            OpCodeSimdShImm op = (OpCodeSimdShImm)context.CurrOp;
+            OpCodeSimdShImm64 op = (OpCodeSimdShImm64)context.CurrOp;
 
             if (Optimizations.UseSse2 && op.Size > 0)
             {
@@ -455,7 +455,7 @@ namespace ChocolArm64.Instructions
 
         public static void Ushll_V(ILEmitterCtx context)
         {
-            OpCodeSimdShImm op = (OpCodeSimdShImm)context.CurrOp;
+            OpCodeSimdShImm64 op = (OpCodeSimdShImm64)context.CurrOp;
 
             EmitVectorShImmWidenBinaryZx(context, () => context.Emit(OpCodes.Shl), GetImmShl(op));
         }
@@ -467,7 +467,7 @@ namespace ChocolArm64.Instructions
 
         public static void Ushr_V(ILEmitterCtx context)
         {
-            OpCodeSimdShImm op = (OpCodeSimdShImm)context.CurrOp;
+            OpCodeSimdShImm64 op = (OpCodeSimdShImm64)context.CurrOp;
 
             if (Optimizations.UseSse2 && op.Size > 0)
             {
@@ -498,7 +498,7 @@ namespace ChocolArm64.Instructions
 
         public static void Usra_V(ILEmitterCtx context)
         {
-            OpCodeSimdShImm op = (OpCodeSimdShImm)context.CurrOp;
+            OpCodeSimdShImm64 op = (OpCodeSimdShImm64)context.CurrOp;
 
             if (Optimizations.UseSse2 && op.Size > 0)
             {
@@ -532,7 +532,7 @@ namespace ChocolArm64.Instructions
             //specified on the signed, lower 8 bits of vector B. If the shift value
             //is greater or equal to the data size of each lane, then the result is zero.
             //Additionally, negative shifts produces right shifts by the negated shift value.
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             int maxShift = 8 << op.Size;
 
@@ -627,7 +627,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitShrImmOp(ILEmitterCtx context, ShrImmFlags flags)
         {
-            OpCodeSimdShImm op = (OpCodeSimdShImm)context.CurrOp;
+            OpCodeSimdShImm64 op = (OpCodeSimdShImm64)context.CurrOp;
 
             bool scalar     = (flags & ShrImmFlags.Scalar)     != 0;
             bool signed     = (flags & ShrImmFlags.Signed)     != 0;
@@ -684,7 +684,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitVectorShrImmNarrowOpZx(ILEmitterCtx context, bool round)
         {
-            OpCodeSimdShImm op = (OpCodeSimdShImm)context.CurrOp;
+            OpCodeSimdShImm64 op = (OpCodeSimdShImm64)context.CurrOp;
 
             int shift = GetImmShr(op);
 
@@ -752,7 +752,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitShrImmSaturatingNarrowOp(ILEmitterCtx context, ShrImmSaturatingNarrowFlags flags)
         {
-            OpCodeSimdShImm op = (OpCodeSimdShImm)context.CurrOp;
+            OpCodeSimdShImm64 op = (OpCodeSimdShImm64)context.CurrOp;
 
             bool scalar    = (flags & ShrImmSaturatingNarrowFlags.Scalar)    != 0;
             bool signedSrc = (flags & ShrImmSaturatingNarrowFlags.SignedSrc) != 0;
@@ -841,7 +841,7 @@ namespace ChocolArm64.Instructions
 
         private static void EmitVectorShImmWidenBinaryOp(ILEmitterCtx context, Action emit, int imm, bool signed)
         {
-            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+            OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
 
             int elems = 8 >> op.Size;
 
diff --git a/ChocolArm64/Instructions/InstEmitSystem.cs b/ChocolArm64/Instructions/InstEmitSystem.cs
index 1a966fe43c..0e61d5bded 100644
--- a/ChocolArm64/Instructions/InstEmitSystem.cs
+++ b/ChocolArm64/Instructions/InstEmitSystem.cs
@@ -21,7 +21,7 @@ namespace ChocolArm64.Instructions
 
         public static void Mrs(ILEmitterCtx context)
         {
-            OpCodeSystem op = (OpCodeSystem)context.CurrOp;
+            OpCodeSystem64 op = (OpCodeSystem64)context.CurrOp;
 
             context.EmitLdarg(TranslatedSub.StateArgIdx);
 
@@ -56,7 +56,7 @@ namespace ChocolArm64.Instructions
 
         public static void Msr(ILEmitterCtx context)
         {
-            OpCodeSystem op = (OpCodeSystem)context.CurrOp;
+            OpCodeSystem64 op = (OpCodeSystem64)context.CurrOp;
 
             context.EmitLdarg(TranslatedSub.StateArgIdx);
             context.EmitLdintzr(op.Rt);
@@ -93,7 +93,7 @@ namespace ChocolArm64.Instructions
             //This instruction is used to do some operations on the CPU like cache invalidation,
             //address translation and the like.
             //We treat it as no-op here since we don't have any cache being emulated anyway.
-            OpCodeSystem op = (OpCodeSystem)context.CurrOp;
+            OpCodeSystem64 op = (OpCodeSystem64)context.CurrOp;
 
             switch (GetPackedId(op))
             {
@@ -122,7 +122,7 @@ namespace ChocolArm64.Instructions
             }
         }
 
-        private static int GetPackedId(OpCodeSystem op)
+        private static int GetPackedId(OpCodeSystem64 op)
         {
             int id;
 
diff --git a/ChocolArm64/Instructions/InstInterpreter.cs b/ChocolArm64/Instructions/InstInterpreter.cs
index 9610bd9c15..e6354fd5a7 100644
--- a/ChocolArm64/Instructions/InstInterpreter.cs
+++ b/ChocolArm64/Instructions/InstInterpreter.cs
@@ -4,5 +4,5 @@ using ChocolArm64.State;
 
 namespace ChocolArm64.Instructions
 {
-    delegate void InstInterpreter(CpuThreadState state, MemoryManager memory, AOpCode opCode);
+    delegate void InstInterpreter(CpuThreadState state, MemoryManager memory, OpCode64 opCode);
 }
\ No newline at end of file
diff --git a/ChocolArm64/Instructions32/A32InstInterpretFlow.cs b/ChocolArm64/Instructions32/A32InstInterpretFlow.cs
index f095d22cab..cdf7e4c6af 100644
--- a/ChocolArm64/Instructions32/A32InstInterpretFlow.cs
+++ b/ChocolArm64/Instructions32/A32InstInterpretFlow.cs
@@ -9,7 +9,7 @@ namespace ChocolArm64.Instructions32
 {
     static partial class A32InstInterpret
     {
-        public static void B(CpuThreadState state, MemoryManager memory, AOpCode opCode)
+        public static void B(CpuThreadState state, MemoryManager memory, OpCode64 opCode)
         {
             A32OpCodeBImmAl op = (A32OpCodeBImmAl)opCode;
 
@@ -19,17 +19,17 @@ namespace ChocolArm64.Instructions32
             }
         }
 
-        public static void Bl(CpuThreadState state, MemoryManager memory, AOpCode opCode)
+        public static void Bl(CpuThreadState state, MemoryManager memory, OpCode64 opCode)
         {
             Blx(state, memory, opCode, false);
         }
 
-        public static void Blx(CpuThreadState state, MemoryManager memory, AOpCode opCode)
+        public static void Blx(CpuThreadState state, MemoryManager memory, OpCode64 opCode)
         {
             Blx(state, memory, opCode, true);
         }
 
-        public static void Blx(CpuThreadState state, MemoryManager memory, AOpCode opCode, bool x)
+        public static void Blx(CpuThreadState state, MemoryManager memory, OpCode64 opCode, bool x)
         {
             A32OpCodeBImmAl op = (A32OpCodeBImmAl)opCode;
 
diff --git a/ChocolArm64/OpCodeTable.cs b/ChocolArm64/OpCodeTable.cs
index 1acaaa094e..1bdd27cb2a 100644
--- a/ChocolArm64/OpCodeTable.cs
+++ b/ChocolArm64/OpCodeTable.cs
@@ -21,518 +21,518 @@ namespace ChocolArm64
 
 #region "OpCode Table (AArch64)"
             //Integer
-            SetA64("x0011010000xxxxx000000xxxxxxxxxx", InstEmit.Adc,           typeof(OpCodeAluRs));
-            SetA64("x0111010000xxxxx000000xxxxxxxxxx", InstEmit.Adcs,          typeof(OpCodeAluRs));
-            SetA64("x00100010xxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Add,           typeof(OpCodeAluImm));
-            SetA64("00001011<<0xxxxx0xxxxxxxxxxxxxxx", InstEmit.Add,           typeof(OpCodeAluRs));
-            SetA64("10001011<<0xxxxxxxxxxxxxxxxxxxxx", InstEmit.Add,           typeof(OpCodeAluRs));
-            SetA64("x0001011001xxxxxxxx0xxxxxxxxxxxx", InstEmit.Add,           typeof(OpCodeAluRx));
-            SetA64("x0001011001xxxxxxxx100xxxxxxxxxx", InstEmit.Add,           typeof(OpCodeAluRx));
-            SetA64("x01100010xxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Adds,          typeof(OpCodeAluImm));
-            SetA64("00101011<<0xxxxx0xxxxxxxxxxxxxxx", InstEmit.Adds,          typeof(OpCodeAluRs));
-            SetA64("10101011<<0xxxxxxxxxxxxxxxxxxxxx", InstEmit.Adds,          typeof(OpCodeAluRs));
-            SetA64("x0101011001xxxxxxxx0xxxxxxxxxxxx", InstEmit.Adds,          typeof(OpCodeAluRx));
-            SetA64("x0101011001xxxxxxxx100xxxxxxxxxx", InstEmit.Adds,          typeof(OpCodeAluRx));
-            SetA64("0xx10000xxxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Adr,           typeof(OpCodeAdr));
-            SetA64("1xx10000xxxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Adrp,          typeof(OpCodeAdr));
-            SetA64("0001001000xxxxxxxxxxxxxxxxxxxxxx", InstEmit.And,           typeof(OpCodeAluImm));
-            SetA64("100100100xxxxxxxxxxxxxxxxxxxxxxx", InstEmit.And,           typeof(OpCodeAluImm));
-            SetA64("00001010xx0xxxxx0xxxxxxxxxxxxxxx", InstEmit.And,           typeof(OpCodeAluRs));
-            SetA64("10001010xx0xxxxxxxxxxxxxxxxxxxxx", InstEmit.And,           typeof(OpCodeAluRs));
-            SetA64("0111001000xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Ands,          typeof(OpCodeAluImm));
-            SetA64("111100100xxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Ands,          typeof(OpCodeAluImm));
-            SetA64("01101010xx0xxxxx0xxxxxxxxxxxxxxx", InstEmit.Ands,          typeof(OpCodeAluRs));
-            SetA64("11101010xx0xxxxxxxxxxxxxxxxxxxxx", InstEmit.Ands,          typeof(OpCodeAluRs));
-            SetA64("x0011010110xxxxx001010xxxxxxxxxx", InstEmit.Asrv,          typeof(OpCodeAluRs));
-            SetA64("000101xxxxxxxxxxxxxxxxxxxxxxxxxx", InstEmit.B,             typeof(OpCodeBImmAl));
-            SetA64("01010100xxxxxxxxxxxxxxxxxxx0xxxx", InstEmit.B_Cond,        typeof(OpCodeBImmCond));
-            SetA64("00110011000xxxxx0xxxxxxxxxxxxxxx", InstEmit.Bfm,           typeof(OpCodeBfm));
-            SetA64("1011001101xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Bfm,           typeof(OpCodeBfm));
-            SetA64("00001010xx1xxxxx0xxxxxxxxxxxxxxx", InstEmit.Bic,           typeof(OpCodeAluRs));
-            SetA64("10001010xx1xxxxxxxxxxxxxxxxxxxxx", InstEmit.Bic,           typeof(OpCodeAluRs));
-            SetA64("01101010xx1xxxxx0xxxxxxxxxxxxxxx", InstEmit.Bics,          typeof(OpCodeAluRs));
-            SetA64("11101010xx1xxxxxxxxxxxxxxxxxxxxx", InstEmit.Bics,          typeof(OpCodeAluRs));
-            SetA64("100101xxxxxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Bl,            typeof(OpCodeBImmAl));
-            SetA64("1101011000111111000000xxxxx00000", InstEmit.Blr,           typeof(OpCodeBReg));
-            SetA64("1101011000011111000000xxxxx00000", InstEmit.Br,            typeof(OpCodeBReg));
-            SetA64("11010100001xxxxxxxxxxxxxxxx00000", InstEmit.Brk,           typeof(OpCodeException));
-            SetA64("x0110101xxxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Cbnz,          typeof(OpCodeBImmCmp));
-            SetA64("x0110100xxxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Cbz,           typeof(OpCodeBImmCmp));
-            SetA64("x0111010010xxxxxxxxx10xxxxx0xxxx", InstEmit.Ccmn,          typeof(OpCodeCcmpImm));
-            SetA64("x0111010010xxxxxxxxx00xxxxx0xxxx", InstEmit.Ccmn,          typeof(OpCodeCcmpReg));
-            SetA64("x1111010010xxxxxxxxx10xxxxx0xxxx", InstEmit.Ccmp,          typeof(OpCodeCcmpImm));
-            SetA64("x1111010010xxxxxxxxx00xxxxx0xxxx", InstEmit.Ccmp,          typeof(OpCodeCcmpReg));
-            SetA64("11010101000000110011xxxx01011111", InstEmit.Clrex,         typeof(OpCodeSystem));
-            SetA64("x101101011000000000101xxxxxxxxxx", InstEmit.Cls,           typeof(OpCodeAlu));
-            SetA64("x101101011000000000100xxxxxxxxxx", InstEmit.Clz,           typeof(OpCodeAlu));
-            SetA64("00011010110xxxxx010000xxxxxxxxxx", InstEmit.Crc32b,        typeof(OpCodeAluRs));
-            SetA64("00011010110xxxxx010001xxxxxxxxxx", InstEmit.Crc32h,        typeof(OpCodeAluRs));
-            SetA64("00011010110xxxxx010010xxxxxxxxxx", InstEmit.Crc32w,        typeof(OpCodeAluRs));
-            SetA64("10011010110xxxxx010011xxxxxxxxxx", InstEmit.Crc32x,        typeof(OpCodeAluRs));
-            SetA64("00011010110xxxxx010100xxxxxxxxxx", InstEmit.Crc32cb,       typeof(OpCodeAluRs));
-            SetA64("00011010110xxxxx010101xxxxxxxxxx", InstEmit.Crc32ch,       typeof(OpCodeAluRs));
-            SetA64("00011010110xxxxx010110xxxxxxxxxx", InstEmit.Crc32cw,       typeof(OpCodeAluRs));
-            SetA64("10011010110xxxxx010111xxxxxxxxxx", InstEmit.Crc32cx,       typeof(OpCodeAluRs));
-            SetA64("x0011010100xxxxxxxxx00xxxxxxxxxx", InstEmit.Csel,          typeof(OpCodeCsel));
-            SetA64("x0011010100xxxxxxxxx01xxxxxxxxxx", InstEmit.Csinc,         typeof(OpCodeCsel));
-            SetA64("x1011010100xxxxxxxxx00xxxxxxxxxx", InstEmit.Csinv,         typeof(OpCodeCsel));
-            SetA64("x1011010100xxxxxxxxx01xxxxxxxxxx", InstEmit.Csneg,         typeof(OpCodeCsel));
-            SetA64("11010101000000110011xxxx10111111", InstEmit.Dmb,           typeof(OpCodeSystem));
-            SetA64("11010101000000110011xxxx10011111", InstEmit.Dsb,           typeof(OpCodeSystem));
-            SetA64("01001010xx1xxxxx0xxxxxxxxxxxxxxx", InstEmit.Eon,           typeof(OpCodeAluRs));
-            SetA64("11001010xx1xxxxxxxxxxxxxxxxxxxxx", InstEmit.Eon,           typeof(OpCodeAluRs));
-            SetA64("0101001000xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Eor,           typeof(OpCodeAluImm));
-            SetA64("110100100xxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Eor,           typeof(OpCodeAluImm));
-            SetA64("01001010xx0xxxxx0xxxxxxxxxxxxxxx", InstEmit.Eor,           typeof(OpCodeAluRs));
-            SetA64("11001010xx0xxxxxxxxxxxxxxxxxxxxx", InstEmit.Eor,           typeof(OpCodeAluRs));
-            SetA64("00010011100xxxxx0xxxxxxxxxxxxxxx", InstEmit.Extr,          typeof(OpCodeAluRs));
-            SetA64("10010011110xxxxxxxxxxxxxxxxxxxxx", InstEmit.Extr,          typeof(OpCodeAluRs));
-            SetA64("11010101000000110010xxxxxxx11111", InstEmit.Hint,          typeof(OpCodeSystem));
-            SetA64("11010101000000110011xxxx11011111", InstEmit.Isb,           typeof(OpCodeSystem));
-            SetA64("xx001000110xxxxx1xxxxxxxxxxxxxxx", InstEmit.Ldar,          typeof(OpCodeMemEx));
-            SetA64("1x001000011xxxxx1xxxxxxxxxxxxxxx", InstEmit.Ldaxp,         typeof(OpCodeMemEx));
-            SetA64("xx001000010xxxxx1xxxxxxxxxxxxxxx", InstEmit.Ldaxr,         typeof(OpCodeMemEx));
-            SetA64("<<10100xx1xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Ldp,           typeof(OpCodeMemPair));
-            SetA64("xx111000010xxxxxxxxxxxxxxxxxxxxx", InstEmit.Ldr,           typeof(OpCodeMemImm));
-            SetA64("xx11100101xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Ldr,           typeof(OpCodeMemImm));
-            SetA64("xx111000011xxxxxxxxx10xxxxxxxxxx", InstEmit.Ldr,           typeof(OpCodeMemReg));
-            SetA64("xx011000xxxxxxxxxxxxxxxxxxxxxxxx", InstEmit.LdrLit,        typeof(OpCodeMemLit));
-            SetA64("0x1110001x0xxxxxxxxxxxxxxxxxxxxx", InstEmit.Ldrs,          typeof(OpCodeMemImm));
-            SetA64("0x1110011xxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Ldrs,          typeof(OpCodeMemImm));
-            SetA64("10111000100xxxxxxxxxxxxxxxxxxxxx", InstEmit.Ldrs,          typeof(OpCodeMemImm));
-            SetA64("1011100110xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Ldrs,          typeof(OpCodeMemImm));
-            SetA64("0x1110001x1xxxxxxxxx10xxxxxxxxxx", InstEmit.Ldrs,          typeof(OpCodeMemReg));
-            SetA64("10111000101xxxxxxxxx10xxxxxxxxxx", InstEmit.Ldrs,          typeof(OpCodeMemReg));
-            SetA64("xx001000010xxxxx0xxxxxxxxxxxxxxx", InstEmit.Ldxr,          typeof(OpCodeMemEx));
-            SetA64("1x001000011xxxxx0xxxxxxxxxxxxxxx", InstEmit.Ldxp,          typeof(OpCodeMemEx));
-            SetA64("x0011010110xxxxx001000xxxxxxxxxx", InstEmit.Lslv,          typeof(OpCodeAluRs));
-            SetA64("x0011010110xxxxx001001xxxxxxxxxx", InstEmit.Lsrv,          typeof(OpCodeAluRs));
-            SetA64("x0011011000xxxxx0xxxxxxxxxxxxxxx", InstEmit.Madd,          typeof(OpCodeMul));
-            SetA64("0111001010xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Movk,          typeof(OpCodeMov));
-            SetA64("111100101xxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Movk,          typeof(OpCodeMov));
-            SetA64("0001001010xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Movn,          typeof(OpCodeMov));
-            SetA64("100100101xxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Movn,          typeof(OpCodeMov));
-            SetA64("0101001010xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Movz,          typeof(OpCodeMov));
-            SetA64("110100101xxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Movz,          typeof(OpCodeMov));
-            SetA64("110101010011xxxxxxxxxxxxxxxxxxxx", InstEmit.Mrs,           typeof(OpCodeSystem));
-            SetA64("110101010001xxxxxxxxxxxxxxxxxxxx", InstEmit.Msr,           typeof(OpCodeSystem));
-            SetA64("x0011011000xxxxx1xxxxxxxxxxxxxxx", InstEmit.Msub,          typeof(OpCodeMul));
-            SetA64("11010101000000110010000000011111", InstEmit.Nop,           typeof(OpCodeSystem));
-            SetA64("00101010xx1xxxxx0xxxxxxxxxxxxxxx", InstEmit.Orn,           typeof(OpCodeAluRs));
-            SetA64("10101010xx1xxxxxxxxxxxxxxxxxxxxx", InstEmit.Orn,           typeof(OpCodeAluRs));
-            SetA64("0011001000xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Orr,           typeof(OpCodeAluImm));
-            SetA64("101100100xxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Orr,           typeof(OpCodeAluImm));
-            SetA64("00101010xx0xxxxx0xxxxxxxxxxxxxxx", InstEmit.Orr,           typeof(OpCodeAluRs));
-            SetA64("10101010xx0xxxxxxxxxxxxxxxxxxxxx", InstEmit.Orr,           typeof(OpCodeAluRs));
-            SetA64("1111100110xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Pfrm,          typeof(OpCodeMemImm));
-            SetA64("11111000100xxxxxxxxx00xxxxxxxxxx", InstEmit.Pfrm,          typeof(OpCodeMemImm));
-            SetA64("11011000xxxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Pfrm,          typeof(OpCodeMemLit));
-            SetA64("x101101011000000000000xxxxxxxxxx", InstEmit.Rbit,          typeof(OpCodeAlu));
-            SetA64("1101011001011111000000xxxxx00000", InstEmit.Ret,           typeof(OpCodeBReg));
-            SetA64("x101101011000000000001xxxxxxxxxx", InstEmit.Rev16,         typeof(OpCodeAlu));
-            SetA64("x101101011000000000010xxxxxxxxxx", InstEmit.Rev32,         typeof(OpCodeAlu));
-            SetA64("1101101011000000000011xxxxxxxxxx", InstEmit.Rev64,         typeof(OpCodeAlu));
-            SetA64("x0011010110xxxxx001011xxxxxxxxxx", InstEmit.Rorv,          typeof(OpCodeAluRs));
-            SetA64("x1011010000xxxxx000000xxxxxxxxxx", InstEmit.Sbc,           typeof(OpCodeAluRs));
-            SetA64("x1111010000xxxxx000000xxxxxxxxxx", InstEmit.Sbcs,          typeof(OpCodeAluRs));
-            SetA64("00010011000xxxxx0xxxxxxxxxxxxxxx", InstEmit.Sbfm,          typeof(OpCodeBfm));
-            SetA64("1001001101xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Sbfm,          typeof(OpCodeBfm));
-            SetA64("x0011010110xxxxx000011xxxxxxxxxx", InstEmit.Sdiv,          typeof(OpCodeAluRs));
-            SetA64("10011011001xxxxx0xxxxxxxxxxxxxxx", InstEmit.Smaddl,        typeof(OpCodeMul));
-            SetA64("10011011001xxxxx1xxxxxxxxxxxxxxx", InstEmit.Smsubl,        typeof(OpCodeMul));
-            SetA64("10011011010xxxxx0xxxxxxxxxxxxxxx", InstEmit.Smulh,         typeof(OpCodeMul));
-            SetA64("xx001000100xxxxx1xxxxxxxxxxxxxxx", InstEmit.Stlr,          typeof(OpCodeMemEx));
-            SetA64("1x001000001xxxxx1xxxxxxxxxxxxxxx", InstEmit.Stlxp,         typeof(OpCodeMemEx));
-            SetA64("xx001000000xxxxx1xxxxxxxxxxxxxxx", InstEmit.Stlxr,         typeof(OpCodeMemEx));
-            SetA64("x010100xx0xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Stp,           typeof(OpCodeMemPair));
-            SetA64("xx111000000xxxxxxxxxxxxxxxxxxxxx", InstEmit.Str,           typeof(OpCodeMemImm));
-            SetA64("xx11100100xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Str,           typeof(OpCodeMemImm));
-            SetA64("xx111000001xxxxxxxxx10xxxxxxxxxx", InstEmit.Str,           typeof(OpCodeMemReg));
-            SetA64("1x001000001xxxxx0xxxxxxxxxxxxxxx", InstEmit.Stxp,          typeof(OpCodeMemEx));
-            SetA64("xx001000000xxxxx0xxxxxxxxxxxxxxx", InstEmit.Stxr,          typeof(OpCodeMemEx));
-            SetA64("x10100010xxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Sub,           typeof(OpCodeAluImm));
-            SetA64("01001011<<0xxxxx0xxxxxxxxxxxxxxx", InstEmit.Sub,           typeof(OpCodeAluRs));
-            SetA64("11001011<<0xxxxxxxxxxxxxxxxxxxxx", InstEmit.Sub,           typeof(OpCodeAluRs));
-            SetA64("x1001011001xxxxxxxx0xxxxxxxxxxxx", InstEmit.Sub,           typeof(OpCodeAluRx));
-            SetA64("x1001011001xxxxxxxx100xxxxxxxxxx", InstEmit.Sub,           typeof(OpCodeAluRx));
-            SetA64("x11100010xxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Subs,          typeof(OpCodeAluImm));
-            SetA64("01101011<<0xxxxx0xxxxxxxxxxxxxxx", InstEmit.Subs,          typeof(OpCodeAluRs));
-            SetA64("11101011<<0xxxxxxxxxxxxxxxxxxxxx", InstEmit.Subs,          typeof(OpCodeAluRs));
-            SetA64("x1101011001xxxxxxxx0xxxxxxxxxxxx", InstEmit.Subs,          typeof(OpCodeAluRx));
-            SetA64("x1101011001xxxxxxxx100xxxxxxxxxx", InstEmit.Subs,          typeof(OpCodeAluRx));
-            SetA64("11010100000xxxxxxxxxxxxxxxx00001", InstEmit.Svc,           typeof(OpCodeException));
-            SetA64("1101010100001xxxxxxxxxxxxxxxxxxx", InstEmit.Sys,           typeof(OpCodeSystem));
-            SetA64("x0110111xxxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Tbnz,          typeof(OpCodeBImmTest));
-            SetA64("x0110110xxxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Tbz,           typeof(OpCodeBImmTest));
-            SetA64("01010011000xxxxx0xxxxxxxxxxxxxxx", InstEmit.Ubfm,          typeof(OpCodeBfm));
-            SetA64("1101001101xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Ubfm,          typeof(OpCodeBfm));
-            SetA64("x0011010110xxxxx000010xxxxxxxxxx", InstEmit.Udiv,          typeof(OpCodeAluRs));
-            SetA64("10011011101xxxxx0xxxxxxxxxxxxxxx", InstEmit.Umaddl,        typeof(OpCodeMul));
-            SetA64("10011011101xxxxx1xxxxxxxxxxxxxxx", InstEmit.Umsubl,        typeof(OpCodeMul));
-            SetA64("10011011110xxxxx0xxxxxxxxxxxxxxx", InstEmit.Umulh,         typeof(OpCodeMul));
+            SetA64("x0011010000xxxxx000000xxxxxxxxxx", InstEmit.Adc,           typeof(OpCodeAluRs64));
+            SetA64("x0111010000xxxxx000000xxxxxxxxxx", InstEmit.Adcs,          typeof(OpCodeAluRs64));
+            SetA64("x00100010xxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Add,           typeof(OpCode64AluImm));
+            SetA64("00001011<<0xxxxx0xxxxxxxxxxxxxxx", InstEmit.Add,           typeof(OpCodeAluRs64));
+            SetA64("10001011<<0xxxxxxxxxxxxxxxxxxxxx", InstEmit.Add,           typeof(OpCodeAluRs64));
+            SetA64("x0001011001xxxxxxxx0xxxxxxxxxxxx", InstEmit.Add,           typeof(OpCodeAluRx64));
+            SetA64("x0001011001xxxxxxxx100xxxxxxxxxx", InstEmit.Add,           typeof(OpCodeAluRx64));
+            SetA64("x01100010xxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Adds,          typeof(OpCode64AluImm));
+            SetA64("00101011<<0xxxxx0xxxxxxxxxxxxxxx", InstEmit.Adds,          typeof(OpCodeAluRs64));
+            SetA64("10101011<<0xxxxxxxxxxxxxxxxxxxxx", InstEmit.Adds,          typeof(OpCodeAluRs64));
+            SetA64("x0101011001xxxxxxxx0xxxxxxxxxxxx", InstEmit.Adds,          typeof(OpCodeAluRx64));
+            SetA64("x0101011001xxxxxxxx100xxxxxxxxxx", InstEmit.Adds,          typeof(OpCodeAluRx64));
+            SetA64("0xx10000xxxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Adr,           typeof(OpCodeAdr64));
+            SetA64("1xx10000xxxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Adrp,          typeof(OpCodeAdr64));
+            SetA64("0001001000xxxxxxxxxxxxxxxxxxxxxx", InstEmit.And,           typeof(OpCode64AluImm));
+            SetA64("100100100xxxxxxxxxxxxxxxxxxxxxxx", InstEmit.And,           typeof(OpCode64AluImm));
+            SetA64("00001010xx0xxxxx0xxxxxxxxxxxxxxx", InstEmit.And,           typeof(OpCodeAluRs64));
+            SetA64("10001010xx0xxxxxxxxxxxxxxxxxxxxx", InstEmit.And,           typeof(OpCodeAluRs64));
+            SetA64("0111001000xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Ands,          typeof(OpCode64AluImm));
+            SetA64("111100100xxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Ands,          typeof(OpCode64AluImm));
+            SetA64("01101010xx0xxxxx0xxxxxxxxxxxxxxx", InstEmit.Ands,          typeof(OpCodeAluRs64));
+            SetA64("11101010xx0xxxxxxxxxxxxxxxxxxxxx", InstEmit.Ands,          typeof(OpCodeAluRs64));
+            SetA64("x0011010110xxxxx001010xxxxxxxxxx", InstEmit.Asrv,          typeof(OpCodeAluRs64));
+            SetA64("000101xxxxxxxxxxxxxxxxxxxxxxxxxx", InstEmit.B,             typeof(OpCodeBImmAl64));
+            SetA64("01010100xxxxxxxxxxxxxxxxxxx0xxxx", InstEmit.B_Cond,        typeof(OpCodeBImmCond64));
+            SetA64("00110011000xxxxx0xxxxxxxxxxxxxxx", InstEmit.Bfm,           typeof(OpCodeBfm64));
+            SetA64("1011001101xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Bfm,           typeof(OpCodeBfm64));
+            SetA64("00001010xx1xxxxx0xxxxxxxxxxxxxxx", InstEmit.Bic,           typeof(OpCodeAluRs64));
+            SetA64("10001010xx1xxxxxxxxxxxxxxxxxxxxx", InstEmit.Bic,           typeof(OpCodeAluRs64));
+            SetA64("01101010xx1xxxxx0xxxxxxxxxxxxxxx", InstEmit.Bics,          typeof(OpCodeAluRs64));
+            SetA64("11101010xx1xxxxxxxxxxxxxxxxxxxxx", InstEmit.Bics,          typeof(OpCodeAluRs64));
+            SetA64("100101xxxxxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Bl,            typeof(OpCodeBImmAl64));
+            SetA64("1101011000111111000000xxxxx00000", InstEmit.Blr,           typeof(OpCodeBReg64));
+            SetA64("1101011000011111000000xxxxx00000", InstEmit.Br,            typeof(OpCodeBReg64));
+            SetA64("11010100001xxxxxxxxxxxxxxxx00000", InstEmit.Brk,           typeof(OpCodeException64));
+            SetA64("x0110101xxxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Cbnz,          typeof(OpCodeBImmCmp64));
+            SetA64("x0110100xxxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Cbz,           typeof(OpCodeBImmCmp64));
+            SetA64("x0111010010xxxxxxxxx10xxxxx0xxxx", InstEmit.Ccmn,          typeof(OpCodeCcmpImm64));
+            SetA64("x0111010010xxxxxxxxx00xxxxx0xxxx", InstEmit.Ccmn,          typeof(OpCodeCcmpReg64));
+            SetA64("x1111010010xxxxxxxxx10xxxxx0xxxx", InstEmit.Ccmp,          typeof(OpCodeCcmpImm64));
+            SetA64("x1111010010xxxxxxxxx00xxxxx0xxxx", InstEmit.Ccmp,          typeof(OpCodeCcmpReg64));
+            SetA64("11010101000000110011xxxx01011111", InstEmit.Clrex,         typeof(OpCodeSystem64));
+            SetA64("x101101011000000000101xxxxxxxxxx", InstEmit.Cls,           typeof(OpCodeAlu64));
+            SetA64("x101101011000000000100xxxxxxxxxx", InstEmit.Clz,           typeof(OpCodeAlu64));
+            SetA64("00011010110xxxxx010000xxxxxxxxxx", InstEmit.Crc32b,        typeof(OpCodeAluRs64));
+            SetA64("00011010110xxxxx010001xxxxxxxxxx", InstEmit.Crc32h,        typeof(OpCodeAluRs64));
+            SetA64("00011010110xxxxx010010xxxxxxxxxx", InstEmit.Crc32w,        typeof(OpCodeAluRs64));
+            SetA64("10011010110xxxxx010011xxxxxxxxxx", InstEmit.Crc32x,        typeof(OpCodeAluRs64));
+            SetA64("00011010110xxxxx010100xxxxxxxxxx", InstEmit.Crc32cb,       typeof(OpCodeAluRs64));
+            SetA64("00011010110xxxxx010101xxxxxxxxxx", InstEmit.Crc32ch,       typeof(OpCodeAluRs64));
+            SetA64("00011010110xxxxx010110xxxxxxxxxx", InstEmit.Crc32cw,       typeof(OpCodeAluRs64));
+            SetA64("10011010110xxxxx010111xxxxxxxxxx", InstEmit.Crc32cx,       typeof(OpCodeAluRs64));
+            SetA64("x0011010100xxxxxxxxx00xxxxxxxxxx", InstEmit.Csel,          typeof(OpCodeCsel64));
+            SetA64("x0011010100xxxxxxxxx01xxxxxxxxxx", InstEmit.Csinc,         typeof(OpCodeCsel64));
+            SetA64("x1011010100xxxxxxxxx00xxxxxxxxxx", InstEmit.Csinv,         typeof(OpCodeCsel64));
+            SetA64("x1011010100xxxxxxxxx01xxxxxxxxxx", InstEmit.Csneg,         typeof(OpCodeCsel64));
+            SetA64("11010101000000110011xxxx10111111", InstEmit.Dmb,           typeof(OpCodeSystem64));
+            SetA64("11010101000000110011xxxx10011111", InstEmit.Dsb,           typeof(OpCodeSystem64));
+            SetA64("01001010xx1xxxxx0xxxxxxxxxxxxxxx", InstEmit.Eon,           typeof(OpCodeAluRs64));
+            SetA64("11001010xx1xxxxxxxxxxxxxxxxxxxxx", InstEmit.Eon,           typeof(OpCodeAluRs64));
+            SetA64("0101001000xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Eor,           typeof(OpCode64AluImm));
+            SetA64("110100100xxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Eor,           typeof(OpCode64AluImm));
+            SetA64("01001010xx0xxxxx0xxxxxxxxxxxxxxx", InstEmit.Eor,           typeof(OpCodeAluRs64));
+            SetA64("11001010xx0xxxxxxxxxxxxxxxxxxxxx", InstEmit.Eor,           typeof(OpCodeAluRs64));
+            SetA64("00010011100xxxxx0xxxxxxxxxxxxxxx", InstEmit.Extr,          typeof(OpCodeAluRs64));
+            SetA64("10010011110xxxxxxxxxxxxxxxxxxxxx", InstEmit.Extr,          typeof(OpCodeAluRs64));
+            SetA64("11010101000000110010xxxxxxx11111", InstEmit.Hint,          typeof(OpCodeSystem64));
+            SetA64("11010101000000110011xxxx11011111", InstEmit.Isb,           typeof(OpCodeSystem64));
+            SetA64("xx001000110xxxxx1xxxxxxxxxxxxxxx", InstEmit.Ldar,          typeof(OpCodeMemEx64));
+            SetA64("1x001000011xxxxx1xxxxxxxxxxxxxxx", InstEmit.Ldaxp,         typeof(OpCodeMemEx64));
+            SetA64("xx001000010xxxxx1xxxxxxxxxxxxxxx", InstEmit.Ldaxr,         typeof(OpCodeMemEx64));
+            SetA64("<<10100xx1xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Ldp,           typeof(OpCodeMemPair64));
+            SetA64("xx111000010xxxxxxxxxxxxxxxxxxxxx", InstEmit.Ldr,           typeof(OpCodeMemImm64));
+            SetA64("xx11100101xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Ldr,           typeof(OpCodeMemImm64));
+            SetA64("xx111000011xxxxxxxxx10xxxxxxxxxx", InstEmit.Ldr,           typeof(OpCodeMemReg64));
+            SetA64("xx011000xxxxxxxxxxxxxxxxxxxxxxxx", InstEmit.LdrLit,        typeof(OpCode64MemLit64));
+            SetA64("0x1110001x0xxxxxxxxxxxxxxxxxxxxx", InstEmit.Ldrs,          typeof(OpCodeMemImm64));
+            SetA64("0x1110011xxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Ldrs,          typeof(OpCodeMemImm64));
+            SetA64("10111000100xxxxxxxxxxxxxxxxxxxxx", InstEmit.Ldrs,          typeof(OpCodeMemImm64));
+            SetA64("1011100110xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Ldrs,          typeof(OpCodeMemImm64));
+            SetA64("0x1110001x1xxxxxxxxx10xxxxxxxxxx", InstEmit.Ldrs,          typeof(OpCodeMemReg64));
+            SetA64("10111000101xxxxxxxxx10xxxxxxxxxx", InstEmit.Ldrs,          typeof(OpCodeMemReg64));
+            SetA64("xx001000010xxxxx0xxxxxxxxxxxxxxx", InstEmit.Ldxr,          typeof(OpCodeMemEx64));
+            SetA64("1x001000011xxxxx0xxxxxxxxxxxxxxx", InstEmit.Ldxp,          typeof(OpCodeMemEx64));
+            SetA64("x0011010110xxxxx001000xxxxxxxxxx", InstEmit.Lslv,          typeof(OpCodeAluRs64));
+            SetA64("x0011010110xxxxx001001xxxxxxxxxx", InstEmit.Lsrv,          typeof(OpCodeAluRs64));
+            SetA64("x0011011000xxxxx0xxxxxxxxxxxxxxx", InstEmit.Madd,          typeof(OpCodeMul64));
+            SetA64("0111001010xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Movk,          typeof(OpCodeMov64));
+            SetA64("111100101xxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Movk,          typeof(OpCodeMov64));
+            SetA64("0001001010xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Movn,          typeof(OpCodeMov64));
+            SetA64("100100101xxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Movn,          typeof(OpCodeMov64));
+            SetA64("0101001010xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Movz,          typeof(OpCodeMov64));
+            SetA64("110100101xxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Movz,          typeof(OpCodeMov64));
+            SetA64("110101010011xxxxxxxxxxxxxxxxxxxx", InstEmit.Mrs,           typeof(OpCodeSystem64));
+            SetA64("110101010001xxxxxxxxxxxxxxxxxxxx", InstEmit.Msr,           typeof(OpCodeSystem64));
+            SetA64("x0011011000xxxxx1xxxxxxxxxxxxxxx", InstEmit.Msub,          typeof(OpCodeMul64));
+            SetA64("11010101000000110010000000011111", InstEmit.Nop,           typeof(OpCodeSystem64));
+            SetA64("00101010xx1xxxxx0xxxxxxxxxxxxxxx", InstEmit.Orn,           typeof(OpCodeAluRs64));
+            SetA64("10101010xx1xxxxxxxxxxxxxxxxxxxxx", InstEmit.Orn,           typeof(OpCodeAluRs64));
+            SetA64("0011001000xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Orr,           typeof(OpCode64AluImm));
+            SetA64("101100100xxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Orr,           typeof(OpCode64AluImm));
+            SetA64("00101010xx0xxxxx0xxxxxxxxxxxxxxx", InstEmit.Orr,           typeof(OpCodeAluRs64));
+            SetA64("10101010xx0xxxxxxxxxxxxxxxxxxxxx", InstEmit.Orr,           typeof(OpCodeAluRs64));
+            SetA64("1111100110xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Pfrm,          typeof(OpCodeMemImm64));
+            SetA64("11111000100xxxxxxxxx00xxxxxxxxxx", InstEmit.Pfrm,          typeof(OpCodeMemImm64));
+            SetA64("11011000xxxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Pfrm,          typeof(OpCode64MemLit64));
+            SetA64("x101101011000000000000xxxxxxxxxx", InstEmit.Rbit,          typeof(OpCodeAlu64));
+            SetA64("1101011001011111000000xxxxx00000", InstEmit.Ret,           typeof(OpCodeBReg64));
+            SetA64("x101101011000000000001xxxxxxxxxx", InstEmit.Rev16,         typeof(OpCodeAlu64));
+            SetA64("x101101011000000000010xxxxxxxxxx", InstEmit.Rev32,         typeof(OpCodeAlu64));
+            SetA64("1101101011000000000011xxxxxxxxxx", InstEmit.Rev64,         typeof(OpCodeAlu64));
+            SetA64("x0011010110xxxxx001011xxxxxxxxxx", InstEmit.Rorv,          typeof(OpCodeAluRs64));
+            SetA64("x1011010000xxxxx000000xxxxxxxxxx", InstEmit.Sbc,           typeof(OpCodeAluRs64));
+            SetA64("x1111010000xxxxx000000xxxxxxxxxx", InstEmit.Sbcs,          typeof(OpCodeAluRs64));
+            SetA64("00010011000xxxxx0xxxxxxxxxxxxxxx", InstEmit.Sbfm,          typeof(OpCodeBfm64));
+            SetA64("1001001101xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Sbfm,          typeof(OpCodeBfm64));
+            SetA64("x0011010110xxxxx000011xxxxxxxxxx", InstEmit.Sdiv,          typeof(OpCodeAluRs64));
+            SetA64("10011011001xxxxx0xxxxxxxxxxxxxxx", InstEmit.Smaddl,        typeof(OpCodeMul64));
+            SetA64("10011011001xxxxx1xxxxxxxxxxxxxxx", InstEmit.Smsubl,        typeof(OpCodeMul64));
+            SetA64("10011011010xxxxx0xxxxxxxxxxxxxxx", InstEmit.Smulh,         typeof(OpCodeMul64));
+            SetA64("xx001000100xxxxx1xxxxxxxxxxxxxxx", InstEmit.Stlr,          typeof(OpCodeMemEx64));
+            SetA64("1x001000001xxxxx1xxxxxxxxxxxxxxx", InstEmit.Stlxp,         typeof(OpCodeMemEx64));
+            SetA64("xx001000000xxxxx1xxxxxxxxxxxxxxx", InstEmit.Stlxr,         typeof(OpCodeMemEx64));
+            SetA64("x010100xx0xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Stp,           typeof(OpCodeMemPair64));
+            SetA64("xx111000000xxxxxxxxxxxxxxxxxxxxx", InstEmit.Str,           typeof(OpCodeMemImm64));
+            SetA64("xx11100100xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Str,           typeof(OpCodeMemImm64));
+            SetA64("xx111000001xxxxxxxxx10xxxxxxxxxx", InstEmit.Str,           typeof(OpCodeMemReg64));
+            SetA64("1x001000001xxxxx0xxxxxxxxxxxxxxx", InstEmit.Stxp,          typeof(OpCodeMemEx64));
+            SetA64("xx001000000xxxxx0xxxxxxxxxxxxxxx", InstEmit.Stxr,          typeof(OpCodeMemEx64));
+            SetA64("x10100010xxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Sub,           typeof(OpCode64AluImm));
+            SetA64("01001011<<0xxxxx0xxxxxxxxxxxxxxx", InstEmit.Sub,           typeof(OpCodeAluRs64));
+            SetA64("11001011<<0xxxxxxxxxxxxxxxxxxxxx", InstEmit.Sub,           typeof(OpCodeAluRs64));
+            SetA64("x1001011001xxxxxxxx0xxxxxxxxxxxx", InstEmit.Sub,           typeof(OpCodeAluRx64));
+            SetA64("x1001011001xxxxxxxx100xxxxxxxxxx", InstEmit.Sub,           typeof(OpCodeAluRx64));
+            SetA64("x11100010xxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Subs,          typeof(OpCode64AluImm));
+            SetA64("01101011<<0xxxxx0xxxxxxxxxxxxxxx", InstEmit.Subs,          typeof(OpCodeAluRs64));
+            SetA64("11101011<<0xxxxxxxxxxxxxxxxxxxxx", InstEmit.Subs,          typeof(OpCodeAluRs64));
+            SetA64("x1101011001xxxxxxxx0xxxxxxxxxxxx", InstEmit.Subs,          typeof(OpCodeAluRx64));
+            SetA64("x1101011001xxxxxxxx100xxxxxxxxxx", InstEmit.Subs,          typeof(OpCodeAluRx64));
+            SetA64("11010100000xxxxxxxxxxxxxxxx00001", InstEmit.Svc,           typeof(OpCodeException64));
+            SetA64("1101010100001xxxxxxxxxxxxxxxxxxx", InstEmit.Sys,           typeof(OpCodeSystem64));
+            SetA64("x0110111xxxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Tbnz,          typeof(OpCodeBImmTest64));
+            SetA64("x0110110xxxxxxxxxxxxxxxxxxxxxxxx", InstEmit.Tbz,           typeof(OpCodeBImmTest64));
+            SetA64("01010011000xxxxx0xxxxxxxxxxxxxxx", InstEmit.Ubfm,          typeof(OpCodeBfm64));
+            SetA64("1101001101xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Ubfm,          typeof(OpCodeBfm64));
+            SetA64("x0011010110xxxxx000010xxxxxxxxxx", InstEmit.Udiv,          typeof(OpCodeAluRs64));
+            SetA64("10011011101xxxxx0xxxxxxxxxxxxxxx", InstEmit.Umaddl,        typeof(OpCodeMul64));
+            SetA64("10011011101xxxxx1xxxxxxxxxxxxxxx", InstEmit.Umsubl,        typeof(OpCodeMul64));
+            SetA64("10011011110xxxxx0xxxxxxxxxxxxxxx", InstEmit.Umulh,         typeof(OpCodeMul64));
 
             //Vector
-            SetA64("0101111011100000101110xxxxxxxxxx", InstEmit.Abs_S,         typeof(OpCodeSimd));
-            SetA64("0>001110<<100000101110xxxxxxxxxx", InstEmit.Abs_V,         typeof(OpCodeSimd));
-            SetA64("01011110111xxxxx100001xxxxxxxxxx", InstEmit.Add_S,         typeof(OpCodeSimdReg));
-            SetA64("0>001110<<1xxxxx100001xxxxxxxxxx", InstEmit.Add_V,         typeof(OpCodeSimdReg));
-            SetA64("0x001110<<1xxxxx010000xxxxxxxxxx", InstEmit.Addhn_V,       typeof(OpCodeSimdReg));
-            SetA64("0101111011110001101110xxxxxxxxxx", InstEmit.Addp_S,        typeof(OpCodeSimd));
-            SetA64("0>001110<<1xxxxx101111xxxxxxxxxx", InstEmit.Addp_V,        typeof(OpCodeSimdReg));
-            SetA64("000011100x110001101110xxxxxxxxxx", InstEmit.Addv_V,        typeof(OpCodeSimd));
-            SetA64("01001110<<110001101110xxxxxxxxxx", InstEmit.Addv_V,        typeof(OpCodeSimd));
-            SetA64("0100111000101000010110xxxxxxxxxx", InstEmit.Aesd_V,        typeof(OpCodeSimd));
-            SetA64("0100111000101000010010xxxxxxxxxx", InstEmit.Aese_V,        typeof(OpCodeSimd));
-            SetA64("0100111000101000011110xxxxxxxxxx", InstEmit.Aesimc_V,      typeof(OpCodeSimd));
-            SetA64("0100111000101000011010xxxxxxxxxx", InstEmit.Aesmc_V,       typeof(OpCodeSimd));
-            SetA64("0x001110001xxxxx000111xxxxxxxxxx", InstEmit.And_V,         typeof(OpCodeSimdReg));
-            SetA64("0x001110011xxxxx000111xxxxxxxxxx", InstEmit.Bic_V,         typeof(OpCodeSimdReg));
-            SetA64("0x10111100000xxx<<x101xxxxxxxxxx", InstEmit.Bic_Vi,        typeof(OpCodeSimdImm));
-            SetA64("0x101110111xxxxx000111xxxxxxxxxx", InstEmit.Bif_V,         typeof(OpCodeSimdReg));
-            SetA64("0x101110101xxxxx000111xxxxxxxxxx", InstEmit.Bit_V,         typeof(OpCodeSimdReg));
-            SetA64("0x101110011xxxxx000111xxxxxxxxxx", InstEmit.Bsl_V,         typeof(OpCodeSimdReg));
-            SetA64("0x001110<<100000010010xxxxxxxxxx", InstEmit.Cls_V,         typeof(OpCodeSimd));
-            SetA64("0x101110<<100000010010xxxxxxxxxx", InstEmit.Clz_V,         typeof(OpCodeSimd));
-            SetA64("01111110111xxxxx100011xxxxxxxxxx", InstEmit.Cmeq_S,        typeof(OpCodeSimdReg));
-            SetA64("0101111011100000100110xxxxxxxxxx", InstEmit.Cmeq_S,        typeof(OpCodeSimd));
-            SetA64("0>101110<<1xxxxx100011xxxxxxxxxx", InstEmit.Cmeq_V,        typeof(OpCodeSimdReg));
-            SetA64("0>001110<<100000100110xxxxxxxxxx", InstEmit.Cmeq_V,        typeof(OpCodeSimd));
-            SetA64("01011110111xxxxx001111xxxxxxxxxx", InstEmit.Cmge_S,        typeof(OpCodeSimdReg));
-            SetA64("0111111011100000100010xxxxxxxxxx", InstEmit.Cmge_S,        typeof(OpCodeSimd));
-            SetA64("0>001110<<1xxxxx001111xxxxxxxxxx", InstEmit.Cmge_V,        typeof(OpCodeSimdReg));
-            SetA64("0>101110<<100000100010xxxxxxxxxx", InstEmit.Cmge_V,        typeof(OpCodeSimd));
-            SetA64("01011110111xxxxx001101xxxxxxxxxx", InstEmit.Cmgt_S,        typeof(OpCodeSimdReg));
-            SetA64("0101111011100000100010xxxxxxxxxx", InstEmit.Cmgt_S,        typeof(OpCodeSimd));
-            SetA64("0>001110<<1xxxxx001101xxxxxxxxxx", InstEmit.Cmgt_V,        typeof(OpCodeSimdReg));
-            SetA64("0>001110<<100000100010xxxxxxxxxx", InstEmit.Cmgt_V,        typeof(OpCodeSimd));
-            SetA64("01111110111xxxxx001101xxxxxxxxxx", InstEmit.Cmhi_S,        typeof(OpCodeSimdReg));
-            SetA64("0>101110<<1xxxxx001101xxxxxxxxxx", InstEmit.Cmhi_V,        typeof(OpCodeSimdReg));
-            SetA64("01111110111xxxxx001111xxxxxxxxxx", InstEmit.Cmhs_S,        typeof(OpCodeSimdReg));
-            SetA64("0>101110<<1xxxxx001111xxxxxxxxxx", InstEmit.Cmhs_V,        typeof(OpCodeSimdReg));
-            SetA64("0111111011100000100110xxxxxxxxxx", InstEmit.Cmle_S,        typeof(OpCodeSimd));
-            SetA64("0>101110<<100000100110xxxxxxxxxx", InstEmit.Cmle_V,        typeof(OpCodeSimd));
-            SetA64("0101111011100000101010xxxxxxxxxx", InstEmit.Cmlt_S,        typeof(OpCodeSimd));
-            SetA64("0>001110<<100000101010xxxxxxxxxx", InstEmit.Cmlt_V,        typeof(OpCodeSimd));
-            SetA64("01011110111xxxxx100011xxxxxxxxxx", InstEmit.Cmtst_S,       typeof(OpCodeSimdReg));
-            SetA64("0>001110<<1xxxxx100011xxxxxxxxxx", InstEmit.Cmtst_V,       typeof(OpCodeSimdReg));
-            SetA64("0x00111000100000010110xxxxxxxxxx", InstEmit.Cnt_V,         typeof(OpCodeSimd));
-            SetA64("0x001110000xxxxx000011xxxxxxxxxx", InstEmit.Dup_Gp,        typeof(OpCodeSimdIns));
-            SetA64("01011110000xxxxx000001xxxxxxxxxx", InstEmit.Dup_S,         typeof(OpCodeSimdIns));
-            SetA64("0x001110000xxxxx000001xxxxxxxxxx", InstEmit.Dup_V,         typeof(OpCodeSimdIns));
-            SetA64("0x101110001xxxxx000111xxxxxxxxxx", InstEmit.Eor_V,         typeof(OpCodeSimdReg));
-            SetA64("0>101110000xxxxx0<xxx0xxxxxxxxxx", InstEmit.Ext_V,         typeof(OpCodeSimdExt));
-            SetA64("011111101x1xxxxx110101xxxxxxxxxx", InstEmit.Fabd_S,        typeof(OpCodeSimdReg));
-            SetA64("000111100x100000110000xxxxxxxxxx", InstEmit.Fabs_S,        typeof(OpCodeSimd));
-            SetA64("0>0011101<100000111110xxxxxxxxxx", InstEmit.Fabs_V,        typeof(OpCodeSimd));
-            SetA64("000111100x1xxxxx001010xxxxxxxxxx", InstEmit.Fadd_S,        typeof(OpCodeSimdReg));
-            SetA64("0>0011100<1xxxxx110101xxxxxxxxxx", InstEmit.Fadd_V,        typeof(OpCodeSimdReg));
-            SetA64("011111100x110000110110xxxxxxxxxx", InstEmit.Faddp_S,       typeof(OpCodeSimd));
-            SetA64("0>1011100<1xxxxx110101xxxxxxxxxx", InstEmit.Faddp_V,       typeof(OpCodeSimdReg));
-            SetA64("000111100x1xxxxxxxxx01xxxxx0xxxx", InstEmit.Fccmp_S,       typeof(OpCodeSimdFcond));
-            SetA64("000111100x1xxxxxxxxx01xxxxx1xxxx", InstEmit.Fccmpe_S,      typeof(OpCodeSimdFcond));
-            SetA64("010111100x1xxxxx111001xxxxxxxxxx", InstEmit.Fcmeq_S,       typeof(OpCodeSimdReg));
-            SetA64("010111101x100000110110xxxxxxxxxx", InstEmit.Fcmeq_S,       typeof(OpCodeSimd));
-            SetA64("0>0011100<1xxxxx111001xxxxxxxxxx", InstEmit.Fcmeq_V,       typeof(OpCodeSimdReg));
-            SetA64("0>0011101<100000110110xxxxxxxxxx", InstEmit.Fcmeq_V,       typeof(OpCodeSimd));
-            SetA64("011111100x1xxxxx111001xxxxxxxxxx", InstEmit.Fcmge_S,       typeof(OpCodeSimdReg));
-            SetA64("011111101x100000110010xxxxxxxxxx", InstEmit.Fcmge_S,       typeof(OpCodeSimd));
-            SetA64("0>1011100<1xxxxx111001xxxxxxxxxx", InstEmit.Fcmge_V,       typeof(OpCodeSimdReg));
-            SetA64("0>1011101<100000110010xxxxxxxxxx", InstEmit.Fcmge_V,       typeof(OpCodeSimd));
-            SetA64("011111101x1xxxxx111001xxxxxxxxxx", InstEmit.Fcmgt_S,       typeof(OpCodeSimdReg));
-            SetA64("010111101x100000110010xxxxxxxxxx", InstEmit.Fcmgt_S,       typeof(OpCodeSimd));
-            SetA64("0>1011101<1xxxxx111001xxxxxxxxxx", InstEmit.Fcmgt_V,       typeof(OpCodeSimdReg));
-            SetA64("0>0011101<100000110010xxxxxxxxxx", InstEmit.Fcmgt_V,       typeof(OpCodeSimd));
-            SetA64("011111101x100000110110xxxxxxxxxx", InstEmit.Fcmle_S,       typeof(OpCodeSimd));
-            SetA64("0>1011101<100000110110xxxxxxxxxx", InstEmit.Fcmle_V,       typeof(OpCodeSimd));
-            SetA64("010111101x100000111010xxxxxxxxxx", InstEmit.Fcmlt_S,       typeof(OpCodeSimd));
-            SetA64("0>0011101<100000111010xxxxxxxxxx", InstEmit.Fcmlt_V,       typeof(OpCodeSimd));
-            SetA64("000111100x1xxxxx001000xxxxx0x000", InstEmit.Fcmp_S,        typeof(OpCodeSimdReg));
-            SetA64("000111100x1xxxxx001000xxxxx1x000", InstEmit.Fcmpe_S,       typeof(OpCodeSimdReg));
-            SetA64("000111100x1xxxxxxxxx11xxxxxxxxxx", InstEmit.Fcsel_S,       typeof(OpCodeSimdFcond));
-            SetA64("000111100x10001xx10000xxxxxxxxxx", InstEmit.Fcvt_S,        typeof(OpCodeSimd));
-            SetA64("x00111100x100100000000xxxxxxxxxx", InstEmit.Fcvtas_Gp,     typeof(OpCodeSimdCvt));
-            SetA64("x00111100x100101000000xxxxxxxxxx", InstEmit.Fcvtau_Gp,     typeof(OpCodeSimdCvt));
-            SetA64("0x0011100x100001011110xxxxxxxxxx", InstEmit.Fcvtl_V,       typeof(OpCodeSimd));
-            SetA64("x00111100x110000000000xxxxxxxxxx", InstEmit.Fcvtms_Gp,     typeof(OpCodeSimdCvt));
-            SetA64("x00111100x110001000000xxxxxxxxxx", InstEmit.Fcvtmu_Gp,     typeof(OpCodeSimdCvt));
-            SetA64("0x0011100x100001011010xxxxxxxxxx", InstEmit.Fcvtn_V,       typeof(OpCodeSimd));
-            SetA64("010111100x100001101010xxxxxxxxxx", InstEmit.Fcvtns_S,      typeof(OpCodeSimd));
-            SetA64("0>0011100<100001101010xxxxxxxxxx", InstEmit.Fcvtns_V,      typeof(OpCodeSimd));
-            SetA64("011111100x100001101010xxxxxxxxxx", InstEmit.Fcvtnu_S,      typeof(OpCodeSimd));
-            SetA64("0>1011100<100001101010xxxxxxxxxx", InstEmit.Fcvtnu_V,      typeof(OpCodeSimd));
-            SetA64("x00111100x101000000000xxxxxxxxxx", InstEmit.Fcvtps_Gp,     typeof(OpCodeSimdCvt));
-            SetA64("x00111100x101001000000xxxxxxxxxx", InstEmit.Fcvtpu_Gp,     typeof(OpCodeSimdCvt));
-            SetA64("x00111100x111000000000xxxxxxxxxx", InstEmit.Fcvtzs_Gp,     typeof(OpCodeSimdCvt));
-            SetA64("x00111100x011000xxxxxxxxxxxxxxxx", InstEmit.Fcvtzs_Gp_Fix, typeof(OpCodeSimdCvt));
-            SetA64("010111101x100001101110xxxxxxxxxx", InstEmit.Fcvtzs_S,      typeof(OpCodeSimd));
-            SetA64("0>0011101<100001101110xxxxxxxxxx", InstEmit.Fcvtzs_V,      typeof(OpCodeSimd));
-            SetA64("0x0011110>>xxxxx111111xxxxxxxxxx", InstEmit.Fcvtzs_V,      typeof(OpCodeSimdShImm));
-            SetA64("x00111100x111001000000xxxxxxxxxx", InstEmit.Fcvtzu_Gp,     typeof(OpCodeSimdCvt));
-            SetA64("x00111100x011001xxxxxxxxxxxxxxxx", InstEmit.Fcvtzu_Gp_Fix, typeof(OpCodeSimdCvt));
-            SetA64("011111101x100001101110xxxxxxxxxx", InstEmit.Fcvtzu_S,      typeof(OpCodeSimd));
-            SetA64("0>1011101<100001101110xxxxxxxxxx", InstEmit.Fcvtzu_V,      typeof(OpCodeSimd));
-            SetA64("0x1011110>>xxxxx111111xxxxxxxxxx", InstEmit.Fcvtzu_V,      typeof(OpCodeSimdShImm));
-            SetA64("000111100x1xxxxx000110xxxxxxxxxx", InstEmit.Fdiv_S,        typeof(OpCodeSimdReg));
-            SetA64("0>1011100<1xxxxx111111xxxxxxxxxx", InstEmit.Fdiv_V,        typeof(OpCodeSimdReg));
-            SetA64("000111110x0xxxxx0xxxxxxxxxxxxxxx", InstEmit.Fmadd_S,       typeof(OpCodeSimdReg));
-            SetA64("000111100x1xxxxx010010xxxxxxxxxx", InstEmit.Fmax_S,        typeof(OpCodeSimdReg));
-            SetA64("0>0011100<1xxxxx111101xxxxxxxxxx", InstEmit.Fmax_V,        typeof(OpCodeSimdReg));
-            SetA64("000111100x1xxxxx011010xxxxxxxxxx", InstEmit.Fmaxnm_S,      typeof(OpCodeSimdReg));
-            SetA64("0>0011100<1xxxxx110001xxxxxxxxxx", InstEmit.Fmaxnm_V,      typeof(OpCodeSimdReg));
-            SetA64("0>1011100<1xxxxx111101xxxxxxxxxx", InstEmit.Fmaxp_V,       typeof(OpCodeSimdReg));
-            SetA64("000111100x1xxxxx010110xxxxxxxxxx", InstEmit.Fmin_S,        typeof(OpCodeSimdReg));
-            SetA64("0>0011101<1xxxxx111101xxxxxxxxxx", InstEmit.Fmin_V,        typeof(OpCodeSimdReg));
-            SetA64("000111100x1xxxxx011110xxxxxxxxxx", InstEmit.Fminnm_S,      typeof(OpCodeSimdReg));
-            SetA64("0>0011101<1xxxxx110001xxxxxxxxxx", InstEmit.Fminnm_V,      typeof(OpCodeSimdReg));
-            SetA64("0>1011101<1xxxxx111101xxxxxxxxxx", InstEmit.Fminp_V,       typeof(OpCodeSimdReg));
-            SetA64("010111111xxxxxxx0001x0xxxxxxxxxx", InstEmit.Fmla_Se,       typeof(OpCodeSimdRegElemF));
-            SetA64("0>0011100<1xxxxx110011xxxxxxxxxx", InstEmit.Fmla_V,        typeof(OpCodeSimdReg));
-            SetA64("0>0011111<xxxxxx0001x0xxxxxxxxxx", InstEmit.Fmla_Ve,       typeof(OpCodeSimdRegElemF));
-            SetA64("010111111xxxxxxx0101x0xxxxxxxxxx", InstEmit.Fmls_Se,       typeof(OpCodeSimdRegElemF));
-            SetA64("0>0011101<1xxxxx110011xxxxxxxxxx", InstEmit.Fmls_V,        typeof(OpCodeSimdReg));
-            SetA64("0>0011111<xxxxxx0101x0xxxxxxxxxx", InstEmit.Fmls_Ve,       typeof(OpCodeSimdRegElemF));
-            SetA64("000111100x100000010000xxxxxxxxxx", InstEmit.Fmov_S,        typeof(OpCodeSimd));
-            SetA64("00011110xx1xxxxxxxx100xxxxxxxxxx", InstEmit.Fmov_Si,       typeof(OpCodeSimdFmov));
-            SetA64("0xx0111100000xxx111101xxxxxxxxxx", InstEmit.Fmov_V,        typeof(OpCodeSimdImm));
-            SetA64("x00111100x100110000000xxxxxxxxxx", InstEmit.Fmov_Ftoi,     typeof(OpCodeSimdCvt));
-            SetA64("x00111100x100111000000xxxxxxxxxx", InstEmit.Fmov_Itof,     typeof(OpCodeSimdCvt));
-            SetA64("1001111010101110000000xxxxxxxxxx", InstEmit.Fmov_Ftoi1,    typeof(OpCodeSimdCvt));
-            SetA64("1001111010101111000000xxxxxxxxxx", InstEmit.Fmov_Itof1,    typeof(OpCodeSimdCvt));
-            SetA64("000111110x0xxxxx1xxxxxxxxxxxxxxx", InstEmit.Fmsub_S,       typeof(OpCodeSimdReg));
-            SetA64("000111100x1xxxxx000010xxxxxxxxxx", InstEmit.Fmul_S,        typeof(OpCodeSimdReg));
-            SetA64("010111111xxxxxxx1001x0xxxxxxxxxx", InstEmit.Fmul_Se,       typeof(OpCodeSimdRegElemF));
-            SetA64("0>1011100<1xxxxx110111xxxxxxxxxx", InstEmit.Fmul_V,        typeof(OpCodeSimdReg));
-            SetA64("0>0011111<xxxxxx1001x0xxxxxxxxxx", InstEmit.Fmul_Ve,       typeof(OpCodeSimdRegElemF));
-            SetA64("010111100x1xxxxx110111xxxxxxxxxx", InstEmit.Fmulx_S,       typeof(OpCodeSimdReg));
-            SetA64("011111111xxxxxxx1001x0xxxxxxxxxx", InstEmit.Fmulx_Se,      typeof(OpCodeSimdRegElemF));
-            SetA64("0>0011100<1xxxxx110111xxxxxxxxxx", InstEmit.Fmulx_V,       typeof(OpCodeSimdReg));
-            SetA64("0>1011111<xxxxxx1001x0xxxxxxxxxx", InstEmit.Fmulx_Ve,      typeof(OpCodeSimdRegElemF));
-            SetA64("000111100x100001010000xxxxxxxxxx", InstEmit.Fneg_S,        typeof(OpCodeSimd));
-            SetA64("0>1011101<100000111110xxxxxxxxxx", InstEmit.Fneg_V,        typeof(OpCodeSimd));
-            SetA64("000111110x1xxxxx0xxxxxxxxxxxxxxx", InstEmit.Fnmadd_S,      typeof(OpCodeSimdReg));
-            SetA64("000111110x1xxxxx1xxxxxxxxxxxxxxx", InstEmit.Fnmsub_S,      typeof(OpCodeSimdReg));
-            SetA64("000111100x1xxxxx100010xxxxxxxxxx", InstEmit.Fnmul_S,       typeof(OpCodeSimdReg));
-            SetA64("010111101x100001110110xxxxxxxxxx", InstEmit.Frecpe_S,      typeof(OpCodeSimd));
-            SetA64("0>0011101<100001110110xxxxxxxxxx", InstEmit.Frecpe_V,      typeof(OpCodeSimd));
-            SetA64("010111100x1xxxxx111111xxxxxxxxxx", InstEmit.Frecps_S,      typeof(OpCodeSimdReg));
-            SetA64("0>0011100<1xxxxx111111xxxxxxxxxx", InstEmit.Frecps_V,      typeof(OpCodeSimdReg));
-            SetA64("010111101x100001111110xxxxxxxxxx", InstEmit.Frecpx_S,      typeof(OpCodeSimd));
-            SetA64("000111100x100110010000xxxxxxxxxx", InstEmit.Frinta_S,      typeof(OpCodeSimd));
-            SetA64("0>1011100<100001100010xxxxxxxxxx", InstEmit.Frinta_V,      typeof(OpCodeSimd));
-            SetA64("000111100x100111110000xxxxxxxxxx", InstEmit.Frinti_S,      typeof(OpCodeSimd));
-            SetA64("0>1011101<100001100110xxxxxxxxxx", InstEmit.Frinti_V,      typeof(OpCodeSimd));
-            SetA64("000111100x100101010000xxxxxxxxxx", InstEmit.Frintm_S,      typeof(OpCodeSimd));
-            SetA64("0>0011100<100001100110xxxxxxxxxx", InstEmit.Frintm_V,      typeof(OpCodeSimd));
-            SetA64("000111100x100100010000xxxxxxxxxx", InstEmit.Frintn_S,      typeof(OpCodeSimd));
-            SetA64("0>0011100<100001100010xxxxxxxxxx", InstEmit.Frintn_V,      typeof(OpCodeSimd));
-            SetA64("000111100x100100110000xxxxxxxxxx", InstEmit.Frintp_S,      typeof(OpCodeSimd));
-            SetA64("0>0011101<100001100010xxxxxxxxxx", InstEmit.Frintp_V,      typeof(OpCodeSimd));
-            SetA64("000111100x100111010000xxxxxxxxxx", InstEmit.Frintx_S,      typeof(OpCodeSimd));
-            SetA64("0>1011100<100001100110xxxxxxxxxx", InstEmit.Frintx_V,      typeof(OpCodeSimd));
-            SetA64("011111101x100001110110xxxxxxxxxx", InstEmit.Frsqrte_S,     typeof(OpCodeSimd));
-            SetA64("0>1011101<100001110110xxxxxxxxxx", InstEmit.Frsqrte_V,     typeof(OpCodeSimd));
-            SetA64("010111101x1xxxxx111111xxxxxxxxxx", InstEmit.Frsqrts_S,     typeof(OpCodeSimdReg));
-            SetA64("0>0011101<1xxxxx111111xxxxxxxxxx", InstEmit.Frsqrts_V,     typeof(OpCodeSimdReg));
-            SetA64("000111100x100001110000xxxxxxxxxx", InstEmit.Fsqrt_S,       typeof(OpCodeSimd));
-            SetA64("0>1011101<100001111110xxxxxxxxxx", InstEmit.Fsqrt_V,       typeof(OpCodeSimd));
-            SetA64("000111100x1xxxxx001110xxxxxxxxxx", InstEmit.Fsub_S,        typeof(OpCodeSimdReg));
-            SetA64("0>0011101<1xxxxx110101xxxxxxxxxx", InstEmit.Fsub_V,        typeof(OpCodeSimdReg));
-            SetA64("01001110000xxxxx000111xxxxxxxxxx", InstEmit.Ins_Gp,        typeof(OpCodeSimdIns));
-            SetA64("01101110000xxxxx0xxxx1xxxxxxxxxx", InstEmit.Ins_V,         typeof(OpCodeSimdIns));
-            SetA64("0x00110001000000xxxxxxxxxxxxxxxx", InstEmit.Ld__Vms,       typeof(OpCodeSimdMemMs));
-            SetA64("0x001100110xxxxxxxxxxxxxxxxxxxxx", InstEmit.Ld__Vms,       typeof(OpCodeSimdMemMs));
-            SetA64("0x00110101x00000xxxxxxxxxxxxxxxx", InstEmit.Ld__Vss,       typeof(OpCodeSimdMemSs));
-            SetA64("0x00110111xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Ld__Vss,       typeof(OpCodeSimdMemSs));
-            SetA64("xx10110xx1xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Ldp,           typeof(OpCodeSimdMemPair));
-            SetA64("xx111100x10xxxxxxxxx00xxxxxxxxxx", InstEmit.Ldr,           typeof(OpCodeSimdMemImm));
-            SetA64("xx111100x10xxxxxxxxx01xxxxxxxxxx", InstEmit.Ldr,           typeof(OpCodeSimdMemImm));
-            SetA64("xx111100x10xxxxxxxxx11xxxxxxxxxx", InstEmit.Ldr,           typeof(OpCodeSimdMemImm));
-            SetA64("xx111101x1xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Ldr,           typeof(OpCodeSimdMemImm));
-            SetA64("xx111100x11xxxxxxxxx10xxxxxxxxxx", InstEmit.Ldr,           typeof(OpCodeSimdMemReg));
-            SetA64("xx011100xxxxxxxxxxxxxxxxxxxxxxxx", InstEmit.LdrLit,        typeof(OpCodeSimdMemLit));
-            SetA64("0x001110<<1xxxxx100101xxxxxxxxxx", InstEmit.Mla_V,         typeof(OpCodeSimdReg));
-            SetA64("0x101111xxxxxxxx0000x0xxxxxxxxxx", InstEmit.Mla_Ve,        typeof(OpCodeSimdRegElem));
-            SetA64("0x101110<<1xxxxx100101xxxxxxxxxx", InstEmit.Mls_V,         typeof(OpCodeSimdReg));
-            SetA64("0x101111xxxxxxxx0100x0xxxxxxxxxx", InstEmit.Mls_Ve,        typeof(OpCodeSimdRegElem));
-            SetA64("0x00111100000xxx0xx001xxxxxxxxxx", InstEmit.Movi_V,        typeof(OpCodeSimdImm));
-            SetA64("0x00111100000xxx10x001xxxxxxxxxx", InstEmit.Movi_V,        typeof(OpCodeSimdImm));
-            SetA64("0x00111100000xxx110x01xxxxxxxxxx", InstEmit.Movi_V,        typeof(OpCodeSimdImm));
-            SetA64("0xx0111100000xxx111001xxxxxxxxxx", InstEmit.Movi_V,        typeof(OpCodeSimdImm));
-            SetA64("0x001110<<1xxxxx100111xxxxxxxxxx", InstEmit.Mul_V,         typeof(OpCodeSimdReg));
-            SetA64("0x001111xxxxxxxx1000x0xxxxxxxxxx", InstEmit.Mul_Ve,        typeof(OpCodeSimdRegElem));
-            SetA64("0x10111100000xxx0xx001xxxxxxxxxx", InstEmit.Mvni_V,        typeof(OpCodeSimdImm));
-            SetA64("0x10111100000xxx10x001xxxxxxxxxx", InstEmit.Mvni_V,        typeof(OpCodeSimdImm));
-            SetA64("0x10111100000xxx110x01xxxxxxxxxx", InstEmit.Mvni_V,        typeof(OpCodeSimdImm));
-            SetA64("0111111011100000101110xxxxxxxxxx", InstEmit.Neg_S,         typeof(OpCodeSimd));
-            SetA64("0>101110<<100000101110xxxxxxxxxx", InstEmit.Neg_V,         typeof(OpCodeSimd));
-            SetA64("0x10111000100000010110xxxxxxxxxx", InstEmit.Not_V,         typeof(OpCodeSimd));
-            SetA64("0x001110111xxxxx000111xxxxxxxxxx", InstEmit.Orn_V,         typeof(OpCodeSimdReg));
-            SetA64("0x001110101xxxxx000111xxxxxxxxxx", InstEmit.Orr_V,         typeof(OpCodeSimdReg));
-            SetA64("0x00111100000xxx<<x101xxxxxxxxxx", InstEmit.Orr_Vi,        typeof(OpCodeSimdImm));
-            SetA64("0x101110<<1xxxxx010000xxxxxxxxxx", InstEmit.Raddhn_V,      typeof(OpCodeSimdReg));
-            SetA64("0x10111001100000010110xxxxxxxxxx", InstEmit.Rbit_V,        typeof(OpCodeSimd));
-            SetA64("0x00111000100000000110xxxxxxxxxx", InstEmit.Rev16_V,       typeof(OpCodeSimd));
-            SetA64("0x1011100x100000000010xxxxxxxxxx", InstEmit.Rev32_V,       typeof(OpCodeSimd));
-            SetA64("0x001110<<100000000010xxxxxxxxxx", InstEmit.Rev64_V,       typeof(OpCodeSimd));
-            SetA64("0x00111100>>>xxx100011xxxxxxxxxx", InstEmit.Rshrn_V,       typeof(OpCodeSimdShImm));
-            SetA64("0x101110<<1xxxxx011000xxxxxxxxxx", InstEmit.Rsubhn_V,      typeof(OpCodeSimdReg));
-            SetA64("0x001110<<1xxxxx011111xxxxxxxxxx", InstEmit.Saba_V,        typeof(OpCodeSimdReg));
-            SetA64("0x001110<<1xxxxx010100xxxxxxxxxx", InstEmit.Sabal_V,       typeof(OpCodeSimdReg));
-            SetA64("0x001110<<1xxxxx011101xxxxxxxxxx", InstEmit.Sabd_V,        typeof(OpCodeSimdReg));
-            SetA64("0x001110<<1xxxxx011100xxxxxxxxxx", InstEmit.Sabdl_V,       typeof(OpCodeSimdReg));
-            SetA64("0x001110<<100000011010xxxxxxxxxx", InstEmit.Sadalp_V,      typeof(OpCodeSimd));
-            SetA64("0x001110<<1xxxxx000000xxxxxxxxxx", InstEmit.Saddl_V,       typeof(OpCodeSimdReg));
-            SetA64("0x001110<<100000001010xxxxxxxxxx", InstEmit.Saddlp_V,      typeof(OpCodeSimd));
-            SetA64("0x001110<<1xxxxx000100xxxxxxxxxx", InstEmit.Saddw_V,       typeof(OpCodeSimdReg));
-            SetA64("x0011110xx100010000000xxxxxxxxxx", InstEmit.Scvtf_Gp,      typeof(OpCodeSimdCvt));
-            SetA64("010111100x100001110110xxxxxxxxxx", InstEmit.Scvtf_S,       typeof(OpCodeSimd));
-            SetA64("0x0011100x100001110110xxxxxxxxxx", InstEmit.Scvtf_V,       typeof(OpCodeSimd));
-            SetA64("01011110000xxxxx000000xxxxxxxxxx", InstEmit.Sha1c_V,       typeof(OpCodeSimdReg));
-            SetA64("0101111000101000000010xxxxxxxxxx", InstEmit.Sha1h_V,       typeof(OpCodeSimd));
-            SetA64("01011110000xxxxx001000xxxxxxxxxx", InstEmit.Sha1m_V,       typeof(OpCodeSimdReg));
-            SetA64("01011110000xxxxx000100xxxxxxxxxx", InstEmit.Sha1p_V,       typeof(OpCodeSimdReg));
-            SetA64("01011110000xxxxx001100xxxxxxxxxx", InstEmit.Sha1su0_V,     typeof(OpCodeSimdReg));
-            SetA64("0101111000101000000110xxxxxxxxxx", InstEmit.Sha1su1_V,     typeof(OpCodeSimd));
-            SetA64("01011110000xxxxx010000xxxxxxxxxx", InstEmit.Sha256h_V,     typeof(OpCodeSimdReg));
-            SetA64("01011110000xxxxx010100xxxxxxxxxx", InstEmit.Sha256h2_V,    typeof(OpCodeSimdReg));
-            SetA64("0101111000101000001010xxxxxxxxxx", InstEmit.Sha256su0_V,   typeof(OpCodeSimd));
-            SetA64("01011110000xxxxx011000xxxxxxxxxx", InstEmit.Sha256su1_V,   typeof(OpCodeSimdReg));
-            SetA64("0x001110<<1xxxxx000001xxxxxxxxxx", InstEmit.Shadd_V,       typeof(OpCodeSimdReg));
-            SetA64("0101111101xxxxxx010101xxxxxxxxxx", InstEmit.Shl_S,         typeof(OpCodeSimdShImm));
-            SetA64("0x00111100>>>xxx010101xxxxxxxxxx", InstEmit.Shl_V,         typeof(OpCodeSimdShImm));
-            SetA64("0100111101xxxxxx010101xxxxxxxxxx", InstEmit.Shl_V,         typeof(OpCodeSimdShImm));
-            SetA64("0x101110<<100001001110xxxxxxxxxx", InstEmit.Shll_V,        typeof(OpCodeSimd));
-            SetA64("0x00111100>>>xxx100001xxxxxxxxxx", InstEmit.Shrn_V,        typeof(OpCodeSimdShImm));
-            SetA64("0x001110<<1xxxxx001001xxxxxxxxxx", InstEmit.Shsub_V,       typeof(OpCodeSimdReg));
-            SetA64("0x1011110>>>>xxx010101xxxxxxxxxx", InstEmit.Sli_V,         typeof(OpCodeSimdShImm));
-            SetA64("0x001110<<1xxxxx011001xxxxxxxxxx", InstEmit.Smax_V,        typeof(OpCodeSimdReg));
-            SetA64("0x001110<<1xxxxx101001xxxxxxxxxx", InstEmit.Smaxp_V,       typeof(OpCodeSimdReg));
-            SetA64("0x001110<<1xxxxx011011xxxxxxxxxx", InstEmit.Smin_V,        typeof(OpCodeSimdReg));
-            SetA64("0x001110<<1xxxxx101011xxxxxxxxxx", InstEmit.Sminp_V,       typeof(OpCodeSimdReg));
-            SetA64("0x001110<<1xxxxx100000xxxxxxxxxx", InstEmit.Smlal_V,       typeof(OpCodeSimdReg));
-            SetA64("0x001110<<1xxxxx101000xxxxxxxxxx", InstEmit.Smlsl_V,       typeof(OpCodeSimdReg));
-            SetA64("0x001110000xxxxx001011xxxxxxxxxx", InstEmit.Smov_S,        typeof(OpCodeSimdIns));
-            SetA64("0x001110<<1xxxxx110000xxxxxxxxxx", InstEmit.Smull_V,       typeof(OpCodeSimdReg));
-            SetA64("01011110xx100000011110xxxxxxxxxx", InstEmit.Sqabs_S,       typeof(OpCodeSimd));
-            SetA64("0>001110<<100000011110xxxxxxxxxx", InstEmit.Sqabs_V,       typeof(OpCodeSimd));
-            SetA64("01011110xx1xxxxx000011xxxxxxxxxx", InstEmit.Sqadd_S,       typeof(OpCodeSimdReg));
-            SetA64("0>001110<<1xxxxx000011xxxxxxxxxx", InstEmit.Sqadd_V,       typeof(OpCodeSimdReg));
-            SetA64("01011110011xxxxx101101xxxxxxxxxx", InstEmit.Sqdmulh_S,     typeof(OpCodeSimdReg));
-            SetA64("01011110101xxxxx101101xxxxxxxxxx", InstEmit.Sqdmulh_S,     typeof(OpCodeSimdReg));
-            SetA64("0x001110011xxxxx101101xxxxxxxxxx", InstEmit.Sqdmulh_V,     typeof(OpCodeSimdReg));
-            SetA64("0x001110101xxxxx101101xxxxxxxxxx", InstEmit.Sqdmulh_V,     typeof(OpCodeSimdReg));
-            SetA64("01111110xx100000011110xxxxxxxxxx", InstEmit.Sqneg_S,       typeof(OpCodeSimd));
-            SetA64("0>101110<<100000011110xxxxxxxxxx", InstEmit.Sqneg_V,       typeof(OpCodeSimd));
-            SetA64("01111110011xxxxx101101xxxxxxxxxx", InstEmit.Sqrdmulh_S,    typeof(OpCodeSimdReg));
-            SetA64("01111110101xxxxx101101xxxxxxxxxx", InstEmit.Sqrdmulh_S,    typeof(OpCodeSimdReg));
-            SetA64("0x101110011xxxxx101101xxxxxxxxxx", InstEmit.Sqrdmulh_V,    typeof(OpCodeSimdReg));
-            SetA64("0x101110101xxxxx101101xxxxxxxxxx", InstEmit.Sqrdmulh_V,    typeof(OpCodeSimdReg));
-            SetA64("0101111100>>>xxx100111xxxxxxxxxx", InstEmit.Sqrshrn_S,     typeof(OpCodeSimdShImm));
-            SetA64("0x00111100>>>xxx100111xxxxxxxxxx", InstEmit.Sqrshrn_V,     typeof(OpCodeSimdShImm));
-            SetA64("0111111100>>>xxx100011xxxxxxxxxx", InstEmit.Sqrshrun_S,    typeof(OpCodeSimdShImm));
-            SetA64("0x10111100>>>xxx100011xxxxxxxxxx", InstEmit.Sqrshrun_V,    typeof(OpCodeSimdShImm));
-            SetA64("0101111100>>>xxx100101xxxxxxxxxx", InstEmit.Sqshrn_S,      typeof(OpCodeSimdShImm));
-            SetA64("0x00111100>>>xxx100101xxxxxxxxxx", InstEmit.Sqshrn_V,      typeof(OpCodeSimdShImm));
-            SetA64("0111111100>>>xxx100001xxxxxxxxxx", InstEmit.Sqshrun_S,     typeof(OpCodeSimdShImm));
-            SetA64("0x10111100>>>xxx100001xxxxxxxxxx", InstEmit.Sqshrun_V,     typeof(OpCodeSimdShImm));
-            SetA64("01011110xx1xxxxx001011xxxxxxxxxx", InstEmit.Sqsub_S,       typeof(OpCodeSimdReg));
-            SetA64("0>001110<<1xxxxx001011xxxxxxxxxx", InstEmit.Sqsub_V,       typeof(OpCodeSimdReg));
-            SetA64("01011110<<100001010010xxxxxxxxxx", InstEmit.Sqxtn_S,       typeof(OpCodeSimd));
-            SetA64("0x001110<<100001010010xxxxxxxxxx", InstEmit.Sqxtn_V,       typeof(OpCodeSimd));
-            SetA64("01111110<<100001001010xxxxxxxxxx", InstEmit.Sqxtun_S,      typeof(OpCodeSimd));
-            SetA64("0x101110<<100001001010xxxxxxxxxx", InstEmit.Sqxtun_V,      typeof(OpCodeSimd));
-            SetA64("0x001110<<1xxxxx000101xxxxxxxxxx", InstEmit.Srhadd_V,      typeof(OpCodeSimdReg));
-            SetA64("0101111101xxxxxx001001xxxxxxxxxx", InstEmit.Srshr_S,       typeof(OpCodeSimdShImm));
-            SetA64("0x00111100>>>xxx001001xxxxxxxxxx", InstEmit.Srshr_V,       typeof(OpCodeSimdShImm));
-            SetA64("0100111101xxxxxx001001xxxxxxxxxx", InstEmit.Srshr_V,       typeof(OpCodeSimdShImm));
-            SetA64("0101111101xxxxxx001101xxxxxxxxxx", InstEmit.Srsra_S,       typeof(OpCodeSimdShImm));
-            SetA64("0x00111100>>>xxx001101xxxxxxxxxx", InstEmit.Srsra_V,       typeof(OpCodeSimdShImm));
-            SetA64("0100111101xxxxxx001101xxxxxxxxxx", InstEmit.Srsra_V,       typeof(OpCodeSimdShImm));
-            SetA64("0>001110<<1xxxxx010001xxxxxxxxxx", InstEmit.Sshl_V,        typeof(OpCodeSimdReg));
-            SetA64("0x00111100>>>xxx101001xxxxxxxxxx", InstEmit.Sshll_V,       typeof(OpCodeSimdShImm));
-            SetA64("0101111101xxxxxx000001xxxxxxxxxx", InstEmit.Sshr_S,        typeof(OpCodeSimdShImm));
-            SetA64("0x00111100>>>xxx000001xxxxxxxxxx", InstEmit.Sshr_V,        typeof(OpCodeSimdShImm));
-            SetA64("0100111101xxxxxx000001xxxxxxxxxx", InstEmit.Sshr_V,        typeof(OpCodeSimdShImm));
-            SetA64("0101111101xxxxxx000101xxxxxxxxxx", InstEmit.Ssra_S,        typeof(OpCodeSimdShImm));
-            SetA64("0x00111100>>>xxx000101xxxxxxxxxx", InstEmit.Ssra_V,        typeof(OpCodeSimdShImm));
-            SetA64("0100111101xxxxxx000101xxxxxxxxxx", InstEmit.Ssra_V,        typeof(OpCodeSimdShImm));
-            SetA64("0x001110<<1xxxxx001000xxxxxxxxxx", InstEmit.Ssubl_V,       typeof(OpCodeSimdReg));
-            SetA64("0x001110<<1xxxxx001100xxxxxxxxxx", InstEmit.Ssubw_V,       typeof(OpCodeSimdReg));
-            SetA64("0x00110000000000xxxxxxxxxxxxxxxx", InstEmit.St__Vms,       typeof(OpCodeSimdMemMs));
-            SetA64("0x001100100xxxxxxxxxxxxxxxxxxxxx", InstEmit.St__Vms,       typeof(OpCodeSimdMemMs));
-            SetA64("0x00110100x00000xxxxxxxxxxxxxxxx", InstEmit.St__Vss,       typeof(OpCodeSimdMemSs));
-            SetA64("0x00110110xxxxxxxxxxxxxxxxxxxxxx", InstEmit.St__Vss,       typeof(OpCodeSimdMemSs));
-            SetA64("xx10110xx0xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Stp,           typeof(OpCodeSimdMemPair));
-            SetA64("xx111100x00xxxxxxxxx00xxxxxxxxxx", InstEmit.Str,           typeof(OpCodeSimdMemImm));
-            SetA64("xx111100x00xxxxxxxxx01xxxxxxxxxx", InstEmit.Str,           typeof(OpCodeSimdMemImm));
-            SetA64("xx111100x00xxxxxxxxx11xxxxxxxxxx", InstEmit.Str,           typeof(OpCodeSimdMemImm));
-            SetA64("xx111101x0xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Str,           typeof(OpCodeSimdMemImm));
-            SetA64("xx111100x01xxxxxxxxx10xxxxxxxxxx", InstEmit.Str,           typeof(OpCodeSimdMemReg));
-            SetA64("01111110111xxxxx100001xxxxxxxxxx", InstEmit.Sub_S,         typeof(OpCodeSimdReg));
-            SetA64("0>101110<<1xxxxx100001xxxxxxxxxx", InstEmit.Sub_V,         typeof(OpCodeSimdReg));
-            SetA64("0x001110<<1xxxxx011000xxxxxxxxxx", InstEmit.Subhn_V,       typeof(OpCodeSimdReg));
-            SetA64("01011110xx100000001110xxxxxxxxxx", InstEmit.Suqadd_S,      typeof(OpCodeSimd));
-            SetA64("0>001110<<100000001110xxxxxxxxxx", InstEmit.Suqadd_V,      typeof(OpCodeSimd));
-            SetA64("0x001110000xxxxx0xx000xxxxxxxxxx", InstEmit.Tbl_V,         typeof(OpCodeSimdTbl));
-            SetA64("0>001110<<0xxxxx001010xxxxxxxxxx", InstEmit.Trn1_V,        typeof(OpCodeSimdReg));
-            SetA64("0>001110<<0xxxxx011010xxxxxxxxxx", InstEmit.Trn2_V,        typeof(OpCodeSimdReg));
-            SetA64("0x101110<<1xxxxx011111xxxxxxxxxx", InstEmit.Uaba_V,        typeof(OpCodeSimdReg));
-            SetA64("0x101110<<1xxxxx010100xxxxxxxxxx", InstEmit.Uabal_V,       typeof(OpCodeSimdReg));
-            SetA64("0x101110<<1xxxxx011101xxxxxxxxxx", InstEmit.Uabd_V,        typeof(OpCodeSimdReg));
-            SetA64("0x101110<<1xxxxx011100xxxxxxxxxx", InstEmit.Uabdl_V,       typeof(OpCodeSimdReg));
-            SetA64("0x101110<<100000011010xxxxxxxxxx", InstEmit.Uadalp_V,      typeof(OpCodeSimd));
-            SetA64("0x101110<<1xxxxx000000xxxxxxxxxx", InstEmit.Uaddl_V,       typeof(OpCodeSimdReg));
-            SetA64("0x101110<<100000001010xxxxxxxxxx", InstEmit.Uaddlp_V,      typeof(OpCodeSimd));
-            SetA64("001011100x110000001110xxxxxxxxxx", InstEmit.Uaddlv_V,      typeof(OpCodeSimd));
-            SetA64("01101110<<110000001110xxxxxxxxxx", InstEmit.Uaddlv_V,      typeof(OpCodeSimd));
-            SetA64("0x101110<<1xxxxx000100xxxxxxxxxx", InstEmit.Uaddw_V,       typeof(OpCodeSimdReg));
-            SetA64("x0011110xx100011000000xxxxxxxxxx", InstEmit.Ucvtf_Gp,      typeof(OpCodeSimdCvt));
-            SetA64("011111100x100001110110xxxxxxxxxx", InstEmit.Ucvtf_S,       typeof(OpCodeSimd));
-            SetA64("0x1011100x100001110110xxxxxxxxxx", InstEmit.Ucvtf_V,       typeof(OpCodeSimd));
-            SetA64("0x101110<<1xxxxx000001xxxxxxxxxx", InstEmit.Uhadd_V,       typeof(OpCodeSimdReg));
-            SetA64("0x101110<<1xxxxx001001xxxxxxxxxx", InstEmit.Uhsub_V,       typeof(OpCodeSimdReg));
-            SetA64("0x101110<<1xxxxx011001xxxxxxxxxx", InstEmit.Umax_V,        typeof(OpCodeSimdReg));
-            SetA64("0x101110<<1xxxxx101001xxxxxxxxxx", InstEmit.Umaxp_V,       typeof(OpCodeSimdReg));
-            SetA64("0x101110<<1xxxxx011011xxxxxxxxxx", InstEmit.Umin_V,        typeof(OpCodeSimdReg));
-            SetA64("0x101110<<1xxxxx101011xxxxxxxxxx", InstEmit.Uminp_V,       typeof(OpCodeSimdReg));
-            SetA64("0x101110<<1xxxxx100000xxxxxxxxxx", InstEmit.Umlal_V,       typeof(OpCodeSimdReg));
-            SetA64("0x101110<<1xxxxx101000xxxxxxxxxx", InstEmit.Umlsl_V,       typeof(OpCodeSimdReg));
-            SetA64("0x001110000xxxxx001111xxxxxxxxxx", InstEmit.Umov_S,        typeof(OpCodeSimdIns));
-            SetA64("0x101110<<1xxxxx110000xxxxxxxxxx", InstEmit.Umull_V,       typeof(OpCodeSimdReg));
-            SetA64("01111110xx1xxxxx000011xxxxxxxxxx", InstEmit.Uqadd_S,       typeof(OpCodeSimdReg));
-            SetA64("0>101110<<1xxxxx000011xxxxxxxxxx", InstEmit.Uqadd_V,       typeof(OpCodeSimdReg));
-            SetA64("0111111100>>>xxx100111xxxxxxxxxx", InstEmit.Uqrshrn_S,     typeof(OpCodeSimdShImm));
-            SetA64("0x10111100>>>xxx100111xxxxxxxxxx", InstEmit.Uqrshrn_V,     typeof(OpCodeSimdShImm));
-            SetA64("0111111100>>>xxx100101xxxxxxxxxx", InstEmit.Uqshrn_S,      typeof(OpCodeSimdShImm));
-            SetA64("0x10111100>>>xxx100101xxxxxxxxxx", InstEmit.Uqshrn_V,      typeof(OpCodeSimdShImm));
-            SetA64("01111110xx1xxxxx001011xxxxxxxxxx", InstEmit.Uqsub_S,       typeof(OpCodeSimdReg));
-            SetA64("0>101110<<1xxxxx001011xxxxxxxxxx", InstEmit.Uqsub_V,       typeof(OpCodeSimdReg));
-            SetA64("01111110<<100001010010xxxxxxxxxx", InstEmit.Uqxtn_S,       typeof(OpCodeSimd));
-            SetA64("0x101110<<100001010010xxxxxxxxxx", InstEmit.Uqxtn_V,       typeof(OpCodeSimd));
-            SetA64("0x101110<<1xxxxx000101xxxxxxxxxx", InstEmit.Urhadd_V,      typeof(OpCodeSimdReg));
-            SetA64("0111111101xxxxxx001001xxxxxxxxxx", InstEmit.Urshr_S,       typeof(OpCodeSimdShImm));
-            SetA64("0x10111100>>>xxx001001xxxxxxxxxx", InstEmit.Urshr_V,       typeof(OpCodeSimdShImm));
-            SetA64("0110111101xxxxxx001001xxxxxxxxxx", InstEmit.Urshr_V,       typeof(OpCodeSimdShImm));
-            SetA64("0111111101xxxxxx001101xxxxxxxxxx", InstEmit.Ursra_S,       typeof(OpCodeSimdShImm));
-            SetA64("0x10111100>>>xxx001101xxxxxxxxxx", InstEmit.Ursra_V,       typeof(OpCodeSimdShImm));
-            SetA64("0110111101xxxxxx001101xxxxxxxxxx", InstEmit.Ursra_V,       typeof(OpCodeSimdShImm));
-            SetA64("0>101110<<1xxxxx010001xxxxxxxxxx", InstEmit.Ushl_V,        typeof(OpCodeSimdReg));
-            SetA64("0x10111100>>>xxx101001xxxxxxxxxx", InstEmit.Ushll_V,       typeof(OpCodeSimdShImm));
-            SetA64("0111111101xxxxxx000001xxxxxxxxxx", InstEmit.Ushr_S,        typeof(OpCodeSimdShImm));
-            SetA64("0x10111100>>>xxx000001xxxxxxxxxx", InstEmit.Ushr_V,        typeof(OpCodeSimdShImm));
-            SetA64("0110111101xxxxxx000001xxxxxxxxxx", InstEmit.Ushr_V,        typeof(OpCodeSimdShImm));
-            SetA64("01111110xx100000001110xxxxxxxxxx", InstEmit.Usqadd_S,      typeof(OpCodeSimd));
-            SetA64("0>101110<<100000001110xxxxxxxxxx", InstEmit.Usqadd_V,      typeof(OpCodeSimd));
-            SetA64("0111111101xxxxxx000101xxxxxxxxxx", InstEmit.Usra_S,        typeof(OpCodeSimdShImm));
-            SetA64("0x10111100>>>xxx000101xxxxxxxxxx", InstEmit.Usra_V,        typeof(OpCodeSimdShImm));
-            SetA64("0110111101xxxxxx000101xxxxxxxxxx", InstEmit.Usra_V,        typeof(OpCodeSimdShImm));
-            SetA64("0x101110<<1xxxxx001000xxxxxxxxxx", InstEmit.Usubl_V,       typeof(OpCodeSimdReg));
-            SetA64("0x101110<<1xxxxx001100xxxxxxxxxx", InstEmit.Usubw_V,       typeof(OpCodeSimdReg));
-            SetA64("0>001110<<0xxxxx000110xxxxxxxxxx", InstEmit.Uzp1_V,        typeof(OpCodeSimdReg));
-            SetA64("0>001110<<0xxxxx010110xxxxxxxxxx", InstEmit.Uzp2_V,        typeof(OpCodeSimdReg));
-            SetA64("0x001110<<100001001010xxxxxxxxxx", InstEmit.Xtn_V,         typeof(OpCodeSimd));
-            SetA64("0>001110<<0xxxxx001110xxxxxxxxxx", InstEmit.Zip1_V,        typeof(OpCodeSimdReg));
-            SetA64("0>001110<<0xxxxx011110xxxxxxxxxx", InstEmit.Zip2_V,        typeof(OpCodeSimdReg));
+            SetA64("0101111011100000101110xxxxxxxxxx", InstEmit.Abs_S,         typeof(OpCodeSimd64));
+            SetA64("0>001110<<100000101110xxxxxxxxxx", InstEmit.Abs_V,         typeof(OpCodeSimd64));
+            SetA64("01011110111xxxxx100001xxxxxxxxxx", InstEmit.Add_S,         typeof(OpCodeSimdReg64));
+            SetA64("0>001110<<1xxxxx100001xxxxxxxxxx", InstEmit.Add_V,         typeof(OpCodeSimdReg64));
+            SetA64("0x001110<<1xxxxx010000xxxxxxxxxx", InstEmit.Addhn_V,       typeof(OpCodeSimdReg64));
+            SetA64("0101111011110001101110xxxxxxxxxx", InstEmit.Addp_S,        typeof(OpCodeSimd64));
+            SetA64("0>001110<<1xxxxx101111xxxxxxxxxx", InstEmit.Addp_V,        typeof(OpCodeSimdReg64));
+            SetA64("000011100x110001101110xxxxxxxxxx", InstEmit.Addv_V,        typeof(OpCodeSimd64));
+            SetA64("01001110<<110001101110xxxxxxxxxx", InstEmit.Addv_V,        typeof(OpCodeSimd64));
+            SetA64("0100111000101000010110xxxxxxxxxx", InstEmit.Aesd_V,        typeof(OpCodeSimd64));
+            SetA64("0100111000101000010010xxxxxxxxxx", InstEmit.Aese_V,        typeof(OpCodeSimd64));
+            SetA64("0100111000101000011110xxxxxxxxxx", InstEmit.Aesimc_V,      typeof(OpCodeSimd64));
+            SetA64("0100111000101000011010xxxxxxxxxx", InstEmit.Aesmc_V,       typeof(OpCodeSimd64));
+            SetA64("0x001110001xxxxx000111xxxxxxxxxx", InstEmit.And_V,         typeof(OpCodeSimdReg64));
+            SetA64("0x001110011xxxxx000111xxxxxxxxxx", InstEmit.Bic_V,         typeof(OpCodeSimdReg64));
+            SetA64("0x10111100000xxx<<x101xxxxxxxxxx", InstEmit.Bic_Vi,        typeof(OpCodeSimdImm64));
+            SetA64("0x101110111xxxxx000111xxxxxxxxxx", InstEmit.Bif_V,         typeof(OpCodeSimdReg64));
+            SetA64("0x101110101xxxxx000111xxxxxxxxxx", InstEmit.Bit_V,         typeof(OpCodeSimdReg64));
+            SetA64("0x101110011xxxxx000111xxxxxxxxxx", InstEmit.Bsl_V,         typeof(OpCodeSimdReg64));
+            SetA64("0x001110<<100000010010xxxxxxxxxx", InstEmit.Cls_V,         typeof(OpCodeSimd64));
+            SetA64("0x101110<<100000010010xxxxxxxxxx", InstEmit.Clz_V,         typeof(OpCodeSimd64));
+            SetA64("01111110111xxxxx100011xxxxxxxxxx", InstEmit.Cmeq_S,        typeof(OpCodeSimdReg64));
+            SetA64("0101111011100000100110xxxxxxxxxx", InstEmit.Cmeq_S,        typeof(OpCodeSimd64));
+            SetA64("0>101110<<1xxxxx100011xxxxxxxxxx", InstEmit.Cmeq_V,        typeof(OpCodeSimdReg64));
+            SetA64("0>001110<<100000100110xxxxxxxxxx", InstEmit.Cmeq_V,        typeof(OpCodeSimd64));
+            SetA64("01011110111xxxxx001111xxxxxxxxxx", InstEmit.Cmge_S,        typeof(OpCodeSimdReg64));
+            SetA64("0111111011100000100010xxxxxxxxxx", InstEmit.Cmge_S,        typeof(OpCodeSimd64));
+            SetA64("0>001110<<1xxxxx001111xxxxxxxxxx", InstEmit.Cmge_V,        typeof(OpCodeSimdReg64));
+            SetA64("0>101110<<100000100010xxxxxxxxxx", InstEmit.Cmge_V,        typeof(OpCodeSimd64));
+            SetA64("01011110111xxxxx001101xxxxxxxxxx", InstEmit.Cmgt_S,        typeof(OpCodeSimdReg64));
+            SetA64("0101111011100000100010xxxxxxxxxx", InstEmit.Cmgt_S,        typeof(OpCodeSimd64));
+            SetA64("0>001110<<1xxxxx001101xxxxxxxxxx", InstEmit.Cmgt_V,        typeof(OpCodeSimdReg64));
+            SetA64("0>001110<<100000100010xxxxxxxxxx", InstEmit.Cmgt_V,        typeof(OpCodeSimd64));
+            SetA64("01111110111xxxxx001101xxxxxxxxxx", InstEmit.Cmhi_S,        typeof(OpCodeSimdReg64));
+            SetA64("0>101110<<1xxxxx001101xxxxxxxxxx", InstEmit.Cmhi_V,        typeof(OpCodeSimdReg64));
+            SetA64("01111110111xxxxx001111xxxxxxxxxx", InstEmit.Cmhs_S,        typeof(OpCodeSimdReg64));
+            SetA64("0>101110<<1xxxxx001111xxxxxxxxxx", InstEmit.Cmhs_V,        typeof(OpCodeSimdReg64));
+            SetA64("0111111011100000100110xxxxxxxxxx", InstEmit.Cmle_S,        typeof(OpCodeSimd64));
+            SetA64("0>101110<<100000100110xxxxxxxxxx", InstEmit.Cmle_V,        typeof(OpCodeSimd64));
+            SetA64("0101111011100000101010xxxxxxxxxx", InstEmit.Cmlt_S,        typeof(OpCodeSimd64));
+            SetA64("0>001110<<100000101010xxxxxxxxxx", InstEmit.Cmlt_V,        typeof(OpCodeSimd64));
+            SetA64("01011110111xxxxx100011xxxxxxxxxx", InstEmit.Cmtst_S,       typeof(OpCodeSimdReg64));
+            SetA64("0>001110<<1xxxxx100011xxxxxxxxxx", InstEmit.Cmtst_V,       typeof(OpCodeSimdReg64));
+            SetA64("0x00111000100000010110xxxxxxxxxx", InstEmit.Cnt_V,         typeof(OpCodeSimd64));
+            SetA64("0x001110000xxxxx000011xxxxxxxxxx", InstEmit.Dup_Gp,        typeof(OpCodeSimdIns64));
+            SetA64("01011110000xxxxx000001xxxxxxxxxx", InstEmit.Dup_S,         typeof(OpCodeSimdIns64));
+            SetA64("0x001110000xxxxx000001xxxxxxxxxx", InstEmit.Dup_V,         typeof(OpCodeSimdIns64));
+            SetA64("0x101110001xxxxx000111xxxxxxxxxx", InstEmit.Eor_V,         typeof(OpCodeSimdReg64));
+            SetA64("0>101110000xxxxx0<xxx0xxxxxxxxxx", InstEmit.Ext_V,         typeof(OpCodeSimdExt64));
+            SetA64("011111101x1xxxxx110101xxxxxxxxxx", InstEmit.Fabd_S,        typeof(OpCodeSimdReg64));
+            SetA64("000111100x100000110000xxxxxxxxxx", InstEmit.Fabs_S,        typeof(OpCodeSimd64));
+            SetA64("0>0011101<100000111110xxxxxxxxxx", InstEmit.Fabs_V,        typeof(OpCodeSimd64));
+            SetA64("000111100x1xxxxx001010xxxxxxxxxx", InstEmit.Fadd_S,        typeof(OpCodeSimdReg64));
+            SetA64("0>0011100<1xxxxx110101xxxxxxxxxx", InstEmit.Fadd_V,        typeof(OpCodeSimdReg64));
+            SetA64("011111100x110000110110xxxxxxxxxx", InstEmit.Faddp_S,       typeof(OpCodeSimd64));
+            SetA64("0>1011100<1xxxxx110101xxxxxxxxxx", InstEmit.Faddp_V,       typeof(OpCodeSimdReg64));
+            SetA64("000111100x1xxxxxxxxx01xxxxx0xxxx", InstEmit.Fccmp_S,       typeof(OpCodeSimdFcond64));
+            SetA64("000111100x1xxxxxxxxx01xxxxx1xxxx", InstEmit.Fccmpe_S,      typeof(OpCodeSimdFcond64));
+            SetA64("010111100x1xxxxx111001xxxxxxxxxx", InstEmit.Fcmeq_S,       typeof(OpCodeSimdReg64));
+            SetA64("010111101x100000110110xxxxxxxxxx", InstEmit.Fcmeq_S,       typeof(OpCodeSimd64));
+            SetA64("0>0011100<1xxxxx111001xxxxxxxxxx", InstEmit.Fcmeq_V,       typeof(OpCodeSimdReg64));
+            SetA64("0>0011101<100000110110xxxxxxxxxx", InstEmit.Fcmeq_V,       typeof(OpCodeSimd64));
+            SetA64("011111100x1xxxxx111001xxxxxxxxxx", InstEmit.Fcmge_S,       typeof(OpCodeSimdReg64));
+            SetA64("011111101x100000110010xxxxxxxxxx", InstEmit.Fcmge_S,       typeof(OpCodeSimd64));
+            SetA64("0>1011100<1xxxxx111001xxxxxxxxxx", InstEmit.Fcmge_V,       typeof(OpCodeSimdReg64));
+            SetA64("0>1011101<100000110010xxxxxxxxxx", InstEmit.Fcmge_V,       typeof(OpCodeSimd64));
+            SetA64("011111101x1xxxxx111001xxxxxxxxxx", InstEmit.Fcmgt_S,       typeof(OpCodeSimdReg64));
+            SetA64("010111101x100000110010xxxxxxxxxx", InstEmit.Fcmgt_S,       typeof(OpCodeSimd64));
+            SetA64("0>1011101<1xxxxx111001xxxxxxxxxx", InstEmit.Fcmgt_V,       typeof(OpCodeSimdReg64));
+            SetA64("0>0011101<100000110010xxxxxxxxxx", InstEmit.Fcmgt_V,       typeof(OpCodeSimd64));
+            SetA64("011111101x100000110110xxxxxxxxxx", InstEmit.Fcmle_S,       typeof(OpCodeSimd64));
+            SetA64("0>1011101<100000110110xxxxxxxxxx", InstEmit.Fcmle_V,       typeof(OpCodeSimd64));
+            SetA64("010111101x100000111010xxxxxxxxxx", InstEmit.Fcmlt_S,       typeof(OpCodeSimd64));
+            SetA64("0>0011101<100000111010xxxxxxxxxx", InstEmit.Fcmlt_V,       typeof(OpCodeSimd64));
+            SetA64("000111100x1xxxxx001000xxxxx0x000", InstEmit.Fcmp_S,        typeof(OpCodeSimdReg64));
+            SetA64("000111100x1xxxxx001000xxxxx1x000", InstEmit.Fcmpe_S,       typeof(OpCodeSimdReg64));
+            SetA64("000111100x1xxxxxxxxx11xxxxxxxxxx", InstEmit.Fcsel_S,       typeof(OpCodeSimdFcond64));
+            SetA64("000111100x10001xx10000xxxxxxxxxx", InstEmit.Fcvt_S,        typeof(OpCodeSimd64));
+            SetA64("x00111100x100100000000xxxxxxxxxx", InstEmit.Fcvtas_Gp,     typeof(OpCodeSimdCvt64));
+            SetA64("x00111100x100101000000xxxxxxxxxx", InstEmit.Fcvtau_Gp,     typeof(OpCodeSimdCvt64));
+            SetA64("0x0011100x100001011110xxxxxxxxxx", InstEmit.Fcvtl_V,       typeof(OpCodeSimd64));
+            SetA64("x00111100x110000000000xxxxxxxxxx", InstEmit.Fcvtms_Gp,     typeof(OpCodeSimdCvt64));
+            SetA64("x00111100x110001000000xxxxxxxxxx", InstEmit.Fcvtmu_Gp,     typeof(OpCodeSimdCvt64));
+            SetA64("0x0011100x100001011010xxxxxxxxxx", InstEmit.Fcvtn_V,       typeof(OpCodeSimd64));
+            SetA64("010111100x100001101010xxxxxxxxxx", InstEmit.Fcvtns_S,      typeof(OpCodeSimd64));
+            SetA64("0>0011100<100001101010xxxxxxxxxx", InstEmit.Fcvtns_V,      typeof(OpCodeSimd64));
+            SetA64("011111100x100001101010xxxxxxxxxx", InstEmit.Fcvtnu_S,      typeof(OpCodeSimd64));
+            SetA64("0>1011100<100001101010xxxxxxxxxx", InstEmit.Fcvtnu_V,      typeof(OpCodeSimd64));
+            SetA64("x00111100x101000000000xxxxxxxxxx", InstEmit.Fcvtps_Gp,     typeof(OpCodeSimdCvt64));
+            SetA64("x00111100x101001000000xxxxxxxxxx", InstEmit.Fcvtpu_Gp,     typeof(OpCodeSimdCvt64));
+            SetA64("x00111100x111000000000xxxxxxxxxx", InstEmit.Fcvtzs_Gp,     typeof(OpCodeSimdCvt64));
+            SetA64("x00111100x011000xxxxxxxxxxxxxxxx", InstEmit.Fcvtzs_Gp_Fix, typeof(OpCodeSimdCvt64));
+            SetA64("010111101x100001101110xxxxxxxxxx", InstEmit.Fcvtzs_S,      typeof(OpCodeSimd64));
+            SetA64("0>0011101<100001101110xxxxxxxxxx", InstEmit.Fcvtzs_V,      typeof(OpCodeSimd64));
+            SetA64("0x0011110>>xxxxx111111xxxxxxxxxx", InstEmit.Fcvtzs_V,      typeof(OpCodeSimdShImm64));
+            SetA64("x00111100x111001000000xxxxxxxxxx", InstEmit.Fcvtzu_Gp,     typeof(OpCodeSimdCvt64));
+            SetA64("x00111100x011001xxxxxxxxxxxxxxxx", InstEmit.Fcvtzu_Gp_Fix, typeof(OpCodeSimdCvt64));
+            SetA64("011111101x100001101110xxxxxxxxxx", InstEmit.Fcvtzu_S,      typeof(OpCodeSimd64));
+            SetA64("0>1011101<100001101110xxxxxxxxxx", InstEmit.Fcvtzu_V,      typeof(OpCodeSimd64));
+            SetA64("0x1011110>>xxxxx111111xxxxxxxxxx", InstEmit.Fcvtzu_V,      typeof(OpCodeSimdShImm64));
+            SetA64("000111100x1xxxxx000110xxxxxxxxxx", InstEmit.Fdiv_S,        typeof(OpCodeSimdReg64));
+            SetA64("0>1011100<1xxxxx111111xxxxxxxxxx", InstEmit.Fdiv_V,        typeof(OpCodeSimdReg64));
+            SetA64("000111110x0xxxxx0xxxxxxxxxxxxxxx", InstEmit.Fmadd_S,       typeof(OpCodeSimdReg64));
+            SetA64("000111100x1xxxxx010010xxxxxxxxxx", InstEmit.Fmax_S,        typeof(OpCodeSimdReg64));
+            SetA64("0>0011100<1xxxxx111101xxxxxxxxxx", InstEmit.Fmax_V,        typeof(OpCodeSimdReg64));
+            SetA64("000111100x1xxxxx011010xxxxxxxxxx", InstEmit.Fmaxnm_S,      typeof(OpCodeSimdReg64));
+            SetA64("0>0011100<1xxxxx110001xxxxxxxxxx", InstEmit.Fmaxnm_V,      typeof(OpCodeSimdReg64));
+            SetA64("0>1011100<1xxxxx111101xxxxxxxxxx", InstEmit.Fmaxp_V,       typeof(OpCodeSimdReg64));
+            SetA64("000111100x1xxxxx010110xxxxxxxxxx", InstEmit.Fmin_S,        typeof(OpCodeSimdReg64));
+            SetA64("0>0011101<1xxxxx111101xxxxxxxxxx", InstEmit.Fmin_V,        typeof(OpCodeSimdReg64));
+            SetA64("000111100x1xxxxx011110xxxxxxxxxx", InstEmit.Fminnm_S,      typeof(OpCodeSimdReg64));
+            SetA64("0>0011101<1xxxxx110001xxxxxxxxxx", InstEmit.Fminnm_V,      typeof(OpCodeSimdReg64));
+            SetA64("0>1011101<1xxxxx111101xxxxxxxxxx", InstEmit.Fminp_V,       typeof(OpCodeSimdReg64));
+            SetA64("010111111xxxxxxx0001x0xxxxxxxxxx", InstEmit.Fmla_Se,       typeof(OpCodeSimdRegElemF64));
+            SetA64("0>0011100<1xxxxx110011xxxxxxxxxx", InstEmit.Fmla_V,        typeof(OpCodeSimdReg64));
+            SetA64("0>0011111<xxxxxx0001x0xxxxxxxxxx", InstEmit.Fmla_Ve,       typeof(OpCodeSimdRegElemF64));
+            SetA64("010111111xxxxxxx0101x0xxxxxxxxxx", InstEmit.Fmls_Se,       typeof(OpCodeSimdRegElemF64));
+            SetA64("0>0011101<1xxxxx110011xxxxxxxxxx", InstEmit.Fmls_V,        typeof(OpCodeSimdReg64));
+            SetA64("0>0011111<xxxxxx0101x0xxxxxxxxxx", InstEmit.Fmls_Ve,       typeof(OpCodeSimdRegElemF64));
+            SetA64("000111100x100000010000xxxxxxxxxx", InstEmit.Fmov_S,        typeof(OpCodeSimd64));
+            SetA64("00011110xx1xxxxxxxx100xxxxxxxxxx", InstEmit.Fmov_Si,       typeof(OpCodeSimdFmov64));
+            SetA64("0xx0111100000xxx111101xxxxxxxxxx", InstEmit.Fmov_V,        typeof(OpCodeSimdImm64));
+            SetA64("x00111100x100110000000xxxxxxxxxx", InstEmit.Fmov_Ftoi,     typeof(OpCodeSimdCvt64));
+            SetA64("x00111100x100111000000xxxxxxxxxx", InstEmit.Fmov_Itof,     typeof(OpCodeSimdCvt64));
+            SetA64("1001111010101110000000xxxxxxxxxx", InstEmit.Fmov_Ftoi1,    typeof(OpCodeSimdCvt64));
+            SetA64("1001111010101111000000xxxxxxxxxx", InstEmit.Fmov_Itof1,    typeof(OpCodeSimdCvt64));
+            SetA64("000111110x0xxxxx1xxxxxxxxxxxxxxx", InstEmit.Fmsub_S,       typeof(OpCodeSimdReg64));
+            SetA64("000111100x1xxxxx000010xxxxxxxxxx", InstEmit.Fmul_S,        typeof(OpCodeSimdReg64));
+            SetA64("010111111xxxxxxx1001x0xxxxxxxxxx", InstEmit.Fmul_Se,       typeof(OpCodeSimdRegElemF64));
+            SetA64("0>1011100<1xxxxx110111xxxxxxxxxx", InstEmit.Fmul_V,        typeof(OpCodeSimdReg64));
+            SetA64("0>0011111<xxxxxx1001x0xxxxxxxxxx", InstEmit.Fmul_Ve,       typeof(OpCodeSimdRegElemF64));
+            SetA64("010111100x1xxxxx110111xxxxxxxxxx", InstEmit.Fmulx_S,       typeof(OpCodeSimdReg64));
+            SetA64("011111111xxxxxxx1001x0xxxxxxxxxx", InstEmit.Fmulx_Se,      typeof(OpCodeSimdRegElemF64));
+            SetA64("0>0011100<1xxxxx110111xxxxxxxxxx", InstEmit.Fmulx_V,       typeof(OpCodeSimdReg64));
+            SetA64("0>1011111<xxxxxx1001x0xxxxxxxxxx", InstEmit.Fmulx_Ve,      typeof(OpCodeSimdRegElemF64));
+            SetA64("000111100x100001010000xxxxxxxxxx", InstEmit.Fneg_S,        typeof(OpCodeSimd64));
+            SetA64("0>1011101<100000111110xxxxxxxxxx", InstEmit.Fneg_V,        typeof(OpCodeSimd64));
+            SetA64("000111110x1xxxxx0xxxxxxxxxxxxxxx", InstEmit.Fnmadd_S,      typeof(OpCodeSimdReg64));
+            SetA64("000111110x1xxxxx1xxxxxxxxxxxxxxx", InstEmit.Fnmsub_S,      typeof(OpCodeSimdReg64));
+            SetA64("000111100x1xxxxx100010xxxxxxxxxx", InstEmit.Fnmul_S,       typeof(OpCodeSimdReg64));
+            SetA64("010111101x100001110110xxxxxxxxxx", InstEmit.Frecpe_S,      typeof(OpCodeSimd64));
+            SetA64("0>0011101<100001110110xxxxxxxxxx", InstEmit.Frecpe_V,      typeof(OpCodeSimd64));
+            SetA64("010111100x1xxxxx111111xxxxxxxxxx", InstEmit.Frecps_S,      typeof(OpCodeSimdReg64));
+            SetA64("0>0011100<1xxxxx111111xxxxxxxxxx", InstEmit.Frecps_V,      typeof(OpCodeSimdReg64));
+            SetA64("010111101x100001111110xxxxxxxxxx", InstEmit.Frecpx_S,      typeof(OpCodeSimd64));
+            SetA64("000111100x100110010000xxxxxxxxxx", InstEmit.Frinta_S,      typeof(OpCodeSimd64));
+            SetA64("0>1011100<100001100010xxxxxxxxxx", InstEmit.Frinta_V,      typeof(OpCodeSimd64));
+            SetA64("000111100x100111110000xxxxxxxxxx", InstEmit.Frinti_S,      typeof(OpCodeSimd64));
+            SetA64("0>1011101<100001100110xxxxxxxxxx", InstEmit.Frinti_V,      typeof(OpCodeSimd64));
+            SetA64("000111100x100101010000xxxxxxxxxx", InstEmit.Frintm_S,      typeof(OpCodeSimd64));
+            SetA64("0>0011100<100001100110xxxxxxxxxx", InstEmit.Frintm_V,      typeof(OpCodeSimd64));
+            SetA64("000111100x100100010000xxxxxxxxxx", InstEmit.Frintn_S,      typeof(OpCodeSimd64));
+            SetA64("0>0011100<100001100010xxxxxxxxxx", InstEmit.Frintn_V,      typeof(OpCodeSimd64));
+            SetA64("000111100x100100110000xxxxxxxxxx", InstEmit.Frintp_S,      typeof(OpCodeSimd64));
+            SetA64("0>0011101<100001100010xxxxxxxxxx", InstEmit.Frintp_V,      typeof(OpCodeSimd64));
+            SetA64("000111100x100111010000xxxxxxxxxx", InstEmit.Frintx_S,      typeof(OpCodeSimd64));
+            SetA64("0>1011100<100001100110xxxxxxxxxx", InstEmit.Frintx_V,      typeof(OpCodeSimd64));
+            SetA64("011111101x100001110110xxxxxxxxxx", InstEmit.Frsqrte_S,     typeof(OpCodeSimd64));
+            SetA64("0>1011101<100001110110xxxxxxxxxx", InstEmit.Frsqrte_V,     typeof(OpCodeSimd64));
+            SetA64("010111101x1xxxxx111111xxxxxxxxxx", InstEmit.Frsqrts_S,     typeof(OpCodeSimdReg64));
+            SetA64("0>0011101<1xxxxx111111xxxxxxxxxx", InstEmit.Frsqrts_V,     typeof(OpCodeSimdReg64));
+            SetA64("000111100x100001110000xxxxxxxxxx", InstEmit.Fsqrt_S,       typeof(OpCodeSimd64));
+            SetA64("0>1011101<100001111110xxxxxxxxxx", InstEmit.Fsqrt_V,       typeof(OpCodeSimd64));
+            SetA64("000111100x1xxxxx001110xxxxxxxxxx", InstEmit.Fsub_S,        typeof(OpCodeSimdReg64));
+            SetA64("0>0011101<1xxxxx110101xxxxxxxxxx", InstEmit.Fsub_V,        typeof(OpCodeSimdReg64));
+            SetA64("01001110000xxxxx000111xxxxxxxxxx", InstEmit.Ins_Gp,        typeof(OpCodeSimdIns64));
+            SetA64("01101110000xxxxx0xxxx1xxxxxxxxxx", InstEmit.Ins_V,         typeof(OpCodeSimdIns64));
+            SetA64("0x00110001000000xxxxxxxxxxxxxxxx", InstEmit.Ld__Vms,       typeof(OpCodeSimdMemMs64));
+            SetA64("0x001100110xxxxxxxxxxxxxxxxxxxxx", InstEmit.Ld__Vms,       typeof(OpCodeSimdMemMs64));
+            SetA64("0x00110101x00000xxxxxxxxxxxxxxxx", InstEmit.Ld__Vss,       typeof(OpCodeSimdMemSs64));
+            SetA64("0x00110111xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Ld__Vss,       typeof(OpCodeSimdMemSs64));
+            SetA64("xx10110xx1xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Ldp,           typeof(OpCodeSimdMemPair64));
+            SetA64("xx111100x10xxxxxxxxx00xxxxxxxxxx", InstEmit.Ldr,           typeof(OpCodeSimdMemImm64));
+            SetA64("xx111100x10xxxxxxxxx01xxxxxxxxxx", InstEmit.Ldr,           typeof(OpCodeSimdMemImm64));
+            SetA64("xx111100x10xxxxxxxxx11xxxxxxxxxx", InstEmit.Ldr,           typeof(OpCodeSimdMemImm64));
+            SetA64("xx111101x1xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Ldr,           typeof(OpCodeSimdMemImm64));
+            SetA64("xx111100x11xxxxxxxxx10xxxxxxxxxx", InstEmit.Ldr,           typeof(OpCodeSimdMemReg64));
+            SetA64("xx011100xxxxxxxxxxxxxxxxxxxxxxxx", InstEmit.LdrLit,        typeof(OpCodeSimdMemLit64));
+            SetA64("0x001110<<1xxxxx100101xxxxxxxxxx", InstEmit.Mla_V,         typeof(OpCodeSimdReg64));
+            SetA64("0x101111xxxxxxxx0000x0xxxxxxxxxx", InstEmit.Mla_Ve,        typeof(OpCodeSimdRegElem64));
+            SetA64("0x101110<<1xxxxx100101xxxxxxxxxx", InstEmit.Mls_V,         typeof(OpCodeSimdReg64));
+            SetA64("0x101111xxxxxxxx0100x0xxxxxxxxxx", InstEmit.Mls_Ve,        typeof(OpCodeSimdRegElem64));
+            SetA64("0x00111100000xxx0xx001xxxxxxxxxx", InstEmit.Movi_V,        typeof(OpCodeSimdImm64));
+            SetA64("0x00111100000xxx10x001xxxxxxxxxx", InstEmit.Movi_V,        typeof(OpCodeSimdImm64));
+            SetA64("0x00111100000xxx110x01xxxxxxxxxx", InstEmit.Movi_V,        typeof(OpCodeSimdImm64));
+            SetA64("0xx0111100000xxx111001xxxxxxxxxx", InstEmit.Movi_V,        typeof(OpCodeSimdImm64));
+            SetA64("0x001110<<1xxxxx100111xxxxxxxxxx", InstEmit.Mul_V,         typeof(OpCodeSimdReg64));
+            SetA64("0x001111xxxxxxxx1000x0xxxxxxxxxx", InstEmit.Mul_Ve,        typeof(OpCodeSimdRegElem64));
+            SetA64("0x10111100000xxx0xx001xxxxxxxxxx", InstEmit.Mvni_V,        typeof(OpCodeSimdImm64));
+            SetA64("0x10111100000xxx10x001xxxxxxxxxx", InstEmit.Mvni_V,        typeof(OpCodeSimdImm64));
+            SetA64("0x10111100000xxx110x01xxxxxxxxxx", InstEmit.Mvni_V,        typeof(OpCodeSimdImm64));
+            SetA64("0111111011100000101110xxxxxxxxxx", InstEmit.Neg_S,         typeof(OpCodeSimd64));
+            SetA64("0>101110<<100000101110xxxxxxxxxx", InstEmit.Neg_V,         typeof(OpCodeSimd64));
+            SetA64("0x10111000100000010110xxxxxxxxxx", InstEmit.Not_V,         typeof(OpCodeSimd64));
+            SetA64("0x001110111xxxxx000111xxxxxxxxxx", InstEmit.Orn_V,         typeof(OpCodeSimdReg64));
+            SetA64("0x001110101xxxxx000111xxxxxxxxxx", InstEmit.Orr_V,         typeof(OpCodeSimdReg64));
+            SetA64("0x00111100000xxx<<x101xxxxxxxxxx", InstEmit.Orr_Vi,        typeof(OpCodeSimdImm64));
+            SetA64("0x101110<<1xxxxx010000xxxxxxxxxx", InstEmit.Raddhn_V,      typeof(OpCodeSimdReg64));
+            SetA64("0x10111001100000010110xxxxxxxxxx", InstEmit.Rbit_V,        typeof(OpCodeSimd64));
+            SetA64("0x00111000100000000110xxxxxxxxxx", InstEmit.Rev16_V,       typeof(OpCodeSimd64));
+            SetA64("0x1011100x100000000010xxxxxxxxxx", InstEmit.Rev32_V,       typeof(OpCodeSimd64));
+            SetA64("0x001110<<100000000010xxxxxxxxxx", InstEmit.Rev64_V,       typeof(OpCodeSimd64));
+            SetA64("0x00111100>>>xxx100011xxxxxxxxxx", InstEmit.Rshrn_V,       typeof(OpCodeSimdShImm64));
+            SetA64("0x101110<<1xxxxx011000xxxxxxxxxx", InstEmit.Rsubhn_V,      typeof(OpCodeSimdReg64));
+            SetA64("0x001110<<1xxxxx011111xxxxxxxxxx", InstEmit.Saba_V,        typeof(OpCodeSimdReg64));
+            SetA64("0x001110<<1xxxxx010100xxxxxxxxxx", InstEmit.Sabal_V,       typeof(OpCodeSimdReg64));
+            SetA64("0x001110<<1xxxxx011101xxxxxxxxxx", InstEmit.Sabd_V,        typeof(OpCodeSimdReg64));
+            SetA64("0x001110<<1xxxxx011100xxxxxxxxxx", InstEmit.Sabdl_V,       typeof(OpCodeSimdReg64));
+            SetA64("0x001110<<100000011010xxxxxxxxxx", InstEmit.Sadalp_V,      typeof(OpCodeSimd64));
+            SetA64("0x001110<<1xxxxx000000xxxxxxxxxx", InstEmit.Saddl_V,       typeof(OpCodeSimdReg64));
+            SetA64("0x001110<<100000001010xxxxxxxxxx", InstEmit.Saddlp_V,      typeof(OpCodeSimd64));
+            SetA64("0x001110<<1xxxxx000100xxxxxxxxxx", InstEmit.Saddw_V,       typeof(OpCodeSimdReg64));
+            SetA64("x0011110xx100010000000xxxxxxxxxx", InstEmit.Scvtf_Gp,      typeof(OpCodeSimdCvt64));
+            SetA64("010111100x100001110110xxxxxxxxxx", InstEmit.Scvtf_S,       typeof(OpCodeSimd64));
+            SetA64("0x0011100x100001110110xxxxxxxxxx", InstEmit.Scvtf_V,       typeof(OpCodeSimd64));
+            SetA64("01011110000xxxxx000000xxxxxxxxxx", InstEmit.Sha1c_V,       typeof(OpCodeSimdReg64));
+            SetA64("0101111000101000000010xxxxxxxxxx", InstEmit.Sha1h_V,       typeof(OpCodeSimd64));
+            SetA64("01011110000xxxxx001000xxxxxxxxxx", InstEmit.Sha1m_V,       typeof(OpCodeSimdReg64));
+            SetA64("01011110000xxxxx000100xxxxxxxxxx", InstEmit.Sha1p_V,       typeof(OpCodeSimdReg64));
+            SetA64("01011110000xxxxx001100xxxxxxxxxx", InstEmit.Sha1su0_V,     typeof(OpCodeSimdReg64));
+            SetA64("0101111000101000000110xxxxxxxxxx", InstEmit.Sha1su1_V,     typeof(OpCodeSimd64));
+            SetA64("01011110000xxxxx010000xxxxxxxxxx", InstEmit.Sha256h_V,     typeof(OpCodeSimdReg64));
+            SetA64("01011110000xxxxx010100xxxxxxxxxx", InstEmit.Sha256h2_V,    typeof(OpCodeSimdReg64));
+            SetA64("0101111000101000001010xxxxxxxxxx", InstEmit.Sha256su0_V,   typeof(OpCodeSimd64));
+            SetA64("01011110000xxxxx011000xxxxxxxxxx", InstEmit.Sha256su1_V,   typeof(OpCodeSimdReg64));
+            SetA64("0x001110<<1xxxxx000001xxxxxxxxxx", InstEmit.Shadd_V,       typeof(OpCodeSimdReg64));
+            SetA64("0101111101xxxxxx010101xxxxxxxxxx", InstEmit.Shl_S,         typeof(OpCodeSimdShImm64));
+            SetA64("0x00111100>>>xxx010101xxxxxxxxxx", InstEmit.Shl_V,         typeof(OpCodeSimdShImm64));
+            SetA64("0100111101xxxxxx010101xxxxxxxxxx", InstEmit.Shl_V,         typeof(OpCodeSimdShImm64));
+            SetA64("0x101110<<100001001110xxxxxxxxxx", InstEmit.Shll_V,        typeof(OpCodeSimd64));
+            SetA64("0x00111100>>>xxx100001xxxxxxxxxx", InstEmit.Shrn_V,        typeof(OpCodeSimdShImm64));
+            SetA64("0x001110<<1xxxxx001001xxxxxxxxxx", InstEmit.Shsub_V,       typeof(OpCodeSimdReg64));
+            SetA64("0x1011110>>>>xxx010101xxxxxxxxxx", InstEmit.Sli_V,         typeof(OpCodeSimdShImm64));
+            SetA64("0x001110<<1xxxxx011001xxxxxxxxxx", InstEmit.Smax_V,        typeof(OpCodeSimdReg64));
+            SetA64("0x001110<<1xxxxx101001xxxxxxxxxx", InstEmit.Smaxp_V,       typeof(OpCodeSimdReg64));
+            SetA64("0x001110<<1xxxxx011011xxxxxxxxxx", InstEmit.Smin_V,        typeof(OpCodeSimdReg64));
+            SetA64("0x001110<<1xxxxx101011xxxxxxxxxx", InstEmit.Sminp_V,       typeof(OpCodeSimdReg64));
+            SetA64("0x001110<<1xxxxx100000xxxxxxxxxx", InstEmit.Smlal_V,       typeof(OpCodeSimdReg64));
+            SetA64("0x001110<<1xxxxx101000xxxxxxxxxx", InstEmit.Smlsl_V,       typeof(OpCodeSimdReg64));
+            SetA64("0x001110000xxxxx001011xxxxxxxxxx", InstEmit.Smov_S,        typeof(OpCodeSimdIns64));
+            SetA64("0x001110<<1xxxxx110000xxxxxxxxxx", InstEmit.Smull_V,       typeof(OpCodeSimdReg64));
+            SetA64("01011110xx100000011110xxxxxxxxxx", InstEmit.Sqabs_S,       typeof(OpCodeSimd64));
+            SetA64("0>001110<<100000011110xxxxxxxxxx", InstEmit.Sqabs_V,       typeof(OpCodeSimd64));
+            SetA64("01011110xx1xxxxx000011xxxxxxxxxx", InstEmit.Sqadd_S,       typeof(OpCodeSimdReg64));
+            SetA64("0>001110<<1xxxxx000011xxxxxxxxxx", InstEmit.Sqadd_V,       typeof(OpCodeSimdReg64));
+            SetA64("01011110011xxxxx101101xxxxxxxxxx", InstEmit.Sqdmulh_S,     typeof(OpCodeSimdReg64));
+            SetA64("01011110101xxxxx101101xxxxxxxxxx", InstEmit.Sqdmulh_S,     typeof(OpCodeSimdReg64));
+            SetA64("0x001110011xxxxx101101xxxxxxxxxx", InstEmit.Sqdmulh_V,     typeof(OpCodeSimdReg64));
+            SetA64("0x001110101xxxxx101101xxxxxxxxxx", InstEmit.Sqdmulh_V,     typeof(OpCodeSimdReg64));
+            SetA64("01111110xx100000011110xxxxxxxxxx", InstEmit.Sqneg_S,       typeof(OpCodeSimd64));
+            SetA64("0>101110<<100000011110xxxxxxxxxx", InstEmit.Sqneg_V,       typeof(OpCodeSimd64));
+            SetA64("01111110011xxxxx101101xxxxxxxxxx", InstEmit.Sqrdmulh_S,    typeof(OpCodeSimdReg64));
+            SetA64("01111110101xxxxx101101xxxxxxxxxx", InstEmit.Sqrdmulh_S,    typeof(OpCodeSimdReg64));
+            SetA64("0x101110011xxxxx101101xxxxxxxxxx", InstEmit.Sqrdmulh_V,    typeof(OpCodeSimdReg64));
+            SetA64("0x101110101xxxxx101101xxxxxxxxxx", InstEmit.Sqrdmulh_V,    typeof(OpCodeSimdReg64));
+            SetA64("0101111100>>>xxx100111xxxxxxxxxx", InstEmit.Sqrshrn_S,     typeof(OpCodeSimdShImm64));
+            SetA64("0x00111100>>>xxx100111xxxxxxxxxx", InstEmit.Sqrshrn_V,     typeof(OpCodeSimdShImm64));
+            SetA64("0111111100>>>xxx100011xxxxxxxxxx", InstEmit.Sqrshrun_S,    typeof(OpCodeSimdShImm64));
+            SetA64("0x10111100>>>xxx100011xxxxxxxxxx", InstEmit.Sqrshrun_V,    typeof(OpCodeSimdShImm64));
+            SetA64("0101111100>>>xxx100101xxxxxxxxxx", InstEmit.Sqshrn_S,      typeof(OpCodeSimdShImm64));
+            SetA64("0x00111100>>>xxx100101xxxxxxxxxx", InstEmit.Sqshrn_V,      typeof(OpCodeSimdShImm64));
+            SetA64("0111111100>>>xxx100001xxxxxxxxxx", InstEmit.Sqshrun_S,     typeof(OpCodeSimdShImm64));
+            SetA64("0x10111100>>>xxx100001xxxxxxxxxx", InstEmit.Sqshrun_V,     typeof(OpCodeSimdShImm64));
+            SetA64("01011110xx1xxxxx001011xxxxxxxxxx", InstEmit.Sqsub_S,       typeof(OpCodeSimdReg64));
+            SetA64("0>001110<<1xxxxx001011xxxxxxxxxx", InstEmit.Sqsub_V,       typeof(OpCodeSimdReg64));
+            SetA64("01011110<<100001010010xxxxxxxxxx", InstEmit.Sqxtn_S,       typeof(OpCodeSimd64));
+            SetA64("0x001110<<100001010010xxxxxxxxxx", InstEmit.Sqxtn_V,       typeof(OpCodeSimd64));
+            SetA64("01111110<<100001001010xxxxxxxxxx", InstEmit.Sqxtun_S,      typeof(OpCodeSimd64));
+            SetA64("0x101110<<100001001010xxxxxxxxxx", InstEmit.Sqxtun_V,      typeof(OpCodeSimd64));
+            SetA64("0x001110<<1xxxxx000101xxxxxxxxxx", InstEmit.Srhadd_V,      typeof(OpCodeSimdReg64));
+            SetA64("0101111101xxxxxx001001xxxxxxxxxx", InstEmit.Srshr_S,       typeof(OpCodeSimdShImm64));
+            SetA64("0x00111100>>>xxx001001xxxxxxxxxx", InstEmit.Srshr_V,       typeof(OpCodeSimdShImm64));
+            SetA64("0100111101xxxxxx001001xxxxxxxxxx", InstEmit.Srshr_V,       typeof(OpCodeSimdShImm64));
+            SetA64("0101111101xxxxxx001101xxxxxxxxxx", InstEmit.Srsra_S,       typeof(OpCodeSimdShImm64));
+            SetA64("0x00111100>>>xxx001101xxxxxxxxxx", InstEmit.Srsra_V,       typeof(OpCodeSimdShImm64));
+            SetA64("0100111101xxxxxx001101xxxxxxxxxx", InstEmit.Srsra_V,       typeof(OpCodeSimdShImm64));
+            SetA64("0>001110<<1xxxxx010001xxxxxxxxxx", InstEmit.Sshl_V,        typeof(OpCodeSimdReg64));
+            SetA64("0x00111100>>>xxx101001xxxxxxxxxx", InstEmit.Sshll_V,       typeof(OpCodeSimdShImm64));
+            SetA64("0101111101xxxxxx000001xxxxxxxxxx", InstEmit.Sshr_S,        typeof(OpCodeSimdShImm64));
+            SetA64("0x00111100>>>xxx000001xxxxxxxxxx", InstEmit.Sshr_V,        typeof(OpCodeSimdShImm64));
+            SetA64("0100111101xxxxxx000001xxxxxxxxxx", InstEmit.Sshr_V,        typeof(OpCodeSimdShImm64));
+            SetA64("0101111101xxxxxx000101xxxxxxxxxx", InstEmit.Ssra_S,        typeof(OpCodeSimdShImm64));
+            SetA64("0x00111100>>>xxx000101xxxxxxxxxx", InstEmit.Ssra_V,        typeof(OpCodeSimdShImm64));
+            SetA64("0100111101xxxxxx000101xxxxxxxxxx", InstEmit.Ssra_V,        typeof(OpCodeSimdShImm64));
+            SetA64("0x001110<<1xxxxx001000xxxxxxxxxx", InstEmit.Ssubl_V,       typeof(OpCodeSimdReg64));
+            SetA64("0x001110<<1xxxxx001100xxxxxxxxxx", InstEmit.Ssubw_V,       typeof(OpCodeSimdReg64));
+            SetA64("0x00110000000000xxxxxxxxxxxxxxxx", InstEmit.St__Vms,       typeof(OpCodeSimdMemMs64));
+            SetA64("0x001100100xxxxxxxxxxxxxxxxxxxxx", InstEmit.St__Vms,       typeof(OpCodeSimdMemMs64));
+            SetA64("0x00110100x00000xxxxxxxxxxxxxxxx", InstEmit.St__Vss,       typeof(OpCodeSimdMemSs64));
+            SetA64("0x00110110xxxxxxxxxxxxxxxxxxxxxx", InstEmit.St__Vss,       typeof(OpCodeSimdMemSs64));
+            SetA64("xx10110xx0xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Stp,           typeof(OpCodeSimdMemPair64));
+            SetA64("xx111100x00xxxxxxxxx00xxxxxxxxxx", InstEmit.Str,           typeof(OpCodeSimdMemImm64));
+            SetA64("xx111100x00xxxxxxxxx01xxxxxxxxxx", InstEmit.Str,           typeof(OpCodeSimdMemImm64));
+            SetA64("xx111100x00xxxxxxxxx11xxxxxxxxxx", InstEmit.Str,           typeof(OpCodeSimdMemImm64));
+            SetA64("xx111101x0xxxxxxxxxxxxxxxxxxxxxx", InstEmit.Str,           typeof(OpCodeSimdMemImm64));
+            SetA64("xx111100x01xxxxxxxxx10xxxxxxxxxx", InstEmit.Str,           typeof(OpCodeSimdMemReg64));
+            SetA64("01111110111xxxxx100001xxxxxxxxxx", InstEmit.Sub_S,         typeof(OpCodeSimdReg64));
+            SetA64("0>101110<<1xxxxx100001xxxxxxxxxx", InstEmit.Sub_V,         typeof(OpCodeSimdReg64));
+            SetA64("0x001110<<1xxxxx011000xxxxxxxxxx", InstEmit.Subhn_V,       typeof(OpCodeSimdReg64));
+            SetA64("01011110xx100000001110xxxxxxxxxx", InstEmit.Suqadd_S,      typeof(OpCodeSimd64));
+            SetA64("0>001110<<100000001110xxxxxxxxxx", InstEmit.Suqadd_V,      typeof(OpCodeSimd64));
+            SetA64("0x001110000xxxxx0xx000xxxxxxxxxx", InstEmit.Tbl_V,         typeof(OpCodeSimdTbl64));
+            SetA64("0>001110<<0xxxxx001010xxxxxxxxxx", InstEmit.Trn1_V,        typeof(OpCodeSimdReg64));
+            SetA64("0>001110<<0xxxxx011010xxxxxxxxxx", InstEmit.Trn2_V,        typeof(OpCodeSimdReg64));
+            SetA64("0x101110<<1xxxxx011111xxxxxxxxxx", InstEmit.Uaba_V,        typeof(OpCodeSimdReg64));
+            SetA64("0x101110<<1xxxxx010100xxxxxxxxxx", InstEmit.Uabal_V,       typeof(OpCodeSimdReg64));
+            SetA64("0x101110<<1xxxxx011101xxxxxxxxxx", InstEmit.Uabd_V,        typeof(OpCodeSimdReg64));
+            SetA64("0x101110<<1xxxxx011100xxxxxxxxxx", InstEmit.Uabdl_V,       typeof(OpCodeSimdReg64));
+            SetA64("0x101110<<100000011010xxxxxxxxxx", InstEmit.Uadalp_V,      typeof(OpCodeSimd64));
+            SetA64("0x101110<<1xxxxx000000xxxxxxxxxx", InstEmit.Uaddl_V,       typeof(OpCodeSimdReg64));
+            SetA64("0x101110<<100000001010xxxxxxxxxx", InstEmit.Uaddlp_V,      typeof(OpCodeSimd64));
+            SetA64("001011100x110000001110xxxxxxxxxx", InstEmit.Uaddlv_V,      typeof(OpCodeSimd64));
+            SetA64("01101110<<110000001110xxxxxxxxxx", InstEmit.Uaddlv_V,      typeof(OpCodeSimd64));
+            SetA64("0x101110<<1xxxxx000100xxxxxxxxxx", InstEmit.Uaddw_V,       typeof(OpCodeSimdReg64));
+            SetA64("x0011110xx100011000000xxxxxxxxxx", InstEmit.Ucvtf_Gp,      typeof(OpCodeSimdCvt64));
+            SetA64("011111100x100001110110xxxxxxxxxx", InstEmit.Ucvtf_S,       typeof(OpCodeSimd64));
+            SetA64("0x1011100x100001110110xxxxxxxxxx", InstEmit.Ucvtf_V,       typeof(OpCodeSimd64));
+            SetA64("0x101110<<1xxxxx000001xxxxxxxxxx", InstEmit.Uhadd_V,       typeof(OpCodeSimdReg64));
+            SetA64("0x101110<<1xxxxx001001xxxxxxxxxx", InstEmit.Uhsub_V,       typeof(OpCodeSimdReg64));
+            SetA64("0x101110<<1xxxxx011001xxxxxxxxxx", InstEmit.Umax_V,        typeof(OpCodeSimdReg64));
+            SetA64("0x101110<<1xxxxx101001xxxxxxxxxx", InstEmit.Umaxp_V,       typeof(OpCodeSimdReg64));
+            SetA64("0x101110<<1xxxxx011011xxxxxxxxxx", InstEmit.Umin_V,        typeof(OpCodeSimdReg64));
+            SetA64("0x101110<<1xxxxx101011xxxxxxxxxx", InstEmit.Uminp_V,       typeof(OpCodeSimdReg64));
+            SetA64("0x101110<<1xxxxx100000xxxxxxxxxx", InstEmit.Umlal_V,       typeof(OpCodeSimdReg64));
+            SetA64("0x101110<<1xxxxx101000xxxxxxxxxx", InstEmit.Umlsl_V,       typeof(OpCodeSimdReg64));
+            SetA64("0x001110000xxxxx001111xxxxxxxxxx", InstEmit.Umov_S,        typeof(OpCodeSimdIns64));
+            SetA64("0x101110<<1xxxxx110000xxxxxxxxxx", InstEmit.Umull_V,       typeof(OpCodeSimdReg64));
+            SetA64("01111110xx1xxxxx000011xxxxxxxxxx", InstEmit.Uqadd_S,       typeof(OpCodeSimdReg64));
+            SetA64("0>101110<<1xxxxx000011xxxxxxxxxx", InstEmit.Uqadd_V,       typeof(OpCodeSimdReg64));
+            SetA64("0111111100>>>xxx100111xxxxxxxxxx", InstEmit.Uqrshrn_S,     typeof(OpCodeSimdShImm64));
+            SetA64("0x10111100>>>xxx100111xxxxxxxxxx", InstEmit.Uqrshrn_V,     typeof(OpCodeSimdShImm64));
+            SetA64("0111111100>>>xxx100101xxxxxxxxxx", InstEmit.Uqshrn_S,      typeof(OpCodeSimdShImm64));
+            SetA64("0x10111100>>>xxx100101xxxxxxxxxx", InstEmit.Uqshrn_V,      typeof(OpCodeSimdShImm64));
+            SetA64("01111110xx1xxxxx001011xxxxxxxxxx", InstEmit.Uqsub_S,       typeof(OpCodeSimdReg64));
+            SetA64("0>101110<<1xxxxx001011xxxxxxxxxx", InstEmit.Uqsub_V,       typeof(OpCodeSimdReg64));
+            SetA64("01111110<<100001010010xxxxxxxxxx", InstEmit.Uqxtn_S,       typeof(OpCodeSimd64));
+            SetA64("0x101110<<100001010010xxxxxxxxxx", InstEmit.Uqxtn_V,       typeof(OpCodeSimd64));
+            SetA64("0x101110<<1xxxxx000101xxxxxxxxxx", InstEmit.Urhadd_V,      typeof(OpCodeSimdReg64));
+            SetA64("0111111101xxxxxx001001xxxxxxxxxx", InstEmit.Urshr_S,       typeof(OpCodeSimdShImm64));
+            SetA64("0x10111100>>>xxx001001xxxxxxxxxx", InstEmit.Urshr_V,       typeof(OpCodeSimdShImm64));
+            SetA64("0110111101xxxxxx001001xxxxxxxxxx", InstEmit.Urshr_V,       typeof(OpCodeSimdShImm64));
+            SetA64("0111111101xxxxxx001101xxxxxxxxxx", InstEmit.Ursra_S,       typeof(OpCodeSimdShImm64));
+            SetA64("0x10111100>>>xxx001101xxxxxxxxxx", InstEmit.Ursra_V,       typeof(OpCodeSimdShImm64));
+            SetA64("0110111101xxxxxx001101xxxxxxxxxx", InstEmit.Ursra_V,       typeof(OpCodeSimdShImm64));
+            SetA64("0>101110<<1xxxxx010001xxxxxxxxxx", InstEmit.Ushl_V,        typeof(OpCodeSimdReg64));
+            SetA64("0x10111100>>>xxx101001xxxxxxxxxx", InstEmit.Ushll_V,       typeof(OpCodeSimdShImm64));
+            SetA64("0111111101xxxxxx000001xxxxxxxxxx", InstEmit.Ushr_S,        typeof(OpCodeSimdShImm64));
+            SetA64("0x10111100>>>xxx000001xxxxxxxxxx", InstEmit.Ushr_V,        typeof(OpCodeSimdShImm64));
+            SetA64("0110111101xxxxxx000001xxxxxxxxxx", InstEmit.Ushr_V,        typeof(OpCodeSimdShImm64));
+            SetA64("01111110xx100000001110xxxxxxxxxx", InstEmit.Usqadd_S,      typeof(OpCodeSimd64));
+            SetA64("0>101110<<100000001110xxxxxxxxxx", InstEmit.Usqadd_V,      typeof(OpCodeSimd64));
+            SetA64("0111111101xxxxxx000101xxxxxxxxxx", InstEmit.Usra_S,        typeof(OpCodeSimdShImm64));
+            SetA64("0x10111100>>>xxx000101xxxxxxxxxx", InstEmit.Usra_V,        typeof(OpCodeSimdShImm64));
+            SetA64("0110111101xxxxxx000101xxxxxxxxxx", InstEmit.Usra_V,        typeof(OpCodeSimdShImm64));
+            SetA64("0x101110<<1xxxxx001000xxxxxxxxxx", InstEmit.Usubl_V,       typeof(OpCodeSimdReg64));
+            SetA64("0x101110<<1xxxxx001100xxxxxxxxxx", InstEmit.Usubw_V,       typeof(OpCodeSimdReg64));
+            SetA64("0>001110<<0xxxxx000110xxxxxxxxxx", InstEmit.Uzp1_V,        typeof(OpCodeSimdReg64));
+            SetA64("0>001110<<0xxxxx010110xxxxxxxxxx", InstEmit.Uzp2_V,        typeof(OpCodeSimdReg64));
+            SetA64("0x001110<<100001001010xxxxxxxxxx", InstEmit.Xtn_V,         typeof(OpCodeSimd64));
+            SetA64("0>001110<<0xxxxx001110xxxxxxxxxx", InstEmit.Zip1_V,        typeof(OpCodeSimdReg64));
+            SetA64("0>001110<<0xxxxx011110xxxxxxxxxx", InstEmit.Zip2_V,        typeof(OpCodeSimdReg64));
 #endregion
 
 #region "Generate InstA64FastLookup Table (AArch64)"
diff --git a/ChocolArm64/Translation/ILEmitterCtx.cs b/ChocolArm64/Translation/ILEmitterCtx.cs
index a2bd0c172a..c8c1230642 100644
--- a/ChocolArm64/Translation/ILEmitterCtx.cs
+++ b/ChocolArm64/Translation/ILEmitterCtx.cs
@@ -17,17 +17,17 @@ namespace ChocolArm64.Translation
         private int _blkIndex;
         private int _opcIndex;
 
-        private Block[] _graph;
-        private Block   _root;
-        public  Block   CurrBlock => _graph[_blkIndex];
-        public  AOpCode  CurrOp    => _graph[_blkIndex].OpCodes[_opcIndex];
+        private Block[]   _graph;
+        private Block     _root;
+        public  Block     CurrBlock => _graph[_blkIndex];
+        public  OpCode64 CurrOp    => _graph[_blkIndex].OpCodes[_opcIndex];
 
         private ILEmitter _emitter;
 
         private ILBlock _ilBlock;
 
-        private AOpCode _optOpLastCompare;
-        private AOpCode _optOpLastFlagSet;
+        private OpCode64 _optOpLastCompare;
+        private OpCode64 _optOpLastFlagSet;
 
         //This is the index of the temporary register, used to store temporary
         //values needed by some functions, since IL doesn't have a swap instruction.
@@ -138,7 +138,7 @@ namespace ChocolArm64.Translation
                 return false;
             }
 
-            if (!_cache.TryGetSubroutine(((OpCodeBImmAl)CurrOp).Imm, out TranslatedSub subroutine))
+            if (!_cache.TryGetSubroutine(((OpCodeBImmAl64)CurrOp).Imm, out TranslatedSub subroutine))
             {
                 return false;
             }
diff --git a/ChocolArm64/Translator.cs b/ChocolArm64/Translator.cs
index 177874c47e..3bf06dc469 100644
--- a/ChocolArm64/Translator.cs
+++ b/ChocolArm64/Translator.cs
@@ -43,7 +43,7 @@ namespace ChocolArm64
         {
             do
             {
-                AOpCode opCode = Decoder.DecodeOpCode(state, memory, state.R15);
+                OpCode64 opCode = Decoder.DecodeOpCode(state, memory, state.R15);
 
                 opCode.Interpreter(state, memory, opCode);
             }
@@ -101,7 +101,7 @@ namespace ChocolArm64
 
             _cache.AddOrUpdate(position, subroutine, block.OpCodes.Count);
 
-            AOpCode lastOp = block.GetLastOp();
+            OpCode64 lastOp = block.GetLastOp();
 
             return subroutine;
         }