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Fix types, etc

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This commit is contained in:
gdkchan 2019-08-04 11:23:32 -03:00
parent cccf235b13
commit e04798294a
3 changed files with 44 additions and 44 deletions
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20
ARMeilleure/Diagnostics/IRDumper.cs
View file

@ -8,7 +8,7 @@ namespace ARMeilleure.Diagnostics
{
static class IRDumper
{
private const string Identation = " ";
private const string Indentation = " ";
public static string GetDump(ControlFlowGraph cfg)
{
@ -16,24 +16,24 @@ namespace ARMeilleure.Diagnostics
Dictionary<Operand, string> localNames = new Dictionary<Operand, string>();
string identation = string.Empty;
string indentation = string.Empty;
void IncreaseIdentation()
void IncreaseIndentation()
{
identation += Identation;
indentation += Indentation;
}
void DecreaseIdentation()
void DecreaseIndentation()
{
identation = identation.Substring(0, identation.Length - Identation.Length);
indentation = indentation.Substring(0, indentation.Length - Indentation.Length);
}
void AppendLine(string text)
{
sb.AppendLine(identation + text);
sb.AppendLine(indentation + text);
}
IncreaseIdentation();
IncreaseIndentation();
foreach (BasicBlock block in cfg.Blocks)
{
@ -53,7 +53,7 @@ namespace ARMeilleure.Diagnostics
AppendLine(blockName);
IncreaseIdentation();
IncreaseIndentation();
foreach (Node node in block.Operations)
{
@ -96,7 +96,7 @@ namespace ARMeilleure.Diagnostics
AppendLine(line);
}
DecreaseIdentation();
DecreaseIndentation();
}
return sb.ToString();

8
ChocolArm64/Instructions/InstEmitSystem.cs
View file

@ -31,8 +31,8 @@ namespace ChocolArm64.Instructions
{
case 0b11_011_0000_0000_001: propName = nameof(CpuThreadState.CtrEl0); break;
case 0b11_011_0000_0000_111: propName = nameof(CpuThreadState.DczidEl0); break;
case 0b11_011_0100_0100_000: propName = nameof(CpuThreadState.CFpcr); break;
case 0b11_011_0100_0100_001: propName = nameof(CpuThreadState.CFpsr); break;
case 0b11_011_0100_0100_000: propName = nameof(CpuThreadState.CFpcr); break;
case 0b11_011_0100_0100_001: propName = nameof(CpuThreadState.CFpsr); break;
case 0b11_011_1101_0000_010: propName = nameof(CpuThreadState.TpidrEl0); break;
case 0b11_011_1101_0000_011: propName = nameof(CpuThreadState.Tpidr); break;
case 0b11_011_1110_0000_000: propName = nameof(CpuThreadState.CntfrqEl0); break;
@ -65,8 +65,8 @@ namespace ChocolArm64.Instructions
switch (GetPackedId(op))
{
case 0b11_011_0100_0100_000: propName = nameof(CpuThreadState.CFpcr); break;
case 0b11_011_0100_0100_001: propName = nameof(CpuThreadState.CFpsr); break;
case 0b11_011_0100_0100_000: propName = nameof(CpuThreadState.CFpcr); break;
case 0b11_011_0100_0100_001: propName = nameof(CpuThreadState.CFpsr); break;
case 0b11_011_1101_0000_010: propName = nameof(CpuThreadState.TpidrEl0); break;
default: throw new NotImplementedException($"Unknown MSR at {op.Position:x16}");

60
ChocolArm64/State/CpuThreadState.cs
View file

@ -170,16 +170,16 @@ namespace ChocolArm64.State
{
switch (index)
{
case 0: return X0;
case 1: return X1;
case 2: return X2;
case 3: return X3;
case 4: return X4;
case 5: return X5;
case 6: return X6;
case 7: return X7;
case 8: return X8;
case 9: return X9;
case 0: return X0;
case 1: return X1;
case 2: return X2;
case 3: return X3;
case 4: return X4;
case 5: return X5;
case 6: return X6;
case 7: return X7;
case 8: return X8;
case 9: return X9;
case 10: return X10;
case 11: return X11;
case 12: return X12;
@ -211,16 +211,16 @@ namespace ChocolArm64.State
{
switch (index)
{
case 0: X0 = value; break;
case 1: X1 = value; break;
case 2: X2 = value; break;
case 3: X3 = value; break;
case 4: X4 = value; break;
case 5: X5 = value; break;
case 6: X6 = value; break;
case 7: X7 = value; break;
case 8: X8 = value; break;
case 9: X9 = value; break;
case 0: X0 = value; break;
case 1: X1 = value; break;
case 2: X2 = value; break;
case 3: X3 = value; break;
case 4: X4 = value; break;
case 5: X5 = value; break;
case 6: X6 = value; break;
case 7: X7 = value; break;
case 8: X8 = value; break;
case 9: X9 = value; break;
case 10: X10 = value; break;
case 11: X11 = value; break;
case 12: X12 = value; break;
@ -252,16 +252,16 @@ namespace ChocolArm64.State
{
switch (index)
{
case 0: return new ARMeilleure.State.V128(VectorExtractIntZx(V0, 0, 3), VectorExtractIntZx(V0, 1, 3));
case 1: return new ARMeilleure.State.V128(VectorExtractIntZx(V1, 0, 3), VectorExtractIntZx(V1, 1, 3));
case 2: return new ARMeilleure.State.V128(VectorExtractIntZx(V2, 0, 3), VectorExtractIntZx(V2, 1, 3));
case 3: return new ARMeilleure.State.V128(VectorExtractIntZx(V3, 0, 3), VectorExtractIntZx(V3, 1, 3));
case 4: return new ARMeilleure.State.V128(VectorExtractIntZx(V4, 0, 3), VectorExtractIntZx(V4, 1, 3));
case 5: return new ARMeilleure.State.V128(VectorExtractIntZx(V5, 0, 3), VectorExtractIntZx(V5, 1, 3));
case 6: return new ARMeilleure.State.V128(VectorExtractIntZx(V6, 0, 3), VectorExtractIntZx(V6, 1, 3));
case 7: return new ARMeilleure.State.V128(VectorExtractIntZx(V7, 0, 3), VectorExtractIntZx(V7, 1, 3));
case 8: return new ARMeilleure.State.V128(VectorExtractIntZx(V8, 0, 3), VectorExtractIntZx(V8, 1, 3));
case 9: return new ARMeilleure.State.V128(VectorExtractIntZx(V9, 0, 3), VectorExtractIntZx(V9, 1, 3));
case 0: return new ARMeilleure.State.V128(VectorExtractIntZx(V0, 0, 3), VectorExtractIntZx(V0, 1, 3));
case 1: return new ARMeilleure.State.V128(VectorExtractIntZx(V1, 0, 3), VectorExtractIntZx(V1, 1, 3));
case 2: return new ARMeilleure.State.V128(VectorExtractIntZx(V2, 0, 3), VectorExtractIntZx(V2, 1, 3));
case 3: return new ARMeilleure.State.V128(VectorExtractIntZx(V3, 0, 3), VectorExtractIntZx(V3, 1, 3));
case 4: return new ARMeilleure.State.V128(VectorExtractIntZx(V4, 0, 3), VectorExtractIntZx(V4, 1, 3));
case 5: return new ARMeilleure.State.V128(VectorExtractIntZx(V5, 0, 3), VectorExtractIntZx(V5, 1, 3));
case 6: return new ARMeilleure.State.V128(VectorExtractIntZx(V6, 0, 3), VectorExtractIntZx(V6, 1, 3));
case 7: return new ARMeilleure.State.V128(VectorExtractIntZx(V7, 0, 3), VectorExtractIntZx(V7, 1, 3));
case 8: return new ARMeilleure.State.V128(VectorExtractIntZx(V8, 0, 3), VectorExtractIntZx(V8, 1, 3));
case 9: return new ARMeilleure.State.V128(VectorExtractIntZx(V9, 0, 3), VectorExtractIntZx(V9, 1, 3));
case 10: return new ARMeilleure.State.V128(VectorExtractIntZx(V10, 0, 3), VectorExtractIntZx(V10, 1, 3));
case 11: return new ARMeilleure.State.V128(VectorExtractIntZx(V11, 0, 3), VectorExtractIntZx(V11, 1, 3));
case 12: return new ARMeilleure.State.V128(VectorExtractIntZx(V12, 0, 3), VectorExtractIntZx(V12, 1, 3));