Update CpuTestSimdReg.cs
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1 changed files with 70 additions and 28 deletions
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@ -1168,11 +1168,14 @@ namespace Ryujinx.Tests.Cpu
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Vector128<float> V1 = MakeVectorE0(A);
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Vector128<float> V2 = MakeVectorE0(B);
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int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN);
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int Rnd = (int)TestContext.CurrentContext.Random.NextUInt();
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int Fpcr = Rnd & (1 << (int)FPCR.FZ);
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Fpcr |= Rnd & (1 << (int)FPCR.DN);
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CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2, Fpcr: Fpcr);
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CompareAgainstUnicorn(FpsrMask: FPSR.IOC | FPSR.DZC);
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CompareAgainstUnicorn(FpsrMask: FPSR.IOC | FPSR.DZC | FPSR.IDC);
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}
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[Test, Pairwise] [Explicit]
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@ -1185,11 +1188,14 @@ namespace Ryujinx.Tests.Cpu
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Vector128<float> V1 = MakeVectorE0(A);
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Vector128<float> V2 = MakeVectorE0(B);
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int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN);
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int Rnd = (int)TestContext.CurrentContext.Random.NextUInt();
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int Fpcr = Rnd & (1 << (int)FPCR.FZ);
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Fpcr |= Rnd & (1 << (int)FPCR.DN);
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CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2, Fpcr: Fpcr);
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CompareAgainstUnicorn(FpsrMask: FPSR.IOC | FPSR.DZC);
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CompareAgainstUnicorn(FpsrMask: FPSR.IOC | FPSR.DZC | FPSR.IDC);
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}
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[Test, Pairwise] [Explicit]
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@ -1209,11 +1215,14 @@ namespace Ryujinx.Tests.Cpu
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Vector128<float> V1 = MakeVectorE0E1(A, A * Q);
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Vector128<float> V2 = MakeVectorE0E1(B, B * Q);
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int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN);
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int Rnd = (int)TestContext.CurrentContext.Random.NextUInt();
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int Fpcr = Rnd & (1 << (int)FPCR.FZ);
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Fpcr |= Rnd & (1 << (int)FPCR.DN);
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CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2, Fpcr: Fpcr);
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CompareAgainstUnicorn(FpsrMask: FPSR.IOC | FPSR.DZC);
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CompareAgainstUnicorn(FpsrMask: FPSR.IOC | FPSR.DZC | FPSR.IDC);
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}
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[Test, Pairwise] [Explicit]
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@ -1231,11 +1240,14 @@ namespace Ryujinx.Tests.Cpu
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Vector128<float> V1 = MakeVectorE0E1(A, A);
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Vector128<float> V2 = MakeVectorE0E1(B, B);
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int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN);
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int Rnd = (int)TestContext.CurrentContext.Random.NextUInt();
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int Fpcr = Rnd & (1 << (int)FPCR.FZ);
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Fpcr |= Rnd & (1 << (int)FPCR.DN);
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CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2, Fpcr: Fpcr);
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CompareAgainstUnicorn(FpsrMask: FPSR.IOC | FPSR.DZC);
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CompareAgainstUnicorn(FpsrMask: FPSR.IOC | FPSR.DZC | FPSR.IDC);
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}
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[Test, Pairwise] [Explicit] // Fused.
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@ -1250,11 +1262,14 @@ namespace Ryujinx.Tests.Cpu
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Vector128<float> V2 = MakeVectorE0(B);
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Vector128<float> V3 = MakeVectorE0(C);
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int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN);
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int Rnd = (int)TestContext.CurrentContext.Random.NextUInt();
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int Fpcr = Rnd & (1 << (int)FPCR.FZ);
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Fpcr |= Rnd & (1 << (int)FPCR.DN);
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CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2, V3: V3, Fpcr: Fpcr);
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CompareAgainstUnicorn(FPSR.IOC, FpSkips.IfUnderflow, FpTolerances.UpToOneUlps_S);
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CompareAgainstUnicorn(FPSR.IOC | FPSR.IDC, FpSkips.IfUnderflow, FpTolerances.UpToOneUlps_S);
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}
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[Test, Pairwise] [Explicit] // Fused.
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@ -1269,11 +1284,14 @@ namespace Ryujinx.Tests.Cpu
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Vector128<float> V2 = MakeVectorE0(B);
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Vector128<float> V3 = MakeVectorE0(C);
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int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN);
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int Rnd = (int)TestContext.CurrentContext.Random.NextUInt();
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int Fpcr = Rnd & (1 << (int)FPCR.FZ);
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Fpcr |= Rnd & (1 << (int)FPCR.DN);
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CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2, V3: V3, Fpcr: Fpcr);
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CompareAgainstUnicorn(FPSR.IOC, FpSkips.IfUnderflow, FpTolerances.UpToOneUlps_D);
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CompareAgainstUnicorn(FPSR.IOC | FPSR.IDC, FpSkips.IfUnderflow, FpTolerances.UpToOneUlps_D);
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}
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[Test, Pairwise] [Explicit]
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@ -1286,11 +1304,14 @@ namespace Ryujinx.Tests.Cpu
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Vector128<float> V1 = MakeVectorE0(A);
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Vector128<float> V2 = MakeVectorE0(B);
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int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN);
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int Rnd = (int)TestContext.CurrentContext.Random.NextUInt();
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int Fpcr = Rnd & (1 << (int)FPCR.FZ);
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Fpcr |= Rnd & (1 << (int)FPCR.DN);
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CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2, Fpcr: Fpcr);
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CompareAgainstUnicorn(FpsrMask: FPSR.IOC);
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CompareAgainstUnicorn(FpsrMask: FPSR.IOC | FPSR.IDC);
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}
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[Test, Pairwise] [Explicit]
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@ -1303,11 +1324,14 @@ namespace Ryujinx.Tests.Cpu
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Vector128<float> V1 = MakeVectorE0(A);
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Vector128<float> V2 = MakeVectorE0(B);
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int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN);
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int Rnd = (int)TestContext.CurrentContext.Random.NextUInt();
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int Fpcr = Rnd & (1 << (int)FPCR.FZ);
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Fpcr |= Rnd & (1 << (int)FPCR.DN);
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CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2, Fpcr: Fpcr);
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CompareAgainstUnicorn(FpsrMask: FPSR.IOC);
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CompareAgainstUnicorn(FpsrMask: FPSR.IOC | FPSR.IDC);
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}
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[Test, Pairwise] [Explicit]
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@ -1327,11 +1351,14 @@ namespace Ryujinx.Tests.Cpu
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Vector128<float> V1 = MakeVectorE0E1(A, A * Q);
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Vector128<float> V2 = MakeVectorE0E1(B, B * Q);
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int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN);
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int Rnd = (int)TestContext.CurrentContext.Random.NextUInt();
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int Fpcr = Rnd & (1 << (int)FPCR.FZ);
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Fpcr |= Rnd & (1 << (int)FPCR.DN);
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CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2, Fpcr: Fpcr);
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CompareAgainstUnicorn(FpsrMask: FPSR.IOC);
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CompareAgainstUnicorn(FpsrMask: FPSR.IOC | FPSR.IDC);
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}
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[Test, Pairwise] [Explicit]
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@ -1349,11 +1376,14 @@ namespace Ryujinx.Tests.Cpu
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Vector128<float> V1 = MakeVectorE0E1(A, A);
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Vector128<float> V2 = MakeVectorE0E1(B, B);
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int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN);
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int Rnd = (int)TestContext.CurrentContext.Random.NextUInt();
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int Fpcr = Rnd & (1 << (int)FPCR.FZ);
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Fpcr |= Rnd & (1 << (int)FPCR.DN);
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CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2, Fpcr: Fpcr);
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CompareAgainstUnicorn(FpsrMask: FPSR.IOC);
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CompareAgainstUnicorn(FpsrMask: FPSR.IOC | FPSR.IDC);
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}
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[Test, Pairwise] [Explicit] // Fused.
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@ -1366,11 +1396,14 @@ namespace Ryujinx.Tests.Cpu
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Vector128<float> V1 = MakeVectorE0(A);
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Vector128<float> V2 = MakeVectorE0(B);
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int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN);
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int Rnd = (int)TestContext.CurrentContext.Random.NextUInt();
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int Fpcr = Rnd & (1 << (int)FPCR.FZ);
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Fpcr |= Rnd & (1 << (int)FPCR.DN);
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CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2, Fpcr: Fpcr);
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CompareAgainstUnicorn(FPSR.IOC, FpSkips.IfUnderflow, FpTolerances.UpToOneUlps_S);
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CompareAgainstUnicorn(FPSR.IOC | FPSR.IDC, FpSkips.IfUnderflow, FpTolerances.UpToOneUlps_S);
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}
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[Test, Pairwise] [Explicit] // Fused.
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@ -1383,11 +1416,14 @@ namespace Ryujinx.Tests.Cpu
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Vector128<float> V1 = MakeVectorE0(A);
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Vector128<float> V2 = MakeVectorE0(B);
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int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN);
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int Rnd = (int)TestContext.CurrentContext.Random.NextUInt();
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int Fpcr = Rnd & (1 << (int)FPCR.FZ);
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Fpcr |= Rnd & (1 << (int)FPCR.DN);
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CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2, Fpcr: Fpcr);
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CompareAgainstUnicorn(FPSR.IOC, FpSkips.IfUnderflow, FpTolerances.UpToOneUlps_D);
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CompareAgainstUnicorn(FPSR.IOC | FPSR.IDC, FpSkips.IfUnderflow, FpTolerances.UpToOneUlps_D);
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}
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[Test, Pairwise] [Explicit] // Fused.
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@ -1407,11 +1443,14 @@ namespace Ryujinx.Tests.Cpu
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Vector128<float> V1 = MakeVectorE0E1(A, A * Q);
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Vector128<float> V2 = MakeVectorE0E1(B, B * Q);
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int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN);
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int Rnd = (int)TestContext.CurrentContext.Random.NextUInt();
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int Fpcr = Rnd & (1 << (int)FPCR.FZ);
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Fpcr |= Rnd & (1 << (int)FPCR.DN);
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CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2, Fpcr: Fpcr);
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CompareAgainstUnicorn(FPSR.IOC, FpSkips.IfUnderflow, FpTolerances.UpToOneUlps_S);
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CompareAgainstUnicorn(FPSR.IOC | FPSR.IDC, FpSkips.IfUnderflow, FpTolerances.UpToOneUlps_S);
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}
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[Test, Pairwise] [Explicit] // Fused.
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@ -1429,11 +1468,14 @@ namespace Ryujinx.Tests.Cpu
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Vector128<float> V1 = MakeVectorE0E1(A, A);
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Vector128<float> V2 = MakeVectorE0E1(B, B);
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int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN);
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int Rnd = (int)TestContext.CurrentContext.Random.NextUInt();
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int Fpcr = Rnd & (1 << (int)FPCR.FZ);
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Fpcr |= Rnd & (1 << (int)FPCR.DN);
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CpuThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, V2: V2, Fpcr: Fpcr);
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CompareAgainstUnicorn(FPSR.IOC, FpSkips.IfUnderflow, FpTolerances.UpToOneUlps_D);
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CompareAgainstUnicorn(FPSR.IOC | FPSR.IDC, FpSkips.IfUnderflow, FpTolerances.UpToOneUlps_D);
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}
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[Test, Pairwise, Description("ORN <Vd>.<T>, <Vn>.<T>, <Vm>.<T>")]
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