From f9077e78a56aca4616898173fc688cbd2c49b617 Mon Sep 17 00:00:00 2001 From: LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com> Date: Fri, 5 Oct 2018 00:32:37 +0200 Subject: [PATCH] Update CpuTestSimd.cs --- Ryujinx.Tests/Cpu/CpuTestSimd.cs | 82 ++++++++++++++++++++++---------- 1 file changed, 57 insertions(+), 25 deletions(-) diff --git a/Ryujinx.Tests/Cpu/CpuTestSimd.cs b/Ryujinx.Tests/Cpu/CpuTestSimd.cs index 61a149ba06..2075ccf2b0 100644 --- a/Ryujinx.Tests/Cpu/CpuTestSimd.cs +++ b/Ryujinx.Tests/Cpu/CpuTestSimd.cs @@ -248,6 +248,40 @@ namespace Ryujinx.Tests.Cpu 0x6EE1B800u // FCVTZU V0.2D, V0.2D }; } + + private static uint[] _F_RecpX_Sqrt_S_S_() + { + return new uint[] + { + 0x5EA1F820u, // FRECPX S0, S1 + 0x1E21C020u // FSQRT S0, S1 + }; + } + + private static uint[] _F_RecpX_Sqrt_S_D_() + { + return new uint[] + { + 0x5EE1F820u, // FRECPX D0, D1 + 0x1E61C020u // FSQRT D0, D1 + }; + } + + private static uint[] _F_Sqrt_V_2S_4S_() + { + return new uint[] + { + 0x2EA1F800u // FSQRT V0.2S, V0.2S + }; + } + + private static uint[] _F_Sqrt_V_2D_() + { + return new uint[] + { + 0x6EE1F800u // FSQRT V0.2D, V0.2D + }; + } #endregion private const int RndCnt = 2; @@ -841,76 +875,74 @@ namespace Ryujinx.Tests.Cpu CompareAgainstUnicorn(); } - [Test, Pairwise, Description("FSQRT , ")] - public void F_Sqrt_S_S([ValueSource("_1S_F_")] ulong A) + [Test, Pairwise] + public void F_RecpX_Sqrt_S_S([ValueSource("_F_RecpX_Sqrt_S_S_")] uint Opcodes, + [ValueSource("_1S_F_")] ulong A) { - uint Opcode = 0x1E21C020; // FSQRT S0, S1 - ulong Z = TestContext.CurrentContext.Random.NextULong(); Vector128 V0 = MakeVectorE0E1(Z, Z); Vector128 V1 = MakeVectorE0(A); int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN); - AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1, Fpcr: Fpcr); + AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, Fpcr: Fpcr); - CompareAgainstUnicorn(FPSR.IOC); + CompareAgainstUnicorn(FpsrMask: FPSR.IOC); } - [Test, Pairwise, Description("FSQRT
, ")] - public void F_Sqrt_S_D([ValueSource("_1D_F_")] ulong A) + [Test, Pairwise] + public void F_RecpX_Sqrt_S_D([ValueSource("_F_RecpX_Sqrt_S_D_")] uint Opcodes, + [ValueSource("_1D_F_")] ulong A) { - uint Opcode = 0x1E61C020; // FSQRT D0, D1 - ulong Z = TestContext.CurrentContext.Random.NextULong(); Vector128 V0 = MakeVectorE1(Z); Vector128 V1 = MakeVectorE0(A); int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN); - AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1, Fpcr: Fpcr); + AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, Fpcr: Fpcr); - CompareAgainstUnicorn(FPSR.IOC); + CompareAgainstUnicorn(FpsrMask: FPSR.IOC); } - [Test, Pairwise, Description("FSQRT ., .")] - public void F_Sqrt_V_2S_4S([Values(0u)] uint Rd, + [Test, Pairwise] + public void F_Sqrt_V_2S_4S([ValueSource("_F_Sqrt_V_2S_4S_")] uint Opcodes, + [Values(0u)] uint Rd, [Values(1u, 0u)] uint Rn, [ValueSource("_2S_F_")] ulong Z, [ValueSource("_2S_F_")] ulong A, [Values(0b0u, 0b1u)] uint Q) // <2S, 4S> { - uint Opcode = 0x2EA1F800; // FSQRT V0.2S, V0.2S - Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0); - Opcode |= ((Q & 1) << 30); + Opcodes |= ((Rn & 31) << 5) | ((Rd & 31) << 0); + Opcodes |= ((Q & 1) << 30); Vector128 V0 = MakeVectorE0E1(Z, Z); Vector128 V1 = MakeVectorE0E1(A, A * Q); int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN); - AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1, Fpcr: Fpcr); + AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, Fpcr: Fpcr); - CompareAgainstUnicorn(FPSR.IOC); + CompareAgainstUnicorn(FpsrMask: FPSR.IOC); } - [Test, Pairwise, Description("FSQRT ., .")] - public void F_Sqrt_V_2D([Values(0u)] uint Rd, + [Test, Pairwise] + public void F_Sqrt_V_2D([ValueSource("_F_Sqrt_V_2D_")] uint Opcodes, + [Values(0u)] uint Rd, [Values(1u, 0u)] uint Rn, [ValueSource("_1D_F_")] ulong Z, [ValueSource("_1D_F_")] ulong A) { - uint Opcode = 0x6EE1F800; // FSQRT V0.2D, V0.2D - Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0); + Opcodes |= ((Rn & 31) << 5) | ((Rd & 31) << 0); Vector128 V0 = MakeVectorE0E1(Z, Z); Vector128 V1 = MakeVectorE0E1(A, A); int Fpcr = (int)TestContext.CurrentContext.Random.NextUInt() & (1 << (int)FPCR.DN); - AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1, Fpcr: Fpcr); + AThreadState ThreadState = SingleOpcode(Opcodes, V0: V0, V1: V1, Fpcr: Fpcr); - CompareAgainstUnicorn(FPSR.IOC); + CompareAgainstUnicorn(FpsrMask: FPSR.IOC); } [Test, Pairwise, Description("NEG , ")]