From 2b46158c55d406727112293529f66a1814d46859 Mon Sep 17 00:00:00 2001 From: greggameplayer <33609333+greggameplayer@users.noreply.github.com> Date: Tue, 10 Jul 2018 18:43:22 +0200 Subject: [PATCH 1/6] Add Fminp_V & Fmaxp_V Opcodes to the table --- ChocolArm64/AOpCodeTable.cs | 2 ++ 1 file changed, 2 insertions(+) diff --git a/ChocolArm64/AOpCodeTable.cs b/ChocolArm64/AOpCodeTable.cs index fb4763ef8c..f44319d7a2 100644 --- a/ChocolArm64/AOpCodeTable.cs +++ b/ChocolArm64/AOpCodeTable.cs @@ -267,9 +267,11 @@ namespace ChocolArm64 SetA64("000111110x0xxxxx0xxxxxxxxxxxxxxx", AInstEmit.Fmadd_S, typeof(AOpCodeSimdReg)); SetA64("000111100x1xxxxx010010xxxxxxxxxx", AInstEmit.Fmax_S, typeof(AOpCodeSimdReg)); SetA64("0x0011100x1xxxxx111101xxxxxxxxxx", AInstEmit.Fmax_V, typeof(AOpCodeSimdReg)); + SetA64("0x1011100x1xxxxx111101xxxxxxxxxx", AInstEmit.Fmaxp_V, typeof(AOpCodeSimdReg)); SetA64("000111100x1xxxxx011010xxxxxxxxxx", AInstEmit.Fmaxnm_S, typeof(AOpCodeSimdReg)); SetA64("000111100x1xxxxx010110xxxxxxxxxx", AInstEmit.Fmin_S, typeof(AOpCodeSimdReg)); SetA64("0x0011101x1xxxxx111101xxxxxxxxxx", AInstEmit.Fmin_V, typeof(AOpCodeSimdReg)); + SetA64("0x1011101x1xxxxx111101xxxxxxxxxx", AInstEmit.Fminp_V, typeof(AOpCodeSimdReg)); SetA64("000111100x1xxxxx011110xxxxxxxxxx", AInstEmit.Fminnm_S, typeof(AOpCodeSimdReg)); SetA64("010111111<0011100<1xxxxx110011xxxxxxxxxx", AInstEmit.Fmla_V, typeof(AOpCodeSimdReg)); From 364f2c710d104fb6b50a0357111751df4ca3b80e Mon Sep 17 00:00:00 2001 From: greggameplayer <33609333+greggameplayer@users.noreply.github.com> Date: Tue, 10 Jul 2018 18:48:05 +0200 Subject: [PATCH 2/6] add Fmaxp_V & Fminp_V functions --- .../Instruction/AInstEmitSimdArithmetic.cs | 87 +++++++++++++++++++ 1 file changed, 87 insertions(+) diff --git a/ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs b/ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs index 39331f965c..caf6a73299 100644 --- a/ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs +++ b/ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs @@ -438,6 +438,49 @@ namespace ChocolArm64.Instruction } }); } + + public static void Fmaxp_V(AILEmitterCtx Context) + { + AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp; + + int SizeF = Op.Size & 1; + + int Bytes = Context.CurrOp.GetBitsCount() >> 3; + + int Elems = Bytes >> SizeF + 2; + int Half = Elems >> 1; + + for (int Index = 0; Index < Elems; Index++) + { + int Elem = (Index & (Half - 1)) << 1; + + EmitVectorExtractF(Context, Index < Half ? Op.Rn : Op.Rm, Elem + 0, SizeF); + EmitVectorExtractF(Context, Index < Half ? Op.Rn : Op.Rm, Elem + 1, SizeF); + + if (SizeF == 0) + { + AVectorHelper.EmitCall(Context, nameof(AVectorHelper.MaxF)); + } + else if (SizeF == 1) + { + AVectorHelper.EmitCall(Context, nameof(AVectorHelper.Max)); + } + else + { + throw new InvalidOperationException(); + } + + EmitVectorInsertTmpF(Context, Index, SizeF); + } + + Context.EmitLdvectmp(); + Context.EmitStvec(Op.Rd); + + if (Op.RegisterSize == ARegisterSize.SIMD64) + { + EmitVectorZeroUpper(Context, Op.Rd); + } + } public static void Fmin_S(AILEmitterCtx Context) { @@ -482,6 +525,50 @@ namespace ChocolArm64.Instruction } }); } + + public static void Fminp_V(AILEmitterCtx Context) + { + AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp; + + int SizeF = Op.Size & 1; + + int Bytes = Context.CurrOp.GetBitsCount() >> 3; + + int Elems = Bytes >> SizeF + 2; + int Half = Elems >> 1; + + for (int Index = 0; Index < Elems; Index++) + { + int Elem = (Index & (Half - 1)) << 1; + + EmitVectorExtractF(Context, Index < Half ? Op.Rn : Op.Rm, Elem + 0, SizeF); + EmitVectorExtractF(Context, Index < Half ? Op.Rn : Op.Rm, Elem + 1, SizeF); + + if (SizeF == 0) + { + AVectorHelper.EmitCall(Context, nameof(AVectorHelper.MinF)); + } + else if (SizeF == 1) + { + AVectorHelper.EmitCall(Context, nameof(AVectorHelper.Min)); + } + else + { + throw new InvalidOperationException(); + } + + EmitVectorInsertTmpF(Context, Index, SizeF); + } + + Context.EmitLdvectmp(); + Context.EmitStvec(Op.Rd); + + if (Op.RegisterSize == ARegisterSize.SIMD64) + { + EmitVectorZeroUpper(Context, Op.Rd); + } + } + public static void Fmaxnm_S(AILEmitterCtx Context) { From 337602797dba8072dc16c7056a8908287b7ec1a8 Mon Sep 17 00:00:00 2001 From: greggameplayer <33609333+greggameplayer@users.noreply.github.com> Date: Thu, 12 Jul 2018 21:14:30 +0200 Subject: [PATCH 3/6] Add EmitVectorPairwiseFloat function --- .../Instruction/AInstEmitSimdHelper.cs | 75 +++++++++++++++++++ 1 file changed, 75 insertions(+) diff --git a/ChocolArm64/Instruction/AInstEmitSimdHelper.cs b/ChocolArm64/Instruction/AInstEmitSimdHelper.cs index d895ec9c7c..9aaca22b62 100644 --- a/ChocolArm64/Instruction/AInstEmitSimdHelper.cs +++ b/ChocolArm64/Instruction/AInstEmitSimdHelper.cs @@ -928,6 +928,81 @@ namespace ChocolArm64.Instruction Context.EmitStvectmp(); } + + public static void EmitVectorPairwiseFloat(AILEmitterCtx Context, OpCode EmitMethod) + { + AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp; + + int SizeF = Op.Size & 1; + + int Bytes = Context.CurrOp.GetBitsCount() >> 3; + + int Elems = Bytes >> SizeF + 2; + int Half = Elems >> 1; + + for (int Index = 0; Index < Elems; Index++) + { + int Elem = (Index & (Half - 1)) << 1; + + EmitVectorExtractF(Context, Index < Half ? Op.Rn : Op.Rm, Elem + 0, SizeF); + EmitVectorExtractF(Context, Index < Half ? Op.Rn : Op.Rm, Elem + 1, SizeF); + + Context.Emit(EmitMethod); + + EmitVectorInsertTmpF(Context, Index, SizeF); + } + + Context.EmitLdvectmp(); + Context.EmitStvec(Op.Rd); + + if (Op.RegisterSize == ARegisterSize.SIMD64) + { + EmitVectorZeroUpper(Context, Op.Rd); + } + } + + public static void EmitVectorPairwiseFloat(AILEmitterCtx Context, string EmitMethodF, string EmitMethod) + { + AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp; + + int SizeF = Op.Size & 1; + + int Bytes = Context.CurrOp.GetBitsCount() >> 3; + + int Elems = Bytes >> SizeF + 2; + int Half = Elems >> 1; + + for (int Index = 0; Index < Elems; Index++) + { + int Elem = (Index & (Half - 1)) << 1; + + EmitVectorExtractF(Context, Index < Half ? Op.Rn : Op.Rm, Elem + 0, SizeF); + EmitVectorExtractF(Context, Index < Half ? Op.Rn : Op.Rm, Elem + 1, SizeF); + + if (SizeF == 0) + { + AVectorHelper.EmitCall(Context, EmitMethodF); + } + else if (SizeF == 1) + { + AVectorHelper.EmitCall(Context, EmitMethod); + } + else + { + throw new InvalidOperationException(); + } + + EmitVectorInsertTmpF(Context, Index, SizeF); + } + + Context.EmitLdvectmp(); + Context.EmitStvec(Op.Rd); + + if (Op.RegisterSize == ARegisterSize.SIMD64) + { + EmitVectorZeroUpper(Context, Op.Rd); + } + } private static void ThrowIfInvalid(int Index, int Size) { From 41a6ea5bdf439fb278bceaa7fe996b3aa3e94c25 Mon Sep 17 00:00:00 2001 From: greggameplayer <33609333+greggameplayer@users.noreply.github.com> Date: Thu, 12 Jul 2018 21:17:46 +0200 Subject: [PATCH 4/6] Use the EmitVectorPairwiseFloat for Faddp_V & Fminp_V & Fmaxp_V --- .../Instruction/AInstEmitSimdArithmetic.cs | 109 +----------------- 1 file changed, 3 insertions(+), 106 deletions(-) diff --git a/ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs b/ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs index caf6a73299..b071fd994f 100644 --- a/ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs +++ b/ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs @@ -334,34 +334,7 @@ namespace ChocolArm64.Instruction public static void Faddp_V(AILEmitterCtx Context) { - AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp; - - int SizeF = Op.Size & 1; - - int Bytes = Context.CurrOp.GetBitsCount() >> 3; - - int Elems = Bytes >> SizeF + 2; - int Half = Elems >> 1; - - for (int Index = 0; Index < Elems; Index++) - { - int Elem = (Index & (Half - 1)) << 1; - - EmitVectorExtractF(Context, Index < Half ? Op.Rn : Op.Rm, Elem + 0, SizeF); - EmitVectorExtractF(Context, Index < Half ? Op.Rn : Op.Rm, Elem + 1, SizeF); - - Context.Emit(OpCodes.Add); - - EmitVectorInsertTmpF(Context, Index, SizeF); - } - - Context.EmitLdvectmp(); - Context.EmitStvec(Op.Rd); - - if (Op.RegisterSize == ARegisterSize.SIMD64) - { - EmitVectorZeroUpper(Context, Op.Rd); - } + EmitVectorPairwiseFloat(Context, OpCodes.Add); } public static void Fdiv_S(AILEmitterCtx Context) @@ -441,45 +414,7 @@ namespace ChocolArm64.Instruction public static void Fmaxp_V(AILEmitterCtx Context) { - AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp; - - int SizeF = Op.Size & 1; - - int Bytes = Context.CurrOp.GetBitsCount() >> 3; - - int Elems = Bytes >> SizeF + 2; - int Half = Elems >> 1; - - for (int Index = 0; Index < Elems; Index++) - { - int Elem = (Index & (Half - 1)) << 1; - - EmitVectorExtractF(Context, Index < Half ? Op.Rn : Op.Rm, Elem + 0, SizeF); - EmitVectorExtractF(Context, Index < Half ? Op.Rn : Op.Rm, Elem + 1, SizeF); - - if (SizeF == 0) - { - AVectorHelper.EmitCall(Context, nameof(AVectorHelper.MaxF)); - } - else if (SizeF == 1) - { - AVectorHelper.EmitCall(Context, nameof(AVectorHelper.Max)); - } - else - { - throw new InvalidOperationException(); - } - - EmitVectorInsertTmpF(Context, Index, SizeF); - } - - Context.EmitLdvectmp(); - Context.EmitStvec(Op.Rd); - - if (Op.RegisterSize == ARegisterSize.SIMD64) - { - EmitVectorZeroUpper(Context, Op.Rd); - } + EmitVectorPairwiseFloat(Context, nameof(AVectorHelper.MaxF), nameof(AVectorHelper.Max)); } public static void Fmin_S(AILEmitterCtx Context) @@ -528,45 +463,7 @@ namespace ChocolArm64.Instruction public static void Fminp_V(AILEmitterCtx Context) { - AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp; - - int SizeF = Op.Size & 1; - - int Bytes = Context.CurrOp.GetBitsCount() >> 3; - - int Elems = Bytes >> SizeF + 2; - int Half = Elems >> 1; - - for (int Index = 0; Index < Elems; Index++) - { - int Elem = (Index & (Half - 1)) << 1; - - EmitVectorExtractF(Context, Index < Half ? Op.Rn : Op.Rm, Elem + 0, SizeF); - EmitVectorExtractF(Context, Index < Half ? Op.Rn : Op.Rm, Elem + 1, SizeF); - - if (SizeF == 0) - { - AVectorHelper.EmitCall(Context, nameof(AVectorHelper.MinF)); - } - else if (SizeF == 1) - { - AVectorHelper.EmitCall(Context, nameof(AVectorHelper.Min)); - } - else - { - throw new InvalidOperationException(); - } - - EmitVectorInsertTmpF(Context, Index, SizeF); - } - - Context.EmitLdvectmp(); - Context.EmitStvec(Op.Rd); - - if (Op.RegisterSize == ARegisterSize.SIMD64) - { - EmitVectorZeroUpper(Context, Op.Rd); - } + EmitVectorPairwiseFloat(Context, nameof(AVectorHelper.MinF), nameof(AVectorHelper.Min)); } From f2a293b8fe1c1ead75b60e06c36de7eec97a5c9b Mon Sep 17 00:00:00 2001 From: greggameplayer <33609333+greggameplayer@users.noreply.github.com> Date: Thu, 12 Jul 2018 21:50:29 +0200 Subject: [PATCH 5/6] add a new import --- ChocolArm64/Instruction/AInstEmitSimdHelper.cs | 1 + 1 file changed, 1 insertion(+) diff --git a/ChocolArm64/Instruction/AInstEmitSimdHelper.cs b/ChocolArm64/Instruction/AInstEmitSimdHelper.cs index 9aaca22b62..f56ab3deb1 100644 --- a/ChocolArm64/Instruction/AInstEmitSimdHelper.cs +++ b/ChocolArm64/Instruction/AInstEmitSimdHelper.cs @@ -3,6 +3,7 @@ using ChocolArm64.State; using ChocolArm64.Translation; using System; using System.Reflection; +using System.Reflection.Emit; using System.Runtime.CompilerServices; using System.Runtime.Intrinsics; using System.Runtime.Intrinsics.X86; From d7263d0574ba3450e7bf18f9e3babc12dd8f6105 Mon Sep 17 00:00:00 2001 From: greggameplayer <33609333+greggameplayer@users.noreply.github.com> Date: Wed, 8 Aug 2018 05:05:04 +0200 Subject: [PATCH 6/6] correct function according to the new changes --- ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs b/ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs index 0d9660a663..bf455f3653 100644 --- a/ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs +++ b/ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs @@ -340,7 +340,7 @@ namespace ChocolArm64.Instruction public static void Fmaxp_V(AILEmitterCtx Context) { - EmitVectorPairwiseFloat(Context, nameof(AVectorHelper.MaxF), nameof(AVectorHelper.Max)); + EmitVectorPairwiseFloat(Context, nameof(ASoftFloat.Max), nameof(ASoftFloat.Max)); } public static void Fmin_S(AILEmitterCtx Context) @@ -361,7 +361,7 @@ namespace ChocolArm64.Instruction public static void Fminp_V(AILEmitterCtx Context) { - EmitVectorPairwiseFloat(Context, nameof(AVectorHelper.MinF), nameof(AVectorHelper.Min)); + EmitVectorPairwiseFloat(Context, nameof(ASoftFloat.Min), nameof(ASoftFloat.Min)); }