.editorconfig

@@ -1,31 +1,19 @@
 # Remove the line below if you want to inherit .editorconfig settings from higher directories
 root = true
 
-[*]
+# C# files
+[*.cs]
 
 #### Core EditorConfig Options ####
 
-# Set default charset
-charset = utf-8
-
 # Indentation and spacing
 indent_size = 4
 indent_style = space
 tab_width = 4
 
 # New line preferences
-end_of_line = lf
-insert_final_newline = true
-
-# Markdown, JSON, YAML, props and csproj files
-[*.{md,json,yml,props,csproj}]
-
-# Indentation and spacing
-indent_size = 2
-tab_width = 2
-
-# C# files
-[*.cs]
+end_of_line = crlf
+insert_final_newline = false
 
 #### .NET Coding Conventions ####
 
@@ -71,14 +59,10 @@ dotnet_style_prefer_simplified_interpolation = true:suggestion
 dotnet_style_readonly_field = true:suggestion
 
 # Parameter preferences
-dotnet_code_quality_unused_parameters = all:silent
+dotnet_code_quality_unused_parameters = all:suggestion
 
 #### C# Coding Conventions ####
 
-# Namespace preferences
-csharp_style_namespace_declarations = block_scoped:warning
-resharper_csharp_namespace_body = block_scoped
-
 # var preferences
 csharp_style_var_elsewhere = false:silent
 csharp_style_var_for_built_in_types = false:silent
@@ -97,7 +81,7 @@ csharp_style_expression_bodied_properties = true:silent
 # Pattern matching preferences
 csharp_style_pattern_matching_over_as_with_null_check = true:suggestion
 csharp_style_pattern_matching_over_is_with_cast_check = true:suggestion
-csharp_style_prefer_switch_expression = false:silent
+csharp_style_prefer_switch_expression = true:suggestion
 
 # Null-checking preferences
 csharp_style_conditional_delegate_call = true:suggestion
@@ -105,8 +89,6 @@ csharp_style_conditional_delegate_call = true:suggestion
 # Modifier preferences
 csharp_prefer_static_local_function = true:suggestion
 csharp_preferred_modifier_order = public,private,protected,internal,static,extern,new,virtual,abstract,sealed,override,readonly,unsafe,volatile,async:silent
-csharp_style_prefer_readonly_struct = true
-csharp_style_prefer_method_group_conversion = true
 
 # Code-block preferences
 csharp_prefer_braces = true:silent
@@ -122,7 +104,6 @@ csharp_style_prefer_range_operator = true:suggestion
 csharp_style_throw_expression = true:suggestion
 csharp_style_unused_value_assignment_preference = discard_variable:suggestion
 csharp_style_unused_value_expression_statement_preference = discard_variable:silent
-csharp_style_implicit_object_creation_when_type_is_apparent = true
 
 # 'using' directive preferences
 csharp_using_directive_placement = outside_namespace:silent
@@ -154,6 +135,7 @@ csharp_space_after_dot = false
 csharp_space_after_keywords_in_control_flow_statements = true
 csharp_space_after_semicolon_in_for_statement = true
 csharp_space_around_binary_operators = before_and_after
+csharp_space_around_declaration_statements = false
 csharp_space_before_colon_in_inheritance_clause = true
 csharp_space_before_comma = false
 csharp_space_before_dot = false
@@ -171,31 +153,23 @@ csharp_space_between_square_brackets = false
 
 # Wrapping preferences
 csharp_preserve_single_line_blocks = true
-csharp_preserve_single_line_statements = false
+csharp_preserve_single_line_statements = true
 
 #### Naming styles ####
 
 # Naming rules
 
-dotnet_naming_rule.interfaces_should_be_prefixed_with_I.severity = suggestion
-dotnet_naming_rule.interfaces_should_be_prefixed_with_I.symbols = interface
-dotnet_naming_rule.interfaces_should_be_prefixed_with_I.style = IPascalCase
+dotnet_naming_rule.interface_should_be_begins_with_i.severity = suggestion
+dotnet_naming_rule.interface_should_be_begins_with_i.symbols = interface
+dotnet_naming_rule.interface_should_be_begins_with_i.style = begins_with_i
 
 dotnet_naming_rule.types_should_be_pascal_case.severity = suggestion
 dotnet_naming_rule.types_should_be_pascal_case.symbols = types
-dotnet_naming_rule.types_should_be_pascal_case.style = PascalCase
+dotnet_naming_rule.types_should_be_pascal_case.style = pascal_case
 
 dotnet_naming_rule.non_field_members_should_be_pascal_case.severity = suggestion
 dotnet_naming_rule.non_field_members_should_be_pascal_case.symbols = non_field_members
-dotnet_naming_rule.non_field_members_should_be_pascal_case.style = PascalCase
-
-dotnet_naming_rule.private_static_readonly_fields_should_be_camel_case_and_prefixed_with__.symbols = private_static_readonly_fields
-dotnet_naming_rule.private_static_readonly_fields_should_be_camel_case_and_prefixed_with__.severity = suggestion
-dotnet_naming_rule.private_static_readonly_fields_should_be_camel_case_and_prefixed_with__.style = _camelCase
-
-dotnet_naming_rule.local_constants_should_be_pascal_case.symbols = local_constants
-dotnet_naming_rule.local_constants_should_be_pascal_case.severity = suggestion
-dotnet_naming_rule.local_constants_should_be_pascal_case.style = PascalCase
+dotnet_naming_rule.non_field_members_should_be_pascal_case.style = pascal_case
 
 # Symbol specifications
 
@@ -211,62 +185,14 @@ dotnet_naming_symbols.non_field_members.applicable_kinds = property, event, meth
 dotnet_naming_symbols.non_field_members.applicable_accessibilities = public, internal, private, protected, protected_internal, private_protected
 dotnet_naming_symbols.non_field_members.required_modifiers =
 
-dotnet_naming_symbols.private_static_readonly_fields.applicable_kinds = field
-dotnet_naming_symbols.private_static_readonly_fields.applicable_accessibilities = private
-dotnet_naming_symbols.private_static_readonly_fields.required_modifiers = static, readonly
-
-dotnet_naming_symbols.local_constants.applicable_kinds = local
-dotnet_naming_symbols.local_constants.applicable_accessibilities = local
-dotnet_naming_symbols.local_constants.required_modifiers = const
-
 # Naming styles
 
-dotnet_naming_style._camelCase.required_prefix = _
-dotnet_naming_style._camelCase.required_suffix =
-dotnet_naming_style._camelCase.word_separator =
-dotnet_naming_style._camelCase.capitalization = camel_case
+dotnet_naming_style.pascal_case.required_prefix =
+dotnet_naming_style.pascal_case.required_suffix =
+dotnet_naming_style.pascal_case.word_separator =
+dotnet_naming_style.pascal_case.capitalization = pascal_case
 
-dotnet_naming_style.PascalCase.required_prefix =
-dotnet_naming_style.PascalCase.required_suffix =
-dotnet_naming_style.PascalCase.word_separator =
-dotnet_naming_style.PascalCase.capitalization = pascal_case
-
-dotnet_naming_style.IPascalCase.required_prefix = I
-dotnet_naming_style.IPascalCase.required_suffix =
-dotnet_naming_style.IPascalCase.word_separator =
-dotnet_naming_style.IPascalCase.capitalization = pascal_case
-
-# TODO:
-# .NET 8 migration (new warnings are caused by the NET 8 C# compiler and analyzer)
-# The following info messages might need to be fixed in the source code instead of hiding the actual message
-# Without the following lines, dotnet format would fail
-# Disable "Collection initialization can be simplified"
-dotnet_diagnostic.IDE0028.severity = none
-dotnet_diagnostic.IDE0300.severity = none
-dotnet_diagnostic.IDE0301.severity = none
-dotnet_diagnostic.IDE0302.severity = none
-dotnet_diagnostic.IDE0305.severity = none
-# Disable "'new' expression can be simplified"
-dotnet_diagnostic.IDE0090.severity = none
-# Disable "Use primary constructor"
-dotnet_diagnostic.IDE0290.severity = none
-# Disable "Member '' does not access instance data and can be marked as static"
-dotnet_diagnostic.CA1822.severity = none
-# Disable "Change type of field '' from '' to '' for improved performance"
-dotnet_diagnostic.CA1859.severity = none
-# Disable "Prefer 'static readonly' fields over constant array arguments if the called method is called repeatedly and is not mutating the passed array"
-dotnet_diagnostic.CA1861.severity = none
-# Disable "Prefer using 'string.Equals(string, StringComparison)' to perform a case-insensitive comparison, but keep in mind that this might cause subtle changes in behavior, so make sure to conduct thorough testing after applying the suggestion, or if culturally sensitive comparison is not required, consider using 'StringComparison.OrdinalIgnoreCase'"
-dotnet_diagnostic.CA1862.severity = none
-
-[src/Ryujinx/UI/ViewModels/**.cs]
-# Disable "mark members as static" rule for ViewModels
-dotnet_diagnostic.CA1822.severity = none
-
-[src/Ryujinx.HLE/HOS/Services/**.cs]
-# Disable "mark members as static" rule for services
-dotnet_diagnostic.CA1822.severity = none
-
-[src/Ryujinx.Tests/Cpu/*.cs]
-# Disable naming rules for CPU tests
-dotnet_diagnostic.IDE1006.severity = none
+dotnet_naming_style.begins_with_i.required_prefix = I
+dotnet_naming_style.begins_with_i.required_suffix =
+dotnet_naming_style.begins_with_i.word_separator =
+dotnet_naming_style.begins_with_i.capitalization = pascal_case

.gitattributes

@@ -1,4 +1,63 @@
 ###############################################################################
 # Set default behavior to automatically normalize line endings.
 ###############################################################################
-* text=auto eol=lf
+* text=auto
+
+###############################################################################
+# Set default behavior for command prompt diff.
+#
+# This is need for earlier builds of msysgit that does not have it on by
+# default for csharp files.
+# Note: This is only used by command line
+###############################################################################
+#*.cs     diff=csharp
+
+###############################################################################
+# Set the merge driver for project and solution files
+#
+# Merging from the command prompt will add diff markers to the files if there
+# are conflicts (Merging from VS is not affected by the settings below, in VS
+# the diff markers are never inserted). Diff markers may cause the following 
+# file extensions to fail to load in VS. An alternative would be to treat
+# these files as binary and thus will always conflict and require user
+# intervention with every merge. To do so, just uncomment the entries below
+###############################################################################
+#*.sln       merge=binary
+#*.csproj    merge=binary
+#*.vbproj    merge=binary
+#*.vcxproj   merge=binary
+#*.vcproj    merge=binary
+#*.dbproj    merge=binary
+#*.fsproj    merge=binary
+#*.lsproj    merge=binary
+#*.wixproj   merge=binary
+#*.modelproj merge=binary
+#*.sqlproj   merge=binary
+#*.wwaproj   merge=binary
+
+###############################################################################
+# behavior for image files
+#
+# image files are treated as binary by default.
+###############################################################################
+#*.jpg   binary
+#*.png   binary
+#*.gif   binary
+
+###############################################################################
+# diff behavior for common document formats
+# 
+# Convert binary document formats to text before diffing them. This feature
+# is only available from the command line. Turn it on by uncommenting the 
+# entries below.
+###############################################################################
+#*.doc   diff=astextplain
+#*.DOC   diff=astextplain
+#*.docx  diff=astextplain
+#*.DOCX  diff=astextplain
+#*.dot   diff=astextplain
+#*.DOT   diff=astextplain
+#*.pdf   diff=astextplain
+#*.PDF   diff=astextplain
+#*.rtf   diff=astextplain
+#*.RTF   diff=astextplain

.github/ISSUE_TEMPLATE/bug_report.md

@@ -0,0 +1,43 @@
+---
+name: Bug Report
+about: Something doesn't work correctly in Ryujinx.
+#assignees:
+---
+
+## Bug Report
+
+[ If any section does not apply, replace its contents with "N/A". ]</br>
+[ Lines between [ ] (square brackets) should be removed before posting. ]
+
+### What's the issue you encountered?
+
+[ Describe the issue in detail and what you were doing beforehand. ]</br>
+[ Did you make any changes related to Ryujinx itself? ]</br>
+[ If so, make sure to include details relating to what exactly you changed. ]
+
+### How can the issue be reproduced?
+
+[ Include a detailed step by step process for recreating your issue. ]
+
+### Log file
+
+[ Logs files can be found under ``Logs`` folder in Ryujinx program folder. ]</br>
+[ If you don't include a crash report in instances of crash related issues, we will ask you one to provide one. ]
+
+### Environment?
+
+- Ryujinx version: 1.0.X</br>
+[ Replace X's with the Ryujinx version at time of crash. ]
+- Game version: X.X.X</br>
+[ Replace X's with the game version at time of crash. ]
+- System Specs:
+  - OS: *(e.g. Windows 10)*
+  - CPU: *(e.g. i7-6700)*
+  - GPU: *(e.g. NVIDIA RTX 2070)*
+  - RAM: *(e.g. 16GB)*
+- Applied Mods : [ Yes (Which ones) / No ]
+
+### Additional context?
+
+Additional info about your environment:</br>
+[ Any other information relevant to your issue. ]

.github/ISSUE_TEMPLATE/bug_report.yml

@@ -1,86 +0,0 @@
-name: Bug Report
-description: File a bug report
-title: "[Bug]"
-labels: bug
-body:
-  - type: textarea
-    id: issue
-    attributes:
-      label: Description of the issue
-      description: What's the issue you encountered?
-    validations:
-      required: true
-  - type: textarea
-    id: repro
-    attributes:
-      label: Reproduction steps
-      description: How can the issue be reproduced?
-      placeholder: Describe each step as precisely as possible
-    validations:
-      required: true
-  - type: textarea
-    id: log
-    attributes:
-      label: Log file
-      description: A log file will help our developers to better diagnose and fix the issue.
-      placeholder: Logs files can be found under "Logs" folder in Ryujinx program folder. They can also be accessed by opening Ryujinx, then going to File > Open Logs Folder. You can drag and drop the log on to the text area (do not copy paste).
-    validations:
-      required: true
-  - type: input
-    id: os
-    attributes:
-      label: OS
-      placeholder: "e.g. Windows 10"
-    validations:
-      required: true
-  - type: input
-    id: ryujinx-version
-    attributes:
-      label: Ryujinx version
-      placeholder: "e.g. 1.0.470"
-    validations:
-      required: true
-  - type: input
-    id: game-version
-    attributes:
-      label: Game version
-      placeholder: "e.g. 1.1.1"
-    validations:
-      required: false
-  - type: input
-    id: cpu
-    attributes:
-      label: CPU
-      placeholder: "e.g. i7-6700"
-    validations:
-      required: false
-  - type: input
-    id: gpu
-    attributes:
-      label: GPU
-      placeholder: "e.g. NVIDIA RTX 2070"
-    validations:
-      required: false
-  - type: input
-    id: ram
-    attributes:
-      label: RAM
-      placeholder: "e.g. 16GB"
-    validations:
-      required: false
-  - type: textarea
-    id: mods
-    attributes:
-      label: List of applied mods
-      placeholder: You can list applied mods here.
-    validations:
-      required: false
-  - type: textarea
-    id: additional-context
-    attributes:
-      label: Additional context?
-      description: |
-        - Additional info about your environment:
-        - Any other information relevant to your issue.
-    validations:
-      required: false

.github/ISSUE_TEMPLATE/feature_request.md

@@ -0,0 +1,34 @@
+---
+name: Feature Request
+about: Suggest a new feature for Ryujinx.
+#assignees:
+---
+
+## Feature Request
+
+[ If any section does not apply, replace its contents with "N/A". ]</br>
+[ If you do not have the information needed for a section, replace its contents with "Unknown". ]</br>
+[ Lines between [ ] (square brackets) are to be removed before posting. ]</br>
+
+[ Please search for existing [feature requests](https://github.com/Ryujinx/Ryujinx/issues) before you make your own request. ]</br>
+[ Duplicate requests will be marked as such and you will be referred to the original request. ]
+
+### What feature are you suggesting?
+#### Overview:
+- [ Include the basic, high-level concepts for this feature here. ]
+
+#### Smaller Details: 
+- [ These may include specific methods of implementation etc. ]
+
+#### Nature of Request:  
+[ Remove all that do not apply to your request. ]
+- Addition
+  - [ Ex: Addition of certain original features or features from other community projects. ]
+  - [ If you are suggesting porting features or including features from other projects, include what license they are distributed under and what, if any libraries those project use. ]
+- Change
+- Removal
+  - [Ex: Removal of certain features or implementation due to a specific issue/bug or because of low quality code, etc.]
+
+### Why would this feature be useful?
+[ If this is a feature for an end-user, how does it benefit the end-user? ]</br>
+[ If this feature is for developers, what does it add to Ryujinx that did not already exist? ]

.github/ISSUE_TEMPLATE/feature_request.yml

@@ -1,31 +0,0 @@
-name: Feature Request
-description: Suggest a new feature for Ryujinx.
-title: "[Feature Request]"
-labels: enhancement
-body:
-  - type: textarea
-    id: overview
-    attributes:
-      label: Overview
-      description: Include the basic, high-level concepts for this feature here.
-    validations:
-      required: true
-  - type: textarea
-    id: details
-    attributes:
-      label: Smaller details
-      description: These may include specific methods of implementation etc.
-    validations:
-      required: true
-  - type: textarea
-    id: request
-    attributes:
-      label: Nature of request
-    validations:
-      required: true
-  - type: textarea
-    id: feature
-    attributes:
-      label: Why would this feature be useful?
-    validations:
-      required: true

.github/ISSUE_TEMPLATE/missing_cpu_instruction.md

@@ -0,0 +1,34 @@
+---
+name: Missing CPU Instruction
+about: CPU Instruction is missing in Ryujinx.
+#assignees:
+---
+
+## Missing CPU Instruction
+
+[ If any section does not apply, replace its contents with "N/A". ]</br>
+[ If you do not have the information needed for a section, replace its contents with "Unknown". ]</br>
+[ Lines between [ ] (square brackets) are to be removed before posting. ]
+
+[ Please search for existing [missing CPU instruction](https://github.com/Ryujinx/Ryujinx/issues) before you make your own issue. ]</br>
+[ See the following [issue](https://github.com/Ryujinx/Ryujinx/issues/1405) as an example ]</br>
+[ Duplicate issue will be marked as such and you will be referred to the original request. ]
+
+### What CPU instruction is missing?
+
+Requires the *INSTRUCTION* instruction.</br>
+[ Replace *INSTRUCTION* by the instruction name, e.g. VADDL.U16 ]
+
+```
+*
+```
+[ Add the undefined instruction error message in the above code block ]
+
+### Instruction name
+```
+*
+```
+[ Include the name from [armconverter.com](https://armconverter.com/?disasm) or [shell-storm.org](http://shell-storm.org/online/Online-Assembler-and-Disassembler/?arch=arm64&endianness=big&dis_with_raw=True&dis_with_ins=True) in the above code block ]
+
+### Required by: 
+[ Add our (games list database)[https://github.com/Ryujinx/Ryujinx-Games-List/issues] links of games who require this instruction ]

.github/ISSUE_TEMPLATE/missing_cpu_instruction.yml

@@ -1,26 +0,0 @@
-name: Missing CPU Instruction
-description: CPU Instruction is missing in Ryujinx.
-title: "[CPU]"
-labels: [cpu, not-implemented]
-body:
-  - type: textarea
-    id: instruction
-    attributes:
-      label: CPU instruction
-      description: What CPU instruction is missing?
-    validations:
-      required: true
-  - type: textarea
-    id: name
-    attributes:
-      label: Instruction name
-      description: Include the name from [armconverter.com](https://armconverter.com/?disasm) or [shell-storm.org](http://shell-storm.org/online/Online-Assembler-and-Disassembler/?arch=arm64&endianness=big&dis_with_raw=True&dis_with_ins=True) in the above code block
-    validations:
-      required: true
-  - type: textarea
-    id: required
-    attributes:
-      label: Required by
-      description: Add links to the [compatibility list page(s)](https://github.com/Ryujinx/Ryujinx-Games-List/issues) of the game(s) that require this instruction.
-    validations:
-      required: true

.github/ISSUE_TEMPLATE/missing_service_call.md

@@ -0,0 +1,35 @@
+---
+name: Missing Service Call
+about: Service call is missing in Ryujinx.
+#assignees:
+---
+
+## Missing Service Call
+
+[ If any section does not apply, replace its contents with "N/A". ]</br>
+[ If you do not have the information needed for a section, replace its contents with "Unknown". ]</br>
+[ Lines between [ ] (square brackets) are to be removed before posting. ]
+
+[ Please search for existing [missing service call](https://github.com/Ryujinx/Ryujinx/issues) before you make your own issue. ]</br>
+[ See the following [issue](https://github.com/Ryujinx/Ryujinx/issues/1431) as an example ]</br>
+[ Duplicate issue will be marked as such and you will be referred to the original request. ]
+
+### What service call is missing?
+
+*SERVICE* *INTERFACE*: *NUMBER* (*NAME*) is not implemented.</br>
+[ Replace *SERVICE* by the service name, e.g. appletAE ]</br>
+[ Replace *INTERFACE* by the interface name, e.g. IAllSystemAppletProxiesService ]</br>
+[ Replace *NUMBER* by the call number, e.g. 100 ]</br>
+[ Replace *NAME* by the call name, e.g. OpenSystemAppletProxy ]</br>
+[ e.g. appletAE IAllSystemAppletProxiesService: 100 (OpenSystemAppletProxy) ]
+
+[ Add related links to the specific call from [Switchbrew](https://switchbrew.org/w/index.php?title=Services_API) and/or [SwIPC](https://reswitched.github.io/SwIPC/) ]
+
+### Service description
+```
+*
+```
+[ Include the description/explanation from [Switchbrew](https://switchbrew.org/w/index.php?title=Services_API) and/or [SwIPC](https://reswitched.github.io/SwIPC/) in the above code block ]
+
+### Required by: 
+[ Add our (games list database)[https://github.com/Ryujinx/Ryujinx-Games-List/issues] links of games who require this call ]

.github/ISSUE_TEMPLATE/missing_service_call.yml

@@ -1,25 +0,0 @@
-name: Missing Service Call
-description: Service call is missing in Ryujinx.
-labels: not-implemented
-body:
-  - type: textarea
-    id: instruction
-    attributes:
-      label: Service call
-      description: What service call is missing?
-    validations:
-      required: true
-  - type: textarea
-    id: name
-    attributes:
-      label: Service description
-      description: Include the description/explanation from [Switchbrew](https://switchbrew.org/w/index.php?title=Services_API) and/or [SwIPC](https://reswitched.github.io/SwIPC/) in the above code block
-    validations:
-      required: true
-  - type: textarea
-    id: required
-    attributes:
-      label: Required by
-      description:  Add links to the [compatibility list page(s)](https://github.com/Ryujinx/Ryujinx-Games-List/issues) of the game(s) that require this service.
-    validations:
-      required: true

.github/ISSUE_TEMPLATE/missing_shader_instruction.yml

@@ -1,19 +0,0 @@
-name: Missing Shader Instruction
-description: Shader Instruction is missing in Ryujinx.
-title: "[GPU]"
-labels: [gpu, not-implemented]
-body:
-  - type: textarea
-    id: instruction
-    attributes:
-      label: Shader instruction
-      description: What shader instruction is missing?
-    validations:
-      required: true
-  - type: textarea
-    id: required
-    attributes:
-      label: Required by
-      description: Add links to the [compatibility list page(s)](https://github.com/Ryujinx/Ryujinx-Games-List/issues) of the game(s) that require this instruction.
-    validations:
-      required: true

.github/csc.json

@@ -1,18 +0,0 @@
-{
-    "problemMatcher": [
-        {
-            "owner": "csc",
-            "pattern": [
-                {
-                    "regexp": "^((?:\\\\|/)(?:[^\\\\/:]+(?:\\\\|/))+[^\\\\/]+)\\((\\d+),(\\d+)\\):\\s+([a-zA-Z]+)\\s+([^:]+):\\s+([^[]+)\\s+\\[",
-                    "file": 1,
-                    "line": 2,
-                    "column": 3,
-                    "severity": 4,
-                    "code": 5,
-                    "message": 6
-                }
-            ]
-        }
-    ]
-}

.github/dependabot.yml

@@ -1,40 +0,0 @@
-version: 2
-updates:
-  - package-ecosystem: "github-actions"
-    directory: "/"
-    schedule:
-      interval: weekly
-    labels:
-      - "infra"
-    reviewers:
-      - TSRBerry
-    commit-message:
-      prefix: "ci"
-
-  - package-ecosystem: nuget
-    directory: /
-    open-pull-requests-limit: 10
-    schedule:
-      interval: daily
-    labels:
-      - "infra"
-    reviewers:
-      - TSRBerry
-    commit-message:
-      prefix: nuget
-    groups:
-      Avalonia:
-        patterns:
-          - "*Avalonia*"
-      Silk.NET:
-        patterns:
-          - "Silk.NET*"
-      OpenTK:
-        patterns:
-          - "OpenTK*"
-      SixLabors:
-        patterns:
-          - "SixLabors*"
-      NUnit:
-        patterns:
-          - "NUnit*"

.github/labeler.yml

@@ -1,35 +0,0 @@
-audio:
-- changed-files:
-  - any-glob-to-any-file: 'src/Ryujinx.Audio*/**'
-
-cpu:
-- changed-files:
-  - any-glob-to-any-file: ['src/ARMeilleure/**', 'src/Ryujinx.Cpu/**', 'src/Ryujinx.Memory/**']
-
-gpu:
-- changed-files:
-  - any-glob-to-any-file: ['src/Ryujinx.Graphics.*/**', 'src/Spv.Generator/**', 'src/Ryujinx.ShaderTools/**']
-
-'graphics-backend:opengl':
-- changed-files:
-  - any-glob-to-any-file: 'src/Ryujinx.Graphics.OpenGL/**'
-
-'graphics-backend:vulkan':
-- changed-files:
-  - any-glob-to-any-file: ['src/Ryujinx.Graphics.Vulkan/**', 'src/Spv.Generator/**']
-
-gui:
-- changed-files:
-  - any-glob-to-any-file: ['src/Ryujinx/**', 'src/Ryujinx.UI.Common/**', 'src/Ryujinx.UI.LocaleGenerator/**', 'src/Ryujinx.Gtk3/**']
-
-horizon:
-- changed-files:
-  - any-glob-to-any-file: ['src/Ryujinx.HLE/**', 'src/Ryujinx.Horizon/**']
-
-kernel:
-- changed-files:
-  - any-glob-to-any-file: 'src/Ryujinx.HLE/HOS/Kernel/**'
-
-infra:
-- changed-files:
-  - any-glob-to-any-file: ['.github/**', 'distribution/**', 'Directory.Packages.props']

.github/reviewers.yml

@@ -1,25 +0,0 @@
-
-cpu:
-  - gdkchan
-  - riperiperi
-  - LDj3SNuD
-
-gpu:
-  - gdkchan
-  - riperiperi
-
-gui:
-  - Ack77
-  - emmauss
-  - TSRBerry
-
-horizon:
-  - gdkchan
-  - Ack77
-  - TSRBerry
-
-infra:
-  - TSRBerry
-
-default:
-  - '@developers'

.github/workflows/build.yml

@@ -1,163 +1,82 @@
 name: Build job
 
 on:
-  workflow_call:
-
-env:
-  POWERSHELL_TELEMETRY_OPTOUT: 1
-  DOTNET_CLI_TELEMETRY_OPTOUT: 1
-  RYUJINX_BASE_VERSION: "1.1.0"
+  workflow_dispatch:
+    inputs: {}
+  #push:
+  #  branches: [ master ]
+  #  paths-ignore:
+  #    - '.github/*'
+  #    - '.github/ISSUE_TEMPLATE/**'
+  #    - '*.yml'
+  #    - 'README.md'
+  pull_request:
+    branches: [ master ]
+    paths-ignore:
+      - '.github/*'
+      - '.github/ISSUE_TEMPLATE/**'
+      - '*.yml'
+      - 'README.md'
 
 jobs:
   build:
-    name: ${{ matrix.platform.name }} (${{ matrix.configuration }})
-    runs-on: ${{ matrix.platform.os }}
-    timeout-minutes: 45
+    name: ${{ matrix.os }} (${{ matrix.configuration }})
+    runs-on: ${{ matrix.os }}
     strategy:
       matrix:
+        os: [ubuntu-latest, macOS-latest, windows-latest]
         configuration: [Debug, Release]
-        platform:
-          - { name: win-x64,     os: windows-latest, zip_os_name: win_x64     }
-          - { name: linux-x64,   os: ubuntu-latest,  zip_os_name: linux_x64   }
-          - { name: linux-arm64, os: ubuntu-latest,  zip_os_name: linux_arm64 }
-          - { name: osx-x64,     os: macos-13,       zip_os_name: osx_x64     }
+        include:
+        - os: ubuntu-latest
+          OS_NAME: Linux x64
+          DOTNET_RUNTIME_IDENTIFIER: linux-x64
+          RELEASE_ZIP_OS_NAME: linux_x64
+
+        - os: macOS-latest
+          OS_NAME: MacOS x64
+          DOTNET_RUNTIME_IDENTIFIER: osx-x64
+          RELEASE_ZIP_OS_NAME: osx_x64
+
+        - os: windows-latest
+          OS_NAME: Windows x64
+          DOTNET_RUNTIME_IDENTIFIER: win-x64
+          RELEASE_ZIP_OS_NAME: win_x64
 
       fail-fast: false
+    env:
+      POWERSHELL_TELEMETRY_OPTOUT: 1
+      DOTNET_CLI_TELEMETRY_OPTOUT: 1
     steps:
-      - uses: actions/checkout@v4
-
-      - uses: actions/setup-dotnet@v4
+      - uses: actions/checkout@v2
+      - uses: actions/setup-dotnet@v1
         with:
-          global-json-file: global.json
-
-      - name: Overwrite csc problem matcher
-        run: echo "::add-matcher::.github/csc.json"
-
+          dotnet-version: 6.0.x
+      - name: Ensure NuGet Source
+        uses: fabriciomurta/ensure-nuget-source@v1
       - name: Get git short hash
         id: git_short_hash
-        run: echo "result=$(git rev-parse --short "${{ github.sha }}")" >> $GITHUB_OUTPUT
-        shell: bash
-
-      - name: Change config filename
-        run: sed -r --in-place 's/\%\%RYUJINX_CONFIG_FILE_NAME\%\%/PRConfig\.json/g;' src/Ryujinx.Common/ReleaseInformation.cs
-        shell: bash
-        if: github.event_name == 'pull_request' && matrix.platform.os != 'macos-13'
-
-      - name: Change config filename for macOS
-        run: sed -r -i '' 's/\%\%RYUJINX_CONFIG_FILE_NAME\%\%/PRConfig\.json/g;' src/Ryujinx.Common/ReleaseInformation.cs
-        shell: bash
-        if: github.event_name == 'pull_request' && matrix.platform.os == 'macos-13'
-
+        run: echo "::set-output name=result::$(git rev-parse --short "${{ github.sha }}")"
+      - name: Clear
+        run: dotnet clean && dotnet nuget locals all --clear
       - name: Build
-        run: dotnet build -c "${{ matrix.configuration }}" -p:Version="${{ env.RYUJINX_BASE_VERSION }}" -p:SourceRevisionId="${{ steps.git_short_hash.outputs.result }}" -p:ExtraDefineConstants=DISABLE_UPDATER
-
+        run: dotnet build -c "${{ matrix.configuration }}" /p:Version="1.1.0" /p:SourceRevisionId="${{ steps.git_short_hash.outputs.result }}" /p:ExtraDefineConstants=DISABLE_UPDATER
       - name: Test
-        uses: TSRBerry/unstable-commands@v1
-        with:
-          commands: dotnet test --no-build -c "${{ matrix.configuration }}"
-          timeout-minutes: 10
-          retry-codes: 139
-        if: matrix.platform.name != 'linux-arm64'
-
+        run: dotnet test -c "${{ matrix.configuration }}"
       - name: Publish Ryujinx
-        run: dotnet publish -c "${{ matrix.configuration }}" -r "${{ matrix.platform.name }}" -o ./publish -p:Version="${{ env.RYUJINX_BASE_VERSION }}" -p:DebugType=embedded -p:SourceRevisionId="${{ steps.git_short_hash.outputs.result }}" -p:ExtraDefineConstants=DISABLE_UPDATER src/Ryujinx --self-contained true
-        if: github.event_name == 'pull_request' && matrix.platform.os != 'macos-13'
-
+        run: dotnet publish -c "${{ matrix.configuration }}" -r "${{ matrix.DOTNET_RUNTIME_IDENTIFIER }}" -o ./publish /p:Version="1.1.0" /p:DebugType=embedded /p:SourceRevisionId="${{ steps.git_short_hash.outputs.result }}" /p:ExtraDefineConstants=DISABLE_UPDATER Ryujinx --self-contained
+        if: github.event_name == 'pull_request'
       - name: Publish Ryujinx.Headless.SDL2
-        run: dotnet publish -c "${{ matrix.configuration }}" -r "${{ matrix.platform.name }}" -o ./publish_sdl2_headless -p:Version="${{ env.RYUJINX_BASE_VERSION }}" -p:DebugType=embedded -p:SourceRevisionId="${{ steps.git_short_hash.outputs.result }}" -p:ExtraDefineConstants=DISABLE_UPDATER src/Ryujinx.Headless.SDL2 --self-contained true
-        if: github.event_name == 'pull_request' && matrix.platform.os != 'macos-13'
-
-      - name: Publish Ryujinx.Gtk3
-        run: dotnet publish -c "${{ matrix.configuration }}" -r "${{ matrix.platform.name }}" -o ./publish_gtk -p:Version="${{ env.RYUJINX_BASE_VERSION }}" -p:DebugType=embedded -p:SourceRevisionId="${{ steps.git_short_hash.outputs.result }}" -p:ExtraDefineConstants=DISABLE_UPDATER src/Ryujinx.Gtk3 --self-contained true
-        if: github.event_name == 'pull_request' && matrix.platform.os != 'macos-13'
-
-      - name: Set executable bit
-        run: |
-          chmod +x ./publish/Ryujinx ./publish/Ryujinx.sh
-          chmod +x ./publish_sdl2_headless/Ryujinx.Headless.SDL2 ./publish_sdl2_headless/Ryujinx.sh
-          chmod +x ./publish_gtk/Ryujinx.Gtk3 ./publish_gtk/Ryujinx.sh
-        if: github.event_name == 'pull_request' && matrix.platform.os == 'ubuntu-latest'
-
+        run: dotnet publish -c "${{ matrix.configuration }}" -r "${{ matrix.DOTNET_RUNTIME_IDENTIFIER }}" -o ./publish_sdl2_headless /p:Version="1.1.0" /p:DebugType=embedded /p:SourceRevisionId="${{ steps.git_short_hash.outputs.result }}" /p:ExtraDefineConstants=DISABLE_UPDATER Ryujinx.Headless.SDL2 --self-contained
+        if: github.event_name == 'pull_request'
       - name: Upload Ryujinx artifact
-        uses: actions/upload-artifact@v4
+        uses: actions/upload-artifact@v2
         with:
-          name: ryujinx-${{ matrix.configuration }}-${{ env.RYUJINX_BASE_VERSION }}+${{ steps.git_short_hash.outputs.result }}-${{ matrix.platform.zip_os_name }}
+          name: ryujinx-${{ matrix.configuration }}-1.0.0+${{ steps.git_short_hash.outputs.result }}-${{ matrix.RELEASE_ZIP_OS_NAME }}
           path: publish
-        if: github.event_name == 'pull_request' && matrix.platform.os != 'macos-13'
-
+        if: github.event_name == 'pull_request'
       - name: Upload Ryujinx.Headless.SDL2 artifact
-        uses: actions/upload-artifact@v4
+        uses: actions/upload-artifact@v2
         with:
-          name: sdl2-ryujinx-headless-${{ matrix.configuration }}-${{ env.RYUJINX_BASE_VERSION }}+${{ steps.git_short_hash.outputs.result }}-${{ matrix.platform.zip_os_name }}
+          name: ryujinx-headless-sdl2-${{ matrix.configuration }}-1.0.0+${{ steps.git_short_hash.outputs.result }}-${{ matrix.RELEASE_ZIP_OS_NAME }}
           path: publish_sdl2_headless
-        if: github.event_name == 'pull_request' && matrix.platform.os != 'macos-13'
-
-      - name: Upload Ryujinx.Gtk3 artifact
-        uses: actions/upload-artifact@v4
-        with:
-          name: gtk-ryujinx-${{ matrix.configuration }}-${{ env.RYUJINX_BASE_VERSION }}+${{ steps.git_short_hash.outputs.result }}-${{ matrix.platform.zip_os_name }}
-          path: publish_gtk
-        if: github.event_name == 'pull_request' && matrix.platform.os != 'macos-13'
-
-  build_macos:
-    name: macOS Universal (${{ matrix.configuration }})
-    runs-on: ubuntu-latest
-    timeout-minutes: 45
-    strategy:
-      matrix:
-        configuration: [ Debug, Release ]
-
-    steps:
-      - uses: actions/checkout@v4
-
-      - uses: actions/setup-dotnet@v4
-        with:
-          global-json-file: global.json
-
-      - name: Setup LLVM 14
-        run: |
-          wget https://apt.llvm.org/llvm.sh
-          chmod +x llvm.sh
-          sudo ./llvm.sh 14
-
-      - name: Install rcodesign
-        run: |
-          mkdir -p $HOME/.bin
-          gh release download -R indygreg/apple-platform-rs -O apple-codesign.tar.gz -p 'apple-codesign-*-x86_64-unknown-linux-musl.tar.gz'
-          tar -xzvf apple-codesign.tar.gz --wildcards '*/rcodesign' --strip-components=1
-          rm apple-codesign.tar.gz
-          mv rcodesign $HOME/.bin/
-          echo "$HOME/.bin" >> $GITHUB_PATH
-        env:
-          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
-
-      - name: Get git short hash
-        id: git_short_hash
-        run: echo "result=$(git rev-parse --short "${{ github.sha }}")" >> $GITHUB_OUTPUT
-
-      - name: Change config filename
-        run: sed -r --in-place 's/\%\%RYUJINX_CONFIG_FILE_NAME\%\%/PRConfig\.json/g;' src/Ryujinx.Common/ReleaseInformation.cs
-        shell: bash
-        if: github.event_name == 'pull_request'
-
-      - name: Publish macOS Ryujinx
-        run: |
-          ./distribution/macos/create_macos_build_ava.sh . publish_tmp publish ./distribution/macos/entitlements.xml "${{ env.RYUJINX_BASE_VERSION }}" "${{ steps.git_short_hash.outputs.result }}" "${{ matrix.configuration }}" "-p:ExtraDefineConstants=DISABLE_UPDATER"
-
-      - name: Publish macOS Ryujinx.Headless.SDL2
-        run: |
-          ./distribution/macos/create_macos_build_headless.sh . publish_tmp_headless publish_headless ./distribution/macos/entitlements.xml "${{ env.RYUJINX_BASE_VERSION }}" "${{ steps.git_short_hash.outputs.result }}" "${{ matrix.configuration }}" "-p:ExtraDefineConstants=DISABLE_UPDATER"
-
-      - name: Upload Ryujinx artifact
-        uses: actions/upload-artifact@v4
-        with:
-          name: ryujinx-${{ matrix.configuration }}-${{ env.RYUJINX_BASE_VERSION }}+${{ steps.git_short_hash.outputs.result }}-macos_universal
-          path: "publish/*.tar.gz"
-        if: github.event_name == 'pull_request'
-
-      - name: Upload Ryujinx.Headless.SDL2 artifact
-        uses: actions/upload-artifact@v4
-        with:
-          name: sdl2-ryujinx-headless-${{ matrix.configuration }}-${{ env.RYUJINX_BASE_VERSION }}+${{ steps.git_short_hash.outputs.result }}-macos_universal
-          path: "publish_headless/*.tar.gz"
         if: github.event_name == 'pull_request'

.github/workflows/checks.yml

@@ -1,74 +0,0 @@
-name: Perform checks
-
-on:
-  pull_request:
-    branches: [ master ]
-    paths:
-      - '**'
-      - '!.github/**'
-      - '!*.yml'
-      - '!*.config'
-      - '!*.md'
-      - '.github/workflows/*.yml'
-
-permissions:
-  pull-requests: write
-  checks: write
-
-concurrency:
-  group: pr-checks-${{ github.event.number }}
-  cancel-in-progress: true
-
-jobs:
-  format:
-    runs-on: ubuntu-latest
-    steps:
-      - uses: actions/checkout@v4
-        with:
-          fetch-depth: 0
-
-      - uses: actions/setup-dotnet@v4
-        with:
-          global-json-file: global.json
-
-      - name: Overwrite csc problem matcher
-        run: echo "::add-matcher::.github/csc.json"
-
-      - run: dotnet restore
-
-      - name: Print dotnet format version
-        run: dotnet format --version
-
-      - name: Run dotnet format whitespace
-        run: |
-          dotnet format whitespace --verify-no-changes --report ./whitespace-report.json -v d
-
-      # For some unknown reason this step sometimes fails with exit code 139 (segfault?),
-      # so in that case we'll try again (3 tries max).
-      - name: Run dotnet format style
-        uses: TSRBerry/unstable-commands@v1
-        with:
-          commands: dotnet format style --severity info --verify-no-changes --report ./style-report.json -v d
-          timeout-minutes: 5
-          retry-codes: 139
-
-      # For some unknown reason this step sometimes fails with exit code 139 (segfault?),
-      # so in that case we'll try again (3 tries max).
-      - name: Run dotnet format analyzers
-        uses: TSRBerry/unstable-commands@v1
-        with:
-          commands: dotnet format analyzers --severity info --verify-no-changes --report ./analyzers-report.json -v d
-          timeout-minutes: 5
-          retry-codes: 139
-
-      - name: Upload report
-        if: failure()
-        uses: actions/upload-artifact@v4
-        with:
-          name: dotnet-format
-          path: ./*-report.json
-
-  pr_build:
-    uses: ./.github/workflows/build.yml
-    needs: format
-    secrets: inherit

.github/workflows/flatpak.yml

@@ -1,212 +0,0 @@
-name: Flatpak release job
-
-on:
-  workflow_call:
-    inputs:
-      ryujinx_version:
-        required: true
-        type: string
-
-
-concurrency: flatpak-release
-
-jobs:
-  release:
-    timeout-minutes: ${{ fromJSON(vars.JOB_TIMEOUT) }}
-    runs-on: ubuntu-latest
-
-    env:
-      NUGET_PACKAGES: ${{ github.workspace }}/.nuget/packages
-      GIT_COMMITTER_NAME: "RyujinxBot"
-      GIT_COMMITTER_EMAIL: "61127645+RyujinxBot@users.noreply.github.com"
-      RYUJINX_PROJECT_FILE: "src/Ryujinx/Ryujinx.csproj"
-      NUGET_SOURCES_DESTDIR: "nuget-sources"
-      RYUJINX_VERSION: "${{ inputs.ryujinx_version }}"
-
-    steps:
-      - uses: actions/checkout@v4
-        with:
-          path: Ryujinx
-
-      - uses: actions/setup-dotnet@v4
-        with:
-          global-json-file: Ryujinx/global.json
-
-      - name: Get version info
-        id: version_info
-        working-directory: Ryujinx
-        run: |
-          echo "git_hash=$(git rev-parse HEAD)" >> $GITHUB_OUTPUT
-
-      - uses: actions/checkout@v4
-        with:
-          repository: flathub/org.ryujinx.Ryujinx
-          token: ${{ secrets.RYUJINX_BOT_PAT }}
-          submodules: recursive
-          path: flathub
-
-      - name: Install dependencies
-        run: python -m pip install PyYAML lxml
-
-      - name: Restore Nuget packages
-        # With .NET 8.0.100, Microsoft.NET.ILLink.Tasks isn't restored by default and only seems to appears when publishing.
-        # So we just publish to grab the dependencies
-        run: |
-          dotnet publish -c Release -r linux-x64 Ryujinx/${{ env.RYUJINX_PROJECT_FILE }} --self-contained
-          dotnet publish -c Release -r linux-arm64 Ryujinx/${{ env.RYUJINX_PROJECT_FILE }} --self-contained
-
-      - name: Generate nuget_sources.json
-        shell: python
-        run: |
-          import hashlib
-          from pathlib import Path
-          import base64
-          import binascii
-          import json
-          import os
-          import urllib.request
-
-          sources = []
-
-
-          def create_source_from_external(name, version):
-              full_dir_path = Path(os.environ["NUGET_PACKAGES"]).joinpath(name).joinpath(version)
-              os.makedirs(full_dir_path, exist_ok=True)
-
-              filename = "{}.{}.nupkg".format(name, version)
-              url = "https://api.nuget.org/v3-flatcontainer/{}/{}/{}".format(
-                  name, version, filename
-              )
-
-              print(f"Processing {url}...")
-              response = urllib.request.urlopen(url)
-              sha512 = hashlib.sha512(response.read()).hexdigest()
-
-              return {
-                  "type": "file",
-                  "url": url,
-                  "sha512": sha512,
-                  "dest": os.environ["NUGET_SOURCES_DESTDIR"],
-                  "dest-filename": filename,
-              }
-
-
-          has_added_x64_apphost = False
-
-          for path in Path(os.environ["NUGET_PACKAGES"]).glob("**/*.nupkg.sha512"):
-              name = path.parent.parent.name
-              version = path.parent.name
-              filename = "{}.{}.nupkg".format(name, version)
-              url = "https://api.nuget.org/v3-flatcontainer/{}/{}/{}".format(
-                  name, version, filename
-              )
-
-              with path.open() as fp:
-                  sha512 = binascii.hexlify(base64.b64decode(fp.read())).decode("ascii")
-
-              sources.append(
-                  {
-                      "type": "file",
-                      "url": url,
-                      "sha512": sha512,
-                      "dest": os.environ["NUGET_SOURCES_DESTDIR"],
-                      "dest-filename": filename,
-                  }
-              )
-
-              # .NET will not add current installed application host to the list, force inject it here.
-              if not has_added_x64_apphost and name.startswith('microsoft.netcore.app.host'):
-                  sources.append(create_source_from_external("microsoft.netcore.app.host.linux-x64", version))
-                  has_added_x64_apphost = True
-
-          with open("flathub/nuget_sources.json", "w") as fp:
-              json.dump(sources, fp, indent=4)
-
-      - name: Update flatpak metadata
-        id: metadata
-        env:
-          RYUJINX_GIT_HASH: ${{ steps.version_info.outputs.git_hash }}
-        shell: python
-        run: |
-          import hashlib
-          import hmac
-          import json
-          import os
-          import yaml
-          from datetime import datetime
-          from lxml import etree
-          
-          
-          # Ensure we don't destroy multiline strings
-          def str_presenter(dumper, data):
-            if len(data.splitlines()) > 1:
-              return dumper.represent_scalar("tag:yaml.org,2002:str", data, style="|")
-            return dumper.represent_scalar("tag:yaml.org,2002:str", data)
-            
-            
-          yaml.representer.SafeRepresenter.add_representer(str, str_presenter)
-  
-          yaml_file = "flathub/org.ryujinx.Ryujinx.yml"
-          xml_file = "flathub/org.ryujinx.Ryujinx.appdata.xml"
-
-          with open(yaml_file, "r") as f:
-            data = yaml.safe_load(f)
-
-          for source in data["modules"][0]["sources"]:
-            if type(source) is str:
-              continue
-            if (
-              source["type"] == "git"
-              and source["url"] == "https://github.com/Ryujinx/Ryujinx.git"
-            ):
-              source["commit"] = os.environ['RYUJINX_GIT_HASH']
-
-          is_same_version = data["modules"][0]["build-options"]["env"]["RYUJINX_VERSION"] == os.environ['RYUJINX_VERSION']
-
-          with open(os.environ['GITHUB_OUTPUT'], "a") as gh_out:
-            if is_same_version:
-              gh_out.write(f"commit_message=Retry update to {os.environ['RYUJINX_VERSION']}")
-            else:
-              gh_out.write(f"commit_message=Update to {os.environ['RYUJINX_VERSION']}")
-
-          if not is_same_version:
-            data["modules"][0]["build-options"]["env"]["RYUJINX_VERSION"] = os.environ['RYUJINX_VERSION']
-
-            with open(yaml_file, "w") as f:
-                yaml.safe_dump(data, f, sort_keys=False)
-
-            parser = etree.XMLParser(remove_blank_text=True)
-            tree = etree.parse(xml_file, parser)
-
-            root = tree.getroot()
-
-            releases = root.find("releases")
-
-            element = etree.Element("release")
-            element.set("version", os.environ['RYUJINX_VERSION'])
-            element.set("date", datetime.now().date().isoformat())
-            releases.insert(0, element)
-
-            # Ensure 4 spaces
-            etree.indent(root, space="    ")
-
-            with open(xml_file, "wb") as f:
-              f.write(
-                etree.tostring(
-                  tree,
-                  pretty_print=True,
-                  encoding="UTF-8",
-                  doctype='<?xml version="1.0" encoding="UTF-8"?>',
-                )
-              )
-
-      - name: Push flatpak update
-        working-directory: flathub
-        env:
-          COMMIT_MESSAGE: ${{ steps.metadata.outputs.commit_message }}
-        run: |
-          git config user.name "${{ env.GIT_COMMITTER_NAME }}"
-          git config user.email "${{ env.GIT_COMMITTER_EMAIL }}"
-          git add .
-          git commit -m "$COMMIT_MESSAGE"
-          git push origin master

.github/workflows/mako.yml

@@ -1,41 +0,0 @@
-name: Mako
-on:
-  discussion:
-    types: [created, edited, answered, unanswered, category_changed]
-  discussion_comment:
-    types: [created, edited]
-  gollum:
-  issue_comment:
-    types: [created, edited]
-  issues:
-    types: [opened, edited, reopened, pinned, milestoned, demilestoned, assigned, unassigned, labeled, unlabeled]
-  pull_request_target:
-    types: [opened, edited, reopened, synchronize, ready_for_review, assigned, unassigned]
-
-jobs:
-  tasks:
-    name: Run Ryujinx tasks
-    permissions:
-      actions: read
-      contents: read
-      discussions: write
-      issues: write
-      pull-requests: write
-    runs-on: ubuntu-latest
-    steps:
-      - uses: actions/checkout@v4
-        if: github.event_name == 'pull_request_target'
-        with:
-          # Ensure we pin the source origin as pull_request_target run under forks.
-          fetch-depth: 0
-          repository: Ryujinx/Ryujinx
-          ref: master
-
-      - name: Run Mako command
-        uses: Ryujinx/Ryujinx-Mako@master
-        with:
-          command: exec-ryujinx-tasks
-          args: --event-name "${{ github.event_name }}" --event-path "${{ github.event_path }}" -w "${{ github.workspace }}" "${{ github.repository }}" "${{ github.run_id }}"
-          app_id: ${{ secrets.MAKO_APP_ID }}
-          private_key: ${{ secrets.MAKO_PRIVATE_KEY }}
-          installation_id: ${{ secrets.MAKO_INSTALLATION_ID }}

.github/workflows/nightly_pr_comment.yml

@@ -1,17 +1,14 @@
 name: Comment PR artifacts links
-
 on:
   workflow_run:
-    workflows: ['Perform checks']
+    workflows: ['Build job']
     types: [completed]
-
 jobs:
   pr_comment:
     if: github.event.workflow_run.event == 'pull_request' && github.event.workflow_run.conclusion == 'success'
     runs-on: ubuntu-latest
-    timeout-minutes: ${{ fromJSON(vars.JOB_TIMEOUT) }}
     steps:
-      - uses: actions/github-script@v6
+      - uses: actions/github-script@v3
         with:
           script: |
             const {owner, repo} = context.repo;
@@ -19,7 +16,7 @@ jobs:
             const pull_head_sha = '${{github.event.workflow_run.head_sha}}';
 
             const issue_number = await (async () => {
-              const pulls = await github.rest.pulls.list({owner, repo});
+              const pulls = await github.pulls.list({owner, repo});
               for await (const {data} of github.paginate.iterator(pulls)) {
                 for (const pull of data) {
                   if (pull.head.sha === pull_head_sha) {
@@ -34,38 +31,28 @@ jobs:
               return core.error(`No matching pull request found`);
             }
 
-            const {data: {artifacts}} = await github.rest.actions.listWorkflowRunArtifacts({owner, repo, run_id});
+            const {data: {artifacts}} = await github.actions.listWorkflowRunArtifacts({owner, repo, run_id});
             if (!artifacts.length) {
               return core.error(`No artifacts found`);
             }
             let body = `Download the artifacts for this pull request:\n`;
-            let hidden_gtk_artifacts = `\n\n <details><summary>Old GUI (GTK3)</summary>\n`;
-            let hidden_headless_artifacts = `\n\n <details><summary>GUI-less (SDL2)</summary>\n`;
             let hidden_debug_artifacts = `\n\n <details><summary>Only for Developers</summary>\n`;
             for (const art of artifacts) {
-              if(art.name.includes('Debug')) {
+              if(art.name.includes('Debug')){
                 hidden_debug_artifacts += `\n* [${art.name}](https://nightly.link/${owner}/${repo}/actions/artifacts/${art.id}.zip)`;
-              } else if(art.name.includes('gtk-ryujinx')) {
-                hidden_gtk_artifacts += `\n* [${art.name}](https://nightly.link/${owner}/${repo}/actions/artifacts/${art.id}.zip)`;
-              } else if(art.name.includes('sdl2-ryujinx-headless')) {
-                hidden_headless_artifacts += `\n* [${art.name}](https://nightly.link/${owner}/${repo}/actions/artifacts/${art.id}.zip)`;
-              } else {
+              }else{
                 body += `\n* [${art.name}](https://nightly.link/${owner}/${repo}/actions/artifacts/${art.id}.zip)`;
               }
             }
-            hidden_gtk_artifacts += `\n</details>`;
-            hidden_headless_artifacts += `\n</details>`;
             hidden_debug_artifacts += `\n</details>`;
-            body += hidden_gtk_artifacts;
-            body += hidden_headless_artifacts;
             body += hidden_debug_artifacts;
 
-            const {data: comments} = await github.rest.issues.listComments({repo, owner, issue_number});
+            const {data: comments} = await github.issues.listComments({repo, owner, issue_number});
             const existing_comment = comments.find((c) => c.user.login === 'github-actions[bot]');
             if (existing_comment) {
               core.info(`Updating comment ${existing_comment.id}`);
-              await github.rest.issues.updateComment({repo, owner, comment_id: existing_comment.id, body});
+              await github.issues.updateComment({repo, owner, comment_id: existing_comment.id, body});
             } else {
               core.info(`Creating a comment`);
-              await github.rest.issues.createComment({repo, owner, issue_number, body});
-            }
+              await github.issues.createComment({repo, owner, issue_number, body});
+            }

.github/workflows/pr_triage.yml

@@ -1,28 +0,0 @@
-name: "Pull Request Triage"
-on:
-  pull_request_target:
-    types: [opened, ready_for_review]
-
-jobs:
-  triage:
-    permissions:
-      contents: read
-      pull-requests: write
-
-    runs-on: ubuntu-latest
-
-    steps:
-      # Grab sources to get latest labeler.yml
-      - name: Fetch sources
-        uses: actions/checkout@v4
-        with:
-           # Ensure we pin the source origin as pull_request_target run under forks.
-           fetch-depth: 0
-           repository: Ryujinx/Ryujinx
-           ref: master
-
-      - name: Update labels based on changes
-        uses: actions/labeler@v5
-        with:
-          sync-labels: true
-          dot: true

.github/workflows/release.yml

@@ -6,127 +6,77 @@ on:
   push:
     branches: [ master ]
     paths-ignore:
-      - '.github/**'
+      - '.github/*'
+      - '.github/ISSUE_TEMPLATE/**'
       - '*.yml'
-      - '*.json'
-      - '*.config'
-      - '*.md'
+      - 'README.md'
 
-concurrency: release
-
-env:
-  POWERSHELL_TELEMETRY_OPTOUT: 1
-  DOTNET_CLI_TELEMETRY_OPTOUT: 1
-  RYUJINX_BASE_VERSION: "1.1"
-  RYUJINX_TARGET_RELEASE_CHANNEL_NAME: "master"
-  RYUJINX_TARGET_RELEASE_CHANNEL_OWNER: "Ryujinx"
-  RYUJINX_TARGET_RELEASE_CHANNEL_REPO: "release-channel-master"
 
 jobs:
-  tag:
-    name: Create tag
-    runs-on: ubuntu-20.04
-    steps:
-      - name: Get version info
-        id: version_info
-        run: |
-          echo "build_version=${{ env.RYUJINX_BASE_VERSION }}.${{ github.run_number }}" >> $GITHUB_OUTPUT
-        shell: bash
-
-      - name: Create tag
-        uses: actions/github-script@v6
-        with:
-          script: |
-            github.rest.git.createRef({
-              owner: context.repo.owner,
-              repo: context.repo.repo,
-              ref: 'refs/tags/${{ steps.version_info.outputs.build_version }}',
-              sha: context.sha
-            })
-
-      - name: Create release
-        uses: ncipollo/release-action@v1
-        with:
-          name: ${{ steps.version_info.outputs.build_version }}
-          tag: ${{ steps.version_info.outputs.build_version }}
-          body: "For more information about this release please check out the official [Changelog](https://github.com/Ryujinx/Ryujinx/wiki/Changelog)."
-          omitBodyDuringUpdate: true
-          owner: ${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}
-          repo: ${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}
-          token: ${{ secrets.RELEASE_TOKEN }}
-
   release:
-    name: Release for ${{ matrix.platform.name }}
-    runs-on: ${{ matrix.platform.os }}
-    timeout-minutes: ${{ fromJSON(vars.JOB_TIMEOUT) }}
-    strategy:
-      matrix:
-        platform:
-          - { name: win-x64,     os: windows-latest, zip_os_name: win_x64     }
-          - { name: linux-x64,   os: ubuntu-latest,  zip_os_name: linux_x64   }
-          - { name: linux-arm64, os: ubuntu-latest,  zip_os_name: linux_arm64 }
+    runs-on: windows-latest
+
+    env:
+      POWERSHELL_TELEMETRY_OPTOUT: 1
+      DOTNET_CLI_TELEMETRY_OPTOUT: 1
+      RYUJINX_BASE_VERSION: "1.1"
+      RYUJINX_TARGET_RELEASE_CHANNEL_NAME: "master"
+      RYUJINX_TARGET_RELEASE_CHANNEL_OWNER: "Ryujinx"
+      RYUJINX_TARGET_RELEASE_CHANNEL_REPO: "release-channel-master"
+
     steps:
-      - uses: actions/checkout@v4
-
-      - uses: actions/setup-dotnet@v4
+      - uses: actions/checkout@v2
+      - uses: actions/setup-dotnet@v1
         with:
-          global-json-file: global.json
-
-      - name: Overwrite csc problem matcher
-        run: echo "::add-matcher::.github/csc.json"
-
+          dotnet-version: 6.0.x
+      - name: Ensure NuGet Source
+        uses: fabriciomurta/ensure-nuget-source@v1
+      - name: Clear
+        run: dotnet clean && dotnet nuget locals all --clear
       - name: Get version info
         id: version_info
         run: |
-          echo "build_version=${{ env.RYUJINX_BASE_VERSION }}.${{ github.run_number }}" >> $GITHUB_OUTPUT
-          echo "git_short_hash=$(git rev-parse --short "${{ github.sha }}")" >> $GITHUB_OUTPUT
+          echo "::set-output name=build_version::${{ env.RYUJINX_BASE_VERSION }}.${{ github.run_number }}"
+          echo "::set-output name=git_short_hash::$(git rev-parse --short "${{ github.sha }}")"
         shell: bash
-
       - name: Configure for release
         run: |
-          sed -r --in-place 's/\%\%RYUJINX_BUILD_VERSION\%\%/${{ steps.version_info.outputs.build_version }}/g;' src/Ryujinx.Common/ReleaseInformation.cs
-          sed -r --in-place 's/\%\%RYUJINX_BUILD_GIT_HASH\%\%/${{ steps.version_info.outputs.git_short_hash }}/g;' src/Ryujinx.Common/ReleaseInformation.cs
-          sed -r --in-place 's/\%\%RYUJINX_TARGET_RELEASE_CHANNEL_NAME\%\%/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_NAME }}/g;' src/Ryujinx.Common/ReleaseInformation.cs
-          sed -r --in-place 's/\%\%RYUJINX_TARGET_RELEASE_CHANNEL_OWNER\%\%/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}/g;' src/Ryujinx.Common/ReleaseInformation.cs
-          sed -r --in-place 's/\%\%RYUJINX_TARGET_RELEASE_CHANNEL_REPO\%\%/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}/g;' src/Ryujinx.Common/ReleaseInformation.cs
-          sed -r --in-place 's/\%\%RYUJINX_CONFIG_FILE_NAME\%\%/Config\.json/g;' src/Ryujinx.Common/ReleaseInformation.cs
+          sed -r --in-place 's/\%\%RYUJINX_BUILD_VERSION\%\%/${{ steps.version_info.outputs.build_version }}/g;' Ryujinx.Common/ReleaseInformations.cs
+          sed -r --in-place 's/\%\%RYUJINX_BUILD_GIT_HASH\%\%/${{ steps.version_info.outputs.git_short_hash }}/g;' Ryujinx.Common/ReleaseInformations.cs
+          sed -r --in-place 's/\%\%RYUJINX_TARGET_RELEASE_CHANNEL_NAME\%\%/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_NAME }}/g;' Ryujinx.Common/ReleaseInformations.cs
+          sed -r --in-place 's/\%\%RYUJINX_TARGET_RELEASE_CHANNEL_OWNER\%\%/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}/g;' Ryujinx.Common/ReleaseInformations.cs
+          sed -r --in-place 's/\%\%RYUJINX_TARGET_RELEASE_CHANNEL_REPO\%\%/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}/g;' Ryujinx.Common/ReleaseInformations.cs
         shell: bash
-
       - name: Create output dir
         run: "mkdir release_output"
-
-      - name: Publish
+      - name: Publish Windows
         run: |
-          dotnet publish -c Release -r "${{ matrix.platform.name }}" -o ./publish_ava/publish -p:Version="${{ steps.version_info.outputs.build_version }}" -p:SourceRevisionId="${{ steps.version_info.outputs.git_short_hash }}" -p:DebugType=embedded src/Ryujinx --self-contained true
-          dotnet publish -c Release -r "${{ matrix.platform.name }}" -o ./publish_sdl2_headless/publish -p:Version="${{ steps.version_info.outputs.build_version }}" -p:SourceRevisionId="${{ steps.version_info.outputs.git_short_hash }}" -p:DebugType=embedded src/Ryujinx.Headless.SDL2 --self-contained true
-
+          dotnet publish -c Release -r win-x64 -o ./publish_windows/publish /p:Version="${{ steps.version_info.outputs.build_version }}" /p:SourceRevisionId="${{ steps.version_info.outputs.git_short_hash }}" /p:DebugType=embedded Ryujinx --self-contained
+          dotnet publish -c Release -r win-x64 -o ./publish_windows_sdl2_headless/publish /p:Version="${{ steps.version_info.outputs.build_version }}" /p:SourceRevisionId="${{ steps.version_info.outputs.git_short_hash }}" /p:DebugType=embedded Ryujinx.Headless.SDL2 --self-contained
       - name: Packing Windows builds
-        if: matrix.platform.os == 'windows-latest'
         run: |
-          pushd publish_ava
-          cp publish/Ryujinx.exe publish/Ryujinx.Ava.exe
-          7z a ../release_output/ryujinx-${{ steps.version_info.outputs.build_version }}-${{ matrix.platform.zip_os_name }}.zip publish
-          7z a ../release_output/test-ava-ryujinx-${{ steps.version_info.outputs.build_version }}-${{ matrix.platform.zip_os_name }}.zip publish
+          pushd publish_windows
+          7z a ../release_output/ryujinx-${{ steps.version_info.outputs.build_version }}-win_x64.zip publish
           popd
 
-          pushd publish_sdl2_headless
-          7z a ../release_output/sdl2-ryujinx-headless-${{ steps.version_info.outputs.build_version }}-${{ matrix.platform.zip_os_name }}.zip publish
+          pushd publish_windows_sdl2_headless
+          7z a ../release_output/ryujinx-headless-sdl2-${{ steps.version_info.outputs.build_version }}-win_x64.zip publish
           popd
         shell: bash
 
-      - name: Packing Linux builds
-        if: matrix.platform.os == 'ubuntu-latest'
+      - name: Publish Linux
         run: |
-          pushd publish_ava
-          cp publish/Ryujinx publish/Ryujinx.Ava
-          chmod +x publish/Ryujinx.sh publish/Ryujinx.Ava publish/Ryujinx
-          tar -czvf ../release_output/ryujinx-${{ steps.version_info.outputs.build_version }}-${{ matrix.platform.zip_os_name }}.tar.gz publish
-          tar -czvf ../release_output/test-ava-ryujinx-${{ steps.version_info.outputs.build_version }}-${{ matrix.platform.zip_os_name }}.tar.gz publish
+          dotnet publish -c Release -r linux-x64 -o ./publish_linux/publish /p:Version="${{ steps.version_info.outputs.build_version }}" /p:SourceRevisionId="${{ steps.version_info.outputs.git_short_hash }}" /p:DebugType=embedded Ryujinx --self-contained
+          dotnet publish -c Release -r linux-x64 -o ./publish_linux_sdl2_headless/publish /p:Version="${{ steps.version_info.outputs.build_version }}" /p:SourceRevisionId="${{ steps.version_info.outputs.git_short_hash }}" /p:DebugType=embedded Ryujinx.Headless.SDL2 --self-contained
+
+      - name: Packing Linux builds
+        run: |
+          pushd publish_linux
+          tar -czvf ../release_output/ryujinx-${{ steps.version_info.outputs.build_version }}-linux_x64.tar.gz publish
           popd
 
-          pushd publish_sdl2_headless
-          chmod +x publish/Ryujinx.sh publish/Ryujinx.Headless.SDL2
-          tar -czvf ../release_output/sdl2-ryujinx-headless-${{ steps.version_info.outputs.build_version }}-${{ matrix.platform.zip_os_name }}.tar.gz publish
+          pushd publish_linux_sdl2_headless
+          tar -czvf ../release_output/ryujinx-headless-sdl2-${{ steps.version_info.outputs.build_version }}-linux_x64.tar.gz publish
           popd
         shell: bash
 
@@ -136,83 +86,10 @@ jobs:
           name: ${{ steps.version_info.outputs.build_version }}
           artifacts: "release_output/*.tar.gz,release_output/*.zip"
           tag: ${{ steps.version_info.outputs.build_version }}
-          body: "For more information about this release please check out the official [Changelog](https://github.com/Ryujinx/Ryujinx/wiki/Changelog)."
-          omitBodyDuringUpdate: true
+          body: "For more informations about this release please check out the official [Changelog](https://github.com/Ryujinx/Ryujinx/wiki/Changelog)."
           allowUpdates: true
+          removeArtifacts: true
           replacesArtifacts: true
           owner: ${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}
           repo: ${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}
           token: ${{ secrets.RELEASE_TOKEN }}
-
-  macos_release:
-    name: Release MacOS universal
-    runs-on: ubuntu-latest
-    timeout-minutes: ${{ fromJSON(vars.JOB_TIMEOUT) }}
-    steps:
-      - uses: actions/checkout@v4
-
-      - uses: actions/setup-dotnet@v4
-        with:
-          global-json-file: global.json
-
-      - name: Setup LLVM 15
-        run: |
-          wget https://apt.llvm.org/llvm.sh
-          chmod +x llvm.sh
-          sudo ./llvm.sh 15
-
-      - name: Install rcodesign
-        run: |
-          mkdir -p $HOME/.bin
-          gh release download -R indygreg/apple-platform-rs -O apple-codesign.tar.gz -p 'apple-codesign-*-x86_64-unknown-linux-musl.tar.gz'
-          tar -xzvf apple-codesign.tar.gz --wildcards '*/rcodesign' --strip-components=1
-          rm apple-codesign.tar.gz
-          mv rcodesign $HOME/.bin/
-          echo "$HOME/.bin" >> $GITHUB_PATH
-        env:
-          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
-
-      - name: Get version info
-        id: version_info
-        run: |
-          echo "build_version=${{ env.RYUJINX_BASE_VERSION }}.${{ github.run_number }}" >> $GITHUB_OUTPUT
-          echo "git_short_hash=$(git rev-parse --short "${{ github.sha }}")" >> $GITHUB_OUTPUT
-
-      - name: Configure for release
-        run: |
-          sed -r --in-place 's/\%\%RYUJINX_BUILD_VERSION\%\%/${{ steps.version_info.outputs.build_version }}/g;' src/Ryujinx.Common/ReleaseInformation.cs
-          sed -r --in-place 's/\%\%RYUJINX_BUILD_GIT_HASH\%\%/${{ steps.version_info.outputs.git_short_hash }}/g;' src/Ryujinx.Common/ReleaseInformation.cs
-          sed -r --in-place 's/\%\%RYUJINX_TARGET_RELEASE_CHANNEL_NAME\%\%/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_NAME }}/g;' src/Ryujinx.Common/ReleaseInformation.cs
-          sed -r --in-place 's/\%\%RYUJINX_TARGET_RELEASE_CHANNEL_OWNER\%\%/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}/g;' src/Ryujinx.Common/ReleaseInformation.cs
-          sed -r --in-place 's/\%\%RYUJINX_TARGET_RELEASE_CHANNEL_REPO\%\%/${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}/g;' src/Ryujinx.Common/ReleaseInformation.cs
-          sed -r --in-place 's/\%\%RYUJINX_CONFIG_FILE_NAME\%\%/Config\.json/g;' src/Ryujinx.Common/ReleaseInformation.cs
-        shell: bash
-
-      - name: Publish macOS Ryujinx
-        run: |
-          ./distribution/macos/create_macos_build_ava.sh . publish_tmp_ava publish_ava ./distribution/macos/entitlements.xml "${{ steps.version_info.outputs.build_version }}" "${{ steps.version_info.outputs.git_short_hash }}" Release
-
-      - name: Publish macOS Ryujinx.Headless.SDL2
-        run: |
-          ./distribution/macos/create_macos_build_headless.sh . publish_tmp_headless publish_headless ./distribution/macos/entitlements.xml "${{ steps.version_info.outputs.build_version }}" "${{ steps.version_info.outputs.git_short_hash }}" Release
-
-      - name: Pushing new release
-        uses: ncipollo/release-action@v1
-        with:
-          name: ${{ steps.version_info.outputs.build_version }}
-          artifacts: "publish_ava/*.tar.gz, publish_headless/*.tar.gz"
-          tag: ${{ steps.version_info.outputs.build_version }}
-          body: "For more information about this release please check out the official [Changelog](https://github.com/Ryujinx/Ryujinx/wiki/Changelog)."
-          omitBodyDuringUpdate: true
-          allowUpdates: true
-          replacesArtifacts: true
-          owner: ${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_OWNER }}
-          repo: ${{ env.RYUJINX_TARGET_RELEASE_CHANNEL_REPO }}
-          token: ${{ secrets.RELEASE_TOKEN }}
-
-  flatpak_release:
-    uses: ./.github/workflows/flatpak.yml
-    needs: release
-    with:
-      ryujinx_version: "1.1.${{ github.run_number }}"
-    secrets: inherit

.gitignore

@@ -74,9 +74,6 @@ _TeamCity*
 # DotCover is a Code Coverage Tool
 *.dotCover
 
-# Rider is a Visual Studio alternative
-.idea/*
-
 # NCrunch
 *.ncrunch*
 .*crunch*.local.xml
@@ -125,9 +122,6 @@ ClientBin/
 packages/*
 *.config
 
-# Include nuget.config
-!nuget.config
-
 # RIA/Silverlight projects
 Generated_Code/
 
@@ -170,6 +164,3 @@ launchSettings.json
 
 # NetCore Publishing Profiles
 PublishProfiles/
-
-# Glade backup files
-*.glade~

ARMeilleure/ARMeilleure.csproj

@@ -0,0 +1,12 @@
+<Project Sdk="Microsoft.NET.Sdk">
+
+  <PropertyGroup>
+    <TargetFramework>net6.0</TargetFramework>
+    <AllowUnsafeBlocks>true</AllowUnsafeBlocks>
+  </PropertyGroup>
+
+  <ItemGroup>
+    <ProjectReference Include="..\Ryujinx.Common\Ryujinx.Common.csproj" />
+  </ItemGroup>
+
+</Project>

ARMeilleure/Allocators.cs

@@ -1,4 +1,4 @@
-using ARMeilleure.Common;
+using ARMeilleure.Common;
 using System;
 using System.Runtime.CompilerServices;
 
@@ -23,7 +23,10 @@ namespace ARMeilleure
         [MethodImpl(MethodImplOptions.AggressiveInlining)]
         private static ArenaAllocator GetAllocator(ref ArenaAllocator alloc, uint pageSize, uint pageCount)
         {
-            alloc ??= new ArenaAllocator(pageSize, pageCount);
+            if (alloc == null)
+            {
+                alloc = new ArenaAllocator(pageSize, pageCount);
+            }
 
             return alloc;
         }

ARMeilleure/CodeGen/CompiledFunction.cs

@@ -0,0 +1,56 @@
+using ARMeilleure.CodeGen.Linking;
+using ARMeilleure.CodeGen.Unwinding;
+using ARMeilleure.Translation.Cache;
+using System;
+using System.Runtime.InteropServices;
+
+namespace ARMeilleure.CodeGen
+{
+    /// <summary>
+    /// Represents a compiled function.
+    /// </summary>
+    readonly struct CompiledFunction
+    {
+        /// <summary>
+        /// Gets the machine code of the <see cref="CompiledFunction"/>.
+        /// </summary>
+        public byte[] Code { get; }
+
+        /// <summary>
+        /// Gets the <see cref="Unwinding.UnwindInfo"/> of the <see cref="CompiledFunction"/>.
+        /// </summary>
+        public UnwindInfo UnwindInfo { get; }
+
+        /// <summary>
+        /// Gets the <see cref="Linking.RelocInfo"/> of the <see cref="CompiledFunction"/>.
+        /// </summary>
+        public RelocInfo RelocInfo { get; }
+
+        /// <summary>
+        /// Initializes a new instance of the <see cref="CompiledFunction"/> struct with the specified machine code,
+        /// unwind info and relocation info.
+        /// </summary>
+        /// <param name="code">Machine code</param>
+        /// <param name="unwindInfo">Unwind info</param>
+        /// <param name="relocInfo">Relocation info</param>
+        internal CompiledFunction(byte[] code, UnwindInfo unwindInfo, RelocInfo relocInfo)
+        {
+            Code       = code;
+            UnwindInfo = unwindInfo;
+            RelocInfo  = relocInfo;
+        }
+
+        /// <summary>
+        /// Maps the <see cref="CompiledFunction"/> onto the <see cref="JitCache"/> and returns a delegate of type
+        /// <typeparamref name="T"/> pointing to the mapped function.
+        /// </summary>
+        /// <typeparam name="T">Type of delegate</typeparam>
+        /// <returns>A delegate of type <typeparamref name="T"/> pointing to the mapped function</returns>
+        public T Map<T>()
+        {
+            IntPtr codePtr = JitCache.Map(this);
+
+            return Marshal.GetDelegateForFunctionPointer<T>(codePtr);
+        }
+    }
+}

ARMeilleure/CodeGen/Linking/RelocEntry.cs

@@ -35,4 +35,4 @@ namespace ARMeilleure.CodeGen.Linking
             return $"({nameof(Position)} = {Position}, {nameof(Symbol)} = {Symbol})";
         }
     }
-}
+}

ARMeilleure/CodeGen/Linking/RelocInfo.cs

@@ -29,4 +29,4 @@ namespace ARMeilleure.CodeGen.Linking
             _entries = entries;
         }
     }
-}
+}

ARMeilleure/CodeGen/Linking/Symbol.cs

@@ -1,4 +1,4 @@
-using System;
+using System;
 
 namespace ARMeilleure.CodeGen.Linking
 {
@@ -58,6 +58,7 @@ namespace ARMeilleure.CodeGen.Linking
         /// <param name="a">First instance</param>
         /// <param name="b">Second instance</param>
         /// <returns><see langword="true"/> if not equal; otherwise <see langword="false"/></returns>
+        /// <inheritdoc/>
         public static bool operator !=(Symbol a, Symbol b)
         {
             return !(a == b);

ARMeilleure/CodeGen/Linking/SymbolType.cs

@@ -1,4 +1,4 @@
-namespace ARMeilleure.CodeGen.Linking
+namespace ARMeilleure.CodeGen.Linking
 {
     /// <summary>
     /// Types of <see cref="Symbol"/>.
@@ -23,6 +23,6 @@ namespace ARMeilleure.CodeGen.Linking
         /// <summary>
         /// Refers to a special symbol which is handled by <see cref="Translation.PTC.Ptc.PatchCode"/>.
         /// </summary>
-        Special,
+        Special
     }
 }

ARMeilleure/CodeGen/Optimizations/BlockPlacement.cs

@@ -1,4 +1,4 @@
-using ARMeilleure.IntermediateRepresentation;
+using ARMeilleure.IntermediateRepresentation;
 using ARMeilleure.Translation;
 using System.Diagnostics;
 using static ARMeilleure.IntermediateRepresentation.Operand.Factory;

ARMeilleure/CodeGen/Optimizations/ConstantFolding.cs

@@ -0,0 +1,305 @@
+using ARMeilleure.IntermediateRepresentation;
+using System;
+using static ARMeilleure.IntermediateRepresentation.Operand.Factory;
+
+namespace ARMeilleure.CodeGen.Optimizations
+{
+    static class ConstantFolding
+    {
+        public static void RunPass(Operation operation)
+        {
+            if (operation.Destination == default || operation.SourcesCount == 0)
+            {
+                return;
+            }
+
+            if (!AreAllSourcesConstant(operation))
+            {
+                return;
+            }
+
+            OperandType type = operation.Destination.Type;
+
+            switch (operation.Instruction)
+            {
+                case Instruction.Add:
+                    if (operation.GetSource(0).Relocatable ||
+                        operation.GetSource(1).Relocatable)
+                    {
+                        break;
+                    }
+
+                    if (type == OperandType.I32)
+                    {
+                        EvaluateBinaryI32(operation, (x, y) => x + y);
+                    }
+                    else if (type == OperandType.I64)
+                    {
+                        EvaluateBinaryI64(operation, (x, y) => x + y);
+                    }
+                    break;
+
+                case Instruction.BitwiseAnd:
+                    if (type == OperandType.I32)
+                    {
+                        EvaluateBinaryI32(operation, (x, y) => x & y);
+                    }
+                    else if (type == OperandType.I64)
+                    {
+                        EvaluateBinaryI64(operation, (x, y) => x & y);
+                    }
+                    break;
+
+                case Instruction.BitwiseExclusiveOr:
+                    if (type == OperandType.I32)
+                    {
+                        EvaluateBinaryI32(operation, (x, y) => x ^ y);
+                    }
+                    else if (type == OperandType.I64)
+                    {
+                        EvaluateBinaryI64(operation, (x, y) => x ^ y);
+                    }
+                    break;
+
+                case Instruction.BitwiseNot:
+                    if (type == OperandType.I32)
+                    {
+                        EvaluateUnaryI32(operation, (x) => ~x);
+                    }
+                    else if (type == OperandType.I64)
+                    {
+                        EvaluateUnaryI64(operation, (x) => ~x);
+                    }
+                    break;
+
+                case Instruction.BitwiseOr:
+                    if (type == OperandType.I32)
+                    {
+                        EvaluateBinaryI32(operation, (x, y) => x | y);
+                    }
+                    else if (type == OperandType.I64)
+                    {
+                        EvaluateBinaryI64(operation, (x, y) => x | y);
+                    }
+                    break;
+
+                case Instruction.ConvertI64ToI32:
+                    if (type == OperandType.I32)
+                    {
+                        EvaluateUnaryI32(operation, (x) => x);
+                    }
+                    break;
+
+                case Instruction.Copy:
+                    if (type == OperandType.I32)
+                    {
+                        EvaluateUnaryI32(operation, (x) => x);
+                    }
+                    else if (type == OperandType.I64)
+                    {
+                        EvaluateUnaryI64(operation, (x) => x);
+                    }
+                    break;
+
+                case Instruction.Divide:
+                    if (type == OperandType.I32)
+                    {
+                        EvaluateBinaryI32(operation, (x, y) => y != 0 ? x / y : 0);
+                    }
+                    else if (type == OperandType.I64)
+                    {
+                        EvaluateBinaryI64(operation, (x, y) => y != 0 ? x / y : 0);
+                    }
+                    break;
+
+                case Instruction.DivideUI:
+                    if (type == OperandType.I32)
+                    {
+                        EvaluateBinaryI32(operation, (x, y) => y != 0 ? (int)((uint)x / (uint)y) : 0);
+                    }
+                    else if (type == OperandType.I64)
+                    {
+                        EvaluateBinaryI64(operation, (x, y) => y != 0 ? (long)((ulong)x / (ulong)y) : 0);
+                    }
+                    break;
+
+                 case Instruction.Multiply:
+                    if (type == OperandType.I32)
+                    {
+                        EvaluateBinaryI32(operation, (x, y) => x * y);
+                    }
+                    else if (type == OperandType.I64)
+                    {
+                        EvaluateBinaryI64(operation, (x, y) => x * y);
+                    }
+                    break;
+
+                case Instruction.Negate:
+                    if (type == OperandType.I32)
+                    {
+                        EvaluateUnaryI32(operation, (x) => -x);
+                    }
+                    else if (type == OperandType.I64)
+                    {
+                        EvaluateUnaryI64(operation, (x) => -x);
+                    }
+                    break;
+
+                case Instruction.ShiftLeft:
+                    if (type == OperandType.I32)
+                    {
+                        EvaluateBinaryI32(operation, (x, y) => x << y);
+                    }
+                    else if (type == OperandType.I64)
+                    {
+                        EvaluateBinaryI64(operation, (x, y) => x << (int)y);
+                    }
+                    break;
+
+                case Instruction.ShiftRightSI:
+                    if (type == OperandType.I32)
+                    {
+                        EvaluateBinaryI32(operation, (x, y) => x >> y);
+                    }
+                    else if (type == OperandType.I64)
+                    {
+                        EvaluateBinaryI64(operation, (x, y) => x >> (int)y);
+                    }
+                    break;
+
+                case Instruction.ShiftRightUI:
+                    if (type == OperandType.I32)
+                    {
+                        EvaluateBinaryI32(operation, (x, y) => (int)((uint)x >> y));
+                    }
+                    else if (type == OperandType.I64)
+                    {
+                        EvaluateBinaryI64(operation, (x, y) => (long)((ulong)x >> (int)y));
+                    }
+                    break;
+
+                case Instruction.SignExtend16:
+                    if (type == OperandType.I32)
+                    {
+                        EvaluateUnaryI32(operation, (x) => (short)x);
+                    }
+                    else if (type == OperandType.I64)
+                    {
+                        EvaluateUnaryI64(operation, (x) => (short)x);
+                    }
+                    break;
+
+                case Instruction.SignExtend32:
+                    if (type == OperandType.I32)
+                    {
+                        EvaluateUnaryI32(operation, (x) => x);
+                    }
+                    else if (type == OperandType.I64)
+                    {
+                        EvaluateUnaryI64(operation, (x) => (int)x);
+                    }
+                    break;
+
+                case Instruction.SignExtend8:
+                    if (type == OperandType.I32)
+                    {
+                        EvaluateUnaryI32(operation, (x) => (sbyte)x);
+                    }
+                    else if (type == OperandType.I64)
+                    {
+                        EvaluateUnaryI64(operation, (x) => (sbyte)x);
+                    }
+                    break;
+
+                case Instruction.ZeroExtend16:
+                    if (type == OperandType.I32)
+                    {
+                        EvaluateUnaryI32(operation, (x) => (ushort)x);
+                    }
+                    else if (type == OperandType.I64)
+                    {
+                        EvaluateUnaryI64(operation, (x) => (ushort)x);
+                    }
+                    break;
+
+                case Instruction.ZeroExtend32:
+                    if (type == OperandType.I32)
+                    {
+                        EvaluateUnaryI32(operation, (x) => x);
+                    }
+                    else if (type == OperandType.I64)
+                    {
+                        EvaluateUnaryI64(operation, (x) => (uint)x);
+                    }
+                    break;
+
+                case Instruction.ZeroExtend8:
+                    if (type == OperandType.I32)
+                    {
+                        EvaluateUnaryI32(operation, (x) => (byte)x);
+                    }
+                    else if (type == OperandType.I64)
+                    {
+                        EvaluateUnaryI64(operation, (x) => (byte)x);
+                    }
+                    break;
+
+                case Instruction.Subtract:
+                    if (type == OperandType.I32)
+                    {
+                        EvaluateBinaryI32(operation, (x, y) => x - y);
+                    }
+                    else if (type == OperandType.I64)
+                    {
+                        EvaluateBinaryI64(operation, (x, y) => x - y);
+                    }
+                    break;
+            }
+        }
+
+        private static bool AreAllSourcesConstant(Operation operation)
+        {
+            for (int index = 0; index < operation.SourcesCount; index++)
+            {
+                Operand srcOp = operation.GetSource(index);
+
+                if (srcOp.Kind != OperandKind.Constant)
+                {
+                    return false;
+                }
+            }
+
+            return true;
+        }
+
+        private static void EvaluateUnaryI32(Operation operation, Func<int, int> op)
+        {
+            int x = operation.GetSource(0).AsInt32();
+
+            operation.TurnIntoCopy(Const(op(x)));
+        }
+
+        private static void EvaluateUnaryI64(Operation operation, Func<long, long> op)
+        {
+            long x = operation.GetSource(0).AsInt64();
+
+            operation.TurnIntoCopy(Const(op(x)));
+        }
+
+        private static void EvaluateBinaryI32(Operation operation, Func<int, int, int> op)
+        {
+            int x = operation.GetSource(0).AsInt32();
+            int y = operation.GetSource(1).AsInt32();
+
+            operation.TurnIntoCopy(Const(op(x, y)));
+        }
+
+        private static void EvaluateBinaryI64(Operation operation, Func<long, long, long> op)
+        {
+            long x = operation.GetSource(0).AsInt64();
+            long y = operation.GetSource(1).AsInt64();
+
+            operation.TurnIntoCopy(Const(op(x, y)));
+        }
+    }
+}

ARMeilleure/CodeGen/Optimizations/Optimizer.cs

@@ -0,0 +1,266 @@
+using ARMeilleure.IntermediateRepresentation;
+using ARMeilleure.Translation;
+using System;
+using System.Diagnostics;
+using static ARMeilleure.IntermediateRepresentation.Operand.Factory;
+
+namespace ARMeilleure.CodeGen.Optimizations
+{
+    static class Optimizer
+    {
+        public static void RunPass(ControlFlowGraph cfg)
+        {
+            // Scratch buffer used to store uses.
+            Span<Operation> buffer = default;
+
+            bool modified;
+
+            do
+            {
+                modified = false;
+
+                for (BasicBlock block = cfg.Blocks.Last; block != null; block = block.ListPrevious)
+                {
+                    Operation node;
+                    Operation prevNode;
+
+                    for (node = block.Operations.Last; node != default; node = prevNode)
+                    {
+                        prevNode = node.ListPrevious;
+
+                        if (IsUnused(node))
+                        {
+                            RemoveNode(block, node);
+
+                            modified = true;
+
+                            continue;
+                        }
+                        else if (node.Instruction == Instruction.Phi)
+                        {
+                            continue;
+                        }
+
+                        ConstantFolding.RunPass(node);
+                        Simplification.RunPass(node);
+
+                        if (DestIsLocalVar(node))
+                        {   
+                            if (IsPropagableCompare(node))
+                            {
+                                modified |= PropagateCompare(ref buffer, node);
+
+                                if (modified && IsUnused(node))
+                                {
+                                    RemoveNode(block, node);
+                                }
+                            }
+                            else if (IsPropagableCopy(node))
+                            {
+                                PropagateCopy(ref buffer, node);
+
+                                RemoveNode(block, node);
+
+                                modified = true;
+                            }
+                        }
+                    }
+                }
+            }
+            while (modified);
+        }
+
+        public static void RemoveUnusedNodes(ControlFlowGraph cfg)
+        {
+            bool modified;
+
+            do
+            {
+                modified = false;
+
+                for (BasicBlock block = cfg.Blocks.Last; block != null; block = block.ListPrevious)
+                {
+                    Operation node;
+                    Operation prevNode;
+
+                    for (node = block.Operations.Last; node != default; node = prevNode)
+                    {
+                        prevNode = node.ListPrevious;
+
+                        if (IsUnused(node))
+                        {
+                            RemoveNode(block, node);
+
+                            modified = true;
+                        }
+                    }
+                }
+            }
+            while (modified);
+        }
+
+        private static Span<Operation> GetUses(ref Span<Operation> buffer, Operand operand)
+        {
+            ReadOnlySpan<Operation> uses = operand.Uses;
+
+            if (buffer.Length < uses.Length)
+            {
+                buffer = Allocators.Default.AllocateSpan<Operation>((uint)uses.Length);
+            }
+
+            uses.CopyTo(buffer);
+
+            return buffer.Slice(0, uses.Length);
+        }
+
+        private static bool PropagateCompare(ref Span<Operation> buffer, Operation compOp)
+        {
+            // Try to propagate Compare operations into their BranchIf uses, when these BranchIf uses are in the form
+            // of:
+            //
+            // - BranchIf %x, 0x0, Equal        ;; i.e BranchIfFalse %x
+            // - BranchIf %x, 0x0, NotEqual     ;; i.e BranchIfTrue %x
+            //
+            // The commutative property of Equal and NotEqual is taken into consideration as well.
+            //
+            // For example:
+            //
+            //  %x = Compare %a, %b, comp
+            //  BranchIf %x, 0x0, NotEqual
+            //
+            // =>
+            //
+            //  BranchIf %a, %b, comp
+
+            static bool IsZeroBranch(Operation operation, out Comparison compType)
+            {
+                compType = Comparison.Equal;
+
+                if (operation.Instruction != Instruction.BranchIf)
+                {
+                    return false;
+                }
+
+                Operand src1 = operation.GetSource(0);
+                Operand src2 = operation.GetSource(1);
+                Operand comp = operation.GetSource(2);
+
+                compType = (Comparison)comp.AsInt32();
+
+                return (src1.Kind == OperandKind.Constant && src1.Value == 0) ||
+                       (src2.Kind == OperandKind.Constant && src2.Value == 0);
+            }
+
+            bool modified = false;
+
+            Operand dest = compOp.Destination;
+            Operand src1 = compOp.GetSource(0);
+            Operand src2 = compOp.GetSource(1);
+            Operand comp = compOp.GetSource(2);
+
+            Comparison compType = (Comparison)comp.AsInt32();
+
+            Span<Operation> uses = GetUses(ref buffer, dest);
+
+            foreach (Operation use in uses)
+            {
+                // If operation is a BranchIf and has a constant value 0 in its RHS or LHS source operands.
+                if (IsZeroBranch(use, out Comparison otherCompType))
+                {
+                    Comparison propCompType;
+
+                    if (otherCompType == Comparison.NotEqual)
+                    {
+                        propCompType = compType;
+                    }
+                    else if (otherCompType == Comparison.Equal)
+                    {
+                        propCompType = compType.Invert();
+                    }
+                    else
+                    {
+                        continue;
+                    }
+
+                    use.SetSource(0, src1);
+                    use.SetSource(1, src2);
+                    use.SetSource(2, Const((int)propCompType));
+
+                    modified = true;
+                }
+            }
+
+            return modified;
+        }
+
+        private static void PropagateCopy(ref Span<Operation> buffer, Operation copyOp)
+        {
+            // Propagate copy source operand to all uses of the destination operand.
+            Operand dest   = copyOp.Destination;
+            Operand source = copyOp.GetSource(0);
+
+            Span<Operation> uses = GetUses(ref buffer, dest);
+
+            foreach (Operation use in uses)
+            {
+                for (int index = 0; index < use.SourcesCount; index++)
+                {
+                    if (use.GetSource(index) == dest)
+                    {
+                        use.SetSource(index, source);
+                    }
+                }
+            }
+        }
+
+        private static void RemoveNode(BasicBlock block, Operation node)
+        {
+            // Remove a node from the nodes list, and also remove itself
+            // from all the use lists on the operands that this node uses.
+            block.Operations.Remove(node);
+
+            for (int index = 0; index < node.SourcesCount; index++)
+            {
+                node.SetSource(index, default);
+            }
+
+            Debug.Assert(node.Destination == default || node.Destination.UsesCount == 0);
+
+            node.Destination = default;
+        }
+
+        private static bool IsUnused(Operation node)
+        {
+            return DestIsLocalVar(node) && node.Destination.UsesCount == 0 && !HasSideEffects(node);
+        }
+
+        private static bool DestIsLocalVar(Operation node)
+        {
+            return node.Destination != default && node.Destination.Kind == OperandKind.LocalVariable;
+        }
+
+        private static bool HasSideEffects(Operation node)
+        {
+            return node.Instruction == Instruction.Call
+                || node.Instruction == Instruction.Tailcall
+                || node.Instruction == Instruction.CompareAndSwap
+                || node.Instruction == Instruction.CompareAndSwap16
+                || node.Instruction == Instruction.CompareAndSwap8;
+        }
+
+        private static bool IsPropagableCompare(Operation operation)
+        {
+            return operation.Instruction == Instruction.Compare;
+        }
+
+        private static bool IsPropagableCopy(Operation operation)
+        {
+            if (operation.Instruction != Instruction.Copy)
+            {
+                return false;
+            }
+
+            return operation.Destination.Type == operation.GetSource(0).Type;
+        }
+    }
+}

ARMeilleure/CodeGen/Optimizations/Simplification.cs

@@ -0,0 +1,183 @@
+using ARMeilleure.IntermediateRepresentation;
+using System;
+using static ARMeilleure.IntermediateRepresentation.Operand.Factory;
+
+namespace ARMeilleure.CodeGen.Optimizations
+{
+    static class Simplification
+    {
+        public static void RunPass(Operation operation)
+        {
+            switch (operation.Instruction)
+            {
+                case Instruction.Add:
+                    if (operation.GetSource(0).Relocatable ||
+                        operation.GetSource(1).Relocatable)
+                    {
+                        break;
+                    }
+
+                    TryEliminateBinaryOpComutative(operation, 0);
+                    break;
+
+                case Instruction.BitwiseAnd:
+                    TryEliminateBitwiseAnd(operation);
+                    break;
+
+                case Instruction.BitwiseOr:
+                    TryEliminateBitwiseOr(operation);
+                    break;
+
+                case Instruction.BitwiseExclusiveOr:
+                    TryEliminateBitwiseExclusiveOr(operation);
+                    break;
+
+                case Instruction.ConditionalSelect:
+                    TryEliminateConditionalSelect(operation);
+                    break;
+
+                case Instruction.Divide:
+                    TryEliminateBinaryOpY(operation, 1);
+                    break;
+
+                case Instruction.Multiply:
+                    TryEliminateBinaryOpComutative(operation, 1);
+                    break;
+
+                case Instruction.ShiftLeft:
+                case Instruction.ShiftRightSI:
+                case Instruction.ShiftRightUI:
+                case Instruction.Subtract:
+                    TryEliminateBinaryOpY(operation, 0);
+                    break;
+            }
+        }
+
+        private static void TryEliminateBitwiseAnd(Operation operation)
+        {
+            // Try to recognize and optimize those 3 patterns (in order):
+            // x & 0xFFFFFFFF == x,          0xFFFFFFFF & y == y,
+            // x & 0x00000000 == 0x00000000, 0x00000000 & y == 0x00000000
+            Operand x = operation.GetSource(0);
+            Operand y = operation.GetSource(1);
+
+            if (IsConstEqual(x, AllOnes(x.Type)))
+            {
+                operation.TurnIntoCopy(y);
+            }
+            else if (IsConstEqual(y, AllOnes(y.Type)))
+            {
+                operation.TurnIntoCopy(x);
+            }
+            else if (IsConstEqual(x, 0) || IsConstEqual(y, 0))
+            {
+                operation.TurnIntoCopy(Const(x.Type, 0));
+            }
+        }
+
+        private static void TryEliminateBitwiseOr(Operation operation)
+        {
+            // Try to recognize and optimize those 3 patterns (in order):
+            // x | 0x00000000 == x,          0x00000000 | y == y,
+            // x | 0xFFFFFFFF == 0xFFFFFFFF, 0xFFFFFFFF | y == 0xFFFFFFFF
+            Operand x = operation.GetSource(0);
+            Operand y = operation.GetSource(1);
+
+            if (IsConstEqual(x, 0))
+            {
+                operation.TurnIntoCopy(y);
+            }
+            else if (IsConstEqual(y, 0))
+            {
+                operation.TurnIntoCopy(x);
+            }
+            else if (IsConstEqual(x, AllOnes(x.Type)) || IsConstEqual(y, AllOnes(y.Type)))
+            {
+                operation.TurnIntoCopy(Const(AllOnes(x.Type)));
+            }
+        }
+
+        private static void TryEliminateBitwiseExclusiveOr(Operation operation)
+        {
+            // Try to recognize and optimize those 2 patterns (in order):
+            // x ^ y == 0x00000000 when x == y
+            // 0x00000000 ^ y == y, x ^ 0x00000000 == x
+            Operand x = operation.GetSource(0);
+            Operand y = operation.GetSource(1);
+
+            if (x == y && x.Type.IsInteger())
+            {
+                operation.TurnIntoCopy(Const(x.Type, 0));
+            }
+            else
+            {
+                TryEliminateBinaryOpComutative(operation, 0);
+            }
+        }
+
+        private static void TryEliminateBinaryOpY(Operation operation, ulong comparand)
+        {
+            Operand x = operation.GetSource(0);
+            Operand y = operation.GetSource(1);
+
+            if (IsConstEqual(y, comparand))
+            {
+                operation.TurnIntoCopy(x);
+            }
+        }
+
+        private static void TryEliminateBinaryOpComutative(Operation operation, ulong comparand)
+        {
+            Operand x = operation.GetSource(0);
+            Operand y = operation.GetSource(1);
+
+            if (IsConstEqual(x, comparand))
+            {
+                operation.TurnIntoCopy(y);
+            }
+            else if (IsConstEqual(y, comparand))
+            {
+                operation.TurnIntoCopy(x);
+            }
+        }
+
+        private static void TryEliminateConditionalSelect(Operation operation)
+        {
+            Operand cond = operation.GetSource(0);
+
+            if (cond.Kind != OperandKind.Constant)
+            {
+                return;
+            }
+
+            // The condition is constant, we can turn it into a copy, and select
+            // the source based on the condition value.
+            int srcIndex = cond.Value != 0 ? 1 : 2;
+
+            Operand source = operation.GetSource(srcIndex);
+
+            operation.TurnIntoCopy(source);
+        }
+
+        private static bool IsConstEqual(Operand operand, ulong comparand)
+        {
+            if (operand.Kind != OperandKind.Constant || !operand.Type.IsInteger())
+            {
+                return false;
+            }
+
+            return operand.Value == comparand;
+        }
+
+        private static ulong AllOnes(OperandType type)
+        {
+            switch (type)
+            {
+                case OperandType.I32: return ~0U;
+                case OperandType.I64: return ~0UL;
+            }
+
+            throw new ArgumentException("Invalid operand type \"" + type + "\".");
+        }
+    }
+}

ARMeilleure/CodeGen/Optimizations/TailMerge.cs

@@ -1,4 +1,4 @@
-using ARMeilleure.IntermediateRepresentation;
+using ARMeilleure.IntermediateRepresentation;
 using ARMeilleure.Translation;
 using static ARMeilleure.IntermediateRepresentation.Operation.Factory;
 
@@ -59,7 +59,7 @@ namespace ARMeilleure.CodeGen.Optimizations
             BasicBlock fromPred = from.Predecessors.Count == 1 ? from.Predecessors[0] : null;
 
             // If the block is empty, we can try to append to the predecessor and avoid unnecessary jumps.
-            if (from.Operations.Count == 0 && fromPred != null && fromPred.SuccessorsCount == 1)
+            if (from.Operations.Count == 0 && fromPred != null)
             {
                 for (int i = 0; i < fromPred.SuccessorsCount; i++)
                 {

ARMeilleure/CodeGen/RegisterAllocators/AllocationResult.cs

@@ -1,10 +1,10 @@
 namespace ARMeilleure.CodeGen.RegisterAllocators
 {
-    readonly struct AllocationResult
+    struct AllocationResult
     {
         public int IntUsedRegisters { get; }
         public int VecUsedRegisters { get; }
-        public int SpillRegionSize { get; }
+        public int SpillRegionSize  { get; }
 
         public AllocationResult(
             int intUsedRegisters,
@@ -13,7 +13,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
         {
             IntUsedRegisters = intUsedRegisters;
             VecUsedRegisters = vecUsedRegisters;
-            SpillRegionSize = spillRegionSize;
+            SpillRegionSize  = spillRegionSize;
         }
     }
-}
+}

ARMeilleure/CodeGen/RegisterAllocators/CopyResolver.cs

@@ -1,6 +1,7 @@
 using ARMeilleure.IntermediateRepresentation;
 using System;
 using System.Collections.Generic;
+
 using static ARMeilleure.IntermediateRepresentation.Operand.Factory;
 using static ARMeilleure.IntermediateRepresentation.Operation.Factory;
 
@@ -10,18 +11,18 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
     {
         private class ParallelCopy
         {
-            private readonly struct Copy
+            private struct Copy
             {
-                public Register Dest { get; }
+                public Register Dest   { get; }
                 public Register Source { get; }
 
                 public OperandType Type { get; }
 
                 public Copy(Register dest, Register source, OperandType type)
                 {
-                    Dest = dest;
+                    Dest   = dest;
                     Source = source;
-                    Type = type;
+                    Type   = type;
                 }
             }
 
@@ -41,19 +42,19 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 
             public void Sequence(List<Operation> sequence)
             {
-                Dictionary<Register, Register> locations = new();
-                Dictionary<Register, Register> sources = new();
+                Dictionary<Register, Register> locations = new Dictionary<Register, Register>();
+                Dictionary<Register, Register> sources   = new Dictionary<Register, Register>();
 
-                Dictionary<Register, OperandType> types = new();
+                Dictionary<Register, OperandType> types = new Dictionary<Register, OperandType>();
 
-                Queue<Register> pendingQueue = new();
-                Queue<Register> readyQueue = new();
+                Queue<Register> pendingQueue = new Queue<Register>();
+                Queue<Register> readyQueue   = new Queue<Register>();
 
                 foreach (Copy copy in _copies)
                 {
                     locations[copy.Source] = copy.Source;
-                    sources[copy.Dest] = copy.Source;
-                    types[copy.Dest] = copy.Type;
+                    sources[copy.Dest]     = copy.Source;
+                    types[copy.Dest]       = copy.Type;
 
                     pendingQueue.Enqueue(copy.Dest);
                 }
@@ -90,7 +91,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                         }
                     }
 
-                    copyDest = current;
+                    copyDest   = current;
                     origSource = sources[copyDest];
                     copySource = locations[origSource];
 
@@ -185,7 +186,10 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 
         private void AddSplitFill(LiveInterval left, LiveInterval right, OperandType type)
         {
-            _fillQueue ??= new Queue<Operation>();
+            if (_fillQueue == null)
+            {
+                _fillQueue = new Queue<Operation>();
+            }
 
             Operand register = GetRegister(right.Register, type);
             Operand offset = Const(left.SpillOffset);
@@ -197,7 +201,10 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 
         private void AddSplitSpill(LiveInterval left, LiveInterval right, OperandType type)
         {
-            _spillQueue ??= new Queue<Operation>();
+            if (_spillQueue == null)
+            {
+                _spillQueue = new Queue<Operation>();
+            }
 
             Operand offset = Const(right.SpillOffset);
             Operand register = GetRegister(left.Register, type);
@@ -209,7 +216,10 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 
         private void AddSplitCopy(LiveInterval left, LiveInterval right, OperandType type)
         {
-            _parallelCopy ??= new ParallelCopy();
+            if (_parallelCopy == null)
+            {
+                _parallelCopy = new ParallelCopy();
+            }
 
             _parallelCopy.AddCopy(right.Register, left.Register, type);
 
@@ -218,7 +228,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 
         public Operation[] Sequence()
         {
-            List<Operation> sequence = new();
+            List<Operation> sequence = new List<Operation>();
 
             if (_spillQueue != null)
             {
@@ -246,4 +256,4 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             return Register(reg.Index, reg.Type, type);
         }
     }
-}
+}

ARMeilleure/CodeGen/RegisterAllocators/HybridAllocator.cs

@@ -11,7 +11,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 {
     class HybridAllocator : IRegisterAllocator
     {
-        private readonly struct BlockInfo
+        private struct BlockInfo
         {
             public bool HasCall { get; }
 
@@ -20,7 +20,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 
             public BlockInfo(bool hasCall, int intFixedRegisters, int vecFixedRegisters)
             {
-                HasCall = hasCall;
+                HasCall           = hasCall;
                 IntFixedRegisters = intFixedRegisters;
                 VecFixedRegisters = vecFixedRegisters;
             }
@@ -39,7 +39,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             private int _first;
             private int _last;
 
-            public readonly bool IsBlockLocal => _first == _last;
+            public bool IsBlockLocal => _first == _last;
 
             public LocalInfo(OperandType type, int uses, int blkIndex)
             {
@@ -53,7 +53,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                 SpillOffset = default;
 
                 _first = -1;
-                _last = -1;
+                _last  = -1;
 
                 SetBlockIndex(blkIndex);
             }
@@ -348,17 +348,17 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                                 if (dest.Type.IsInteger())
                                 {
                                     intLocalFreeRegisters &= ~(1 << selectedReg);
-                                    intUsedRegisters |= 1 << selectedReg;
+                                    intUsedRegisters      |=   1 << selectedReg;
                                 }
                                 else
                                 {
                                     vecLocalFreeRegisters &= ~(1 << selectedReg);
-                                    vecUsedRegisters |= 1 << selectedReg;
+                                    vecUsedRegisters      |=   1 << selectedReg;
                                 }
                             }
                             else
                             {
-                                info.Register = default;
+                                info.Register    = default;
                                 info.SpillOffset = Const(stackAlloc.Allocate(dest.Type.GetSizeInBytes()));
                             }
                         }
@@ -382,7 +382,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                                     : GetSpillTemp(dest, vecSpillTempRegisters, ref vecLocalAsg);
 
                                 info.Sequence = sequence;
-                                info.Temp = temp;
+                                info.Temp     = temp;
                             }
 
                             dest = temp;
@@ -408,7 +408,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
         private static int SelectSpillTemps(int mask0, int mask1)
         {
             int selection = 0;
-            int count = 0;
+            int count     = 0;
 
             while (count < MaxIROperands && mask0 != 0)
             {
@@ -451,4 +451,4 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             return local.AssignmentsCount + local.UsesCount;
         }
     }
-}
+}

ARMeilleure/CodeGen/RegisterAllocators/IRegisterAllocator.cs

@@ -9,4 +9,4 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             StackAllocator stackAlloc,
             RegisterMasks regMasks);
     }
-}
+}

ARMeilleure/CodeGen/RegisterAllocators/LinearScanAllocator.cs

@@ -14,9 +14,11 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
     // http://www.christianwimmer.at/Publications/Wimmer04a/Wimmer04a.pdf
     class LinearScanAllocator : IRegisterAllocator
     {
-        private const int InstructionGap = 2;
+        private const int InstructionGap     = 2;
         private const int InstructionGapMask = InstructionGap - 1;
 
+        private const int RegistersCount = 16;
+
         private HashSet<int> _blockEdges;
         private LiveRange[] _blockRanges;
         private BitMap[] _blockLiveIn;
@@ -33,7 +35,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 
             public StackAllocator StackAlloc { get; }
 
-            public BitMap Active { get; }
+            public BitMap Active   { get; }
             public BitMap Inactive { get; }
 
             public int IntUsedRegisters { get; set; }
@@ -47,9 +49,9 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             public AllocationContext(StackAllocator stackAlloc, RegisterMasks masks, int intervalsCount)
             {
                 StackAlloc = stackAlloc;
-                Masks = masks;
+                Masks      = masks;
 
-                Active = new BitMap(Allocators.Default, intervalsCount);
+                Active   = new BitMap(Allocators.Default, intervalsCount);
                 Inactive = new BitMap(Allocators.Default, intervalsCount);
 
                 PopulateFreePositions(RegisterType.Integer, out _intFreePositions, out _intFreePositionsCount);
@@ -57,7 +59,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 
                 void PopulateFreePositions(RegisterType type, out int[] positions, out int count)
                 {
-                    positions = new int[masks.RegistersCount];
+                    positions = new int[RegistersCount];
                     count = BitOperations.PopCount((uint)masks.GetAvailableRegisters(type));
 
                     int mask = masks.GetAvailableRegisters(type);
@@ -113,7 +115,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             StackAllocator stackAlloc,
             RegisterMasks regMasks)
         {
-            NumberLocals(cfg, regMasks.RegistersCount);
+            NumberLocals(cfg);
 
             var context = new AllocationContext(stackAlloc, regMasks, _intervals.Count);
 
@@ -132,25 +134,22 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                 {
                     context.Active.Set(index);
 
-                    if (current.IsFixedAndUsed)
+                    if (current.Register.Type == RegisterType.Integer)
                     {
-                        if (current.Register.Type == RegisterType.Integer)
-                        {
-                            context.IntUsedRegisters |= 1 << current.Register.Index;
-                        }
-                        else /* if (interval.Register.Type == RegisterType.Vector) */
-                        {
-                            context.VecUsedRegisters |= 1 << current.Register.Index;
-                        }
+                        context.IntUsedRegisters |= 1 << current.Register.Index;
+                    }
+                    else /* if (interval.Register.Type == RegisterType.Vector) */
+                    {
+                        context.VecUsedRegisters |= 1 << current.Register.Index;
                     }
 
                     continue;
                 }
 
-                AllocateInterval(context, current, index, regMasks.RegistersCount);
+                AllocateInterval(context, current, index);
             }
 
-            for (int index = regMasks.RegistersCount * 2; index < _intervals.Count; index++)
+            for (int index = RegistersCount * 2; index < _intervals.Count; index++)
             {
                 if (!_intervals[index].IsSpilled)
                 {
@@ -164,7 +163,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             return new AllocationResult(context.IntUsedRegisters, context.VecUsedRegisters, context.StackAlloc.TotalSize);
         }
 
-        private void AllocateInterval(AllocationContext context, LiveInterval current, int cIndex, int registersCount)
+        private void AllocateInterval(AllocationContext context, LiveInterval current, int cIndex)
         {
             // Check active intervals that already ended.
             foreach (int iIndex in context.Active)
@@ -200,17 +199,17 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                 }
             }
 
-            if (!TryAllocateRegWithoutSpill(context, current, cIndex, registersCount))
+            if (!TryAllocateRegWithoutSpill(context, current, cIndex))
             {
-                AllocateRegWithSpill(context, current, cIndex, registersCount);
+                AllocateRegWithSpill(context, current, cIndex);
             }
         }
 
-        private bool TryAllocateRegWithoutSpill(AllocationContext context, LiveInterval current, int cIndex, int registersCount)
+        private bool TryAllocateRegWithoutSpill(AllocationContext context, LiveInterval current, int cIndex)
         {
             RegisterType regType = current.Local.Type.ToRegisterType();
 
-            Span<int> freePositions = stackalloc int[registersCount];
+            Span<int> freePositions = stackalloc int[RegistersCount];
 
             context.GetFreePositions(regType, freePositions, out int freePositionsCount);
 
@@ -251,20 +250,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                 }
             }
 
-            // If this is a copy destination variable, we prefer the register used for the copy source.
-            // If the register is available, then the copy can be eliminated later as both source
-            // and destination will use the same register.
-            int selectedReg;
-
-            if (current.TryGetCopySourceRegister(out int preferredReg) && freePositions[preferredReg] >= current.GetEnd())
-            {
-                selectedReg = preferredReg;
-            }
-            else
-            {
-                selectedReg = GetHighestValueIndex(freePositions);
-            }
-
+            int selectedReg = GetHighestValueIndex(freePositions);
             int selectedNextUse = freePositions[selectedReg];
 
             // Intervals starts and ends at odd positions, unless they span an entire
@@ -292,7 +278,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                 {
                     Debug.Assert(splitChild.GetStart() > current.GetStart(), "Split interval has an invalid start position.");
 
-                    InsertInterval(splitChild, registersCount);
+                    InsertInterval(splitChild);
                 }
                 else
                 {
@@ -316,12 +302,12 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             return true;
         }
 
-        private void AllocateRegWithSpill(AllocationContext context, LiveInterval current, int cIndex, int registersCount)
+        private void AllocateRegWithSpill(AllocationContext context, LiveInterval current, int cIndex)
         {
             RegisterType regType = current.Local.Type.ToRegisterType();
 
-            Span<int> usePositions = stackalloc int[registersCount];
-            Span<int> blockedPositions = stackalloc int[registersCount];
+            Span<int> usePositions = stackalloc int[RegistersCount];
+            Span<int> blockedPositions = stackalloc int[RegistersCount];
 
             context.GetFreePositions(regType, usePositions, out _);
             context.GetFreePositions(regType, blockedPositions, out _);
@@ -400,7 +386,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 
                 Debug.Assert(splitChild.GetStart() > current.GetStart(), "Split interval has an invalid start position.");
 
-                InsertInterval(splitChild, registersCount);
+                InsertInterval(splitChild);
 
                 Spill(context, current);
             }
@@ -410,7 +396,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                 // so we only need to split the intervals using the selected register.
                 current.Register = new Register(selectedReg, regType);
 
-                SplitAndSpillOverlappingIntervals(context, current, registersCount);
+                SplitAndSpillOverlappingIntervals(context, current);
 
                 context.Active.Set(cIndex);
             }
@@ -431,32 +417,37 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                 {
                     Debug.Assert(splitChild.GetStart() > current.GetStart(), "Split interval has an invalid start position.");
 
-                    InsertInterval(splitChild, registersCount);
+                    InsertInterval(splitChild);
                 }
                 else
                 {
                     Spill(context, splitChild);
                 }
 
-                SplitAndSpillOverlappingIntervals(context, current, registersCount);
+                SplitAndSpillOverlappingIntervals(context, current);
 
                 context.Active.Set(cIndex);
             }
         }
 
-        private static int GetHighestValueIndex(ReadOnlySpan<int> span)
+        private static int GetHighestValueIndex(Span<int> span)
         {
-            int highest = int.MinValue;
+            int highest = span[0];
+
+            if (highest == int.MaxValue)
+            {
+                return 0;
+            }
 
             int selected = 0;
 
-            for (int index = 0; index < span.Length; index++)
+            for (int index = 1; index < span.Length; index++)
             {
                 int current = span[index];
 
                 if (highest < current)
                 {
-                    highest = current;
+                    highest  = current;
                     selected = index;
 
                     if (current == int.MaxValue)
@@ -469,7 +460,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             return selected;
         }
 
-        private void SplitAndSpillOverlappingIntervals(AllocationContext context, LiveInterval current, int registersCount)
+        private void SplitAndSpillOverlappingIntervals(AllocationContext context, LiveInterval current)
         {
             foreach (int iIndex in context.Active)
             {
@@ -477,7 +468,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 
                 if (!interval.IsFixed && interval.Register == current.Register)
                 {
-                    SplitAndSpillOverlappingInterval(context, current, interval, registersCount);
+                    SplitAndSpillOverlappingInterval(context, current, interval);
 
                     context.Active.Clear(iIndex);
                 }
@@ -489,7 +480,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 
                 if (!interval.IsFixed && interval.Register == current.Register && interval.Overlaps(current))
                 {
-                    SplitAndSpillOverlappingInterval(context, current, interval, registersCount);
+                    SplitAndSpillOverlappingInterval(context, current, interval);
 
                     context.Inactive.Clear(iIndex);
                 }
@@ -498,9 +489,8 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 
         private void SplitAndSpillOverlappingInterval(
             AllocationContext context,
-            LiveInterval current,
-            LiveInterval interval,
-            int registersCount)
+            LiveInterval      current,
+            LiveInterval      interval)
         {
             // If there's a next use after the start of the current interval,
             // we need to split the spilled interval twice, and re-insert it
@@ -532,7 +522,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                     splitChild = right;
                 }
 
-                InsertInterval(splitChild, registersCount);
+                InsertInterval(splitChild);
             }
             else
             {
@@ -540,13 +530,13 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             }
         }
 
-        private void InsertInterval(LiveInterval interval, int registersCount)
+        private void InsertInterval(LiveInterval interval)
         {
             Debug.Assert(interval.UsesCount != 0, "Trying to insert a interval without uses.");
-            Debug.Assert(!interval.IsEmpty, "Trying to insert a empty interval.");
-            Debug.Assert(!interval.IsSpilled, "Trying to insert a spilled interval.");
+            Debug.Assert(!interval.IsEmpty,       "Trying to insert a empty interval.");
+            Debug.Assert(!interval.IsSpilled,     "Trying to insert a spilled interval.");
 
-            int startIndex = registersCount * 2;
+            int startIndex = RegistersCount * 2;
 
             int insertIndex = _intervals.BinarySearch(startIndex, _intervals.Count - startIndex, interval, null);
 
@@ -558,9 +548,9 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             _intervals.Insert(insertIndex, interval);
         }
 
-        private static void Spill(AllocationContext context, LiveInterval interval)
+        private void Spill(AllocationContext context, LiveInterval interval)
         {
-            Debug.Assert(!interval.IsFixed, "Trying to spill a fixed interval.");
+            Debug.Assert(!interval.IsFixed,       "Trying to spill a fixed interval.");
             Debug.Assert(interval.UsesCount == 0, "Trying to spill a interval with uses.");
 
             // We first check if any of the siblings were spilled, if so we can reuse
@@ -574,7 +564,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 
         private void InsertSplitCopies()
         {
-            Dictionary<int, CopyResolver> copyResolvers = new();
+            Dictionary<int, CopyResolver> copyResolvers = new Dictionary<int, CopyResolver>();
 
             CopyResolver GetCopyResolver(int position)
             {
@@ -681,15 +671,18 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                             continue;
                         }
 
-                        int lEnd = _blockRanges[block.Index].End - 1;
+                        int lEnd   = _blockRanges[block.Index].End - 1;
                         int rStart = _blockRanges[succIndex].Start;
 
-                        LiveInterval left = interval.GetSplitChild(lEnd);
+                        LiveInterval left  = interval.GetSplitChild(lEnd);
                         LiveInterval right = interval.GetSplitChild(rStart);
 
                         if (left != default && right != default && left != right)
                         {
-                            copyResolver ??= new CopyResolver();
+                            if (copyResolver == null)
+                            {
+                                copyResolver = new CopyResolver();
+                            }
 
                             copyResolver.AddSplit(left, right);
                         }
@@ -797,12 +790,12 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             return _operationNodes[position / InstructionGap];
         }
 
-        private void NumberLocals(ControlFlowGraph cfg, int registersCount)
+        private void NumberLocals(ControlFlowGraph cfg)
         {
             _operationNodes = new List<(IntrusiveList<Operation>, Operation)>();
             _intervals = new List<LiveInterval>();
 
-            for (int index = 0; index < registersCount; index++)
+            for (int index = 0; index < RegistersCount; index++)
             {
                 _intervals.Add(new LiveInterval(new Register(index, RegisterType.Integer)));
                 _intervals.Add(new LiveInterval(new Register(index, RegisterType.Vector)));
@@ -811,12 +804,12 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             // The "visited" state is stored in the MSB of the local's value.
             const ulong VisitedMask = 1ul << 63;
 
-            static bool IsVisited(Operand local)
+            bool IsVisited(Operand local)
             {
                 return (local.GetValueUnsafe() & VisitedMask) != 0;
             }
 
-            static void SetVisited(Operand local)
+            void SetVisited(Operand local)
             {
                 local.GetValueUnsafe() |= VisitedMask;
             }
@@ -839,25 +832,9 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                         {
                             dest.NumberLocal(_intervals.Count);
 
-                            LiveInterval interval = new LiveInterval(dest);
-                            _intervals.Add(interval);
+                            _intervals.Add(new LiveInterval(dest));
 
                             SetVisited(dest);
-
-                            // If this is a copy (or copy-like operation), set the copy source interval as well.
-                            // This is used for register preferencing later on, which allows the copy to be eliminated
-                            // in some cases.
-                            if (node.Instruction == Instruction.Copy || node.Instruction == Instruction.ZeroExtend32)
-                            {
-                                Operand source = node.GetSource(0);
-
-                                if (source.Kind == OperandKind.LocalVariable &&
-                                    source.GetLocalNumber() > 0 &&
-                                    (node.Instruction == Instruction.Copy || source.Type == OperandType.I32))
-                                {
-                                    interval.SetCopySource(_intervals[source.GetLocalNumber()]);
-                                }
-                            }
                         }
                     }
                 }
@@ -882,14 +859,14 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 
             int mapSize = _intervals.Count;
 
-            BitMap[] blkLiveGen = new BitMap[cfg.Blocks.Count];
+            BitMap[] blkLiveGen  = new BitMap[cfg.Blocks.Count];
             BitMap[] blkLiveKill = new BitMap[cfg.Blocks.Count];
 
             // Compute local live sets.
             for (BasicBlock block = cfg.Blocks.First; block != null; block = block.ListNext)
             {
-                BitMap liveGen = new(Allocators.Default, mapSize);
-                BitMap liveKill = new(Allocators.Default, mapSize);
+                BitMap liveGen  = new BitMap(Allocators.Default, mapSize);
+                BitMap liveKill = new BitMap(Allocators.Default, mapSize);
 
                 for (Operation node = block.Operations.First; node != default; node = node.ListNext)
                 {
@@ -936,17 +913,17 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                     }
                 }
 
-                blkLiveGen[block.Index] = liveGen;
+                blkLiveGen [block.Index] = liveGen;
                 blkLiveKill[block.Index] = liveKill;
             }
 
             // Compute global live sets.
-            BitMap[] blkLiveIn = new BitMap[cfg.Blocks.Count];
+            BitMap[] blkLiveIn  = new BitMap[cfg.Blocks.Count];
             BitMap[] blkLiveOut = new BitMap[cfg.Blocks.Count];
 
             for (int index = 0; index < cfg.Blocks.Count; index++)
             {
-                blkLiveIn[index] = new BitMap(Allocators.Default, mapSize);
+                blkLiveIn [index] = new BitMap(Allocators.Default, mapSize);
                 blkLiveOut[index] = new BitMap(Allocators.Default, mapSize);
             }
 
@@ -971,9 +948,9 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 
                     BitMap liveIn = blkLiveIn[block.Index];
 
-                    liveIn.Set(liveOut);
+                    liveIn.Set  (liveOut);
                     liveIn.Clear(blkLiveKill[block.Index]);
-                    liveIn.Set(blkLiveGen[block.Index]);
+                    liveIn.Set  (blkLiveGen [block.Index]);
                 }
             }
             while (modified);
@@ -995,7 +972,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                 int instCount = Math.Max(block.Operations.Count, 1);
 
                 int blockStart = operationPos - instCount * InstructionGap;
-                int blockEnd = operationPos;
+                int blockEnd   = operationPos;
 
                 _blockRanges[block.Index] = new LiveRange(blockStart, blockEnd);
 
@@ -1064,11 +1041,6 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                     {
                         LiveInterval interval = _intervals[GetOperandId(dest)];
 
-                        if (interval.IsFixed)
-                        {
-                            interval.IsFixedAndUsed = true;
-                        }
-
                         interval.SetStart(operationPos + 1);
                         interval.AddUsePosition(operationPos + 1);
                     }
@@ -1087,7 +1059,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             {
                 int regIndex = BitOperations.TrailingZeroCount(mask);
 
-                Register callerSavedReg = new(regIndex, regType);
+                Register callerSavedReg = new Register(regIndex, regType);
 
                 LiveInterval interval = _intervals[GetRegisterId(callerSavedReg)];
 
@@ -1124,4 +1096,4 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                    kind == OperandKind.Register;
         }
     }
-}
+}

ARMeilleure/CodeGen/RegisterAllocators/LiveInterval.cs

@@ -19,7 +19,6 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             public LiveRange CurrRange;
 
             public LiveInterval Parent;
-            public LiveInterval CopySource;
 
             public UseList Uses;
             public LiveIntervalList Children;
@@ -28,7 +27,6 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             public Register Register;
 
             public bool IsFixed;
-            public bool IsFixedAndUsed;
         }
 
         private readonly Data* _data;
@@ -38,7 +36,6 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
         private ref LiveRange CurrRange => ref _data->CurrRange;
         private ref LiveRange PrevRange => ref _data->PrevRange;
         private ref LiveInterval Parent => ref _data->Parent;
-        private ref LiveInterval CopySource => ref _data->CopySource;
         private ref UseList Uses => ref _data->Uses;
         private ref LiveIntervalList Children => ref _data->Children;
 
@@ -47,7 +44,6 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
         public ref int SpillOffset => ref _data->SpillOffset;
 
         public bool IsFixed => _data->IsFixed;
-        public ref bool IsFixedAndUsed => ref _data->IsFixedAndUsed;
         public bool IsEmpty => FirstRange == default;
         public bool IsSplit => Children.Count != 0;
         public bool IsSpilled => SpillOffset != -1;
@@ -80,25 +76,6 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             Register = register;
         }
 
-        public void SetCopySource(LiveInterval copySource)
-        {
-            CopySource = copySource;
-        }
-
-        public bool TryGetCopySourceRegister(out int copySourceRegIndex)
-        {
-            if (CopySource._data != null)
-            {
-                copySourceRegIndex = CopySource.Register.Index;
-
-                return true;
-            }
-
-            copySourceRegIndex = 0;
-
-            return false;
-        }
-
         public void Reset()
         {
             PrevRange = default;
@@ -137,7 +114,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             }
             else
             {
-                FirstRange = new LiveRange(position, position + 1);
+                FirstRange = new LiveRange(position, position + 1); 
                 End = position + 1;
             }
         }
@@ -261,10 +238,8 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 
         public LiveInterval Split(int position)
         {
-            LiveInterval result = new(Local, Parent)
-            {
-                End = End,
-            };
+            LiveInterval result = new(Local, Parent);
+            result.End = End;
 
             LiveRange prev = PrevRange;
             LiveRange curr = CurrRange;
@@ -416,4 +391,4 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             return string.Join(", ", GetRanges());
         }
     }
-}
+}

ARMeilleure/CodeGen/RegisterAllocators/LiveIntervalList.cs

@@ -1,4 +1,4 @@
-using System;
+using System;
 
 namespace ARMeilleure.CodeGen.RegisterAllocators
 {
@@ -8,8 +8,8 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
         private int _count;
         private int _capacity;
 
-        public readonly int Count => _count;
-        public readonly Span<LiveInterval> Span => new(_items, _count);
+        public int Count => _count;
+        public Span<LiveInterval> Span => new(_items, _count);
 
         public void Add(LiveInterval interval)
         {
@@ -37,4 +37,4 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             _count++;
         }
     }
-}
+}

ARMeilleure/CodeGen/RegisterAllocators/LiveRange.cs

@@ -71,4 +71,4 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             return $"[{Start}, {End})";
         }
     }
-}
+}

ARMeilleure/CodeGen/RegisterAllocators/RegisterMasks.cs

@@ -3,15 +3,14 @@ using System;
 
 namespace ARMeilleure.CodeGen.RegisterAllocators
 {
-    readonly struct RegisterMasks
+    struct RegisterMasks
     {
-        public int IntAvailableRegisters { get; }
-        public int VecAvailableRegisters { get; }
+        public int IntAvailableRegisters   { get; }
+        public int VecAvailableRegisters   { get; }
         public int IntCallerSavedRegisters { get; }
         public int VecCallerSavedRegisters { get; }
         public int IntCalleeSavedRegisters { get; }
         public int VecCalleeSavedRegisters { get; }
-        public int RegistersCount { get; }
 
         public RegisterMasks(
             int intAvailableRegisters,
@@ -19,16 +18,14 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             int intCallerSavedRegisters,
             int vecCallerSavedRegisters,
             int intCalleeSavedRegisters,
-            int vecCalleeSavedRegisters,
-            int registersCount)
+            int vecCalleeSavedRegisters)
         {
-            IntAvailableRegisters = intAvailableRegisters;
-            VecAvailableRegisters = vecAvailableRegisters;
+            IntAvailableRegisters   = intAvailableRegisters;
+            VecAvailableRegisters   = vecAvailableRegisters;
             IntCallerSavedRegisters = intCallerSavedRegisters;
             VecCallerSavedRegisters = vecCallerSavedRegisters;
             IntCalleeSavedRegisters = intCalleeSavedRegisters;
             VecCalleeSavedRegisters = vecCalleeSavedRegisters;
-            RegistersCount = registersCount;
         }
 
         public int GetAvailableRegisters(RegisterType type)
@@ -47,4 +44,4 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             }
         }
     }
-}
+}

ARMeilleure/CodeGen/RegisterAllocators/StackAllocator.cs

@@ -1,4 +1,6 @@
+using ARMeilleure.Common;
 using ARMeilleure.IntermediateRepresentation;
+using System;
 
 namespace ARMeilleure.CodeGen.RegisterAllocators
 {
@@ -22,4 +24,4 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             return offset;
         }
     }
-}
+}

ARMeilleure/CodeGen/RegisterAllocators/UseList.cs

@@ -0,0 +1,84 @@
+using System;
+
+namespace ARMeilleure.CodeGen.RegisterAllocators
+{
+    unsafe struct UseList
+    {
+        private int* _items;
+        private int _capacity;
+        private int _count;
+
+        public int Count => _count;
+        public int FirstUse => _count > 0 ? _items[_count - 1] : LiveInterval.NotFound;
+        public Span<int> Span => new(_items, _count);
+
+        public void Add(int position)
+        {
+            if (_count + 1 > _capacity)
+            {
+                var oldSpan = Span;
+
+                _capacity = Math.Max(4, _capacity * 2);
+                _items = Allocators.Default.Allocate<int>((uint)_capacity);
+
+                var newSpan = Span;
+
+                oldSpan.CopyTo(newSpan);
+            }
+
+            // Use positions are usually inserted in descending order, so inserting in descending order is faster,
+            // since the number of half exchanges is reduced.
+            int i = _count - 1;
+
+            while (i >= 0 && _items[i] < position)
+            {
+                _items[i + 1] = _items[i--];
+            }
+
+            _items[i + 1] = position;
+            _count++;
+        }
+
+        public int NextUse(int position)
+        {
+            int index = NextUseIndex(position);
+
+            return index != LiveInterval.NotFound ? _items[index] : LiveInterval.NotFound;
+        }
+
+        public int NextUseIndex(int position)
+        {
+            int i = _count - 1;
+
+            if (i == -1 || position > _items[0])
+            {
+                return LiveInterval.NotFound;
+            }
+
+            while (i >= 0 && _items[i] < position)
+            {
+                i--;
+            }
+
+            return i;
+        }
+
+        public UseList Split(int position)
+        {
+            int index = NextUseIndex(position);
+
+            // Since the list is in descending order, the new split list takes the front of the list and the current
+            // list takes the back of the list.
+            UseList result = new();
+            result._count = index + 1;
+            result._capacity = result._count;
+            result._items = _items;
+
+            _count = _count - result._count;
+            _capacity = _count;
+            _items = _items + result._count;
+
+            return result;
+        }
+    }
+}

ARMeilleure/CodeGen/Unwinding/UnwindInfo.cs

@@ -13,4 +13,4 @@ namespace ARMeilleure.CodeGen.Unwinding
             PrologSize = prologSize;
         }
     }
-}
+}

ARMeilleure/CodeGen/Unwinding/UnwindPseudoOp.cs

@@ -0,0 +1,11 @@
+namespace ARMeilleure.CodeGen.Unwinding
+{
+    enum UnwindPseudoOp
+    {
+        PushReg    = 0,
+        SetFrame   = 1,
+        AllocStack = 2,
+        SaveReg    = 3,
+        SaveXmm128 = 4
+    }
+}

ARMeilleure/CodeGen/Unwinding/UnwindPushEntry.cs

@@ -17,4 +17,4 @@ namespace ARMeilleure.CodeGen.Unwinding
             StackOffsetOrAllocSize = stackOffsetOrAllocSize;
         }
     }
-}
+}

ARMeilleure/CodeGen/X86/AssemblerTable.cs

@@ -0,0 +1,281 @@
+using System;
+
+namespace ARMeilleure.CodeGen.X86
+{
+    partial class Assembler
+    {
+        private const int BadOp = 0;
+
+        [Flags]
+        private enum InstructionFlags
+        {
+            None     = 0,
+            RegOnly  = 1 << 0,
+            Reg8Src  = 1 << 1,
+            Reg8Dest = 1 << 2,
+            RexW     = 1 << 3,
+            Vex      = 1 << 4,
+
+            PrefixBit  = 16,
+            PrefixMask = 7 << PrefixBit,
+            Prefix66   = 1 << PrefixBit,
+            PrefixF3   = 2 << PrefixBit,
+            PrefixF2   = 4 << PrefixBit
+        }
+
+        private readonly struct InstructionInfo
+        {
+            public int OpRMR     { get; }
+            public int OpRMImm8  { get; }
+            public int OpRMImm32 { get; }
+            public int OpRImm64  { get; }
+            public int OpRRM     { get; }
+
+            public InstructionFlags Flags { get; }
+
+            public InstructionInfo(
+                int              opRMR,
+                int              opRMImm8,
+                int              opRMImm32,
+                int              opRImm64,
+                int              opRRM,
+                InstructionFlags flags)
+            {
+                OpRMR     = opRMR;
+                OpRMImm8  = opRMImm8;
+                OpRMImm32 = opRMImm32;
+                OpRImm64  = opRImm64;
+                OpRRM     = opRRM;
+                Flags     = flags;
+            }
+        }
+
+        private readonly static InstructionInfo[] _instTable;
+
+        static Assembler()
+        {
+            _instTable = new InstructionInfo[(int)X86Instruction.Count];
+
+            //  Name                                             RM/R        RM/I8       RM/I32      R/I64       R/RM        Flags
+            Add(X86Instruction.Add,          new InstructionInfo(0x00000001, 0x00000083, 0x00000081, BadOp,      0x00000003, InstructionFlags.None));
+            Add(X86Instruction.Addpd,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f58, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Addps,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f58, InstructionFlags.Vex));
+            Add(X86Instruction.Addsd,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f58, InstructionFlags.Vex | InstructionFlags.PrefixF2));
+            Add(X86Instruction.Addss,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f58, InstructionFlags.Vex | InstructionFlags.PrefixF3));
+            Add(X86Instruction.Aesdec,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f38de, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Aesdeclast,   new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f38df, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Aesenc,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f38dc, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Aesenclast,   new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f38dd, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Aesimc,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f38db, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.And,          new InstructionInfo(0x00000021, 0x04000083, 0x04000081, BadOp,      0x00000023, InstructionFlags.None));
+            Add(X86Instruction.Andnpd,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f55, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Andnps,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f55, InstructionFlags.Vex));
+            Add(X86Instruction.Andpd,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f54, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Andps,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f54, InstructionFlags.Vex));
+            Add(X86Instruction.Blendvpd,     new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f3815, InstructionFlags.Prefix66));
+            Add(X86Instruction.Blendvps,     new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f3814, InstructionFlags.Prefix66));
+            Add(X86Instruction.Bsr,          new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000fbd, InstructionFlags.None));
+            Add(X86Instruction.Bswap,        new InstructionInfo(0x00000fc8, BadOp,      BadOp,      BadOp,      BadOp,      InstructionFlags.RegOnly));
+            Add(X86Instruction.Call,         new InstructionInfo(0x020000ff, BadOp,      BadOp,      BadOp,      BadOp,      InstructionFlags.None));
+            Add(X86Instruction.Cmovcc,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f40, InstructionFlags.None));
+            Add(X86Instruction.Cmp,          new InstructionInfo(0x00000039, 0x07000083, 0x07000081, BadOp,      0x0000003b, InstructionFlags.None));
+            Add(X86Instruction.Cmppd,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000fc2, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Cmpps,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000fc2, InstructionFlags.Vex));
+            Add(X86Instruction.Cmpsd,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000fc2, InstructionFlags.Vex | InstructionFlags.PrefixF2));
+            Add(X86Instruction.Cmpss,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000fc2, InstructionFlags.Vex | InstructionFlags.PrefixF3));
+            Add(X86Instruction.Cmpxchg,      new InstructionInfo(0x00000fb1, BadOp,      BadOp,      BadOp,      BadOp,      InstructionFlags.None));
+            Add(X86Instruction.Cmpxchg16b,   new InstructionInfo(0x01000fc7, BadOp,      BadOp,      BadOp,      BadOp,      InstructionFlags.RexW));
+            Add(X86Instruction.Cmpxchg8,     new InstructionInfo(0x00000fb0, BadOp,      BadOp,      BadOp,      BadOp,      InstructionFlags.Reg8Src));
+            Add(X86Instruction.Comisd,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f2f, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Comiss,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f2f, InstructionFlags.Vex));
+            Add(X86Instruction.Crc32,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f38f1, InstructionFlags.PrefixF2));
+            Add(X86Instruction.Crc32_16,     new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f38f1, InstructionFlags.PrefixF2 | InstructionFlags.Prefix66));
+            Add(X86Instruction.Crc32_8,      new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f38f0, InstructionFlags.PrefixF2 | InstructionFlags.Reg8Src));
+            Add(X86Instruction.Cvtdq2pd,     new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000fe6, InstructionFlags.Vex | InstructionFlags.PrefixF3));
+            Add(X86Instruction.Cvtdq2ps,     new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f5b, InstructionFlags.Vex));
+            Add(X86Instruction.Cvtpd2dq,     new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000fe6, InstructionFlags.Vex | InstructionFlags.PrefixF2));
+            Add(X86Instruction.Cvtpd2ps,     new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f5a, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Cvtps2dq,     new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f5b, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Cvtps2pd,     new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f5a, InstructionFlags.Vex));
+            Add(X86Instruction.Cvtsd2si,     new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f2d, InstructionFlags.Vex | InstructionFlags.PrefixF2));
+            Add(X86Instruction.Cvtsd2ss,     new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f5a, InstructionFlags.Vex | InstructionFlags.PrefixF2));
+            Add(X86Instruction.Cvtsi2sd,     new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f2a, InstructionFlags.Vex | InstructionFlags.PrefixF2));
+            Add(X86Instruction.Cvtsi2ss,     new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f2a, InstructionFlags.Vex | InstructionFlags.PrefixF3));
+            Add(X86Instruction.Cvtss2sd,     new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f5a, InstructionFlags.Vex | InstructionFlags.PrefixF3));
+            Add(X86Instruction.Cvtss2si,     new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f2d, InstructionFlags.Vex | InstructionFlags.PrefixF3));
+            Add(X86Instruction.Div,          new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x060000f7, InstructionFlags.None));
+            Add(X86Instruction.Divpd,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f5e, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Divps,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f5e, InstructionFlags.Vex));
+            Add(X86Instruction.Divsd,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f5e, InstructionFlags.Vex | InstructionFlags.PrefixF2));
+            Add(X86Instruction.Divss,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f5e, InstructionFlags.Vex | InstructionFlags.PrefixF3));
+            Add(X86Instruction.Haddpd,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f7c, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Haddps,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f7c, InstructionFlags.Vex | InstructionFlags.PrefixF2));
+            Add(X86Instruction.Idiv,         new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x070000f7, InstructionFlags.None));
+            Add(X86Instruction.Imul,         new InstructionInfo(BadOp,      0x0000006b, 0x00000069, BadOp,      0x00000faf, InstructionFlags.None));
+            Add(X86Instruction.Imul128,      new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x050000f7, InstructionFlags.None));
+            Add(X86Instruction.Insertps,     new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f3a21, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Jmp,          new InstructionInfo(0x040000ff, BadOp,      BadOp,      BadOp,      BadOp,      InstructionFlags.None));
+            Add(X86Instruction.Ldmxcsr,      new InstructionInfo(0x02000fae, BadOp,      BadOp,      BadOp,      BadOp,      InstructionFlags.Vex));
+            Add(X86Instruction.Lea,          new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x0000008d, InstructionFlags.None));
+            Add(X86Instruction.Maxpd,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f5f, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Maxps,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f5f, InstructionFlags.Vex));
+            Add(X86Instruction.Maxsd,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f5f, InstructionFlags.Vex | InstructionFlags.PrefixF2));
+            Add(X86Instruction.Maxss,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f5f, InstructionFlags.Vex | InstructionFlags.PrefixF3));
+            Add(X86Instruction.Minpd,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f5d, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Minps,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f5d, InstructionFlags.Vex));
+            Add(X86Instruction.Minsd,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f5d, InstructionFlags.Vex | InstructionFlags.PrefixF2));
+            Add(X86Instruction.Minss,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f5d, InstructionFlags.Vex | InstructionFlags.PrefixF3));
+            Add(X86Instruction.Mov,          new InstructionInfo(0x00000089, BadOp,      0x000000c7, 0x000000b8, 0x0000008b, InstructionFlags.None));
+            Add(X86Instruction.Mov16,        new InstructionInfo(0x00000089, BadOp,      0x000000c7, BadOp,      0x0000008b, InstructionFlags.Prefix66));
+            Add(X86Instruction.Mov8,         new InstructionInfo(0x00000088, 0x000000c6, BadOp,      BadOp,      0x0000008a, InstructionFlags.Reg8Src | InstructionFlags.Reg8Dest));
+            Add(X86Instruction.Movd,         new InstructionInfo(0x00000f7e, BadOp,      BadOp,      BadOp,      0x00000f6e, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Movdqu,       new InstructionInfo(0x00000f7f, BadOp,      BadOp,      BadOp,      0x00000f6f, InstructionFlags.Vex | InstructionFlags.PrefixF3));
+            Add(X86Instruction.Movhlps,      new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f12, InstructionFlags.Vex));
+            Add(X86Instruction.Movlhps,      new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f16, InstructionFlags.Vex));
+            Add(X86Instruction.Movq,         new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f7e, InstructionFlags.Vex | InstructionFlags.PrefixF3));
+            Add(X86Instruction.Movsd,        new InstructionInfo(0x00000f11, BadOp,      BadOp,      BadOp,      0x00000f10, InstructionFlags.Vex | InstructionFlags.PrefixF2));
+            Add(X86Instruction.Movss,        new InstructionInfo(0x00000f11, BadOp,      BadOp,      BadOp,      0x00000f10, InstructionFlags.Vex | InstructionFlags.PrefixF3));
+            Add(X86Instruction.Movsx16,      new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000fbf, InstructionFlags.None));
+            Add(X86Instruction.Movsx32,      new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000063, InstructionFlags.None));
+            Add(X86Instruction.Movsx8,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000fbe, InstructionFlags.Reg8Src));
+            Add(X86Instruction.Movzx16,      new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000fb7, InstructionFlags.None));
+            Add(X86Instruction.Movzx8,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000fb6, InstructionFlags.Reg8Src));
+            Add(X86Instruction.Mul128,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x040000f7, InstructionFlags.None));
+            Add(X86Instruction.Mulpd,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f59, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Mulps,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f59, InstructionFlags.Vex));
+            Add(X86Instruction.Mulsd,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f59, InstructionFlags.Vex | InstructionFlags.PrefixF2));
+            Add(X86Instruction.Mulss,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f59, InstructionFlags.Vex | InstructionFlags.PrefixF3));
+            Add(X86Instruction.Neg,          new InstructionInfo(0x030000f7, BadOp,      BadOp,      BadOp,      BadOp,      InstructionFlags.None));
+            Add(X86Instruction.Not,          new InstructionInfo(0x020000f7, BadOp,      BadOp,      BadOp,      BadOp,      InstructionFlags.None));
+            Add(X86Instruction.Or,           new InstructionInfo(0x00000009, 0x01000083, 0x01000081, BadOp,      0x0000000b, InstructionFlags.None));
+            Add(X86Instruction.Paddb,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000ffc, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Paddd,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000ffe, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Paddq,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000fd4, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Paddw,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000ffd, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pand,         new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000fdb, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pandn,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000fdf, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pavgb,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000fe0, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pavgw,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000fe3, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pblendvb,     new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f3810, InstructionFlags.Prefix66));
+            Add(X86Instruction.Pclmulqdq,    new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f3a44, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pcmpeqb,      new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f74, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pcmpeqd,      new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f76, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pcmpeqq,      new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f3829, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pcmpeqw,      new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f75, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pcmpgtb,      new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f64, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pcmpgtd,      new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f66, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pcmpgtq,      new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f3837, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pcmpgtw,      new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f65, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pextrb,       new InstructionInfo(0x000f3a14, BadOp,      BadOp,      BadOp,      BadOp,      InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pextrd,       new InstructionInfo(0x000f3a16, BadOp,      BadOp,      BadOp,      BadOp,      InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pextrq,       new InstructionInfo(0x000f3a16, BadOp,      BadOp,      BadOp,      BadOp,      InstructionFlags.Vex | InstructionFlags.RexW | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pextrw,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000fc5, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pinsrb,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f3a20, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pinsrd,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f3a22, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pinsrq,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f3a22, InstructionFlags.Vex | InstructionFlags.RexW | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pinsrw,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000fc4, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pmaxsb,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f383c, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pmaxsd,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f383d, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pmaxsw,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000fee, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pmaxub,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000fde, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pmaxud,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f383f, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pmaxuw,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f383e, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pminsb,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f3838, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pminsd,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f3839, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pminsw,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000fea, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pminub,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000fda, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pminud,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f383b, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pminuw,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f383a, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pmovsxbw,     new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f3820, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pmovsxdq,     new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f3825, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pmovsxwd,     new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f3823, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pmovzxbw,     new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f3830, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pmovzxdq,     new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f3835, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pmovzxwd,     new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f3833, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pmulld,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f3840, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pmullw,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000fd5, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pop,          new InstructionInfo(0x0000008f, BadOp,      BadOp,      BadOp,      BadOp,      InstructionFlags.None));
+            Add(X86Instruction.Popcnt,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000fb8, InstructionFlags.PrefixF3));
+            Add(X86Instruction.Por,          new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000feb, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pshufb,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f3800, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pshufd,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f70, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pslld,        new InstructionInfo(BadOp,      0x06000f72, BadOp,      BadOp,      0x00000ff2, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Pslldq,       new InstructionInfo(BadOp,      0x07000f73, BadOp,      BadOp,      BadOp,      InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Psllq,        new InstructionInfo(BadOp,      0x06000f73, BadOp,      BadOp,      0x00000ff3, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Psllw,        new InstructionInfo(BadOp,      0x06000f71, BadOp,      BadOp,      0x00000ff1, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Psrad,        new InstructionInfo(BadOp,      0x04000f72, BadOp,      BadOp,      0x00000fe2, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Psraw,        new InstructionInfo(BadOp,      0x04000f71, BadOp,      BadOp,      0x00000fe1, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Psrld,        new InstructionInfo(BadOp,      0x02000f72, BadOp,      BadOp,      0x00000fd2, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Psrlq,        new InstructionInfo(BadOp,      0x02000f73, BadOp,      BadOp,      0x00000fd3, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Psrldq,       new InstructionInfo(BadOp,      0x03000f73, BadOp,      BadOp,      BadOp,      InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Psrlw,        new InstructionInfo(BadOp,      0x02000f71, BadOp,      BadOp,      0x00000fd1, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Psubb,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000ff8, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Psubd,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000ffa, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Psubq,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000ffb, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Psubw,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000ff9, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Punpckhbw,    new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f68, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Punpckhdq,    new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f6a, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Punpckhqdq,   new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f6d, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Punpckhwd,    new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f69, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Punpcklbw,    new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f60, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Punpckldq,    new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f62, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Punpcklqdq,   new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f6c, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Punpcklwd,    new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f61, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Push,         new InstructionInfo(BadOp,      0x0000006a, 0x00000068, BadOp,      0x060000ff, InstructionFlags.None));
+            Add(X86Instruction.Pxor,         new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000fef, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Rcpps,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f53, InstructionFlags.Vex));
+            Add(X86Instruction.Rcpss,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f53, InstructionFlags.Vex | InstructionFlags.PrefixF3));
+            Add(X86Instruction.Ror,          new InstructionInfo(0x010000d3, 0x010000c1, BadOp,      BadOp,      BadOp,      InstructionFlags.None));
+            Add(X86Instruction.Roundpd,      new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f3a09, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Roundps,      new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f3a08, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Roundsd,      new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f3a0b, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Roundss,      new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f3a0a, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Rsqrtps,      new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f52, InstructionFlags.Vex));
+            Add(X86Instruction.Rsqrtss,      new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f52, InstructionFlags.Vex | InstructionFlags.PrefixF3));
+            Add(X86Instruction.Sar,          new InstructionInfo(0x070000d3, 0x070000c1, BadOp,      BadOp,      BadOp,      InstructionFlags.None));
+            Add(X86Instruction.Setcc,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f90, InstructionFlags.Reg8Dest));
+            Add(X86Instruction.Shl,          new InstructionInfo(0x040000d3, 0x040000c1, BadOp,      BadOp,      BadOp,      InstructionFlags.None));
+            Add(X86Instruction.Shr,          new InstructionInfo(0x050000d3, 0x050000c1, BadOp,      BadOp,      BadOp,      InstructionFlags.None));
+            Add(X86Instruction.Shufpd,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000fc6, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Shufps,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000fc6, InstructionFlags.Vex));
+            Add(X86Instruction.Sqrtpd,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f51, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Sqrtps,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f51, InstructionFlags.Vex));
+            Add(X86Instruction.Sqrtsd,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f51, InstructionFlags.Vex | InstructionFlags.PrefixF2));
+            Add(X86Instruction.Sqrtss,       new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f51, InstructionFlags.Vex | InstructionFlags.PrefixF3));
+            Add(X86Instruction.Stmxcsr,      new InstructionInfo(0x03000fae, BadOp,      BadOp,      BadOp,      BadOp,      InstructionFlags.Vex));
+            Add(X86Instruction.Sub,          new InstructionInfo(0x00000029, 0x05000083, 0x05000081, BadOp,      0x0000002b, InstructionFlags.None));
+            Add(X86Instruction.Subpd,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f5c, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Subps,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f5c, InstructionFlags.Vex));
+            Add(X86Instruction.Subsd,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f5c, InstructionFlags.Vex | InstructionFlags.PrefixF2));
+            Add(X86Instruction.Subss,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f5c, InstructionFlags.Vex | InstructionFlags.PrefixF3));
+            Add(X86Instruction.Test,         new InstructionInfo(0x00000085, BadOp,      0x000000f7, BadOp,      BadOp,      InstructionFlags.None));
+            Add(X86Instruction.Unpckhpd,     new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f15, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Unpckhps,     new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f15, InstructionFlags.Vex));
+            Add(X86Instruction.Unpcklpd,     new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f14, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Unpcklps,     new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f14, InstructionFlags.Vex));
+            Add(X86Instruction.Vblendvpd,    new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f3a4b, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Vblendvps,    new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f3a4a, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Vcvtph2ps,    new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f3813, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Vcvtps2ph,    new InstructionInfo(0x000f3a1d, BadOp,      BadOp,      BadOp,      BadOp,      InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Vfmadd231ps,  new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f38b8, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Vfmadd231sd,  new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f38b9, InstructionFlags.Vex | InstructionFlags.Prefix66 | InstructionFlags.RexW));
+            Add(X86Instruction.Vfmadd231ss,  new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f38b9, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Vfmsub231sd,  new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f38bb, InstructionFlags.Vex | InstructionFlags.Prefix66 | InstructionFlags.RexW));
+            Add(X86Instruction.Vfmsub231ss,  new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f38bb, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Vfnmadd231ps, new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f38bc, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Vfnmadd231sd, new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f38bd, InstructionFlags.Vex | InstructionFlags.Prefix66 | InstructionFlags.RexW));
+            Add(X86Instruction.Vfnmadd231ss, new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f38bd, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Vfnmsub231sd, new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f38bf, InstructionFlags.Vex | InstructionFlags.Prefix66 | InstructionFlags.RexW));
+            Add(X86Instruction.Vfnmsub231ss, new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f38bf, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Vpblendvb,    new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x000f3a4c, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Xor,          new InstructionInfo(0x00000031, 0x06000083, 0x06000081, BadOp,      0x00000033, InstructionFlags.None));
+            Add(X86Instruction.Xorpd,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f57, InstructionFlags.Vex | InstructionFlags.Prefix66));
+            Add(X86Instruction.Xorps,        new InstructionInfo(BadOp,      BadOp,      BadOp,      BadOp,      0x00000f57, InstructionFlags.Vex));
+
+            static void Add(X86Instruction inst, in InstructionInfo info)
+            {
+                _instTable[(int)inst] = info;
+            }
+        }
+    }
+}

ARMeilleure/CodeGen/X86/CallConvName.cs

@@ -3,6 +3,6 @@ namespace ARMeilleure.CodeGen.X86
     enum CallConvName
     {
         SystemV,
-        Windows,
+        Windows
     }
-}
+}

ARMeilleure/CodeGen/X86/CallingConvention.cs

@@ -0,0 +1,159 @@
+using System;
+using System.Runtime.InteropServices;
+
+namespace ARMeilleure.CodeGen.X86
+{
+    static class CallingConvention
+    {
+        private const int RegistersMask = 0xffff;
+
+        public static int GetIntAvailableRegisters()
+        {
+            return RegistersMask & ~(1 << (int)X86Register.Rsp);
+        }
+
+        public static int GetVecAvailableRegisters()
+        {
+            return RegistersMask;
+        }
+
+        public static int GetIntCallerSavedRegisters()
+        {
+            if (GetCurrentCallConv() == CallConvName.Windows)
+            {
+                return (1 << (int)X86Register.Rax) |
+                       (1 << (int)X86Register.Rcx) |
+                       (1 << (int)X86Register.Rdx) |
+                       (1 << (int)X86Register.R8)  |
+                       (1 << (int)X86Register.R9)  |
+                       (1 << (int)X86Register.R10) |
+                       (1 << (int)X86Register.R11);
+            }
+            else /* if (GetCurrentCallConv() == CallConvName.SystemV) */
+            {
+                return (1 << (int)X86Register.Rax) |
+                       (1 << (int)X86Register.Rcx) |
+                       (1 << (int)X86Register.Rdx) |
+                       (1 << (int)X86Register.Rsi) |
+                       (1 << (int)X86Register.Rdi) |
+                       (1 << (int)X86Register.R8)  |
+                       (1 << (int)X86Register.R9)  |
+                       (1 << (int)X86Register.R10) |
+                       (1 << (int)X86Register.R11);
+            }
+        }
+
+        public static int GetVecCallerSavedRegisters()
+        {
+            if (GetCurrentCallConv() == CallConvName.Windows)
+            {
+                return (1 << (int)X86Register.Xmm0) |
+                       (1 << (int)X86Register.Xmm1) |
+                       (1 << (int)X86Register.Xmm2) |
+                       (1 << (int)X86Register.Xmm3) |
+                       (1 << (int)X86Register.Xmm4) |
+                       (1 << (int)X86Register.Xmm5);
+            }
+            else /* if (GetCurrentCallConv() == CallConvName.SystemV) */
+            {
+                return RegistersMask;
+            }
+        }
+
+        public static int GetIntCalleeSavedRegisters()
+        {
+            return GetIntCallerSavedRegisters() ^ RegistersMask;
+        }
+
+        public static int GetVecCalleeSavedRegisters()
+        {
+            return GetVecCallerSavedRegisters() ^ RegistersMask;
+        }
+
+        public static int GetArgumentsOnRegsCount()
+        {
+            return 4;
+        }
+
+        public static int GetIntArgumentsOnRegsCount()
+        {
+            return 6;
+        }
+
+        public static int GetVecArgumentsOnRegsCount()
+        {
+            return 8;
+        }
+
+        public static X86Register GetIntArgumentRegister(int index)
+        {
+            if (GetCurrentCallConv() == CallConvName.Windows)
+            {
+                switch (index)
+                {
+                    case 0: return X86Register.Rcx;
+                    case 1: return X86Register.Rdx;
+                    case 2: return X86Register.R8;
+                    case 3: return X86Register.R9;
+                }
+            }
+            else /* if (GetCurrentCallConv() == CallConvName.SystemV) */
+            {
+                switch (index)
+                {
+                    case 0: return X86Register.Rdi;
+                    case 1: return X86Register.Rsi;
+                    case 2: return X86Register.Rdx;
+                    case 3: return X86Register.Rcx;
+                    case 4: return X86Register.R8;
+                    case 5: return X86Register.R9;
+                }
+            }
+
+            throw new ArgumentOutOfRangeException(nameof(index));
+        }
+
+        public static X86Register GetVecArgumentRegister(int index)
+        {
+            int count;
+
+            if (GetCurrentCallConv() == CallConvName.Windows)
+            {
+                count = 4;
+            }
+            else /* if (GetCurrentCallConv() == CallConvName.SystemV) */
+            {
+                count = 8;
+            }
+
+            if ((uint)index < count)
+            {
+                return X86Register.Xmm0 + index;
+            }
+
+            throw new ArgumentOutOfRangeException(nameof(index));
+        }
+
+        public static X86Register GetIntReturnRegister()
+        {
+            return X86Register.Rax;
+        }
+
+        public static X86Register GetIntReturnRegisterHigh()
+        {
+            return X86Register.Rdx;
+        }
+
+        public static X86Register GetVecReturnRegister()
+        {
+            return X86Register.Xmm0;
+        }
+
+        public static CallConvName GetCurrentCallConv()
+        {
+            return OperatingSystem.IsWindows()
+                ? CallConvName.Windows
+                : CallConvName.SystemV;
+        }
+    }
+}

ARMeilleure/CodeGen/X86/CodeGenCommon.cs

@@ -0,0 +1,19 @@
+using ARMeilleure.IntermediateRepresentation;
+
+namespace ARMeilleure.CodeGen.X86
+{
+    static class CodeGenCommon
+    {
+        public static bool IsLongConst(Operand op)
+        {
+            long value = op.Type == OperandType.I32 ? op.AsInt32() : op.AsInt64();
+
+            return !ConstFitsOnS32(value);
+        }
+
+        private static bool ConstFitsOnS32(long value)
+        {
+            return value == (int)value;
+        }
+    }
+}

ARMeilleure/CodeGen/X86/CodeGenContext.cs

@@ -0,0 +1,104 @@
+using ARMeilleure.CodeGen.RegisterAllocators;
+using ARMeilleure.IntermediateRepresentation;
+using System.IO;
+using System.Numerics;
+
+namespace ARMeilleure.CodeGen.X86
+{
+    class CodeGenContext
+    {
+        private readonly Stream _stream;
+        private readonly Operand[] _blockLabels;
+
+        public int StreamOffset => (int)_stream.Length;
+
+        public AllocationResult AllocResult { get; }
+
+        public Assembler Assembler { get; }
+        public BasicBlock CurrBlock { get; private set; }
+
+        public int CallArgsRegionSize { get; }
+        public int XmmSaveRegionSize { get; }
+
+        public CodeGenContext(AllocationResult allocResult, int maxCallArgs, int blocksCount, bool relocatable)
+        {
+            _stream = new MemoryStream();
+            _blockLabels = new Operand[blocksCount];
+
+            AllocResult = allocResult;
+            Assembler = new Assembler(_stream, relocatable);
+
+            CallArgsRegionSize = GetCallArgsRegionSize(allocResult, maxCallArgs, out int xmmSaveRegionSize);
+            XmmSaveRegionSize  = xmmSaveRegionSize;
+        }
+
+        private static int GetCallArgsRegionSize(AllocationResult allocResult, int maxCallArgs, out int xmmSaveRegionSize)
+        {
+            // We need to add 8 bytes to the total size, as the call to this function already pushed 8 bytes (the
+            // return address).
+            int intMask = CallingConvention.GetIntCalleeSavedRegisters() & allocResult.IntUsedRegisters;
+            int vecMask = CallingConvention.GetVecCalleeSavedRegisters() & allocResult.VecUsedRegisters;
+
+            xmmSaveRegionSize = BitOperations.PopCount((uint)vecMask) * 16;
+
+            int calleeSaveRegionSize = BitOperations.PopCount((uint)intMask) * 8 + xmmSaveRegionSize + 8;
+
+            int argsCount = maxCallArgs;
+
+            if (argsCount < 0)
+            {
+                // When the function has no calls, argsCount is -1. In this case, we don't need to allocate the shadow
+                // space.
+                argsCount = 0;
+            }
+            else if (argsCount < 4)
+            {
+                // The ABI mandates that the space for at least 4 arguments is reserved on the stack (this is called
+                // shadow space).
+                argsCount = 4;
+            }
+
+            // TODO: Align XMM save region to 16 bytes because unwinding on Windows requires it.
+            int frameSize = calleeSaveRegionSize + allocResult.SpillRegionSize;
+
+            // TODO: Instead of always multiplying by 16 (the largest possible size of a variable, since a V128 has 16
+            // bytes), we should calculate the exact size consumed by the arguments passed to the called functions on
+            // the stack.
+            int callArgsAndFrameSize = frameSize + argsCount * 16;
+
+            // Ensure that the Stack Pointer will be aligned to 16 bytes.
+            callArgsAndFrameSize = (callArgsAndFrameSize + 0xf) & ~0xf;
+
+            return callArgsAndFrameSize - frameSize;
+        }
+
+        public void EnterBlock(BasicBlock block)
+        {
+            Assembler.MarkLabel(GetLabel(block));
+
+            CurrBlock = block;
+        }
+
+        public void JumpTo(BasicBlock target)
+        {
+            Assembler.Jmp(GetLabel(target));
+        }
+
+        public void JumpTo(X86Condition condition, BasicBlock target)
+        {
+            Assembler.Jcc(condition, GetLabel(target));
+        }
+
+        private Operand GetLabel(BasicBlock block)
+        {
+            ref Operand label = ref _blockLabels[block.Index];
+
+            if (label == default)
+            {
+                label = Operand.Factory.Label();
+            }
+
+            return label;
+        }
+    }
+}

ARMeilleure/CodeGen/X86/HardwareCapabilities.cs

@@ -0,0 +1,63 @@
+using System;
+using System.Runtime.Intrinsics.X86;
+
+namespace ARMeilleure.CodeGen.X86
+{
+    static class HardwareCapabilities
+    {
+        static HardwareCapabilities()
+        {
+            if (!X86Base.IsSupported)
+            {
+                return;
+            }
+
+            (_, _, int ecx, int edx) = X86Base.CpuId(0x00000001, 0x00000000);
+
+            FeatureInfoEdx = (FeatureFlagsEdx)edx;
+            FeatureInfoEcx = (FeatureFlagsEcx)ecx;
+        }
+
+        [Flags]
+        public enum FeatureFlagsEdx
+        {
+            Sse = 1 << 25,
+            Sse2 = 1 << 26
+        }
+
+        [Flags]
+        public enum FeatureFlagsEcx
+        {
+            Sse3 = 1 << 0,
+            Pclmulqdq = 1 << 1,
+            Ssse3 = 1 << 9,
+            Fma = 1 << 12,
+            Sse41 = 1 << 19,
+            Sse42 = 1 << 20,
+            Popcnt = 1 << 23,
+            Aes = 1 << 25,
+            Avx = 1 << 28,
+            F16c = 1 << 29
+        }
+
+        public static FeatureFlagsEdx FeatureInfoEdx { get; }
+        public static FeatureFlagsEcx FeatureInfoEcx { get; }
+
+        public static bool SupportsSse => FeatureInfoEdx.HasFlag(FeatureFlagsEdx.Sse);
+        public static bool SupportsSse2 => FeatureInfoEdx.HasFlag(FeatureFlagsEdx.Sse2);
+        public static bool SupportsSse3 => FeatureInfoEcx.HasFlag(FeatureFlagsEcx.Sse3);
+        public static bool SupportsPclmulqdq => FeatureInfoEcx.HasFlag(FeatureFlagsEcx.Pclmulqdq);
+        public static bool SupportsSsse3 => FeatureInfoEcx.HasFlag(FeatureFlagsEcx.Ssse3);
+        public static bool SupportsFma => FeatureInfoEcx.HasFlag(FeatureFlagsEcx.Fma);
+        public static bool SupportsSse41 => FeatureInfoEcx.HasFlag(FeatureFlagsEcx.Sse41);
+        public static bool SupportsSse42 => FeatureInfoEcx.HasFlag(FeatureFlagsEcx.Sse42);
+        public static bool SupportsPopcnt => FeatureInfoEcx.HasFlag(FeatureFlagsEcx.Popcnt);
+        public static bool SupportsAesni => FeatureInfoEcx.HasFlag(FeatureFlagsEcx.Aes);
+        public static bool SupportsAvx => FeatureInfoEcx.HasFlag(FeatureFlagsEcx.Avx);
+        public static bool SupportsF16c => FeatureInfoEcx.HasFlag(FeatureFlagsEcx.F16c);
+
+        public static bool ForceLegacySse { get; set; }
+
+        public static bool SupportsVexEncoding => SupportsAvx && !ForceLegacySse;
+    }
+}

ARMeilleure/CodeGen/X86/IntrinsicInfo.cs

@@ -0,0 +1,14 @@
+namespace ARMeilleure.CodeGen.X86
+{
+    struct IntrinsicInfo
+    {
+        public X86Instruction Inst { get; }
+        public IntrinsicType  Type { get; }
+
+        public IntrinsicInfo(X86Instruction inst, IntrinsicType type)
+        {
+            Inst = inst;
+            Type = type;
+        }
+    }
+}

ARMeilleure/CodeGen/X86/IntrinsicTable.cs

@@ -0,0 +1,194 @@
+using ARMeilleure.Common;
+using ARMeilleure.IntermediateRepresentation;
+
+namespace ARMeilleure.CodeGen.X86
+{
+    static class IntrinsicTable
+    {
+        private const int BadOp = 0;
+
+        private static IntrinsicInfo[] _intrinTable;
+
+        static IntrinsicTable()
+        {
+            _intrinTable = new IntrinsicInfo[EnumUtils.GetCount(typeof(Intrinsic))];
+
+            Add(Intrinsic.X86Addpd,        new IntrinsicInfo(X86Instruction.Addpd,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Addps,        new IntrinsicInfo(X86Instruction.Addps,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Addsd,        new IntrinsicInfo(X86Instruction.Addsd,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Addss,        new IntrinsicInfo(X86Instruction.Addss,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Aesdec,       new IntrinsicInfo(X86Instruction.Aesdec,       IntrinsicType.Binary));
+            Add(Intrinsic.X86Aesdeclast,   new IntrinsicInfo(X86Instruction.Aesdeclast,   IntrinsicType.Binary));
+            Add(Intrinsic.X86Aesenc,       new IntrinsicInfo(X86Instruction.Aesenc,       IntrinsicType.Binary));
+            Add(Intrinsic.X86Aesenclast,   new IntrinsicInfo(X86Instruction.Aesenclast,   IntrinsicType.Binary));
+            Add(Intrinsic.X86Aesimc,       new IntrinsicInfo(X86Instruction.Aesimc,       IntrinsicType.Unary));
+            Add(Intrinsic.X86Andnpd,       new IntrinsicInfo(X86Instruction.Andnpd,       IntrinsicType.Binary));
+            Add(Intrinsic.X86Andnps,       new IntrinsicInfo(X86Instruction.Andnps,       IntrinsicType.Binary));
+            Add(Intrinsic.X86Andpd,        new IntrinsicInfo(X86Instruction.Andpd,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Andps,        new IntrinsicInfo(X86Instruction.Andps,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Blendvpd,     new IntrinsicInfo(X86Instruction.Blendvpd,     IntrinsicType.Ternary));
+            Add(Intrinsic.X86Blendvps,     new IntrinsicInfo(X86Instruction.Blendvps,     IntrinsicType.Ternary));
+            Add(Intrinsic.X86Cmppd,        new IntrinsicInfo(X86Instruction.Cmppd,        IntrinsicType.TernaryImm));
+            Add(Intrinsic.X86Cmpps,        new IntrinsicInfo(X86Instruction.Cmpps,        IntrinsicType.TernaryImm));
+            Add(Intrinsic.X86Cmpsd,        new IntrinsicInfo(X86Instruction.Cmpsd,        IntrinsicType.TernaryImm));
+            Add(Intrinsic.X86Cmpss,        new IntrinsicInfo(X86Instruction.Cmpss,        IntrinsicType.TernaryImm));
+            Add(Intrinsic.X86Comisdeq,     new IntrinsicInfo(X86Instruction.Comisd,       IntrinsicType.Comis_));
+            Add(Intrinsic.X86Comisdge,     new IntrinsicInfo(X86Instruction.Comisd,       IntrinsicType.Comis_));
+            Add(Intrinsic.X86Comisdlt,     new IntrinsicInfo(X86Instruction.Comisd,       IntrinsicType.Comis_));
+            Add(Intrinsic.X86Comisseq,     new IntrinsicInfo(X86Instruction.Comiss,       IntrinsicType.Comis_));
+            Add(Intrinsic.X86Comissge,     new IntrinsicInfo(X86Instruction.Comiss,       IntrinsicType.Comis_));
+            Add(Intrinsic.X86Comisslt,     new IntrinsicInfo(X86Instruction.Comiss,       IntrinsicType.Comis_));
+            Add(Intrinsic.X86Crc32,        new IntrinsicInfo(X86Instruction.Crc32,        IntrinsicType.Crc32));
+            Add(Intrinsic.X86Crc32_16,     new IntrinsicInfo(X86Instruction.Crc32_16,     IntrinsicType.Crc32));
+            Add(Intrinsic.X86Crc32_8,      new IntrinsicInfo(X86Instruction.Crc32_8,      IntrinsicType.Crc32));
+            Add(Intrinsic.X86Cvtdq2pd,     new IntrinsicInfo(X86Instruction.Cvtdq2pd,     IntrinsicType.Unary));
+            Add(Intrinsic.X86Cvtdq2ps,     new IntrinsicInfo(X86Instruction.Cvtdq2ps,     IntrinsicType.Unary));
+            Add(Intrinsic.X86Cvtpd2dq,     new IntrinsicInfo(X86Instruction.Cvtpd2dq,     IntrinsicType.Unary));
+            Add(Intrinsic.X86Cvtpd2ps,     new IntrinsicInfo(X86Instruction.Cvtpd2ps,     IntrinsicType.Unary));
+            Add(Intrinsic.X86Cvtps2dq,     new IntrinsicInfo(X86Instruction.Cvtps2dq,     IntrinsicType.Unary));
+            Add(Intrinsic.X86Cvtps2pd,     new IntrinsicInfo(X86Instruction.Cvtps2pd,     IntrinsicType.Unary));
+            Add(Intrinsic.X86Cvtsd2si,     new IntrinsicInfo(X86Instruction.Cvtsd2si,     IntrinsicType.UnaryToGpr));
+            Add(Intrinsic.X86Cvtsd2ss,     new IntrinsicInfo(X86Instruction.Cvtsd2ss,     IntrinsicType.Binary));
+            Add(Intrinsic.X86Cvtsi2sd,     new IntrinsicInfo(X86Instruction.Cvtsi2sd,     IntrinsicType.BinaryGpr));
+            Add(Intrinsic.X86Cvtsi2si,     new IntrinsicInfo(X86Instruction.Movd,         IntrinsicType.UnaryToGpr));
+            Add(Intrinsic.X86Cvtsi2ss,     new IntrinsicInfo(X86Instruction.Cvtsi2ss,     IntrinsicType.BinaryGpr));
+            Add(Intrinsic.X86Cvtss2sd,     new IntrinsicInfo(X86Instruction.Cvtss2sd,     IntrinsicType.Binary));
+            Add(Intrinsic.X86Cvtss2si,     new IntrinsicInfo(X86Instruction.Cvtss2si,     IntrinsicType.UnaryToGpr));
+            Add(Intrinsic.X86Divpd,        new IntrinsicInfo(X86Instruction.Divpd,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Divps,        new IntrinsicInfo(X86Instruction.Divps,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Divsd,        new IntrinsicInfo(X86Instruction.Divsd,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Divss,        new IntrinsicInfo(X86Instruction.Divss,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Haddpd,       new IntrinsicInfo(X86Instruction.Haddpd,       IntrinsicType.Binary));
+            Add(Intrinsic.X86Haddps,       new IntrinsicInfo(X86Instruction.Haddps,       IntrinsicType.Binary));
+            Add(Intrinsic.X86Insertps,     new IntrinsicInfo(X86Instruction.Insertps,     IntrinsicType.TernaryImm));
+            Add(Intrinsic.X86Maxpd,        new IntrinsicInfo(X86Instruction.Maxpd,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Maxps,        new IntrinsicInfo(X86Instruction.Maxps,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Maxsd,        new IntrinsicInfo(X86Instruction.Maxsd,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Maxss,        new IntrinsicInfo(X86Instruction.Maxss,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Minpd,        new IntrinsicInfo(X86Instruction.Minpd,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Minps,        new IntrinsicInfo(X86Instruction.Minps,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Minsd,        new IntrinsicInfo(X86Instruction.Minsd,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Minss,        new IntrinsicInfo(X86Instruction.Minss,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Movhlps,      new IntrinsicInfo(X86Instruction.Movhlps,      IntrinsicType.Binary));
+            Add(Intrinsic.X86Movlhps,      new IntrinsicInfo(X86Instruction.Movlhps,      IntrinsicType.Binary));
+            Add(Intrinsic.X86Movss,        new IntrinsicInfo(X86Instruction.Movss,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Mulpd,        new IntrinsicInfo(X86Instruction.Mulpd,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Mulps,        new IntrinsicInfo(X86Instruction.Mulps,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Mulsd,        new IntrinsicInfo(X86Instruction.Mulsd,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Mulss,        new IntrinsicInfo(X86Instruction.Mulss,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Mxcsrmb,      new IntrinsicInfo(X86Instruction.None,         IntrinsicType.Mxcsr)); // Mask bits.
+            Add(Intrinsic.X86Mxcsrub,      new IntrinsicInfo(X86Instruction.None,         IntrinsicType.Mxcsr)); // Unmask bits.
+            Add(Intrinsic.X86Paddb,        new IntrinsicInfo(X86Instruction.Paddb,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Paddd,        new IntrinsicInfo(X86Instruction.Paddd,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Paddq,        new IntrinsicInfo(X86Instruction.Paddq,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Paddw,        new IntrinsicInfo(X86Instruction.Paddw,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Pand,         new IntrinsicInfo(X86Instruction.Pand,         IntrinsicType.Binary));
+            Add(Intrinsic.X86Pandn,        new IntrinsicInfo(X86Instruction.Pandn,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Pavgb,        new IntrinsicInfo(X86Instruction.Pavgb,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Pavgw,        new IntrinsicInfo(X86Instruction.Pavgw,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Pblendvb,     new IntrinsicInfo(X86Instruction.Pblendvb,     IntrinsicType.Ternary));
+            Add(Intrinsic.X86Pclmulqdq,    new IntrinsicInfo(X86Instruction.Pclmulqdq,    IntrinsicType.TernaryImm));
+            Add(Intrinsic.X86Pcmpeqb,      new IntrinsicInfo(X86Instruction.Pcmpeqb,      IntrinsicType.Binary));
+            Add(Intrinsic.X86Pcmpeqd,      new IntrinsicInfo(X86Instruction.Pcmpeqd,      IntrinsicType.Binary));
+            Add(Intrinsic.X86Pcmpeqq,      new IntrinsicInfo(X86Instruction.Pcmpeqq,      IntrinsicType.Binary));
+            Add(Intrinsic.X86Pcmpeqw,      new IntrinsicInfo(X86Instruction.Pcmpeqw,      IntrinsicType.Binary));
+            Add(Intrinsic.X86Pcmpgtb,      new IntrinsicInfo(X86Instruction.Pcmpgtb,      IntrinsicType.Binary));
+            Add(Intrinsic.X86Pcmpgtd,      new IntrinsicInfo(X86Instruction.Pcmpgtd,      IntrinsicType.Binary));
+            Add(Intrinsic.X86Pcmpgtq,      new IntrinsicInfo(X86Instruction.Pcmpgtq,      IntrinsicType.Binary));
+            Add(Intrinsic.X86Pcmpgtw,      new IntrinsicInfo(X86Instruction.Pcmpgtw,      IntrinsicType.Binary));
+            Add(Intrinsic.X86Pmaxsb,       new IntrinsicInfo(X86Instruction.Pmaxsb,       IntrinsicType.Binary));
+            Add(Intrinsic.X86Pmaxsd,       new IntrinsicInfo(X86Instruction.Pmaxsd,       IntrinsicType.Binary));
+            Add(Intrinsic.X86Pmaxsw,       new IntrinsicInfo(X86Instruction.Pmaxsw,       IntrinsicType.Binary));
+            Add(Intrinsic.X86Pmaxub,       new IntrinsicInfo(X86Instruction.Pmaxub,       IntrinsicType.Binary));
+            Add(Intrinsic.X86Pmaxud,       new IntrinsicInfo(X86Instruction.Pmaxud,       IntrinsicType.Binary));
+            Add(Intrinsic.X86Pmaxuw,       new IntrinsicInfo(X86Instruction.Pmaxuw,       IntrinsicType.Binary));
+            Add(Intrinsic.X86Pminsb,       new IntrinsicInfo(X86Instruction.Pminsb,       IntrinsicType.Binary));
+            Add(Intrinsic.X86Pminsd,       new IntrinsicInfo(X86Instruction.Pminsd,       IntrinsicType.Binary));
+            Add(Intrinsic.X86Pminsw,       new IntrinsicInfo(X86Instruction.Pminsw,       IntrinsicType.Binary));
+            Add(Intrinsic.X86Pminub,       new IntrinsicInfo(X86Instruction.Pminub,       IntrinsicType.Binary));
+            Add(Intrinsic.X86Pminud,       new IntrinsicInfo(X86Instruction.Pminud,       IntrinsicType.Binary));
+            Add(Intrinsic.X86Pminuw,       new IntrinsicInfo(X86Instruction.Pminuw,       IntrinsicType.Binary));
+            Add(Intrinsic.X86Pmovsxbw,     new IntrinsicInfo(X86Instruction.Pmovsxbw,     IntrinsicType.Unary));
+            Add(Intrinsic.X86Pmovsxdq,     new IntrinsicInfo(X86Instruction.Pmovsxdq,     IntrinsicType.Unary));
+            Add(Intrinsic.X86Pmovsxwd,     new IntrinsicInfo(X86Instruction.Pmovsxwd,     IntrinsicType.Unary));
+            Add(Intrinsic.X86Pmovzxbw,     new IntrinsicInfo(X86Instruction.Pmovzxbw,     IntrinsicType.Unary));
+            Add(Intrinsic.X86Pmovzxdq,     new IntrinsicInfo(X86Instruction.Pmovzxdq,     IntrinsicType.Unary));
+            Add(Intrinsic.X86Pmovzxwd,     new IntrinsicInfo(X86Instruction.Pmovzxwd,     IntrinsicType.Unary));
+            Add(Intrinsic.X86Pmulld,       new IntrinsicInfo(X86Instruction.Pmulld,       IntrinsicType.Binary));
+            Add(Intrinsic.X86Pmullw,       new IntrinsicInfo(X86Instruction.Pmullw,       IntrinsicType.Binary));
+            Add(Intrinsic.X86Popcnt,       new IntrinsicInfo(X86Instruction.Popcnt,       IntrinsicType.PopCount));
+            Add(Intrinsic.X86Por,          new IntrinsicInfo(X86Instruction.Por,          IntrinsicType.Binary));
+            Add(Intrinsic.X86Pshufb,       new IntrinsicInfo(X86Instruction.Pshufb,       IntrinsicType.Binary));
+            Add(Intrinsic.X86Pshufd,       new IntrinsicInfo(X86Instruction.Pshufd,       IntrinsicType.BinaryImm));
+            Add(Intrinsic.X86Pslld,        new IntrinsicInfo(X86Instruction.Pslld,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Pslldq,       new IntrinsicInfo(X86Instruction.Pslldq,       IntrinsicType.Binary));
+            Add(Intrinsic.X86Psllq,        new IntrinsicInfo(X86Instruction.Psllq,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Psllw,        new IntrinsicInfo(X86Instruction.Psllw,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Psrad,        new IntrinsicInfo(X86Instruction.Psrad,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Psraw,        new IntrinsicInfo(X86Instruction.Psraw,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Psrld,        new IntrinsicInfo(X86Instruction.Psrld,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Psrlq,        new IntrinsicInfo(X86Instruction.Psrlq,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Psrldq,       new IntrinsicInfo(X86Instruction.Psrldq,       IntrinsicType.Binary));
+            Add(Intrinsic.X86Psrlw,        new IntrinsicInfo(X86Instruction.Psrlw,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Psubb,        new IntrinsicInfo(X86Instruction.Psubb,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Psubd,        new IntrinsicInfo(X86Instruction.Psubd,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Psubq,        new IntrinsicInfo(X86Instruction.Psubq,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Psubw,        new IntrinsicInfo(X86Instruction.Psubw,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Punpckhbw,    new IntrinsicInfo(X86Instruction.Punpckhbw,    IntrinsicType.Binary));
+            Add(Intrinsic.X86Punpckhdq,    new IntrinsicInfo(X86Instruction.Punpckhdq,    IntrinsicType.Binary));
+            Add(Intrinsic.X86Punpckhqdq,   new IntrinsicInfo(X86Instruction.Punpckhqdq,   IntrinsicType.Binary));
+            Add(Intrinsic.X86Punpckhwd,    new IntrinsicInfo(X86Instruction.Punpckhwd,    IntrinsicType.Binary));
+            Add(Intrinsic.X86Punpcklbw,    new IntrinsicInfo(X86Instruction.Punpcklbw,    IntrinsicType.Binary));
+            Add(Intrinsic.X86Punpckldq,    new IntrinsicInfo(X86Instruction.Punpckldq,    IntrinsicType.Binary));
+            Add(Intrinsic.X86Punpcklqdq,   new IntrinsicInfo(X86Instruction.Punpcklqdq,   IntrinsicType.Binary));
+            Add(Intrinsic.X86Punpcklwd,    new IntrinsicInfo(X86Instruction.Punpcklwd,    IntrinsicType.Binary));
+            Add(Intrinsic.X86Pxor,         new IntrinsicInfo(X86Instruction.Pxor,         IntrinsicType.Binary));
+            Add(Intrinsic.X86Rcpps,        new IntrinsicInfo(X86Instruction.Rcpps,        IntrinsicType.Unary));
+            Add(Intrinsic.X86Rcpss,        new IntrinsicInfo(X86Instruction.Rcpss,        IntrinsicType.Unary));
+            Add(Intrinsic.X86Roundpd,      new IntrinsicInfo(X86Instruction.Roundpd,      IntrinsicType.BinaryImm));
+            Add(Intrinsic.X86Roundps,      new IntrinsicInfo(X86Instruction.Roundps,      IntrinsicType.BinaryImm));
+            Add(Intrinsic.X86Roundsd,      new IntrinsicInfo(X86Instruction.Roundsd,      IntrinsicType.BinaryImm));
+            Add(Intrinsic.X86Roundss,      new IntrinsicInfo(X86Instruction.Roundss,      IntrinsicType.BinaryImm));
+            Add(Intrinsic.X86Rsqrtps,      new IntrinsicInfo(X86Instruction.Rsqrtps,      IntrinsicType.Unary));
+            Add(Intrinsic.X86Rsqrtss,      new IntrinsicInfo(X86Instruction.Rsqrtss,      IntrinsicType.Unary));
+            Add(Intrinsic.X86Shufpd,       new IntrinsicInfo(X86Instruction.Shufpd,       IntrinsicType.TernaryImm));
+            Add(Intrinsic.X86Shufps,       new IntrinsicInfo(X86Instruction.Shufps,       IntrinsicType.TernaryImm));
+            Add(Intrinsic.X86Sqrtpd,       new IntrinsicInfo(X86Instruction.Sqrtpd,       IntrinsicType.Unary));
+            Add(Intrinsic.X86Sqrtps,       new IntrinsicInfo(X86Instruction.Sqrtps,       IntrinsicType.Unary));
+            Add(Intrinsic.X86Sqrtsd,       new IntrinsicInfo(X86Instruction.Sqrtsd,       IntrinsicType.Unary));
+            Add(Intrinsic.X86Sqrtss,       new IntrinsicInfo(X86Instruction.Sqrtss,       IntrinsicType.Unary));
+            Add(Intrinsic.X86Subpd,        new IntrinsicInfo(X86Instruction.Subpd,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Subps,        new IntrinsicInfo(X86Instruction.Subps,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Subsd,        new IntrinsicInfo(X86Instruction.Subsd,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Subss,        new IntrinsicInfo(X86Instruction.Subss,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Unpckhpd,     new IntrinsicInfo(X86Instruction.Unpckhpd,     IntrinsicType.Binary));
+            Add(Intrinsic.X86Unpckhps,     new IntrinsicInfo(X86Instruction.Unpckhps,     IntrinsicType.Binary));
+            Add(Intrinsic.X86Unpcklpd,     new IntrinsicInfo(X86Instruction.Unpcklpd,     IntrinsicType.Binary));
+            Add(Intrinsic.X86Unpcklps,     new IntrinsicInfo(X86Instruction.Unpcklps,     IntrinsicType.Binary));
+            Add(Intrinsic.X86Vcvtph2ps,    new IntrinsicInfo(X86Instruction.Vcvtph2ps,    IntrinsicType.Unary));
+            Add(Intrinsic.X86Vcvtps2ph,    new IntrinsicInfo(X86Instruction.Vcvtps2ph,    IntrinsicType.BinaryImm));
+            Add(Intrinsic.X86Vfmadd231ps,  new IntrinsicInfo(X86Instruction.Vfmadd231ps,  IntrinsicType.Fma));
+            Add(Intrinsic.X86Vfmadd231sd,  new IntrinsicInfo(X86Instruction.Vfmadd231sd,  IntrinsicType.Fma));
+            Add(Intrinsic.X86Vfmadd231ss,  new IntrinsicInfo(X86Instruction.Vfmadd231ss,  IntrinsicType.Fma));
+            Add(Intrinsic.X86Vfmsub231sd,  new IntrinsicInfo(X86Instruction.Vfmsub231sd,  IntrinsicType.Fma));
+            Add(Intrinsic.X86Vfmsub231ss,  new IntrinsicInfo(X86Instruction.Vfmsub231ss,  IntrinsicType.Fma));
+            Add(Intrinsic.X86Vfnmadd231ps, new IntrinsicInfo(X86Instruction.Vfnmadd231ps, IntrinsicType.Fma));
+            Add(Intrinsic.X86Vfnmadd231sd, new IntrinsicInfo(X86Instruction.Vfnmadd231sd, IntrinsicType.Fma));
+            Add(Intrinsic.X86Vfnmadd231ss, new IntrinsicInfo(X86Instruction.Vfnmadd231ss, IntrinsicType.Fma));
+            Add(Intrinsic.X86Vfnmsub231sd, new IntrinsicInfo(X86Instruction.Vfnmsub231sd, IntrinsicType.Fma));
+            Add(Intrinsic.X86Vfnmsub231ss, new IntrinsicInfo(X86Instruction.Vfnmsub231ss, IntrinsicType.Fma));
+            Add(Intrinsic.X86Xorpd,        new IntrinsicInfo(X86Instruction.Xorpd,        IntrinsicType.Binary));
+            Add(Intrinsic.X86Xorps,        new IntrinsicInfo(X86Instruction.Xorps,        IntrinsicType.Binary));
+        }
+
+        private static void Add(Intrinsic intrin, IntrinsicInfo info)
+        {
+            _intrinTable[(int)intrin] = info;
+        }
+
+        public static IntrinsicInfo GetInfo(Intrinsic intrin)
+        {
+            return _intrinTable[(int)intrin];
+        }
+    }
+}

ARMeilleure/CodeGen/X86/IntrinsicType.cs

@@ -0,0 +1,18 @@
+namespace ARMeilleure.CodeGen.X86
+{
+    enum IntrinsicType
+    {
+        Comis_,
+        Mxcsr,
+        PopCount,
+        Unary,
+        UnaryToGpr,
+        Binary,
+        BinaryGpr,
+        BinaryImm,
+        Crc32,
+        Ternary,
+        TernaryImm,
+        Fma
+    }
+}

ARMeilleure/CodeGen/X86/X86Condition.cs

@@ -0,0 +1,47 @@
+using ARMeilleure.IntermediateRepresentation;
+using System;
+
+namespace ARMeilleure.CodeGen.X86
+{
+    enum X86Condition
+    {
+        Overflow       = 0x0,
+        NotOverflow    = 0x1,
+        Below          = 0x2,
+        AboveOrEqual   = 0x3,
+        Equal          = 0x4,
+        NotEqual       = 0x5,
+        BelowOrEqual   = 0x6,
+        Above          = 0x7,
+        Sign           = 0x8,
+        NotSign        = 0x9,
+        ParityEven     = 0xa,
+        ParityOdd      = 0xb,
+        Less           = 0xc,
+        GreaterOrEqual = 0xd,
+        LessOrEqual    = 0xe,
+        Greater        = 0xf
+    }
+
+    static class ComparisonX86Extensions
+    {
+        public static X86Condition ToX86Condition(this Comparison comp)
+        {
+            return comp switch
+            {
+                Comparison.Equal            => X86Condition.Equal,
+                Comparison.NotEqual         => X86Condition.NotEqual,
+                Comparison.Greater          => X86Condition.Greater,
+                Comparison.LessOrEqual      => X86Condition.LessOrEqual,
+                Comparison.GreaterUI        => X86Condition.Above,
+                Comparison.LessOrEqualUI    => X86Condition.BelowOrEqual,
+                Comparison.GreaterOrEqual   => X86Condition.GreaterOrEqual,
+                Comparison.Less             => X86Condition.Less,
+                Comparison.GreaterOrEqualUI => X86Condition.AboveOrEqual,
+                Comparison.LessUI           => X86Condition.Below,
+
+                _ => throw new ArgumentException(null, nameof(comp))
+            };
+        }
+    }
+}

ARMeilleure/CodeGen/X86/X86Instruction.cs

@@ -54,7 +54,6 @@ namespace ARMeilleure.CodeGen.X86
         Divps,
         Divsd,
         Divss,
-        Gf2p8affineqb,
         Haddpd,
         Haddps,
         Idiv,
@@ -99,7 +98,6 @@ namespace ARMeilleure.CodeGen.X86
         Paddd,
         Paddq,
         Paddw,
-        Palignr,
         Pand,
         Pandn,
         Pavgb,
@@ -182,9 +180,6 @@ namespace ARMeilleure.CodeGen.X86
         Rsqrtss,
         Sar,
         Setcc,
-        Sha256Msg1,
-        Sha256Msg2,
-        Sha256Rnds2,
         Shl,
         Shr,
         Shufpd,
@@ -208,24 +203,21 @@ namespace ARMeilleure.CodeGen.X86
         Vblendvps,
         Vcvtph2ps,
         Vcvtps2ph,
-        Vfmadd231pd,
         Vfmadd231ps,
         Vfmadd231sd,
         Vfmadd231ss,
         Vfmsub231sd,
         Vfmsub231ss,
-        Vfnmadd231pd,
         Vfnmadd231ps,
         Vfnmadd231sd,
         Vfnmadd231ss,
         Vfnmsub231sd,
         Vfnmsub231ss,
         Vpblendvb,
-        Vpternlogd,
         Xor,
         Xorpd,
         Xorps,
 
-        Count,
+        Count
     }
-}
+}

ARMeilleure/CodeGen/X86/X86Optimizer.cs

@@ -1,4 +1,4 @@
-using ARMeilleure.CodeGen.Optimizations;
+using ARMeilleure.CodeGen.Optimizations;
 using ARMeilleure.IntermediateRepresentation;
 using ARMeilleure.Translation;
 using System.Collections.Generic;
@@ -9,17 +9,13 @@ namespace ARMeilleure.CodeGen.X86
 {
     static class X86Optimizer
     {
-        private const int MaxConstantUses = 10000;
-
         public static void RunPass(ControlFlowGraph cfg)
         {
             var constants = new Dictionary<ulong, Operand>();
 
             Operand GetConstantCopy(BasicBlock block, Operation operation, Operand source)
             {
-                // If the constant has many uses, we also force a new constant mov to be added, in order
-                // to avoid overflow of the counts field (that is limited to 16 bits).
-                if (!constants.TryGetValue(source.Value, out var constant) || constant.UsesCount > MaxConstantUses)
+                if (!constants.TryGetValue(source.Value, out var constant))
                 {
                     constant = Local(source.Type);
 
@@ -27,7 +23,7 @@ namespace ARMeilleure.CodeGen.X86
 
                     block.Operations.AddBefore(operation, copyOp);
 
-                    constants[source.Value] = constant;
+                    constants.Add(source.Value, constant);
                 }
 
                 return constant;
@@ -215,7 +211,7 @@ namespace ARMeilleure.CodeGen.X86
                         1 => Multiplier.x2,
                         2 => Multiplier.x4,
                         3 => Multiplier.x8,
-                        _ => Multiplier.x1,
+                        _ => Multiplier.x1
                     };
 
                     baseOp = indexOnSrc2 ? src1 : src2;

ARMeilleure/CodeGen/X86/X86Register.cs

@@ -0,0 +1,41 @@
+namespace ARMeilleure.CodeGen.X86
+{
+    enum X86Register
+    {
+        Invalid = -1,
+
+        Rax = 0,
+        Rcx = 1,
+        Rdx = 2,
+        Rbx = 3,
+        Rsp = 4,
+        Rbp = 5,
+        Rsi = 6,
+        Rdi = 7,
+        R8  = 8,
+        R9  = 9,
+        R10 = 10,
+        R11 = 11,
+        R12 = 12,
+        R13 = 13,
+        R14 = 14,
+        R15 = 15,
+
+        Xmm0  = 0,
+        Xmm1  = 1,
+        Xmm2  = 2,
+        Xmm3  = 3,
+        Xmm4  = 4,
+        Xmm5  = 5,
+        Xmm6  = 6,
+        Xmm7  = 7,
+        Xmm8  = 8,
+        Xmm9  = 9,
+        Xmm10 = 10,
+        Xmm11 = 11,
+        Xmm12 = 12,
+        Xmm13 = 13,
+        Xmm14 = 14,
+        Xmm15 = 15
+    }
+}

ARMeilleure/Common/AddressTable.cs

@@ -1,4 +1,4 @@
-using ARMeilleure.Diagnostics;
+using ARMeilleure.Diagnostics.EventSources;
 using System;
 using System.Collections.Generic;
 using System.Runtime.InteropServices;
@@ -9,7 +9,7 @@ namespace ARMeilleure.Common
     /// Represents a table of guest address to a value.
     /// </summary>
     /// <typeparam name="TEntry">Type of the value</typeparam>
-    public unsafe class AddressTable<TEntry> : IDisposable where TEntry : unmanaged
+    unsafe class AddressTable<TEntry> : IDisposable where TEntry : unmanaged
     {
         /// <summary>
         /// Represents a level in an <see cref="AddressTable{TEntry}"/>.
@@ -80,7 +80,10 @@ namespace ARMeilleure.Common
         {
             get
             {
-                ObjectDisposedException.ThrowIf(_disposed, this);
+                if (_disposed)
+                {
+                    throw new ObjectDisposedException(null);
+                }
 
                 lock (_pages)
                 {
@@ -97,7 +100,10 @@ namespace ARMeilleure.Common
         /// <exception cref="ArgumentException">Length of <paramref name="levels"/> is less than 2</exception>
         public AddressTable(Level[] levels)
         {
-            ArgumentNullException.ThrowIfNull(levels);
+            if (levels == null)
+            {
+                throw new ArgumentNullException(nameof(levels));
+            }
 
             if (levels.Length < 2)
             {
@@ -135,7 +141,10 @@ namespace ARMeilleure.Common
         /// <exception cref="ArgumentException"><paramref name="address"/> is not mapped</exception>
         public ref TEntry GetValue(ulong address)
         {
-            ObjectDisposedException.ThrowIf(_disposed, this);
+            if (_disposed)
+            {
+                throw new ObjectDisposedException(null);
+            }
 
             if (!IsValid(address))
             {
@@ -197,7 +206,7 @@ namespace ARMeilleure.Common
         /// <typeparam name="T">Type of elements</typeparam>
         /// <param name="length">Number of elements</param>
         /// <param name="fill">Fill value</param>
-        /// <param name="leaf"><see langword="true"/> if leaf; otherwise <see langword="false"/></param>
+        /// <param name="leaf"><see langword="true"/> if leaf; otherwise <see langword=""="false"/></param>
         /// <returns>Allocated block</returns>
         private IntPtr Allocate<T>(int length, T fill, bool leaf) where T : unmanaged
         {
@@ -209,7 +218,7 @@ namespace ARMeilleure.Common
 
             _pages.Add(page);
 
-            TranslatorEventSource.Log.AddressTableAllocated(size, leaf);
+            AddressTableEventSource.Log.Allocated(size, leaf);
 
             return page;
         }

ARMeilleure/Common/Allocator.cs

@@ -1,4 +1,4 @@
-using System;
+using System;
 
 namespace ARMeilleure.Common
 {

ARMeilleure/Common/ArenaAllocator.cs

@@ -1,6 +1,7 @@
-using System;
+using System;
 using System.Collections.Generic;
 using System.Runtime.CompilerServices;
+using System.Threading;
 
 namespace ARMeilleure.Common
 {
@@ -82,10 +83,8 @@ namespace ARMeilleure.Common
             }
             else
             {
-                _page = new PageInfo
-                {
-                    Pointer = (byte*)NativeAllocator.Instance.Allocate(_pageSize),
-                };
+                _page = new PageInfo();
+                _page.Pointer = (byte*)NativeAllocator.Instance.Allocate(_pageSize);
 
                 _pages.Add(_page);
             }
@@ -108,7 +107,7 @@ namespace ARMeilleure.Common
             // Free excess pages that was allocated.
             while (_pages.Count > _pageCount)
             {
-                NativeAllocator.Instance.Free(_pages[^1].Pointer);
+                NativeAllocator.Instance.Free(_pages[_pages.Count - 1].Pointer);
 
                 _pages.RemoveAt(_pages.Count - 1);
             }
@@ -127,13 +126,12 @@ namespace ARMeilleure.Common
 
             // If arena is used frequently, keep pages for longer. Otherwise keep pages for a shorter amount of time.
             int now = Environment.TickCount;
-            int count = (now - _lastReset) switch
-            {
+            int count = (now - _lastReset) switch {
                 >= 5000 => 0,
                 >= 2500 => 50,
                 >= 1000 => 100,
-                >= 10 => 1500,
-                _ => 5000,
+                >= 10   => 1500,
+                _       => 5000
             };
 
             for (int i = _pages.Count - 1; i >= 0; i--)

ARMeilleure/Common/BitMap.cs

@@ -0,0 +1,222 @@
+using System;
+using System.Collections;
+using System.Collections.Generic;
+using System.Numerics;
+using System.Runtime.CompilerServices;
+
+namespace ARMeilleure.Common
+{
+    unsafe class BitMap : IEnumerable<int>, IDisposable
+    {
+        private const int IntSize = 64;
+        private const int IntMask = IntSize - 1;
+
+        private int _count;
+        private long* _masks;
+        private readonly Allocator _allocator;
+
+        public BitMap(Allocator allocator)
+        {
+            _allocator = allocator;
+        }
+
+        public BitMap(Allocator allocator, int capacity) : this(allocator)
+        {
+            EnsureCapacity(capacity);
+        }
+
+        public bool Set(int bit)
+        {
+            EnsureCapacity(bit + 1);
+
+            int wordIndex = bit / IntSize;
+            int wordBit = bit & IntMask;
+
+            long wordMask = 1L << wordBit;
+
+            if ((_masks[wordIndex] & wordMask) != 0)
+            {
+                return false;
+            }
+
+            _masks[wordIndex] |= wordMask;
+
+            return true;
+        }
+
+        public void Clear(int bit)
+        {
+            EnsureCapacity(bit + 1);
+
+            int wordIndex = bit / IntSize;
+            int wordBit = bit & IntMask;
+
+            long wordMask = 1L << wordBit;
+
+            _masks[wordIndex] &= ~wordMask;
+        }
+
+        public bool IsSet(int bit)
+        {
+            EnsureCapacity(bit + 1);
+
+            int wordIndex = bit / IntSize;
+            int wordBit = bit & IntMask;
+
+            return (_masks[wordIndex] & (1L << wordBit)) != 0;
+        }
+
+        public int FindFirstUnset()
+        {
+            for (int index = 0; index < _count; index++)
+            {
+                long mask = _masks[index];
+
+                if (mask != -1L)
+                {
+                    return BitOperations.TrailingZeroCount(~mask) + index * IntSize;
+                }
+            }
+
+            return _count * IntSize;
+        }
+
+        public bool Set(BitMap map)
+        {
+            EnsureCapacity(map._count * IntSize);
+
+            bool modified = false;
+
+            for (int index = 0; index < _count; index++)
+            {
+                long newValue = _masks[index] | map._masks[index];
+
+                if (_masks[index] != newValue)
+                {
+                    _masks[index] = newValue;
+
+                    modified = true;
+                }
+            }
+
+            return modified;
+        }
+
+        public bool Clear(BitMap map)
+        {
+            EnsureCapacity(map._count * IntSize);
+
+            bool modified = false;
+
+            for (int index = 0; index < _count; index++)
+            {
+                long newValue = _masks[index] & ~map._masks[index];
+
+                if (_masks[index] != newValue)
+                {
+                    _masks[index] = newValue;
+
+                    modified = true;
+                }
+            }
+
+            return modified;
+        }
+
+        private void EnsureCapacity(int size)
+        {
+            int count = (size + IntMask) / IntSize;
+
+            if (count > _count)
+            {
+                var oldMask = _masks;
+                var oldSpan = new Span<long>(_masks, _count);
+
+                _masks = _allocator.Allocate<long>((uint)count);
+                _count = count;
+
+                var newSpan = new Span<long>(_masks, _count);
+
+                oldSpan.CopyTo(newSpan);
+                newSpan.Slice(oldSpan.Length).Clear();
+
+                _allocator.Free(oldMask);
+            }
+        }
+
+        public void Dispose()
+        {
+            if (_masks != null)
+            {
+                _allocator.Free(_masks);
+
+                _masks = null;
+            }
+        }
+
+        IEnumerator IEnumerable.GetEnumerator()
+        {
+            return GetEnumerator();
+        }
+
+        IEnumerator<int> IEnumerable<int>.GetEnumerator()
+        {
+            return GetEnumerator();
+        }
+
+        public Enumerator GetEnumerator()
+        {
+            return new Enumerator(this);
+        }
+
+        public struct Enumerator : IEnumerator<int>
+        {
+            private long _index;
+            private long _mask;
+            private int _bit;
+            private readonly BitMap _map;
+
+            public int Current => (int)_index * IntSize + _bit;
+            object IEnumerator.Current => Current;
+
+            public Enumerator(BitMap map)
+            {
+                _index = -1;
+                _mask = 0;
+                _bit = 0;
+                _map = map;
+            }
+
+            [MethodImpl(MethodImplOptions.AggressiveInlining)]
+            public bool MoveNext()
+            {
+                if (_mask != 0)
+                {
+                    _mask &= ~(1L << _bit);
+                }
+
+                // Manually hoist these loads, because RyuJIT does not.
+                long count = (uint)_map._count;
+                long* masks = _map._masks;
+
+                while (_mask == 0)
+                {
+                    if (++_index >= count)
+                    {
+                        return false;
+                    }
+
+                    _mask = masks[_index];
+                }
+
+                _bit = BitOperations.TrailingZeroCount(_mask);
+
+                return true;
+            }
+
+            public void Reset() { }
+
+            public void Dispose() { }
+        }
+    }
+}

ARMeilleure/Common/BitUtils.cs

@@ -0,0 +1,61 @@
+using System.Numerics;
+
+namespace ARMeilleure.Common
+{
+    static class BitUtils
+    {
+        private static readonly sbyte[] HbsNibbleLut;
+
+        static BitUtils()
+        {
+            HbsNibbleLut = new sbyte[] { -1, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3 };
+        }
+
+        public static long FillWithOnes(int bits)
+        {
+            return bits == 64 ? -1L : (1L << bits) - 1;
+        }
+
+        public static int HighestBitSet(int value)
+        {
+            return 31 - BitOperations.LeadingZeroCount((uint)value);
+        }
+
+        public static int HighestBitSetNibble(int value)
+        {
+            return HbsNibbleLut[value];
+        }
+
+        public static long Replicate(long bits, int size)
+        {
+            long output = 0;
+
+            for (int bit = 0; bit < 64; bit += size)
+            {
+                output |= bits << bit;
+            }
+
+            return output;
+        }
+
+        public static int RotateRight(int bits, int shift, int size)
+        {
+            return (int)RotateRight((uint)bits, shift, size);
+        }
+
+        public static uint RotateRight(uint bits, int shift, int size)
+        {
+            return (bits >> shift) | (bits << (size - shift));
+        }
+
+        public static long RotateRight(long bits, int shift, int size)
+        {
+            return (long)RotateRight((ulong)bits, shift, size);
+        }
+
+        public static ulong RotateRight(ulong bits, int shift, int size)
+        {
+            return (bits >> shift) | (bits << (size - shift));
+        }
+    }
+}

ARMeilleure/Common/Counter.cs

@@ -1,4 +1,4 @@
-using System;
+using System;
 
 namespace ARMeilleure.Common
 {
@@ -9,9 +9,6 @@ namespace ARMeilleure.Common
     class Counter<T> : IDisposable where T : unmanaged
     {
         private bool _disposed;
-        /// <summary>
-        /// Index in the <see cref="EntryTable{T}"/>
-        /// </summary>
         private readonly int _index;
         private readonly EntryTable<T> _countTable;
 
@@ -20,6 +17,7 @@ namespace ARMeilleure.Common
         /// <see cref="EntryTable{T}"/> instance and index.
         /// </summary>
         /// <param name="countTable"><see cref="EntryTable{T}"/> instance</param>
+        /// <param name="index">Index in the <see cref="EntryTable{T}"/></param>
         /// <exception cref="ArgumentNullException"><paramref name="countTable"/> is <see langword="null"/></exception>
         /// <exception cref="ArgumentException"><typeparamref name="T"/> is unsupported</exception>
         public Counter(EntryTable<T> countTable)
@@ -49,7 +47,10 @@ namespace ARMeilleure.Common
         {
             get
             {
-                ObjectDisposedException.ThrowIf(_disposed, this);
+                if (_disposed)
+                {
+                    throw new ObjectDisposedException(null);
+                }
 
                 return ref _countTable.GetValue(_index);
             }
@@ -67,7 +68,7 @@ namespace ARMeilleure.Common
         /// <summary>
         /// Releases all unmanaged and optionally managed resources used by the <see cref="Counter{T}"/> instance.
         /// </summary>
-        /// <param name="disposing"><see langword="true"/> to dispose managed resources also; otherwise just unmanaged resources</param>
+        /// <param name="disposing"><see langword="true"/> to dispose managed resources also; otherwise just unmanaged resouces</param>
         protected virtual void Dispose(bool disposing)
         {
             if (!_disposed)

ARMeilleure/Common/EntryTable.cs

@@ -1,4 +1,4 @@
-using System;
+using System;
 using System.Collections.Generic;
 using System.Numerics;
 
@@ -53,7 +53,10 @@ namespace ARMeilleure.Common
         /// <exception cref="ObjectDisposedException"><see cref="EntryTable{TEntry}"/> instance was disposed</exception>
         public int Allocate()
         {
-            ObjectDisposedException.ThrowIf(_disposed, this);
+            if (_disposed)
+            {
+                throw new ObjectDisposedException(null);
+            }
 
             lock (_allocated)
             {
@@ -80,7 +83,10 @@ namespace ARMeilleure.Common
         /// <exception cref="ObjectDisposedException"><see cref="EntryTable{TEntry}"/> instance was disposed</exception>
         public void Free(int index)
         {
-            ObjectDisposedException.ThrowIf(_disposed, this);
+            if (_disposed)
+            {
+                throw new ObjectDisposedException(null);
+            }
 
             lock (_allocated)
             {
@@ -102,7 +108,10 @@ namespace ARMeilleure.Common
         /// <exception cref="ArgumentException">Entry at <paramref name="index"/> is not allocated</exception>
         public ref TEntry GetValue(int index)
         {
-            ObjectDisposedException.ThrowIf(_disposed, this);
+            if (_disposed)
+            {
+                throw new ObjectDisposedException(null);
+            }
 
             lock (_allocated)
             {

ARMeilleure/Common/NativeAllocator.cs

@@ -1,4 +1,4 @@
-using System;
+using System;
 using System.Runtime.InteropServices;
 
 namespace ARMeilleure.Common

ARMeilleure/Decoders/Block.cs

@@ -0,0 +1,101 @@
+using System;
+using System.Collections.Generic;
+
+namespace ARMeilleure.Decoders
+{
+    class Block
+    {
+        public ulong Address    { get; set; }
+        public ulong EndAddress { get; set; }
+
+        public Block Next   { get; set; }
+        public Block Branch { get; set; }
+
+        public bool Exit { get; set; }
+
+        public List<OpCode> OpCodes { get; }
+
+        public Block()
+        {
+            OpCodes = new List<OpCode>();
+        }
+
+        public Block(ulong address) : this()
+        {
+            Address = address;
+        }
+
+        public void Split(Block rightBlock)
+        {
+            int splitIndex = BinarySearch(OpCodes, rightBlock.Address);
+
+            if (OpCodes[splitIndex].Address < rightBlock.Address)
+            {
+                splitIndex++;
+            }
+
+            int splitCount = OpCodes.Count - splitIndex;
+
+            if (splitCount <= 0)
+            {
+                throw new ArgumentException("Can't split at right block address.");
+            }
+
+            rightBlock.EndAddress = EndAddress;
+
+            rightBlock.Next   = Next;
+            rightBlock.Branch = Branch;
+
+            rightBlock.OpCodes.AddRange(OpCodes.GetRange(splitIndex, splitCount));
+
+            EndAddress = rightBlock.Address;
+
+            Next   = rightBlock;
+            Branch = null;
+
+            OpCodes.RemoveRange(splitIndex, splitCount);
+        }
+
+        private static int BinarySearch(List<OpCode> opCodes, ulong address)
+        {
+            int left   = 0;
+            int middle = 0;
+            int right  = opCodes.Count - 1;
+
+            while (left <= right)
+            {
+                int size = right - left;
+
+                middle = left + (size >> 1);
+
+                OpCode opCode = opCodes[middle];
+
+                if (address == (ulong)opCode.Address)
+                {
+                    break;
+                }
+
+                if (address < (ulong)opCode.Address)
+                {
+                    right = middle - 1;
+                }
+                else
+                {
+                    left = middle + 1;
+                }
+            }
+
+            return middle;
+        }
+
+        public OpCode GetLastOp()
+        {
+            if (OpCodes.Count > 0)
+            {
+                return OpCodes[OpCodes.Count - 1];
+            }
+
+            return null;
+        }
+    }
+}

ARMeilleure/Decoders/Condition.cs

@@ -0,0 +1,32 @@
+namespace ARMeilleure.Decoders
+{
+    enum Condition
+    {
+        Eq   = 0,
+        Ne   = 1,
+        GeUn = 2,
+        LtUn = 3,
+        Mi   = 4,
+        Pl   = 5,
+        Vs   = 6,
+        Vc   = 7,
+        GtUn = 8,
+        LeUn = 9,
+        Ge   = 10,
+        Lt   = 11,
+        Gt   = 12,
+        Le   = 13,
+        Al   = 14,
+        Nv   = 15
+    }
+
+    static class ConditionExtensions
+    {
+        public static Condition Invert(this Condition cond)
+        {
+            // Bit 0 of all conditions is basically a negation bit, so
+            // inverting this bit has the effect of inverting the condition.
+            return (Condition)((int)cond ^ 1);
+        }
+    }
+}

ARMeilleure/Decoders/DataOp.cs

@@ -0,0 +1,10 @@
+namespace ARMeilleure.Decoders
+{
+    enum DataOp
+    {
+        Adr        = 0,
+        Arithmetic = 1,
+        Logical    = 2,
+        BitField   = 3
+    }
+}

ARMeilleure/Decoders/Decoder.cs

@@ -0,0 +1,352 @@
+using ARMeilleure.Decoders.Optimizations;
+using ARMeilleure.Instructions;
+using ARMeilleure.Memory;
+using ARMeilleure.State;
+using System;
+using System.Collections.Generic;
+using System.Diagnostics;
+
+namespace ARMeilleure.Decoders
+{
+    static class Decoder
+    {
+        // We define a limit on the number of instructions that a function may have,
+        // this prevents functions being potentially too large, which would
+        // take too long to compile and use too much memory.
+        private const int MaxInstsPerFunction = 2500;
+
+        // For lower code quality translation, we set a lower limit since we're blocking execution.
+        private const int MaxInstsPerFunctionLowCq = 500;
+
+        public static Block[] Decode(IMemoryManager memory, ulong address, ExecutionMode mode, bool highCq, bool singleBlock)
+        {
+            List<Block> blocks = new List<Block>();
+
+            Queue<Block> workQueue = new Queue<Block>();
+
+            Dictionary<ulong, Block> visited = new Dictionary<ulong, Block>();
+
+            Debug.Assert(MaxInstsPerFunctionLowCq <= MaxInstsPerFunction);
+
+            int opsCount = 0;
+
+            int instructionLimit = highCq ? MaxInstsPerFunction : MaxInstsPerFunctionLowCq;
+
+            Block GetBlock(ulong blkAddress)
+            {
+                if (!visited.TryGetValue(blkAddress, out Block block))
+                {
+                    block = new Block(blkAddress);
+
+                    if ((singleBlock && visited.Count >= 1) || opsCount > instructionLimit || !memory.IsMapped(blkAddress))
+                    {
+                        block.Exit = true;
+                        block.EndAddress = blkAddress;
+                    }
+
+                    workQueue.Enqueue(block);
+
+                    visited.Add(blkAddress, block);
+                }
+
+                return block;
+            }
+
+            GetBlock(address);
+
+            while (workQueue.TryDequeue(out Block currBlock))
+            {
+                // Check if the current block is inside another block.
+                if (BinarySearch(blocks, currBlock.Address, out int nBlkIndex))
+                {
+                    Block nBlock = blocks[nBlkIndex];
+
+                    if (nBlock.Address == currBlock.Address)
+                    {
+                        throw new InvalidOperationException("Found duplicate block address on the list.");
+                    }
+
+                    currBlock.Exit = false;
+
+                    nBlock.Split(currBlock);
+
+                    blocks.Insert(nBlkIndex + 1, currBlock);
+
+                    continue;
+                }
+
+                if (!currBlock.Exit)
+                {
+                    // If we have a block after the current one, set the limit address.
+                    ulong limitAddress = ulong.MaxValue;
+
+                    if (nBlkIndex != blocks.Count)
+                    {
+                        Block nBlock = blocks[nBlkIndex];
+
+                        int nextIndex = nBlkIndex + 1;
+
+                        if (nBlock.Address < currBlock.Address && nextIndex < blocks.Count)
+                        {
+                            limitAddress = blocks[nextIndex].Address;
+                        }
+                        else if (nBlock.Address > currBlock.Address)
+                        {
+                            limitAddress = blocks[nBlkIndex].Address;
+                        }
+                    }
+
+                    FillBlock(memory, mode, currBlock, limitAddress);
+
+                    opsCount += currBlock.OpCodes.Count;
+
+                    if (currBlock.OpCodes.Count != 0)
+                    {
+                        // Set child blocks. "Branch" is the block the branch instruction
+                        // points to (when taken), "Next" is the block at the next address,
+                        // executed when the branch is not taken. For Unconditional Branches
+                        // (except BL/BLR that are sub calls) or end of executable, Next is null.
+                        OpCode lastOp = currBlock.GetLastOp();
+
+                        bool isCall = IsCall(lastOp);
+
+                        if (lastOp is IOpCodeBImm op && !isCall)
+                        {
+                            currBlock.Branch = GetBlock((ulong)op.Immediate);
+                        }
+
+                        if (!IsUnconditionalBranch(lastOp) || isCall)
+                        {
+                            currBlock.Next = GetBlock(currBlock.EndAddress);
+                        }
+                    }
+                }
+
+                // Insert the new block on the list (sorted by address).
+                if (blocks.Count != 0)
+                {
+                    Block nBlock = blocks[nBlkIndex];
+
+                    blocks.Insert(nBlkIndex + (nBlock.Address < currBlock.Address ? 1 : 0), currBlock);
+                }
+                else
+                {
+                    blocks.Add(currBlock);
+                }
+            }
+
+            if (blocks.Count == 1 && blocks[0].OpCodes.Count == 0)
+            {
+                Debug.Assert(blocks[0].Exit);
+                Debug.Assert(blocks[0].Address == blocks[0].EndAddress);
+
+                throw new InvalidOperationException($"Decoded a single empty exit block. Entry point = 0x{address:X}.");
+            }
+
+            if (!singleBlock)
+            {
+                return TailCallRemover.RunPass(address, blocks);
+            }
+            else
+            {
+                return blocks.ToArray();
+            }
+        }
+
+        public static bool BinarySearch(List<Block> blocks, ulong address, out int index)
+        {
+            index = 0;
+
+            int left  = 0;
+            int right = blocks.Count - 1;
+
+            while (left <= right)
+            {
+                int size = right - left;
+
+                int middle = left + (size >> 1);
+
+                Block block = blocks[middle];
+
+                index = middle;
+
+                if (address >= block.Address && address < block.EndAddress)
+                {
+                    return true;
+                }
+
+                if (address < block.Address)
+                {
+                    right = middle - 1;
+                }
+                else
+                {
+                    left = middle + 1;
+                }
+            }
+
+            return false;
+        }
+
+        private static void FillBlock(
+            IMemoryManager memory,
+            ExecutionMode  mode,
+            Block          block,
+            ulong          limitAddress)
+        {
+            ulong address = block.Address;
+
+            OpCode opCode;
+
+            do
+            {
+                if (address >= limitAddress)
+                {
+                    break;
+                }
+
+                opCode = DecodeOpCode(memory, address, mode);
+
+                block.OpCodes.Add(opCode);
+
+                address += (ulong)opCode.OpCodeSizeInBytes;
+            }
+            while (!(IsBranch(opCode) || IsException(opCode)));
+
+            block.EndAddress = address;
+        }
+
+        private static bool IsBranch(OpCode opCode)
+        {
+            return opCode is OpCodeBImm ||
+                   opCode is OpCodeBReg || IsAarch32Branch(opCode);
+        }
+
+        private static bool IsUnconditionalBranch(OpCode opCode)
+        {
+            return opCode is OpCodeBImmAl ||
+                   opCode is OpCodeBReg   || IsAarch32UnconditionalBranch(opCode);
+        }
+
+        private static bool IsAarch32UnconditionalBranch(OpCode opCode)
+        {
+            if (!(opCode is OpCode32 op))
+            {
+                return false;
+            }
+
+            // Note: On ARM32, most instructions have conditional execution,
+            // so there's no "Always" (unconditional) branch like on ARM64.
+            // We need to check if the condition is "Always" instead.
+            return IsAarch32Branch(op) && op.Cond >= Condition.Al;
+        }
+
+        private static bool IsAarch32Branch(OpCode opCode)
+        {
+            // Note: On ARM32, most ALU operations can write to R15 (PC),
+            // so we must consider such operations as a branch in potential aswell.
+            if (opCode is IOpCode32Alu opAlu && opAlu.Rd == RegisterAlias.Aarch32Pc)
+            {
+                return true;
+            }
+
+            // Same thing for memory operations. We have the cases where PC is a target
+            // register (Rt == 15 or (mask & (1 << 15)) != 0), and cases where there is
+            // a write back to PC (wback == true && Rn == 15), however the later may
+            // be "undefined" depending on the CPU, so compilers should not produce that.
+            if (opCode is IOpCode32Mem || opCode is IOpCode32MemMult)
+            {
+                int rt, rn;
+
+                bool wBack, isLoad;
+
+                if (opCode is IOpCode32Mem opMem)
+                {
+                    rt     = opMem.Rt;
+                    rn     = opMem.Rn;
+                    wBack  = opMem.WBack;
+                    isLoad = opMem.IsLoad;
+
+                    // For the dual load, we also need to take into account the
+                    // case were Rt2 == 15 (PC).
+                    if (rt == 14 && opMem.Instruction.Name == InstName.Ldrd)
+                    {
+                        rt = RegisterAlias.Aarch32Pc;
+                    }
+                }
+                else if (opCode is IOpCode32MemMult opMemMult)
+                {
+                    const int pcMask = 1 << RegisterAlias.Aarch32Pc;
+
+                    rt     = (opMemMult.RegisterMask & pcMask) != 0 ? RegisterAlias.Aarch32Pc : 0;
+                    rn     =  opMemMult.Rn;
+                    wBack  =  opMemMult.PostOffset != 0;
+                    isLoad =  opMemMult.IsLoad;
+                }
+                else
+                {
+                    throw new NotImplementedException($"The type \"{opCode.GetType().Name}\" is not implemented on the decoder.");
+                }
+
+                if ((rt == RegisterAlias.Aarch32Pc && isLoad) ||
+                    (rn == RegisterAlias.Aarch32Pc && wBack))
+                {
+                    return true;
+                }
+            }
+
+            // Explicit branch instructions.
+            return opCode is IOpCode32BImm ||
+                   opCode is IOpCode32BReg;
+        }
+
+        private static bool IsCall(OpCode opCode)
+        {
+            return opCode.Instruction.Name == InstName.Bl ||
+                   opCode.Instruction.Name == InstName.Blr ||
+                   opCode.Instruction.Name == InstName.Blx;
+        }
+
+        private static bool IsException(OpCode opCode)
+        {
+            return opCode.Instruction.Name == InstName.Brk ||
+                   opCode.Instruction.Name == InstName.Svc ||
+                   opCode.Instruction.Name == InstName.Trap ||
+                   opCode.Instruction.Name == InstName.Und;
+        }
+
+        public static OpCode DecodeOpCode(IMemoryManager memory, ulong address, ExecutionMode mode)
+        {
+            int opCode = memory.Read<int>(address);
+
+            InstDescriptor inst;
+
+            OpCodeTable.MakeOp makeOp;
+
+            if (mode == ExecutionMode.Aarch64)
+            {
+                (inst, makeOp) = OpCodeTable.GetInstA64(opCode);
+            }
+            else
+            {
+                if (mode == ExecutionMode.Aarch32Arm)
+                {
+                    (inst, makeOp) = OpCodeTable.GetInstA32(opCode);
+                }
+                else /* if (mode == ExecutionMode.Aarch32Thumb) */
+                {
+                    (inst, makeOp) = OpCodeTable.GetInstT32(opCode);
+                }
+            }
+
+            if (makeOp != null)
+            {
+                return makeOp(inst, address, opCode);
+            }
+            else
+            {
+                return new OpCode(inst, address, opCode);
+            }
+        }
+    }
+}

ARMeilleure/Decoders/DecoderHelper.cs

@@ -0,0 +1,167 @@
+using ARMeilleure.Common;
+
+namespace ARMeilleure.Decoders
+{
+    static class DecoderHelper
+    {
+        static DecoderHelper()
+        {
+            Imm8ToFP32Table = BuildImm8ToFP32Table();
+            Imm8ToFP64Table = BuildImm8ToFP64Table();
+        }
+
+        public static readonly uint[]  Imm8ToFP32Table;
+        public static readonly ulong[] Imm8ToFP64Table;
+
+        private static uint[] BuildImm8ToFP32Table()
+        {
+            uint[] tbl = new uint[256];
+
+            for (int idx = 0; idx < 256; idx++)
+            {
+                tbl[idx] = ExpandImm8ToFP32((uint)idx);
+            }
+
+            return tbl;
+        }
+
+        private static ulong[] BuildImm8ToFP64Table()
+        {
+            ulong[] tbl = new ulong[256];
+
+            for (int idx = 0; idx < 256; idx++)
+            {
+                tbl[idx] = ExpandImm8ToFP64((ulong)idx);
+            }
+
+            return tbl;
+        }
+
+        // abcdefgh -> aBbbbbbc defgh000 00000000 00000000 (B = ~b)
+        private static uint ExpandImm8ToFP32(uint imm)
+        {
+            uint MoveBit(uint bits, int from, int to)
+            {
+                return ((bits >> from) & 1U) << to;
+            }
+
+            return MoveBit(imm, 7, 31) | MoveBit(~imm, 6, 30) |
+                   MoveBit(imm, 6, 29) | MoveBit( imm, 6, 28) |
+                   MoveBit(imm, 6, 27) | MoveBit( imm, 6, 26) |
+                   MoveBit(imm, 6, 25) | MoveBit( imm, 5, 24) |
+                   MoveBit(imm, 4, 23) | MoveBit( imm, 3, 22) |
+                   MoveBit(imm, 2, 21) | MoveBit( imm, 1, 20) |
+                   MoveBit(imm, 0, 19);
+        }
+
+        // abcdefgh -> aBbbbbbb bbcdefgh 00000000 00000000 00000000 00000000 00000000 00000000 (B = ~b)
+        private static ulong ExpandImm8ToFP64(ulong imm)
+        {
+            ulong MoveBit(ulong bits, int from, int to)
+            {
+                return ((bits >> from) & 1UL) << to;
+            }
+
+            return MoveBit(imm, 7, 63) | MoveBit(~imm, 6, 62) |
+                   MoveBit(imm, 6, 61) | MoveBit( imm, 6, 60) |
+                   MoveBit(imm, 6, 59) | MoveBit( imm, 6, 58) |
+                   MoveBit(imm, 6, 57) | MoveBit( imm, 6, 56) |
+                   MoveBit(imm, 6, 55) | MoveBit( imm, 6, 54) |
+                   MoveBit(imm, 5, 53) | MoveBit( imm, 4, 52) |
+                   MoveBit(imm, 3, 51) | MoveBit( imm, 2, 50) |
+                   MoveBit(imm, 1, 49) | MoveBit( imm, 0, 48);
+        }
+
+        public struct BitMask
+        {
+            public long WMask;
+            public long TMask;
+            public int  Pos;
+            public int  Shift;
+            public bool IsUndefined;
+
+            public static BitMask Invalid => new BitMask { IsUndefined = true };
+        }
+
+        public static BitMask DecodeBitMask(int opCode, bool immediate)
+        {
+            int immS = (opCode >> 10) & 0x3f;
+            int immR = (opCode >> 16) & 0x3f;
+
+            int n  = (opCode >> 22) & 1;
+            int sf = (opCode >> 31) & 1;
+
+            int length = BitUtils.HighestBitSet((~immS & 0x3f) | (n << 6));
+
+            if (length < 1 || (sf == 0 && n != 0))
+            {
+                return BitMask.Invalid;
+            }
+
+            int size = 1 << length;
+
+            int levels = size - 1;
+
+            int s = immS & levels;
+            int r = immR & levels;
+
+            if (immediate && s == levels)
+            {
+                return BitMask.Invalid;
+            }
+
+            long wMask = BitUtils.FillWithOnes(s + 1);
+            long tMask = BitUtils.FillWithOnes(((s - r) & levels) + 1);
+
+            if (r > 0)
+            {
+                wMask  = BitUtils.RotateRight(wMask, r, size);
+                wMask &= BitUtils.FillWithOnes(size);
+            }
+
+            return new BitMask()
+            {
+                WMask = BitUtils.Replicate(wMask, size),
+                TMask = BitUtils.Replicate(tMask, size),
+
+                Pos   = immS,
+                Shift = immR
+            };
+        }
+
+        public static long DecodeImm24_2(int opCode)
+        {
+            return ((long)opCode << 40) >> 38;
+        }
+
+        public static long DecodeImm26_2(int opCode)
+        {
+            return ((long)opCode << 38) >> 36;
+        }
+
+        public static long DecodeImmS19_2(int opCode)
+        {
+            return (((long)opCode << 40) >> 43) & ~3;
+        }
+
+        public static long DecodeImmS14_2(int opCode)
+        {
+            return (((long)opCode << 45) >> 48) & ~3;
+        }
+
+        public static bool VectorArgumentsInvalid(bool q, params int[] args)
+        {
+            if (q) 
+            {
+                for (int i = 0; i < args.Length; i++)
+                {
+                    if ((args[i] & 1) == 1)
+                    {
+                        return true;
+                    }
+                }
+            }
+            return false;
+        }
+    }
+}

ARMeilleure/Decoders/IOpCode.cs

@@ -14,4 +14,4 @@ namespace ARMeilleure.Decoders
 
         OperandType GetOperandType();
     }
-}
+}

ARMeilleure/Decoders/IOpCode32.cs

@@ -6,4 +6,4 @@ namespace ARMeilleure.Decoders
 
         uint GetPc();
     }
-}
+}

ARMeilleure/Decoders/IOpCode32Alu.cs

@@ -0,0 +1,10 @@
+namespace ARMeilleure.Decoders
+{
+    interface IOpCode32Alu : IOpCode32
+    {
+        int Rd { get; }
+        int Rn { get; }
+
+        bool SetFlags { get; }
+    }
+}

ARMeilleure/Decoders/IOpCode32AluBf.cs

@@ -0,0 +1,11 @@
+namespace ARMeilleure.Decoders
+{
+    interface IOpCode32AluBf
+    {
+        int Rd { get; }
+        int Rn { get; }
+
+        int Msb { get; }
+        int Lsb { get; }
+    }
+}

ARMeilleure/Decoders/IOpCode32AluReg.cs

@@ -0,0 +1,7 @@
+namespace ARMeilleure.Decoders
+{
+    interface IOpCode32AluReg : IOpCode32Alu
+    {
+        int Rm { get; }
+    }
+}

ARMeilleure/Decoders/IOpCode32AluUx.cs

@@ -1,4 +1,4 @@
-namespace ARMeilleure.Decoders
+namespace ARMeilleure.Decoders
 {
     interface IOpCode32AluUx : IOpCode32AluReg
     {

ARMeilleure/Decoders/IOpCode32BImm.cs

@@ -1,4 +1,4 @@
 namespace ARMeilleure.Decoders
 {
     interface IOpCode32BImm : IOpCode32, IOpCodeBImm { }
-}
+}

ARMeilleure/Decoders/IOpCode32BReg.cs

@@ -4,4 +4,4 @@ namespace ARMeilleure.Decoders
     {
         int Rm { get; }
     }
-}
+}

ARMeilleure/Decoders/IOpCode32Mem.cs

@@ -0,0 +1,11 @@
+namespace ARMeilleure.Decoders
+{
+    interface IOpCode32Mem : IOpCode32
+    {
+        int Rt { get; }
+        int Rn { get; }
+
+        bool WBack { get; }
+        bool IsLoad { get; }
+    }
+}

ARMeilleure/Decoders/IOpCode32MemEx.cs

@@ -0,0 +1,7 @@
+namespace ARMeilleure.Decoders
+{
+    interface IOpCode32MemEx : IOpCode32Mem
+    {
+        int Rd { get; }
+    }
+}

ARMeilleure/Decoders/IOpCode32MemMult.cs

@@ -9,7 +9,5 @@ namespace ARMeilleure.Decoders
         int PostOffset { get; }
 
         bool IsLoad { get; }
-
-        int Offset { get; }
     }
-}
+}

ARMeilleure/Decoders/IOpCode32Simd.cs

@@ -0,0 +1,4 @@
+namespace ARMeilleure.Decoders
+{
+    interface IOpCode32Simd : IOpCode32, IOpCodeSimd { }
+}

ARMeilleure/Decoders/IOpCode32SimdImm.cs

@@ -1,4 +1,4 @@
-namespace ARMeilleure.Decoders
+namespace ARMeilleure.Decoders
 {
     interface IOpCode32SimdImm : IOpCode32Simd
     {

ARMeilleure/Decoders/IOpCodeAlu.cs

@@ -7,4 +7,4 @@ namespace ARMeilleure.Decoders
 
         DataOp DataOp { get; }
     }
-}
+}

ARMeilleure/Decoders/IOpCodeAluImm.cs

@@ -4,4 +4,4 @@ namespace ARMeilleure.Decoders
     {
         long Immediate { get; }
     }
-}
+}

ARMeilleure/Decoders/IOpCodeAluRs.cs

@@ -3,8 +3,8 @@ namespace ARMeilleure.Decoders
     interface IOpCodeAluRs : IOpCodeAlu
     {
         int Shift { get; }
-        int Rm { get; }
+        int Rm    { get; }
 
         ShiftType ShiftType { get; }
     }
-}
+}

ARMeilleure/Decoders/IOpCodeAluRx.cs

@@ -3,8 +3,8 @@ namespace ARMeilleure.Decoders
     interface IOpCodeAluRx : IOpCodeAlu
     {
         int Shift { get; }
-        int Rm { get; }
+        int Rm    { get; }
 
         IntType IntType { get; }
     }
-}
+}

ARMeilleure/Decoders/IOpCodeBImm.cs

@@ -4,4 +4,4 @@ namespace ARMeilleure.Decoders
     {
         long Immediate { get; }
     }
-}
+}

ARMeilleure/Decoders/IOpCodeCond.cs

@@ -4,4 +4,4 @@ namespace ARMeilleure.Decoders
     {
         Condition Cond { get; }
     }
-}
+}

ARMeilleure/Decoders/IOpCodeLit.cs

@@ -0,0 +1,11 @@
+namespace ARMeilleure.Decoders
+{
+    interface IOpCodeLit : IOpCode
+    {
+        int  Rt        { get; }
+        long Immediate { get; }
+        int  Size      { get; }
+        bool Signed    { get; }
+        bool Prefetch  { get; }
+    }
+}

ARMeilleure/Decoders/IOpCodeSimd.cs

@@ -4,4 +4,4 @@ namespace ARMeilleure.Decoders
     {
         int Size { get; }
     }
-}
+}