mirror of
https://github.com/vosen/ZLUDA.git
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Add support for parsing instruction cvt
This commit is contained in:
parent
ff449289eb
commit
a10ee48e91
4 changed files with 302 additions and 32 deletions
113
ptx/src/ast.rs
113
ptx/src/ast.rs
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@ -9,6 +9,8 @@ quick_error! {
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display("{}", err)
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display("{}", err)
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cause(err)
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cause(err)
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}
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}
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SyntaxError {}
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NonF32Ftz {}
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}
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}
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}
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}
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@ -101,9 +103,11 @@ pub enum ScalarType {
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impl From<IntType> for ScalarType {
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impl From<IntType> for ScalarType {
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fn from(t: IntType) -> Self {
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fn from(t: IntType) -> Self {
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match t {
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match t {
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IntType::S8 => ScalarType::S8,
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IntType::S16 => ScalarType::S16,
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IntType::S16 => ScalarType::S16,
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IntType::S32 => ScalarType::S32,
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IntType::S32 => ScalarType::S32,
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IntType::S64 => ScalarType::S64,
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IntType::S64 => ScalarType::S64,
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IntType::U8 => ScalarType::U8,
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IntType::U16 => ScalarType::U16,
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IntType::U16 => ScalarType::U16,
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IntType::U32 => ScalarType::U32,
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IntType::U32 => ScalarType::U32,
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IntType::U64 => ScalarType::U64,
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IntType::U64 => ScalarType::U64,
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@ -113,14 +117,38 @@ impl From<IntType> for ScalarType {
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#[derive(PartialEq, Eq, Hash, Clone, Copy)]
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#[derive(PartialEq, Eq, Hash, Clone, Copy)]
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pub enum IntType {
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pub enum IntType {
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U8,
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U16,
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U16,
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U32,
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U32,
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U64,
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U64,
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S8,
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S16,
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S16,
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S32,
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S32,
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S64,
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S64,
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}
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}
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impl IntType {
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pub fn is_signed(self) -> bool {
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match self {
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IntType::U8 | IntType::U16 | IntType::U32 | IntType::U64 => false,
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IntType::S8 | IntType::S16 | IntType::S32 | IntType::S64 => true,
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}
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}
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pub fn width(self) -> u8 {
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match self {
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IntType::U8 => 1,
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IntType::U16 => 2,
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IntType::U32 => 4,
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IntType::U64 => 8,
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IntType::S8 => 1,
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IntType::S16 => 2,
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IntType::S32 => 4,
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IntType::S64 => 8,
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}
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}
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}
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#[derive(PartialEq, Eq, Hash, Clone, Copy)]
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#[derive(PartialEq, Eq, Hash, Clone, Copy)]
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pub enum FloatType {
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pub enum FloatType {
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F16,
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F16,
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@ -178,7 +206,7 @@ pub enum Instruction<P: ArgParams> {
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SetpBool(SetpBoolData, Arg5<P>),
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SetpBool(SetpBoolData, Arg5<P>),
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Not(NotType, Arg2<P>),
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Not(NotType, Arg2<P>),
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Bra(BraData, Arg1<P>),
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Bra(BraData, Arg1<P>),
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Cvt(CvtData, Arg2<P>),
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Cvt(CvtDetails, Arg2<P>),
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Shl(ShlType, Arg3<P>),
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Shl(ShlType, Arg3<P>),
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St(StData, Arg2St<P>),
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St(StData, Arg2St<P>),
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Ret(RetData),
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Ret(RetData),
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@ -398,7 +426,88 @@ pub struct BraData {
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pub uniform: bool,
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pub uniform: bool,
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}
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}
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pub struct CvtData {}
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pub enum CvtDetails {
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IntFromInt(CvtIntToIntDesc),
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FloatFromFloat(CvtDesc<FloatType, FloatType>),
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IntFromFloat(CvtDesc<IntType, FloatType>),
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FloatFromInt(CvtDesc<FloatType, IntType>),
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}
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pub struct CvtIntToIntDesc {
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pub dst: IntType,
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pub src: IntType,
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pub saturate: bool,
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}
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pub struct CvtDesc<Dst, Src> {
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pub rounding: Option<RoundingMode>,
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pub flush_to_zero: bool,
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pub saturate: bool,
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pub dst: Dst,
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pub src: Src,
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}
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impl CvtDetails {
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pub fn new_int_from_int_checked(
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saturate: bool,
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dst: IntType,
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src: IntType,
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err: &mut Vec<PtxError>,
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) -> Self {
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if saturate {
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if src.is_signed() {
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if dst.is_signed() && dst.width() >= src.width() {
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err.push(PtxError::SyntaxError);
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}
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} else {
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if dst == src || dst.width() >= src.width() {
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err.push(PtxError::SyntaxError);
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}
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}
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}
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CvtDetails::IntFromInt(CvtIntToIntDesc { dst, src, saturate })
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}
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pub fn new_float_from_int_checked(
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rounding: RoundingMode,
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flush_to_zero: bool,
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saturate: bool,
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dst: FloatType,
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src: IntType,
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err: &mut Vec<PtxError>,
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) -> Self {
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if flush_to_zero && dst != FloatType::F32 {
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err.push(PtxError::NonF32Ftz);
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}
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CvtDetails::FloatFromInt(CvtDesc {
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dst,
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src,
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saturate,
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flush_to_zero,
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rounding: Some(rounding),
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})
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}
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pub fn new_int_from_float_checked(
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rounding: RoundingMode,
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flush_to_zero: bool,
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saturate: bool,
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dst: IntType,
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src: FloatType,
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err: &mut Vec<PtxError>,
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) -> Self {
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if flush_to_zero && src != FloatType::F32 {
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err.push(PtxError::NonF32Ftz);
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}
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CvtDetails::IntFromFloat(CvtDesc {
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dst,
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src,
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saturate,
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flush_to_zero,
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rounding: Some(rounding),
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})
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}
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}
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#[derive(PartialEq, Eq, Copy, Clone)]
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#[derive(PartialEq, Eq, Copy, Clone)]
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pub enum ShlType {
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pub enum ShlType {
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@ -403,13 +403,13 @@ InstMulMode: ast::MulDetails = {
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typ: t,
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typ: t,
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control: ctr
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control: ctr
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}),
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}),
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<r:RoundingMode?> <ftz:".ftz"?> <s:".sat"?> ".f32" => ast::MulDetails::Float(ast::MulFloatDesc {
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<r:RoundingModeFloat?> <ftz:".ftz"?> <s:".sat"?> ".f32" => ast::MulDetails::Float(ast::MulFloatDesc {
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typ: ast::FloatType::F32,
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typ: ast::FloatType::F32,
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rounding: r,
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rounding: r,
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flush_to_zero: ftz.is_some(),
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flush_to_zero: ftz.is_some(),
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saturate: s.is_some()
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saturate: s.is_some()
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}),
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}),
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<r:RoundingMode?> ".f64" => ast::MulDetails::Float(ast::MulFloatDesc {
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<r:RoundingModeFloat?> ".f64" => ast::MulDetails::Float(ast::MulFloatDesc {
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typ: ast::FloatType::F64,
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typ: ast::FloatType::F64,
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rounding: r,
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rounding: r,
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flush_to_zero: false,
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flush_to_zero: false,
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@ -436,13 +436,20 @@ MulIntControl: ast::MulIntControl = {
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};
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};
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#[inline]
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#[inline]
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RoundingMode : ast::RoundingMode = {
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RoundingModeFloat : ast::RoundingMode = {
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".rn" => ast::RoundingMode::NearestEven,
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".rn" => ast::RoundingMode::NearestEven,
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".rz" => ast::RoundingMode::Zero,
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".rz" => ast::RoundingMode::Zero,
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".rm" => ast::RoundingMode::NegativeInf,
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".rm" => ast::RoundingMode::NegativeInf,
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".rp" => ast::RoundingMode::PositiveInf,
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".rp" => ast::RoundingMode::PositiveInf,
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};
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};
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RoundingModeInt : ast::RoundingMode = {
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".rni" => ast::RoundingMode::NearestEven,
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".rzi" => ast::RoundingMode::Zero,
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".rmi" => ast::RoundingMode::NegativeInf,
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".rpi" => ast::RoundingMode::PositiveInf,
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};
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IntType : ast::IntType = {
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IntType : ast::IntType = {
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".u16" => ast::IntType::U16,
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".u16" => ast::IntType::U16,
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".u32" => ast::IntType::U32,
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".u32" => ast::IntType::U32,
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@ -468,13 +475,13 @@ InstAddMode: ast::AddDetails = {
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typ: ast::IntType::S32,
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typ: ast::IntType::S32,
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saturate: true,
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saturate: true,
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}),
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}),
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<rn:RoundingMode?> <ftz:".ftz"?> <sat:".sat"?> ".f32" => ast::AddDetails::Float(ast::AddFloatDesc {
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<rn:RoundingModeFloat?> <ftz:".ftz"?> <sat:".sat"?> ".f32" => ast::AddDetails::Float(ast::AddFloatDesc {
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typ: ast::FloatType::F32,
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typ: ast::FloatType::F32,
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rounding: rn,
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rounding: rn,
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flush_to_zero: ftz.is_some(),
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flush_to_zero: ftz.is_some(),
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saturate: sat.is_some(),
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saturate: sat.is_some(),
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}),
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}),
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<rn:RoundingMode?> ".f64" => ast::AddDetails::Float(ast::AddFloatDesc {
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<rn:RoundingModeFloat?> ".f64" => ast::AddDetails::Float(ast::AddFloatDesc {
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typ: ast::FloatType::F64,
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typ: ast::FloatType::F64,
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rounding: rn,
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rounding: rn,
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flush_to_zero: false,
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flush_to_zero: false,
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@ -580,28 +587,153 @@ InstBra: ast::Instruction<ast::ParsedArgParams<'input>> = {
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// https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#data-movement-and-conversion-instructions-cvt
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// https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#data-movement-and-conversion-instructions-cvt
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InstCvt: ast::Instruction<ast::ParsedArgParams<'input>> = {
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InstCvt: ast::Instruction<ast::ParsedArgParams<'input>> = {
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"cvt" CvtRnd? ".ftz"? ".sat"? CvtType CvtType <a:Arg2> => {
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"cvt" <s:".sat"?> <dst_t:CvtTypeInt> <src_t:CvtTypeInt> <a:Arg2> => {
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ast::Instruction::Cvt(ast::CvtData{}, a)
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ast::Instruction::Cvt(ast::CvtDetails::new_int_from_int_checked(
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}
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s.is_some(),
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dst_t,
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src_t,
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errors
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),
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a)
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},
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"cvt" <r:RoundingModeFloat> <f:".ftz"?> <s:".sat"?> <dst_t:CvtTypeFloat> <src_t:CvtTypeInt> <a:Arg2> => {
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ast::Instruction::Cvt(ast::CvtDetails::new_float_from_int_checked(
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r,
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f.is_some(),
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s.is_some(),
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dst_t,
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src_t,
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errors
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),
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a)
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},
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"cvt" <r:RoundingModeInt> <f:".ftz"?> <s:".sat"?> <dst_t:CvtTypeInt> <src_t:CvtTypeFloat> <a:Arg2> => {
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ast::Instruction::Cvt(ast::CvtDetails::new_int_from_float_checked(
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r,
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f.is_some(),
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s.is_some(),
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dst_t,
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src_t,
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errors
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),
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a)
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},
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"cvt" <r:RoundingModeInt?> <s:".sat"?> ".f16" ".f16" <a:Arg2> => {
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ast::Instruction::Cvt(ast::CvtDetails::FloatFromFloat(
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ast::CvtDesc {
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rounding: r,
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flush_to_zero: false,
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saturate: s.is_some(),
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dst: ast::FloatType::F16,
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src: ast::FloatType::F16
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}
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), a)
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},
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"cvt" <f:".ftz"?> <s:".sat"?> ".f32" ".f16" <a:Arg2> => {
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ast::Instruction::Cvt(ast::CvtDetails::FloatFromFloat(
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ast::CvtDesc {
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rounding: None,
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flush_to_zero: f.is_some(),
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saturate: s.is_some(),
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dst: ast::FloatType::F32,
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src: ast::FloatType::F16
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}
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), a)
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},
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"cvt" <s:".sat"?> ".f64" ".f16" <a:Arg2> => {
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ast::Instruction::Cvt(ast::CvtDetails::FloatFromFloat(
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ast::CvtDesc {
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rounding: None,
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flush_to_zero: false,
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saturate: s.is_some(),
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dst: ast::FloatType::F64,
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src: ast::FloatType::F16
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}
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), a)
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},
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"cvt" <r:RoundingModeFloat> <f:".ftz"?> <s:".sat"?> ".f16" ".f32" <a:Arg2> => {
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ast::Instruction::Cvt(ast::CvtDetails::FloatFromFloat(
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ast::CvtDesc {
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rounding: Some(r),
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flush_to_zero: f.is_some(),
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saturate: s.is_some(),
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dst: ast::FloatType::F16,
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src: ast::FloatType::F32
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}
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), a)
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},
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"cvt" <r:RoundingModeFloat?> <f:".ftz"?> <s:".sat"?> ".f32" ".f32" <a:Arg2> => {
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ast::Instruction::Cvt(ast::CvtDetails::FloatFromFloat(
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ast::CvtDesc {
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rounding: r,
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flush_to_zero: f.is_some(),
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saturate: s.is_some(),
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dst: ast::FloatType::F32,
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src: ast::FloatType::F32
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}
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), a)
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},
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"cvt" <s:".sat"?> ".f64" ".f32" <a:Arg2> => {
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ast::Instruction::Cvt(ast::CvtDetails::FloatFromFloat(
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ast::CvtDesc {
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rounding: None,
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flush_to_zero: false,
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saturate: s.is_some(),
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dst: ast::FloatType::F64,
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src: ast::FloatType::F32
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}
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), a)
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},
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"cvt" <r:RoundingModeFloat> <s:".sat"?> ".f16" ".f64" <a:Arg2> => {
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ast::Instruction::Cvt(ast::CvtDetails::FloatFromFloat(
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ast::CvtDesc {
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rounding: Some(r),
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flush_to_zero: false,
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saturate: s.is_some(),
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dst: ast::FloatType::F16,
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src: ast::FloatType::F64
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}
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), a)
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},
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"cvt" <r:RoundingModeFloat> <f:".ftz"?> <s:".sat"?> ".f32" ".f64" <a:Arg2> => {
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ast::Instruction::Cvt(ast::CvtDetails::FloatFromFloat(
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ast::CvtDesc {
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rounding: Some(r),
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flush_to_zero: s.is_some(),
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saturate: s.is_some(),
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dst: ast::FloatType::F32,
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src: ast::FloatType::F64
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}
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), a)
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},
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||||||
|
"cvt" <r:RoundingModeFloat?> <s:".sat"?> ".f64" ".f64" <a:Arg2> => {
|
||||||
|
ast::Instruction::Cvt(ast::CvtDetails::FloatFromFloat(
|
||||||
|
ast::CvtDesc {
|
||||||
|
rounding: r,
|
||||||
|
flush_to_zero: false,
|
||||||
|
saturate: s.is_some(),
|
||||||
|
dst: ast::FloatType::F64,
|
||||||
|
src: ast::FloatType::F64
|
||||||
|
}
|
||||||
|
), a)
|
||||||
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
CvtRnd = {
|
CvtTypeInt: ast::IntType = {
|
||||||
CvtIrnd,
|
".u8" => ast::IntType::U8,
|
||||||
CvtFrnd
|
".u16" => ast::IntType::U16,
|
||||||
}
|
".u32" => ast::IntType::U32,
|
||||||
|
".u64" => ast::IntType::U64,
|
||||||
CvtIrnd = {
|
".s8" => ast::IntType::S8,
|
||||||
".rni", ".rzi", ".rmi", ".rpi"
|
".s16" => ast::IntType::S16,
|
||||||
|
".s32" => ast::IntType::S32,
|
||||||
|
".s64" => ast::IntType::S64,
|
||||||
};
|
};
|
||||||
|
|
||||||
CvtFrnd = {
|
CvtTypeFloat: ast::FloatType = {
|
||||||
".rn", ".rz", ".rm", ".rp"
|
".f16" => ast::FloatType::F16,
|
||||||
};
|
".f32" => ast::FloatType::F32,
|
||||||
|
".f64" => ast::FloatType::F64,
|
||||||
CvtType = {
|
|
||||||
".u8", ".u16", ".u32", ".u64",
|
|
||||||
".s8", ".s16", ".s32", ".s64",
|
|
||||||
".f16", ".f32", ".f64"
|
|
||||||
};
|
};
|
||||||
|
|
||||||
// https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#logic-and-shift-instructions-shl
|
// https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#logic-and-shift-instructions-shl
|
||||||
|
|
|
@ -1580,13 +1580,6 @@ impl ast::MulDetails {
|
||||||
}
|
}
|
||||||
|
|
||||||
impl ast::IntType {
|
impl ast::IntType {
|
||||||
fn is_signed(self) -> bool {
|
|
||||||
match self {
|
|
||||||
ast::IntType::S16 | ast::IntType::S32 | ast::IntType::S64 => true,
|
|
||||||
ast::IntType::U16 | ast::IntType::U32 | ast::IntType::U64 => false,
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
fn try_new(t: ast::ScalarType) -> Option<Self> {
|
fn try_new(t: ast::ScalarType) -> Option<Self> {
|
||||||
match t {
|
match t {
|
||||||
ast::ScalarType::U16 => Some(ast::IntType::U16),
|
ast::ScalarType::U16 => Some(ast::IntType::U16),
|
||||||
|
|
36
ptx/tools/cvt.py
Normal file
36
ptx/tools/cvt.py
Normal file
|
@ -0,0 +1,36 @@
|
||||||
|
import os
|
||||||
|
import subprocess
|
||||||
|
import tempfile
|
||||||
|
|
||||||
|
types = ["u8", "u16", "u32", "u64", "s8", "s16", "s32", "s64", "f16", "f32", "f64"]
|
||||||
|
rnd = ["", ".rn", ".rni"]
|
||||||
|
ftz_all = ["", ".ftz"]
|
||||||
|
sat = ["", ".sat"]
|
||||||
|
|
||||||
|
for in_type in types:
|
||||||
|
for out_type in types:
|
||||||
|
for r in rnd:
|
||||||
|
for ftz in ftz_all:
|
||||||
|
for s in sat:
|
||||||
|
with tempfile.TemporaryDirectory() as dir:
|
||||||
|
f_name = os.path.join(dir, 'ptx')
|
||||||
|
out_name = os.path.join(dir, 'out')
|
||||||
|
with open(f_name, 'w') as f:
|
||||||
|
f.write(
|
||||||
|
f"""
|
||||||
|
.version 6.5
|
||||||
|
.target sm_30
|
||||||
|
.address_size 64
|
||||||
|
.visible .entry VecAdd_kernel()
|
||||||
|
{{
|
||||||
|
.reg.{in_type} r1;
|
||||||
|
.reg.{out_type} r2;
|
||||||
|
cvt{r}{ftz}{s}.{out_type}.{in_type} r2, r1;
|
||||||
|
ret;
|
||||||
|
}}
|
||||||
|
""")
|
||||||
|
err = subprocess.run(f"ptxas {f_name} -o {out_name}", capture_output = True)
|
||||||
|
if err.returncode == 0:
|
||||||
|
print(f"cvt{r}{ftz}{s}.{out_type}.{in_type}")
|
||||||
|
#else:
|
||||||
|
# print(f"[INVALID] cvt{r}{ftz}{s}.{out_type}.{in_type}")
|
Loading…
Add table
Add a link
Reference in a new issue