mirrors/ZLUDA
1
0
Fork 0
mirror of https://github.com/vosen/ZLUDA.git synced 2025-04-20 00:14:45 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

Update parser

Browse source
This commit is contained in:
Andrzej Janik 2020-12-05 12:30:49 +01:00
parent 00b8d8d87f
commit adf88bc1af
2 changed files with 88 additions and 143 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

119
ptx/src/ptx.lalrpop
View file

@ -721,7 +721,7 @@ Instruction: ast::Instruction<ast::ParsedArgParams<'input>> = {
// https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#data-movement-and-conversion-instructions-ld
InstLd: ast::Instruction<ast::ParsedArgParams<'input>> = {
"ld" <q:LdStQualifier?> <ss:LdStateSpace?> <cop:LdCacheOperator?> <t:LdStType> <dst:IdOrVector> "," <src:MemoryOperand> => {
"ld" <q:LdStQualifier?> <ss:LdStateSpace?> <cop:LdCacheOperator?> <t:LdStType> <dst:DstOperandVec> "," <src:MemoryOperand> => {
ast::Instruction::Ld(
ast::LdDetails {
qualifier: q.unwrap_or(ast::LdStQualifier::Weak),
@ -734,16 +734,6 @@ InstLd: ast::Instruction<ast::ParsedArgParams<'input>> = {
}
};
IdOrVector: ast::IdOrVector<&'input str> = {
<dst:ExtendedID> => ast::IdOrVector::Reg(dst),
<dst:VectorExtract> => ast::IdOrVector::Vec(dst)
}
OperandOrVector: ast::OperandOrVector<&'input str> = {
<op:Operand> => ast::OperandOrVector::from(op),
<dst:VectorExtract> => ast::OperandOrVector::Vec(dst)
}
LdStType: ast::LdStType = {
<v:VectorPrefix> <t:LdStScalarType> => ast::LdStType::Vector(t, v),
<t:LdStScalarType> => ast::LdStType::Scalar(t),
@ -780,27 +770,17 @@ LdCacheOperator: ast::LdCacheOperator = {
// https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#data-movement-and-conversion-instructions-mov
InstMov: ast::Instruction<ast::ParsedArgParams<'input>> = {
<m:MovNormal> => ast::Instruction::Mov(m.0, m.1),
<m:MovVector> => ast::Instruction::Mov(m.0, m.1),
};
MovNormal: (ast::MovDetails, ast::Arg2Mov<ast::ParsedArgParams<'input>>) = {
"mov" <t:MovScalarType> <dst:ExtendedID> "," <src:Operand> => {(
ast::MovDetails::new(ast::Type::Scalar(t)),
ast::Arg2Mov::Normal(ast::Arg2MovNormal{ dst: ast::IdOrVector::Reg(dst), src: src.into() })
)},
"mov" <pref:VectorPrefix> <t:MovVectorType> <dst:IdOrVector> "," <src:OperandOrVector> => {(
ast::MovDetails::new(ast::Type::Vector(t, pref)),
ast::Arg2Mov::Normal(ast::Arg2MovNormal{ dst: dst, src: src })
)}
}
MovVector: (ast::MovDetails, ast::Arg2Mov<ast::ParsedArgParams<'input>>) = {
"mov" <t:MovVectorType> <a:Arg2MovMember> => {(
ast::MovDetails::new(ast::Type::Scalar(t.into())),
ast::Arg2Mov::Member(a)
)},
"mov" <pref:VectorPrefix?> <t:MovScalarType> <dst:DstOperandVec> "," <src:SrcOperandVec> => {
let mov_type = match pref {
Some(vec_width) => ast::Type::Vector(t, vec_width),
None => ast::Type::Scalar(t)
};
let details = ast::MovDetails::new(mov_type);
ast::Instruction::Mov(
details,
ast::Arg2Mov { dst, src }
)
}
}
#[inline]
@ -819,21 +799,6 @@ MovScalarType: ast::ScalarType = {
".pred" => ast::ScalarType::Pred
};
#[inline]
MovVectorType: ast::ScalarType = {
".b16" => ast::ScalarType::B16,
".b32" => ast::ScalarType::B32,
".b64" => ast::ScalarType::B64,
".u16" => ast::ScalarType::U16,
".u32" => ast::ScalarType::U32,
".u64" => ast::ScalarType::U64,
".s16" => ast::ScalarType::S16,
".s32" => ast::ScalarType::S32,
".s64" => ast::ScalarType::S64,
".f32" => ast::ScalarType::F32,
".f64" => ast::ScalarType::F64,
};
// https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#integer-arithmetic-instructions-mul
// https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#floating-point-instructions-mul
// https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#half-precision-floating-point-instructions-mul
@ -1198,7 +1163,7 @@ ShrType: ast::ShrType = {
// https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#data-movement-and-conversion-instructions-st
// Warning: NVIDIA documentation is incorrect, you can specify scope only once
InstSt: ast::Instruction<ast::ParsedArgParams<'input>> = {
"st" <q:LdStQualifier?> <ss:StStateSpace?> <cop:StCacheOperator?> <t:LdStType> <src1:MemoryOperand> "," <src2:OperandOrVector> => {
"st" <q:LdStQualifier?> <ss:StStateSpace?> <cop:StCacheOperator?> <t:LdStType> <src1:MemoryOperand> "," <src2:SrcOperandVec> => {
ast::Instruction::St(
ast::StData {
qualifier: q.unwrap_or(ast::LdStQualifier::Weak),
@ -1212,7 +1177,7 @@ InstSt: ast::Instruction<ast::ParsedArgParams<'input>> = {
};
// https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#using-addresses-arrays-and-vectors
MemoryOperand: ast::Operand<&'input str> = {
MemoryOperand: ast::SrcOperand<&'input str> = {
"[" <o:Operand> "]" => o
}
@ -1769,10 +1734,10 @@ ArithFloatMustRound: ast::ArithFloat = {
},
}
Operand: ast::Operand<&'input str> = {
<r:ExtendedID> => ast::Operand::Reg(r),
<r:ExtendedID> "+" <offset:S32Num> => ast::Operand::RegOffset(r, offset),
<x:ImmediateValue> => ast::Operand::Imm(x)
Operand: ast::SrcOperand<&'input str> = {
<r:ExtendedID> => ast::SrcOperand::Reg(r),
<r:ExtendedID> "+" <offset:S32Num> => ast::SrcOperand::RegOffset(r, offset),
<x:ImmediateValue> => ast::SrcOperand::Imm(x)
};
CallOperand: ast::SrcOperand<&'input str> = {
@ -1825,13 +1790,7 @@ Arg1Bar: ast::Arg1Bar<ast::ParsedArgParams<'input>> = {
};
Arg2: ast::Arg2<ast::ParsedArgParams<'input>> = {
<dst:ExtendedID> "," <src:Operand> => ast::Arg2{<>}
};
Arg2MovMember: ast::Arg2MovMember<ast::ParsedArgParams<'input>> = {
<dst:MemberOperand> "," <src:ExtendedID> => ast::Arg2MovMember::Dst(dst, dst.0, src),
<dst:ExtendedID> "," <src:MemberOperand> => ast::Arg2MovMember::Src(dst, src),
<dst:MemberOperand> "," <src:MemberOperand> => ast::Arg2MovMember::Both(dst, dst.0, src),
<dst:DstOperand> "," <src:Operand> => ast::Arg2{<>}
};
MemberOperand: (&'input str, u8) = {
@ -1855,19 +1814,19 @@ VectorExtract: Vec<&'input str> = {
};
Arg3: ast::Arg3<ast::ParsedArgParams<'input>> = {
<dst:ExtendedID> "," <src1:Operand> "," <src2:Operand> => ast::Arg3{<>}
<dst:DstOperand> "," <src1:Operand> "," <src2:Operand> => ast::Arg3{<>}
};
Arg3Atom: ast::Arg3<ast::ParsedArgParams<'input>> = {
<dst:ExtendedID> "," "[" <src1:Operand> "]" "," <src2:Operand> => ast::Arg3{<>}
<dst:DstOperand> "," "[" <src1:Operand> "]" "," <src2:Operand> => ast::Arg3{<>}
};
Arg4: ast::Arg4<ast::ParsedArgParams<'input>> = {
<dst:ExtendedID> "," <src1:Operand> "," <src2:Operand> "," <src3:Operand> => ast::Arg4{<>}
<dst:DstOperand> "," <src1:Operand> "," <src2:Operand> "," <src3:Operand> => ast::Arg4{<>}
};
Arg4Atom: ast::Arg4<ast::ParsedArgParams<'input>> = {
<dst:ExtendedID> "," "[" <src1:Operand> "]" "," <src2:Operand> "," <src3:Operand> => ast::Arg4{<>}
<dst:DstOperand> "," "[" <src1:Operand> "]" "," <src2:Operand> "," <src3:Operand> => ast::Arg4{<>}
};
Arg4Setp: ast::Arg4Setp<ast::ParsedArgParams<'input>> = {
@ -1879,18 +1838,46 @@ Arg5Setp: ast::Arg5Setp<ast::ParsedArgParams<'input>> = {
<dst1:ExtendedID> <dst2:OptionalDst?> "," <src1:Operand> "," <src2:Operand> "," "!"? <src3:Operand> => ast::Arg5Setp{<>}
};
ArgCall: (Vec<&'input str>, &'input str, Vec<ast::CallOperand<&'input str>>) = {
ArgCall: (Vec<&'input str>, &'input str, Vec<ast::SrcOperand<&'input str>>) = {
"(" <ret_params:Comma<ExtendedID>> ")" "," <func:ExtendedID> "," "(" <param_list:Comma<CallOperand>> ")" => {
(ret_params, func, param_list)
},
<func:ExtendedID> "," "(" <param_list:Comma<CallOperand>> ")" => (Vec::new(), func, param_list),
<func:ExtendedID> => (Vec::new(), func, Vec::<ast::CallOperand<_>>::new()),
<func:ExtendedID> => (Vec::new(), func, Vec::<ast::SrcOperand<_>>::new()),
};
OptionalDst: &'input str = {
"|" <dst2:ExtendedID> => dst2
}
SrcOperand: ast::SrcOperand<&'input str> = {
<r:ExtendedID> => ast::SrcOperand::Reg(r),
<r:ExtendedID> "+" <offset:S32Num> => ast::SrcOperand::RegOffset(r, offset),
<x:ImmediateValue> => ast::SrcOperand::Imm(x),
<mem_op:MemberOperand> => {
let (reg, idx) = mem_op;
ast::SrcOperand::VecIndex(reg, idx)
}
}
SrcOperandVec: ast::SrcOperandVec<&'input str> = {
<normal:SrcOperand> => ast::SrcOperandVec::Normal(normal),
<vec:VectorExtract> => ast::SrcOperandVec::Vector(vec),
}
DstOperand: ast::DstOperand<&'input str> = {
<r:ExtendedID> => ast::DstOperand::Reg(r),
<mem_op:MemberOperand> => {
let (reg, idx) = mem_op;
ast::DstOperand::VecMember(reg, idx)
}
}
DstOperandVec: ast::DstOperandVec<&'input str> = {
<normal:DstOperand> => ast::DstOperandVec::Normal(normal),
<vec:VectorExtract> => ast::DstOperandVec::Vector(vec),
}
VectorPrefix: u8 = {
".v2" => 2,
".v4" => 4

112
ptx/src/translate.rs
View file

@ -1478,7 +1478,7 @@ fn convert_to_typed_statements(
d.src_is_address = take_address;
}
let mut visitor = VectorPackingVisitor::new(&mut result, id_defs);
result.push(Statement::Instruction(
let instruction = Statement::Instruction(
ast::Instruction::Mov(
d,
ast::Arg2Mov {
@ -1487,11 +1487,13 @@ fn convert_to_typed_statements(
},
)
.map(&mut visitor)?,
));
);
result.push(instruction);
}
inst => {
let mut visitor = VectorPackingVisitor::new(&mut result, id_defs);
result.push(Statement::Instruction(inst.map(&mut visitor)?));
let instruction = Statement::Instruction(inst.map(&mut visitor)?);
result.push(instruction);
}
},
Statement::Label(i) => result.push(Statement::Label(i)),
@ -2285,72 +2287,6 @@ impl<'a, 'b> FlattenArguments<'a, 'b> {
}));
Ok(id)
}
fn member_src(
&mut self,
desc: ArgumentDescriptor<(spirv::Word, u8)>,
typ: (ast::ScalarType, u8),
) -> Result<spirv::Word, TranslateError> {
if desc.is_dst {
return Err(TranslateError::Unreachable);
}
let new_id = Self::insert_composite_read(
self.func,
self.id_def,
typ,
None,
Some(desc.sema),
desc.op,
);
Ok(new_id)
}
fn vector(
&mut self,
desc: ArgumentDescriptor<&Vec<spirv::Word>>,
typ: &ast::Type,
) -> Result<spirv::Word, TranslateError> {
let (scalar_type, vec_len) = typ.get_vector()?;
if !desc.is_dst {
let mut new_id = self.id_def.new_non_variable(typ.clone());
self.func.push(Statement::Undef(typ.clone(), new_id));
for (idx, id) in desc.op.iter().enumerate() {
let newer_id = self.id_def.new_non_variable(typ.clone());
todo!();
/*
self.func.push(Statement::Instruction(ast::Instruction::Mov(
ast::MovDetails {
typ: ast::Type::Scalar(scalar_type),
src_is_address: false,
dst_width: vec_len,
src_width: 0,
relaxed_src2_conv: desc.sema == ArgumentSemantics::DefaultRelaxed,
},
ast::Arg2Mov::Member(ast::Arg2MovMember::Dst(
(newer_id, idx as u8),
new_id,
*id,
)),
)));
*/
new_id = newer_id;
}
Ok(new_id)
} else {
let new_id = self.id_def.new_non_variable(typ.clone());
for (idx, id) in desc.op.iter().enumerate() {
Self::insert_composite_read(
&mut self.post_stmts,
self.id_def,
(scalar_type, vec_len),
Some(*id),
Some(desc.sema),
(new_id, idx as u8),
);
}
Ok(new_id)
}
}
}
impl<'a, 'b> ArgumentMapVisitor<TypedArgParams, ExpandedArgParams> for FlattenArguments<'a, 'b> {
@ -2367,7 +2303,10 @@ impl<'a, 'b> ArgumentMapVisitor<TypedArgParams, ExpandedArgParams> for FlattenAr
desc: ArgumentDescriptor<ast::DstOperand<spirv::Word>>,
typ: &ast::Type,
) -> Result<spirv::Word, TranslateError> {
todo!()
match desc.op {
ast::DstOperand::Reg(reg) => self.reg(desc.new_op(reg), Some(typ)),
ast::DstOperand::VecMember(..) => Err(TranslateError::Unreachable),
}
}
fn src_operand(
@ -2375,7 +2314,14 @@ impl<'a, 'b> ArgumentMapVisitor<TypedArgParams, ExpandedArgParams> for FlattenAr
desc: ArgumentDescriptor<ast::SrcOperand<spirv::Word>>,
typ: &ast::Type,
) -> Result<spirv::Word, TranslateError> {
todo!()
match desc.op {
ast::SrcOperand::Reg(r) => self.reg(desc.new_op(r), Some(typ)),
ast::SrcOperand::Imm(x) => self.immediate(desc.new_op(x), typ),
ast::SrcOperand::RegOffset(reg, offset) => {
self.reg_offset(desc.new_op((reg, offset)), typ)
}
ast::SrcOperand::VecIndex(..) => Err(TranslateError::Unreachable),
}
}
fn dst_operand_vec(
@ -2383,7 +2329,10 @@ impl<'a, 'b> ArgumentMapVisitor<TypedArgParams, ExpandedArgParams> for FlattenAr
desc: ArgumentDescriptor<ast::DstOperand<spirv::Word>>,
typ: &ast::Type,
) -> Result<spirv::Word, TranslateError> {
todo!()
match desc.op {
ast::DstOperand::Reg(reg) => self.reg(desc.new_op(reg), Some(typ)),
ast::DstOperand::VecMember(..) => Err(TranslateError::Unreachable),
}
}
fn src_operand_vec(
@ -2391,7 +2340,14 @@ impl<'a, 'b> ArgumentMapVisitor<TypedArgParams, ExpandedArgParams> for FlattenAr
desc: ArgumentDescriptor<ast::SrcOperand<spirv::Word>>,
typ: &ast::Type,
) -> Result<spirv::Word, TranslateError> {
todo!()
match desc.op {
ast::SrcOperand::Reg(r) => self.reg(desc.new_op(r), Some(typ)),
ast::SrcOperand::Imm(x) => self.immediate(desc.new_op(x), typ),
ast::SrcOperand::RegOffset(reg, offset) => {
self.reg_offset(desc.new_op((reg, offset)), typ)
}
ast::SrcOperand::VecIndex(..) => Err(TranslateError::Unreachable),
}
}
}
@ -2498,6 +2454,8 @@ fn insert_implicit_conversions(
| s @ Statement::StoreVar(_, _)
| s @ Statement::Undef(_, _)
| s @ Statement::RetValue(_, _) => result.push(s),
Statement::PackVector(_) => todo!(),
Statement::UnpackVector(_) => todo!(),
}
}
Ok(result)
@ -5351,9 +5309,9 @@ where
desc: ArgumentDescriptor<ast::DstOperandVec<&str>>,
typ: &ast::Type,
) -> Result<ast::DstOperandVec<spirv::Word>, TranslateError> {
Ok(match desc.op {
Ok(match &desc.op {
ast::DstOperandVec::Normal(inner_op) => {
ast::DstOperandVec::Normal(self.dst_operand(desc.new_op(inner_op), typ)?)
ast::DstOperandVec::Normal(self.dst_operand(desc.new_op(inner_op.clone()), typ)?)
}
ast::DstOperandVec::Vector(ids) => ast::DstOperandVec::Vector(
ids.into_iter()
@ -5368,9 +5326,9 @@ where
desc: ArgumentDescriptor<ast::SrcOperandVec<&str>>,
typ: &ast::Type,
) -> Result<ast::SrcOperandVec<spirv::Word>, TranslateError> {
Ok(match desc.op {
Ok(match &desc.op {
ast::SrcOperandVec::Normal(inner_op) => {
ast::SrcOperandVec::Normal(self.src_operand(desc.new_op(inner_op), typ)?)
ast::SrcOperandVec::Normal(self.src_operand(desc.new_op(inner_op.clone()), typ)?)
}
ast::SrcOperandVec::Vector(ids) => ast::SrcOperandVec::Vector(
ids.into_iter()