4 commits

Author	SHA1	Message	Date
Violet	2b90fdb56c	Add support for cp.async (#427) ... Adds support for * `cp.async` * `cp.async.commit_group` * `cp.async.wait_group` * `cp.async.wait_all` Asynchronous copy operations are only supported by AMD Instinct GPUs, so for now we lower them as synchronous copy operations. Because of this, `cp.async.commit_group`, `cp.async.wait_group`, and `cp.async.wait_all` are no-op.	2025-07-23 16:25:49 -07:00
Violet	f5712d9d5a	Add parser support for hyphenated IDs in arguments (#425) ... The syntax description for [`cp.async`](https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-cp-async) has several elements not supported by the current parser. One such element is that the `cp-size` and `src-size` operands have hyphens in their IDs. This PR adds support for these IDs, and translates them as `cp_size` and `src_size`	2025-07-18 13:45:09 -07:00
Violet	5edfeb04eb	Error instead of infinite loop when parsing enum without a derive attribute in derive_parser! (#391)	2025-06-23 16:18:21 -07:00
Andrzej Janik	193eb29be8	PTX parser rewrite (#267) ... Replaces traditional LALRPOP-based parser with winnow-based parser to handle out-of-order instruction modifer. Generate instruction type and instruction visitor from a macro instead of writing by hand. Add separate compilation path using the new parser that only works in tests for now	2024-09-04 15:47:42 +02:00