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Revert "PPCCache: Always invalidate on icbi, even if icache is disabled"

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This reverts commit 2f4a3d6f60.
This commit is contained in:
Nayla Hanegan 2024-08-23 17:48:45 -04:00
commit 0a369958a4
1 changed files with 8 additions and 8 deletions
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16
Source/Core/Core/PowerPC/PPCCache.cpp
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@ -389,12 +389,13 @@ u32 InstructionCache::ReadInstruction(Memory::MemoryManager& memory,
void InstructionCache::Invalidate(Memory::MemoryManager& memory, JitInterface& jit_interface, void InstructionCache::Invalidate(Memory::MemoryManager& memory, JitInterface& jit_interface,
u32 addr) u32 addr)
{ {
// Per the 750cl manual, section 3.4.1.5 Instruction Cache Enabling/Disabling (page 137) auto& system = Core::System::GetInstance();
// and section 3.4.2.6 Instruction Cache Block Invalidate (icbi) (page 140), the icbi auto& memory = system.GetMemory();
// instruction always invalidates, even if the instruction cache is disabled or locked, auto& ppc_state = system.GetPPCState();
// and it also invalidates all ways of the corresponding cache set, not just the way corresponding if (!HID0(ppc_state).ICE || m_disable_icache)
// to the given address. return;
// (However, the icbi instruction's info on page 432 does not include this information)
// Invalidates the whole set
const u32 set = (addr >> 5) & 0x7f; const u32 set = (addr >> 5) & 0x7f;
for (size_t way = 0; way < 8; way++) for (size_t way = 0; way < 8; way++)
{ {
@ -411,8 +412,7 @@ void InstructionCache::Invalidate(Memory::MemoryManager& memory, JitInterface& j
valid[set] = 0; valid[set] = 0;
modified[set] = 0; modified[set] = 0;
// Also tell the JIT that the corresponding address has been invalidated system.GetJitInterface().InvalidateICacheLine(addr);
jit_interface.InvalidateICacheLine(addr);
} }
void InstructionCache::RefreshConfig() void InstructionCache::RefreshConfig()