From 4d5d6d34640a7bf155aa0d7b573eae48d1edf10e Mon Sep 17 00:00:00 2001
From: Sintendo <3380580+Sintendo@users.noreply.github.com>
Date: Sun, 29 Dec 2024 11:51:31 +0100
Subject: [PATCH] JitArm64_LoadStore: Use UMIN in dcbx when available

---
 .../Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp     | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp
index ebcb8142b7..88fa3e727a 100644
--- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp
+++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp
@@ -7,6 +7,7 @@
 
 #include "Common/Arm64Emitter.h"
 #include "Common/BitSet.h"
+#include "Common/CPUDetect.h"
 #include "Common/CommonTypes.h"
 #include "Common/ScopeGuard.h"
 
@@ -805,8 +806,15 @@ void JitArm64::dcbx(UGeckoInstruction inst)
     SDIV(WB, reg_downcount, reg_cycle_count);  // WB = downcount / cycle_count
     SUB(WA, loop_counter, 1);                  // WA = CTR - 1
     // ^ Note that this CTR-1 implicitly handles the CTR == 0 case correctly.
-    CMP(WB, WA);
-    CSEL(WA, WB, WA, CCFlags::CC_LO);  // WA = min(WB, WA)
+    if (cpu_info.bCSSC)
+    {
+      UMIN(WA, WB, WA);
+    }
+    else
+    {
+      CMP(WB, WA);
+      CSEL(WA, WB, WA, CCFlags::CC_LO);  // WA = min(WB, WA)
+    }
 
     // WA now holds the amount of loops to execute minus 1, which is the amount we need to adjust
     // downcount, CTR, and Rb by to exit the loop construct with the right values in those