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Fix register in comments for external interrupt tests

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Pokechu22 2023-02-23 18:28:56 -08:00
commit 53b0fe1e67
5 changed files with 5 additions and 5 deletions
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2
Source/DSPSpy/tests/external_interrupt_delay_long.ds
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@ -58,7 +58,7 @@ external_irq:
CALL send_back CALL send_back
RTI RTI
; Expected result ($AX0.H (send_back num), $AR0, and $SR): ; Expected result ($AX0.H (send_back num), $AX1.H, and $SR):
; 1, 1, 2024 (start) ; 1, 1, 2024 (start)
; 3, 2, 2025 (in interrupt handler - note that the interrupt happens after one LRI instruction) ; 3, 2, 2025 (in interrupt handler - note that the interrupt happens after one LRI instruction)
; 2, 6, 3825 (the remaining LRI instructions execute) ; 2, 6, 3825 (the remaining LRI instructions execute)

2
Source/DSPSpy/tests/external_interrupt_delay_long_short.ds
View file

@ -58,7 +58,7 @@ external_irq:
CALL send_back CALL send_back
RTI RTI
; Expected result ($AX0.H (send_back num), $AR0, and $SR): ; Expected result ($AX0.H (send_back num), $AX1.H, and $SR):
; 1, 1, 2024 (start) ; 1, 1, 2024 (start)
; 3, 2, 2025 (in interrupt handler - note that the interrupt happens after only one LRI instruction) ; 3, 2, 2025 (in interrupt handler - note that the interrupt happens after only one LRI instruction)
; 2, 6, 3825 (the remaining LRIS instructions execute) ; 2, 6, 3825 (the remaining LRIS instructions execute)

2
Source/DSPSpy/tests/external_interrupt_delay_short.ds
View file

@ -58,7 +58,7 @@ external_irq:
CALL send_back CALL send_back
RTI RTI
; Expected result ($AX0.H (send_back num), $AR0, and $SR): ; Expected result ($AX0.H (send_back num), $AX1.H, and $SR):
; 1, 1, 2024 (start) ; 1, 1, 2024 (start)
; 3, 3, 2025 (in interrupt handler - note that the interrupt happens after two LRIS instructions) ; 3, 3, 2025 (in interrupt handler - note that the interrupt happens after two LRIS instructions)
; 2, 6, 3825 (the remaining LRIS instructions execute) ; 2, 6, 3825 (the remaining LRIS instructions execute)

2
Source/DSPSpy/tests/external_interrupt_delay_short_long.ds
View file

@ -58,7 +58,7 @@ external_irq:
CALL send_back CALL send_back
RTI RTI
; Expected result ($AX0.H (send_back num), $AR0, and $SR): ; Expected result ($AX0.H (send_back num), $AX1.H, and $SR):
; 1, 1, 2024 (start) ; 1, 1, 2024 (start)
; 3, 3, 2025 (in interrupt handler - note that the interrupt happens after both the LRIS and LRI instructions) ; 3, 3, 2025 (in interrupt handler - note that the interrupt happens after both the LRIS and LRI instructions)
; 2, 6, 3825 (the remaining LRIS instructions execute) ; 2, 6, 3825 (the remaining LRIS instructions execute)

2
Source/DSPSpy/tests/external_interrupt_no_delay.ds
View file

@ -60,7 +60,7 @@ external_irq:
CALL send_back CALL send_back
RTI RTI
; Expected result ($AX0.H (send_back num), $AR0, and $SR): ; Expected result ($AX0.H (send_back num), $AX1.H, and $SR):
; 1, 1, 2024 (start) ; 1, 1, 2024 (start)
; 3, 1, 2020 (in interrupt handler) ; 3, 1, 2020 (in interrupt handler)
; 2, 6, 3825 (end) ; 2, 6, 3825 (end)