From 76a13604ef49b522281af75675f044d59a74e871 Mon Sep 17 00:00:00 2001 From: Pierre Bourdon Date: Tue, 19 Jun 2012 06:35:30 +0200 Subject: [PATCH] Optimize mtmsr by going to an exception exit only if EE are enabled and some exceptions are pending. --- .../Src/PowerPC/Jit64/Jit_SystemRegisters.cpp | 20 ++++++++++++++++--- .../Core/Core/Src/PowerPC/Jit64IL/IR_X86.cpp | 17 +++++++++++++++- 2 files changed, 33 insertions(+), 4 deletions(-) diff --git a/Source/Core/Core/Src/PowerPC/Jit64/Jit_SystemRegisters.cpp b/Source/Core/Core/Src/PowerPC/Jit64/Jit_SystemRegisters.cpp index 5cb7f0e13b..b977e82b28 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64/Jit_SystemRegisters.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64/Jit_SystemRegisters.cpp @@ -123,10 +123,24 @@ void Jit64::mtmsr(UGeckoInstruction inst) gpr.Flush(FLUSH_ALL); fpr.Flush(FLUSH_ALL); - // Force an external exception when going out of mtmsr in order to check - // immediately for interrupts that were delayed because of MSR.EE=0. + // If some exceptions are pending and EE are now enabled, force checking + // external exceptions when going out of mtmsr in order to execute delayed + // interrupts as soon as possible. + MOV(32, R(EAX), M(&MSR)); + TEST(32, R(EAX), Imm32(0x8000)); + FixupBranch eeDisabled = J_CC(CC_Z); + + MOV(32, R(EAX), M((void*)&PowerPC::ppcState.Exceptions)); + TEST(32, R(EAX), R(EAX)); + FixupBranch noExceptionsPending = J_CC(CC_Z); + MOV(32, M(&PC), Imm32(js.compilerPC + 4)); - WriteExceptionExit(); + WriteExternalExceptionExit(); + + SetJumpTarget(eeDisabled); + SetJumpTarget(noExceptionsPending); + WriteExit(js.compilerPC + 4, 0); + js.firstFPInstructionFound = false; } diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/IR_X86.cpp b/Source/Core/Core/Src/PowerPC/Jit64IL/IR_X86.cpp index 448f51d1c6..d9aa46f6b5 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64IL/IR_X86.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/IR_X86.cpp @@ -997,8 +997,23 @@ static void DoWriteCode(IRBuilder* ibuild, JitIL* Jit, bool UseProfile, bool Mak unsigned InstLoc = ibuild->GetImmValue(getOp2(I)); regStoreInstToConstLoc(RI, 32, getOp1(I), &MSR); regNormalRegClear(RI, I); + + // If some exceptions are pending and EE are now enabled, force checking + // external exceptions when going out of mtmsr in order to execute delayed + // interrupts as soon as possible. + Jit->MOV(32, R(EAX), M(&MSR)); + Jit->TEST(32, R(EAX), Imm32(0x8000)); + FixupBranch eeDisabled = Jit->J_CC(CC_Z); + + Jit->MOV(32, R(EAX), M((void*)&PowerPC::ppcState.Exceptions)); + Jit->TEST(32, R(EAX), R(EAX)); + FixupBranch noExceptionsPending = Jit->J_CC(CC_Z); + Jit->MOV(32, M(&PC), Imm32(InstLoc + 4)); - Jit->WriteExceptionExit(); + Jit->WriteExceptionExit(); // TODO: Implement WriteExternalExceptionExit for JitIL + + Jit->SetJumpTarget(eeDisabled); + Jit->SetJumpTarget(noExceptionsPending); break; } case StoreGQR: {