diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_BackPatch.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_BackPatch.cpp index ad11385edd..02299e0e2a 100644 --- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_BackPatch.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_BackPatch.cpp @@ -67,6 +67,14 @@ void JitArm64::EmitBackpatchRoutine(u32 flags, MemAccessMode mode, ARM64Reg RS, const bool memcheck = jo.memcheck && !emitting_routine; + if ((flags & BackPatchInfo::FLAG_LOAD)) + { + if ((flags & BackPatchInfo::FLAG_FLOAT)) + scratch_fprs[DecodeReg(RS)] = !memcheck; + else + scratch_gprs[DecodeReg(RS)] = !memcheck; + } + BitSet32 temp_gpr_candidates = scratch_gprs; BitSet32 temp_fpr_candidates = scratch_fprs; temp_gpr_candidates[DecodeReg(addr)] = false; diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp index d08fae4add..815174db63 100644 --- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp @@ -129,8 +129,6 @@ void JitArm64::SafeLoadToReg(u32 dest, s32 addr, s32 offsetReg, u32 flags, s32 o scratch_gprs[DecodeReg(ARM64Reg::W1)] = true; if (jo.memcheck) scratch_gprs[DecodeReg(ARM64Reg::W0)] = true; - if (!jo.memcheck) - scratch_gprs[DecodeReg(dest_reg)] = true; u32 access_size = BackPatchInfo::GetFlagSize(flags); u32 mmio_address = 0; @@ -592,8 +590,6 @@ void JitArm64::lmw(UGeckoInstruction inst) scratch_gprs[DecodeReg(addr_reg)] = true; if (jo.memcheck) scratch_gprs[DecodeReg(ARM64Reg::W0)] = true; - if (!jo.memcheck) - scratch_gprs[DecodeReg(dest_reg)] = true; EmitBackpatchRoutine(flags, MemAccessMode::Auto, dest_reg, EncodeRegTo64(addr_reg), scratch_gprs, scratch_fprs); diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStoreFloating.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStoreFloating.cpp index c53e5f0f02..5deeaf3724 100644 --- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStoreFloating.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStoreFloating.cpp @@ -169,8 +169,6 @@ void JitArm64::lfXX(UGeckoInstruction inst) scratch_gprs[DecodeReg(ARM64Reg::W1)] = true; if (jo.memcheck) scratch_gprs[DecodeReg(ARM64Reg::W0)] = true; - if (!jo.memcheck) - scratch_fprs[DecodeReg(VD)] = true; if (is_immediate && m_mmu.IsOptimizableRAMAddress(imm_addr, BackPatchInfo::GetFlagSize(flags))) { diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStorePaired.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStorePaired.cpp index 9a8f2a3ede..b5731a2157 100644 --- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStorePaired.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStorePaired.cpp @@ -85,8 +85,6 @@ void JitArm64::psq_lXX(UGeckoInstruction inst) scratch_gprs[DecodeReg(ARM64Reg::W1)] = true; if (jo.memcheck) scratch_gprs[DecodeReg(ARM64Reg::W0)] = true; - if (!jo.memcheck) - scratch_fprs[DecodeReg(VS)] = true; u32 flags = BackPatchInfo::FLAG_LOAD | BackPatchInfo::FLAG_FLOAT | BackPatchInfo::FLAG_SIZE_32; if (!w)