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Refactor fastmem/trampoline code.
Simplication to avoid reading back the generated instructions, allowing us to handle all possible cases.
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parent
ddc9e414ee
commit
b1296a7825
20 changed files with 385 additions and 894 deletions
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@ -1046,8 +1046,14 @@ void XEmitter::MOVBE(int bits, const OpArg& dest, X64Reg src)
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WriteMOVBE(bits, 0xF1, src, dest);
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}
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void XEmitter::LoadAndSwap(int size, X64Reg dst, const OpArg& src, bool sign_extend)
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void XEmitter::LoadAndSwap(int size, X64Reg dst, const OpArg& src, bool sign_extend, MovInfo* info)
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{
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if (info)
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{
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info->address = GetWritableCodePtr();
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info->nonAtomicSwapStore = false;
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}
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switch (size)
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{
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case 8:
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@ -1083,20 +1089,28 @@ void XEmitter::LoadAndSwap(int size, X64Reg dst, const OpArg& src, bool sign_ext
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}
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}
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u8* XEmitter::SwapAndStore(int size, const OpArg& dst, X64Reg src)
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void XEmitter::SwapAndStore(int size, const OpArg& dst, X64Reg src, MovInfo* info)
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{
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u8* mov_location = GetWritableCodePtr();
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if (cpu_info.bMOVBE)
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{
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if (info)
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{
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info->address = GetWritableCodePtr();
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info->nonAtomicSwapStore = false;
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}
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MOVBE(size, dst, src);
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}
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else
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{
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BSWAP(size, src);
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mov_location = GetWritableCodePtr();
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if (info)
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{
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info->address = GetWritableCodePtr();
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info->nonAtomicSwapStore = true;
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info->nonAtomicSwapStoreSrc = src;
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}
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MOV(size, dst, R(src));
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}
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return mov_location;
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}
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void XEmitter::LEA(int bits, X64Reg dest, OpArg src)
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