diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp
index 8b00447ffd..76f771abe5 100644
--- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp
+++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp
@@ -1394,23 +1394,34 @@ void JitArm64::subfic(UGeckoInstruction inst)
   else
   {
     const bool will_read = d == a;
-    const bool is_zero = imm == 0;
     gpr.BindToRegister(d, will_read);
-
-    // d = imm - a
     ARM64Reg RD = gpr.R(d);
+
+    if (imm == -1)
     {
-      Arm64GPRCache::ScopedARM64Reg WA(ARM64Reg::WZR);
-      if (!is_zero)
+      // d = -1 - a = ~a
+      MVN(RD, gpr.R(a));
+      // CA is always set in this case
+      ComputeCarry(true);
+    }
+    else
+    {
+      const bool is_zero = imm == 0;
+
+      // d = imm - a
       {
-        WA = will_read ? gpr.GetScopedReg() : Arm64GPRCache::ScopedARM64Reg(RD);
-        MOVI2R(WA, imm);
+        Arm64GPRCache::ScopedARM64Reg WA(ARM64Reg::WZR);
+        if (!is_zero)
+        {
+          WA = will_read ? gpr.GetScopedReg() : Arm64GPRCache::ScopedARM64Reg(RD);
+          MOVI2R(WA, imm);
+        }
+
+        CARRY_IF_NEEDED(SUB, SUBS, RD, WA, gpr.R(a));
       }
 
-      CARRY_IF_NEEDED(SUB, SUBS, RD, WA, gpr.R(a));
+      ComputeCarry();
     }
-
-    ComputeCarry();
   }
 }
 
diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp
index ebcb8142b7..12c35bc43c 100644
--- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp
+++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp
@@ -817,9 +817,8 @@ void JitArm64::dcbx(UGeckoInstruction inst)
     STR(IndexType::Unsigned, loop_counter, PPC_REG, PPCSTATE_OFF_SPR(SPR_CTR));
 
     // downcount -= (WA * reg_cycle_count)
-    MUL(WB, WA, reg_cycle_count);
+    MSUB(reg_downcount, WA, reg_cycle_count, reg_downcount);
     // ^ Note that this cannot overflow because it's limited by (downcount/cycle_count).
-    SUB(reg_downcount, reg_downcount, WB);
     STR(IndexType::Unsigned, reg_downcount, PPC_REG, PPCSTATE_OFF(downcount));
 
     SetJumpTarget(downcount_is_zero_or_negative);
diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_Paired.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_Paired.cpp
index 900d9c87c1..7ac2c31bb9 100644
--- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_Paired.cpp
+++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_Paired.cpp
@@ -7,6 +7,7 @@
 #include "Common/CommonTypes.h"
 #include "Common/Config/Config.h"
 #include "Common/StringUtil.h"
+#include "Common/Unreachable.h"
 
 #include "Core/Config/SessionSettings.h"
 #include "Core/ConfigManager.h"
@@ -337,8 +338,12 @@ void JitArm64::ps_sel(UGeckoInstruction inst)
     const auto V0Q = fpr.GetScopedReg();
     const ARM64Reg V0 = reg_encoder(V0Q);
     m_float_emit.FCMGE(size, V0, VA);
-    m_float_emit.BSL(V0, VC, VB);
-    m_float_emit.MOV(VD, V0);
+    if (d == b)
+      m_float_emit.BIT(VD, VC, V0);
+    else if (d == c)
+      m_float_emit.BIF(VD, VB, V0);
+    else
+      Common::Unreachable();
   }
 
   ASSERT_MSG(DYNA_REC, singles == (fpr.IsSingle(a) && fpr.IsSingle(b) && fpr.IsSingle(c)),