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Merge pull request #9817 from Sintendo/jit64subfic

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Jit64: subfic - Optimize constants for d != a
This commit is contained in:
Markus Wick 2021-06-17 09:12:50 +02:00 • committed by GitHub
commit b530d9b8c2
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GPG key ID: 4AEE18F83AFDEB23
1 changed files with 24 additions and 21 deletions
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11
Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp
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@ -898,10 +898,11 @@ void Jit64::subfic(UGeckoInstruction inst)
RCX64Reg Rd = gpr.Bind(d, RCMode::Write); RCX64Reg Rd = gpr.Bind(d, RCMode::Write);
RegCache::Realize(Ra, Rd); RegCache::Realize(Ra, Rd);
if (d == a)
{
if (imm == 0) if (imm == 0)
{ {
if (d != a)
MOV(32, Rd, Ra);
// Flags act exactly like subtracting from 0 // Flags act exactly like subtracting from 0
NEG(32, Rd); NEG(32, Rd);
// Output carry is inverted // Output carry is inverted
@ -909,18 +910,20 @@ void Jit64::subfic(UGeckoInstruction inst)
} }
else if (imm == -1) else if (imm == -1)
{ {
if (d != a)
MOV(32, Rd, Ra);
NOT(32, Rd); NOT(32, Rd);
// CA is always set in this case // CA is always set in this case
FinalizeCarry(true); FinalizeCarry(true);
} }
else else if (d == a)
{ {
NOT(32, Rd); NOT(32, Rd);
ADD(32, Rd, Imm32(imm + 1)); ADD(32, Rd, Imm32(imm + 1));
// Output carry is normal // Output carry is normal
FinalizeCarry(CC_C); FinalizeCarry(CC_C);
} }
}
else else
{ {
MOV(32, Rd, Imm32(imm)); MOV(32, Rd, Imm32(imm));