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https://github.com/dolphin-emu/dolphin.git
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Run code through the advanced tool 'sed' to remove trailing whitespace.
This commit is contained in:
comex
parent
965b32be9c
commit
c579637eaf
568 changed files with 8650 additions and 8654 deletions
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@ -17,7 +17,7 @@ enum X64Reg
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{
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EAX = 0, EBX = 3, ECX = 1, EDX = 2,
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ESI = 6, EDI = 7, EBP = 5, ESP = 4,
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RAX = 0, RBX = 3, RCX = 1, RDX = 2,
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RSI = 6, RDI = 7, RBP = 5, RSP = 4,
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R8 = 8, R9 = 9, R10 = 10,R11 = 11,
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@ -30,7 +30,7 @@ enum X64Reg
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AX = 0, BX = 3, CX = 1, DX = 2,
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SI = 6, DI = 7, BP = 5, SP = 4,
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XMM0=0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
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XMM0=0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
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XMM8, XMM9, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15,
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INVALID_REG = 0xFFFFFFFF
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@ -43,7 +43,7 @@ enum CCFlags
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CC_B = 2, CC_C = 2, CC_NAE = 2,
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CC_NB = 3, CC_NC = 3, CC_AE = 3,
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CC_Z = 4, CC_E = 4,
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CC_NZ = 5, CC_NE = 5,
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CC_NZ = 5, CC_NE = 5,
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CC_BE = 6, CC_NA = 6,
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CC_NBE = 7, CC_A = 7,
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CC_S = 8,
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@ -264,7 +264,7 @@ public:
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u8 *GetWritableCodePtr();
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// Looking for one of these? It's BANNED!! Some instructions are slow on modern CPU
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// INC, DEC, LOOP, LOOPNE, LOOPE, ENTER, LEAVE, XCHG, XLAT, REP MOVSB/MOVSD, REP SCASD + other string instr.,
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// INC, DEC, LOOP, LOOPNE, LOOPE, ENTER, LEAVE, XCHG, XLAT, REP MOVSB/MOVSD, REP SCASD + other string instr.,
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// INC and DEC are slow on Intel Core, but not on AMD. They create a
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// false flag dependency because they only update a subset of the flags.
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// XCHG is SLOW and should be avoided.
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@ -353,7 +353,7 @@ public:
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void DIV(int bits, OpArg src);
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void IDIV(int bits, OpArg src);
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// Shift
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// Shift
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void ROL(int bits, OpArg dest, OpArg shift);
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void ROR(int bits, OpArg dest, OpArg shift);
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void RCL(int bits, OpArg dest, OpArg shift);
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@ -408,7 +408,7 @@ public:
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// Sign/zero extension
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void MOVSX(int dbits, int sbits, X64Reg dest, OpArg src); //automatically uses MOVSXD if necessary
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void MOVZX(int dbits, int sbits, X64Reg dest, OpArg src);
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void MOVZX(int dbits, int sbits, X64Reg dest, OpArg src);
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// WARNING - These two take 11-13 cycles and are VectorPath! (AMD64)
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void STMXCSR(OpArg memloc);
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@ -422,40 +422,40 @@ public:
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void FWAIT();
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// SSE/SSE2: Floating point arithmetic
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void ADDSS(X64Reg regOp, OpArg arg);
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void ADDSD(X64Reg regOp, OpArg arg);
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void SUBSS(X64Reg regOp, OpArg arg);
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void SUBSD(X64Reg regOp, OpArg arg);
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void MULSS(X64Reg regOp, OpArg arg);
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void MULSD(X64Reg regOp, OpArg arg);
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void DIVSS(X64Reg regOp, OpArg arg);
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void DIVSD(X64Reg regOp, OpArg arg);
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void MINSS(X64Reg regOp, OpArg arg);
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void MINSD(X64Reg regOp, OpArg arg);
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void MAXSS(X64Reg regOp, OpArg arg);
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void MAXSD(X64Reg regOp, OpArg arg);
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void SQRTSS(X64Reg regOp, OpArg arg);
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void SQRTSD(X64Reg regOp, OpArg arg);
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void ADDSS(X64Reg regOp, OpArg arg);
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void ADDSD(X64Reg regOp, OpArg arg);
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void SUBSS(X64Reg regOp, OpArg arg);
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void SUBSD(X64Reg regOp, OpArg arg);
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void MULSS(X64Reg regOp, OpArg arg);
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void MULSD(X64Reg regOp, OpArg arg);
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void DIVSS(X64Reg regOp, OpArg arg);
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void DIVSD(X64Reg regOp, OpArg arg);
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void MINSS(X64Reg regOp, OpArg arg);
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void MINSD(X64Reg regOp, OpArg arg);
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void MAXSS(X64Reg regOp, OpArg arg);
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void MAXSD(X64Reg regOp, OpArg arg);
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void SQRTSS(X64Reg regOp, OpArg arg);
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void SQRTSD(X64Reg regOp, OpArg arg);
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void RSQRTSS(X64Reg regOp, OpArg arg);
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// SSE/SSE2: Floating point bitwise (yes)
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void CMPSS(X64Reg regOp, OpArg arg, u8 compare);
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void CMPSD(X64Reg regOp, OpArg arg, u8 compare);
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void ANDSS(X64Reg regOp, OpArg arg);
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void ANDSD(X64Reg regOp, OpArg arg);
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void ANDNSS(X64Reg regOp, OpArg arg);
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void ANDNSD(X64Reg regOp, OpArg arg);
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void ORSS(X64Reg regOp, OpArg arg);
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void ORSD(X64Reg regOp, OpArg arg);
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void XORSS(X64Reg regOp, OpArg arg);
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void XORSD(X64Reg regOp, OpArg arg);
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void CMPSS(X64Reg regOp, OpArg arg, u8 compare);
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void CMPSD(X64Reg regOp, OpArg arg, u8 compare);
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void ANDSS(X64Reg regOp, OpArg arg);
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void ANDSD(X64Reg regOp, OpArg arg);
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void ANDNSS(X64Reg regOp, OpArg arg);
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void ANDNSD(X64Reg regOp, OpArg arg);
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void ORSS(X64Reg regOp, OpArg arg);
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void ORSD(X64Reg regOp, OpArg arg);
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void XORSS(X64Reg regOp, OpArg arg);
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void XORSD(X64Reg regOp, OpArg arg);
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// SSE/SSE2: Floating point packed arithmetic (x4 for float, x2 for double)
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void ADDPS(X64Reg regOp, OpArg arg);
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void ADDPD(X64Reg regOp, OpArg arg);
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void SUBPS(X64Reg regOp, OpArg arg);
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void SUBPD(X64Reg regOp, OpArg arg);
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void CMPPS(X64Reg regOp, OpArg arg, u8 compare);
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void ADDPS(X64Reg regOp, OpArg arg);
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void ADDPD(X64Reg regOp, OpArg arg);
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void SUBPS(X64Reg regOp, OpArg arg);
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void SUBPD(X64Reg regOp, OpArg arg);
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void CMPPS(X64Reg regOp, OpArg arg, u8 compare);
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void CMPPD(X64Reg regOp, OpArg arg, u8 compare);
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void MULPS(X64Reg regOp, OpArg arg);
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void MULPD(X64Reg regOp, OpArg arg);
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@ -470,8 +470,8 @@ public:
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void RSQRTPS(X64Reg regOp, OpArg arg);
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// SSE/SSE2: Floating point packed bitwise (x4 for float, x2 for double)
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void ANDPS(X64Reg regOp, OpArg arg);
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void ANDPD(X64Reg regOp, OpArg arg);
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void ANDPS(X64Reg regOp, OpArg arg);
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void ANDPD(X64Reg regOp, OpArg arg);
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void ANDNPS(X64Reg regOp, OpArg arg);
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void ANDNPD(X64Reg regOp, OpArg arg);
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void ORPS(X64Reg regOp, OpArg arg);
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@ -480,9 +480,9 @@ public:
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void XORPD(X64Reg regOp, OpArg arg);
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// SSE/SSE2: Shuffle components. These are tricky - see Intel documentation.
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void SHUFPS(X64Reg regOp, OpArg arg, u8 shuffle);
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void SHUFPD(X64Reg regOp, OpArg arg, u8 shuffle);
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void SHUFPS(X64Reg regOp, OpArg arg, u8 shuffle);
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void SHUFPD(X64Reg regOp, OpArg arg, u8 shuffle);
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// SSE/SSE2: Useful alternative to shuffle in some cases.
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void MOVDDUP(X64Reg regOp, OpArg arg);
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@ -554,51 +554,51 @@ public:
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void PUNPCKLDQ(X64Reg dest, const OpArg &arg);
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void PAND(X64Reg dest, OpArg arg);
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void PANDN(X64Reg dest, OpArg arg);
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void PXOR(X64Reg dest, OpArg arg);
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void POR(X64Reg dest, OpArg arg);
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void PANDN(X64Reg dest, OpArg arg);
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void PXOR(X64Reg dest, OpArg arg);
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void POR(X64Reg dest, OpArg arg);
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void PADDB(X64Reg dest, OpArg arg);
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void PADDW(X64Reg dest, OpArg arg);
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void PADDD(X64Reg dest, OpArg arg);
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void PADDQ(X64Reg dest, OpArg arg);
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void PADDW(X64Reg dest, OpArg arg);
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void PADDD(X64Reg dest, OpArg arg);
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void PADDQ(X64Reg dest, OpArg arg);
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void PADDSB(X64Reg dest, OpArg arg);
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void PADDSW(X64Reg dest, OpArg arg);
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void PADDUSB(X64Reg dest, OpArg arg);
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void PADDUSW(X64Reg dest, OpArg arg);
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void PADDSB(X64Reg dest, OpArg arg);
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void PADDSW(X64Reg dest, OpArg arg);
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void PADDUSB(X64Reg dest, OpArg arg);
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void PADDUSW(X64Reg dest, OpArg arg);
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void PSUBB(X64Reg dest, OpArg arg);
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void PSUBW(X64Reg dest, OpArg arg);
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void PSUBD(X64Reg dest, OpArg arg);
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void PSUBQ(X64Reg dest, OpArg arg);
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void PSUBB(X64Reg dest, OpArg arg);
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void PSUBW(X64Reg dest, OpArg arg);
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void PSUBD(X64Reg dest, OpArg arg);
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void PSUBQ(X64Reg dest, OpArg arg);
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void PSUBSB(X64Reg dest, OpArg arg);
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void PSUBSW(X64Reg dest, OpArg arg);
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void PSUBUSB(X64Reg dest, OpArg arg);
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void PSUBUSW(X64Reg dest, OpArg arg);
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void PSUBSB(X64Reg dest, OpArg arg);
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void PSUBSW(X64Reg dest, OpArg arg);
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void PSUBUSB(X64Reg dest, OpArg arg);
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void PSUBUSW(X64Reg dest, OpArg arg);
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void PAVGB(X64Reg dest, OpArg arg);
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void PAVGW(X64Reg dest, OpArg arg);
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void PAVGB(X64Reg dest, OpArg arg);
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void PAVGW(X64Reg dest, OpArg arg);
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void PCMPEQB(X64Reg dest, OpArg arg);
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void PCMPEQW(X64Reg dest, OpArg arg);
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void PCMPEQD(X64Reg dest, OpArg arg);
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void PCMPEQB(X64Reg dest, OpArg arg);
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void PCMPEQW(X64Reg dest, OpArg arg);
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void PCMPEQD(X64Reg dest, OpArg arg);
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void PCMPGTB(X64Reg dest, OpArg arg);
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void PCMPGTW(X64Reg dest, OpArg arg);
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void PCMPGTD(X64Reg dest, OpArg arg);
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void PCMPGTB(X64Reg dest, OpArg arg);
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void PCMPGTW(X64Reg dest, OpArg arg);
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void PCMPGTD(X64Reg dest, OpArg arg);
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void PEXTRW(X64Reg dest, OpArg arg, u8 subreg);
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void PINSRW(X64Reg dest, OpArg arg, u8 subreg);
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void PMADDWD(X64Reg dest, OpArg arg);
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void PSADBW(X64Reg dest, OpArg arg);
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void PMADDWD(X64Reg dest, OpArg arg);
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void PSADBW(X64Reg dest, OpArg arg);
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void PMAXSW(X64Reg dest, OpArg arg);
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void PMAXUB(X64Reg dest, OpArg arg);
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void PMINSW(X64Reg dest, OpArg arg);
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void PMINUB(X64Reg dest, OpArg arg);
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void PMAXSW(X64Reg dest, OpArg arg);
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void PMAXUB(X64Reg dest, OpArg arg);
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void PMINSW(X64Reg dest, OpArg arg);
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void PMINUB(X64Reg dest, OpArg arg);
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void PMOVMSKB(X64Reg dest, OpArg arg);
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void PSHUFB(X64Reg dest, OpArg arg);
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@ -625,7 +625,7 @@ public:
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void ABI_CallFunctionC16(void *func, u16 param1);
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void ABI_CallFunctionCC16(void *func, u32 param1, u16 param2);
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// These only support u32 parameters, but that's enough for a lot of uses.
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// These will destroy the 1 or 2 first "parameter regs".
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void ABI_CallFunctionC(void *func, u32 param1);
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@ -666,12 +666,12 @@ public:
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void CallCdeclFunction5(void* fnptr, u32 arg0, u32 arg1, u32 arg2, u32 arg3, u32 arg4);
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void CallCdeclFunction6(void* fnptr, u32 arg0, u32 arg1, u32 arg2, u32 arg3, u32 arg4, u32 arg5);
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#if defined(_M_IX86)
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#if defined(_M_IX86)
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#define CallCdeclFunction3_I(a,b,c,d) CallCdeclFunction3((void *)(a), (b), (c), (d))
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#define CallCdeclFunction4_I(a,b,c,d,e) CallCdeclFunction4((void *)(a), (b), (c), (d), (e))
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#define CallCdeclFunction5_I(a,b,c,d,e,f) CallCdeclFunction5((void *)(a), (b), (c), (d), (e), (f))
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#define CallCdeclFunction6_I(a,b,c,d,e,f,g) CallCdeclFunction6((void *)(a), (b), (c), (d), (e), (f), (g))
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#define CallCdeclFunction4_I(a,b,c,d,e) CallCdeclFunction4((void *)(a), (b), (c), (d), (e))
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#define CallCdeclFunction5_I(a,b,c,d,e,f) CallCdeclFunction5((void *)(a), (b), (c), (d), (e), (f))
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#define CallCdeclFunction6_I(a,b,c,d,e,f,g) CallCdeclFunction6((void *)(a), (b), (c), (d), (e), (f), (g))
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#define DECLARE_IMPORT(x)
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@ -722,7 +722,7 @@ public:
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// Always clear code space with breakpoints, so that if someone accidentally executes
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// uninitialized, it just breaks into the debugger.
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void ClearCodeSpace()
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void ClearCodeSpace()
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{
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// x86/64: 0xCC = breakpoint
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memset(region, 0xCC, region_size);
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