mirror of
https://github.com/dolphin-emu/dolphin.git
synced 2025-08-07 00:28:56 +00:00
Delay singlecore gpu interrupts
Fixes Bomberman Jetters in single core mode. When single core mode pauses the CPU to execute the GPU FIFO it greedily executes the whole thing. Before this commit, Finish and Token interrupts would happen instantly, not even taking into account how long the current FIFO window has taken to execute. The interrupts would be effectively backdated to the start of this execution window. This commit does two things: It pipes the current FIFO window execution time though to the interrupt scheduling and it enforces a minimum delay of 500 cycles before an interrupt will be fired.
This commit is contained in:
parent
0b81640dd1
commit
f5c550e9cb
5 changed files with 29 additions and 22 deletions
|
@ -50,7 +50,7 @@ void BPInit()
|
|||
bpmem.bpMask = 0xFFFFFF;
|
||||
}
|
||||
|
||||
static void BPWritten(const BPCmd& bp)
|
||||
static void BPWritten(const BPCmd& bp, int cycles_into_future)
|
||||
{
|
||||
/*
|
||||
----------------------------------------------------------------------------------------------------------------
|
||||
|
@ -180,7 +180,7 @@ static void BPWritten(const BPCmd& bp)
|
|||
g_texture_cache->FlushEFBCopies();
|
||||
g_framebuffer_manager->InvalidatePeekCache(false);
|
||||
if (!Fifo::UseDeterministicGPUThread())
|
||||
PixelEngine::SetFinish(); // may generate interrupt
|
||||
PixelEngine::SetFinish(cycles_into_future); // may generate interrupt
|
||||
DEBUG_LOG_FMT(VIDEO, "GXSetDrawDone SetPEFinish (value: {:#04X})", bp.newvalue & 0xFFFF);
|
||||
return;
|
||||
|
||||
|
@ -193,14 +193,14 @@ static void BPWritten(const BPCmd& bp)
|
|||
g_texture_cache->FlushEFBCopies();
|
||||
g_framebuffer_manager->InvalidatePeekCache(false);
|
||||
if (!Fifo::UseDeterministicGPUThread())
|
||||
PixelEngine::SetToken(static_cast<u16>(bp.newvalue & 0xFFFF), false);
|
||||
PixelEngine::SetToken(static_cast<u16>(bp.newvalue & 0xFFFF), false, cycles_into_future);
|
||||
DEBUG_LOG_FMT(VIDEO, "SetPEToken {:#06X}", bp.newvalue & 0xFFFF);
|
||||
return;
|
||||
case BPMEM_PE_TOKEN_INT_ID: // Pixel Engine Interrupt Token ID
|
||||
g_texture_cache->FlushEFBCopies();
|
||||
g_framebuffer_manager->InvalidatePeekCache(false);
|
||||
if (!Fifo::UseDeterministicGPUThread())
|
||||
PixelEngine::SetToken(static_cast<u16>(bp.newvalue & 0xFFFF), true);
|
||||
PixelEngine::SetToken(static_cast<u16>(bp.newvalue & 0xFFFF), true, cycles_into_future);
|
||||
DEBUG_LOG_FMT(VIDEO, "SetPEToken + INT {:#06X}", bp.newvalue & 0xFFFF);
|
||||
return;
|
||||
|
||||
|
@ -717,7 +717,7 @@ static void BPWritten(const BPCmd& bp)
|
|||
}
|
||||
|
||||
// Call browser: OpcodeDecoding.cpp ExecuteDisplayList > Decode() > LoadBPReg()
|
||||
void LoadBPReg(u32 value0)
|
||||
void LoadBPReg(u32 value0, int cycles_into_future)
|
||||
{
|
||||
int regNum = value0 >> 24;
|
||||
int oldval = ((u32*)&bpmem)[regNum];
|
||||
|
@ -730,10 +730,10 @@ void LoadBPReg(u32 value0)
|
|||
if (regNum != BPMEM_BP_MASK)
|
||||
bpmem.bpMask = 0xFFFFFF;
|
||||
|
||||
BPWritten(bp);
|
||||
BPWritten(bp, cycles_into_future);
|
||||
}
|
||||
|
||||
void LoadBPRegPreprocess(u32 value0)
|
||||
void LoadBPRegPreprocess(u32 value0, int cycles_into_future)
|
||||
{
|
||||
int regNum = value0 >> 24;
|
||||
// masking could hypothetically be a problem
|
||||
|
@ -742,13 +742,13 @@ void LoadBPRegPreprocess(u32 value0)
|
|||
{
|
||||
case BPMEM_SETDRAWDONE:
|
||||
if ((newval & 0xff) == 0x02)
|
||||
PixelEngine::SetFinish();
|
||||
PixelEngine::SetFinish(cycles_into_future);
|
||||
break;
|
||||
case BPMEM_PE_TOKEN_ID:
|
||||
PixelEngine::SetToken(newval & 0xffff, false);
|
||||
PixelEngine::SetToken(newval & 0xffff, false, cycles_into_future);
|
||||
break;
|
||||
case BPMEM_PE_TOKEN_INT_ID: // Pixel Engine Interrupt Token ID
|
||||
PixelEngine::SetToken(newval & 0xffff, true);
|
||||
PixelEngine::SetToken(newval & 0xffff, true, cycles_into_future);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue