From 820e6d5a6ea543cc8c1712b704363906740a8652 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sat, 10 Jun 2023 23:48:45 +0300 Subject: [PATCH 001/308] bdk: update cal0 struct --- bdk/storage/nx_emmc_bis.h | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/bdk/storage/nx_emmc_bis.h b/bdk/storage/nx_emmc_bis.h index 8b07008..7cdacfc 100644 --- a/bdk/storage/nx_emmc_bis.h +++ b/bdk/storage/nx_emmc_bis.h @@ -85,13 +85,13 @@ typedef struct _nx_emmc_cal0_t u8 bd_mac[6]; u8 crc16_pad4[2]; u8 rsvd2[8]; - u8 acc_offset[6]; + u16 acc_offset[3]; u8 crc16_pad5[2]; - u8 acc_scale[6]; + u16 acc_scale[3]; u8 crc16_pad6[2]; - u8 gyro_offset[6]; + u16 gyro_offset[3]; u8 crc16_pad7[2]; - u8 gyro_scale[6]; + u16 gyro_scale[3]; u8 crc16_pad8[2]; char serial_number[0x18]; u8 crc16_pad9[8]; @@ -213,11 +213,15 @@ typedef struct _nx_emmc_cal0_t // 6.0.0 and up. u8 battery_ver; - u8 crc16_pad58[0x1F]; + u8 crc16_pad58[0xF]; + + // 10.0.0 and up. + u8 touch_ic_vendor_id; + u8 crc16_pad59[0xF]; // 9.0.0 and up. - u32 home_menu_scheme_model; - u8 crc16_pad59[0xC]; + u32 color_model; + u8 crc16_pad60[0xC]; // 10.0.0 and up. u8 console_6axis_sensor_mount_type; From d7ad9b874bcc35a6fcd804a321e27208cc7581df Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 11 Jun 2023 13:27:48 +0300 Subject: [PATCH 002/308] bdk: use the typedefs on jc calib --- bdk/input/joycon.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/bdk/input/joycon.h b/bdk/input/joycon.h index cc1b19f..af0a849 100644 --- a/bdk/input/joycon.h +++ b/bdk/input/joycon.h @@ -92,12 +92,12 @@ typedef struct _jc_gamepad_rpt_t typedef struct _jc_calib_t { - unsigned short x_max:12; - unsigned short y_max:12; - unsigned short x_center:12; - unsigned short y_center:12; - unsigned short x_min:12; - unsigned short y_min:12; + u16 x_max:12; + u16 y_max:12; + u16 x_center:12; + u16 y_center:12; + u16 x_min:12; + u16 y_min:12; } __attribute__((packed)) jc_calib_t; void jc_init_hw(); From 6e954f5cdff2e73d68ff2c9b463197c99544b387 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 11 Jun 2023 13:29:04 +0300 Subject: [PATCH 003/308] nyx: provide the raw calib for Lite gamepad Let L4T driver manage it. --- nyx/nyx_gui/frontend/gui_options.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_options.c b/nyx/nyx_gui/frontend/gui_options.c index 5ac2667..0c46722 100644 --- a/nyx/nyx_gui/frontend/gui_options.c +++ b/nyx/nyx_gui/frontend/gui_options.c @@ -933,22 +933,22 @@ save_data: f_mkdir("switchroot"); - //! TODO: Add Accelerometer and Gyroscope calibration. // Save Lite Gamepad Calibration data. + // Actual max/min are right/left and up/down offsets. s_printf(data, - "lite_cal_lx_min=0x%X\n" + "lite_cal_lx_lof=0x%X\n" "lite_cal_lx_cnt=0x%X\n" - "lite_cal_lx_max=0x%X\n" - "lite_cal_ly_min=0x%X\n" + "lite_cal_lx_rof=0x%X\n" + "lite_cal_ly_dof=0x%X\n" "lite_cal_ly_cnt=0x%X\n" - "lite_cal_ly_max=0x%X\n\n" + "lite_cal_ly_uof=0x%X\n\n" - "lite_cal_rx_min=0x%X\n" + "lite_cal_rx_lof=0x%X\n" "lite_cal_rx_cnt=0x%X\n" - "lite_cal_rx_max=0x%X\n" - "lite_cal_ry_min=0x%X\n" + "lite_cal_rx_rof=0x%X\n" + "lite_cal_ry_dof=0x%X\n" "lite_cal_ry_cnt=0x%X\n" - "lite_cal_ry_max=0x%X\n\n" + "lite_cal_ry_uof=0x%X\n\n" "acc_cal_off_x=0x%X\n" "acc_cal_off_y=0x%X\n" @@ -965,10 +965,10 @@ save_data: "gyr_cal_scl_z=0x%X\n\n" "device_bt_mac=%02X:%02X:%02X:%02X:%02X:%02X\n", - stick_cal_l->x_center - stick_cal_l->x_min, stick_cal_l->x_center, stick_cal_l->x_center + stick_cal_l->x_max, - stick_cal_l->y_center - stick_cal_l->y_min, stick_cal_l->y_center, stick_cal_l->y_center + stick_cal_l->y_max, - stick_cal_r->x_center - stick_cal_r->x_min, stick_cal_r->x_center, stick_cal_r->x_center + stick_cal_r->x_max, - stick_cal_r->y_center - stick_cal_r->y_min, stick_cal_r->y_center, stick_cal_r->y_center + stick_cal_r->y_max, + stick_cal_l->x_min, stick_cal_l->x_center, stick_cal_l->x_max, + stick_cal_l->y_min, stick_cal_l->y_center, stick_cal_l->y_max, + stick_cal_r->x_min, stick_cal_r->x_center, stick_cal_r->x_max, + stick_cal_r->y_min, stick_cal_r->y_center, stick_cal_r->y_max, cal0->acc_offset[0], cal0->acc_offset[1], cal0->acc_offset[2], cal0->acc_scale[0], cal0->acc_scale[1], cal0->acc_scale[2], cal0->gyro_offset[0], cal0->gyro_offset[1], cal0->gyro_offset[2], From b9bc35a22e558228b15c305eec0ef94d1823d608 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 21 Jul 2023 18:39:46 +0300 Subject: [PATCH 004/308] bdk: dram: correct old comments --- bdk/mem/sdram_config.inl | 12 ++++++------ bdk/mem/sdram_config_t210b01.inl | 4 ++-- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/bdk/mem/sdram_config.inl b/bdk/mem/sdram_config.inl index 18fb456..1d107ff 100644 --- a/bdk/mem/sdram_config.inl +++ b/bdk/mem/sdram_config.inl @@ -489,8 +489,8 @@ static const sdram_params_t210_t _dram_cfg_0_samsung_4gb = { /* DRAM size information */ .mc_emem_adr_cfg = 0x00000001, // 2 Ranks. - .mc_emem_adr_cfg_dev0 = 0x00070302, // Rank 0 Density 512MB. - .mc_emem_adr_cfg_dev1 = 0x00070302, // Rank 1 Density 512MB. + .mc_emem_adr_cfg_dev0 = 0x00070302, // Chip 0 Density 512MB. + .mc_emem_adr_cfg_dev1 = 0x00070302, // Chip 1 Density 512MB. .mc_emem_adr_cfg_channel_mask = 0xFFFF2400, .mc_emem_adr_cfg_bank_mask0 = 0x6E574400, .mc_emem_adr_cfg_bank_mask1 = 0x39722800, @@ -655,8 +655,8 @@ static const sdram_vendor_patch_t sdram_cfg_vendor_patches_t210[] = { { 0x00000005, 0x5C0 / 4, DRAM_ID(1) }, // mc_emem_arb_timing_r2w. // Samsung 6GB density config. - { 0x000C0302, 0x56C / 4, DRAM_ID(4) }, // mc_emem_adr_cfg_dev0. 768MB Rank 0 density. - { 0x000C0302, 0x570 / 4, DRAM_ID(4) }, // mc_emem_adr_cfg_dev1. 768MB Rank 1 density. + { 0x000C0302, 0x56C / 4, DRAM_ID(4) }, // mc_emem_adr_cfg_dev0. 768MB Chip 0 density. + { 0x000C0302, 0x570 / 4, DRAM_ID(4) }, // mc_emem_adr_cfg_dev1. 768MB Chip 1 density. { 0x00001800, 0x584 / 4, DRAM_ID(4) }, // mc_emem_cfg. 6GB total density. // Samsung 8GB density config. @@ -665,7 +665,7 @@ static const sdram_vendor_patch_t sdram_cfg_vendor_patches_t210[] = { { 0x0000003B, 0x1C0 / 4, DRAM_ID(7) }, // emc_txsr. { 0x0000003B, 0x1C4 / 4, DRAM_ID(7) }, // emc_txsr_dll. { 0x00000713, 0x2B4 / 4, DRAM_ID(7) }, // emc_dyn_self_ref_control. - { 0x00080302, 0x56C / 4, DRAM_ID(7) }, // mc_emem_adr_cfg_dev0. 1024MB Rank 0 density. - { 0x00080302, 0x570 / 4, DRAM_ID(7) }, // mc_emem_adr_cfg_dev1. 1024MB Rank 1 density. + { 0x00080302, 0x56C / 4, DRAM_ID(7) }, // mc_emem_adr_cfg_dev0. 1024MB Chip 0 density. + { 0x00080302, 0x570 / 4, DRAM_ID(7) }, // mc_emem_adr_cfg_dev1. 1024MB Chip 1 density. { 0x00002000, 0x584 / 4, DRAM_ID(7) }, // mc_emem_cfg. 8GB total density. }; diff --git a/bdk/mem/sdram_config_t210b01.inl b/bdk/mem/sdram_config_t210b01.inl index 435f746..1fed1f8 100644 --- a/bdk/mem/sdram_config_t210b01.inl +++ b/bdk/mem/sdram_config_t210b01.inl @@ -542,8 +542,8 @@ static const sdram_params_t210b01_t _dram_cfg_08_10_12_14_samsung_hynix_4gb = { /* DRAM size information */ .mc_emem_adr_cfg = 0x00000000, // 1 Rank. - .mc_emem_adr_cfg_dev0 = 0x00080302, // Rank 0 Density 1024MB. - .mc_emem_adr_cfg_dev1 = 0x00080302, // Rank 1 Density 1024MB. + .mc_emem_adr_cfg_dev0 = 0x00080302, // Chip 0 Density 1024MB. + .mc_emem_adr_cfg_dev1 = 0x00080302, // Chip 1 Density 1024MB. .mc_emem_adr_cfg_channel_mask = 0xFFFF2400, .mc_emem_adr_cfg_bank_mask0 = 0x6E574400, .mc_emem_adr_cfg_bank_mask1 = 0x39722800, From 9187fa7a8cb0b1ad2e45fac775f2ab88935f781f Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sat, 22 Jul 2023 07:10:12 +0300 Subject: [PATCH 005/308] bdk: fuse: add all t210b01 fuses And use B01 to distinguish the ones only on that SoC. --- bdk/power/max7762x.c | 2 +- bdk/soc/fuse.c | 12 +- bdk/soc/fuse.h | 285 +++++++++++++++++++++++++++++++++++-------- 3 files changed, 240 insertions(+), 59 deletions(-) diff --git a/bdk/power/max7762x.c b/bdk/power/max7762x.c index 9431953..c5189fa 100644 --- a/bdk/power/max7762x.c +++ b/bdk/power/max7762x.c @@ -103,7 +103,7 @@ static u8 _max77812_get_address() return max77812_i2c_addr; max77812_i2c_addr = - !(FUSE(FUSE_RESERVED_ODM28_T210B01) & 1) ? MAX77812_PHASE31_CPU_I2C_ADDR : MAX77812_PHASE211_CPU_I2C_ADDR; + !(FUSE(FUSE_RESERVED_ODM28_B01) & 1) ? MAX77812_PHASE31_CPU_I2C_ADDR : MAX77812_PHASE211_CPU_I2C_ADDR; return max77812_i2c_addr; } diff --git a/bdk/soc/fuse.c b/bdk/soc/fuse.c index 9feca59..85d8bee 100644 --- a/bdk/soc/fuse.c +++ b/bdk/soc/fuse.c @@ -2,7 +2,7 @@ * Copyright (c) 2018 naehrwert * Copyright (c) 2018 shuffle2 * Copyright (c) 2018 balika011 - * Copyright (c) 2019-2022 CTCaer + * Copyright (c) 2019-2023 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -186,7 +186,7 @@ u32 fuse_read(u32 addr) void fuse_read_array(u32 *words) { u32 array_size = (hw_get_chip_id() == GP_HIDREV_MAJOR_T210B01) ? - FUSE_ARRAY_WORDS_NUM_T210B01 : FUSE_ARRAY_WORDS_NUM; + FUSE_ARRAY_WORDS_NUM_B01 : FUSE_ARRAY_WORDS_NUM; for (u32 i = 0; i < array_size; i++) words[i] = fuse_read(i); @@ -325,9 +325,9 @@ int fuse_read_ipatch(void (*ipatch)(u32 offset, u32 value)) // Parse extra T210B01 fuses when the difference is reached. if (hw_get_chip_id() == GP_HIDREV_MAJOR_T210B01 && word_addr == ((FUSE_ARRAY_WORDS_NUM - 1) - - (FUSE_ARRAY_WORDS_NUM_T210B01 - FUSE_ARRAY_WORDS_NUM) / sizeof(u32))) + (FUSE_ARRAY_WORDS_NUM_B01 - FUSE_ARRAY_WORDS_NUM) / sizeof(u32))) { - word_addr = FUSE_ARRAY_WORDS_NUM_T210B01 - 1; + word_addr = FUSE_ARRAY_WORDS_NUM_B01 - 1; } } @@ -395,9 +395,9 @@ int fuse_read_evp_thunk(u32 *iram_evp_thunks, u32 *iram_evp_thunks_len) // Parse extra T210B01 fuses when the difference is reached. if (hw_get_chip_id() == GP_HIDREV_MAJOR_T210B01 && word_addr == ((FUSE_ARRAY_WORDS_NUM - 1) - - (FUSE_ARRAY_WORDS_NUM_T210B01 - FUSE_ARRAY_WORDS_NUM) / sizeof(u32))) + (FUSE_ARRAY_WORDS_NUM_B01 - FUSE_ARRAY_WORDS_NUM) / sizeof(u32))) { - word_addr = FUSE_ARRAY_WORDS_NUM_T210B01 - 1; + word_addr = FUSE_ARRAY_WORDS_NUM_B01 - 1; } } diff --git a/bdk/soc/fuse.h b/bdk/soc/fuse.h index 1b2f043..1a53a2c 100644 --- a/bdk/soc/fuse.h +++ b/bdk/soc/fuse.h @@ -2,7 +2,7 @@ * Copyright (c) 2018 naehrwert * Copyright (c) 2018 shuffle2 * Copyright (c) 2018 balika011 - * Copyright (c) 2019-2022 CTCaer + * Copyright (c) 2019-2023 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -23,67 +23,248 @@ #include /*! Fuse registers. */ -#define FUSE_CTRL 0x0 -#define FUSE_ADDR 0x4 -#define FUSE_RDATA 0x8 -#define FUSE_WDATA 0xC -#define FUSE_TIME_RD1 0x10 -#define FUSE_TIME_RD2 0x14 -#define FUSE_TIME_PGM1 0x18 -#define FUSE_TIME_PGM2 0x1C -#define FUSE_PRIV2INTFC 0x20 -#define FUSE_FUSEBYPASS 0x24 -#define FUSE_PRIVATEKEYDISABLE 0x28 -#define FUSE_DISABLEREGPROGRAM 0x2C -#define FUSE_WRITE_ACCESS_SW 0x30 -#define FUSE_PWR_GOOD_SW 0x34 +#define FUSE_CTRL 0x0 +#define FUSE_ADDR 0x4 +#define FUSE_RDATA 0x8 +#define FUSE_WDATA 0xC +#define FUSE_TIME_RD1 0x10 +#define FUSE_TIME_RD2 0x14 +#define FUSE_TIME_PGM1 0x18 +#define FUSE_TIME_PGM2 0x1C +#define FUSE_PRIV2INTFC 0x20 +#define FUSE_FUSEBYPASS 0x24 +#define FUSE_PRIVATEKEYDISABLE 0x28 +#define FUSE_DISABLEREGPROGRAM 0x2C +#define FUSE_WRITE_ACCESS_SW 0x30 +#define FUSE_PWR_GOOD_SW 0x34 +#define FUSE_PRIV2RESHIFT 0x3C +#define FUSE_FUSETIME_RD0 0x40 +#define FUSE_FUSETIME_RD1 0x44 +#define FUSE_FUSETIME_RD2 0x48 +#define FUSE_FUSETIME_RD3 0x4C +#define FUSE_PRIVATE_KEY0_NONZERO 0x80 +#define FUSE_PRIVATE_KEY1_NONZERO 0x84 +#define FUSE_PRIVATE_KEY2_NONZERO 0x88 +#define FUSE_PRIVATE_KEY3_NONZERO 0x8C +#define FUSE_PRIVATE_KEY4_NONZERO 0x90 /*! Fuse Cached registers */ -#define FUSE_SKU_INFO 0x110 -#define FUSE_CPU_SPEEDO_0_CALIB 0x114 -#define FUSE_CPU_IDDQ_CALIB 0x118 -#define FUSE_OPT_FT_REV 0x128 -#define FUSE_CPU_SPEEDO_1_CALIB 0x12C -#define FUSE_CPU_SPEEDO_2_CALIB 0x130 -#define FUSE_SOC_SPEEDO_0_CALIB 0x134 -#define FUSE_SOC_SPEEDO_1_CALIB 0x138 -#define FUSE_SOC_SPEEDO_2_CALIB 0x13C -#define FUSE_SOC_IDDQ_CALIB 0x140 -#define FUSE_OPT_CP_REV 0x190 -#define FUSE_FIRST_BOOTROM_PATCH_SIZE 0x19c -#define FUSE_PRIVATE_KEY0 0x1A4 -#define FUSE_PRIVATE_KEY1 0x1A8 -#define FUSE_PRIVATE_KEY2 0x1AC -#define FUSE_PRIVATE_KEY3 0x1B0 -#define FUSE_PRIVATE_KEY4 0x1B4 -#define FUSE_RESERVED_SW 0x1C0 -#define FUSE_USB_CALIB 0x1F0 -#define FUSE_SKU_DIRECT_CONFIG 0x1F4 -#define FUSE_OPT_VENDOR_CODE 0x200 -#define FUSE_OPT_FAB_CODE 0x204 -#define FUSE_OPT_LOT_CODE_0 0x208 -#define FUSE_OPT_LOT_CODE_1 0x20C -#define FUSE_OPT_WAFER_ID 0x210 -#define FUSE_OPT_X_COORDINATE 0x214 -#define FUSE_OPT_Y_COORDINATE 0x218 -#define FUSE_OPT_OPS_RESERVED 0x220 -#define FUSE_GPU_IDDQ_CALIB 0x228 -#define FUSE_USB_CALIB_EXT 0x350 -#define FUSE_RESERVED_FIELD 0x354 +#define FUSE_RESERVED_ODM8_B01 0x98 +#define FUSE_RESERVED_ODM9_B01 0x9C +#define FUSE_RESERVED_ODM10_B01 0xA0 +#define FUSE_RESERVED_ODM11_B01 0xA4 +#define FUSE_RESERVED_ODM12_B01 0xA8 +#define FUSE_RESERVED_ODM13_B01 0xAC +#define FUSE_RESERVED_ODM14_B01 0xB0 +#define FUSE_RESERVED_ODM15_B01 0xB4 +#define FUSE_RESERVED_ODM16_B01 0xB8 +#define FUSE_RESERVED_ODM17_B01 0xBC +#define FUSE_RESERVED_ODM18_B01 0xC0 +#define FUSE_RESERVED_ODM19_B01 0xC4 +#define FUSE_RESERVED_ODM20_B01 0xC8 +#define FUSE_RESERVED_ODM21_B01 0xCC +#define FUSE_KEK00_B01 0xD0 +#define FUSE_KEK01_B01 0xD4 +#define FUSE_KEK02_B01 0xD8 +#define FUSE_KEK03_B01 0xDC +#define FUSE_BEK00_B01 0xE0 +#define FUSE_BEK01_B01 0xE4 +#define FUSE_BEK02_B01 0xE8 +#define FUSE_BEK03_B01 0xEC +#define FUSE_OPT_RAM_RTSEL_TSMCSP_PO4SVT_B01 0xF0 +#define FUSE_OPT_RAM_WTSEL_TSMCSP_PO4SVT_B01 0xF4 +#define FUSE_OPT_RAM_RTSEL_TSMCPDP_PO4SVT_B01 0xF8 +#define FUSE_OPT_RAM_MTSEL_TSMCPDP_PO4SVT_B01 0xFC -#define FUSE_RESERVED_ODM28_T210B01 0x240 +#define FUSE_PRODUCTION_MODE 0x100 +#define FUSE_JTAG_SECUREID_VALID 0x104 +#define FUSE_ODM_LOCK 0x108 +#define FUSE_OPT_OPENGL_EN 0x10C +#define FUSE_SKU_INFO 0x110 +#define FUSE_CPU_SPEEDO_0_CALIB 0x114 +#define FUSE_CPU_IDDQ_CALIB 0x118 + +#define FUSE_RESERVED_ODM22_B01 0x11C +#define FUSE_RESERVED_ODM23_B01 0x120 +#define FUSE_RESERVED_ODM24_B01 0x124 + +#define FUSE_OPT_FT_REV 0x128 +#define FUSE_CPU_SPEEDO_1_CALIB 0x12C +#define FUSE_CPU_SPEEDO_2_CALIB 0x130 +#define FUSE_SOC_SPEEDO_0_CALIB 0x134 +#define FUSE_SOC_SPEEDO_1_CALIB 0x138 +#define FUSE_SOC_SPEEDO_2_CALIB 0x13C +#define FUSE_SOC_IDDQ_CALIB 0x140 + +#define FUSE_RESERVED_ODM25_B01 0x144 + +#define FUSE_FA 0x148 +#define FUSE_RESERVED_PRODUCTION 0x14C +#define FUSE_HDMI_LANE0_CALIB 0x150 +#define FUSE_HDMI_LANE1_CALIB 0x154 +#define FUSE_HDMI_LANE2_CALIB 0x158 +#define FUSE_HDMI_LANE3_CALIB 0x15C +#define FUSE_ENCRYPTION_RATE 0x160 +#define FUSE_PUBLIC_KEY0 0x164 +#define FUSE_PUBLIC_KEY1 0x168 +#define FUSE_PUBLIC_KEY2 0x16C +#define FUSE_PUBLIC_KEY3 0x170 +#define FUSE_PUBLIC_KEY4 0x174 +#define FUSE_PUBLIC_KEY5 0x178 +#define FUSE_PUBLIC_KEY6 0x17C +#define FUSE_PUBLIC_KEY7 0x180 +#define FUSE_TSENSOR1_CALIB 0x184 +#define FUSE_TSENSOR2_CALIB 0x188 + +#define FUSE_OPT_SECURE_SCC_DIS_B01 0x18C + +#define FUSE_OPT_CP_REV 0x190 +#define FUSE_OPT_PFG 0x194 +#define FUSE_TSENSOR0_CALIB 0x198 +#define FUSE_FIRST_BOOTROM_PATCH_SIZE 0x19C +#define FUSE_SECURITY_MODE 0x1A0 +#define FUSE_PRIVATE_KEY0 0x1A4 +#define FUSE_PRIVATE_KEY1 0x1A8 +#define FUSE_PRIVATE_KEY2 0x1AC +#define FUSE_PRIVATE_KEY3 0x1B0 +#define FUSE_PRIVATE_KEY4 0x1B4 +#define FUSE_ARM_JTAG_DIS 0x1B8 +#define FUSE_BOOT_DEVICE_INFO 0x1BC +#define FUSE_RESERVED_SW 0x1C0 +#define FUSE_OPT_VP9_DISABLE 0x1C4 + +#define FUSE_RESERVED_ODM0 0x1C8 +#define FUSE_RESERVED_ODM1 0x1CC +#define FUSE_RESERVED_ODM2 0x1D0 +#define FUSE_RESERVED_ODM3 0x1D4 +#define FUSE_RESERVED_ODM4 0x1D8 +#define FUSE_RESERVED_ODM5 0x1DC +#define FUSE_RESERVED_ODM6 0x1E0 +#define FUSE_RESERVED_ODM7 0x1E4 + +#define FUSE_OBS_DIS 0x1E8 + +#define FUSE_OPT_NVJTAG_PROTECTION_ENABLE_B01 0x1EC + +#define FUSE_USB_CALIB 0x1F0 +#define FUSE_SKU_DIRECT_CONFIG 0x1F4 +#define FUSE_KFUSE_PRIVKEY_CTRL 0x1F8 +#define FUSE_PACKAGE_INFO 0x1FC +#define FUSE_OPT_VENDOR_CODE 0x200 +#define FUSE_OPT_FAB_CODE 0x204 +#define FUSE_OPT_LOT_CODE_0 0x208 +#define FUSE_OPT_LOT_CODE_1 0x20C +#define FUSE_OPT_WAFER_ID 0x210 +#define FUSE_OPT_X_COORDINATE 0x214 +#define FUSE_OPT_Y_COORDINATE 0x218 +#define FUSE_OPT_SEC_DEBUG_EN 0x21C +#define FUSE_OPT_OPS_RESERVED 0x220 +#define FUSE_SATA_CALIB 0x224 + +#define FUSE_SPARE_REGISTER_ODM_B01 0x224 + +#define FUSE_GPU_IDDQ_CALIB 0x228 +#define FUSE_TSENSOR3_CALIB 0x22C +#define FUSE_CLOCK_BONDOUT0 0x230 +#define FUSE_CLOCK_BONDOUT1 0x234 + +#define FUSE_RESERVED_ODM26_B01 0x238 +#define FUSE_RESERVED_ODM27_B01 0x23C +#define FUSE_RESERVED_ODM28_B01 0x240 + +#define FUSE_OPT_SAMPLE_TYPE 0x244 +#define FUSE_OPT_SUBREVISION 0x248 +#define FUSE_OPT_SW_RESERVED_0 0x24C +#define FUSE_OPT_SW_RESERVED_1 0x250 +#define FUSE_TSENSOR4_CALIB 0x254 +#define FUSE_TSENSOR5_CALIB 0x258 +#define FUSE_TSENSOR6_CALIB 0x25C +#define FUSE_TSENSOR7_CALIB 0x260 +#define FUSE_OPT_PRIV_SEC_DIS 0x264 +#define FUSE_PKC_DISABLE 0x268 + +#define FUSE_BOOT_SECURITY_INFO_B01 0x268 +#define FUSE_OPT_RAM_RTSEL_TSMCSP_PO4HVT_B01 0x26C +#define FUSE_OPT_RAM_WTSEL_TSMCSP_PO4HVT_B01 0x270 +#define FUSE_OPT_RAM_RTSEL_TSMCPDP_PO4HVT_B01 0x274 +#define FUSE_OPT_RAM_MTSEL_TSMCPDP_PO4HVT_B01 0x278 + +#define FUSE_FUSE2TSEC_DEBUG_DISABLE 0x27C +#define FUSE_TSENSOR_COMMON 0x280 +#define FUSE_OPT_CP_BIN 0x284 +#define FUSE_OPT_GPU_DISABLE 0x288 +#define FUSE_OPT_FT_BIN 0x28C +#define FUSE_OPT_DONE_MAP 0x290 + +#define FUSE_RESERVED_ODM29_B01 0x294 + +#define FUSE_APB2JTAG_DISABLE 0x298 +#define FUSE_ODM_INFO 0x29C +#define FUSE_ARM_CRYPT_DE_FEATURE 0x2A8 + +#define FUSE_OPT_RAM_WTSEL_TSMCPDP_PO4SVT_B01 0x2B0 +#define FUSE_OPT_RAM_RCT_TSMCDP_PO4SVT_B01 0x2B4 +#define FUSE_OPT_RAM_WCT_TSMCDP_PO4SVT_B01 0x2B8 +#define FUSE_OPT_RAM_KP_TSMCDP_PO4SVT_B01 0x2BC + +#define FUSE_WOA_SKU_FLAG 0x2C0 +#define FUSE_ECO_RESERVE_1 0x2C4 +#define FUSE_GCPLEX_CONFIG_FUSE 0x2C8 +#define FUSE_PRODUCTION_MONTH 0x2CC +#define FUSE_RAM_REPAIR_INDICATOR 0x2D0 +#define FUSE_TSENSOR9_CALIB 0x2D4 +#define FUSE_VMIN_CALIBRATION 0x2DC +#define FUSE_AGING_SENSOR_CALIBRATION 0x2E0 +#define FUSE_DEBUG_AUTHENTICATION 0x2E4 +#define FUSE_SECURE_PROVISION_INDEX 0x2E8 +#define FUSE_SECURE_PROVISION_INFO 0x2EC +#define FUSE_OPT_GPU_DISABLE_CP1 0x2F0 +#define FUSE_SPARE_ENDIS 0x2F4 +#define FUSE_ECO_RESERVE_0 0x2F8 +#define FUSE_RESERVED_CALIB0 0x304 +#define FUSE_RESERVED_CALIB1 0x308 +#define FUSE_OPT_GPU_TPC0_DISABLE 0x30C +#define FUSE_OPT_GPU_TPC0_DISABLE_CP1 0x310 +#define FUSE_OPT_CPU_DISABLE 0x314 +#define FUSE_OPT_CPU_DISABLE_CP1 0x318 +#define FUSE_TSENSOR10_CALIB 0x31C +#define FUSE_TSENSOR10_CALIB_AUX 0x320 +#define FUSE_OPT_RAM_SVOP_DP 0x324 +#define FUSE_OPT_RAM_SVOP_PDP 0x328 +#define FUSE_OPT_RAM_SVOP_REG 0x32C +#define FUSE_OPT_RAM_SVOP_SP 0x330 +#define FUSE_OPT_RAM_SVOP_SMPDP 0x334 + +#define FUSE_OPT_RAM_WTSEL_TSMCPDP_PO4HVT_B01 0x324 +#define FUSE_OPT_RAM_RCT_TSMCDP_PO4HVT_B01 0x328 +#define FUSE_OPT_RAM_WCT_TSMCDP_PO4HVT_B01 0x32c +#define FUSE_OPT_RAM_KP_TSMCDP_PO4HVT_B01 0x330 +#define FUSE_OPT_ROM_SVOP_SP_B01 0x334 + +#define FUSE_OPT_GPU_TPC0_DISABLE_CP2 0x338 +#define FUSE_OPT_GPU_TPC1_DISABLE 0x33C +#define FUSE_OPT_GPU_TPC1_DISABLE_CP1 0x340 +#define FUSE_OPT_GPU_TPC1_DISABLE_CP2 0x344 +#define FUSE_OPT_CPU_DISABLE_CP2 0x348 +#define FUSE_OPT_GPU_DISABLE_CP2 0x34C +#define FUSE_USB_CALIB_EXT 0x350 +#define FUSE_RESERVED_FIELD 0x354 +#define FUSE_SPARE_REALIGNMENT_REG 0x37C +#define FUSE_SPARE_BIT_0 0x380 +//... +#define FUSE_SPARE_BIT_31 0x3FC /*! Fuse commands. */ -#define FUSE_READ 0x1 -#define FUSE_WRITE 0x2 -#define FUSE_SENSE 0x3 +#define FUSE_READ 0x1 +#define FUSE_WRITE 0x2 +#define FUSE_SENSE 0x3 #define FUSE_CMD_MASK 0x3 /*! Fuse cache registers. */ #define FUSE_RESERVED_ODMX(x) (0x1C8 + 4 * (x)) -#define FUSE_ARRAY_WORDS_NUM 192 -#define FUSE_ARRAY_WORDS_NUM_T210B01 256 +#define FUSE_ARRAY_WORDS_NUM 192 +#define FUSE_ARRAY_WORDS_NUM_B01 256 enum { From d3567736c8f08ddff19d1b371ff878cfb2531e07 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 28 Jul 2023 03:06:20 +0300 Subject: [PATCH 006/308] hos: allow overriding uCID --- bootloader/hos/hos.c | 4 ++-- bootloader/hos/hos.h | 6 ++++-- bootloader/hos/hos_config.c | 41 ++++++++++++++++++++++--------------- 3 files changed, 31 insertions(+), 20 deletions(-) diff --git a/bootloader/hos/hos.c b/bootloader/hos/hos.c index 695c570..ea29417 100644 --- a/bootloader/hos/hos.c +++ b/bootloader/hos/hos.c @@ -1156,8 +1156,8 @@ int hos_launch(ini_sec_t *cfg) // Disable display. This must be executed before secmon to provide support for all fw versions. display_end(); - // Clear EMC_SCRATCH0. - EMC(EMC_SCRATCH0) = 0; + // Override uCID if set. + EMC(EMC_SCRATCH0) = ctxt.ucid; // Hold USBD, USB2, AHBDMA and APBDMA in reset for SoC state validation on sleep. CLOCK(CLK_RST_CONTROLLER_RST_DEV_L_SET) = BIT(CLK_L_USBD); diff --git a/bootloader/hos/hos.h b/bootloader/hos/hos.h index ed757c1..0a73dd1 100644 --- a/bootloader/hos/hos.h +++ b/bootloader/hos/hos.h @@ -94,8 +94,8 @@ typedef struct _launch_ctxt_t u32 pkg2_size; bool new_pkg2; - void *kernel; - u32 kernel_size; + void *kernel; + u32 kernel_size; link_t kip1_list; char* kip1_patches; @@ -109,6 +109,8 @@ typedef struct _launch_ctxt_t u32 fss0_hosver; bool atmosphere; + int ucid; + exo_ctxt_t exo_ctx; ini_sec_t *cfg; diff --git a/bootloader/hos/hos_config.c b/bootloader/hos/hos_config.c index 1311e94..b014c0b 100644 --- a/bootloader/hos/hos_config.c +++ b/bootloader/hos/hos_config.c @@ -271,6 +271,14 @@ static int _config_exo_fatal_payload(launch_ctxt_t *ctxt, const char *value) return 1; } +static int _config_ucid(launch_ctxt_t *ctxt, const char *value) +{ + // Override uCID if set. + ctxt->ucid = atoi(value); + + return 1; +} + typedef struct _cfg_handler_t { const char *key; @@ -278,23 +286,24 @@ typedef struct _cfg_handler_t } cfg_handler_t; static const cfg_handler_t _config_handlers[] = { - { "warmboot", _config_warmboot }, - { "secmon", _config_secmon }, - { "kernel", _config_kernel }, - { "kip1", _config_kip1 }, - { "kip1patch", config_kip1patch }, - { "fullsvcperm", _config_svcperm }, - { "debugmode", _config_debugmode }, - { "stock", _config_stock }, - { "atmosphere", _config_atmosphere }, - { "fss0", _config_fss }, - { "exofatal", _config_exo_fatal_payload}, - { "emummcforce", _config_emummc_forced }, + { "warmboot", _config_warmboot }, + { "secmon", _config_secmon }, + { "kernel", _config_kernel }, + { "kip1", _config_kip1 }, + { "kip1patch", config_kip1patch }, + { "fullsvcperm", _config_svcperm }, + { "debugmode", _config_debugmode }, + { "stock", _config_stock }, + { "atmosphere", _config_atmosphere }, + { "fss0", _config_fss }, + { "exofatal", _config_exo_fatal_payload}, + { "emummcforce", _config_emummc_forced }, { "nouserexceptions", _config_dis_exo_user_exceptions }, - { "userpmu", _config_exo_user_pmu_access }, - { "usb3force", _config_exo_usb3_force }, - { "cal0blank", _config_exo_cal0_blanking }, - { "cal0writesys", _config_exo_cal0_writes_enable }, + { "userpmu", _config_exo_user_pmu_access }, + { "usb3force", _config_exo_usb3_force }, + { "cal0blank", _config_exo_cal0_blanking }, + { "cal0writesys", _config_exo_cal0_writes_enable }, + { "ucid", _config_ucid }, { NULL, NULL }, }; From 317abb2f4edd046b6f5a65660412fc430c09c65a Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 28 Jul 2023 03:23:03 +0300 Subject: [PATCH 007/308] hekate: add bootwait for each entry Allow overriding global bootwait with the one from boot entry. --- README.md | 1 + bootloader/main.c | 47 +++++++++++++++++++++++++---------------------- 2 files changed, 26 insertions(+), 22 deletions(-) diff --git a/README.md b/README.md index 98aeed7..74d9a15 100644 --- a/README.md +++ b/README.md @@ -119,6 +119,7 @@ There are four possible type of entries. "**[ ]**": Boot entry, "**{ }**": Capti | uart_port=0 | Enables logging on serial port for L4T uboot/kernel. | | Additional keys | Each distro supports more keys. Check README_CONFIG.txt for more info. | | ---------------------- | ---------------------------------------------------------- | +| bootwait=3 | Overrides global bootwait from `[config]`. | | id=IDNAME | Identifies boot entry for forced boot via id. Max 7 chars. | | logopath={FILE path} | If it exists, it will load the specified bitmap. Otherwise `bootloader/bootlogo.bmp` will be used if exists | | icon={FILE path} | Force Nyx to use the icon defined here. If this is not found, it will check for a bmp named as the boot entry ([Test 2] -> `bootloader/res/Test 2.bmp`). Otherwise defaults will be used. | diff --git a/bootloader/main.c b/bootloader/main.c index 94e7d87..3c8fa1e 100644 --- a/bootloader/main.c +++ b/bootloader/main.c @@ -786,6 +786,7 @@ static void _auto_launch() u32 pos_y; }; + u32 boot_wait = h_cfg.bootwait; u32 boot_entry_id = 0; ini_sec_t *cfg_sec = NULL; char *emummc_path = NULL; @@ -827,28 +828,18 @@ static void _auto_launch() else if (!strcmp("autoboot_list", kv->key)) h_cfg.autoboot_list = atoi(kv->val); else if (!strcmp("bootwait", kv->key)) - { - h_cfg.bootwait = atoi(kv->val); - - /* - * Clamp value to default if it exceeds 20s to protect against corruption. - * Allow up to 20s though for use in cases where user needs lots of time. - * For example dock-only use and r2p with enough time to reach dock and cancel it. - */ - if (h_cfg.bootwait > 20) - h_cfg.bootwait = 3; - } - else if (!strcmp("backlight", kv->key)) + boot_wait = atoi(kv->val); + else if (!strcmp("backlight", kv->key)) h_cfg.backlight = atoi(kv->val); - else if (!strcmp("noticker", kv->key)) + else if (!strcmp("noticker", kv->key)) h_cfg.noticker = atoi(kv->val); - else if (!strcmp("autohosoff", kv->key)) + else if (!strcmp("autohosoff", kv->key)) h_cfg.autohosoff = atoi(kv->val); - else if (!strcmp("autonogc", kv->key)) + else if (!strcmp("autonogc", kv->key)) h_cfg.autonogc = atoi(kv->val); - else if (!strcmp("updater2p", kv->key)) + else if (!strcmp("updater2p", kv->key)) h_cfg.updater2p = atoi(kv->val); - else if (!strcmp("bootprotect", kv->key)) + else if (!strcmp("bootprotect", kv->key)) h_cfg.bootprotect = atoi(kv->val); } boot_entry_id++; @@ -856,13 +847,17 @@ static void _auto_launch() // Override autoboot. if (b_cfg.boot_cfg & BOOT_CFG_AUTOBOOT_EN) { - h_cfg.autoboot = b_cfg.autoboot; + h_cfg.autoboot = b_cfg.autoboot; h_cfg.autoboot_list = b_cfg.autoboot_list; } // Apply bootloader protection against corruption. _bootloader_corruption_protect(); + // If ini list, exit here. + if (!boot_from_id && h_cfg.autoboot_list) + break; + continue; } @@ -879,6 +874,8 @@ static void _auto_launch() emummc_path = kv->val; else if (!strcmp("emummc_force_disable", kv->key)) h_cfg.emummc_force_disable = atoi(kv->val); + else if (!strcmp("bootwait", kv->key)) + boot_wait = atoi(kv->val); } } if (cfg_sec) @@ -924,6 +921,8 @@ static void _auto_launch() emummc_path = kv->val; else if (!strcmp("emummc_force_disable", kv->key)) h_cfg.emummc_force_disable = atoi(kv->val); + else if (!strcmp("bootwait", kv->key)) + boot_wait = atoi(kv->val); } } if (cfg_sec) @@ -939,8 +938,8 @@ skip_list: // Check if entry is payload or l4t special case. char *special_path = ini_check_special_section(cfg_sec); - if ((!(b_cfg.boot_cfg & BOOT_CFG_FROM_LAUNCH) && h_cfg.bootwait) || // Conditional for HOS/Payload. - (special_path && special_path == (char *)-1)) // Always show for L4T. + if ((!(b_cfg.boot_cfg & BOOT_CFG_FROM_LAUNCH) && boot_wait) || // Conditional for HOS/Payload. + (special_path && special_path == (char *)-1)) // Always show for L4T. { u32 fsize; u8 *logo_buf = NULL; @@ -994,6 +993,10 @@ skip_list: free(bitmap); } + // Clamp value to default if it exceeds 20s to protect against corruption. + if (boot_wait > 20) + boot_wait = 3; + // Render boot logo. if (bootlogoFound) { @@ -1002,13 +1005,13 @@ skip_list: free(logo_buf); // Do animated waiting before booting. If VOL- is pressed go into bootloader menu. - if (render_ticker(h_cfg.bootwait, h_cfg.backlight, h_cfg.noticker)) + if (render_ticker(boot_wait, h_cfg.backlight, h_cfg.noticker)) goto out; } else { // Do animated waiting before booting. If VOL- is pressed go into bootloader menu. - if (render_ticker_logo(h_cfg.bootwait, h_cfg.backlight)) + if (render_ticker_logo(boot_wait, h_cfg.backlight)) goto out; } } From 21da947c028b681b294fe885a6eb36e0375d2692 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 28 Jul 2023 03:28:21 +0300 Subject: [PATCH 008/308] nyx: hos: deduplicate cal0 dumping --- nyx/nyx_gui/frontend/gui_info.c | 53 +----------------------------- nyx/nyx_gui/frontend/gui_options.c | 5 ++- nyx/nyx_gui/hos/hos.c | 52 ++++++++++++++++++++++++++++- nyx/nyx_gui/hos/hos.h | 3 ++ 4 files changed, 57 insertions(+), 56 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index 0eb0a47..6178f6b 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -33,8 +33,6 @@ extern volatile nyx_storage_t *nyx_str; extern lv_res_t launch_payload(lv_obj_t *list); extern char *emmcsn_path_impl(char *path, char *sub_dir, char *filename, sdmmc_storage_t *storage); -u8 *cal0_buf = NULL; - static lv_res_t _create_window_dump_done(int error, char *dump_filenames) { lv_obj_t *dark_bg = lv_obj_create(lv_scr_act(), NULL); @@ -237,55 +235,6 @@ static lv_res_t _kfuse_dump_window_action(lv_obj_t * btn) return LV_RES_OK; } -int dump_cal0() -{ - // Init eMMC. - if (!emmc_initialize(false)) - return 1; - - // Generate BIS keys - hos_bis_keygen(); - - if (!cal0_buf) - cal0_buf = malloc(SZ_64K); - - // Read and decrypt CAL0. - emmc_set_partition(EMMC_GPP); - LIST_INIT(gpt); - emmc_gpt_parse(&gpt); - emmc_part_t *cal0_part = emmc_part_find(&gpt, "PRODINFO"); // check if null - nx_emmc_bis_init(cal0_part, false, 0); - nx_emmc_bis_read(0, 0x40, cal0_buf); - nx_emmc_bis_end(); - emmc_gpt_free(&gpt); - - emmc_end(); - - // Clear BIS keys slots. - hos_bis_keys_clear(); - - nx_emmc_cal0_t *cal0 = (nx_emmc_cal0_t *)cal0_buf; - - // Check keys validity. - if (memcmp(&cal0->magic, "CAL0", 4)) - { - free(cal0_buf); - cal0_buf = NULL; - - // Clear EKS keys. - hos_eks_clear(KB_FIRMWARE_VERSION_MAX); - - return 2; - } - - u32 hash[8]; - se_calc_sha256_oneshot(hash, (u8 *)cal0 + 0x40, cal0->body_size); - if (memcmp(hash, cal0->body_sha256, 0x20)) - return 3; - - return 0; -} - static lv_res_t _create_mbox_cal0(lv_obj_t *btn) { lv_obj_t *dark_bg = lv_obj_create(lv_scr_act(), NULL); @@ -311,7 +260,7 @@ static lv_res_t _create_mbox_cal0(lv_obj_t *btn) sd_mount(); // Dump CAL0. - int cal0_res = dump_cal0(); + int cal0_res = hos_dump_cal0(); // Check result. Don't error if hash doesn't match. if (cal0_res == 1) diff --git a/nyx/nyx_gui/frontend/gui_options.c b/nyx/nyx_gui/frontend/gui_options.c index 0c46722..7eb8bf7 100644 --- a/nyx/nyx_gui/frontend/gui_options.c +++ b/nyx/nyx_gui/frontend/gui_options.c @@ -29,7 +29,6 @@ extern hekate_config h_cfg; extern nyx_config n_cfg; -extern u8 *cal0_buf; static lv_obj_t *autoboot_btn; static bool autoboot_first_time = true; @@ -863,7 +862,7 @@ static lv_res_t _joycon_info_dump_action(lv_obj_t * btn) if (nx_hoag) { - error = dump_cal0(); + error = hos_dump_cal0(); if (!error) goto save_data; } @@ -1044,7 +1043,7 @@ disabled:; { s_printf(txt_buf, "Dumping to SD card finished!\n" - "Saved to: #C7EA46 switchroot/lite_gamepad.cal#\n\n"); + "Saved to: #C7EA46 switchroot/switch.cal#\n\n"); strcat(txt_buf, "#C7EA46 Success!#\n#C7EA46 Found Lite Gamepad data!#\n"); } } diff --git a/nyx/nyx_gui/hos/hos.c b/nyx/nyx_gui/hos/hos.c index 051b30e..b0e2069 100644 --- a/nyx/nyx_gui/hos/hos.c +++ b/nyx/nyx_gui/hos/hos.c @@ -27,6 +27,7 @@ extern hekate_config h_cfg; +u8 *cal0_buf = NULL; static u8 *bis_keys = NULL; typedef struct _tsec_keys_t @@ -667,4 +668,53 @@ void hos_bis_keys_clear() // Clear all aes bis keyslots. for (u32 i = 0; i < 6; i++) se_aes_key_clear(i); -} \ No newline at end of file +} + +int hos_dump_cal0() +{ + // Init eMMC. + if (!emmc_initialize(false)) + return 1; + + // Generate BIS keys + hos_bis_keygen(); + + if (!cal0_buf) + cal0_buf = malloc(SZ_64K); + + // Read and decrypt CAL0. + emmc_set_partition(EMMC_GPP); + LIST_INIT(gpt); + emmc_gpt_parse(&gpt); + emmc_part_t *cal0_part = emmc_part_find(&gpt, "PRODINFO"); // check if null + nx_emmc_bis_init(cal0_part, false, 0); + nx_emmc_bis_read(0, 0x40, cal0_buf); + nx_emmc_bis_end(); + emmc_gpt_free(&gpt); + + emmc_end(); + + // Clear BIS keys slots. + hos_bis_keys_clear(); + + nx_emmc_cal0_t *cal0 = (nx_emmc_cal0_t *)cal0_buf; + + // Check keys validity. + if (memcmp(&cal0->magic, "CAL0", 4)) + { + free(cal0_buf); + cal0_buf = NULL; + + // Clear EKS keys. + hos_eks_clear(KB_FIRMWARE_VERSION_MAX); + + return 2; + } + + u32 hash[8]; + se_calc_sha256_oneshot(hash, (u8 *)cal0 + 0x40, cal0->body_size); + if (memcmp(hash, cal0->body_sha256, 0x20)) + return 3; + + return 0; +} diff --git a/nyx/nyx_gui/hos/hos.h b/nyx/nyx_gui/hos/hos.h index dbc0277..a990b8f 100644 --- a/nyx/nyx_gui/hos/hos.h +++ b/nyx/nyx_gui/hos/hos.h @@ -86,9 +86,12 @@ typedef struct _launch_ctxt_t ini_sec_t *cfg; } launch_ctxt_t; +extern u8 *cal0_buf; + void hos_eks_clear(u32 kb); int hos_keygen(void *keyblob, u32 kb, tsec_ctxt_t *tsec_ctxt); int hos_bis_keygen(); void hos_bis_keys_clear(); +int hos_dump_cal0(); #endif From b142ca0f33992be587b2e8ed84ee21e0a17d450d Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 28 Jul 2023 03:29:24 +0300 Subject: [PATCH 009/308] nyx: info: use new fuse names --- nyx/nyx_gui/frontend/gui_info.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index 6178f6b..303e313 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -172,7 +172,7 @@ static lv_res_t _bootrom_dump_window_action(lv_obj_t * btn) static lv_res_t _fuse_dump_window_action(lv_obj_t * btn) { - const u32 fuse_array_size = (h_cfg.t210b01 ? FUSE_ARRAY_WORDS_NUM_T210B01 : FUSE_ARRAY_WORDS_NUM) * sizeof(u32); + const u32 fuse_array_size = (h_cfg.t210b01 ? FUSE_ARRAY_WORDS_NUM_B01 : FUSE_ARRAY_WORDS_NUM) * sizeof(u32); int error = !sd_mount(); if (!error) @@ -192,7 +192,7 @@ static lv_res_t _fuse_dump_window_action(lv_obj_t * btn) error = sd_save_to_file((u8 *)0x7000F900, 0x300, path); } - u32 words[FUSE_ARRAY_WORDS_NUM_T210B01]; + u32 words[FUSE_ARRAY_WORDS_NUM_B01]; fuse_read_array(words); if (!h_cfg.t210b01) emmcsn_path_impl(path, "/dumps", "fuse_array_raw_t210.bin", NULL); @@ -2224,7 +2224,7 @@ static lv_res_t _create_window_battery_status(lv_obj_t *btn) s_printf(txt_buf + strlen(txt_buf), "max77620 v%d\n#FF8000 Unknown OTP# (%02X)\n", main_pmic_version, value); // CPU/GPU/DRAM Pmic IC info. - u32 cpu_gpu_pmic_type = h_cfg.t210b01 ? (FUSE(FUSE_RESERVED_ODM28_T210B01) & 1) + 1 : 0; + u32 cpu_gpu_pmic_type = h_cfg.t210b01 ? (FUSE(FUSE_RESERVED_ODM28_B01) & 1) + 1 : 0; switch (cpu_gpu_pmic_type) { case 0: From f35c5b059625aeb29ecebffb78e65f1bee9f8cbd Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 28 Jul 2023 03:32:33 +0300 Subject: [PATCH 010/308] nyx: fix first time config save unmounting SD card should not get unmounted on the first boot without hekate_ipl.ini. Move sd card mounting management outside of it. --- nyx/nyx_gui/config.c | 4 ---- nyx/nyx_gui/frontend/gui.c | 7 ++++++- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/nyx/nyx_gui/config.c b/nyx/nyx_gui/config.c index 0191ecd..b70d437 100644 --- a/nyx/nyx_gui/config.c +++ b/nyx/nyx_gui/config.c @@ -64,9 +64,6 @@ void set_nyx_default_configuration() int create_config_entry() { - if (!sd_mount()) - return 1; - char lbuf[64]; FIL fp; bool mainIniFound = false; @@ -184,7 +181,6 @@ int create_config_entry() } f_close(&fp); - sd_unmount(); return 0; } diff --git a/nyx/nyx_gui/frontend/gui.c b/nyx/nyx_gui/frontend/gui.c index 6d8604b..6dd4506 100644 --- a/nyx/nyx_gui/frontend/gui.c +++ b/nyx/nyx_gui/frontend/gui.c @@ -2073,7 +2073,10 @@ static lv_res_t _save_options_action(lv_obj_t *btn) lv_obj_t * mbox = lv_mbox_create(lv_scr_act(), NULL); lv_mbox_set_recolor_text(mbox, true); - int res = !create_config_entry(); + int res = 0; + + if (sd_mount()) + res = create_config_entry(); if (res) lv_mbox_set_text(mbox, "#FF8000 hekate Configuration#\n\n#96FF00 The configuration was saved to sd card!#"); @@ -2084,6 +2087,8 @@ static lv_res_t _save_options_action(lv_obj_t *btn) nyx_options_clear_ini_changes_made(); + sd_unmount(); + return LV_RES_OK; } From 7e397b340313dba790eb9598bdb18375064afac4 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 28 Jul 2023 03:33:09 +0300 Subject: [PATCH 011/308] nyx: options: change autorcm icon --- nyx/nyx_gui/frontend/gui_options.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/nyx/nyx_gui/frontend/gui_options.c b/nyx/nyx_gui/frontend/gui_options.c index 7eb8bf7..9a1f1a1 100644 --- a/nyx/nyx_gui/frontend/gui_options.c +++ b/nyx/nyx_gui/frontend/gui_options.c @@ -1427,7 +1427,7 @@ void create_tab_options(lv_theme_t *th, lv_obj_t *parent) // Create Auto NoGC button. lv_obj_t *btn2 = lv_btn_create(sw_h2, NULL); - nyx_create_onoff_button(th, sw_h2, btn2, SYMBOL_SHRK" Auto NoGC", auto_nogc_toggle, true); + nyx_create_onoff_button(th, sw_h2, btn2, SYMBOL_CHIP" Auto NoGC", auto_nogc_toggle, true); lv_obj_align(btn2, line_sep, LV_ALIGN_OUT_BOTTOM_LEFT, 0, LV_DPI / 10); label_txt2 = lv_label_create(sw_h2, NULL); From f291a5cfa796f4b2695ce09da16e0cbb977b3d16 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 28 Jul 2023 03:34:11 +0300 Subject: [PATCH 012/308] bdk: max17050: add reg dumping --- bdk/power/max17050.c | 23 +++++++++++++++++++++++ bdk/power/max17050.h | 7 ++++--- 2 files changed, 27 insertions(+), 3 deletions(-) diff --git a/bdk/power/max17050.c b/bdk/power/max17050.c index c718d2b..8c4f658 100644 --- a/bdk/power/max17050.c +++ b/bdk/power/max17050.c @@ -279,3 +279,26 @@ int max17050_fix_configuration() return 0; } + +void max17050_dump_regs(void *buf) +{ + u16 *buff = (u16 *)buf; + + // Unlock model table. + u16 unlock = 0x59; + i2c_send_buf_small(I2C_1, MAXIM17050_I2C_ADDR, MAX17050_MODELEnable1, (u8 *)&unlock, 2); + unlock = 0xC4; + i2c_send_buf_small(I2C_1, MAXIM17050_I2C_ADDR, MAX17050_MODELEnable2, (u8 *)&unlock, 2); + + // Dump all battery fuel gauge registers. + for (u32 i = 0; i < 0x100; i++) + { + buff[i] = max17050_get_reg(i); + msleep(1); + } + + // Lock model table. + unlock = 0; + i2c_send_buf_small(I2C_1, MAXIM17050_I2C_ADDR, MAX17050_MODELEnable1, (u8 *)&unlock, 2); + i2c_send_buf_small(I2C_1, MAXIM17050_I2C_ADDR, MAX17050_MODELEnable2, (u8 *)&unlock, 2); +} diff --git a/bdk/power/max17050.h b/bdk/power/max17050.h index a9b3d37..438f55a 100644 --- a/bdk/power/max17050.h +++ b/bdk/power/max17050.h @@ -130,8 +130,9 @@ enum MAX17050_reg { MAX17050_VFSOC = 0xFF, }; -int max17050_get_property(enum MAX17050_reg reg, int *value); -int max17050_fix_configuration(); -u32 max17050_get_cached_batt_volt(); +int max17050_get_property(enum MAX17050_reg reg, int *value); +int max17050_fix_configuration(); +void max17050_dump_regs(void *buf); +u32 max17050_get_cached_batt_volt(); #endif /* __MAX17050_H_ */ From 5b94e8cf8a691b4f5555f04c1c3cc625e336c5ff Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 28 Jul 2023 03:35:08 +0300 Subject: [PATCH 013/308] nyx: info: use fuel gauge reg dump function --- nyx/nyx_gui/frontend/gui_info.c | 20 ++------------------ 1 file changed, 2 insertions(+), 18 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index 303e313..200435c 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -97,25 +97,9 @@ static lv_res_t _battery_dump_window_action(lv_obj_t * btn) if (!error) { char path[64]; - u8 *buf = (u8 *)malloc(0x100 * 2); + void *buf = malloc(0x100 * 2); - // Unlock model table. - u16 unlock = 0x59; - i2c_send_buf_small(I2C_1, MAXIM17050_I2C_ADDR, MAX17050_MODELEnable1, (u8 *)&unlock, 2); - unlock = 0xC4; - i2c_send_buf_small(I2C_1, MAXIM17050_I2C_ADDR, MAX17050_MODELEnable2, (u8 *)&unlock, 2); - - // Dump all battery fuel gauge registers. - for (int i = 0; i < 0x200; i += 2) - { - i2c_recv_buf_small(buf + i, 2, I2C_1, MAXIM17050_I2C_ADDR, i >> 1); - msleep(1); - } - - // Lock model table. - unlock = 0; - i2c_send_buf_small(I2C_1, MAXIM17050_I2C_ADDR, MAX17050_MODELEnable1, (u8 *)&unlock, 2); - i2c_send_buf_small(I2C_1, MAXIM17050_I2C_ADDR, MAX17050_MODELEnable2, (u8 *)&unlock, 2); + max17050_dump_regs(buf); emmcsn_path_impl(path, "/dumps", "fuel_gauge.bin", NULL); error = sd_save_to_file((u8 *)buf, 0x200, path); From 221614212a4a65c72ae30dd8f5e2860de51939f3 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 28 Jul 2023 03:36:10 +0300 Subject: [PATCH 014/308] nyx: info: add more cal0 info Touch vendor, IMU type/mount and analog stick types. --- nyx/nyx_gui/frontend/gui_info.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index 200435c..463b79c 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -326,8 +326,16 @@ static lv_res_t _create_mbox_cal0(lv_obj_t *btn) break; } + s_printf(txt_buf + strlen(txt_buf), + " (%06X)\n#FF8000 Touch Vendor:# %d\n" + "#FF8000 IMU Type/Mount:# %d / %d\n" + "#FF8000 Stick L/R Type:# %02X / %02X\n", + cal0->lcd_vendor, cal0->touch_ic_vendor_id, + cal0->console_6axis_sensor_type, cal0->console_6axis_sensor_mount_type, + cal0->analog_stick_type_l, cal0->analog_stick_type_r); + bool valid_cal0 = !memcmp(hash, cal0->body_sha256, 0x20); - s_printf(txt_buf + strlen(txt_buf), " (%06X)\n#FF8000 SHA256 Hash Match:# %s", cal0->lcd_vendor, valid_cal0 ? "Pass" : "Failed"); + s_printf(txt_buf + strlen(txt_buf), "#FF8000 SHA256 Hash Match:# %s", valid_cal0 ? "Pass" : "Failed"); lv_label_set_text(lb_desc, txt_buf); From 6061bb5213fa7f637df2b037513b62a38e156e57 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 28 Jul 2023 03:38:40 +0300 Subject: [PATCH 015/308] nyx: info: add public key info And remove LOT Code 1 since it's not used. --- nyx/nyx_gui/frontend/gui_info.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index 463b79c..418ee12 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -372,7 +372,8 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) "ODM Fields (4, 6, 7):\n" "Secure Boot Key (SBK):\n" "Device Key (DK):\n" - "Keygen Revision:\n" + "Public Key (PK SHA256):\n\n" + "HOS Keygen Revision:\n" "USB Stack:\n" "Final Test Revision:\n" "Chip Probing Revision:\n" @@ -388,7 +389,6 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) "Vendor Code:\n" "FAB Code:\n" "LOT Code 0:\n" - "LOT Code 1:\n" "Wafer ID:\n" "X Coordinate:\n" "Y Coordinate:\n" @@ -610,16 +610,21 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) u32 chip_id = APB_MISC(APB_MISC_GP_HIDREV); // Parse fuses and display them. s_printf(txt_buf, - "%X - %s - %s\n%02d: %s\n%d - %d (HOS: %s)\n%08X %08X %08X\n%08X%08X%08X%08X\n%08X\n%d\n" + "%X - %s - %s\n%02d: %s\n%d - %d (HOS: %s)\n%08X %08X %08X\n%08X%08X%08X%08X\n%08X\n%08X%08X%08X%08X\n%08X%08X%08X%08X\n%d\n" "%s\n%d.%02d (0x%X)\n%d.%02d (0x%X)\n%d\n%d\n%d\n%d\n0x%X\n%d\n%d\n%d\n%d\n" - "%d\n%d\n%d (0x%X)\n%d\n%d\n%d\n%d\n" + "%d\n%d\n%d (0x%X)\n%d\n%d\n%d\n" "ID: %02X, Major: A%02d, Minor: %d", FUSE(FUSE_SKU_INFO), sku, fuse_read_hw_state() ? "Dev" : "Retail", dram_id, dram_man, burnt_fuses_7, burnt_fuses_6, fuses_hos_version, fuse_read_odm(4), fuse_read_odm(6), fuse_read_odm(7), byte_swap_32(FUSE(FUSE_PRIVATE_KEY0)), byte_swap_32(FUSE(FUSE_PRIVATE_KEY1)), byte_swap_32(FUSE(FUSE_PRIVATE_KEY2)), byte_swap_32(FUSE(FUSE_PRIVATE_KEY3)), - byte_swap_32(FUSE(FUSE_PRIVATE_KEY4)), fuse_read_odm_keygen_rev(), + byte_swap_32(FUSE(FUSE_PRIVATE_KEY4)), + byte_swap_32(FUSE(FUSE_PUBLIC_KEY0)), byte_swap_32(FUSE(FUSE_PUBLIC_KEY1)), + byte_swap_32(FUSE(FUSE_PUBLIC_KEY2)), byte_swap_32(FUSE(FUSE_PUBLIC_KEY3)), + byte_swap_32(FUSE(FUSE_PUBLIC_KEY4)), byte_swap_32(FUSE(FUSE_PUBLIC_KEY5)), + byte_swap_32(FUSE(FUSE_PUBLIC_KEY6)), byte_swap_32(FUSE(FUSE_PUBLIC_KEY7)), + fuse_read_odm_keygen_rev(), ((FUSE(FUSE_RESERVED_SW) & 0x80) || h_cfg.t210b01) ? "XUSB" : "USB2", (FUSE(FUSE_OPT_FT_REV) >> 5) & 0x3F, FUSE(FUSE_OPT_FT_REV) & 0x1F, FUSE(FUSE_OPT_FT_REV), (FUSE(FUSE_OPT_CP_REV) >> 5) & 0x3F, FUSE(FUSE_OPT_CP_REV) & 0x1F, FUSE(FUSE_OPT_CP_REV), @@ -627,7 +632,7 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) FUSE(FUSE_SOC_SPEEDO_0_CALIB), FUSE(FUSE_SOC_SPEEDO_1_CALIB), FUSE(FUSE_SOC_SPEEDO_2_CALIB), FUSE(FUSE_CPU_IDDQ_CALIB), FUSE(FUSE_SOC_IDDQ_CALIB), FUSE(FUSE_GPU_IDDQ_CALIB), FUSE(FUSE_OPT_VENDOR_CODE), FUSE(FUSE_OPT_FAB_CODE), lot_bin, FUSE(FUSE_OPT_LOT_CODE_0), - FUSE(FUSE_OPT_LOT_CODE_1), FUSE(FUSE_OPT_WAFER_ID), FUSE(FUSE_OPT_X_COORDINATE), FUSE(FUSE_OPT_Y_COORDINATE), + FUSE(FUSE_OPT_WAFER_ID), FUSE(FUSE_OPT_X_COORDINATE), FUSE(FUSE_OPT_Y_COORDINATE), (chip_id >> 8) & 0xFF, (chip_id >> 4) & 0xF, (chip_id >> 16) & 0xF); lv_label_set_text(lb_val, txt_buf); From b5fcdad33fff45cc77ef9e5f02b6ea2e529a2727 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 28 Jul 2023 03:40:32 +0300 Subject: [PATCH 016/308] nyx: info: improve ram channel/rank detection --- nyx/nyx_gui/frontend/gui_info.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index 418ee12..d0a0f09 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -648,13 +648,13 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) lv_label_set_recolor(lb_desc2, true); // Prepare DRAM info. - emc_mr_data_t ram_vendor = sdram_read_mrx(MR5_MAN_ID); - emc_mr_data_t ram_rev0 = sdram_read_mrx(MR6_REV_ID1); - emc_mr_data_t ram_rev1 = sdram_read_mrx(MR7_REV_ID2); + emc_mr_data_t ram_vendor = sdram_read_mrx(MR5_MAN_ID); + emc_mr_data_t ram_rev0 = sdram_read_mrx(MR6_REV_ID1); + emc_mr_data_t ram_rev1 = sdram_read_mrx(MR7_REV_ID2); emc_mr_data_t ram_density = sdram_read_mrx(MR8_DENSITY); u32 ranks = EMC(EMC_ADR_CFG) + 1; u32 channels = (EMC(EMC_FBIO_CFG7) >> 1) & 3; - u32 die_channels = ranks * ((channels & 1) + ((channels & 2) >> 1)); + channels = (channels & 1) + ((channels & 2) >> 1); s_printf(txt_buf, "#00DDFF %s SDRAM ##FF8000 (Ch 0 | Ch 1):#\n#FF8000 Vendor:# ", h_cfg.t210b01 ? "LPDDR4X" : "LPDDR4"); switch (ram_vendor.rank0_ch0) { @@ -716,7 +716,7 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) break; } s_printf(txt_buf + strlen(txt_buf), "\n#FF8000 Rev ID:# %X.%02X #FF8000 |# %X.%02X\n#FF8000 Density:# %d", - ram_rev0.rank0_ch0, ram_rev1.rank0_ch0, ram_rev0.rank0_ch1, ram_rev1.rank0_ch1, die_channels); + ram_rev0.rank0_ch0, ram_rev1.rank0_ch0, ram_rev0.rank0_ch1, ram_rev1.rank0_ch1, ranks * channels); switch ((ram_density.rank0_ch0 & 0x3C) >> 2) { case 2: @@ -738,7 +738,7 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) s_printf(txt_buf + strlen(txt_buf), " x Unk (%d)", (ram_density.rank0_ch0 & 0x3C) >> 2); break; } - s_printf(txt_buf + strlen(txt_buf), " #FF8000 |# %d", die_channels); + s_printf(txt_buf + strlen(txt_buf), " #FF8000 |# %d", ranks * channels); switch ((ram_density.rank0_ch1 & 0x3C) >> 2) { case 2: From 010b08d4c79eccf38922c37bd0547b361443f2f6 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 28 Jul 2023 04:03:01 +0300 Subject: [PATCH 017/308] l4t: t210b01: set real dram rate by default Since Arachne Register Cell (ARC) is now final and stable, automatically set rated DRAM frequency for T210B01 by default. 1866 MHz for old ones and 2133 MHz for newer ones. Setting anything from 1600000 and lower will disable that. --- bootloader/l4t/l4t.c | 100 +++++++++++-------------------------------- 1 file changed, 24 insertions(+), 76 deletions(-) diff --git a/bootloader/l4t/l4t.c b/bootloader/l4t/l4t.c index c06524a..d91ecbe 100644 --- a/bootloader/l4t/l4t.c +++ b/bootloader/l4t/l4t.c @@ -32,8 +32,8 @@ * 0: Base. * 1: SDMMC1 LA programming for SDMMC1 UHS DDR200. */ -#define L4T_LOADER_API_REV 1 -#define L4T_FIRMWARE_REV 0x32524556 // REV2. +#define L4T_LOADER_API_REV 3 +#define L4T_FIRMWARE_REV 0x33524556 // REV3. #ifdef DEBUG_UART_PORT #include @@ -114,8 +114,6 @@ #define BPMPFW_B01_DTB_EMC_TBL_START(idx) (BPMPFW_B01_DTB_EMC_TBL_OFF + BPMPFW_B01_DTB_EMC_TBL_SZ * (idx)) #define BPMPFW_B01_DTB_EMC_TBL_SET_VAL(idx, off, val) (*(u32 *)(BPMPFW_B01_DTB_EMC_TBL_START(idx) + (off)) = (val)) #define BPMPFW_B01_DTB_EMC_TBL_SET_FREQ(idx, freq) (*(u32 *)(BPMPFW_B01_DTB_EMC_TBL_START(idx) + BPMPFW_B01_DTB_EMC_FREQ_VAL) = (freq)) -#define BPMPFW_B01_DTB_EMC_TBL_SCC_OFFSET(idx) ((void *)(BPMPFW_B01_DTB_EMC_TBL_START(idx) + BPMPFW_B01_DTB_EMC_SCC_OFF)) -#define BPMPFW_B01_DTB_EMC_TBL_SET_PLLM_DIVN(idx, n) (*(u32 *)(BPMPFW_B01_DTB_EMC_TBL_START(idx) + BPMPFW_B01_DTB_EMC_PLLM_DIVN_VAL) = (n)) #define BPMPFW_B01_DTB_EMC_TBL_SET_NAME(idx, name) (strcpy((char *)(BPMPFW_B01_DTB_EMC_TBL_START(idx) + BPMPFW_B01_DTB_EMC_NAME_VAL), (name))) #define BPMPFW_B01_DTB_EMC_TBL_ENABLE(idx) (*(char *)(BPMPFW_B01_DTB_EMC_TBL_START(idx) + BPMPFW_B01_DTB_EMC_ENABLE_OFF) = 'n') #define BPMPFW_B01_DTB_EMC_TBL_OFFSET(idx) ((void *)(BPMPFW_B01_DTB_EMC_TBL_START(idx) + BPMPFW_B01_DTB_EMC_VALUES_OFF)) @@ -244,24 +242,6 @@ typedef struct _plat_params_from_bl2 { u64 flags; // Platform flags. } plat_params_from_bl2_t; -typedef struct _pll_spread_spectrum_t210b01_t { - u32 ss_cfg; - u32 ss_ctrl1; - u32 ss_ctrl2; - u32 ss2_cfg; - u32 ss2_ctrl1; - u32 ss2_ctrl2; - u32 divm; - u32 divn; - u32 pdivp; -} pll_spread_spectrum_t210b01_t; - -typedef struct _pll_ssc_t210b01_t { - u32 ss_ctrl1; - u32 ss_ctrl2; - u32 divn; -} pll_ssc_t210b01_t; - typedef struct _l4t_fw_t { u32 addr; @@ -289,19 +269,6 @@ typedef struct _l4t_ctxt_t #define DRAM_VDDQ_OC_MAX_VOLTAGE 650 #define DRAM_T210B01_TBL_MAX_FREQ 1600000 -// JEDEC frequency table. -static const u32 ram_jd_t210b01[] = { - 1866000, - 2133000, -}; - -#define DRAM_T210B01_SSC_PARAMS 2 - -static const pll_ssc_t210b01_t pll_jd_ssc_t210b01[DRAM_T210B01_SSC_PARAMS] = { - { 0x300FB3A, 0x30300, 48 }, - { 0x180F89D, 0x10070180, 55 }, -}; - //! TODO: Update on dram config changes. static const u8 mtc_table_idx_t210b01[] = { /* 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 */ @@ -786,9 +753,9 @@ static void _l4t_late_hw_config(bool t210b01) static void _l4t_bpmpfw_b01_config(l4t_ctxt_t *ctxt) { - char *ram_oc_txt = ctxt->ram_oc_txt; - u32 ram_oc_freq = ctxt->ram_oc_freq; - u32 ram_oc_divn = 0; + char *ram_oc_txt = ctxt->ram_oc_txt; + u32 ram_oc_freq = ctxt->ram_oc_freq; + u32 ram_id = fuse_read_dramid(true); // Set default parameters. *(u32 *)BPMPFW_B01_DTB_ADDR = 0; @@ -806,66 +773,47 @@ static void _l4t_bpmpfw_b01_config(l4t_ctxt_t *ctxt) #endif // Set and copy MTC tables. - u32 mtc_idx = mtc_table_idx_t210b01[fuse_read_dramid(true)]; + u32 mtc_idx = mtc_table_idx_t210b01[ram_id]; for (u32 i = 0; i < 3; i++) { minerva_sdmmc_la_program(BPMPFW_B01_MTC_TABLE_OFFSET(mtc_idx, i), true); memcpy(BPMPFW_B01_DTB_EMC_TBL_OFFSET(i), BPMPFW_B01_MTC_TABLE_OFFSET(mtc_idx, i), BPMPFW_B01_MTC_FREQ_TABLE_SIZE); } + // Always use Arachne Register Cell (ARC) for setting rated frequencies if no ram_oc is defined. + if (!ram_oc_freq) + { + if (ram_id >= LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AM_MGCJ && + ram_id <= LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D2NP_046_WTE) + { + ram_oc_txt = "1866000"; + ram_oc_freq = 1866000; + } + else + { + ram_oc_txt = "2133000"; + ram_oc_freq = 2133000; + } + } + + // A frequency of lower or equal with stock max will skip ARC. if (ram_oc_freq > DRAM_T210B01_TBL_MAX_FREQ) { // Final table. const u32 tbl_idx = BPMPFW_B01_DTB_EMC_ENTRIES - 1; - // Set Overclock. - for (u32 i = 0; i < ARRAY_SIZE(ram_jd_t210b01); i++) - { - // Normalize the check at 38.4 MHz window. - if ((ram_jd_t210b01[i] - 19200) < ram_oc_freq && - (ram_jd_t210b01[i] + 19200) > ram_oc_freq) - { - // Set divider. - ram_oc_divn = i + 1; - - break; - } - } - - if (!ram_oc_divn) - ram_oc_divn = ram_oc_freq / 38400; - // Set DRAM voltage. if (ctxt->ram_oc_vdd2) max7762x_regulator_set_voltage(REGULATOR_SD1, ctxt->ram_oc_vdd2 * 1000); if (ctxt->ram_oc_vddq) max7762x_regulator_set_voltage(REGULATOR_RAM0, ctxt->ram_oc_vddq * 1000); - // Copy table and set parameters. + // Copy table and prep it for Arachne. memcpy(BPMPFW_B01_DTB_EMC_TBL_OFFSET(tbl_idx), BPMPFW_B01_MTC_TABLE_OFFSET(mtc_idx, 2), BPMPFW_B01_MTC_FREQ_TABLE_SIZE); BPMPFW_B01_DTB_EMC_TBL_SET_NAME(tbl_idx, ram_oc_txt); BPMPFW_B01_DTB_EMC_TBL_SET_FREQ(tbl_idx, ram_oc_freq); - pll_spread_spectrum_t210b01_t *ssc = BPMPFW_B01_DTB_EMC_TBL_SCC_OFFSET(tbl_idx); - - if (ram_oc_divn <= DRAM_T210B01_SSC_PARAMS) - { - // Standard frequency. - const pll_ssc_t210b01_t *ssc_cfg = &pll_jd_ssc_t210b01[ram_oc_divn - 1]; - - ssc->ss_ctrl1 = ssc_cfg->ss_ctrl1; - ssc->ss_ctrl2 = ssc_cfg->ss_ctrl2; - ssc->ss2_ctrl1 = ssc_cfg->ss_ctrl1; - ssc->ss2_ctrl2 = ssc_cfg->ss_ctrl2; - ssc->divn = ssc_cfg->divn; - } - else - { - // Non standard frequency. - ssc->divn = ram_oc_divn; - } - // Enable table. BPMPFW_B01_DTB_EMC_TBL_ENABLE(tbl_idx); From cb964fe5d2022d7ab62614c540f509913dc4dcbf Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 28 Jul 2023 04:04:03 +0300 Subject: [PATCH 018/308] l4t: allow ram undervolting --- README.md | 2 ++ bootloader/l4t/l4t.c | 4 ++-- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/README.md b/README.md index 74d9a15..fc86022 100644 --- a/README.md +++ b/README.md @@ -116,6 +116,8 @@ There are four possible type of entries. "**[ ]**": Boot entry, "**{ }**": Capti | l4t=1 | L4T Linux/Android native launching. | | boot_prefixes={FOLDER path} | L4T bootstack directory. | | ram_oc=0 | L4T RAM Overclocking. Check README_CONFIG.txt for more info. | +| ram_oc_vdd2=1100 | L4T RAM VDD2 Voltage. Set VDD2 (T210B01) or VDD2/VDDQ (T210) voltage. 1050-1175. | +| ram_oc_vddq=600 | L4T RAM VDDQ Voltage. Set VDDQ (T210B01). 550-650. | | uart_port=0 | Enables logging on serial port for L4T uboot/kernel. | | Additional keys | Each distro supports more keys. Check README_CONFIG.txt for more info. | | ---------------------- | ---------------------------------------------------------- | diff --git a/bootloader/l4t/l4t.c b/bootloader/l4t/l4t.c index d91ecbe..e6d902c 100644 --- a/bootloader/l4t/l4t.c +++ b/bootloader/l4t/l4t.c @@ -263,9 +263,9 @@ typedef struct _l4t_ctxt_t emc_table_t *mtc_table; } l4t_ctxt_t; -#define DRAM_VDD2_OC_MIN_VOLTAGE 1100 +#define DRAM_VDD2_OC_MIN_VOLTAGE 1050 #define DRAM_VDD2_OC_MAX_VOLTAGE 1175 -#define DRAM_VDDQ_OC_MIN_VOLTAGE 600 +#define DRAM_VDDQ_OC_MIN_VOLTAGE 550 #define DRAM_VDDQ_OC_MAX_VOLTAGE 650 #define DRAM_T210B01_TBL_MAX_FREQ 1600000 From 91393700ff99224aa8b347bb4ff89b88721b6ab0 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 28 Jul 2023 04:07:43 +0300 Subject: [PATCH 019/308] nyx: use restore/emummc folder for restoring In order to avoid mistakes, emuMMC can now only be restored from `backup/{emmc_sn}/restore/emummc`. --- nyx/nyx_gui/frontend/fe_emmc_tools.c | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/nyx/nyx_gui/frontend/fe_emmc_tools.c b/nyx/nyx_gui/frontend/fe_emmc_tools.c index dcbf1e6..4bd498f 100644 --- a/nyx/nyx_gui/frontend/fe_emmc_tools.c +++ b/nyx/nyx_gui/frontend/fe_emmc_tools.c @@ -778,6 +778,7 @@ void dump_emmc_selected(emmcPartType_t dumpType, emmc_tool_gui_t *gui) char sdPath[OUT_FILENAME_SZ]; // Create Restore folders, if they do not exist. emmcsn_path_impl(sdPath, "/restore", "", &emmc_storage); + emmcsn_path_impl(sdPath, "/restore/emummc", "", &emmc_storage); emmcsn_path_impl(sdPath, "/restore/partitions", "", &emmc_storage); // Set folder to backup/{emmc_sn}. @@ -1431,8 +1432,10 @@ void restore_emmc_selected(emmcPartType_t restoreType, emmc_tool_gui_t *gui) int i = 0; char sdPath[OUT_FILENAME_SZ]; - - emmcsn_path_impl(sdPath, "/restore", "", &emmc_storage); + if (!gui->raw_emummc) + emmcsn_path_impl(sdPath, "/restore", "", &emmc_storage); + else + emmcsn_path_impl(sdPath, "/restore/emummc", "", &emmc_storage); gui->base_path = (char *)malloc(strlen(sdPath) + 1); strcpy(gui->base_path, sdPath); @@ -1464,7 +1467,10 @@ void restore_emmc_selected(emmcPartType_t restoreType, emmc_tool_gui_t *gui) emmc_set_partition(i + 1); - emmcsn_path_impl(sdPath, "/restore", bootPart.name, &emmc_storage); + if (!gui->raw_emummc) + emmcsn_path_impl(sdPath, "/restore", bootPart.name, &emmc_storage); + else + emmcsn_path_impl(sdPath, "/restore/emummc", bootPart.name, &emmc_storage); res = _restore_emmc_part(gui, sdPath, i, &emmc_storage, &bootPart, false); if (!res) @@ -1530,7 +1536,10 @@ void restore_emmc_selected(emmcPartType_t restoreType, emmc_tool_gui_t *gui) manual_system_maintenance(true); i++; - emmcsn_path_impl(sdPath, "/restore", rawPart.name, &emmc_storage); + if (!gui->raw_emummc) + emmcsn_path_impl(sdPath, "/restore", rawPart.name, &emmc_storage); + else + emmcsn_path_impl(sdPath, "/restore/emummc", rawPart.name, &emmc_storage); res = _restore_emmc_part(gui, sdPath, 2, &emmc_storage, &rawPart, true); if (!res) From 0fe17cfb41bbb55f079c7228f56ff7765f2e33b3 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 28 Jul 2023 15:42:16 +0300 Subject: [PATCH 020/308] l4t: add latest api version info --- bootloader/l4t/l4t.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/bootloader/l4t/l4t.c b/bootloader/l4t/l4t.c index e6d902c..72ce1ab 100644 --- a/bootloader/l4t/l4t.c +++ b/bootloader/l4t/l4t.c @@ -31,6 +31,8 @@ * * 0: Base. * 1: SDMMC1 LA programming for SDMMC1 UHS DDR200. + * 2: Arachne Register Cell v1. + * 3: Arachne Register Cell v2. PTSA Rework support. */ #define L4T_LOADER_API_REV 3 #define L4T_FIRMWARE_REV 0x33524556 // REV3. From 1e28320e5a69efd762a85ee5b6b211b26184d6b9 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Mon, 31 Jul 2023 16:59:15 +0300 Subject: [PATCH 021/308] bdk: t210: add more mmio addresses And simplify relevant drivers that hardcoded them. --- bdk/soc/i2c.c | 21 ++-- bdk/soc/t210.h | 250 +++++++++++++++++++++---------------- bdk/soc/uart.c | 20 +-- bdk/storage/sdmmc_driver.c | 9 +- 4 files changed, 161 insertions(+), 139 deletions(-) diff --git a/bdk/soc/i2c.c b/bdk/soc/i2c.c index 34aa666..9a8aefe 100644 --- a/bdk/soc/i2c.c +++ b/bdk/soc/i2c.c @@ -18,6 +18,7 @@ #include #include +#include #include #define I2C_PACKET_PROT_I2C BIT(4) @@ -81,14 +82,8 @@ #define MSTR_CONFIG_LOAD BIT(0) #define TIMEOUT_CONFIG_LOAD BIT(2) -static const u32 i2c_addrs[] = { - 0x7000C000, // I2C_1. - 0x7000C400, // I2C_2. - 0x7000C500, // I2C_3. - 0x7000C700, // I2C_4. - 0x7000D000, // I2C_5. - 0x7000D100 // I2C_6. -}; +/* I2C_1, 2, 3, 4, 5 and 6. */ +static const u16 _i2c_base_offsets[6] = { 0x0, 0x400, 0x500, 0x700, 0x1000, 0x1100 }; static void _i2c_load_cfg_wait(vu32 *base) { @@ -108,7 +103,7 @@ static int _i2c_send_single(u32 i2c_idx, u32 dev_addr, u8 *buf, u32 size) u32 tmp = 0; - vu32 *base = (vu32 *)i2c_addrs[i2c_idx]; + vu32 *base = (vu32 *)(I2C_BASE + (u32)_i2c_base_offsets[i2c_idx]); // Set device address and send mode. base[I2C_CMD_ADDR0] = dev_addr << 1 | ADDR0_WRITE; @@ -154,7 +149,7 @@ static int _i2c_recv_single(u32 i2c_idx, u8 *buf, u32 size, u32 dev_addr) if (size > 8) return 0; - vu32 *base = (vu32 *)i2c_addrs[i2c_idx]; + vu32 *base = (vu32 *)(I2C_BASE + (u32)_i2c_base_offsets[i2c_idx]); // Set device address and recv mode. base[I2C_CMD_ADDR0] = (dev_addr << 1) | ADDR0_READ; @@ -198,7 +193,7 @@ static int _i2c_send_pkt(u32 i2c_idx, u8 *buf, u32 size, u32 dev_addr) int res = 0; - vu32 *base = (vu32 *)i2c_addrs[i2c_idx]; + vu32 *base = (vu32 *)(I2C_BASE + (u32)_i2c_base_offsets[i2c_idx]); // Enable interrupts. base[I2C_INT_EN] = ALL_PACKETS_COMPLETE | PACKET_COMPLETE | NO_ACK | @@ -270,7 +265,7 @@ static int _i2c_recv_pkt(u32 i2c_idx, u8 *buf, u32 size, u32 dev_addr, u32 reg) int res = 0; - vu32 *base = (vu32 *)i2c_addrs[i2c_idx]; + vu32 *base = (vu32 *)(I2C_BASE + (u32)_i2c_base_offsets[i2c_idx]); // Enable interrupts. base[I2C_INT_EN] = ALL_PACKETS_COMPLETE | PACKET_COMPLETE | NO_ACK | @@ -352,7 +347,7 @@ static int _i2c_recv_pkt(u32 i2c_idx, u8 *buf, u32 size, u32 dev_addr, u32 reg) void i2c_init(u32 i2c_idx) { - vu32 *base = (vu32 *)i2c_addrs[i2c_idx]; + vu32 *base = (vu32 *)(I2C_BASE + (u32)_i2c_base_offsets[i2c_idx]); base[I2C_CLK_DIVISOR] = (5 << 16) | 1; // SF mode Div: 6, HS mode div: 2. base[I2C_BUS_CLEAR_CONFIG] = (9 << 16) | BC_TERMINATE | BC_ENABLE; diff --git a/bdk/soc/t210.h b/bdk/soc/t210.h index 5de9e53..97819a6 100644 --- a/bdk/soc/t210.h +++ b/bdk/soc/t210.h @@ -20,120 +20,140 @@ #include -#define BOOTROM_BASE 0x100000 -#define IRAM_BASE 0x40000000 -#define HOST1X_BASE 0x50000000 -#define BPMP_CACHE_BASE 0x50040000 -#define DISPLAY_A_BASE 0x54200000 -#define DSI_BASE 0x54300000 -#define VIC_BASE 0x54340000 -#define NVDEC_BASE 0x54480000 -#define TSEC_BASE 0x54500000 -#define SOR1_BASE 0x54580000 -#define MSELECT_BASE 0x50060000 -#define ICTLR_BASE 0x60004000 -#define TMR_BASE 0x60005000 -#define CLOCK_BASE 0x60006000 -#define FLOW_CTLR_BASE 0x60007000 -#define AHBDMA_BASE 0x60008000 -#define SYSREG_BASE 0x6000C000 -#define SB_BASE (SYSREG_BASE + 0x200) -#define ACTMON_BASE 0x6000C800 -#define GPIO_BASE 0x6000D000 -#define GPIO_1_BASE (GPIO_BASE) -#define GPIO_2_BASE (GPIO_BASE + 0x100) -#define GPIO_3_BASE (GPIO_BASE + 0x200) -#define GPIO_4_BASE (GPIO_BASE + 0x300) -#define GPIO_5_BASE (GPIO_BASE + 0x400) -#define GPIO_6_BASE (GPIO_BASE + 0x500) -#define GPIO_7_BASE (GPIO_BASE + 0x600) -#define GPIO_8_BASE (GPIO_BASE + 0x700) -#define EXCP_VEC_BASE 0x6000F000 -#define IPATCH_BASE 0x6001DC00 -#define APBDMA_BASE 0x60020000 -#define APB_MISC_BASE 0x70000000 -#define PINMUX_AUX_BASE 0x70003000 -#define UART_BASE 0x70006000 -#define PWM_BASE 0x7000A000 -#define RTC_BASE 0x7000E000 -#define PMC_BASE 0x7000E400 -#define SYSCTR0_BASE 0x700F0000 -#define FUSE_BASE 0x7000F800 -#define KFUSE_BASE 0x7000FC00 -#define SE_BASE 0x70012000 -#define MC_BASE 0x70019000 -#define EMC_BASE 0x7001B000 -#define EMC0_BASE 0x7001E000 -#define EMC1_BASE 0x7001F000 -#define XUSB_HOST_BASE 0x70090000 +#define IROM_BASE 0x100000 +#define IRAM_BASE 0x40000000 +#define HOST1X_BASE 0x50000000 +#define BPMP_CACHE_BASE 0x50040000 +#define MSELECT_BASE 0x50060000 +#define DPAUX1_BASE 0x54040000 +#define TSEC2_BASE 0x54100000 +#define DISPLAY_A_BASE 0x54200000 +#define DISPLAY_B_BASE 0x54240000 +#define DSI_BASE 0x54300000 +#define VIC_BASE 0x54340000 +#define NVJPG_BASE 0x54380000 +#define NVDEC_BASE 0x54480000 +#define NVENC_BASE 0x544C0000 +#define TSEC_BASE 0x54500000 +#define SOR1_BASE 0x54580000 +#define GPU_BASE 0x57000000 +#define GPU_USER_BASE 0x58000000 +#define RES_SEMAPH_BASE 0x60001000 +#define ARB_SEMAPH_BASE 0x60002000 +#define ARBPRI_BASE 0x60003000 +#define ICTLR_BASE 0x60004000 +#define TMR_BASE 0x60005000 +#define CLOCK_BASE 0x60006000 +#define FLOW_CTLR_BASE 0x60007000 +#define AHBDMA_BASE 0x60008000 +#define SYSREG_BASE 0x6000C000 +#define SB_BASE (SYSREG_BASE + 0x200) +#define ACTMON_BASE 0x6000C800 +#define GPIO_BASE 0x6000D000 +#define EXCP_VEC_BASE 0x6000F000 +#define IPATCH_BASE 0x6001DC00 +#define APBDMA_BASE 0x60020000 +#define VGPIO_BASE 0x60024000 +#define APB_MISC_BASE 0x70000000 +#define PINMUX_AUX_BASE 0x70003000 +#define UART_BASE 0x70006000 +#define PWM_BASE 0x7000A000 +#define I2C_BASE 0x7000C000 +#define RTC_BASE 0x7000E000 +#define PMC_BASE 0x7000E400 +#define FUSE_BASE 0x7000F800 +#define KFUSE_BASE 0x7000FC00 +#define SE_BASE 0x70012000 +#define TSENSOR_BASE 0x70014000 +#define ATOMICS_BASE 0x70016000 +#define MC_BASE 0x70019000 +#define EMC_BASE 0x7001B000 +#define EMC0_BASE 0x7001E000 +#define EMC1_BASE 0x7001F000 +#define XUSB_HOST_BASE 0x70090000 #define XUSB_PADCTL_BASE 0x7009F000 -#define XUSB_DEV_BASE 0x700D0000 -#define MIPI_CAL_BASE 0x700E3000 -#define CL_DVFS_BASE 0x70110000 -#define I2S_BASE 0x702D1000 -#define ADMA_BASE 0x702E2000 -#define TZRAM_BASE 0x7C010000 +#define XUSB_DEV_BASE 0x700D0000 +#define SDMMC_BASE 0x700B0000 +#define SOC_THERM_BASE 0x700E2000 +#define MIPI_CAL_BASE 0x700E3000 +#define SYSCTR0_BASE 0x700F0000 +#define SYSCTR1_BASE 0x70100000 +#define CL_DVFS_BASE 0x70110000 +#define APE_BASE 0x702C0000 +#define AHUB_BASE 0x702D0000 +#define AXBAR_BASE 0x702D0800 +#define I2S_BASE 0x702D1000 +#define ADMA_BASE 0x702E2000 +#define SE2_BASE 0x70412000 +#define SE_PKA1_BASE 0x70420000 +#define TZRAM_BASE 0x7C010000 #define TZRAM_SIZE 0x10000 #define TZRAM_T210B01_SIZE 0x3C000 -#define USB_BASE 0x7D000000 -#define USB_OTG_BASE USB_BASE -#define USB1_BASE 0x7D004000 +#define USB_BASE 0x7D000000 +#define USB_OTG_BASE USB_BASE +#define USB1_BASE 0x7D004000 +#define EMEM_BASE 0x80000000 -#define _REG(base, off) *(vu32 *)((base) + (off)) +#define MMIO_REG32(base, off) *(vu32 *)((base) + (off)) -#define HOST1X(off) _REG(HOST1X_BASE, off) -#define BPMP_CACHE_CTRL(off) _REG(BPMP_CACHE_BASE, off) -#define DISPLAY_A(off) _REG(DISPLAY_A_BASE, off) -#define DSI(off) _REG(DSI_BASE, off) -#define VIC(off) _REG(VIC_BASE, off) -#define NVDEC(off) _REG(NVDEC_BASE, off) -#define TSEC(off) _REG(TSEC_BASE, off) -#define SOR1(off) _REG(SOR1_BASE, off) -#define MSELECT(off) _REG(MSELECT_BASE, off) -#define ICTLR(cidx, off) _REG(ICTLR_BASE + (0x100 * (cidx)), off) -#define TMR(off) _REG(TMR_BASE, off) -#define CLOCK(off) _REG(CLOCK_BASE, off) -#define FLOW_CTLR(off) _REG(FLOW_CTLR_BASE, off) -#define SYSREG(off) _REG(SYSREG_BASE, off) -#define AHB_GIZMO(off) _REG(SYSREG_BASE, off) -#define SB(off) _REG(SB_BASE, off) -#define ACTMON(off) _REG(ACTMON_BASE, off) -#define GPIO(off) _REG(GPIO_BASE, off) -#define GPIO_1(off) _REG(GPIO_1_BASE, off) -#define GPIO_2(off) _REG(GPIO_2_BASE, off) -#define GPIO_3(off) _REG(GPIO_3_BASE, off) -#define GPIO_4(off) _REG(GPIO_4_BASE, off) -#define GPIO_5(off) _REG(GPIO_5_BASE, off) -#define GPIO_6(off) _REG(GPIO_6_BASE, off) -#define GPIO_7(off) _REG(GPIO_7_BASE, off) -#define GPIO_8(off) _REG(GPIO_8_BASE, off) -#define EXCP_VEC(off) _REG(EXCP_VEC_BASE, off) -#define APB_MISC(off) _REG(APB_MISC_BASE, off) -#define PINMUX_AUX(off) _REG(PINMUX_AUX_BASE, off) -#define PWM(off) _REG(PWM_BASE, off) -#define RTC(off) _REG(RTC_BASE, off) -#define PMC(off) _REG(PMC_BASE, off) -#define SYSCTR0(off) _REG(SYSCTR0_BASE, off) -#define FUSE(off) _REG(FUSE_BASE, off) -#define KFUSE(off) _REG(KFUSE_BASE, off) -#define SE(off) _REG(SE_BASE, off) -#define MC(off) _REG(MC_BASE, off) -#define EMC(off) _REG(EMC_BASE, off) -#define EMC_CH0(off) _REG(EMC0_BASE, off) -#define EMC_CH1(off) _REG(EMC1_BASE, off) -#define XUSB_HOST(off) _REG(XUSB_HOST_BASE, off) -#define XUSB_PADCTL(off) _REG(XUSB_PADCTL_BASE, off) -#define XUSB_DEV(off) _REG(XUSB_DEV_BASE, off) -#define XUSB_DEV_XHCI(off) _REG(XUSB_DEV_BASE, off) -#define XUSB_DEV_PCI(off) _REG(XUSB_DEV_BASE + 0x8000, off) -#define XUSB_DEV_DEV(off) _REG(XUSB_DEV_BASE + 0x9000, off) -#define MIPI_CAL(off) _REG(MIPI_CAL_BASE, off) -#define CL_DVFS(off) _REG(CL_DVFS_BASE, off) -#define I2S(off) _REG(I2S_BASE, off) -#define ADMA(off) _REG(ADMA_BASE, off) -#define USB(off) _REG(USB_BASE, off) -#define USB1(off) _REG(USB1_BASE, off) -#define TEST_REG(off) _REG(0x0, off) +#define HOST1X(off) MMIO_REG32(HOST1X_BASE, off) +#define BPMP_CACHE_CTRL(off) MMIO_REG32(BPMP_CACHE_BASE, off) +#define MSELECT(off) MMIO_REG32(MSELECT_BASE, off) +#define DPAUX1(off) MMIO_REG32(DPAUX1_BASE, off) +#define TSEC2(off) MMIO_REG32(TSEC2_BASE, off) +#define DISPLAY_A(off) MMIO_REG32(DISPLAY_A_BASE, off) +#define DISPLAY_B(off) MMIO_REG32(DISPLAY_B_BASE, off) +#define DSI(off) MMIO_REG32(DSI_BASE, off) +#define VIC(off) MMIO_REG32(VIC_BASE, off) +#define NVJPG(off) MMIO_REG32(NVJPG_BASE, off) +#define NVDEC(off) MMIO_REG32(NVDEC_BASE, off) +#define NVENC(off) MMIO_REG32(NVENC_BASE, off) +#define TSEC(off) MMIO_REG32(TSEC_BASE, off) +#define SOR1(off) MMIO_REG32(SOR1_BASE, off) +#define GPU(off) MMIO_REG32(GPU_BASE, off) +#define GPU_USER(off) MMIO_REG32(GPU_USER_BASE, off) +#define ICTLR(cidx, off) MMIO_REG32(ICTLR_BASE + (0x100 * (cidx)), off) +#define TMR(off) MMIO_REG32(TMR_BASE, off) +#define CLOCK(off) MMIO_REG32(CLOCK_BASE, off) +#define FLOW_CTLR(off) MMIO_REG32(FLOW_CTLR_BASE, off) +#define AHBDMA(off) MMIO_REG32(AHBDMA_BASE, off) +#define SYSREG(off) MMIO_REG32(SYSREG_BASE, off) +#define AHB_GIZMO(off) MMIO_REG32(SYSREG_BASE, off) +#define SB(off) MMIO_REG32(SB_BASE, off) +#define ACTMON(off) MMIO_REG32(ACTMON_BASE, off) +#define GPIO(off) MMIO_REG32(GPIO_BASE, off) +#define EXCP_VEC(off) MMIO_REG32(EXCP_VEC_BASE, off) +#define APBDMA(off) MMIO_REG32(APBDMA_BASE, off) +#define VGPIO(off) MMIO_REG32(VGPIO_BASE, off) +#define APB_MISC(off) MMIO_REG32(APB_MISC_BASE, off) +#define PINMUX_AUX(off) MMIO_REG32(PINMUX_AUX_BASE, off) +#define PWM(off) MMIO_REG32(PWM_BASE, off) +#define RTC(off) MMIO_REG32(RTC_BASE, off) +#define PMC(off) MMIO_REG32(PMC_BASE, off) +#define SYSCTR0(off) MMIO_REG32(SYSCTR0_BASE, off) +#define SYSCTR1(off) MMIO_REG32(SYSCTR1_BASE, off) +#define FUSE(off) MMIO_REG32(FUSE_BASE, off) +#define KFUSE(off) MMIO_REG32(KFUSE_BASE, off) +#define SE(off) MMIO_REG32(SE_BASE, off) +#define MC(off) MMIO_REG32(MC_BASE, off) +#define EMC(off) MMIO_REG32(EMC_BASE, off) +#define EMC_CH0(off) MMIO_REG32(EMC0_BASE, off) +#define EMC_CH1(off) MMIO_REG32(EMC1_BASE, off) +#define XUSB_HOST(off) MMIO_REG32(XUSB_HOST_BASE, off) +#define XUSB_PADCTL(off) MMIO_REG32(XUSB_PADCTL_BASE, off) +#define XUSB_DEV(off) MMIO_REG32(XUSB_DEV_BASE, off) +#define XUSB_DEV_XHCI(off) MMIO_REG32(XUSB_DEV_BASE, off) +#define XUSB_DEV_PCI(off) MMIO_REG32(XUSB_DEV_BASE + 0x8000, off) +#define XUSB_DEV_DEV(off) MMIO_REG32(XUSB_DEV_BASE + 0x9000, off) +#define MIPI_CAL(off) MMIO_REG32(MIPI_CAL_BASE, off) +#define CL_DVFS(off) MMIO_REG32(CL_DVFS_BASE, off) +#define I2S(off) MMIO_REG32(I2S_BASE, off) +#define ADMA(off) MMIO_REG32(ADMA_BASE, off) +#define SE2(off) MMIO_REG32(SE2_BASE, off) +#define SE_PKA1(off) MMIO_REG32(SE_PKA1_BASE, off) +#define USB(off) MMIO_REG32(USB_BASE, off) +#define USB1(off) MMIO_REG32(USB1_BASE, off) +#define TEST_REG(off) MMIO_REG32(0x0, off) /* HOST1X v3 registers. */ #define HOST1X_CH0_SYNC_BASE 0x2100 @@ -205,6 +225,12 @@ #define GP_HIDREV_MAJOR_T210 0x1 #define GP_HIDREV_MAJOR_T210B01 0x2 #define APB_MISC_GP_ASDBGREG 0x810 +#define APB_MISC_GP_TRANSACTOR_SCRATCH 0x864 +#define APB_MISC_GP_AVP_TRANSACTOR_SCRATCH 0x880 +#define APB_MISC_GP_CPU0_TRANSACTOR_SCRATCH 0x884 +#define APB_MISC_GP_CPU1_TRANSACTOR_SCRATCH 0x888 +#define APB_MISC_GP_CPU2_TRANSACTOR_SCRATCH 0x88C +#define APB_MISC_GP_CPU3_TRANSACTOR_SCRATCH 0x890 #define APB_MISC_GP_AUD_MCLK_CFGPADCTRL 0x8F4 #define APB_MISC_GP_LCD_BL_PWM_CFGPADCTRL 0xA34 #define APB_MISC_GP_SDMMC1_PAD_CFGPADCTRL 0xA98 @@ -252,6 +278,12 @@ #define SYSCTR0_COUNTERID10 0xFF8 #define SYSCTR0_COUNTERID11 0xFFC +/*! IPATCH registers. */ +#define IPATCH_CAM_VALID 0x0 +#define IPATCH_CAM_BASE 0x4 +#define IPATCH_CAM(i) (IPATCH_CAM_BASE + (i) * 4) +#define IPATCH_CAM_ENTRIES 12 + /*! I2S registers. */ #define I2S1_CG 0x88 #define I2S1_CTRL 0xA0 diff --git a/bdk/soc/uart.c b/bdk/soc/uart.c index 228ac01..a2efaab 100644 --- a/bdk/soc/uart.c +++ b/bdk/soc/uart.c @@ -21,11 +21,11 @@ #include /* UART A, B, C, D and E. */ -static const u32 uart_baseoff[5] = { 0, 0x40, 0x200, 0x300, 0x400 }; +static const u16 _uart_base_offsets[5] = { 0, 0x40, 0x200, 0x300, 0x400 }; void uart_init(u32 idx, u32 baud, u32 mode) { - uart_t *uart = (uart_t *)(UART_BASE + uart_baseoff[idx]); + uart_t *uart = (uart_t *)(UART_BASE + (u32)_uart_base_offsets[idx]); // Make sure no data is being sent. if (!(mode & (UART_MCR_CTS_EN | UART_MCR_DTR))) @@ -70,7 +70,7 @@ void uart_init(u32 idx, u32 baud, u32 mode) void uart_wait_xfer(u32 idx, u32 which) { - uart_t *uart = (uart_t *)(UART_BASE + uart_baseoff[idx]); + uart_t *uart = (uart_t *)(UART_BASE + (u32)_uart_base_offsets[idx]); if (UART_TX_IDLE & which) { while (!(uart->UART_LSR & UART_LSR_TMTY)) @@ -85,7 +85,7 @@ void uart_wait_xfer(u32 idx, u32 which) void uart_send(u32 idx, const u8 *buf, u32 len) { - uart_t *uart = (uart_t *)(UART_BASE + uart_baseoff[idx]); + uart_t *uart = (uart_t *)(UART_BASE + (u32)_uart_base_offsets[idx]); for (u32 i = 0; i != len; i++) { @@ -97,7 +97,7 @@ void uart_send(u32 idx, const u8 *buf, u32 len) u32 uart_recv(u32 idx, u8 *buf, u32 len) { - uart_t *uart = (uart_t *)(UART_BASE + uart_baseoff[idx]); + uart_t *uart = (uart_t *)(UART_BASE + (u32)_uart_base_offsets[idx]); bool manual_mode = uart->UART_MCR & UART_MCR_RTS; u32 timeout = get_tmr_us() + 250; u32 i; @@ -127,7 +127,7 @@ out: void uart_invert(u32 idx, bool enable, u32 invert_mask) { - uart_t *uart = (uart_t *)(UART_BASE + uart_baseoff[idx]); + uart_t *uart = (uart_t *)(UART_BASE + (u32)_uart_base_offsets[idx]); if (enable) uart->UART_IRDA_CSR |= invert_mask; @@ -138,7 +138,7 @@ void uart_invert(u32 idx, bool enable, u32 invert_mask) void uart_set_mode(u32 idx, u32 mode) { - uart_t *uart = (uart_t *)(UART_BASE + uart_baseoff[idx]); + uart_t *uart = (uart_t *)(UART_BASE + (u32)_uart_base_offsets[idx]); uart->UART_MCR = mode; (void)uart->UART_SPR; @@ -146,7 +146,7 @@ void uart_set_mode(u32 idx, u32 mode) u32 uart_get_IIR(u32 idx) { - uart_t *uart = (uart_t *)(UART_BASE + uart_baseoff[idx]); + uart_t *uart = (uart_t *)(UART_BASE + (u32)_uart_base_offsets[idx]); u32 iir = uart->UART_IIR_FCR & UART_IIR_INT_MASK; @@ -158,7 +158,7 @@ u32 uart_get_IIR(u32 idx) void uart_set_IIR(u32 idx) { - uart_t *uart = (uart_t *)(UART_BASE + uart_baseoff[idx]); + uart_t *uart = (uart_t *)(UART_BASE + (u32)_uart_base_offsets[idx]); uart->UART_IER_DLAB &= ~UART_IER_DLAB_IE_EORD; (void)uart->UART_SPR; @@ -168,7 +168,7 @@ void uart_set_IIR(u32 idx) void uart_empty_fifo(u32 idx, u32 which) { - uart_t *uart = (uart_t *)(UART_BASE + uart_baseoff[idx]); + uart_t *uart = (uart_t *)(UART_BASE + (u32)_uart_base_offsets[idx]); uart->UART_MCR = 0; (void)uart->UART_SPR; diff --git a/bdk/storage/sdmmc_driver.c b/bdk/storage/sdmmc_driver.c index 0797bff..7243e2a 100644 --- a/bdk/storage/sdmmc_driver.c +++ b/bdk/storage/sdmmc_driver.c @@ -39,12 +39,7 @@ #endif /*! SCMMC controller base addresses. */ -static const u32 _sdmmc_bases[4] = { - 0x700B0000, - 0x700B0200, - 0x700B0400, - 0x700B0600, -}; +static const u16 _sdmmc_base_offsets[4] = { 0x0, 0x200, 0x400, 0x600 }; int sdmmc_get_io_power(sdmmc_t *sdmmc) { @@ -1380,7 +1375,7 @@ int sdmmc_init(sdmmc_t *sdmmc, u32 id, u32 power, u32 bus_width, u32 type) memset(sdmmc, 0, sizeof(sdmmc_t)); - sdmmc->regs = (t210_sdmmc_t *)_sdmmc_bases[id]; + sdmmc->regs = (t210_sdmmc_t *)(SDMMC_BASE + (u32)_sdmmc_base_offsets[id]); sdmmc->id = id; sdmmc->clock_stopped = 1; sdmmc->t210b01 = hw_get_chip_id() == GP_HIDREV_MAJOR_T210B01; From 1cc97ebc51a38bb4e22ae641645503f7174e1150 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Mon, 31 Jul 2023 17:03:15 +0300 Subject: [PATCH 022/308] bdk: update various comments --- bdk/mem/sdram.h | 11 +++++------ bdk/power/max7762x.h | 21 +++++++++++++++++++++ bdk/power/max77812.h | 12 ++++++------ 3 files changed, 32 insertions(+), 12 deletions(-) diff --git a/bdk/mem/sdram.h b/bdk/mem/sdram.h index 6b2ea5e..3c573b3 100644 --- a/bdk/mem/sdram.h +++ b/bdk/mem/sdram.h @@ -59,27 +59,27 @@ enum sdram_ids_mariko LPDDR4X_IOWA_4GB_HYNIX_H9HCNNNBKMMLXR_NEE = 6, // Replaced from Copper. Die-M. (1y-01). // LPDDR4X 3733Mbps. - LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AM_MGCJ = 8, // Die-M. 1st gen. 8 banks. 3733Mbps. + LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AM_MGCJ = 8, // Die-M. 1st gen. 3733Mbps. LPDDR4X_IOWA_8GB_SAMSUNG_K4UBE3D4AM_MGCJ = 9, // Die-M. LPDDR4X_IOWA_4GB_HYNIX_H9HCNNNBKMMLHR_NME = 10, // Die-M. LPDDR4X_IOWA_4GB_MICRON_MT53E512M32D2NP_046_WTE = 11, // 4266Mbps. Die-E. D9WGB. - LPDDR4X_HOAG_4GB_SAMSUNG_K4U6E3S4AM_MGCJ = 12, // Die-M. 1st gen. 8 banks. 3733Mbps. + LPDDR4X_HOAG_4GB_SAMSUNG_K4U6E3S4AM_MGCJ = 12, // Die-M. 1st gen. 3733Mbps. LPDDR4X_HOAG_8GB_SAMSUNG_K4UBE3D4AM_MGCJ = 13, // Die-M. LPDDR4X_HOAG_4GB_HYNIX_H9HCNNNBKMMLHR_NME = 14, // Die-M. LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D2NP_046_WTE = 15, // 4266Mbps. Die-E. D9WGB. // LPDDR4X 4266Mbps. - LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AA_MGCL = 17, // Die-A. (1y-X03). 2nd gen. 8 banks. 4266Mbps. + LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AA_MGCL = 17, // Die-A. (1y-X03). 2nd gen. 4266Mbps. LPDDR4X_IOWA_8GB_SAMSUNG_K4UBE3D4AA_MGCL = 18, // Die-A. (1y-X03). - LPDDR4X_HOAG_4GB_SAMSUNG_K4U6E3S4AA_MGCL = 19, // Die-A. (1y-X03). 2nd gen. 8 banks. 4266Mbps. + LPDDR4X_HOAG_4GB_SAMSUNG_K4U6E3S4AA_MGCL = 19, // Die-A. (1y-X03). 2nd gen. 4266Mbps. LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AB_MGCL = 20, // Die-B. 1z nm. 40% lower power usage. (1z-01). LPDDR4X_HOAG_4GB_SAMSUNG_K4U6E3S4AB_MGCL = 21, // Die-B. 1z nm. 40% lower power usage. (1z-01). LPDDR4X_AULA_4GB_SAMSUNG_K4U6E3S4AB_MGCL = 22, // Die-B. 1z nm. 40% lower power usage. (1z-01). LPDDR4X_HOAG_8GB_SAMSUNG_K4UBE3D4AA_MGCL = 23, // Die-A. (1y-X03). - LPDDR4X_AULA_4GB_SAMSUNG_K4U6E3S4AA_MGCL = 24, // Die-A. (1y-X03). 2nd gen. 8 banks. 4266Mbps. + LPDDR4X_AULA_4GB_SAMSUNG_K4U6E3S4AA_MGCL = 24, // Die-A. (1y-X03). 2nd gen. 4266Mbps. LPDDR4X_IOWA_4GB_MICRON_MT53E512M32D2NP_046_WTF = 25, // 4266Mbps. Die-F. D9XRR. 10nm-class (1y-01). LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D2NP_046_WTF = 26, // 4266Mbps. Die-F. D9XRR. 10nm-class (1y-01). @@ -111,7 +111,6 @@ enum sdram_codes_mariko LPDDR4X_4GB_SAMSUNG_K4U6E3S4AB_MGCL = 5, // DRAM IDs: 20, 21, 22. LPDDR4X_4GB_MICRON_MT53E512M32D2NP_046_WTF = 6, // DRAM IDs: 25, 26, 27. LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEE = 7, // DRAM IDs: 03, 05, 06. - LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEI = 8, // DRAM IDs: 29, 30, 31. LPDDR4X_4GB_MICRON_1A = 9, // DRAM IDs: 32, 33, 34. }; diff --git a/bdk/power/max7762x.h b/bdk/power/max7762x.h index afacf8e..342f40b 100644 --- a/bdk/power/max7762x.h +++ b/bdk/power/max7762x.h @@ -47,6 +47,27 @@ * ldo8 | XUSB, DP, MCU | 50000 | 800000 | 1050000 | 2800000 | 1.05V/2.8V (pcv) */ + +// GPIOs T210: 3: 3.3V, 5: CPU PMIC, 6: GPU PMIC, 7: DSI/VI 1.2V powered by ldo0. + +/* + * OTP: T210 - T210B01: + * SD0: 1.0V 1.05V - SoC. EN Based on FPSSRC. + * SD1: 1.15V 1.1V - DRAM for T210. EN Based on FPSSRC. + * SD2: 1.35V 1.35V + * SD3: 1.8V 1.8V + * All powered off? + * LDO0: -- -- - Display + * LDO1: 1.05V 1.05V + * LDO2: -- -- - SD + * LDO3: 3.1V 3.1V - GC ASIC + * LDO4: 1.0V 0.8V - Needed for RTC domain on T210. + * LDO5: 3.1V 3.1V + * LDO6: 2.8V 2.9V - Touch. + * LDO7: 1.05V 1.0V + * LDO8: 1.05V 1.0V + */ + /* * MAX77620_AME_GPIO: control GPIO modes (bits 0 - 7 correspond to GPIO0 - GPIO7); 0 -> GPIO, 1 -> alt-mode * MAX77620_REG_GPIOx: 0x9 sets output and enable diff --git a/bdk/power/max77812.h b/bdk/power/max77812.h index cdd2899..b58e3ae 100644 --- a/bdk/power/max77812.h +++ b/bdk/power/max77812.h @@ -75,14 +75,14 @@ #define MAX77812_REG_GLB_CFG3 0x35 /*! Protected area and settings only for MAX77812_ES2_VERSION */ -#define MAX77812_REG_GLB_CFG4 0x36 -#define MAX77812_REG_GLB_CFG5 0x37 // HOS: 0x3E. Unmasked write. -#define MAX77812_REG_GLB_CFG6 0x38 // HOS: 0x90. Unmasked write. -#define MAX77812_REG_GLB_CFG7 0x39 -#define MAX77812_REG_GLB_CFG8 0x3A // HOS: 0x3A. Unmasked write. +#define MAX77812_REG_GLB_CFG4 0x36 // QS: 0xBB. +#define MAX77812_REG_GLB_CFG5 0x37 // QS: 0x39. ES2: Set to 0x3E. +#define MAX77812_REG_GLB_CFG6 0x38 // QS: 0x88. ES2: Set to 0x90. +#define MAX77812_REG_GLB_CFG7 0x39 // QS: 0x04. +#define MAX77812_REG_GLB_CFG8 0x3A // QS: 0x3A. ES2: Set to 0x3A. #define MAX77812_REG_PROT_ACCESS 0xFD // 0x00: Lock, 0x5A: Unlock. -#define MAX77812_REG_MAX 0xFD +#define MAX77812_REG_UNKNOWN 0xFE #define MAX77812_REG_EN_CTRL_MASK(n) BIT(n) #define MAX77812_START_SLEW_RATE_MASK 0x07 From bb0a1fd0a2ff1984e7911906a0ea53095c6b580a Mon Sep 17 00:00:00 2001 From: CTCaer Date: Mon, 31 Jul 2023 17:05:09 +0300 Subject: [PATCH 023/308] minerva: add freqs up to 2366 MHz --- modules/hekate_libsys_minerva/sys_sdrammtc.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/modules/hekate_libsys_minerva/sys_sdrammtc.c b/modules/hekate_libsys_minerva/sys_sdrammtc.c index fd522ac..9245ed2 100644 --- a/modules/hekate_libsys_minerva/sys_sdrammtc.c +++ b/modules/hekate_libsys_minerva/sys_sdrammtc.c @@ -90,6 +90,13 @@ static pllm_clk_config_t pllm_clk_config_table[] = {38400, 2064000, 215, 4, 0}, // Custom. Normalized 2066 MHz. {38400, 2099200, 164, 3, 0}, // Custom. Normalized 2100 MHz. {38400, 2131200, 111, 2, 0}, // JEDEC Standard. (T210B01 official max). + {38400, 2163200, 169, 3, 0}, // Custom. Normalized 2166 MHz. + {38400, 2188800, 57, 1, 0}, // Custom. Normalized 2200 MHz. + {38400, 2227200, 58, 1, 0}, // Custom. Normalized 2233 MHz. + {38400, 2265600, 59, 1, 0}, // Custom. Normalized 2266 MHz. + {38400, 2291200, 179, 3, 0}, // Custom. Normalized 2300 MHz. + {38400, 2329600, 182, 3, 0}, // Custom. Normalized 2333 MHz. + {38400, 2361600, 123, 2, 0}, // Custom. Normalized 2366 MHz. {0, 0, 0, 0, 0} }; From 09b1efe2a4d74784b6adad825bd0cc43c0db5f8d Mon Sep 17 00:00:00 2001 From: CTCaer Date: Mon, 31 Jul 2023 17:09:04 +0300 Subject: [PATCH 024/308] nyx: info: use updated defines --- nyx/nyx_gui/frontend/gui_info.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index d0a0f09..9f47f57 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -132,20 +132,20 @@ static lv_res_t _bootrom_dump_window_action(lv_obj_t * btn) error = 255; emmcsn_path_impl(path, "/dumps", "bootrom_patched.bin", NULL); - int res = sd_save_to_file((u8 *)BOOTROM_BASE, BOOTROM_SIZE, path); + int res = sd_save_to_file((u8 *)IROM_BASE, BOOTROM_SIZE, path); if (!error) error = res; - u32 ipatch_backup[14]; - memcpy(ipatch_backup, (void *)IPATCH_BASE, sizeof(ipatch_backup)); - memset((void*)IPATCH_BASE, 0, sizeof(ipatch_backup)); + u32 ipatch_cam[IPATCH_CAM_ENTRIES + 1]; + memcpy(ipatch_cam, (void *)IPATCH_BASE, sizeof(ipatch_cam)); + memset((void*)IPATCH_BASE, 0, sizeof(ipatch_cam)); // Zeroing valid entries is enough but zero everything. emmcsn_path_impl(path, "/dumps", "bootrom_unpatched.bin", NULL); - res = sd_save_to_file((u8 *)BOOTROM_BASE, BOOTROM_SIZE, path); + res = sd_save_to_file((u8 *)IROM_BASE, BOOTROM_SIZE, path); if (!error) error = res; - memcpy((void*)IPATCH_BASE, ipatch_backup, sizeof(ipatch_backup)); + memcpy((void*)IPATCH_BASE, ipatch_cam, sizeof(ipatch_cam)); sd_unmount(); } @@ -975,7 +975,7 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) static char *ipatches_txt; static void _ipatch_process(u32 offset, u32 value) { - s_printf(ipatches_txt + strlen(ipatches_txt), "%6X %4X ", BOOTROM_BASE + offset, value); + s_printf(ipatches_txt + strlen(ipatches_txt), "%6X %4X ", IROM_BASE + offset, value); u8 lo = value & 0xFF; switch (value >> 8) { From f2bdc3f47cde3fb9aaf723e64366d3cbae2a712c Mon Sep 17 00:00:00 2001 From: CTCaer Date: Mon, 7 Aug 2023 21:02:20 +0300 Subject: [PATCH 025/308] bdk: i2c: fix stack buffer overflow --- bdk/soc/i2c.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bdk/soc/i2c.c b/bdk/soc/i2c.c index 9a8aefe..81f783c 100644 --- a/bdk/soc/i2c.c +++ b/bdk/soc/i2c.c @@ -386,7 +386,7 @@ int i2c_recv_buf_big(u8 *buf, u32 size, u32 i2c_idx, u32 dev_addr, u32 reg) int i2c_send_buf_small(u32 i2c_idx, u32 dev_addr, u32 reg, u8 *buf, u32 size) { - u8 tmp[4]; + u8 tmp[8]; if (size > 7) return 0; From 6de29094fe65acd7a0255f1ea0cef52892b8d32a Mon Sep 17 00:00:00 2001 From: CTCaer Date: Mon, 7 Aug 2023 21:09:37 +0300 Subject: [PATCH 026/308] nyx: gfx: add column control gfx_getpos/setpos can now get/set column offset. setpos column can be fully custom. Otherwise GFX_COL_KEEP or GFX_COL_AUTO (2 columns) can be used. Additionally, always restore column when printing debug info in log screen. --- nyx/nyx_gui/frontend/gui.c | 24 +++++++------- nyx/nyx_gui/gfx/gfx.c | 67 +++++++++++++++++++++++--------------- nyx/nyx_gui/gfx/gfx.h | 9 +++-- nyx/nyx_gui/nyx.c | 2 +- 4 files changed, 61 insertions(+), 41 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui.c b/nyx/nyx_gui/frontend/gui.c index 6dd4506..01ce904 100644 --- a/nyx/nyx_gui/frontend/gui.c +++ b/nyx/nyx_gui/frontend/gui.c @@ -352,14 +352,14 @@ static bool _fts_touch_read(lv_indev_data_t *data) if (console_enabled) { // Print input debugging in console. - gfx_con_getpos(&gfx_con.savedx, &gfx_con.savedy); - gfx_con_setpos(32, 638); + gfx_con_getpos(&gfx_con.savedx, &gfx_con.savedy, &gfx_con.savedcol); + gfx_con_setpos(32, 638, GFX_COL_AUTO); gfx_con.fntsz = 8; gfx_printf("x: %4d, y: %4d | z: %3d | ", touchpad.x, touchpad.y, touchpad.z); - gfx_printf("1: %02x, 2: %02x, 3: %02x, ", touchpad.raw[1], touchpad.raw[2], touchpad.raw[3]); - gfx_printf("4: %02X, 5: %02x, 6: %02x, 7: %02x", + gfx_printf("1: %02X, 2: %02X, 3: %02X, ", touchpad.raw[1], touchpad.raw[2], touchpad.raw[3]); + gfx_printf("4: %02X, 5: %02X, 6: %02X, 7: %02X", touchpad.raw[4], touchpad.raw[5], touchpad.raw[6], touchpad.raw[7]); - gfx_con_setpos(gfx_con.savedx, gfx_con.savedy); + gfx_con_setpos(gfx_con.savedx, gfx_con.savedy, gfx_con.savedcol); gfx_con.fntsz = 16; return false; @@ -470,10 +470,10 @@ static bool _jc_virt_mouse_read(lv_indev_data_t *data) { display_activate_console(); console_enabled = true; - gfx_con_getpos(&gfx_con.savedx, &gfx_con.savedy); - gfx_con_setpos(964, 630); + gfx_con_getpos(&gfx_con.savedx, &gfx_con.savedy, &gfx_con.savedcol); + gfx_con_setpos(964, 630, GFX_COL_AUTO); gfx_printf("Press -/+ to close"); - gfx_con_setpos(gfx_con.savedx, gfx_con.savedy); + gfx_con_setpos(gfx_con.savedx, gfx_con.savedy, gfx_con.savedcol); } else { @@ -491,14 +491,14 @@ static bool _jc_virt_mouse_read(lv_indev_data_t *data) if (console_enabled) { // Print input debugging in console. - gfx_con_getpos(&gfx_con.savedx, &gfx_con.savedy); - gfx_con_setpos(32, 630); + gfx_con_getpos(&gfx_con.savedx, &gfx_con.savedy, &gfx_con.savedcol); + gfx_con_setpos(32, 630, GFX_COL_AUTO); gfx_con.fntsz = 8; - gfx_printf("x: %4X, y: %4X | b: %06X | bt: %d %d | cx: %03X - %03x, cy: %03X - %03x", + gfx_printf("x: %4X, y: %4X | b: %06X | bt: %d %d | cx: %03X - %03X, cy: %03X - %03X", jc_pad->lstick_x, jc_pad->lstick_y, jc_pad->buttons, jc_pad->batt_info_l, jc_pad->batt_info_r, jc_drv_ctx.cx_min, jc_drv_ctx.cx_max, jc_drv_ctx.cy_min, jc_drv_ctx.cy_max); - gfx_con_setpos(gfx_con.savedx, gfx_con.savedy); + gfx_con_setpos(gfx_con.savedx, gfx_con.savedy, gfx_con.savedcol); gfx_con.fntsz = 16; data->state = LV_INDEV_STATE_REL; diff --git a/nyx/nyx_gui/gfx/gfx.c b/nyx/nyx_gui/gfx/gfx.c index 5b38779..548986e 100644 --- a/nyx/nyx_gui/gfx/gfx.c +++ b/nyx/nyx_gui/gfx/gfx.c @@ -19,6 +19,8 @@ #include #include "gfx.h" +#define COLUMN2_X 640 + // Global gfx console and context. gfx_ctxt_t gfx_ctxt; gfx_con_t gfx_con; @@ -150,6 +152,7 @@ void gfx_con_init() gfx_con.fntsz = 16; gfx_con.x = 0; gfx_con.y = 0; + gfx_con.col = 0; gfx_con.savedx = 0; gfx_con.savedy = 0; gfx_con.fgcol = TXT_CLR_DEFAULT; @@ -167,20 +170,32 @@ void gfx_con_setcol(u32 fgcol, int fillbg, u32 bgcol) gfx_con.bgcol = bgcol; } -void gfx_con_getpos(u32 *x, u32 *y) +void gfx_con_getpos(u32 *x, u32 *y, u32 *c) { *x = gfx_con.x; *y = gfx_con.y; + *c = gfx_con.col; } -static int gfx_column = 0; -void gfx_con_setpos(u32 x, u32 y) +void gfx_con_setpos(u32 x, u32 y, u32 c) { gfx_con.x = x; gfx_con.y = y; - if (!x) - gfx_column = 0; + switch (c) + { + case GFX_COL_KEEP: + break; + case GFX_COL_AUTO: + if (x < COLUMN2_X) + gfx_con.col = 0; + else + gfx_con.col = COLUMN2_X; + break; + default: + gfx_con.col = c; + break; + } } void gfx_putc(char c) @@ -216,33 +231,33 @@ void gfx_putc(char c) gfx_con.x += 16; if (gfx_con.x > gfx_ctxt.width - 16) { - gfx_con.x = gfx_column; + gfx_con.x = gfx_con.col; gfx_con.y += 16; if (gfx_con.y > gfx_ctxt.height - 33) { gfx_con.y = 0; - if (!gfx_column) - gfx_column = 640; + if (!gfx_con.col) + gfx_con.col = COLUMN2_X; else - gfx_column = 0; - gfx_con.x = gfx_column; + gfx_con.col = 0; + gfx_con.x = gfx_con.col; } } } else if (c == '\n') { - gfx_con.x = gfx_column; + gfx_con.x = gfx_con.col; gfx_con.y += 16; if (gfx_con.y > gfx_ctxt.height - 33) { gfx_con.y = 0; - if (!gfx_column) - gfx_column = 640; + if (!gfx_con.col) + gfx_con.col = COLUMN2_X; else - gfx_column = 0; - gfx_con.x = gfx_column; + gfx_con.col = 0; + gfx_con.x = gfx_con.col; } } break; @@ -265,35 +280,35 @@ void gfx_putc(char c) } } gfx_con.x += 8; - if (gfx_con.x > gfx_ctxt.width / 2 + gfx_column - 8) + if (gfx_con.x > gfx_ctxt.width / 2 + gfx_con.col - 8) { - gfx_con.x = gfx_column; + gfx_con.x = gfx_con.col; gfx_con.y += 8; if (gfx_con.y > gfx_ctxt.height - 33) { gfx_con.y = 0; - if (!gfx_column) - gfx_column = 640; + if (!gfx_con.col) + gfx_con.col = COLUMN2_X; else - gfx_column = 0; - gfx_con.x = gfx_column; + gfx_con.col = 0; + gfx_con.x = gfx_con.col; } } } else if (c == '\n') { - gfx_con.x = gfx_column; + gfx_con.x = gfx_con.col; gfx_con.y += 8; if (gfx_con.y > gfx_ctxt.height - 33) { gfx_con.y = 0; - if (!gfx_column) - gfx_column = 640; + if (!gfx_con.col) + gfx_con.col = COLUMN2_X; else - gfx_column = 0; - gfx_con.x = gfx_column; + gfx_con.col = 0; + gfx_con.x = gfx_con.col; } } break; diff --git a/nyx/nyx_gui/gfx/gfx.h b/nyx/nyx_gui/gfx/gfx.h index f79f099..e8686e0 100644 --- a/nyx/nyx_gui/gfx/gfx.h +++ b/nyx/nyx_gui/gfx/gfx.h @@ -21,6 +21,9 @@ #include +#define GFX_COL_KEEP 0xFFFE +#define GFX_COL_AUTO 0xFFFF + #define TXT_CLR_BG 0xFF000000 // Black. #define TXT_CLR_DEFAULT 0xFFFFFFFF // White. #define TXT_CLR_WARNING 0xFFFFDD00 // Yellow. @@ -55,8 +58,10 @@ typedef struct _gfx_con_t u32 fntsz; u32 x; u32 y; + u32 col; u32 savedx; u32 savedy; + u32 savedcol; u32 fgcol; int fillbg; u32 bgcol; @@ -72,8 +77,8 @@ void gfx_clear_grey(u8 color); void gfx_clear_color(u32 color); void gfx_con_init(); void gfx_con_setcol(u32 fgcol, int fillbg, u32 bgcol); -void gfx_con_getpos(u32 *x, u32 *y); -void gfx_con_setpos(u32 x, u32 y); +void gfx_con_getpos(u32 *x, u32 *y, u32 *c); +void gfx_con_setpos(u32 x, u32 y, u32 c); void gfx_putc(char c); void gfx_puts(const char *s); void gfx_wputs(const char *s); diff --git a/nyx/nyx_gui/nyx.c b/nyx/nyx_gui/nyx.c index f7ffea4..6bc7f4b 100644 --- a/nyx/nyx_gui/nyx.c +++ b/nyx/nyx_gui/nyx.c @@ -348,7 +348,7 @@ static void _show_errors(int sd_error) if (*excp_enabled == EXCP_MAGIC || sd_error) { gfx_clear_grey(0); - gfx_con_setpos(0, 0); + gfx_con_setpos(0, 0, 0); display_backlight_brightness(150, 1000); display_init_framebuffer_log(); display_activate_console(); From 187b6d843e21153c5c33b04281948ac9c545d89a Mon Sep 17 00:00:00 2001 From: CTCaer Date: Mon, 7 Aug 2023 21:11:17 +0300 Subject: [PATCH 027/308] nyx: emummc: allow migrating emummc backup Now if an eMMC backup is not found, emuMMC backup will be used. --- nyx/nyx_gui/frontend/gui_emummc_tools.c | 40 +++++++++++++++++++++---- 1 file changed, 35 insertions(+), 5 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_emummc_tools.c b/nyx/nyx_gui/frontend/gui_emummc_tools.c index 16f2c55..62a5947 100644 --- a/nyx/nyx_gui/frontend/gui_emummc_tools.c +++ b/nyx/nyx_gui/frontend/gui_emummc_tools.c @@ -35,8 +35,8 @@ typedef struct _mbr_ctxt_t u32 sector_start; } mbr_ctxt_t; +static bool emummc_backup; static mbr_ctxt_t mbr_ctx; - static lv_obj_t *emummc_manage_window; static lv_res_t (*emummc_tools)(lv_obj_t *btn); @@ -518,7 +518,10 @@ static void _migrate_sd_backup_file_based() f_open(&fp, "emuMMC/BK00/file_based", FA_CREATE_ALWAYS | FA_WRITE); f_close(&fp); - emmcsn_path_impl(backup_path, "", "", NULL); + if (!emummc_backup) + emmcsn_path_impl(backup_path, "", "", NULL); + else + emmcsn_path_impl(backup_path, "/emummc", "", NULL); // Move BOOT0. s_printf(backup_file_path, "%s/BOOT0", backup_path); @@ -689,9 +692,14 @@ static lv_res_t _create_emummc_migrate_action(lv_obj_t * btns, const char * txt) if (backup) { - s_printf(txt_buf, - "#C7EA46 Found suitable backup for emuMMC!#\n\n" - "#FF8000 Do you want to migrate it?#\n"); + if (!emummc_backup) + s_printf(txt_buf, + "#C7EA46 Found suitable eMMC backup!#\n\n" + "#FF8000 Do you want to migrate it?#\n"); + else + s_printf(txt_buf, + "#C7EA46 Found suitable emuMMC backup!#\n\n" + "#FF8000 Do you want to migrate it?#\n"); lv_mbox_add_btns(mbox, mbox_btn_map, _create_emummc_mig4_action); } else if (emummc) @@ -823,6 +831,8 @@ static lv_res_t _create_mbox_emummc_migrate(lv_obj_t *btn) if (!f_stat(path_buf, NULL)) em_file = true; + emummc_backup = false; + emmcsn_path_impl(path_buf, "", "BOOT0", &emmc_storage); if (!f_stat(path_buf, NULL)) backup = true; @@ -837,6 +847,26 @@ static lv_res_t _create_mbox_emummc_migrate(lv_obj_t *btn) backup = backup && rawnand_backup; + if (!backup) + { + rawnand_backup = false; + emummc_backup = true; + + emmcsn_path_impl(path_buf, "/emummc", "BOOT0", &emmc_storage); + if (!f_stat(path_buf, NULL)) + backup = true; + + emmcsn_path_impl(path_buf, "/emummc", "rawnand.bin", &emmc_storage); + if (!f_stat(path_buf, NULL)) + rawnand_backup = true; + + emmcsn_path_impl(path_buf, "/emummc", "rawnand.bin.00", &emmc_storage); + if (!f_stat(path_buf, NULL)) + rawnand_backup = true; + + backup = backup && rawnand_backup; + } + sd_unmount(); emmc_end(); From 976a02f8bcaefb60df59a602a7dfbafb6ad6f78b Mon Sep 17 00:00:00 2001 From: CTCaer Date: Mon, 7 Aug 2023 21:12:18 +0300 Subject: [PATCH 028/308] nyx: clock: fix year off-by-one --- nyx/nyx_gui/frontend/gui_options.c | 14 ++------------ 1 file changed, 2 insertions(+), 12 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_options.c b/nyx/nyx_gui/frontend/gui_options.c index 9a1f1a1..b523754 100644 --- a/nyx/nyx_gui/frontend/gui_options.c +++ b/nyx/nyx_gui/frontend/gui_options.c @@ -26,6 +26,7 @@ #define CLOCK_MIN_YEAR 2023 #define CLOCK_MAX_YEAR (CLOCK_MIN_YEAR + 10) +#define CLOCK_YEARLIST "2023\n2024\n2025\n2026\n2027\n2028\n2029\n2030\n2031\n2032\n2033" extern hekate_config h_cfg; extern nyx_config n_cfg; @@ -763,18 +764,7 @@ static lv_res_t _create_mbox_clock_edit(lv_obj_t *btn) // Create year roller. lv_obj_t *roller_year = lv_roller_create(h1, NULL); - lv_roller_set_options(roller_year, - "2022\n" - "2023\n" - "2024\n" - "2025\n" - "2026\n" - "2027\n" - "2028\n" - "2029\n" - "2030\n" - "2031\n" - "2032"); + lv_roller_set_options(roller_year, CLOCK_YEARLIST); lv_roller_set_selected(roller_year, time.year, false); lv_roller_set_visible_row_count(roller_year, 3); clock_ctxt.year = roller_year; From fdf0dcc63612a9f5b2ef36213b6f54b227ddb8b9 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Tue, 22 Aug 2023 14:36:23 +0300 Subject: [PATCH 029/308] bdk: joycon: add info about sio imu report --- bdk/input/joycon.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bdk/input/joycon.c b/bdk/input/joycon.c index a33a6ad..06354ea 100644 --- a/bdk/input/joycon.c +++ b/bdk/input/joycon.c @@ -304,7 +304,7 @@ typedef struct _jc_sio_hid_in_rpt_t u8 stick_h_right; u8 stick_m_right; u8 stick_v_right; - u8 siaxis_rpt_num; // Max 15. + u8 siaxis_rpt; // bit0-3: report num. bit4-7: imu type. // Each report is 800 us? jc_hid_in_sixaxis_rpt_t sixaxis[15]; } jc_sio_hid_in_rpt_t; From d73a3fdd7ce4c5cdf438c7a4a5fbbb17b04a8ce5 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Tue, 22 Aug 2023 14:44:27 +0300 Subject: [PATCH 030/308] bdk: sdram: name 1a micron ram chips Again, as with 3rd gen samsung and hynix, that's an educated guess. --- bdk/mem/sdram.c | 6 +++--- bdk/mem/sdram.h | 8 ++++---- bdk/mem/sdram_config_t210b01.inl | 12 ++++++------ 3 files changed, 13 insertions(+), 13 deletions(-) diff --git a/bdk/mem/sdram.c b/bdk/mem/sdram.c index 2f33f7b..5e1fa05 100644 --- a/bdk/mem/sdram.c +++ b/bdk/mem/sdram.c @@ -79,9 +79,9 @@ static const u8 dram_encoding_t210b01[] = { /* 29 */ LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEI, /* 30 */ LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEI, /* 31 */ LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEI, -/* 32 */ LPDDR4X_4GB_MICRON_1A, -/* 33 */ LPDDR4X_4GB_MICRON_1A, -/* 34 */ LPDDR4X_4GB_MICRON_1A, +/* 32 */ LPDDR4X_4GB_MICRON_MT53E512M32D1NP_046_WTB, +/* 33 */ LPDDR4X_4GB_MICRON_MT53E512M32D1NP_046_WTB, +/* 34 */ LPDDR4X_4GB_MICRON_MT53E512M32D1NP_046_WTB, }; #include "sdram_config.inl" diff --git a/bdk/mem/sdram.h b/bdk/mem/sdram.h index 3c573b3..fa1d468 100644 --- a/bdk/mem/sdram.h +++ b/bdk/mem/sdram.h @@ -91,9 +91,9 @@ enum sdram_ids_mariko LPDDR4X_UNK1_4GB_HYNIX_H9HCNNNBKMMLXR_NEI = 30, // Die-M. 1a nm. 61% lower power usage. (1a-01). LPDDR4X_UNK2_4GB_HYNIX_H9HCNNNBKMMLXR_NEI = 31, // Die-M. 1a nm. 61% lower power usage. (1a-01). - LPDDR4X_UNK0_4GB_MICRON_1A = 32, // 1a nm. 61% lower power usage. (1a-01). - LPDDR4X_UNK1_4GB_MICRON_1A = 33, // 1a nm. 61% lower power usage. (1a-01). - LPDDR4X_UNK2_4GB_MICRON_1A = 34, // 1a nm. 61% lower power usage. (1a-01). + LPDDR4X_UNK0_4GB_MICRON_MT53E512M32D1NP_046_WTB = 32, // 1a nm. 61% lower power usage. (1a-01). + LPDDR4X_UNK1_4GB_MICRON_MT53E512M32D1NP_046_WTB = 33, // 1a nm. 61% lower power usage. (1a-01). + LPDDR4X_UNK2_4GB_MICRON_MT53E512M32D1NP_046_WTB = 34, // 1a nm. 61% lower power usage. (1a-01). }; enum sdram_codes_mariko @@ -112,7 +112,7 @@ enum sdram_codes_mariko LPDDR4X_4GB_MICRON_MT53E512M32D2NP_046_WTF = 6, // DRAM IDs: 25, 26, 27. LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEE = 7, // DRAM IDs: 03, 05, 06. LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEI = 8, // DRAM IDs: 29, 30, 31. - LPDDR4X_4GB_MICRON_1A = 9, // DRAM IDs: 32, 33, 34. + LPDDR4X_4GB_MICRON_MT53E512M32D1NP_046_WTB = 9, // DRAM IDs: 32, 33, 34. }; void sdram_init(); diff --git a/bdk/mem/sdram_config_t210b01.inl b/bdk/mem/sdram_config_t210b01.inl index 1fed1f8..8e584b5 100644 --- a/bdk/mem/sdram_config_t210b01.inl +++ b/bdk/mem/sdram_config_t210b01.inl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2022 CTCaer + * Copyright (c) 2020-2023 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -715,7 +715,7 @@ static const sdram_params_t210b01_t _dram_cfg_08_10_12_14_samsung_hynix_4gb = { DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D2NP_046_WTF) | \ DRAM_CC(LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEE) | \ DRAM_CC(LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEI) | \ - DRAM_CC(LPDDR4X_4GB_MICRON_1A) | \ + DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D1NP_046_WTB) | \ DRAM_CC(LPDDR4X_4GB_SAMSUNG_K4U6E3S4AB_MGCL)) #define DRAM_CC_LPDDR4X_DYN_SELF_CTRL (DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D2NP_046_WTE) | \ @@ -723,7 +723,7 @@ static const sdram_params_t210b01_t _dram_cfg_08_10_12_14_samsung_hynix_4gb = { DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D2NP_046_WTF) | \ DRAM_CC(LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEE) | \ DRAM_CC(LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEI) | \ - DRAM_CC(LPDDR4X_4GB_MICRON_1A) | \ + DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D1NP_046_WTB) | \ DRAM_CC(LPDDR4X_4GB_SAMSUNG_K4U6E3S4AB_MGCL)) #define DRAM_CC_LPDDR4X_QUSE_EINPUT (DRAM_CC(LPDDR4X_8GB_SAMSUNG_K4UBE3D4AM_MGCJ) | \ @@ -732,17 +732,17 @@ static const sdram_params_t210b01_t _dram_cfg_08_10_12_14_samsung_hynix_4gb = { DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D2NP_046_WTF) | \ DRAM_CC(LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEE) | \ DRAM_CC(LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEI) | \ - DRAM_CC(LPDDR4X_4GB_MICRON_1A) | \ + DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D1NP_046_WTB) | \ DRAM_CC(LPDDR4X_4GB_SAMSUNG_K4U6E3S4AB_MGCL)) #define DRAM_CC_LPDDR4X_FAW (DRAM_CC(LPDDR4X_8GB_SAMSUNG_K4UBE3D4AA_MGCL) | \ DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D2NP_046_WTF) | \ DRAM_CC(LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEE) | \ - DRAM_CC(LPDDR4X_4GB_MICRON_1A)) + DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D1NP_046_WTB)) #define DRAM_CC_LPDDR4X_VPR (DRAM_CC(LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEE) | \ DRAM_CC(LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEI) | \ - DRAM_CC(LPDDR4X_4GB_MICRON_1A) | \ + DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D1NP_046_WTB) | \ DRAM_CC(LPDDR4X_4GB_SAMSUNG_K4U6E3S4AB_MGCL)) #define DRAM_CC_LPDDR4X_8GB (DRAM_CC(LPDDR4X_8GB_SAMSUNG_K4UBE3D4AM_MGCJ) | \ From 01a8f30925a530ee98e4d9da0da4f4dc35cc4d9b Mon Sep 17 00:00:00 2001 From: CTCaer Date: Tue, 22 Aug 2023 16:44:03 +0300 Subject: [PATCH 031/308] nyx: add contact me for unknown ram chips --- nyx/nyx_gui/frontend/gui_info.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index 9f47f57..bd597f3 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -490,7 +490,8 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) case LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AB_MGCL: case LPDDR4X_HOAG_4GB_SAMSUNG_K4U6E3S4AB_MGCL: case LPDDR4X_AULA_4GB_SAMSUNG_K4U6E3S4AB_MGCL: - strcpy(dram_man, "Samsung K4U6E3S4AB-MGCL 4GB"); + //strcpy(dram_man, "Samsung K4U6E3S4AB-MGCL 4GB"); + strcpy(dram_man, "Samsung 1z 4GB #FF8000 Contact me!#"); break; case LPDDR4X_IOWA_4GB_MICRON_MT53E512M32D2NP_046_WTF: case LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D2NP_046_WTF: @@ -506,12 +507,14 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) case LPDDR4X_UNK0_4GB_HYNIX_H9HCNNNBKMMLXR_NEI: case LPDDR4X_UNK1_4GB_HYNIX_H9HCNNNBKMMLXR_NEI: case LPDDR4X_UNK2_4GB_HYNIX_H9HCNNNBKMMLXR_NEI: - strcpy(dram_man, "Hynix H9HCNNNBKMMLXR-NEI 4GB"); + //strcpy(dram_man, "Hynix H9HCNNNBKMMLXR-NEI 4GB"); + strcpy(dram_man, "Hynix 1a 4GB #FF8000 Contact me!#"); break; - case LPDDR4X_UNK0_4GB_MICRON_1A: - case LPDDR4X_UNK1_4GB_MICRON_1A: - case LPDDR4X_UNK2_4GB_MICRON_1A: + case LPDDR4X_UNK0_4GB_MICRON_MT53E512M32D1NP_046_WTB: + case LPDDR4X_UNK1_4GB_MICRON_MT53E512M32D1NP_046_WTB: + case LPDDR4X_UNK2_4GB_MICRON_MT53E512M32D1NP_046_WTB: + //strcpy(dram_man, "Micron MT53E512M32D1NP-046 WT:B"); strcpy(dram_man, "Micron 1a 4GB #FF8000 Contact me!#"); break; From ce42e27f4565d4923d23d55a60728d34a54ca2ff Mon Sep 17 00:00:00 2001 From: CTCaer Date: Tue, 22 Aug 2023 16:44:41 +0300 Subject: [PATCH 032/308] bdk: minerva: do not handle oc freq Arachne already handles it. --- bdk/mem/minerva.c | 7 +++++-- bdk/mem/minerva.h | 2 +- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/bdk/mem/minerva.c b/bdk/mem/minerva.c index 184689e..44468f9 100644 --- a/bdk/mem/minerva.c +++ b/bdk/mem/minerva.c @@ -171,7 +171,7 @@ void minerva_prep_boot_freq() minerva_change_freq(FREQ_800); } -void minerva_prep_boot_l4t(int oc_freq) +void minerva_prep_boot_l4t(u32 oc_freq) { if (!minerva_cfg) return; @@ -201,7 +201,10 @@ void minerva_prep_boot_l4t(int oc_freq) { mtc_cfg->rate_to = mtc_cfg->mtc_table[i].rate_khz; // Skip already trained frequencies. - if (mtc_cfg->rate_to == FREQ_204 || mtc_cfg->rate_to == FREQ_800 || mtc_cfg->rate_to == FREQ_1600) + if (mtc_cfg->rate_to == FREQ_204 || + mtc_cfg->rate_to == FREQ_800 || + mtc_cfg->rate_to == FREQ_1600 || + mtc_cfg->rate_to == oc_freq) // Skip OC freq since Arachne handles it. continue; // Train frequency. diff --git a/bdk/mem/minerva.h b/bdk/mem/minerva.h index 9f71e83..8e20bbd 100644 --- a/bdk/mem/minerva.h +++ b/bdk/mem/minerva.h @@ -63,7 +63,7 @@ u32 minerva_init(); void minerva_change_freq(minerva_freq_t freq); void minerva_sdmmc_la_program(void *table, bool t210b01); void minerva_prep_boot_freq(); -void minerva_prep_boot_l4t(int oc_freq); +void minerva_prep_boot_l4t(u32 oc_freq); void minerva_periodic_training(); emc_table_t *minerva_get_mtc_table(); int minerva_get_mtc_table_entries(); From e5a22230b1718c91aed42f1eec2f5e6ffe64f562 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Tue, 22 Aug 2023 16:56:59 +0300 Subject: [PATCH 033/308] Bump hekate to v6.0.6 and Nyx to v1.5.5 --- Versions.inc | 4 ++-- bootloader/main.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/Versions.inc b/Versions.inc index 78e6d2d..4b1cb55 100644 --- a/Versions.inc +++ b/Versions.inc @@ -1,11 +1,11 @@ # IPL Version. BLVERSION_MAJOR := 6 BLVERSION_MINOR := 0 -BLVERSION_HOTFX := 5 +BLVERSION_HOTFX := 6 BLVERSION_RSVD := 0 # Nyx Version. NYXVERSION_MAJOR := 1 NYXVERSION_MINOR := 5 -NYXVERSION_HOTFX := 4 +NYXVERSION_HOTFX := 5 NYXVERSION_RSVD := 0 diff --git a/bootloader/main.c b/bootloader/main.c index 3c8fa1e..ea4a4ed 100644 --- a/bootloader/main.c +++ b/bootloader/main.c @@ -1478,7 +1478,7 @@ ment_t ment_top[] = { MDEF_END() }; -menu_t menu_top = { ment_top, "hekate v6.0.5", 0, 0 }; +menu_t menu_top = { ment_top, "hekate v6.0.6", 0, 0 }; extern void pivot_stack(u32 stack_top); From e84367e30218e22123cc1612938fd8876f64ee8c Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 23 Aug 2023 00:10:10 +0300 Subject: [PATCH 034/308] nyx: swap and fix config save text --- nyx/nyx_gui/frontend/gui.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/nyx/nyx_gui/frontend/gui.c b/nyx/nyx_gui/frontend/gui.c index 01ce904..3df00a6 100644 --- a/nyx/nyx_gui/frontend/gui.c +++ b/nyx/nyx_gui/frontend/gui.c @@ -2076,7 +2076,7 @@ static lv_res_t _save_options_action(lv_obj_t *btn) int res = 0; if (sd_mount()) - res = create_config_entry(); + res = !create_config_entry(); if (res) lv_mbox_set_text(mbox, "#FF8000 hekate Configuration#\n\n#96FF00 The configuration was saved to sd card!#"); From ce137852b73347be99f14cff06d0c401faf97b50 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 12 Oct 2023 06:59:15 +0300 Subject: [PATCH 035/308] bdk: change some defines and comments --- bdk/input/joycon.c | 4 +++- bdk/soc/hw_init.c | 2 +- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/bdk/input/joycon.c b/bdk/input/joycon.c index 06354ea..efdcd75 100644 --- a/bdk/input/joycon.c +++ b/bdk/input/joycon.c @@ -43,7 +43,9 @@ #define JC_HORI_INPUT_RPT 0x00 #define JC_WIRED_CMD_GET_INFO 0x01 -#define JC_WIRED_CMD_CHRG_CFG 0x02 +#define JC_WIRED_CMD_SET_CHARGER 0x02 +#define JC_WIRED_CMD_GET_CHARGER 0x03 +#define JC_WIRED_CMD_BATT_VOLT 0x06 #define JC_WIRED_CMD_WAKE_REASON 0x07 #define JC_WIRED_CMD_HID_CONN 0x10 #define JC_WIRED_CMD_HID_DISC 0x11 diff --git a/bdk/soc/hw_init.c b/bdk/soc/hw_init.c index 0c374ca..8771275 100644 --- a/bdk/soc/hw_init.c +++ b/bdk/soc/hw_init.c @@ -367,7 +367,7 @@ void hw_init() uart_invert(DEBUG_UART_PORT, DEBUG_UART_INVERT, UART_INVERT_TXD); #endif - // Enable Dynamic Voltage and Frequency Scaling device clock. + // Enable CL-DVFS clock unconditionally to avoid issues with I2C5 sharing. clock_enable_cl_dvfs(); // Enable clocks to I2C1 and I2CPWR. From 5b13e811419b95c95d06b6b3cc63ea7d44d7a140 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 12 Oct 2023 07:01:28 +0300 Subject: [PATCH 036/308] Adjust about-screens copyright year --- README.md | 4 ++-- bootloader/main.c | 2 +- nyx/nyx_gui/frontend/gui.c | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/README.md b/README.md index fc86022..98a8527 100644 --- a/README.md +++ b/README.md @@ -188,9 +188,9 @@ hekate has a boot storage in the binary that helps it configure it outside of BP ``` hekate (c) 2018, naehrwert, st4rk. - (c) 2018-2022, CTCaer. + (c) 2018-2023, CTCaer. -Nyx GUI (c) 2019-2022, CTCaer. +Nyx GUI (c) 2019-2023, CTCaer. Thanks to: derrek, nedwill, plutoo, shuffle2, smea, thexyz, yellows8. Greetings to: fincs, hexkyz, SciresM, Shiny Quagsire, WinterMute. diff --git a/bootloader/main.c b/bootloader/main.c index ea4a4ed..258945e 100644 --- a/bootloader/main.c +++ b/bootloader/main.c @@ -1383,7 +1383,7 @@ static void _about() { static const char credits[] = "\nhekate (c) 2018, naehrwert, st4rk\n\n" - " (c) 2018-2022, CTCaer\n\n" + " (c) 2018-2023, CTCaer\n\n" " ___________________________________________\n\n" "Thanks to: %kderrek, nedwill, plutoo,\n" " shuffle2, smea, thexyz, yellows8%k\n" diff --git a/nyx/nyx_gui/frontend/gui.c b/nyx/nyx_gui/frontend/gui.c index 3df00a6..8d5ad93 100644 --- a/nyx/nyx_gui/frontend/gui.c +++ b/nyx/nyx_gui/frontend/gui.c @@ -1240,9 +1240,9 @@ static void _create_tab_about(lv_theme_t * th, lv_obj_t * parent) lv_label_set_recolor(lbl_credits, true); lv_label_set_static_text(lbl_credits, "#C7EA46 hekate# (c) 2018, #C7EA46 naehrwert#, #C7EA46 st4rk#\n" - " (c) 2018-2022, #C7EA46 CTCaer#\n" + " (c) 2018-2023, #C7EA46 CTCaer#\n" "\n" - "#C7EA46 Nyx GUI# (c) 2019-2022, #C7EA46 CTCaer#\n" + "#C7EA46 Nyx GUI# (c) 2019-2023, #C7EA46 CTCaer#\n" "\n" "Thanks to: #00CCFF derrek, nedwill, plutoo, #\n" " #00CCFF shuffle2, smea, thexyz, yellows8 #\n" From 613fdf621d6514358d2f923d86bc638727b4725a Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 12 Oct 2023 07:11:22 +0300 Subject: [PATCH 037/308] hos: rename KB defines From KB_FIRMWARE_VERSION to HOS_KB_VERSION --- bootloader/hos/fss.c | 4 +- bootloader/hos/hos.c | 72 +++++++++++++------------- bootloader/hos/hos.h | 39 +++++++------- bootloader/hos/pkg1.c | 16 +++--- bootloader/hos/pkg2.c | 6 +-- bootloader/hos/pkg2.h | 2 +- bootloader/hos/secmon_exo.c | 2 +- nyx/nyx_gui/frontend/fe_emummc_tools.c | 4 +- nyx/nyx_gui/frontend/gui_tools.c | 10 ++-- nyx/nyx_gui/hos/hos.c | 50 +++++++++--------- nyx/nyx_gui/hos/hos.h | 39 +++++++------- nyx/nyx_gui/hos/pkg1.c | 4 +- nyx/nyx_gui/hos/pkg2.c | 8 +-- 13 files changed, 131 insertions(+), 125 deletions(-) diff --git a/bootloader/hos/fss.c b/bootloader/hos/fss.c index 318f341..74e6e0e 100644 --- a/bootloader/hos/fss.c +++ b/bootloader/hos/fss.c @@ -1,7 +1,7 @@ /* * Atmosphère Fusée Secondary Storage (Package3) parser. * - * Copyright (c) 2019-2021 CTCaer + * Copyright (c) 2019-2023 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -120,7 +120,7 @@ int parse_fss(launch_ctxt_t *ctxt, const char *path) bool experimental = false; // Skip if stock and Exosphere and warmboot are not needed. - bool pkg1_old = ctxt->pkg1_id->kb <= KB_FIRMWARE_VERSION_620; // Should check if t210b01? + bool pkg1_old = ctxt->pkg1_id->kb <= HOS_KB_VERSION_620; // Should check if t210b01? bool emummc_disabled = !emu_cfg.enabled || h_cfg.emummc_force_disable; LIST_FOREACH_ENTRY(ini_kv_t, kv, &ctxt->cfg->kvs, link) diff --git a/bootloader/hos/hos.c b/bootloader/hos/hos.c index ea29417..298ed8f 100644 --- a/bootloader/hos/hos.c +++ b/bootloader/hos/hos.c @@ -89,7 +89,7 @@ typedef struct _kb_t u8 padding[0x150]; } kb_t; -static const u8 keyblob_keyseeds[][SE_KEY_128_SIZE] = { +static const u8 keyblob_keyseeds[HOS_KB_VERSION_600 - HOS_KB_VERSION_100 + 1][SE_KEY_128_SIZE] = { { 0xDF, 0x20, 0x6F, 0x59, 0x44, 0x54, 0xEF, 0xDC, 0x70, 0x74, 0x48, 0x3B, 0x0D, 0xED, 0x9F, 0xD3 }, // 1.0.0. { 0x0C, 0x25, 0x61, 0x5D, 0x68, 0x4C, 0xEB, 0x42, 0x1C, 0x23, 0x79, 0xEA, 0x82, 0x25, 0x12, 0xAC }, // 3.0.0. { 0x33, 0x76, 0x85, 0xEE, 0x88, 0x4A, 0xAE, 0x0A, 0xC2, 0x8A, 0xFD, 0x7D, 0x63, 0xC0, 0x43, 0x3B }, // 3.0.1. @@ -111,7 +111,7 @@ static const u8 master_kekseed_620[SE_KEY_128_SIZE] = { 0x37, 0x4B, 0x77, 0x29, 0x59, 0xB4, 0x04, 0x30, 0x81, 0xF6, 0xE5, 0x8C, 0x6D, 0x36, 0x17, 0x9A }; //!TODO: Update on tsec/mkey changes. -static const u8 master_kekseed_t210_tsec_v4[][SE_KEY_128_SIZE] = { +static const u8 master_kekseed_t210_tsec_v4[HOS_KB_VERSION_MAX - HOS_KB_VERSION_810 + 1][SE_KEY_128_SIZE] = { { 0xDE, 0xDC, 0xE3, 0x39, 0x30, 0x88, 0x16, 0xF8, 0xAE, 0x97, 0xAD, 0xEC, 0x64, 0x2D, 0x41, 0x41 }, // 8.1.0. { 0x1A, 0xEC, 0x11, 0x82, 0x2B, 0x32, 0x38, 0x7A, 0x2B, 0xED, 0xBA, 0x01, 0x47, 0x7E, 0x3B, 0x67 }, // 9.0.0. { 0x30, 0x3F, 0x02, 0x7E, 0xD8, 0x38, 0xEC, 0xD7, 0x93, 0x25, 0x34, 0xB5, 0x30, 0xEB, 0xCA, 0x7A }, // 9.1.0. @@ -123,7 +123,7 @@ static const u8 master_kekseed_t210_tsec_v4[][SE_KEY_128_SIZE] = { }; //!TODO: Update on mkey changes. -static const u8 master_kekseed_t210b01[][SE_KEY_128_SIZE] = { +static const u8 master_kekseed_t210b01[HOS_KB_VERSION_MAX - HOS_KB_VERSION_600 + 1][SE_KEY_128_SIZE] = { { 0x77, 0x60, 0x5A, 0xD2, 0xEE, 0x6E, 0xF8, 0x3C, 0x3F, 0x72, 0xE2, 0x59, 0x9D, 0xAC, 0x5E, 0x56 }, // 6.0.0. { 0x1E, 0x80, 0xB8, 0x17, 0x3E, 0xC0, 0x60, 0xAA, 0x11, 0xBE, 0x1A, 0x4A, 0xA6, 0x6F, 0xE4, 0xAE }, // 6.2.0. { 0x94, 0x08, 0x67, 0xBD, 0x0A, 0x00, 0x38, 0x84, 0x11, 0xD3, 0x1A, 0xDB, 0xDD, 0x8D, 0xF1, 0x8A }, // 7.0.0. @@ -302,7 +302,7 @@ void hos_eks_clear(u32 kb) if (h_cfg.t210b01) return; - if (h_cfg.eks && kb >= KB_FIRMWARE_VERSION_700) + if (h_cfg.eks && kb >= HOS_KB_VERSION_700) { // Check if current Master key is enabled. if (h_cfg.eks->enabled) @@ -337,7 +337,7 @@ int hos_keygen_t210b01(u32 kb) se_aes_unwrap_key(10, 14, console_keyseed_4xx); // Derive master key. - se_aes_unwrap_key(7, 12, master_kekseed_t210b01[kb - KB_FIRMWARE_VERSION_600]); + se_aes_unwrap_key(7, 12, master_kekseed_t210b01[kb - HOS_KB_VERSION_600]); se_aes_unwrap_key(7, 7, master_keyseed_retail); // Derive latest pkg2 key. @@ -355,7 +355,7 @@ int hos_keygen(void *keyblob, u32 kb, tsec_ctxt_t *tsec_ctxt, bool stock, bool i tsec_keys_t tsec_keys; kb_t *kb_data = (kb_t *)keyblob; - if (kb > KB_FIRMWARE_VERSION_MAX) + if (kb > HOS_KB_VERSION_MAX) return 0; if (h_cfg.t210b01) @@ -376,15 +376,15 @@ int hos_keygen(void *keyblob, u32 kb, tsec_ctxt_t *tsec_ctxt, bool stock, bool i _hos_eks_get(); // Use tsec keygen for old firmware or if EKS keys does not exist for newer. - if (kb <= KB_FIRMWARE_VERSION_620 || !h_cfg.eks || (h_cfg.eks && h_cfg.eks->enabled != HOS_EKS_TSEC_VER)) + if (kb <= HOS_KB_VERSION_620 || !h_cfg.eks || (h_cfg.eks && h_cfg.eks->enabled != HOS_EKS_TSEC_VER)) use_tsec = true; - if (kb <= KB_FIRMWARE_VERSION_600) + if (kb <= HOS_KB_VERSION_600) { tsec_ctxt->size = 0xF00; tsec_ctxt->type = TSEC_FW_TYPE_OLD; } - else if (kb == KB_FIRMWARE_VERSION_620) + else if (kb == HOS_KB_VERSION_620) { tsec_ctxt->size = 0x2900; tsec_ctxt->type = TSEC_FW_TYPE_EMU; @@ -434,7 +434,7 @@ int hos_keygen(void *keyblob, u32 kb, tsec_ctxt_t *tsec_ctxt, bool stock, bool i } } - if (kb >= KB_FIRMWARE_VERSION_700) + if (kb >= HOS_KB_VERSION_700) { // For 7.0.0 and up, save EKS slot if it doesn't exist. if (use_tsec) @@ -445,8 +445,8 @@ int hos_keygen(void *keyblob, u32 kb, tsec_ctxt_t *tsec_ctxt, bool stock, bool i // Use 8.1.0 for 7.0.0 otherwise the proper one. u32 mkey_idx = 0; - if (kb >= KB_FIRMWARE_VERSION_810) - mkey_idx = kb - KB_FIRMWARE_VERSION_810; + if (kb >= HOS_KB_VERSION_810) + mkey_idx = kb - HOS_KB_VERSION_810; if (!is_exo) { @@ -475,7 +475,7 @@ int hos_keygen(void *keyblob, u32 kb, tsec_ctxt_t *tsec_ctxt, bool stock, bool i se_aes_unwrap_key(8, 13, package2_keyseed); } } - else if (kb == KB_FIRMWARE_VERSION_620) + else if (kb == HOS_KB_VERSION_620) { // Set TSEC key. se_aes_key_set(12, tsec_keys.tsec, SE_KEY_128_SIZE); @@ -552,21 +552,21 @@ int hos_keygen(void *keyblob, u32 kb, tsec_ctxt_t *tsec_ctxt, bool stock, bool i { switch (kb) { - case KB_FIRMWARE_VERSION_100: - case KB_FIRMWARE_VERSION_300: - case KB_FIRMWARE_VERSION_301: + case HOS_KB_VERSION_100: + case HOS_KB_VERSION_300: + case HOS_KB_VERSION_301: se_aes_unwrap_key(13, 15, console_keyseed); se_aes_unwrap_key(12, 12, master_keyseed_retail); break; - case KB_FIRMWARE_VERSION_400: + case HOS_KB_VERSION_400: se_aes_unwrap_key(13, 15, console_keyseed_4xx); se_aes_unwrap_key(15, 15, console_keyseed); se_aes_unwrap_key(14, 12, master_keyseed_4xx); se_aes_unwrap_key(12, 12, master_keyseed_retail); sbk_wiped = true; break; - case KB_FIRMWARE_VERSION_500: - case KB_FIRMWARE_VERSION_600: + case HOS_KB_VERSION_500: + case HOS_KB_VERSION_600: se_aes_unwrap_key(10, 15, console_keyseed_4xx); se_aes_unwrap_key(15, 15, console_keyseed); se_aes_unwrap_key(14, 12, master_keyseed_4xx); @@ -642,7 +642,7 @@ try_load: gfx_printf("Identified pkg1 and mkey %d\n\n", ctxt->pkg1_id->kb); // Read the correct keyblob for older HOS versions. - if (ctxt->pkg1_id->kb <= KB_FIRMWARE_VERSION_600) + if (ctxt->pkg1_id->kb <= HOS_KB_VERSION_600) { ctxt->keyblob = (u8 *)calloc(EMMC_BLOCKSIZE, 1); emummc_storage_read(PKG1_HOS_KEYBLOBS_OFFSET / EMMC_BLOCKSIZE + ctxt->pkg1_id->kb, 1, ctxt->keyblob); @@ -865,7 +865,7 @@ int hos_launch(ini_sec_t *cfg) if (!ctxt.warmboot || !ctxt.secmon) { // Decrypt PK1 or PK11. - if (kb <= KB_FIRMWARE_VERSION_600 || h_cfg.t210b01) + if (kb <= HOS_KB_VERSION_600 || h_cfg.t210b01) { if (!pkg1_decrypt(ctxt.pkg1_id, ctxt.pkg1)) { @@ -886,7 +886,7 @@ int hos_launch(ini_sec_t *cfg) } // Unpack PK11. - if (h_cfg.t210b01 || (kb <= KB_FIRMWARE_VERSION_620 && !emummc_enabled)) + if (h_cfg.t210b01 || (kb <= HOS_KB_VERSION_620 && !emummc_enabled)) { // Skip T210B01 OEM header. u32 pk1_offset = 0; @@ -925,7 +925,7 @@ int hos_launch(ini_sec_t *cfg) else if (!h_cfg.t210b01) { // Patch warmboot on T210 to allow downgrading. - if (kb >= KB_FIRMWARE_VERSION_700) + if (kb >= HOS_KB_VERSION_700) { _hos_crit_error("No warmboot provided!"); goto error; @@ -1026,7 +1026,7 @@ int hos_launch(ini_sec_t *cfg) pkg2_merge_kip(&kip1_info, (pkg2_kip1_t *)mki->kip1); // Check if FS is compatible with exFAT and if 5.1.0. - if (!ctxt.stock && (sd_fs.fs_type == FS_EXFAT || kb == KB_FIRMWARE_VERSION_500 || ctxt.pkg1_id->fuses == 13)) + if (!ctxt.stock && (sd_fs.fs_type == FS_EXFAT || kb == HOS_KB_VERSION_500 || ctxt.pkg1_id->fuses == 13)) { bool exfat_compat = _get_fs_exfat_compatible(&kip1_info, &ctxt.exo_ctx.hos_revision); @@ -1090,23 +1090,23 @@ int hos_launch(ini_sec_t *cfg) // Finalize per firmware key access. Skip access control if Exosphere 2. switch (kb | (is_exo << 7)) { - case KB_FIRMWARE_VERSION_100: - case KB_FIRMWARE_VERSION_300: - case KB_FIRMWARE_VERSION_301: + case HOS_KB_VERSION_100: + case HOS_KB_VERSION_300: + case HOS_KB_VERSION_301: se_key_acc_ctrl(12, SE_KEY_TBL_DIS_KEY_ACCESS_FLAG | SE_KEY_LOCK_FLAG); se_key_acc_ctrl(13, SE_KEY_TBL_DIS_KEY_ACCESS_FLAG | SE_KEY_LOCK_FLAG); pkg1_state_pkg2_ready = PKG1_STATE_PKG2_READY_OLD; break; - case KB_FIRMWARE_VERSION_400: - case KB_FIRMWARE_VERSION_500: - case KB_FIRMWARE_VERSION_600: + case HOS_KB_VERSION_400: + case HOS_KB_VERSION_500: + case HOS_KB_VERSION_600: se_key_acc_ctrl(12, SE_KEY_TBL_DIS_KEY_ACCESS_FLAG | SE_KEY_LOCK_FLAG); se_key_acc_ctrl(15, SE_KEY_TBL_DIS_KEY_ACCESS_FLAG | SE_KEY_LOCK_FLAG); break; } // Clear BCT area for retail units and copy it over if dev unit. - if (kb <= KB_FIRMWARE_VERSION_500 && !is_exo) + if (kb <= HOS_KB_VERSION_500 && !is_exo) { memset((void *)SECMON_BCT_CFG_ADDR, 0, SZ_4K + SZ_8K); if (fuse_read_hw_state() == FUSE_NX_HW_STATE_DEV) @@ -1120,14 +1120,14 @@ int hos_launch(ini_sec_t *cfg) } // Finalize MC carveout. - if (kb <= KB_FIRMWARE_VERSION_301 && !is_exo) + if (kb <= HOS_KB_VERSION_301 && !is_exo) mc_config_carveout(); // Lock SE before starting 'SecureMonitor' if < 6.2.0, otherwise lock bootrom and ipatches. - _se_lock(kb <= KB_FIRMWARE_VERSION_600 && !is_exo); + _se_lock(kb <= HOS_KB_VERSION_600 && !is_exo); // Reset sysctr0 counters. - if (kb >= KB_FIRMWARE_VERSION_620) + if (kb >= HOS_KB_VERSION_620) { for (u32 i = 0; i < SYSCTR0_COUNTERS; i += sizeof(u32)) SYSCTR0(SYSCTR0_COUNTERS_BASE + i) = 0; @@ -1137,14 +1137,14 @@ int hos_launch(ini_sec_t *cfg) //pmc_scratch_lock(PMC_SEC_LOCK_LP0_PARAMS); // Set secmon mailbox address and clear it. - if (kb >= KB_FIRMWARE_VERSION_700 || is_exo) + if (kb >= HOS_KB_VERSION_700 || is_exo) { memset((void *)SECMON7_MAILBOX_ADDR, 0, 0x200); secmon_mailbox = (secmon_mailbox_t *)(SECMON7_MAILBOX_ADDR + SECMON_STATE_OFFSET); } else { - if (kb <= KB_FIRMWARE_VERSION_301) + if (kb <= HOS_KB_VERSION_301) memset((void *)SECMON_MAILBOX_ADDR, 0, 0x200); secmon_mailbox = (secmon_mailbox_t *)(SECMON_MAILBOX_ADDR + SECMON_STATE_OFFSET); } diff --git a/bootloader/hos/hos.h b/bootloader/hos/hos.h index 0a73dd1..3f6c5d5 100644 --- a/bootloader/hos/hos.h +++ b/bootloader/hos/hos.h @@ -25,29 +25,32 @@ #include -#define KB_FIRMWARE_VERSION_100 0 -#define KB_FIRMWARE_VERSION_300 1 -#define KB_FIRMWARE_VERSION_301 2 -#define KB_FIRMWARE_VERSION_400 3 -#define KB_FIRMWARE_VERSION_500 4 -#define KB_FIRMWARE_VERSION_600 5 -#define KB_FIRMWARE_VERSION_620 6 -#define KB_FIRMWARE_VERSION_700 7 -#define KB_FIRMWARE_VERSION_810 8 -#define KB_FIRMWARE_VERSION_900 9 -#define KB_FIRMWARE_VERSION_910 10 -#define KB_FIRMWARE_VERSION_1210 11 -#define KB_FIRMWARE_VERSION_1300 12 -#define KB_FIRMWARE_VERSION_1400 13 -#define KB_FIRMWARE_VERSION_1500 14 -#define KB_FIRMWARE_VERSION_1600 15 -#define KB_FIRMWARE_VERSION_MAX KB_FIRMWARE_VERSION_1600 //!TODO: Update on mkey changes. +//!TODO: Update on mkey changes. +enum { + HOS_KB_VERSION_100 = 0, + HOS_KB_VERSION_300 = 1, + HOS_KB_VERSION_301 = 2, + HOS_KB_VERSION_400 = 3, + HOS_KB_VERSION_500 = 4, + HOS_KB_VERSION_600 = 5, + HOS_KB_VERSION_620 = 6, + HOS_KB_VERSION_700 = 7, + HOS_KB_VERSION_810 = 8, + HOS_KB_VERSION_900 = 9, + HOS_KB_VERSION_910 = 10, + HOS_KB_VERSION_1210 = 11, + HOS_KB_VERSION_1300 = 12, + HOS_KB_VERSION_1400 = 13, + HOS_KB_VERSION_1500 = 14, + HOS_KB_VERSION_1600 = 15, + HOS_KB_VERSION_MAX +}; #define HOS_TSEC_VERSION 4 //! TODO: Update on TSEC Root Key changes. #define HOS_PKG11_MAGIC 0x31314B50 #define HOS_EKS_MAGIC 0x31534B45 // EKS1. -#define HOS_EKS_TSEC_VER (KB_FIRMWARE_VERSION_700 + HOS_TSEC_VERSION) +#define HOS_EKS_TSEC_VER (HOS_KB_VERSION_700 + HOS_TSEC_VERSION) // Use official Mariko secmon when in stock. Needs access to TZRAM. //#define HOS_MARIKO_STOCK_SECMON diff --git a/bootloader/hos/pkg1.c b/bootloader/hos/pkg1.c index 7fee4c8..387f05c 100644 --- a/bootloader/hos/pkg1.c +++ b/bootloader/hos/pkg1.c @@ -1,7 +1,7 @@ /* * Copyright (c) 2018 naehrwert * Copyright (c) 2018 st4rk - * Copyright (c) 2018-2021 CTCaer + * Copyright (c) 2018-2023 CTCaer * Copyright (c) 2018 balika011 * * This program is free software; you can redistribute it and/or modify it @@ -278,9 +278,9 @@ void pkg1_secmon_patch(void *hos_ctxt, u32 secmon_base, bool t210b01) else if (t210b01) { // For T210B01 we patch 6.X.X as is. Otherwise we decompress the program payload. - if (ctxt->pkg1_id->kb == KB_FIRMWARE_VERSION_600) + if (ctxt->pkg1_id->kb == HOS_KB_VERSION_600) secmon_patchset = _secmon_6_mariko_patchset; - else if (ctxt->pkg1_id->kb == KB_FIRMWARE_VERSION_620) + else if (ctxt->pkg1_id->kb == HOS_KB_VERSION_620) secmon_patchset = _secmon_620_mariko_patchset; else { @@ -289,9 +289,9 @@ void pkg1_secmon_patch(void *hos_ctxt, u32 secmon_base, bool t210b01) memset((void *)TZRAM_PROG_ADDR, 0, 0x38800); // Get size of compressed program payload and set patch offset. - u32 idx = ctxt->pkg1_id->kb - KB_FIRMWARE_VERSION_700; + u32 idx = ctxt->pkg1_id->kb - HOS_KB_VERSION_700; u32 patch_offset = TZRAM_PROG_PK2_SIG_PATCH; - if (ctxt->pkg1_id->kb > KB_FIRMWARE_VERSION_910 || !memcmp(ctxt->pkg1_id->id, "20200303104606", 8)) //TODO: Add 11.0.0 support. + if (ctxt->pkg1_id->kb > HOS_KB_VERSION_910 || !memcmp(ctxt->pkg1_id->id, "20200303104606", 8)) //TODO: Add 11.0.0 support. { idx++; patch_offset = TZRAM_PROG_PK2_SIG_PATCH_1000; @@ -419,13 +419,13 @@ int pkg1_warmboot_config(void *hos_ctxt, u32 warmboot_base, u32 fuses_fw, u8 kb) else { // Set warmboot address in PMC if required. - if (kb <= KB_FIRMWARE_VERSION_301) + if (kb <= HOS_KB_VERSION_301) PMC(APBDEV_PMC_SCRATCH1) = warmboot_base; // Set Warmboot Physical Address ID for 3.0.0 - 3.0.2. - if (kb == KB_FIRMWARE_VERSION_300) + if (kb == HOS_KB_VERSION_300) PMC(APBDEV_PMC_SECURE_SCRATCH32) = 0xE3; // Warmboot 3.0.0 PA address id. - else if (kb == KB_FIRMWARE_VERSION_301) + else if (kb == HOS_KB_VERSION_301) PMC(APBDEV_PMC_SECURE_SCRATCH32) = 0x104; // Warmboot 3.0.1/.2 PA address id. } diff --git a/bootloader/hos/pkg2.c b/bootloader/hos/pkg2.c index c09df64..3d5da0a 100644 --- a/bootloader/hos/pkg2.c +++ b/bootloader/hos/pkg2.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2022 CTCaer + * Copyright (c) 2018-2023 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -667,7 +667,7 @@ pkg2_hdr_t *pkg2_decrypt(void *data, u8 kb, bool is_exo) pkg2_keyslot = 8; // Decrypt 7.0.0 pkg2 via 8.1.0 mkey on Erista. - if (!h_cfg.t210b01 && kb == KB_FIRMWARE_VERSION_700) + if (!h_cfg.t210b01 && kb == HOS_KB_VERSION_700) { u8 tmp_mkey[SE_KEY_128_SIZE]; @@ -758,7 +758,7 @@ void pkg2_build_encrypt(void *dst, void *hos_ctxt, link_t *kips_info, bool is_ex u8 key_ver = kb ? kb + 1 : 0; if (pkg2_keyslot == 9) { - key_ver = KB_FIRMWARE_VERSION_810 + 1; + key_ver = HOS_KB_VERSION_810 + 1; pkg2_keyslot = 8; } diff --git a/bootloader/hos/pkg2.h b/bootloader/hos/pkg2.h index 8eea648..d7fb87f 100644 --- a/bootloader/hos/pkg2.h +++ b/bootloader/hos/pkg2.h @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2022 CTCaer + * Copyright (c) 2018-2023 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, diff --git a/bootloader/hos/secmon_exo.c b/bootloader/hos/secmon_exo.c index 03ea4da..cd2a499 100644 --- a/bootloader/hos/secmon_exo.c +++ b/bootloader/hos/secmon_exo.c @@ -163,7 +163,7 @@ void config_exosphere(launch_ctxt_t *ctxt, u32 warmboot_base) exo_fw_no = ctxt->pkg1_id->fuses - 1; // 3.0.1 - 7.0.1, 8.0.x. // Set 12.1.0 specific revision. - if (ctxt->pkg1_id->kb == KB_FIRMWARE_VERSION_1210) + if (ctxt->pkg1_id->kb == HOS_KB_VERSION_1210) ctxt->exo_ctx.hos_revision = 1; // Handle 15.0.0+. diff --git a/nyx/nyx_gui/frontend/fe_emummc_tools.c b/nyx/nyx_gui/frontend/fe_emummc_tools.c index 0da4b0e..c36f0b9 100644 --- a/nyx/nyx_gui/frontend/fe_emummc_tools.c +++ b/nyx/nyx_gui/frontend/fe_emummc_tools.c @@ -1,7 +1,7 @@ /* * Copyright (c) 2018 naehrwert * Copyright (c) 2018 Rajko Stojadinovic - * Copyright (c) 2018-2022 CTCaer + * Copyright (c) 2018-2023 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -797,7 +797,7 @@ static int _emummc_raw_derive_bis_keys(emmc_tool_gui_t *gui, u32 resized_count) if (memcmp(&cal0->magic, "CAL0", 4)) { // Clear EKS keys. - hos_eks_clear(KB_FIRMWARE_VERSION_MAX); + hos_eks_clear(HOS_KB_VERSION_MAX); strcpy(txt_buf, "#FFDD00 BIS keys validation failed!#\n"); error = true; diff --git a/nyx/nyx_gui/frontend/gui_tools.c b/nyx/nyx_gui/frontend/gui_tools.c index 1a7bb74..b98bcd6 100644 --- a/nyx/nyx_gui/frontend/gui_tools.c +++ b/nyx/nyx_gui/frontend/gui_tools.c @@ -1215,7 +1215,7 @@ static lv_res_t _create_window_dump_pk12_tool(lv_obj_t *btn) hos_keygen(keyblob, kb, &tsec_ctxt); free(keyblob); - if (h_cfg.t210b01 || kb <= KB_FIRMWARE_VERSION_600) + if (h_cfg.t210b01 || kb <= HOS_KB_VERSION_600) { if (!pkg1_decrypt(pkg1_id, pkg1)) { @@ -1227,7 +1227,7 @@ static lv_res_t _create_window_dump_pk12_tool(lv_obj_t *btn) } } - if (h_cfg.t210b01 || kb <= KB_FIRMWARE_VERSION_620) + if (h_cfg.t210b01 || kb <= HOS_KB_VERSION_620) { pkg1_unpack(warmboot, secmon, loader, pkg1_id, pkg1 + pk1_offset); pk11_hdr_t *hdr_pk11 = (pk11_hdr_t *)(pkg1 + pk1_offset + pkg1_id->pkg11_off + 0x20); @@ -1361,12 +1361,12 @@ static lv_res_t _create_window_dump_pk12_tool(lv_obj_t *btn) manual_system_maintenance(true); // Dump INI1. - u32 ini1_off = pkg2_hdr->sec_size[PKG2_SEC_KERNEL]; + u32 ini1_off = pkg2_hdr->sec_size[PKG2_SEC_KERNEL]; u32 ini1_size = pkg2_hdr->sec_size[PKG2_SEC_INI1]; if (!ini1_size) { pkg2_get_newkern_info(pkg2_hdr->data); - ini1_off = pkg2_newkern_ini1_start; + ini1_off = pkg2_newkern_ini1_start; ini1_size = pkg2_newkern_ini1_end - pkg2_newkern_ini1_start; } @@ -1431,7 +1431,7 @@ out_free: emmc_end(); sd_unmount(); - if (kb >= KB_FIRMWARE_VERSION_620) + if (kb >= HOS_KB_VERSION_620) se_aes_key_clear(8); out_end: // Enable buttons. diff --git a/nyx/nyx_gui/hos/hos.c b/nyx/nyx_gui/hos/hos.c index b0e2069..c837a5b 100644 --- a/nyx/nyx_gui/hos/hos.c +++ b/nyx/nyx_gui/hos/hos.c @@ -52,7 +52,7 @@ typedef struct _kb_t u8 padding[0x150]; } kb_t; -static const u8 keyblob_keyseeds[][SE_KEY_128_SIZE] = { +static const u8 keyblob_keyseeds[HOS_KB_VERSION_600 - HOS_KB_VERSION_100 + 1][SE_KEY_128_SIZE] = { { 0xDF, 0x20, 0x6F, 0x59, 0x44, 0x54, 0xEF, 0xDC, 0x70, 0x74, 0x48, 0x3B, 0x0D, 0xED, 0x9F, 0xD3 }, // 1.0.0. { 0x0C, 0x25, 0x61, 0x5D, 0x68, 0x4C, 0xEB, 0x42, 0x1C, 0x23, 0x79, 0xEA, 0x82, 0x25, 0x12, 0xAC }, // 3.0.0. { 0x33, 0x76, 0x85, 0xEE, 0x88, 0x4A, 0xAE, 0x0A, 0xC2, 0x8A, 0xFD, 0x7D, 0x63, 0xC0, 0x43, 0x3B }, // 3.0.1. @@ -79,7 +79,7 @@ static const u8 master_kekseed_t210_max[SE_KEY_128_SIZE] = { 0x99, 0x22, 0x09, 0x57, 0xA7, 0xF9, 0x5E, 0x94, 0xFE, 0x78, 0x7F, 0x41, 0xD6, 0xE7, 0x56, 0xE6 }; // 16.0.0. //!TODO: Update on mkey changes. -static const u8 master_kekseed_t210b01[][SE_KEY_128_SIZE] = { +static const u8 master_kekseed_t210b01[HOS_KB_VERSION_MAX - HOS_KB_VERSION_600 + 1][SE_KEY_128_SIZE] = { { 0x77, 0x60, 0x5A, 0xD2, 0xEE, 0x6E, 0xF8, 0x3C, 0x3F, 0x72, 0xE2, 0x59, 0x9D, 0xAC, 0x5E, 0x56 }, // 6.0.0. { 0x1E, 0x80, 0xB8, 0x17, 0x3E, 0xC0, 0x60, 0xAA, 0x11, 0xBE, 0x1A, 0x4A, 0xA6, 0x6F, 0xE4, 0xAE }, // 6.2.0. { 0x94, 0x08, 0x67, 0xBD, 0x0A, 0x00, 0x38, 0x84, 0x11, 0xD3, 0x1A, 0xDB, 0xDD, 0x8D, 0xF1, 0x8A }, // 7.0.0. @@ -103,7 +103,7 @@ const u8 package2_keyseed[SE_KEY_128_SIZE] = { 0xFB, 0x8B, 0x6A, 0x9C, 0x79, 0x00, 0xC8, 0x49, 0xEF, 0xD2, 0x4D, 0x85, 0x4D, 0x30, 0xA0, 0xC7 }; //!TODO: Update on mkey changes. -static const u8 mkey_vectors[KB_FIRMWARE_VERSION_MAX + 1][SE_KEY_128_SIZE] = { +static const u8 mkey_vectors[HOS_KB_VERSION_MAX + 1][SE_KEY_128_SIZE] = { { 0x0C, 0xF0, 0x59, 0xAC, 0x85, 0xF6, 0x26, 0x65, 0xE1, 0xE9, 0x19, 0x55, 0xE6, 0xF2, 0x67, 0x3D }, // Zeroes encrypted with mkey 00. { 0x29, 0x4C, 0x04, 0xC8, 0xEB, 0x10, 0xED, 0x9D, 0x51, 0x64, 0x97, 0xFB, 0xF3, 0x4D, 0x50, 0xDD }, // Mkey 00 encrypted with mkey 01. { 0xDE, 0xCF, 0xEB, 0xEB, 0x10, 0xAE, 0x74, 0xD8, 0xAD, 0x7C, 0xF4, 0x9E, 0x62, 0xE0, 0xE8, 0x72 }, // Mkey 01 encrypted with mkey 02. @@ -123,7 +123,7 @@ static const u8 mkey_vectors[KB_FIRMWARE_VERSION_MAX + 1][SE_KEY_128_SIZE] = { }; //!TODO: Update on mkey changes. -static const u8 new_console_keyseed[KB_FIRMWARE_VERSION_MAX - KB_FIRMWARE_VERSION_400 + 1][SE_KEY_128_SIZE] = { +static const u8 new_console_keyseed[HOS_KB_VERSION_MAX - HOS_KB_VERSION_400 + 1][SE_KEY_128_SIZE] = { { 0x8B, 0x4E, 0x1C, 0x22, 0x42, 0x07, 0xC8, 0x73, 0x56, 0x94, 0x08, 0x8B, 0xCC, 0x47, 0x0F, 0x5D }, // 4.x New Device Key Source. { 0x6C, 0xEF, 0xC6, 0x27, 0x8B, 0xEC, 0x8A, 0x91, 0x99, 0xAB, 0x24, 0xAC, 0x4F, 0x1C, 0x8F, 0x1C }, // 5.x New Device Key Source. { 0x70, 0x08, 0x1B, 0x97, 0x44, 0x64, 0xF8, 0x91, 0x54, 0x9D, 0xC6, 0x84, 0x8F, 0x1A, 0xB2, 0xE4 }, // 6.x New Device Key Source. @@ -140,7 +140,7 @@ static const u8 new_console_keyseed[KB_FIRMWARE_VERSION_MAX - KB_FIRMWARE_VERSIO }; //!TODO: Update on mkey changes. -static const u8 new_console_kekseed[KB_FIRMWARE_VERSION_MAX - KB_FIRMWARE_VERSION_400 + 1][SE_KEY_128_SIZE] = { +static const u8 new_console_kekseed[HOS_KB_VERSION_MAX - HOS_KB_VERSION_400 + 1][SE_KEY_128_SIZE] = { { 0x88, 0x62, 0x34, 0x6E, 0xFA, 0xF7, 0xD8, 0x3F, 0xE1, 0x30, 0x39, 0x50, 0xF0, 0xB7, 0x5D, 0x5D }, // 4.x New Device Keygen Source. { 0x06, 0x1E, 0x7B, 0xE9, 0x6D, 0x47, 0x8C, 0x77, 0xC5, 0xC8, 0xE7, 0x94, 0x9A, 0xA8, 0x5F, 0x2E }, // 5.x New Device Keygen Source. { 0x99, 0xFA, 0x98, 0xBD, 0x15, 0x1C, 0x72, 0xFD, 0x7D, 0x9A, 0xD5, 0x41, 0x00, 0xFD, 0xB2, 0xEF }, // 6.x New Device Keygen Source. @@ -292,7 +292,7 @@ void hos_eks_clear(u32 kb) if (h_cfg.t210b01) return; - if (h_cfg.eks && kb >= KB_FIRMWARE_VERSION_700) + if (h_cfg.eks && kb >= HOS_KB_VERSION_700) { // Check if current Master key is enabled. if (h_cfg.eks->enabled) @@ -327,7 +327,7 @@ int hos_keygen_t210b01(u32 kb) se_aes_unwrap_key(10, 14, console_keyseed_4xx); // Derive master key. - se_aes_unwrap_key(7, 12, master_kekseed_t210b01[kb - KB_FIRMWARE_VERSION_600]); + se_aes_unwrap_key(7, 12, master_kekseed_t210b01[kb - HOS_KB_VERSION_600]); se_aes_unwrap_key(7, 7, master_keyseed_retail); // Derive latest pkg2 key. @@ -343,7 +343,7 @@ int hos_keygen(void *keyblob, u32 kb, tsec_ctxt_t *tsec_ctxt) tsec_keys_t tsec_keys; kb_t *kb_data = (kb_t *)keyblob; - if (kb > KB_FIRMWARE_VERSION_MAX) + if (kb > HOS_KB_VERSION_MAX) return 0; if (h_cfg.t210b01) @@ -355,15 +355,15 @@ int hos_keygen(void *keyblob, u32 kb, tsec_ctxt_t *tsec_ctxt) _hos_eks_get(); // Use tsec keygen for old firmware or if EKS keys does not exist for newer. - if (kb <= KB_FIRMWARE_VERSION_620 || !h_cfg.eks || (h_cfg.eks && h_cfg.eks->enabled != HOS_EKS_TSEC_VER)) + if (kb <= HOS_KB_VERSION_620 || !h_cfg.eks || (h_cfg.eks && h_cfg.eks->enabled != HOS_EKS_TSEC_VER)) use_tsec = true; - if (kb <= KB_FIRMWARE_VERSION_600) + if (kb <= HOS_KB_VERSION_600) { tsec_ctxt->size = 0xF00; tsec_ctxt->type = TSEC_FW_TYPE_OLD; } - else if (kb == KB_FIRMWARE_VERSION_620) + else if (kb == HOS_KB_VERSION_620) { tsec_ctxt->size = 0x2900; tsec_ctxt->type = TSEC_FW_TYPE_EMU; @@ -413,7 +413,7 @@ int hos_keygen(void *keyblob, u32 kb, tsec_ctxt_t *tsec_ctxt) } } - if (kb >= KB_FIRMWARE_VERSION_700) + if (kb >= HOS_KB_VERSION_700) { // For 7.0.0 and up, save EKS slot if it doesn't exist. if (use_tsec) @@ -439,7 +439,7 @@ int hos_keygen(void *keyblob, u32 kb, tsec_ctxt_t *tsec_ctxt) // Package2 key. se_aes_unwrap_key(8, 7, package2_keyseed); } - else if (kb == KB_FIRMWARE_VERSION_620) + else if (kb == HOS_KB_VERSION_620) { // Set TSEC key. se_aes_key_set(12, tsec_keys.tsec, SE_KEY_128_SIZE); @@ -496,20 +496,20 @@ int hos_keygen(void *keyblob, u32 kb, tsec_ctxt_t *tsec_ctxt) switch (kb) { - case KB_FIRMWARE_VERSION_100: - case KB_FIRMWARE_VERSION_300: - case KB_FIRMWARE_VERSION_301: + case HOS_KB_VERSION_100: + case HOS_KB_VERSION_300: + case HOS_KB_VERSION_301: se_aes_unwrap_key(13, 15, console_keyseed); se_aes_unwrap_key(12, 12, master_keyseed_retail); break; - case KB_FIRMWARE_VERSION_400: + case HOS_KB_VERSION_400: se_aes_unwrap_key(13, 15, console_keyseed_4xx); se_aes_unwrap_key(15, 15, console_keyseed); //se_aes_unwrap_key(14, 12, master_keyseed_4xx); // In this context it's useless. So don't kill SBK. se_aes_unwrap_key(12, 12, master_keyseed_retail); break; - case KB_FIRMWARE_VERSION_500: - case KB_FIRMWARE_VERSION_600: + case HOS_KB_VERSION_500: + case HOS_KB_VERSION_600: se_aes_unwrap_key(10, 15, console_keyseed_4xx); se_aes_unwrap_key(15, 15, console_keyseed); //se_aes_unwrap_key(14, 12, master_keyseed_4xx); // In this context it's useless. So don't kill SBK. @@ -547,7 +547,7 @@ static void _hos_validate_mkey() } while (mkey_idx - 1); se_aes_key_clear(2); - hos_eks_clear(KB_FIRMWARE_VERSION_MAX); + hos_eks_clear(HOS_KB_VERSION_MAX); } static void _hos_bis_print_key(u32 idx, u8 *key) @@ -566,14 +566,14 @@ static void _hos_bis_print_key(u32 idx, u8 *key) int hos_bis_keygen() { u32 keygen_rev = 0; - u32 console_key_slot = 15; // KB_FIRMWARE_VERSION_MAX. Only for Erista. + u32 console_key_slot = 15; // HOS_KB_VERSION_MAX. Only for Erista. tsec_ctxt_t tsec_ctxt = {0}; if (!bis_keys) bis_keys = malloc(SE_KEY_128_SIZE * 6); // Run initial keygen. - hos_keygen(NULL, KB_FIRMWARE_VERSION_MAX, &tsec_ctxt); + hos_keygen(NULL, HOS_KB_VERSION_MAX, &tsec_ctxt); // All Mariko use new device keygen. New keygen was introduced in 4.0.0. // We check unconditionally in order to support downgrades. @@ -587,7 +587,7 @@ int hos_bis_keygen() u32 mkey_idx = sizeof(mkey_vectors) / SE_KEY_128_SIZE; // Keygen revision uses bootloader version, which starts from 1. - keygen_rev -= (KB_FIRMWARE_VERSION_400 + 1); + keygen_rev -= (HOS_KB_VERSION_400 + 1); // Derive mkey 0. do @@ -637,7 +637,7 @@ int hos_bis_keygen() se_aes_crypt_block_ecb(2, DECRYPT, bis_keys + (4 * SE_KEY_128_SIZE), bis_keyseed[4]); se_aes_crypt_block_ecb(2, DECRYPT, bis_keys + (5 * SE_KEY_128_SIZE), bis_keyseed[5]); - // Validate key because KB_FIRMWARE_VERSION_MAX. + // Validate key because HOS_KB_VERSION_MAX. if (!h_cfg.t210b01) _hos_validate_mkey(); @@ -706,7 +706,7 @@ int hos_dump_cal0() cal0_buf = NULL; // Clear EKS keys. - hos_eks_clear(KB_FIRMWARE_VERSION_MAX); + hos_eks_clear(HOS_KB_VERSION_MAX); return 2; } diff --git a/nyx/nyx_gui/hos/hos.h b/nyx/nyx_gui/hos/hos.h index a990b8f..c1ebdf3 100644 --- a/nyx/nyx_gui/hos/hos.h +++ b/nyx/nyx_gui/hos/hos.h @@ -25,29 +25,32 @@ #include -#define KB_FIRMWARE_VERSION_100 0 -#define KB_FIRMWARE_VERSION_300 1 -#define KB_FIRMWARE_VERSION_301 2 -#define KB_FIRMWARE_VERSION_400 3 -#define KB_FIRMWARE_VERSION_500 4 -#define KB_FIRMWARE_VERSION_600 5 -#define KB_FIRMWARE_VERSION_620 6 -#define KB_FIRMWARE_VERSION_700 7 -#define KB_FIRMWARE_VERSION_810 8 -#define KB_FIRMWARE_VERSION_900 9 -#define KB_FIRMWARE_VERSION_910 10 -#define KB_FIRMWARE_VERSION_1210 11 -#define KB_FIRMWARE_VERSION_1300 12 -#define KB_FIRMWARE_VERSION_1400 13 -#define KB_FIRMWARE_VERSION_1500 14 -#define KB_FIRMWARE_VERSION_1600 15 -#define KB_FIRMWARE_VERSION_MAX KB_FIRMWARE_VERSION_1600 //!TODO: Update on mkey changes. +//!TODO: Update on mkey changes. +enum { + HOS_KB_VERSION_100 = 0, + HOS_KB_VERSION_300 = 1, + HOS_KB_VERSION_301 = 2, + HOS_KB_VERSION_400 = 3, + HOS_KB_VERSION_500 = 4, + HOS_KB_VERSION_600 = 5, + HOS_KB_VERSION_620 = 6, + HOS_KB_VERSION_700 = 7, + HOS_KB_VERSION_810 = 8, + HOS_KB_VERSION_900 = 9, + HOS_KB_VERSION_910 = 10, + HOS_KB_VERSION_1210 = 11, + HOS_KB_VERSION_1300 = 12, + HOS_KB_VERSION_1400 = 13, + HOS_KB_VERSION_1500 = 14, + HOS_KB_VERSION_1600 = 15, + HOS_KB_VERSION_MAX +}; #define HOS_TSEC_VERSION 4 //! TODO: Update on TSEC Root Key changes. #define HOS_PKG11_MAGIC 0x31314B50 #define HOS_EKS_MAGIC 0x31534B45 // EKS1. -#define HOS_EKS_TSEC_VER (KB_FIRMWARE_VERSION_700 + HOS_TSEC_VERSION) +#define HOS_EKS_TSEC_VER (HOS_KB_VERSION_700 + HOS_TSEC_VERSION) typedef struct _hos_eks_mbr_t { diff --git a/nyx/nyx_gui/hos/pkg1.c b/nyx/nyx_gui/hos/pkg1.c index 6b136a1..cab8e3d 100644 --- a/nyx/nyx_gui/hos/pkg1.c +++ b/nyx/nyx_gui/hos/pkg1.c @@ -117,9 +117,9 @@ const u8 *pkg1_unpack(void *wm_dst, void *sm_dst, void *ldr_dst, const pkg1_id_t u32 sec_size[3] = { hdr->wb_size, hdr->ldr_size, hdr->sm_size }; // Get correct header mapping. - if (id->kb == KB_FIRMWARE_VERSION_100 && !strcmp(id->id, "20161121183008")) + if (id->kb == HOS_KB_VERSION_100 && !strcmp(id->id, "20161121183008")) sec_map = sec_map_100; - else if (id->kb >= KB_FIRMWARE_VERSION_100 && id->kb <= KB_FIRMWARE_VERSION_301) + else if (id->kb >= HOS_KB_VERSION_100 && id->kb <= HOS_KB_VERSION_301) sec_map = sec_map_2xx; else sec_map = sec_map_4xx; diff --git a/nyx/nyx_gui/hos/pkg2.c b/nyx/nyx_gui/hos/pkg2.c index ec09730..c840105 100644 --- a/nyx/nyx_gui/hos/pkg2.c +++ b/nyx/nyx_gui/hos/pkg2.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2021 CTCaer + * Copyright (c) 2018-2023 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -109,7 +109,7 @@ DPRINTF(" kip1 %d:%s @ %08X (%08X)\n", i, kip1->name, (u32)kip1, ki->size); } //!TODO: Update on mkey changes. -static const u8 mkey_vector_7xx[][SE_KEY_128_SIZE] = +static const u8 mkey_vector_7xx[HOS_KB_VERSION_MAX - HOS_KB_VERSION_810 + 1][SE_KEY_128_SIZE] = { // Master key 7 encrypted with 8. (7.0.0 with 8.1.0) { 0xEA, 0x60, 0xB3, 0xEA, 0xCE, 0x8F, 0x24, 0x46, 0x7D, 0x33, 0x9C, 0xD1, 0xBC, 0x24, 0x98, 0x29 }, @@ -165,13 +165,13 @@ pkg2_hdr_t *pkg2_decrypt(void *data, u8 kb) goto key_found; // Decrypt older pkg2 via new mkeys. - if ((kb >= KB_FIRMWARE_VERSION_700) && (kb < KB_FIRMWARE_VERSION_MAX)) + if ((kb >= HOS_KB_VERSION_700) && (kb < HOS_KB_VERSION_MAX)) { u8 tmp_mkey[SE_KEY_128_SIZE]; u8 decr_slot = 7; // THK mkey or T210B01 mkey. u8 mkey_seeds_cnt = sizeof(mkey_vector_7xx) / SE_KEY_128_SIZE; u8 mkey_seeds_idx = mkey_seeds_cnt; // Real index + 1. - u8 mkey_seeds_min_idx = mkey_seeds_cnt - (KB_FIRMWARE_VERSION_MAX - kb); + u8 mkey_seeds_min_idx = mkey_seeds_cnt - (HOS_KB_VERSION_MAX - kb); while (mkey_seeds_cnt) { From d1be18821d5b801abab044bccf9140f66cecb56f Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 12 Oct 2023 07:16:23 +0300 Subject: [PATCH 038/308] hos: reduce pkg1 id to 8 chars to save space --- bootloader/hos/pkg1.c | 50 ++++++++++++++++----------------- bootloader/hos/secmon_exo.c | 8 +++--- nyx/nyx_gui/hos/pkg1.c | 56 +++++++++++++++++++------------------ 3 files changed, 58 insertions(+), 56 deletions(-) diff --git a/bootloader/hos/pkg1.c b/bootloader/hos/pkg1.c index 387f05c..d9fb9e7 100644 --- a/bootloader/hos/pkg1.c +++ b/bootloader/hos/pkg1.c @@ -145,30 +145,30 @@ static const u8 sec_map_4xx[3] = { PK11_SECTION_LD, PK11_SECTION_SM, PK11_SECTIO // ID (Timestamp), KB, Fuses, TSEC, PK11, SECMON, Warmboot. static const pkg1_id_t _pkg1_ids[] = { - { "20161121183008", 0, 1, 0x1900, 0x3FE0, SM_100_ADR, 0x8000D000, _secmon_1_patchset }, // 1.0.0 (Patched relocator). - { "20170210155124", 0, 2, 0x1900, 0x3FE0, 0x4002D000, 0x8000D000, _secmon_2_patchset }, // 2.0.0 - 2.3.0. - { "20170519101410", 1, 3, 0x1A00, 0x3FE0, 0x4002D000, 0x8000D000, _secmon_3_patchset }, // 3.0.0. - { "20170710161758", 2, 4, 0x1A00, 0x3FE0, 0x4002D000, 0x8000D000, _secmon_3_patchset }, // 3.0.1 - 3.0.2. - { "20170921172629", 3, 5, 0x1800, 0x3FE0, 0x4002B000, 0x4003B000, _secmon_4_patchset }, // 4.0.0 - 4.1.0. - { "20180220163747", 4, 6, 0x1900, 0x3FE0, 0x4002B000, 0x4003B000, _secmon_5_patchset }, // 5.0.0 - 5.1.0. - { "20180802162753", 5, 7, 0x1900, 0x3FE0, 0x4002B000, 0x4003D800, _secmon_6_patchset }, // 6.0.0 - 6.1.0. - { "20181107105733", 6, 8, 0x0E00, 0x6FE0, 0x4002B000, 0x4003D800, _secmon_62_patchset}, // 6.2.0. - { "20181218175730", 7, 9, 0x0F00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 7.0.0. - { "20190208150037", 7, 9, 0x0F00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 7.0.1. - { "20190314172056", 7, 9, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 8.0.0 - 8.0.1. - { "20190531152432", 8, 10, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 8.1.0 - 8.1.1. - { "20190809135709", 9, 11, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 9.0.0 - 9.0.1. - { "20191021113848", 10, 12, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 9.1.0 - 9.2.0. - { "20200303104606", 10, 13, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 10.0.0 - 10.2.0. - { "20201030110855", 10, 14, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 11.0.0 - 11.0.1. - { "20210129111626", 10, 14, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 12.0.0 - 12.0.1. - { "20210422145837", 10, 15, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 12.0.2 - 12.0.3. - { "20210607122020", 11, 15, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 12.1.0. - { "20210805123730", 12, 15, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 13.0.0 - 13.2.0. - { "20220105094454", 12, 16, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 13.2.1. - { "20220209100018", 13, 16, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 14.0.0 - 14.1.2. - { "20220801142548", 14, 17, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 15.0.0 - 15.0.1. - { "20230111100014", 15, 18, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 16.0.0+ + { "20161121", 0, 1, 0x1900, 0x3FE0, SM_100_ADR, 0x8000D000, _secmon_1_patchset }, // 1.0.0 (Patched relocator). + { "20170210", 0, 2, 0x1900, 0x3FE0, 0x4002D000, 0x8000D000, _secmon_2_patchset }, // 2.0.0 - 2.3.0. + { "20170519", 1, 3, 0x1A00, 0x3FE0, 0x4002D000, 0x8000D000, _secmon_3_patchset }, // 3.0.0. + { "20170710", 2, 4, 0x1A00, 0x3FE0, 0x4002D000, 0x8000D000, _secmon_3_patchset }, // 3.0.1 - 3.0.2. + { "20170921", 3, 5, 0x1800, 0x3FE0, 0x4002B000, 0x4003B000, _secmon_4_patchset }, // 4.0.0 - 4.1.0. + { "20180220", 4, 6, 0x1900, 0x3FE0, 0x4002B000, 0x4003B000, _secmon_5_patchset }, // 5.0.0 - 5.1.0. + { "20180802", 5, 7, 0x1900, 0x3FE0, 0x4002B000, 0x4003D800, _secmon_6_patchset }, // 6.0.0 - 6.1.0. + { "20181107", 6, 8, 0x0E00, 0x6FE0, 0x4002B000, 0x4003D800, _secmon_62_patchset}, // 6.2.0. + { "20181218", 7, 9, 0x0F00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 7.0.0. + { "20190208", 7, 9, 0x0F00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 7.0.1. + { "20190314", 7, 9, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 8.0.0 - 8.0.1. + { "20190531", 8, 10, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 8.1.0 - 8.1.1. + { "20190809", 9, 11, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 9.0.0 - 9.0.1. + { "20191021", 10, 12, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 9.1.0 - 9.2.0. + { "20200303", 10, 13, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 10.0.0 - 10.2.0. + { "20201030", 10, 14, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 11.0.0 - 11.0.1. + { "20210129", 10, 14, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 12.0.0 - 12.0.1. + { "20210422", 10, 15, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 12.0.2 - 12.0.3. + { "20210607", 11, 15, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 12.1.0. + { "20210805", 12, 15, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 13.0.0 - 13.2.0. + { "20220105", 12, 16, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 13.2.1. + { "20220209", 13, 16, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 14.0.0 - 14.1.2. + { "20220801", 14, 17, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 15.0.0 - 15.0.1. + { "20230111", 15, 18, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 16.0.0+ }; const pkg1_id_t *pkg1_get_latest() @@ -291,7 +291,7 @@ void pkg1_secmon_patch(void *hos_ctxt, u32 secmon_base, bool t210b01) // Get size of compressed program payload and set patch offset. u32 idx = ctxt->pkg1_id->kb - HOS_KB_VERSION_700; u32 patch_offset = TZRAM_PROG_PK2_SIG_PATCH; - if (ctxt->pkg1_id->kb > HOS_KB_VERSION_910 || !memcmp(ctxt->pkg1_id->id, "20200303104606", 8)) //TODO: Add 11.0.0 support. + if (ctxt->pkg1_id->kb > HOS_KB_VERSION_910 || !memcmp(ctxt->pkg1_id->id, "20200303", 8)) //TODO: Add 11.0.0 support. { idx++; patch_offset = TZRAM_PROG_PK2_SIG_PATCH_1000; diff --git a/bootloader/hos/secmon_exo.c b/bootloader/hos/secmon_exo.c index cd2a499..8d3e580 100644 --- a/bootloader/hos/secmon_exo.c +++ b/bootloader/hos/secmon_exo.c @@ -171,10 +171,10 @@ void config_exosphere(launch_ctxt_t *ctxt, u32 warmboot_base) exo_fw_no++; // Handle versions that change API and do not burn new fuse. - if (!memcmp(ctxt->pkg1_id->id, "20190314172056", 8) || // 8.0.x, same fuses with 7.0.1. - !memcmp(ctxt->pkg1_id->id, "20210129111626", 8) || // 12.0.0, same fuses with 11.0.0. - !memcmp(ctxt->pkg1_id->id, "20210805123730", 8) || // 13.0.0, same fuses with 12.1.0. - !memcmp(ctxt->pkg1_id->id, "20220209100018", 8) // 14.0.0, same fuses with 13.2.1. + if (!memcmp(ctxt->pkg1_id->id, "20190314", 8) || // 8.0.x, same fuses with 7.0.1. + !memcmp(ctxt->pkg1_id->id, "20210129", 8) || // 12.0.0, same fuses with 11.0.0. + !memcmp(ctxt->pkg1_id->id, "20210805", 8) || // 13.0.0, same fuses with 12.1.0. + !memcmp(ctxt->pkg1_id->id, "20220209", 8) // 14.0.0, same fuses with 13.2.1. ) exo_fw_no++; diff --git a/nyx/nyx_gui/hos/pkg1.c b/nyx/nyx_gui/hos/pkg1.c index cab8e3d..215db5e 100644 --- a/nyx/nyx_gui/hos/pkg1.c +++ b/nyx/nyx_gui/hos/pkg1.c @@ -41,43 +41,45 @@ static const u8 sec_map_4xx[3] = { PK11_SECTION_LD, PK11_SECTION_SM, PK11_SECTIO // ID (Timestamp), KB, TSEC, PK11, SECMON, Warmboot. static const pkg1_id_t _pkg1_ids[] = { - { "20161121183008", 0, 0x1900, 0x3FE0, 0x40014020, 0x8000D000 }, // 1.0.0. - { "20170210155124", 0, 0x1900, 0x3FE0, 0x4002D000, 0x8000D000 }, // 2.0.0 - 2.3.0. - { "20170519101410", 1, 0x1A00, 0x3FE0, 0x4002D000, 0x8000D000 }, // 3.0.0. - { "20170710161758", 2, 0x1A00, 0x3FE0, 0x4002D000, 0x8000D000 }, // 3.0.1 - 3.0.2. - { "20170921172629", 3, 0x1800, 0x3FE0, 0x4002B000, 0x4003B000 }, // 4.0.0 - 4.1.0. - { "20180220163747", 4, 0x1900, 0x3FE0, 0x4002B000, 0x4003B000 }, // 5.0.0 - 5.1.0. - { "20180802162753", 5, 0x1900, 0x3FE0, 0x4002B000, 0x4003D800 }, // 6.0.0 - 6.1.0. - { "20181107105733", 6, 0x0E00, 0x6FE0, 0x4002B000, 0x4003D800 }, // 6.2.0. - { "20181218175730", 7, 0x0F00, 0x6FE0, 0x40030000, 0x4003E000 }, // 7.0.0. - { "20190208150037", 7, 0x0F00, 0x6FE0, 0x40030000, 0x4003E000 }, // 7.0.1. - { "20190314172056", 7, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 8.0.0 - 8.0.1. - { "20190531152432", 8, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 8.1.0 - 8.1.1. - { "20190809135709", 9, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 9.0.0 - 9.0.1. - { "20191021113848", 10, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 9.1.0 - 9.2.0. - { "20200303104606", 10, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 10.0.0 - 10.2.0. - { "20201030110855", 10, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 11.0.0 - 11.0.1. - { "20210129111626", 10, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 12.0.0 - 12.0.1. - { "20210422145837", 10, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 12.0.2 - 12.0.3. - { "20210607122020", 11, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 12.1.0. - { "20210805123730", 12, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 13.0.0 - 13.2.0 - { "20220105094454", 12, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 13.2.1. - { "20220209100018", 13, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 14.0.0 - 14.1.2. - { "20220801142548", 14, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 15.0.0 - 15.0.1. - { "20230111100014", 15, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 16.0.0+ + { "20161121", 0, 0x1900, 0x3FE0, 0x40014020, 0x8000D000 }, // 1.0.0. + { "20170210", 0, 0x1900, 0x3FE0, 0x4002D000, 0x8000D000 }, // 2.0.0 - 2.3.0. + { "20170519", 1, 0x1A00, 0x3FE0, 0x4002D000, 0x8000D000 }, // 3.0.0. + { "20170710", 2, 0x1A00, 0x3FE0, 0x4002D000, 0x8000D000 }, // 3.0.1 - 3.0.2. + { "20170921", 3, 0x1800, 0x3FE0, 0x4002B000, 0x4003B000 }, // 4.0.0 - 4.1.0. + { "20180220", 4, 0x1900, 0x3FE0, 0x4002B000, 0x4003B000 }, // 5.0.0 - 5.1.0. + { "20180802", 5, 0x1900, 0x3FE0, 0x4002B000, 0x4003D800 }, // 6.0.0 - 6.1.0. + { "20181107", 6, 0x0E00, 0x6FE0, 0x4002B000, 0x4003D800 }, // 6.2.0. + { "20181218", 7, 0x0F00, 0x6FE0, 0x40030000, 0x4003E000 }, // 7.0.0. + { "20190208", 7, 0x0F00, 0x6FE0, 0x40030000, 0x4003E000 }, // 7.0.1. + { "20190314", 7, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 8.0.0 - 8.0.1. + { "20190531", 8, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 8.1.0 - 8.1.1. + { "20190809", 9, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 9.0.0 - 9.0.1. + { "20191021", 10, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 9.1.0 - 9.2.0. + { "20200303", 10, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 10.0.0 - 10.2.0. + { "20201030", 10, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 11.0.0 - 11.0.1. + { "20210129", 10, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 12.0.0 - 12.0.1. + { "20210422", 10, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 12.0.2 - 12.0.3. + { "20210607", 11, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 12.1.0. + { "20210805", 12, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 13.0.0 - 13.2.0 + { "20220105", 12, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 13.2.1. + { "20220209", 13, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 14.0.0 - 14.1.2. + { "20220801", 14, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 15.0.0 - 15.0.1. + { "20230111", 15, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 16.0.0+ }; const pkg1_id_t *pkg1_identify(u8 *pkg1, char *build_date) { + pk1_hdr_t *hdr = (pk1_hdr_t *)pkg1; if (build_date) { - memcpy(build_date, (char *)(pkg1 + 0x10), 14); + memcpy(build_date, hdr->timestamp, 14); build_date[14] = 0; } for (u32 i = 0; i < ARRAY_SIZE(_pkg1_ids); i++) - if (!memcmp(pkg1 + 0x10, _pkg1_ids[i].id, 8)) + if (!memcmp(hdr->timestamp, _pkg1_ids[i].id, 8)) return &_pkg1_ids[i]; + return NULL; } @@ -117,7 +119,7 @@ const u8 *pkg1_unpack(void *wm_dst, void *sm_dst, void *ldr_dst, const pkg1_id_t u32 sec_size[3] = { hdr->wb_size, hdr->ldr_size, hdr->sm_size }; // Get correct header mapping. - if (id->kb == HOS_KB_VERSION_100 && !strcmp(id->id, "20161121183008")) + if (id->kb == HOS_KB_VERSION_100 && !memcmp(id->id, "20161121", 8)) sec_map = sec_map_100; else if (id->kb >= HOS_KB_VERSION_100 && id->kb <= HOS_KB_VERSION_301) sec_map = sec_map_2xx; From c82853954477cb03c9620fe3f6b687f0f76c9808 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 12 Oct 2023 07:26:55 +0300 Subject: [PATCH 039/308] hos: pkg2: rename ini1 value offset And simplify the logic a bit. --- bootloader/hos/pkg2.c | 16 +++++++------- bootloader/hos/pkg2.h | 5 +++-- nyx/nyx_gui/hos/pkg1.h | 30 ++++++++++++++++++-------- nyx/nyx_gui/hos/pkg2.c | 49 ++++++------------------------------------ nyx/nyx_gui/hos/pkg2.h | 11 +++++----- 5 files changed, 45 insertions(+), 66 deletions(-) diff --git a/bootloader/hos/pkg2.c b/bootloader/hos/pkg2.c index 3d5da0a..24be4df 100644 --- a/bootloader/hos/pkg2.c +++ b/bootloader/hos/pkg2.c @@ -34,7 +34,7 @@ extern hekate_config h_cfg; extern const u8 package2_keyseed[]; -u32 pkg2_newkern_ini1_val; +u32 pkg2_newkern_ini1_info; u32 pkg2_newkern_ini1_start; u32 pkg2_newkern_ini1_end; @@ -190,7 +190,7 @@ static u32 _pkg2_calc_kip1_size(pkg2_kip1_t *kip1) void pkg2_get_newkern_info(u8 *kern_data) { - u32 pkg2_newkern_ini1_off = 0; + pkg2_newkern_ini1_info = 0; pkg2_newkern_ini1_start = 0; // Find static OP offset that is close to INI1 offset. @@ -199,7 +199,7 @@ void pkg2_get_newkern_info(u8 *kern_data) { if (*(u32 *)(kern_data + 0x100 - counter_ops) == PKG2_NEWKERN_GET_INI1_HEURISTIC) { - pkg2_newkern_ini1_off = 0x100 - counter_ops + 12; // OP found. Add 12 for the INI1 offset. + pkg2_newkern_ini1_info = 0x100 - counter_ops + 12; // OP found. Add 12 for the INI1 offset. break; } @@ -210,11 +210,11 @@ void pkg2_get_newkern_info(u8 *kern_data) if (!counter_ops) return; - u32 info_op = *(u32 *)(kern_data + pkg2_newkern_ini1_off); - pkg2_newkern_ini1_val = ((info_op & 0xFFFF) >> 3) + pkg2_newkern_ini1_off; // Parse ADR and PC. + u32 info_op = *(u32 *)(kern_data + pkg2_newkern_ini1_info); + pkg2_newkern_ini1_info += ((info_op & 0xFFFF) >> 3); // Parse ADR and PC. - pkg2_newkern_ini1_start = *(u32 *)(kern_data + pkg2_newkern_ini1_val); - pkg2_newkern_ini1_end = *(u32 *)(kern_data + pkg2_newkern_ini1_val + 0x8); + pkg2_newkern_ini1_start = *(u32 *)(kern_data + pkg2_newkern_ini1_info); + pkg2_newkern_ini1_end = *(u32 *)(kern_data + pkg2_newkern_ini1_info + 0x8); } bool pkg2_parse_kips(link_t *info, pkg2_hdr_t *pkg2, bool *new_pkg2) @@ -790,7 +790,7 @@ DPRINTF("%s @ %08X (%08X)\n", is_meso ? "Mesosphere": "kernel",(u32)ctxt->kernel else { // Set new INI1 offset to kernel. - *(u32 *)(pdst + (is_meso ? 8 : pkg2_newkern_ini1_val)) = kernel_size; + *(u32 *)(pdst + (is_meso ? 8 : pkg2_newkern_ini1_info)) = kernel_size; // Build INI1 for new Package2. kernel_size += _pkg2_ini1_build(pdst + kernel_size, hdr, kips_info, ctxt->new_pkg2); diff --git a/bootloader/hos/pkg2.h b/bootloader/hos/pkg2.h index d7fb87f..aef88bb 100644 --- a/bootloader/hos/pkg2.h +++ b/bootloader/hos/pkg2.h @@ -28,12 +28,13 @@ #define INI1_MAGIC 0x31494E49 //! TODO: Update on kernel change if needed. -#define PKG2_NEWKERN_GET_INI1_HEURISTIC 0xD2800015 // Offset of OP + 12 is the INI1 offset. +// Offset of OP + 12 is the INI1 offset. On v2 with dynamic crt0 it's + 16. +#define PKG2_NEWKERN_GET_INI1_HEURISTIC 0xD2800015 #define PKG2_NEWKERN_START 0x800 #define ATM_MESOSPHERE 0x3053534D -extern u32 pkg2_newkern_ini1_val; +extern u32 pkg2_newkern_ini1_info; extern u32 pkg2_newkern_ini1_start; extern u32 pkg2_newkern_ini1_end; diff --git a/nyx/nyx_gui/hos/pkg1.h b/nyx/nyx_gui/hos/pkg1.h index 7d0ad4f..6d30b58 100644 --- a/nyx/nyx_gui/hos/pkg1.h +++ b/nyx/nyx_gui/hos/pkg1.h @@ -1,5 +1,6 @@ /* * Copyright (c) 2018 naehrwert + * Copyright (c) 2022-2023 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -27,17 +28,28 @@ typedef struct _bl_hdr_t210b01_t { - u8 aes_mac[0x10]; - u8 rsa_sig[0x100]; - u8 salt[0x20]; - u8 sha256[0x20]; - u32 version; - u32 size; - u32 load_addr; - u32 entrypoint; - u8 rsvd[0x10]; +/* 0x000 */ u8 aes_mac[0x10]; +/* 0x010 */ u8 rsa_sig[0x100]; +/* 0x110 */ u8 salt[0x20]; +/* 0x130 */ u8 sha256[0x20]; +/* 0x150 */ u32 version; +/* 0x154 */ u32 size; +/* 0x158 */ u32 load_addr; +/* 0x15C */ u32 entrypoint; +/* 0x160 */ u8 rsvd[0x10]; } bl_hdr_t210b01_t; +typedef struct _pk1_hdr_t +{ +/* 0x00 */ u32 si_sha256; // Secure Init. +/* 0x04 */ u32 sm_sha256; // Secure Monitor. +/* 0x08 */ u32 sl_sha256; // Secure Loader. +/* 0x0C */ u32 unk; // what's this? It's not warmboot. +/* 0x10 */ char timestamp[14]; +/* 0x1E */ u8 keygen; +/* 0x1F */ u8 version; +} pk1_hdr_t; + typedef struct _pkg1_id_t { const char *id; diff --git a/nyx/nyx_gui/hos/pkg2.c b/nyx/nyx_gui/hos/pkg2.c index c840105..ca6e246 100644 --- a/nyx/nyx_gui/hos/pkg2.c +++ b/nyx/nyx_gui/hos/pkg2.c @@ -29,7 +29,6 @@ extern hekate_config h_cfg; extern const u8 package2_keyseed[]; -u32 pkg2_newkern_ini1_val; u32 pkg2_newkern_ini1_start; u32 pkg2_newkern_ini1_end; @@ -47,8 +46,8 @@ u32 pkg2_calc_kip1_size(pkg2_kip1_t *kip1) void pkg2_get_newkern_info(u8 *kern_data) { - u32 pkg2_newkern_ini1_off = 0; - pkg2_newkern_ini1_start = 0; + u32 pkg2_newkern_ini1_info = 0; + pkg2_newkern_ini1_start = 0; // Find static OP offset that is close to INI1 offset. u32 counter_ops = 0x100; @@ -56,7 +55,7 @@ void pkg2_get_newkern_info(u8 *kern_data) { if (*(u32 *)(kern_data + 0x100 - counter_ops) == PKG2_NEWKERN_GET_INI1_HEURISTIC) { - pkg2_newkern_ini1_off = 0x100 - counter_ops + 12; // OP found. Add 12 for the INI1 offset. + pkg2_newkern_ini1_info = 0x100 - counter_ops + 12; // OP found. Add 12 for the INI1 offset. break; } @@ -67,45 +66,11 @@ void pkg2_get_newkern_info(u8 *kern_data) if (!counter_ops) return; - u32 info_op = *(u32 *)(kern_data + pkg2_newkern_ini1_off); - pkg2_newkern_ini1_val = ((info_op & 0xFFFF) >> 3) + pkg2_newkern_ini1_off; // Parse ADR and PC. + u32 info_op = *(u32 *)(kern_data + pkg2_newkern_ini1_info); + pkg2_newkern_ini1_info += ((info_op & 0xFFFF) >> 3); // Parse ADR and PC. - pkg2_newkern_ini1_start = *(u32 *)(kern_data + pkg2_newkern_ini1_val); - pkg2_newkern_ini1_end = *(u32 *)(kern_data + pkg2_newkern_ini1_val + 0x8); -} - -bool pkg2_parse_kips(link_t *info, pkg2_hdr_t *pkg2, bool *new_pkg2) -{ - u8 *ptr; - // Check for new pkg2 type. - if (!pkg2->sec_size[PKG2_SEC_INI1]) - { - pkg2_get_newkern_info(pkg2->data); - - if (!pkg2_newkern_ini1_start) - return false; - - ptr = pkg2->data + pkg2_newkern_ini1_start; - *new_pkg2 = true; - } - else - ptr = pkg2->data + pkg2->sec_size[PKG2_SEC_KERNEL]; - - pkg2_ini1_t *ini1 = (pkg2_ini1_t *)ptr; - ptr += sizeof(pkg2_ini1_t); - - for (u32 i = 0; i < ini1->num_procs; i++) - { - pkg2_kip1_t *kip1 = (pkg2_kip1_t *)ptr; - pkg2_kip1_info_t *ki = (pkg2_kip1_info_t *)malloc(sizeof(pkg2_kip1_info_t)); - ki->kip1 = kip1; - ki->size = pkg2_calc_kip1_size(kip1); - list_append(info, &ki->link); - ptr += ki->size; -DPRINTF(" kip1 %d:%s @ %08X (%08X)\n", i, kip1->name, (u32)kip1, ki->size); - } - - return true; + pkg2_newkern_ini1_start = *(u32 *)(kern_data + pkg2_newkern_ini1_info); + pkg2_newkern_ini1_end = *(u32 *)(kern_data + pkg2_newkern_ini1_info + 0x8); } //!TODO: Update on mkey changes. diff --git a/nyx/nyx_gui/hos/pkg2.h b/nyx/nyx_gui/hos/pkg2.h index 4f6cd4f..619d01c 100644 --- a/nyx/nyx_gui/hos/pkg2.h +++ b/nyx/nyx_gui/hos/pkg2.h @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2020 CTCaer + * Copyright (c) 2018-2023 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -26,10 +26,12 @@ #define PKG2_SEC_INI1 1 #define INI1_MAGIC 0x31494E49 -#define PKG2_NEWKERN_GET_INI1_HEURISTIC 0xD2800015 // Offset of OP + 12 is the INI1 offset. + +//! TODO: Update on kernel change if needed. +// Offset of OP + 12 is the INI1 offset. On v2 with dynamic crt0 it's + 16. +#define PKG2_NEWKERN_GET_INI1_HEURISTIC 0xD2800015 #define PKG2_NEWKERN_START 0x800 -extern u32 pkg2_newkern_ini1_val; extern u32 pkg2_newkern_ini1_start; extern u32 pkg2_newkern_ini1_end; @@ -90,8 +92,7 @@ typedef struct _pkg2_kip1_info_t } pkg2_kip1_info_t; void pkg2_get_newkern_info(u8 *kern_data); -u32 pkg2_calc_kip1_size(pkg2_kip1_t *kip1); -bool pkg2_parse_kips(link_t *info, pkg2_hdr_t *pkg2, bool *new_pkg2); +u32 pkg2_calc_kip1_size(pkg2_kip1_t *kip1); pkg2_hdr_t *pkg2_decrypt(void *data, u8 kb); From 533fb08a1cb640e8d9165b333cc0f5d7bb22f06b Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 12 Oct 2023 07:28:28 +0300 Subject: [PATCH 040/308] nyx: info: K4U6E3S4AB-MGCL is now validated --- nyx/nyx_gui/frontend/gui_info.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index bd597f3..f1362c2 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -490,8 +490,7 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) case LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AB_MGCL: case LPDDR4X_HOAG_4GB_SAMSUNG_K4U6E3S4AB_MGCL: case LPDDR4X_AULA_4GB_SAMSUNG_K4U6E3S4AB_MGCL: - //strcpy(dram_man, "Samsung K4U6E3S4AB-MGCL 4GB"); - strcpy(dram_man, "Samsung 1z 4GB #FF8000 Contact me!#"); + strcpy(dram_man, "Samsung K4U6E3S4AB-MGCL 4GB"); break; case LPDDR4X_IOWA_4GB_MICRON_MT53E512M32D2NP_046_WTF: case LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D2NP_046_WTF: From 03f11370c7b799fb6a1b45965e32f6e82d9a7dac Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 12 Oct 2023 07:36:00 +0300 Subject: [PATCH 041/308] hos: allow reusage of embedded INI1 region --- bootloader/hos/pkg2.c | 39 +++++++++++++++++++++++++-------------- 1 file changed, 25 insertions(+), 14 deletions(-) diff --git a/bootloader/hos/pkg2.c b/bootloader/hos/pkg2.c index 24be4df..c060c39 100644 --- a/bootloader/hos/pkg2.c +++ b/bootloader/hos/pkg2.c @@ -702,30 +702,39 @@ DPRINTF("sec %d has size %08X\n", i, hdr->sec_size[i]); return hdr; } -static u32 _pkg2_ini1_build(u8 *pdst, pkg2_hdr_t *hdr, link_t *kips_info, bool new_pkg2) +static u32 _pkg2_ini1_build(u8 *pdst, u8 *psec, pkg2_hdr_t *hdr, link_t *kips_info, bool new_pkg2) { + // Calculate INI1 size. u32 ini1_size = sizeof(pkg2_ini1_t); - pkg2_ini1_t *ini1 = (pkg2_ini1_t *)pdst; + LIST_FOREACH_ENTRY(pkg2_kip1_info_t, ki, kips_info, link) + { + ini1_size += ki->size; + } + + // Align size and set it. + ini1_size = ALIGN(ini1_size, 4); + + // For new kernel if INI1 fits in the old one, use it. + bool use_old_ini_region = psec && ini1_size <= (pkg2_newkern_ini1_end - pkg2_newkern_ini1_start); + if (use_old_ini_region) + pdst = psec + pkg2_newkern_ini1_start; // Set initial header and magic. + pkg2_ini1_t *ini1 = (pkg2_ini1_t *)pdst; memset(ini1, 0, sizeof(pkg2_ini1_t)); ini1->magic = INI1_MAGIC; + ini1->size = ini1_size; pdst += sizeof(pkg2_ini1_t); - // Merge kips into INI1. + // Merge KIPs into INI1. LIST_FOREACH_ENTRY(pkg2_kip1_info_t, ki, kips_info, link) { DPRINTF("adding kip1 '%s' @ %08X (%08X)\n", ki->kip1->name, (u32)ki->kip1, ki->size); memcpy(pdst, ki->kip1, ki->size); pdst += ki->size; - ini1_size += ki->size; ini1->num_procs++; } - // Align size and set it. - ini1_size = ALIGN(ini1_size, 4); - ini1->size = ini1_size; - // Encrypt INI1 in its own section if old pkg2. Otherwise it gets embedded into Kernel. if (!new_pkg2) { @@ -739,16 +748,16 @@ DPRINTF("adding kip1 '%s' @ %08X (%08X)\n", ki->kip1->name, (u32)ki->kip1, ki->s hdr->sec_off[PKG2_SEC_INI1] = 0; } - return ini1_size; + return !use_old_ini_region ? ini1_size : 0; } void pkg2_build_encrypt(void *dst, void *hos_ctxt, link_t *kips_info, bool is_exo) { - u8 *pdst = (u8 *)dst; launch_ctxt_t * ctxt = (launch_ctxt_t *)hos_ctxt; u32 kernel_size = ctxt->kernel_size; bool is_meso = *(u32 *)(ctxt->kernel + 4) == ATM_MESOSPHERE; u8 kb = ctxt->pkg1_id->kb; + u8 *pdst = (u8 *)dst; // Force new Package2 if Mesosphere. if (is_meso) @@ -789,12 +798,14 @@ DPRINTF("%s @ %08X (%08X)\n", is_meso ? "Mesosphere": "kernel",(u32)ctxt->kernel hdr->sec_off[PKG2_SEC_KERNEL] = 0x10000000; else { + // Build INI1 for new Package2. + u32 ini1_size = _pkg2_ini1_build(pdst + kernel_size, is_meso ? NULL : pdst, hdr, kips_info, true); + hdr->sec_off[PKG2_SEC_KERNEL] = 0x60000; + // Set new INI1 offset to kernel. *(u32 *)(pdst + (is_meso ? 8 : pkg2_newkern_ini1_info)) = kernel_size; - // Build INI1 for new Package2. - kernel_size += _pkg2_ini1_build(pdst + kernel_size, hdr, kips_info, ctxt->new_pkg2); - hdr->sec_off[PKG2_SEC_KERNEL] = 0x60000; + kernel_size += ini1_size; } hdr->sec_size[PKG2_SEC_KERNEL] = kernel_size; se_aes_crypt_ctr(pkg2_keyslot, pdst, kernel_size, pdst, kernel_size, &hdr->sec_ctr[PKG2_SEC_KERNEL * SE_AES_IV_SIZE]); @@ -804,7 +815,7 @@ DPRINTF("kernel encrypted\n"); // Build INI1 for old Package2. u32 ini1_size = 0; if (!ctxt->new_pkg2) - ini1_size = _pkg2_ini1_build(pdst, hdr, kips_info, false); + ini1_size = _pkg2_ini1_build(pdst, NULL, hdr, kips_info, false); DPRINTF("INI1 encrypted\n"); if (!is_exo) // Not needed on Exosphere 1.0.0 and up. From 697bde86677d644e8dbb2916e519512bc6cda6ab Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 12 Oct 2023 07:41:12 +0300 Subject: [PATCH 042/308] hos: 17.0.0 support --- bootloader/hos/hos.c | 2 ++ bootloader/hos/hos.h | 1 + bootloader/hos/pkg1.c | 3 ++- bootloader/hos/pkg1.h | 1 + bootloader/hos/pkg2.c | 30 ++++++++++++++++++++++++++---- bootloader/hos/pkg2_patches.inl | 26 ++++++++++++++++++++++++++ bootloader/hos/secmon_exo.c | 2 +- nyx/nyx_gui/frontend/gui_info.c | 5 ++++- nyx/nyx_gui/hos/hos.c | 6 +++++- nyx/nyx_gui/hos/hos.h | 1 + nyx/nyx_gui/hos/pkg1.c | 3 ++- nyx/nyx_gui/hos/pkg2.c | 23 +++++++++++++++++++++-- 12 files changed, 92 insertions(+), 11 deletions(-) diff --git a/bootloader/hos/hos.c b/bootloader/hos/hos.c index 298ed8f..8a6a18e 100644 --- a/bootloader/hos/hos.c +++ b/bootloader/hos/hos.c @@ -120,6 +120,7 @@ static const u8 master_kekseed_t210_tsec_v4[HOS_KB_VERSION_MAX - HOS_KB_VERSION_ { 0xF0, 0x13, 0x37, 0x9A, 0xD5, 0x63, 0x51, 0xC3, 0xB4, 0x96, 0x35, 0xBC, 0x9C, 0xE8, 0x76, 0x81 }, // 14.0.0. { 0x6E, 0x77, 0x86, 0xAC, 0x83, 0x0A, 0x8D, 0x3E, 0x7D, 0xB7, 0x66, 0xA0, 0x22, 0xB7, 0x6E, 0x67 }, // 15.0.0. { 0x99, 0x22, 0x09, 0x57, 0xA7, 0xF9, 0x5E, 0x94, 0xFE, 0x78, 0x7F, 0x41, 0xD6, 0xE7, 0x56, 0xE6 }, // 16.0.0. + { 0x71, 0xB9, 0xA6, 0xC0, 0xFF, 0x97, 0x6B, 0x0C, 0xB4, 0x40, 0xB9, 0xD5, 0x81, 0x5D, 0x81, 0x90 }, // 17.0.0. }; //!TODO: Update on mkey changes. @@ -135,6 +136,7 @@ static const u8 master_kekseed_t210b01[HOS_KB_VERSION_MAX - HOS_KB_VERSION_600 + { 0xD2, 0x68, 0xC6, 0x53, 0x9D, 0x94, 0xF9, 0xA8, 0xA5, 0xA8, 0xA7, 0xC8, 0x8F, 0x53, 0x4B, 0x7A }, // 14.0.0. { 0xEC, 0x61, 0xBC, 0x82, 0x1E, 0x0F, 0x5A, 0xC3, 0x2B, 0x64, 0x3F, 0x9D, 0xD6, 0x19, 0x22, 0x2D }, // 15.0.0. { 0xA5, 0xEC, 0x16, 0x39, 0x1A, 0x30, 0x16, 0x08, 0x2E, 0xCF, 0x09, 0x6F, 0x5E, 0x7C, 0xEE, 0xA9 }, // 16.0.0. + { 0x8D, 0xEE, 0x9E, 0x11, 0x36, 0x3A, 0x9B, 0x0A, 0x6A, 0xC7, 0xBB, 0xE9, 0xD1, 0x03, 0xF7, 0x80 }, // 17.0.0. }; static const u8 console_keyseed[SE_KEY_128_SIZE] = diff --git a/bootloader/hos/hos.h b/bootloader/hos/hos.h index 3f6c5d5..9518955 100644 --- a/bootloader/hos/hos.h +++ b/bootloader/hos/hos.h @@ -43,6 +43,7 @@ enum { HOS_KB_VERSION_1400 = 13, HOS_KB_VERSION_1500 = 14, HOS_KB_VERSION_1600 = 15, + HOS_KB_VERSION_1700 = 16, HOS_KB_VERSION_MAX }; diff --git a/bootloader/hos/pkg1.c b/bootloader/hos/pkg1.c index d9fb9e7..0eded29 100644 --- a/bootloader/hos/pkg1.c +++ b/bootloader/hos/pkg1.c @@ -168,7 +168,8 @@ static const pkg1_id_t _pkg1_ids[] = { { "20220105", 12, 16, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 13.2.1. { "20220209", 13, 16, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 14.0.0 - 14.1.2. { "20220801", 14, 17, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 15.0.0 - 15.0.1. - { "20230111", 15, 18, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 16.0.0+ + { "20230111", 15, 18, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 16.0.0 - 16.1.0. + { "20230906", 16, 19, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 17.0.0+ }; const pkg1_id_t *pkg1_get_latest() diff --git a/bootloader/hos/pkg1.h b/bootloader/hos/pkg1.h index 38eaa6c..c70ffa5 100644 --- a/bootloader/hos/pkg1.h +++ b/bootloader/hos/pkg1.h @@ -1,5 +1,6 @@ /* * Copyright (c) 2018 naehrwert + * Copyright (c) 2022-2023 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, diff --git a/bootloader/hos/pkg2.c b/bootloader/hos/pkg2.c index c060c39..4b6acbd 100644 --- a/bootloader/hos/pkg2.c +++ b/bootloader/hos/pkg2.c @@ -190,16 +190,26 @@ static u32 _pkg2_calc_kip1_size(pkg2_kip1_t *kip1) void pkg2_get_newkern_info(u8 *kern_data) { + u32 crt_start = 0; pkg2_newkern_ini1_info = 0; pkg2_newkern_ini1_start = 0; + u32 first_op = *(u32 *)kern_data; + if ((first_op & 0xFE000000) == 0x14000000) + crt_start = (first_op & 0x1FFFFFF) << 2; + // Find static OP offset that is close to INI1 offset. u32 counter_ops = 0x100; while (counter_ops) { - if (*(u32 *)(kern_data + 0x100 - counter_ops) == PKG2_NEWKERN_GET_INI1_HEURISTIC) + if (*(u32 *)(kern_data + crt_start + 0x100 - counter_ops) == PKG2_NEWKERN_GET_INI1_HEURISTIC) { - pkg2_newkern_ini1_info = 0x100 - counter_ops + 12; // OP found. Add 12 for the INI1 offset. + // OP found. Add 12 for the INI1 info offset. + pkg2_newkern_ini1_info = crt_start + 0x100 - counter_ops + 12; + + // On v2 kernel with dynamic crt there's a NOP after heuristic. Offset one op. + if (crt_start) + pkg2_newkern_ini1_info += 4; break; } @@ -215,6 +225,13 @@ void pkg2_get_newkern_info(u8 *kern_data) pkg2_newkern_ini1_start = *(u32 *)(kern_data + pkg2_newkern_ini1_info); pkg2_newkern_ini1_end = *(u32 *)(kern_data + pkg2_newkern_ini1_info + 0x8); + + // On v2 kernel with dynamic crt, values are relative to value address. + if (crt_start) + { + pkg2_newkern_ini1_start += pkg2_newkern_ini1_info; + pkg2_newkern_ini1_end += pkg2_newkern_ini1_info + 0x8; + } } bool pkg2_parse_kips(link_t *info, pkg2_hdr_t *pkg2, bool *new_pkg2) @@ -754,12 +771,13 @@ DPRINTF("adding kip1 '%s' @ %08X (%08X)\n", ki->kip1->name, (u32)ki->kip1, ki->s void pkg2_build_encrypt(void *dst, void *hos_ctxt, link_t *kips_info, bool is_exo) { launch_ctxt_t * ctxt = (launch_ctxt_t *)hos_ctxt; + u32 meso_magic = *(u32 *)(ctxt->kernel + 4) & 0xFFFFFF; u32 kernel_size = ctxt->kernel_size; - bool is_meso = *(u32 *)(ctxt->kernel + 4) == ATM_MESOSPHERE; u8 kb = ctxt->pkg1_id->kb; u8 *pdst = (u8 *)dst; // Force new Package2 if Mesosphere. + bool is_meso = meso_magic == ATM_MESOSPHERE; if (is_meso) ctxt->new_pkg2 = true; @@ -803,7 +821,11 @@ DPRINTF("%s @ %08X (%08X)\n", is_meso ? "Mesosphere": "kernel",(u32)ctxt->kernel hdr->sec_off[PKG2_SEC_KERNEL] = 0x60000; // Set new INI1 offset to kernel. - *(u32 *)(pdst + (is_meso ? 8 : pkg2_newkern_ini1_info)) = kernel_size; + u32 meso_meta_offset = *(u32 *)(pdst + 8); + if (is_meso && meso_meta_offset) + *(u32 *)(pdst + meso_meta_offset) = kernel_size - meso_meta_offset; + else if (ini1_size) + *(u32 *)(pdst + (is_meso ? 8 : pkg2_newkern_ini1_info)) = kernel_size; kernel_size += ini1_size; } diff --git a/bootloader/hos/pkg2_patches.inl b/bootloader/hos/pkg2_patches.inl index 0547729..d6d89d9 100644 --- a/bootloader/hos/pkg2_patches.inl +++ b/bootloader/hos/pkg2_patches.inl @@ -783,6 +783,30 @@ static kip1_patchset_t _fs_patches_1603_exfat[] = { { NULL, NULL } }; +static kip1_patch_t _fs_nogc_1700[] = { + { KPS(KIP_TEXT) | 0x165100, 8, "\xFD\x7B\xBE\xA9\xF4\x4F\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x18B048, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" }, + { 0, 0, NULL, NULL } +}; + +static kip1_patchset_t _fs_patches_1700[] = { + { "nogc", _fs_nogc_1700 }, + { "emummc", _fs_emummc }, + { NULL, NULL } +}; + +static kip1_patch_t _fs_nogc_1700_exfat[] = { + { KPS(KIP_TEXT) | 0x16FF60, 8, "\xFD\x7B\xBE\xA9\xF4\x4F\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x195EA8, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" }, + { 0, 0, NULL, NULL } +}; + +static kip1_patchset_t _fs_patches_1700_exfat[] = { + { "nogc", _fs_nogc_1700_exfat }, + { "emummc", _fs_emummc }, + { NULL, NULL } +}; + // SHA256 hashes. static kip1_id_t _kip_ids[] = { @@ -840,4 +864,6 @@ static kip1_id_t _kip_ids[] = { "FS", "\xCF\xAB\x45\x0C\x2C\x53\x9D\xA9", _fs_patches_1600_exfat }, // FS 16.0.0 exFAT { "FS", "\x39\xEE\x1F\x1E\x0E\xA7\x32\x5D", _fs_patches_1603 }, // FS 16.0.3 { "FS", "\x62\xC6\x5E\xFD\x9A\xBF\x7C\x43", _fs_patches_1603_exfat }, // FS 16.0.3 exFAT + { "FS", "\x27\x07\x3B\xF0\xA1\xB8\xCE\x61", _fs_patches_1700 }, // FS 17.0.0 + { "FS", "\xEE\x0F\x4B\xAC\x6D\x1F\xFC\x4B", _fs_patches_1700_exfat }, // FS 17.0.0 exFAT }; diff --git a/bootloader/hos/secmon_exo.c b/bootloader/hos/secmon_exo.c index 8d3e580..ea1b45c 100644 --- a/bootloader/hos/secmon_exo.c +++ b/bootloader/hos/secmon_exo.c @@ -203,7 +203,7 @@ void config_exosphere(launch_ctxt_t *ctxt, u32 warmboot_base) case 12: exo_fw_no = EXO_FW_VER(9, 1); break; - case 13 ... 19: //!TODO: Update on API changes. 19: 16.0.0. + case 13 ... 20: //!TODO: Update on API changes. 20: 17.0.0. exo_fw_no = EXO_FW_VER(exo_fw_no - 3, ctxt->exo_ctx.hos_revision); break; } diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index f1362c2..47c337d 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -588,7 +588,10 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) strcpy(fuses_hos_version, "15.0.0 - 15.0.1"); break; case 18: - strcpy(fuses_hos_version, "16.0.0+"); + strcpy(fuses_hos_version, "16.0.0 - 16.1.0"); + break; + case 19: + strcpy(fuses_hos_version, "17.0.0+"); break; case 255: strcpy(fuses_hos_version, "#FFD000 Overburnt#"); diff --git a/nyx/nyx_gui/hos/hos.c b/nyx/nyx_gui/hos/hos.c index c837a5b..9acc2ca 100644 --- a/nyx/nyx_gui/hos/hos.c +++ b/nyx/nyx_gui/hos/hos.c @@ -76,7 +76,7 @@ static const u8 master_kekseed_620[SE_KEY_128_SIZE] = //!TODO: Update on mkey changes. static const u8 master_kekseed_t210_max[SE_KEY_128_SIZE] = - { 0x99, 0x22, 0x09, 0x57, 0xA7, 0xF9, 0x5E, 0x94, 0xFE, 0x78, 0x7F, 0x41, 0xD6, 0xE7, 0x56, 0xE6 }; // 16.0.0. + { 0x71, 0xB9, 0xA6, 0xC0, 0xFF, 0x97, 0x6B, 0x0C, 0xB4, 0x40, 0xB9, 0xD5, 0x81, 0x5D, 0x81, 0x90 }; // 17.0.0. //!TODO: Update on mkey changes. static const u8 master_kekseed_t210b01[HOS_KB_VERSION_MAX - HOS_KB_VERSION_600 + 1][SE_KEY_128_SIZE] = { @@ -91,6 +91,7 @@ static const u8 master_kekseed_t210b01[HOS_KB_VERSION_MAX - HOS_KB_VERSION_600 + { 0xD2, 0x68, 0xC6, 0x53, 0x9D, 0x94, 0xF9, 0xA8, 0xA5, 0xA8, 0xA7, 0xC8, 0x8F, 0x53, 0x4B, 0x7A }, // 14.0.0. { 0xEC, 0x61, 0xBC, 0x82, 0x1E, 0x0F, 0x5A, 0xC3, 0x2B, 0x64, 0x3F, 0x9D, 0xD6, 0x19, 0x22, 0x2D }, // 15.0.0. { 0xA5, 0xEC, 0x16, 0x39, 0x1A, 0x30, 0x16, 0x08, 0x2E, 0xCF, 0x09, 0x6F, 0x5E, 0x7C, 0xEE, 0xA9 }, // 16.0.0. + { 0x8D, 0xEE, 0x9E, 0x11, 0x36, 0x3A, 0x9B, 0x0A, 0x6A, 0xC7, 0xBB, 0xE9, 0xD1, 0x03, 0xF7, 0x80 }, // 17.0.0. }; static const u8 console_keyseed[SE_KEY_128_SIZE] = @@ -120,6 +121,7 @@ static const u8 mkey_vectors[HOS_KB_VERSION_MAX + 1][SE_KEY_128_SIZE] = { { 0x83, 0x67, 0xAF, 0x01, 0xCF, 0x93, 0xA1, 0xAB, 0x80, 0x45, 0xF7, 0x3F, 0x72, 0xFD, 0x3B, 0x38 }, // Mkey 12 encrypted with mkey 13. { 0xB1, 0x81, 0xA6, 0x0D, 0x72, 0xC7, 0xEE, 0x15, 0x21, 0xF3, 0xC0, 0xB5, 0x6B, 0x61, 0x6D, 0xE7 }, // Mkey 13 encrypted with mkey 14. { 0xAF, 0x11, 0x4C, 0x67, 0x17, 0x7A, 0x52, 0x43, 0xF7, 0x70, 0x2F, 0xC7, 0xEF, 0x81, 0x72, 0x16 }, // Mkey 14 encrypted with mkey 15. + { 0x25, 0x12, 0x8B, 0xCB, 0xB5, 0x46, 0xA1, 0xF8, 0xE0, 0x52, 0x15, 0xB7, 0x0B, 0x57, 0x00, 0xBD }, // Mkey 15 encrypted with mkey 16. }; //!TODO: Update on mkey changes. @@ -137,6 +139,7 @@ static const u8 new_console_keyseed[HOS_KB_VERSION_MAX - HOS_KB_VERSION_400 + 1] { 0x5B, 0x94, 0x63, 0xF7, 0xAD, 0x96, 0x1B, 0xA6, 0x23, 0x30, 0x06, 0x4D, 0x01, 0xE4, 0xCE, 0x1D }, // 14.0.0 New Device Key Source. { 0x5E, 0xC9, 0xC5, 0x0A, 0xD0, 0x5F, 0x8B, 0x7B, 0xA7, 0x39, 0xEA, 0xBC, 0x60, 0x0F, 0x74, 0xE6 }, // 15.0.0 New Device Key Source. { 0xEA, 0x90, 0x6E, 0xA8, 0xAE, 0x92, 0x99, 0x64, 0x36, 0xC1, 0xF3, 0x1C, 0xC6, 0x32, 0x83, 0x8C }, // 16.0.0 New Device Key Source. + { 0xDA, 0xB9, 0xD6, 0x77, 0x52, 0x2D, 0x1F, 0x78, 0x73, 0xC9, 0x98, 0x5B, 0x06, 0xFE, 0xA0, 0x52 }, // 17.0.0 New Device Key Source. }; //!TODO: Update on mkey changes. @@ -154,6 +157,7 @@ static const u8 new_console_kekseed[HOS_KB_VERSION_MAX - HOS_KB_VERSION_400 + 1] { 0x67, 0xD5, 0xD6, 0x0C, 0x08, 0xF5, 0xA3, 0x11, 0xBD, 0x6D, 0x5A, 0xEB, 0x96, 0x24, 0xB0, 0xD2 }, // 14.0.0 New Device Keygen Source. { 0x7C, 0x30, 0xED, 0x8B, 0x39, 0x25, 0x2C, 0x08, 0x8F, 0x48, 0xDC, 0x28, 0xE6, 0x1A, 0x6B, 0x49 }, // 15.0.0 New Device Keygen Source. { 0xF0, 0xF3, 0xFF, 0x52, 0x75, 0x2F, 0xBA, 0x4D, 0x09, 0x72, 0x30, 0x89, 0xA9, 0xDF, 0xFE, 0x1F }, // 16.0.0 New Device Keygen Source. + { 0x21, 0xD6, 0x35, 0xF1, 0x0F, 0x7A, 0xF0, 0x5D, 0xDF, 0x79, 0x1C, 0x7A, 0xE4, 0x32, 0x82, 0x9E }, // 17.0.0 New Device Keygen Source. }; static const u8 gen_keyseed[SE_KEY_128_SIZE] = diff --git a/nyx/nyx_gui/hos/hos.h b/nyx/nyx_gui/hos/hos.h index c1ebdf3..6cb9524 100644 --- a/nyx/nyx_gui/hos/hos.h +++ b/nyx/nyx_gui/hos/hos.h @@ -43,6 +43,7 @@ enum { HOS_KB_VERSION_1400 = 13, HOS_KB_VERSION_1500 = 14, HOS_KB_VERSION_1600 = 15, + HOS_KB_VERSION_1700 = 16, HOS_KB_VERSION_MAX }; diff --git a/nyx/nyx_gui/hos/pkg1.c b/nyx/nyx_gui/hos/pkg1.c index 215db5e..54d81f3 100644 --- a/nyx/nyx_gui/hos/pkg1.c +++ b/nyx/nyx_gui/hos/pkg1.c @@ -64,7 +64,8 @@ static const pkg1_id_t _pkg1_ids[] = { { "20220105", 12, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 13.2.1. { "20220209", 13, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 14.0.0 - 14.1.2. { "20220801", 14, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 15.0.0 - 15.0.1. - { "20230111", 15, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 16.0.0+ + { "20230111", 15, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 16.0.0 - 16.1.0. + { "20230906", 16, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 17.0.0+ }; const pkg1_id_t *pkg1_identify(u8 *pkg1, char *build_date) diff --git a/nyx/nyx_gui/hos/pkg2.c b/nyx/nyx_gui/hos/pkg2.c index ca6e246..496c100 100644 --- a/nyx/nyx_gui/hos/pkg2.c +++ b/nyx/nyx_gui/hos/pkg2.c @@ -46,16 +46,26 @@ u32 pkg2_calc_kip1_size(pkg2_kip1_t *kip1) void pkg2_get_newkern_info(u8 *kern_data) { + u32 crt_start = 0; u32 pkg2_newkern_ini1_info = 0; pkg2_newkern_ini1_start = 0; + u32 first_op = *(u32 *)kern_data; + if ((first_op & 0xFE000000) == 0x14000000) + crt_start = (first_op & 0x1FFFFFF) << 2; + // Find static OP offset that is close to INI1 offset. u32 counter_ops = 0x100; while (counter_ops) { - if (*(u32 *)(kern_data + 0x100 - counter_ops) == PKG2_NEWKERN_GET_INI1_HEURISTIC) + if (*(u32 *)(kern_data + crt_start + 0x100 - counter_ops) == PKG2_NEWKERN_GET_INI1_HEURISTIC) { - pkg2_newkern_ini1_info = 0x100 - counter_ops + 12; // OP found. Add 12 for the INI1 offset. + // OP found. Add 12 for the INI1 info offset. + pkg2_newkern_ini1_info = crt_start + 0x100 - counter_ops + 12; + + // On v2 kernel with dynamic crt there's a NOP after heuristic. Offset one op. + if (crt_start) + pkg2_newkern_ini1_info += 4; break; } @@ -71,6 +81,13 @@ void pkg2_get_newkern_info(u8 *kern_data) pkg2_newkern_ini1_start = *(u32 *)(kern_data + pkg2_newkern_ini1_info); pkg2_newkern_ini1_end = *(u32 *)(kern_data + pkg2_newkern_ini1_info + 0x8); + + // On v2 kernel with dynamic crt, values are relative to value address. + if (crt_start) + { + pkg2_newkern_ini1_start += pkg2_newkern_ini1_info; + pkg2_newkern_ini1_end += pkg2_newkern_ini1_info + 0x8; + } } //!TODO: Update on mkey changes. @@ -92,6 +109,8 @@ static const u8 mkey_vector_7xx[HOS_KB_VERSION_MAX - HOS_KB_VERSION_810 + 1][SE_ { 0xB1, 0x81, 0xA6, 0x0D, 0x72, 0xC7, 0xEE, 0x15, 0x21, 0xF3, 0xC0, 0xB5, 0x6B, 0x61, 0x6D, 0xE7 }, // Master key 14 encrypted with 15. (15.0.0 with 16.0.0) { 0xAF, 0x11, 0x4C, 0x67, 0x17, 0x7A, 0x52, 0x43, 0xF7, 0x70, 0x2F, 0xC7, 0xEF, 0x81, 0x72, 0x16 }, + // Master key 15 encrypted with 16. (16.0.0 with 17.0.0) + { 0x25, 0x12, 0x8B, 0xCB, 0xB5, 0x46, 0xA1, 0xF8, 0xE0, 0x52, 0x15, 0xB7, 0x0B, 0x57, 0x00, 0xBD }, }; static bool _pkg2_key_unwrap_validate(pkg2_hdr_t *tmp_test, pkg2_hdr_t *hdr, u8 src_slot, u8 *mkey, const u8 *key_seed) From 7040f1ada2e91a9dfe2047cc6144c93c9cd12b25 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 12 Oct 2023 07:44:00 +0300 Subject: [PATCH 043/308] l4t: allow setting dram voltage even if no OC Mostly for allowing undervolting. --- bootloader/l4t/l4t.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/bootloader/l4t/l4t.c b/bootloader/l4t/l4t.c index 72ce1ab..e91a631 100644 --- a/bootloader/l4t/l4t.c +++ b/bootloader/l4t/l4t.c @@ -798,18 +798,18 @@ static void _l4t_bpmpfw_b01_config(l4t_ctxt_t *ctxt) } } + // Set DRAM voltage. + if (ctxt->ram_oc_vdd2) + max7762x_regulator_set_voltage(REGULATOR_SD1, ctxt->ram_oc_vdd2 * 1000); + if (ctxt->ram_oc_vddq) + max7762x_regulator_set_voltage(REGULATOR_RAM0, ctxt->ram_oc_vddq * 1000); + // A frequency of lower or equal with stock max will skip ARC. if (ram_oc_freq > DRAM_T210B01_TBL_MAX_FREQ) { // Final table. const u32 tbl_idx = BPMPFW_B01_DTB_EMC_ENTRIES - 1; - // Set DRAM voltage. - if (ctxt->ram_oc_vdd2) - max7762x_regulator_set_voltage(REGULATOR_SD1, ctxt->ram_oc_vdd2 * 1000); - if (ctxt->ram_oc_vddq) - max7762x_regulator_set_voltage(REGULATOR_RAM0, ctxt->ram_oc_vddq * 1000); - // Copy table and prep it for Arachne. memcpy(BPMPFW_B01_DTB_EMC_TBL_OFFSET(tbl_idx), BPMPFW_B01_MTC_TABLE_OFFSET(mtc_idx, 2), BPMPFW_B01_MTC_FREQ_TABLE_SIZE); From d3d3768c8fac437458babd14bcf7529130be636c Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 12 Oct 2023 08:07:46 +0300 Subject: [PATCH 044/308] hos: correct max KB --- bootloader/hos/hos.h | 2 +- nyx/nyx_gui/hos/hos.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/bootloader/hos/hos.h b/bootloader/hos/hos.h index 9518955..e86b073 100644 --- a/bootloader/hos/hos.h +++ b/bootloader/hos/hos.h @@ -44,7 +44,7 @@ enum { HOS_KB_VERSION_1500 = 14, HOS_KB_VERSION_1600 = 15, HOS_KB_VERSION_1700 = 16, - HOS_KB_VERSION_MAX + HOS_KB_VERSION_MAX = HOS_KB_VERSION_1700 }; #define HOS_TSEC_VERSION 4 //! TODO: Update on TSEC Root Key changes. diff --git a/nyx/nyx_gui/hos/hos.h b/nyx/nyx_gui/hos/hos.h index 6cb9524..3fa830d 100644 --- a/nyx/nyx_gui/hos/hos.h +++ b/nyx/nyx_gui/hos/hos.h @@ -44,7 +44,7 @@ enum { HOS_KB_VERSION_1500 = 14, HOS_KB_VERSION_1600 = 15, HOS_KB_VERSION_1700 = 16, - HOS_KB_VERSION_MAX + HOS_KB_VERSION_MAX = HOS_KB_VERSION_1700 }; #define HOS_TSEC_VERSION 4 //! TODO: Update on TSEC Root Key changes. From 7fab13b76de706564ca5750c14aa551c347093bf Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 12 Oct 2023 09:25:06 +0300 Subject: [PATCH 045/308] hos: correct meso version masking And also use the version instead to decide for relative INI1 base setting. That's because MSS0 and MSS1 come with prepopulated INI1 base. --- bootloader/hos/pkg2.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/bootloader/hos/pkg2.c b/bootloader/hos/pkg2.c index 4b6acbd..f7c9bfa 100644 --- a/bootloader/hos/pkg2.c +++ b/bootloader/hos/pkg2.c @@ -771,13 +771,13 @@ DPRINTF("adding kip1 '%s' @ %08X (%08X)\n", ki->kip1->name, (u32)ki->kip1, ki->s void pkg2_build_encrypt(void *dst, void *hos_ctxt, link_t *kips_info, bool is_exo) { launch_ctxt_t * ctxt = (launch_ctxt_t *)hos_ctxt; - u32 meso_magic = *(u32 *)(ctxt->kernel + 4) & 0xFFFFFF; + u32 meso_magic = *(u32 *)(ctxt->kernel + 4); u32 kernel_size = ctxt->kernel_size; u8 kb = ctxt->pkg1_id->kb; u8 *pdst = (u8 *)dst; // Force new Package2 if Mesosphere. - bool is_meso = meso_magic == ATM_MESOSPHERE; + bool is_meso = (meso_magic & 0xF0FFFFFF) == ATM_MESOSPHERE; if (is_meso) ctxt->new_pkg2 = true; @@ -822,7 +822,7 @@ DPRINTF("%s @ %08X (%08X)\n", is_meso ? "Mesosphere": "kernel",(u32)ctxt->kernel // Set new INI1 offset to kernel. u32 meso_meta_offset = *(u32 *)(pdst + 8); - if (is_meso && meso_meta_offset) + if (is_meso && (meso_magic & 0xF000000)) // MSS1. *(u32 *)(pdst + meso_meta_offset) = kernel_size - meso_meta_offset; else if (ini1_size) *(u32 *)(pdst + (is_meso ? 8 : pkg2_newkern_ini1_info)) = kernel_size; From 226b30b57cdf68ab8c5682dc3e3438963d38eac5 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 12 Oct 2023 09:25:14 +0300 Subject: [PATCH 046/308] Bump hekate to v6.0.7 and Nyx to v1.5.6 --- Versions.inc | 4 ++-- bootloader/main.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/Versions.inc b/Versions.inc index 4b1cb55..f8f9724 100644 --- a/Versions.inc +++ b/Versions.inc @@ -1,11 +1,11 @@ # IPL Version. BLVERSION_MAJOR := 6 BLVERSION_MINOR := 0 -BLVERSION_HOTFX := 6 +BLVERSION_HOTFX := 7 BLVERSION_RSVD := 0 # Nyx Version. NYXVERSION_MAJOR := 1 NYXVERSION_MINOR := 5 -NYXVERSION_HOTFX := 5 +NYXVERSION_HOTFX := 6 NYXVERSION_RSVD := 0 diff --git a/bootloader/main.c b/bootloader/main.c index 258945e..f2d9ae6 100644 --- a/bootloader/main.c +++ b/bootloader/main.c @@ -1478,7 +1478,7 @@ ment_t ment_top[] = { MDEF_END() }; -menu_t menu_top = { ment_top, "hekate v6.0.6", 0, 0 }; +menu_t menu_top = { ment_top, "hekate v6.0.7", 0, 0 }; extern void pivot_stack(u32 stack_top); From d1ee0e35fdae057175f5bdf9c2e734fb99aee128 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 13 Oct 2023 07:58:56 +0300 Subject: [PATCH 047/308] hos: pkg2: fix validation check for nogc 17.0.0 --- bootloader/hos/pkg2_patches.inl | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/bootloader/hos/pkg2_patches.inl b/bootloader/hos/pkg2_patches.inl index d6d89d9..b0b2ac8 100644 --- a/bootloader/hos/pkg2_patches.inl +++ b/bootloader/hos/pkg2_patches.inl @@ -784,7 +784,7 @@ static kip1_patchset_t _fs_patches_1603_exfat[] = { }; static kip1_patch_t _fs_nogc_1700[] = { - { KPS(KIP_TEXT) | 0x165100, 8, "\xFD\x7B\xBE\xA9\xF4\x4F\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x165100, 8, "\xFD\x7B\xBD\xA9\xF5\x0B\x00\xF9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { KPS(KIP_TEXT) | 0x18B048, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; @@ -796,7 +796,7 @@ static kip1_patchset_t _fs_patches_1700[] = { }; static kip1_patch_t _fs_nogc_1700_exfat[] = { - { KPS(KIP_TEXT) | 0x16FF60, 8, "\xFD\x7B\xBE\xA9\xF4\x4F\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x16FF60, 8, "\xFD\x7B\xBD\xA9\xF5\x0B\x00\xF9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { KPS(KIP_TEXT) | 0x195EA8, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; From 2e1a773a082d0dbe2f7172909d9af2afbb800164 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Mon, 25 Dec 2023 02:36:27 +0200 Subject: [PATCH 048/308] nyx: relax joycon calibration init Wait a bit before actually doing stick calibration in order to avoid bad values. --- nyx/nyx_gui/frontend/gui.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui.c b/nyx/nyx_gui/frontend/gui.c index 8d5ad93..b281d98 100644 --- a/nyx/nyx_gui/frontend/gui.c +++ b/nyx/nyx_gui/frontend/gui.c @@ -65,7 +65,9 @@ char *text_color; typedef struct _jc_lv_driver_t { lv_indev_t *indev; - bool centering_done; +// LV_INDEV_READ_PERIOD * JC_CAL_MAX_STEPS = 264 ms. +#define JC_CAL_MAX_STEPS 8 + u32 calibration_step; u16 cx_max; u16 cx_min; u16 cy_max; @@ -412,7 +414,7 @@ static bool _jc_virt_mouse_read(lv_indev_data_t *data) } // Calibrate left stick. - if (!jc_drv_ctx.centering_done) + if (jc_drv_ctx.calibration_step != JC_CAL_MAX_STEPS) { if (n_cfg.jc_force_right) { @@ -420,11 +422,11 @@ static bool _jc_virt_mouse_read(lv_indev_data_t *data) && jc_pad->rstick_x > 0x400 && jc_pad->rstick_y > 0x400 && jc_pad->rstick_x < 0xC00 && jc_pad->rstick_y < 0xC00) { + jc_drv_ctx.calibration_step++; jc_drv_ctx.cx_max = jc_pad->rstick_x + 0x96; jc_drv_ctx.cx_min = jc_pad->rstick_x - 0x96; jc_drv_ctx.cy_max = jc_pad->rstick_y + 0x96; jc_drv_ctx.cy_min = jc_pad->rstick_y - 0x96; - jc_drv_ctx.centering_done = true; jc_drv_ctx.cursor_timeout = 0; } } @@ -432,14 +434,15 @@ static bool _jc_virt_mouse_read(lv_indev_data_t *data) && jc_pad->lstick_x > 0x400 && jc_pad->lstick_y > 0x400 && jc_pad->lstick_x < 0xC00 && jc_pad->lstick_y < 0xC00) { + jc_drv_ctx.calibration_step++; jc_drv_ctx.cx_max = jc_pad->lstick_x + 0x96; jc_drv_ctx.cx_min = jc_pad->lstick_x - 0x96; jc_drv_ctx.cy_max = jc_pad->lstick_y + 0x96; jc_drv_ctx.cy_min = jc_pad->lstick_y - 0x96; - jc_drv_ctx.centering_done = true; jc_drv_ctx.cursor_timeout = 0; } - else + + if (jc_drv_ctx.calibration_step != JC_CAL_MAX_STEPS) { data->state = LV_INDEV_STATE_REL; return false; @@ -447,13 +450,10 @@ static bool _jc_virt_mouse_read(lv_indev_data_t *data) } // Re-calibrate on disconnection. - if (n_cfg.jc_force_right) - { - if (!jc_pad->conn_r) - jc_drv_ctx.centering_done = 0; - } - else if (!jc_pad->conn_l) - jc_drv_ctx.centering_done = 0; + if (n_cfg.jc_force_right && !jc_pad->conn_r) + jc_drv_ctx.calibration_step = 0; + else if (!n_cfg.jc_force_right && !jc_pad->conn_l) + jc_drv_ctx.calibration_step = 0; // Set button presses. if (jc_pad->a || jc_pad->zl || jc_pad->zr) From 239c48c790d3e32fb2ea8a9bcb9557d0157b0884 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Mon, 25 Dec 2023 02:37:40 +0200 Subject: [PATCH 049/308] bdk: usb: hid: improve stick calibration Wait a bit before calibrating stick centers, in order to avoid bad values. --- bdk/usb/usb_gadget_hid.c | 43 ++++++++++++++++++++++++---------------- 1 file changed, 26 insertions(+), 17 deletions(-) diff --git a/bdk/usb/usb_gadget_hid.c b/bdk/usb/usb_gadget_hid.c index 4b54ede..3e12dfa 100644 --- a/bdk/usb/usb_gadget_hid.c +++ b/bdk/usb/usb_gadget_hid.c @@ -56,16 +56,19 @@ typedef struct _gamepad_report_t typedef struct _jc_cal_t { - bool cl_done; - bool cr_done; - u16 clx_max; - u16 clx_min; - u16 cly_max; - u16 cly_min; - u16 crx_max; - u16 crx_min; - u16 cry_max; - u16 cry_min; +// 15ms * JC_CAL_MAX_STEPS = 240 ms. +#define JC_CAL_MAX_STEPS 16 + u32 cl_step; + u32 cr_step; + + u16 clx_max; + u16 clx_min; + u16 cly_max; + u16 cly_min; + u16 crx_max; + u16 crx_min; + u16 cry_max; + u16 cry_min; } jc_cal_t; static jc_cal_t jc_cal_ctx; @@ -74,34 +77,40 @@ static usb_ops_t usb_ops; static bool _jc_calibration(jc_gamepad_rpt_t *jc_pad) { // Calibrate left stick. - if (!jc_cal_ctx.cl_done) + if (jc_cal_ctx.cl_step != JC_CAL_MAX_STEPS) { if (jc_pad->conn_l && jc_pad->lstick_x > 0x400 && jc_pad->lstick_y > 0x400 && jc_pad->lstick_x < 0xC00 && jc_pad->lstick_y < 0xC00) { + jc_cal_ctx.cl_step++; jc_cal_ctx.clx_max = jc_pad->lstick_x + 0x72; jc_cal_ctx.clx_min = jc_pad->lstick_x - 0x72; jc_cal_ctx.cly_max = jc_pad->lstick_y + 0x72; jc_cal_ctx.cly_min = jc_pad->lstick_y - 0x72; - jc_cal_ctx.cl_done = true; + + if (jc_cal_ctx.cl_step != JC_CAL_MAX_STEPS) + return false; } else return false; } // Calibrate right stick. - if (!jc_cal_ctx.cr_done) + if (jc_cal_ctx.cr_step != JC_CAL_MAX_STEPS) { if (jc_pad->conn_r && jc_pad->rstick_x > 0x400 && jc_pad->rstick_y > 0x400 && jc_pad->rstick_x < 0xC00 && jc_pad->rstick_y < 0xC00) { + jc_cal_ctx.cr_step++; jc_cal_ctx.crx_max = jc_pad->rstick_x + 0x72; jc_cal_ctx.crx_min = jc_pad->rstick_x - 0x72; jc_cal_ctx.cry_max = jc_pad->rstick_y + 0x72; jc_cal_ctx.cry_min = jc_pad->rstick_y - 0x72; - jc_cal_ctx.cr_done = true; + + if (jc_cal_ctx.cr_step != JC_CAL_MAX_STEPS) + return false; } else return false; @@ -122,7 +131,7 @@ static bool _jc_poll(gamepad_report_t *rpt) if (jc_pad->l3 && jc_pad->home) return true; - if (!jc_cal_ctx.cl_done || !jc_cal_ctx.cr_done) + if (jc_cal_ctx.cl_step != JC_CAL_MAX_STEPS || jc_cal_ctx.cr_step != JC_CAL_MAX_STEPS) { if (!_jc_calibration(jc_pad)) return false; @@ -130,9 +139,9 @@ static bool _jc_poll(gamepad_report_t *rpt) // Re-calibrate on disconnection. if (!jc_pad->conn_l) - jc_cal_ctx.cl_done = false; + jc_cal_ctx.cl_step = 0; if (!jc_pad->conn_r) - jc_cal_ctx.cr_done = false; + jc_cal_ctx.cr_step = 0; // Calculate left analog stick. if (jc_pad->lstick_x <= jc_cal_ctx.clx_max && jc_pad->lstick_x >= jc_cal_ctx.clx_min) From 09dfcfc57d6261629e8cd3d6c02dfb5159207b15 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Mon, 25 Dec 2023 02:40:38 +0200 Subject: [PATCH 050/308] bdk: display: deduplicate interrupt code --- bdk/display/di.c | 33 ++++++++++++++++++++++++--------- bdk/display/di.h | 5 +++++ 2 files changed, 29 insertions(+), 9 deletions(-) diff --git a/bdk/display/di.c b/bdk/display/di.c index f8742a9..5239245 100644 --- a/bdk/display/di.c +++ b/bdk/display/di.c @@ -42,6 +42,26 @@ static bool _nx_aula = false; static void _display_panel_and_hw_end(bool no_panel_deinit); +void display_enable_interrupt(u32 intr) +{ + DISPLAY_A(_DIREG(DC_CMD_INT_ENABLE)) |= intr; +} + +void display_disable_interrupt(u32 intr) +{ + DISPLAY_A(_DIREG(DC_CMD_INT_ENABLE)) &= ~intr; + DISPLAY_A(_DIREG(DC_CMD_INT_STATUS)) = intr; +} + +void display_wait_interrupt(u32 intr) +{ + DISPLAY_A(_DIREG(DC_CMD_INT_STATUS)) = intr; + + // Interrupts are masked. Poll status register for checking if fired. + while (!(DISPLAY_A(_DIREG(DC_CMD_INT_STATUS)) & intr)) + ; +} + static void _display_dsi_wait(u32 timeout, u32 off, u32 mask) { u32 end = get_tmr_us() + timeout; @@ -64,22 +84,18 @@ static void _display_dsi_wait_vblank(bool enable) if (enable) { // Enable vblank interrupt. - DISPLAY_A(_DIREG(DC_CMD_INT_ENABLE)) = DC_CMD_INT_FRAME_END_INT; + display_enable_interrupt(DC_CMD_INT_FRAME_END_INT); // Use the 4th line to transmit the host cmd packet. DSI(_DSIREG(DSI_VIDEO_MODE_CONTROL)) = DSI_CMD_PKT_VID_ENABLE | DSI_DSI_LINE_TYPE(4); // Wait for vblank before starting the transfer. - DISPLAY_A(_DIREG(DC_CMD_INT_STATUS)) = DC_CMD_INT_FRAME_END_INT; // Clear interrupt. - while (!(DISPLAY_A(_DIREG(DC_CMD_INT_STATUS)) & DC_CMD_INT_FRAME_END_INT)) - ; + display_wait_interrupt(DC_CMD_INT_FRAME_END_INT); } else { // Wait for vblank before resetting sync points. - DISPLAY_A(_DIREG(DC_CMD_INT_STATUS)) = DC_CMD_INT_FRAME_END_INT; // Clear interrupt. - while (!(DISPLAY_A(_DIREG(DC_CMD_INT_STATUS)) & DC_CMD_INT_FRAME_END_INT)) - ; + display_wait_interrupt(DC_CMD_INT_FRAME_END_INT); usleep(14); // Reset all states of syncpt block. @@ -94,8 +110,7 @@ static void _display_dsi_wait_vblank(bool enable) DSI(_DSIREG(DSI_VIDEO_MODE_CONTROL)) = 0; // Disable and clear vblank interrupt. - DISPLAY_A(_DIREG(DC_CMD_INT_ENABLE)) = 0; - DISPLAY_A(_DIREG(DC_CMD_INT_STATUS)) = DC_CMD_INT_FRAME_END_INT; + display_disable_interrupt(DC_CMD_INT_FRAME_END_INT); } } diff --git a/bdk/display/di.h b/bdk/display/di.h index 4a19ecb..6161066 100644 --- a/bdk/display/di.h +++ b/bdk/display/di.h @@ -793,6 +793,11 @@ void display_init(); void display_backlight_pwm_init(); void display_end(); +/*! Interrupt management. */ +void display_enable_interrupt(u32 intr); +void display_disable_interrupt(u32 intr); +void display_wait_interrupt(u32 intr); + /*! Get/Set Display panel ID. */ u16 display_get_decoded_panel_id(); void display_set_decoded_panel_id(u32 id); From eff55ff3782a76312c13586924702839bd4ffe47 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Mon, 25 Dec 2023 02:41:42 +0200 Subject: [PATCH 051/308] bdk: touch: rename samsung touch panel BH2109 is the board model and not the touch panel. --- bdk/input/touch.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bdk/input/touch.c b/bdk/input/touch.c index 7a986f3..f5b5098 100644 --- a/bdk/input/touch.c +++ b/bdk/input/touch.c @@ -39,7 +39,7 @@ static touch_panel_info_t _panels[] = { 1, 0, 1, 1, "GiS GGM6 B2X" },// 1. { 2, 0, 0, 0, "NISSHA NBF-K9A" },// 3. { 3, 1, 0, 0, "GiS 5.5\"" },// 4. - { 4, 0, 0, 1, "Samsung BH2109" },// 5? + { 4, 0, 0, 1, "Samsung TSP" },// 5? { -1, 1, 0, 1, "GiS VA 6.2\"" } // 2. }; From 913cdee8e829ea34034d9baf415cc0c6bff62a96 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Mon, 25 Dec 2023 03:02:11 +0200 Subject: [PATCH 052/308] bdk: sdram: rename 3rd gen t210b01 hynix ram Confirmed to be a Hynix H54G46CYRBX267 and not a H9HCNNNBKMMLXR-NEI --- bdk/mem/sdram.c | 6 ++-- bdk/mem/sdram.h | 60 ++++++++++++++++---------------- bdk/mem/sdram_config.inl | 6 ++-- bdk/mem/sdram_config_t210b01.inl | 14 ++++---- 4 files changed, 43 insertions(+), 43 deletions(-) diff --git a/bdk/mem/sdram.c b/bdk/mem/sdram.c index 5e1fa05..486e10f 100644 --- a/bdk/mem/sdram.c +++ b/bdk/mem/sdram.c @@ -76,9 +76,9 @@ static const u8 dram_encoding_t210b01[] = { /* 26 */ LPDDR4X_4GB_MICRON_MT53E512M32D2NP_046_WTF, /* 27 */ LPDDR4X_4GB_MICRON_MT53E512M32D2NP_046_WTF, /* 28 */ LPDDR4X_8GB_SAMSUNG_K4UBE3D4AA_MGCL, -/* 29 */ LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEI, -/* 30 */ LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEI, -/* 31 */ LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEI, +/* 29 */ LPDDR4X_4GB_HYNIX_H54G46CYRBX267, +/* 30 */ LPDDR4X_4GB_HYNIX_H54G46CYRBX267, +/* 31 */ LPDDR4X_4GB_HYNIX_H54G46CYRBX267, /* 32 */ LPDDR4X_4GB_MICRON_MT53E512M32D1NP_046_WTB, /* 33 */ LPDDR4X_4GB_MICRON_MT53E512M32D1NP_046_WTB, /* 34 */ LPDDR4X_4GB_MICRON_MT53E512M32D1NP_046_WTB, diff --git a/bdk/mem/sdram.h b/bdk/mem/sdram.h index fa1d468..e7832c7 100644 --- a/bdk/mem/sdram.h +++ b/bdk/mem/sdram.h @@ -54,46 +54,46 @@ enum sdram_ids_erista enum sdram_ids_mariko { // LPDDR4X 4266Mbps. - LPDDR4X_HOAG_4GB_HYNIX_H9HCNNNBKMMLXR_NEE = 3, // Replaced from Copper. Die-M. (1y-01). - LPDDR4X_AULA_4GB_HYNIX_H9HCNNNBKMMLXR_NEE = 5, // Replaced from Copper. Die-M. (1y-01). - LPDDR4X_IOWA_4GB_HYNIX_H9HCNNNBKMMLXR_NEE = 6, // Replaced from Copper. Die-M. (1y-01). + LPDDR4X_HOAG_4GB_HYNIX_H9HCNNNBKMMLXR_NEE = 3, // Die-M. (1y-01). + LPDDR4X_AULA_4GB_HYNIX_H9HCNNNBKMMLXR_NEE = 5, // Die-M. (1y-01). + LPDDR4X_IOWA_4GB_HYNIX_H9HCNNNBKMMLXR_NEE = 6, // Die-M. (1y-01). // LPDDR4X 3733Mbps. - LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AM_MGCJ = 8, // Die-M. 1st gen. 3733Mbps. - LPDDR4X_IOWA_8GB_SAMSUNG_K4UBE3D4AM_MGCJ = 9, // Die-M. - LPDDR4X_IOWA_4GB_HYNIX_H9HCNNNBKMMLHR_NME = 10, // Die-M. - LPDDR4X_IOWA_4GB_MICRON_MT53E512M32D2NP_046_WTE = 11, // 4266Mbps. Die-E. D9WGB. + LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AM_MGCJ = 8, // Die-M. (1x-03). 1st gen. + LPDDR4X_IOWA_8GB_SAMSUNG_K4UBE3D4AM_MGCJ = 9, // Die-M. (1x-03). 1st gen. + LPDDR4X_IOWA_4GB_HYNIX_H9HCNNNBKMMLHR_NME = 10, // Die-M. (1x-03). + LPDDR4X_IOWA_4GB_MICRON_MT53E512M32D2NP_046_WTE = 11, // Die-E. (1x-03). D9WGB. 4266Mbps. - LPDDR4X_HOAG_4GB_SAMSUNG_K4U6E3S4AM_MGCJ = 12, // Die-M. 1st gen. 3733Mbps. - LPDDR4X_HOAG_8GB_SAMSUNG_K4UBE3D4AM_MGCJ = 13, // Die-M. - LPDDR4X_HOAG_4GB_HYNIX_H9HCNNNBKMMLHR_NME = 14, // Die-M. - LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D2NP_046_WTE = 15, // 4266Mbps. Die-E. D9WGB. + LPDDR4X_HOAG_4GB_SAMSUNG_K4U6E3S4AM_MGCJ = 12, // Die-M. (1x-03). 1st gen. + LPDDR4X_HOAG_8GB_SAMSUNG_K4UBE3D4AM_MGCJ = 13, // Die-M. (1x-03). 1st gen. + LPDDR4X_HOAG_4GB_HYNIX_H9HCNNNBKMMLHR_NME = 14, // Die-M. (1x-03). + LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D2NP_046_WTE = 15, // Die-E. (1x-03). D9WGB. 4266Mbps. // LPDDR4X 4266Mbps. - LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AA_MGCL = 17, // Die-A. (1y-X03). 2nd gen. 4266Mbps. - LPDDR4X_IOWA_8GB_SAMSUNG_K4UBE3D4AA_MGCL = 18, // Die-A. (1y-X03). - LPDDR4X_HOAG_4GB_SAMSUNG_K4U6E3S4AA_MGCL = 19, // Die-A. (1y-X03). 2nd gen. 4266Mbps. + LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AA_MGCL = 17, // Die-A. (1y-X03). 2nd gen. + LPDDR4X_IOWA_8GB_SAMSUNG_K4UBE3D4AA_MGCL = 18, // Die-A. (1y-X03). 2nd gen. + LPDDR4X_HOAG_4GB_SAMSUNG_K4U6E3S4AA_MGCL = 19, // Die-A. (1y-X03). 2nd gen. - LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AB_MGCL = 20, // Die-B. 1z nm. 40% lower power usage. (1z-01). - LPDDR4X_HOAG_4GB_SAMSUNG_K4U6E3S4AB_MGCL = 21, // Die-B. 1z nm. 40% lower power usage. (1z-01). - LPDDR4X_AULA_4GB_SAMSUNG_K4U6E3S4AB_MGCL = 22, // Die-B. 1z nm. 40% lower power usage. (1z-01). + LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AB_MGCL = 20, // Die-B. (1z-01). 3rd gen. 40% lower power usage. + LPDDR4X_HOAG_4GB_SAMSUNG_K4U6E3S4AB_MGCL = 21, // Die-B. (1z-01). 3rd gen. 40% lower power usage. + LPDDR4X_AULA_4GB_SAMSUNG_K4U6E3S4AB_MGCL = 22, // Die-B. (1z-01). 3rd gen. 40% lower power usage. - LPDDR4X_HOAG_8GB_SAMSUNG_K4UBE3D4AA_MGCL = 23, // Die-A. (1y-X03). - LPDDR4X_AULA_4GB_SAMSUNG_K4U6E3S4AA_MGCL = 24, // Die-A. (1y-X03). 2nd gen. 4266Mbps. + LPDDR4X_HOAG_8GB_SAMSUNG_K4UBE3D4AA_MGCL = 23, // Die-A. (1y-X03). 2nd gen. + LPDDR4X_AULA_4GB_SAMSUNG_K4U6E3S4AA_MGCL = 24, // Die-A. (1y-X03). 2nd gen. - LPDDR4X_IOWA_4GB_MICRON_MT53E512M32D2NP_046_WTF = 25, // 4266Mbps. Die-F. D9XRR. 10nm-class (1y-01). - LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D2NP_046_WTF = 26, // 4266Mbps. Die-F. D9XRR. 10nm-class (1y-01). - LPDDR4X_AULA_4GB_MICRON_MT53E512M32D2NP_046_WTF = 27, // 4266Mbps. Die-F. D9XRR. 10nm-class (1y-01). + LPDDR4X_IOWA_4GB_MICRON_MT53E512M32D2NP_046_WTF = 25, // Die-F. (1y-01). D9XRR. + LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D2NP_046_WTF = 26, // Die-F. (1y-01). D9XRR. + LPDDR4X_AULA_4GB_MICRON_MT53E512M32D2NP_046_WTF = 27, // Die-F. (1y-01). D9XRR. - LPDDR4X_AULA_8GB_SAMSUNG_K4UBE3D4AA_MGCL = 28, // Die-A. + LPDDR4X_AULA_8GB_SAMSUNG_K4UBE3D4AA_MGCL = 28, // Die-A. (1y-X03). 2nd gen. - LPDDR4X_UNK0_4GB_HYNIX_H9HCNNNBKMMLXR_NEI = 29, // Die-M. 1a nm. 61% lower power usage. (1a-01). - LPDDR4X_UNK1_4GB_HYNIX_H9HCNNNBKMMLXR_NEI = 30, // Die-M. 1a nm. 61% lower power usage. (1a-01). - LPDDR4X_UNK2_4GB_HYNIX_H9HCNNNBKMMLXR_NEI = 31, // Die-M. 1a nm. 61% lower power usage. (1a-01). + LPDDR4X_IOWA_4GB_HYNIX_H54G46CYRBX267 = 29, // Die-C. (1a-01). 61% lower power usage. + LPDDR4X_HOAG_4GB_HYNIX_H54G46CYRBX267 = 30, // Die-C. (1a-01). 61% lower power usage. + LPDDR4X_AULA_4GB_HYNIX_H54G46CYRBX267 = 31, // Die-C. (1a-01). 61% lower power usage. - LPDDR4X_UNK0_4GB_MICRON_MT53E512M32D1NP_046_WTB = 32, // 1a nm. 61% lower power usage. (1a-01). - LPDDR4X_UNK1_4GB_MICRON_MT53E512M32D1NP_046_WTB = 33, // 1a nm. 61% lower power usage. (1a-01). - LPDDR4X_UNK2_4GB_MICRON_MT53E512M32D1NP_046_WTB = 34, // 1a nm. 61% lower power usage. (1a-01). + LPDDR4X_IOWA_4GB_MICRON_MT53E512M32D1NP_046_WTB = 32, // Die-B. (1a-01). 61% lower power usage. + LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D1NP_046_WTB = 33, // Die-B. (1a-01). 61% lower power usage. + LPDDR4X_AULA_4GB_MICRON_MT53E512M32D1NP_046_WTB = 34, // Die-B. (1a-01). 61% lower power usage. }; enum sdram_codes_mariko @@ -111,7 +111,7 @@ enum sdram_codes_mariko LPDDR4X_4GB_SAMSUNG_K4U6E3S4AB_MGCL = 5, // DRAM IDs: 20, 21, 22. LPDDR4X_4GB_MICRON_MT53E512M32D2NP_046_WTF = 6, // DRAM IDs: 25, 26, 27. LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEE = 7, // DRAM IDs: 03, 05, 06. - LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEI = 8, // DRAM IDs: 29, 30, 31. + LPDDR4X_4GB_HYNIX_H54G46CYRBX267 = 8, // DRAM IDs: 29, 30, 31. LPDDR4X_4GB_MICRON_MT53E512M32D1NP_046_WTB = 9, // DRAM IDs: 32, 33, 34. }; diff --git a/bdk/mem/sdram_config.inl b/bdk/mem/sdram_config.inl index 1d107ff..78c9b94 100644 --- a/bdk/mem/sdram_config.inl +++ b/bdk/mem/sdram_config.inl @@ -499,7 +499,7 @@ static const sdram_params_t210_t _dram_cfg_0_samsung_4gb = { * Specifies the value for MC_EMEM_CFG which holds the external memory * size (in KBytes) */ - .mc_emem_cfg = 0x00001000, // 4GB total density. + .mc_emem_cfg = 0x00001000, // 4GB total density. Max 8GB. /* MC arbitration configuration */ .mc_emem_arb_cfg = 0x08000001, @@ -657,7 +657,7 @@ static const sdram_vendor_patch_t sdram_cfg_vendor_patches_t210[] = { // Samsung 6GB density config. { 0x000C0302, 0x56C / 4, DRAM_ID(4) }, // mc_emem_adr_cfg_dev0. 768MB Chip 0 density. { 0x000C0302, 0x570 / 4, DRAM_ID(4) }, // mc_emem_adr_cfg_dev1. 768MB Chip 1 density. - { 0x00001800, 0x584 / 4, DRAM_ID(4) }, // mc_emem_cfg. 6GB total density. + { 0x00001800, 0x584 / 4, DRAM_ID(4) }, // mc_emem_cfg. 6GB total density. Max 8GB. // Samsung 8GB density config. { 0x0000003A, 0xEC / 4, DRAM_ID(7) }, // emc_rfc. @@ -667,5 +667,5 @@ static const sdram_vendor_patch_t sdram_cfg_vendor_patches_t210[] = { { 0x00000713, 0x2B4 / 4, DRAM_ID(7) }, // emc_dyn_self_ref_control. { 0x00080302, 0x56C / 4, DRAM_ID(7) }, // mc_emem_adr_cfg_dev0. 1024MB Chip 0 density. { 0x00080302, 0x570 / 4, DRAM_ID(7) }, // mc_emem_adr_cfg_dev1. 1024MB Chip 1 density. - { 0x00002000, 0x584 / 4, DRAM_ID(7) }, // mc_emem_cfg. 8GB total density. + { 0x00002000, 0x584 / 4, DRAM_ID(7) }, // mc_emem_cfg. 8GB total density. Max 8GB. }; diff --git a/bdk/mem/sdram_config_t210b01.inl b/bdk/mem/sdram_config_t210b01.inl index 8e584b5..f71db10 100644 --- a/bdk/mem/sdram_config_t210b01.inl +++ b/bdk/mem/sdram_config_t210b01.inl @@ -552,7 +552,7 @@ static const sdram_params_t210b01_t _dram_cfg_08_10_12_14_samsung_hynix_4gb = { * Specifies the value for MC_EMEM_CFG which holds the external memory * size (in KBytes) */ - .mc_emem_cfg = 0x00001000, // 4GB total density. + .mc_emem_cfg = 0x00001000, // 4GB total density. Max 8GB. /* MC arbitration configuration */ .mc_emem_arb_cfg = 0x08000001, @@ -714,7 +714,7 @@ static const sdram_params_t210b01_t _dram_cfg_08_10_12_14_samsung_hynix_4gb = { DRAM_CC(LPDDR4X_8GB_SAMSUNG_K4UBE3D4AA_MGCL) | \ DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D2NP_046_WTF) | \ DRAM_CC(LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEE) | \ - DRAM_CC(LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEI) | \ + DRAM_CC(LPDDR4X_4GB_HYNIX_H54G46CYRBX267) | \ DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D1NP_046_WTB) | \ DRAM_CC(LPDDR4X_4GB_SAMSUNG_K4U6E3S4AB_MGCL)) @@ -722,7 +722,7 @@ static const sdram_params_t210b01_t _dram_cfg_08_10_12_14_samsung_hynix_4gb = { DRAM_CC(LPDDR4X_4GB_SAMSUNG_K4U6E3S4AA_MGCL) | \ DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D2NP_046_WTF) | \ DRAM_CC(LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEE) | \ - DRAM_CC(LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEI) | \ + DRAM_CC(LPDDR4X_4GB_HYNIX_H54G46CYRBX267) | \ DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D1NP_046_WTB) | \ DRAM_CC(LPDDR4X_4GB_SAMSUNG_K4U6E3S4AB_MGCL)) @@ -731,7 +731,7 @@ static const sdram_params_t210b01_t _dram_cfg_08_10_12_14_samsung_hynix_4gb = { DRAM_CC(LPDDR4X_8GB_SAMSUNG_K4UBE3D4AA_MGCL) | \ DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D2NP_046_WTF) | \ DRAM_CC(LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEE) | \ - DRAM_CC(LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEI) | \ + DRAM_CC(LPDDR4X_4GB_HYNIX_H54G46CYRBX267) | \ DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D1NP_046_WTB) | \ DRAM_CC(LPDDR4X_4GB_SAMSUNG_K4U6E3S4AB_MGCL)) @@ -741,7 +741,7 @@ static const sdram_params_t210b01_t _dram_cfg_08_10_12_14_samsung_hynix_4gb = { DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D1NP_046_WTB)) #define DRAM_CC_LPDDR4X_VPR (DRAM_CC(LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEE) | \ - DRAM_CC(LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEI) | \ + DRAM_CC(LPDDR4X_4GB_HYNIX_H54G46CYRBX267) | \ DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D1NP_046_WTB) | \ DRAM_CC(LPDDR4X_4GB_SAMSUNG_K4U6E3S4AB_MGCL)) @@ -780,7 +780,7 @@ static const sdram_vendor_patch_t sdram_cfg_vendor_patches_t210b01[] = { { 0x00000008, 0x24C / 4, DRAM_CC_LPDDR4X_FAW }, // emc_tfaw. { 0x00000001, 0x670 / 4, DRAM_CC_LPDDR4X_FAW }, // mc_emem_arb_timing_faw. - { 0xE4FACB43, 0x6D4 / 4, DRAM_CC_LPDDR4X_VPR }, // mc_video_protect_vpr_override. + TSEC, NVENC. + { 0xE4FACB43, 0x6D4 / 4, DRAM_CC_LPDDR4X_VPR }, // mc_video_protect_vpr_override. + TSEC, NVENC. { 0x0600FED3, 0x6D8 / 4, DRAM_CC_LPDDR4X_VPR }, // mc_video_protect_vpr_override1. + TSECB, TSEC1, TSECB1. { 0x00000001, 0x134 / 4, DRAM_CC_LPDDR4X_8GB }, // emc_adr_cfg. 2 Ranks. @@ -801,7 +801,7 @@ static const sdram_vendor_patch_t sdram_cfg_vendor_patches_t210b01[] = { { 0x00000000, 0x594 / 4, DRAM_CC_LPDDR4X_8GB }, // emc_pmacro_tx_pwrd4. { 0x00001000, 0x598 / 4, DRAM_CC_LPDDR4X_8GB }, // emc_pmacro_tx_pwrd5. { 0x00000001, 0x630 / 4, DRAM_CC_LPDDR4X_8GB }, // mc_emem_adr_cfg. 2 Ranks. - { 0x00002000, 0x64C / 4, DRAM_CC_LPDDR4X_8GB }, // mc_emem_cfg. 8GB total density. + { 0x00002000, 0x64C / 4, DRAM_CC_LPDDR4X_8GB }, // mc_emem_cfg. 8GB total density. Max 8GB. { 0x00000002, 0x680 / 4, DRAM_CC_LPDDR4X_8GB }, // mc_emem_arb_timing_r2r. { 0x02020001, 0x694 / 4, DRAM_CC_LPDDR4X_8GB }, // mc_emem_arb_da_turns. }; From 80a32304cbaf2966ab9900b81f5a6eaa28bc4f82 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Mon, 25 Dec 2023 03:21:17 +0200 Subject: [PATCH 053/308] nyx: rename 3rd gen hynix ram chips --- nyx/nyx_gui/frontend/gui_info.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index 47c337d..53f9436 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -405,7 +405,7 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) // Decode fuses. char *sku; - char dram_man[32]; + char dram_man[64]; char fuses_hos_version[64]; u8 dram_id = fuse_read_dramid(true); @@ -503,16 +503,15 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) strcpy(dram_man, "Hynix H9HCNNNBKMMLXR-NEE 4GB"); break; - case LPDDR4X_UNK0_4GB_HYNIX_H9HCNNNBKMMLXR_NEI: - case LPDDR4X_UNK1_4GB_HYNIX_H9HCNNNBKMMLXR_NEI: - case LPDDR4X_UNK2_4GB_HYNIX_H9HCNNNBKMMLXR_NEI: - //strcpy(dram_man, "Hynix H9HCNNNBKMMLXR-NEI 4GB"); - strcpy(dram_man, "Hynix 1a 4GB #FF8000 Contact me!#"); + case LPDDR4X_IOWA_4GB_HYNIX_H54G46CYRBX267: + case LPDDR4X_HOAG_4GB_HYNIX_H54G46CYRBX267: + case LPDDR4X_AULA_4GB_HYNIX_H54G46CYRBX267: + strcpy(dram_man, "Hynix H54G46CYRBX267 4GB"); break; - case LPDDR4X_UNK0_4GB_MICRON_MT53E512M32D1NP_046_WTB: - case LPDDR4X_UNK1_4GB_MICRON_MT53E512M32D1NP_046_WTB: - case LPDDR4X_UNK2_4GB_MICRON_MT53E512M32D1NP_046_WTB: + case LPDDR4X_IOWA_4GB_MICRON_MT53E512M32D1NP_046_WTB: + case LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D1NP_046_WTB: + case LPDDR4X_AULA_4GB_MICRON_MT53E512M32D1NP_046_WTB: //strcpy(dram_man, "Micron MT53E512M32D1NP-046 WT:B"); strcpy(dram_man, "Micron 1a 4GB #FF8000 Contact me!#"); break; From 39abeb9a28fb84a273747b6659dffd5014870d28 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Mon, 25 Dec 2023 03:33:37 +0200 Subject: [PATCH 054/308] nyx: improve fuses info Correct the Chip ID Revision and also add actual (derived) iddq values. --- nyx/nyx_gui/frontend/gui_info.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index 53f9436..17a4034 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -615,9 +615,9 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) // Parse fuses and display them. s_printf(txt_buf, "%X - %s - %s\n%02d: %s\n%d - %d (HOS: %s)\n%08X %08X %08X\n%08X%08X%08X%08X\n%08X\n%08X%08X%08X%08X\n%08X%08X%08X%08X\n%d\n" - "%s\n%d.%02d (0x%X)\n%d.%02d (0x%X)\n%d\n%d\n%d\n%d\n0x%X\n%d\n%d\n%d\n%d\n" + "%s\n%d.%02d (0x%X)\n%d.%02d (0x%X)\n%d\n%d\n%d\n%d\n0x%X\n%d\n%d (%d)\n%d (%d)\n%d (%d)\n" "%d\n%d\n%d (0x%X)\n%d\n%d\n%d\n" - "ID: %02X, Major: A%02d, Minor: %d", + "ID: %02X, Major: %d, Minor: A%02d", FUSE(FUSE_SKU_INFO), sku, fuse_read_hw_state() ? "Dev" : "Retail", dram_id, dram_man, burnt_fuses_7, burnt_fuses_6, fuses_hos_version, fuse_read_odm(4), fuse_read_odm(6), fuse_read_odm(7), @@ -634,7 +634,9 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) (FUSE(FUSE_OPT_CP_REV) >> 5) & 0x3F, FUSE(FUSE_OPT_CP_REV) & 0x1F, FUSE(FUSE_OPT_CP_REV), FUSE(FUSE_CPU_SPEEDO_0_CALIB), FUSE(FUSE_CPU_SPEEDO_1_CALIB), FUSE(FUSE_CPU_SPEEDO_2_CALIB), FUSE(FUSE_SOC_SPEEDO_0_CALIB), FUSE(FUSE_SOC_SPEEDO_1_CALIB), FUSE(FUSE_SOC_SPEEDO_2_CALIB), - FUSE(FUSE_CPU_IDDQ_CALIB), FUSE(FUSE_SOC_IDDQ_CALIB), FUSE(FUSE_GPU_IDDQ_CALIB), + FUSE(FUSE_CPU_IDDQ_CALIB), FUSE(FUSE_CPU_IDDQ_CALIB) * 4, + FUSE(FUSE_SOC_IDDQ_CALIB), FUSE(FUSE_SOC_IDDQ_CALIB) * 4, + FUSE(FUSE_GPU_IDDQ_CALIB), FUSE(FUSE_GPU_IDDQ_CALIB) * 5, FUSE(FUSE_OPT_VENDOR_CODE), FUSE(FUSE_OPT_FAB_CODE), lot_bin, FUSE(FUSE_OPT_LOT_CODE_0), FUSE(FUSE_OPT_WAFER_ID), FUSE(FUSE_OPT_X_COORDINATE), FUSE(FUSE_OPT_Y_COORDINATE), (chip_id >> 8) & 0xFF, (chip_id >> 4) & 0xF, (chip_id >> 16) & 0xF); @@ -1604,7 +1606,7 @@ static lv_res_t _create_window_emmc_info_status(lv_obj_t *btn) s_printf(txt_buf + strlen(txt_buf), "(%02X)\n%c%c%c%c%c%c\n%d.%d\n%04X\n%02d/%04d\n\n", emmc_storage.cid.manfid, emmc_storage.cid.prod_name[0], emmc_storage.cid.prod_name[1], emmc_storage.cid.prod_name[2], - emmc_storage.cid.prod_name[3], emmc_storage.cid.prod_name[4], emmc_storage.cid.prod_name[5], + emmc_storage.cid.prod_name[3], emmc_storage.cid.prod_name[4], emmc_storage.cid.prod_name[5], emmc_storage.cid.prv & 0xF, emmc_storage.cid.prv >> 4, emmc_storage.cid.serial, emmc_storage.cid.month, emmc_storage.cid.year); From e47a8199487b0cd726771bd8dff9407dc25858cb Mon Sep 17 00:00:00 2001 From: CTCaer Date: Mon, 25 Dec 2023 03:44:52 +0200 Subject: [PATCH 055/308] bdk: se: add more useful functions - aes cmac 128bit - aes hashing - option to clear updated aes iv --- bdk/sec/se.c | 87 ++++++++++++++++++++++++++++++++++++++++++++++++++++ bdk/sec/se.h | 3 ++ 2 files changed, 90 insertions(+) diff --git a/bdk/sec/se.c b/bdk/sec/se.c index eaecac8..d377049 100644 --- a/bdk/sec/se.c +++ b/bdk/sec/se.c @@ -281,6 +281,14 @@ void se_aes_iv_clear(u32 ks) } } +void se_aes_iv_updated_clear(u32 ks) +{ + for (u32 i = 0; i < (SE_AES_IV_SIZE / 4); i++) + { + SE(SE_CRYPTO_KEYTABLE_ADDR_REG) = SE_KEYTABLE_SLOT(ks) | SE_KEYTABLE_QUAD(UPDATED_IV) | SE_KEYTABLE_PKT(i); + SE(SE_CRYPTO_KEYTABLE_DATA_REG) = 0; + } +} int se_aes_unwrap_key(u32 ks_dst, u32 ks_src, const void *input) { @@ -292,6 +300,26 @@ int se_aes_unwrap_key(u32 ks_dst, u32 ks_src, const void *input) return _se_execute_oneshot(SE_OP_START, NULL, 0, input, SE_KEY_128_SIZE); } +int se_aes_crypt_hash(u32 ks, u32 enc, void *dst, u32 dst_size, const void *src, u32 src_size) +{ + if (enc) + { + SE(SE_CONFIG_REG) = SE_CONFIG_ENC_ALG(ALG_AES_ENC) | SE_CONFIG_DST(DST_MEMORY); + SE(SE_CRYPTO_CONFIG_REG) = SE_CRYPTO_KEY_INDEX(ks) | SE_CRYPTO_VCTRAM_SEL(VCTRAM_AESOUT) | + SE_CRYPTO_CORE_SEL(CORE_ENCRYPT) | SE_CRYPTO_XOR_POS(XOR_TOP) | + SE_CRYPTO_HASH(HASH_ENABLE); + } + else + { + SE(SE_CONFIG_REG) = SE_CONFIG_DEC_ALG(ALG_AES_DEC) | SE_CONFIG_DST(DST_MEMORY); + SE(SE_CRYPTO_CONFIG_REG) = SE_CRYPTO_KEY_INDEX(ks) | SE_CRYPTO_VCTRAM_SEL(VCTRAM_PREVMEM) | + SE_CRYPTO_CORE_SEL(CORE_DECRYPT) | SE_CRYPTO_XOR_POS(XOR_BOTTOM) | + SE_CRYPTO_HASH(HASH_ENABLE); + } + SE(SE_CRYPTO_BLOCK_COUNT_REG) = (src_size >> 4) - 1; + return _se_execute_oneshot(SE_OP_START, dst, dst_size, src, src_size); +} + int se_aes_crypt_ecb(u32 ks, u32 enc, void *dst, u32 dst_size, const void *src, u32 src_size) { if (enc) @@ -620,3 +648,62 @@ void se_get_aes_keys(u8 *buf, u8 *keys, u32 keysize) se_aes_crypt_cbc(3, DECRYPT, keys, SE_AES_KEYSLOT_COUNT * keysize, keys, SE_AES_KEYSLOT_COUNT * keysize); se_aes_key_clear(3); } + +int se_aes_cmac_128(u32 ks, void *dst, const void *src, u32 src_size) +{ + int res = 0; + u8 *key = (u8 *)calloc(1, SE_KEY_128_SIZE); + u8 *last_block = (u8 *)calloc(1, SE_AES_BLOCK_SIZE); + + se_aes_iv_clear(ks); + se_aes_iv_updated_clear(ks); + + // Generate sub key + if (!se_aes_crypt_hash(ks, ENCRYPT, key, SE_KEY_128_SIZE, key, SE_KEY_128_SIZE)) + goto out; + + _gf256_mul_x(key); + if (src_size & 0xF) + _gf256_mul_x(key); + + SE(SE_CONFIG_REG) = SE_CONFIG_ENC_MODE(MODE_KEY128) | SE_CONFIG_ENC_ALG(ALG_AES_ENC) | SE_CONFIG_DST(DST_HASHREG); + SE(SE_CRYPTO_CONFIG_REG) = SE_CRYPTO_KEY_INDEX(ks) | SE_CRYPTO_INPUT_SEL(INPUT_MEMORY) | + SE_CRYPTO_XOR_POS(XOR_TOP) | SE_CRYPTO_VCTRAM_SEL(VCTRAM_AESOUT) | SE_CRYPTO_HASH(HASH_ENABLE) | + SE_CRYPTO_CORE_SEL(CORE_ENCRYPT); + se_aes_iv_clear(ks); + se_aes_iv_updated_clear(ks); + + u32 num_blocks = (src_size + 0xf) >> 4; + if (num_blocks > 1) + { + SE(SE_CRYPTO_BLOCK_COUNT_REG) = num_blocks - 2; + if (!_se_execute_oneshot(SE_OP_START, NULL, 0, src, src_size)) + goto out; + SE(SE_CRYPTO_CONFIG_REG) |= SE_CRYPTO_IV_SEL(IV_UPDATED); + } + + if (src_size & 0xf) + { + memcpy(last_block, src + (src_size & ~0xf), src_size & 0xf); + last_block[src_size & 0xf] = 0x80; + } + else if (src_size >= SE_AES_BLOCK_SIZE) + { + memcpy(last_block, src + src_size - SE_AES_BLOCK_SIZE, SE_AES_BLOCK_SIZE); + } + + for (u32 i = 0; i < SE_KEY_128_SIZE; i++) + last_block[i] ^= key[i]; + + SE(SE_CRYPTO_BLOCK_COUNT_REG) = 0; + res = _se_execute_oneshot(SE_OP_START, NULL, 0, last_block, SE_AES_BLOCK_SIZE); + + u32 *dst32 = (u32 *)dst; + for (u32 i = 0; i < (SE_KEY_128_SIZE / 4); i++) + dst32[i] = SE(SE_HASH_RESULT_REG + (i * 4)); + +out:; + free(key); + free(last_block); + return res; +} diff --git a/bdk/sec/se.h b/bdk/sec/se.h index ef045d7..7c8c38b 100644 --- a/bdk/sec/se.h +++ b/bdk/sec/se.h @@ -30,7 +30,9 @@ void se_aes_iv_set(u32 ks, void *iv); void se_aes_key_get(u32 ks, void *key, u32 size); void se_aes_key_clear(u32 ks); void se_aes_iv_clear(u32 ks); +void se_aes_iv_updated_clear(u32 ks); int se_aes_unwrap_key(u32 ks_dst, u32 ks_src, const void *input); +int se_aes_crypt_hash(u32 ks, u32 enc, void *dst, u32 dst_size, const void *src, u32 src_size); int se_aes_crypt_cbc(u32 ks, u32 enc, void *dst, u32 dst_size, const void *src, u32 src_size); int se_aes_crypt_ecb(u32 ks, u32 enc, void *dst, u32 dst_size, const void *src, u32 src_size); int se_aes_crypt_block_ecb(u32 ks, u32 enc, void *dst, const void *src); @@ -42,5 +44,6 @@ int se_calc_sha256(void *hash, u32 *msg_left, const void *src, u32 src_size, u6 int se_calc_sha256_oneshot(void *hash, const void *src, u32 src_size); int se_calc_sha256_finalize(void *hash, u32 *msg_left); int se_gen_prng128(void *dst); +int se_aes_cmac_128(u32 ks, void *dst, const void *src, u32 src_size); #endif From 504659a39badb76571c52232eb8ddd670844beb5 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Mon, 25 Dec 2023 03:46:05 +0200 Subject: [PATCH 056/308] bdk: actmon: switch to averaged sampling --- bdk/soc/actmon.c | 23 +++++++++++------------ 1 file changed, 11 insertions(+), 12 deletions(-) diff --git a/bdk/soc/actmon.c b/bdk/soc/actmon.c index 4df80eb..568f82e 100644 --- a/bdk/soc/actmon.c +++ b/bdk/soc/actmon.c @@ -76,7 +76,9 @@ #define ACTMON_HISTOGRAM_DATA_BASE 0x380 #define ACTMON_HISTOGRAM_DATA_NUM 32 -#define ACTMON_FREQ 19200000 +#define ACTMON_FREQ 19200000 +#define ACTMON_PERIOD_MS 20 +#define DEV_COUNT_WEIGHT 5 typedef struct _actmon_dev_reg_t { @@ -91,11 +93,9 @@ typedef struct _actmon_dev_reg_t vu32 avg_count; vu32 intr_status; vu32 ctrl2; - vu32 unk[5]; + vu32 rsvd[5]; } actmon_dev_reg_t; -u32 sample_period = 0; - void actmon_hist_enable(actmon_hist_src_t src) { ACTMON(ACTMON_HISTOGRAM_CONFIG) = ACTMON_HIST_CFG_SOURCE(src) | ACTMON_HIST_CFG_ACTIVE; @@ -120,10 +120,10 @@ void actmon_dev_enable(actmon_dev_t dev) { actmon_dev_reg_t *regs = (actmon_dev_reg_t *)(ACTMON_DEV_BASE + (dev * ACTMON_DEV_SIZE)); - regs->init_avg = 0; - regs->count_weight = 5; + regs->init_avg = ACTMON_FREQ * ACTMON_PERIOD_MS * DEV_COUNT_WEIGHT / 100; + regs->count_weight = DEV_COUNT_WEIGHT; - regs->ctrl = ACTMON_DEV_CTRL_ENB | ACTMON_DEV_CTRL_ENB_PERIODIC; + regs->ctrl = ACTMON_DEV_CTRL_ENB | ACTMON_DEV_CTRL_ENB_PERIODIC | ACTMON_DEV_CTRL_K_VAL(7); // 128 samples average. } void actmon_dev_disable(actmon_dev_t dev) @@ -138,7 +138,7 @@ u32 actmon_dev_get_load(actmon_dev_t dev) actmon_dev_reg_t *regs = (actmon_dev_reg_t *)(ACTMON_DEV_BASE + (dev * ACTMON_DEV_SIZE)); // Get load-based sampling. 1 decimal point precision. - u32 load = regs->count / (ACTMON_FREQ / 1000); + u32 load = regs->count * 100 / (ACTMON_FREQ / (ACTMON_PERIOD_MS * DEV_COUNT_WEIGHT)); return load; } @@ -148,7 +148,7 @@ u32 actmon_dev_get_load_avg(actmon_dev_t dev) actmon_dev_reg_t *regs = (actmon_dev_reg_t *)(ACTMON_DEV_BASE + (dev * ACTMON_DEV_SIZE)); // Get load-based sampling. 1 decimal point precision. - u32 avg_load = regs->avg_count / (ACTMON_FREQ / 1000); + u32 avg_load = regs->avg_count * 100 / (ACTMON_FREQ / (ACTMON_PERIOD_MS * DEV_COUNT_WEIGHT)); return avg_load; } @@ -162,9 +162,8 @@ void actmon_init() { clock_enable_actmon(); - // Set period to 200ms. - ACTMON(ACTMON_GLB_PERIOD_CTRL) &= ~ACTMON_GLB_PERIOD_USEC; - ACTMON(ACTMON_GLB_PERIOD_CTRL) |= ACTMON_GLB_PERIOD_SAMPLE(200); + // Set period. + ACTMON(ACTMON_GLB_PERIOD_CTRL) = ACTMON_GLB_PERIOD_SAMPLE(ACTMON_PERIOD_MS); } void actmon_end() From 87c50732c0ce0eb7430d6d04b8a3ffe0edf93c43 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Mon, 25 Dec 2023 03:47:26 +0200 Subject: [PATCH 057/308] bdk: fuse: simplify idle wait --- bdk/soc/fuse.c | 7 ++----- bdk/soc/fuse.h | 21 +++++++++++++++++++++ 2 files changed, 23 insertions(+), 5 deletions(-) diff --git a/bdk/soc/fuse.c b/bdk/soc/fuse.c index 85d8bee..60e2fe7 100644 --- a/bdk/soc/fuse.c +++ b/bdk/soc/fuse.c @@ -167,11 +167,8 @@ int fuse_set_sbk() void fuse_wait_idle() { - u32 ctrl; - do - { - ctrl = FUSE(FUSE_CTRL); - } while (((ctrl >> 16) & 0x1f) != 4); + while (((FUSE(FUSE_CTRL) >> 16) & 0x1F) != FUSE_STATUS_IDLE) + ; } u32 fuse_read(u32 addr) diff --git a/bdk/soc/fuse.h b/bdk/soc/fuse.h index 1a53a2c..48a2c7f 100644 --- a/bdk/soc/fuse.h +++ b/bdk/soc/fuse.h @@ -255,11 +255,32 @@ #define FUSE_SPARE_BIT_31 0x3FC /*! Fuse commands. */ +#define FUSE_IDLE 0x0 #define FUSE_READ 0x1 #define FUSE_WRITE 0x2 #define FUSE_SENSE 0x3 #define FUSE_CMD_MASK 0x3 +/*! Fuse status. */ +#define FUSE_STATUS_RESET 0 +#define FUSE_STATUS_POST_RESET 1 +#define FUSE_STATUS_LOAD_ROW0 2 +#define FUSE_STATUS_LOAD_ROW1 3 +#define FUSE_STATUS_IDLE 4 +#define FUSE_STATUS_READ_SETUP 5 +#define FUSE_STATUS_READ_STROBE 6 +#define FUSE_STATUS_SAMPLE_FUSES 7 +#define FUSE_STATUS_READ_HOLD 8 +#define FUSE_STATUS_FUSE_SRC_SETUP 9 +#define FUSE_STATUS_WRITE_SETUP 10 +#define FUSE_STATUS_WRITE_ADDR_SETUP 11 +#define FUSE_STATUS_WRITE_PROGRAM 12 +#define FUSE_STATUS_WRITE_ADDR_HOLD 13 +#define FUSE_STATUS_FUSE_SRC_HOLD 14 +#define FUSE_STATUS_LOAD_RIR 15 +#define FUSE_STATUS_READ_BEFORE_WRITE_SETUP 16 +#define FUSE_STATUS_READ_DEASSERT_PD 17 + /*! Fuse cache registers. */ #define FUSE_RESERVED_ODMX(x) (0x1C8 + 4 * (x)) From 7f98fb736a5820b9044b014b73f7185aff76ccff Mon Sep 17 00:00:00 2001 From: CTCaer Date: Mon, 25 Dec 2023 04:07:26 +0200 Subject: [PATCH 058/308] bdk: hwinit: reorder sdmmc1 reg disable --- bdk/soc/hw_init.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/bdk/soc/hw_init.c b/bdk/soc/hw_init.c index 8771275..62a4446 100644 --- a/bdk/soc/hw_init.c +++ b/bdk/soc/hw_init.c @@ -277,12 +277,12 @@ static void _config_regulators(bool tegra_t210) // Disable low battery shutdown monitor. max77620_low_battery_monitor_config(false); - // Disable SDMMC1 IO power. - gpio_write(GPIO_PORT_E, GPIO_PIN_4, GPIO_LOW); + // Disable SDMMC1 IO/Core power. max7762x_regulator_enable(REGULATOR_LDO2, false); + gpio_write(GPIO_PORT_E, GPIO_PIN_4, GPIO_LOW); sd_power_cycle_time_start = get_tmr_ms(); - // Disable LCD DVDD. + // Disable LCD DVDD to make sure it's in a reset state. max7762x_regulator_enable(REGULATOR_LDO0, false); i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_CNFGBBC, MAX77620_CNFGBBC_RESISTOR_1K); From b584a3f53aaa9a25cd14e52bbd57bcaafc95ec2a Mon Sep 17 00:00:00 2001 From: CTCaer Date: Mon, 25 Dec 2023 04:08:34 +0200 Subject: [PATCH 059/308] bdk: add several defines --- bdk/soc/irq.h | 1 + bdk/soc/pmc.h | 9 +++++++++ 2 files changed, 10 insertions(+) diff --git a/bdk/soc/irq.h b/bdk/soc/irq.h index dbd5ee2..54dc12a 100644 --- a/bdk/soc/irq.h +++ b/bdk/soc/irq.h @@ -180,6 +180,7 @@ #define IRQ_EVENT_GPIO_A 162 #define IRQ_EVENT_GPIO_B 163 #define IRQ_EVENT_GPIO_C 164 +#define IRQ_EVENT_GPIO_D_T210B01 165 #define IRQ_FLOW_RSM_CPU 168 #define IRQ_FLOW_RSM_COP 169 #define IRQ_TMR_SHARED 170 diff --git a/bdk/soc/pmc.h b/bdk/soc/pmc.h index e983447..2bbc598 100644 --- a/bdk/soc/pmc.h +++ b/bdk/soc/pmc.h @@ -132,6 +132,9 @@ #define PMC_CNTRL2_SYSCLK_ORRIDE BIT(10) #define PMC_CNTRL2_HOLD_CKE_LOW_EN BIT(12) #define PMC_CNTRL2_ALLOW_PULSE_WAKE BIT(14) +#define APBDEV_PMC_FUSE_CONTROL 0x450 +#define PMC_FUSE_CONTROL_PS18_LATCH_SET BIT(8) +#define PMC_FUSE_CONTROL_PS18_LATCH_CLR BIT(9) #define APBDEV_PMC_IO_DPD3_REQ 0x45C #define APBDEV_PMC_IO_DPD4_REQ 0x464 #define APBDEV_PMC_UTMIP_PAD_CFG1 0x4C4 @@ -177,6 +180,12 @@ #define PMC_LED_BREATHING_COUNTER_HZ 32768 #define APBDEV_PMC_LED_BREATHING_STATUS 0xB5C #define PMC_LED_BREATHING_FSM_STATUS_MASK 0x7 +#define PMC_LED_BREATHING_FSM_STS_IDLE 0 +#define PMC_LED_BREATHING_FSM_STS_UP_RAMP 1 +#define PMC_LED_BREATHING_FSM_STS_PLATEAU 2 +#define PMC_LED_BREATHING_FSM_STS_DOWN_RAMP 3 +#define PMC_LED_BREATHING_FSM_STS_SHORT_LOW_PERIOD 4 +#define PMC_LED_BREATHING_FSM_STS_LONG_LOW_PERIOD 5 #define APBDEV_PMC_TZRAM_PWR_CNTRL 0xBE8 #define PMC_TZRAM_PWR_CNTRL_SD BIT(0) #define APBDEV_PMC_TZRAM_SEC_DISABLE 0xBEC From db214f28653adbd3f5d1e94b23146e1d80ec46b2 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Mon, 25 Dec 2023 04:09:46 +0200 Subject: [PATCH 060/308] l4t: correct debug print --- bootloader/l4t/l4t.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bootloader/l4t/l4t.c b/bootloader/l4t/l4t.c index e91a631..f83fc82 100644 --- a/bootloader/l4t/l4t.c +++ b/bootloader/l4t/l4t.c @@ -819,7 +819,7 @@ static void _l4t_bpmpfw_b01_config(l4t_ctxt_t *ctxt) // Enable table. BPMPFW_B01_DTB_EMC_TBL_ENABLE(tbl_idx); - UPRINTF("RAM Frequency set to: %d KHz. Voltage: %d mV\n", ram_oc_freq, ram_oc_volt); + UPRINTF("RAM Frequency set to: %d KHz. Voltage: %d mV\n", ram_oc_freq, ctxt->ram_oc_vdd2); } // Save BPMP-FW entrypoint for TZ. From bd1733c4fa1820e736d29a3054f9bc290c1eb139 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Mon, 25 Dec 2023 04:11:55 +0200 Subject: [PATCH 061/308] minerva: use min 2 divm Adhere to software based imposed limits for T210. --- modules/hekate_libsys_minerva/sys_sdrammtc.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/modules/hekate_libsys_minerva/sys_sdrammtc.c b/modules/hekate_libsys_minerva/sys_sdrammtc.c index 9245ed2..38a9945 100644 --- a/modules/hekate_libsys_minerva/sys_sdrammtc.c +++ b/modules/hekate_libsys_minerva/sys_sdrammtc.c @@ -91,9 +91,9 @@ static pllm_clk_config_t pllm_clk_config_table[] = {38400, 2099200, 164, 3, 0}, // Custom. Normalized 2100 MHz. {38400, 2131200, 111, 2, 0}, // JEDEC Standard. (T210B01 official max). {38400, 2163200, 169, 3, 0}, // Custom. Normalized 2166 MHz. - {38400, 2188800, 57, 1, 0}, // Custom. Normalized 2200 MHz. - {38400, 2227200, 58, 1, 0}, // Custom. Normalized 2233 MHz. - {38400, 2265600, 59, 1, 0}, // Custom. Normalized 2266 MHz. + {38400, 2188800, 114, 2, 0}, // Custom. Normalized 2200 MHz. + {38400, 2227200, 116, 2, 0}, // Custom. Normalized 2233 MHz. + {38400, 2265600, 118, 2, 0}, // Custom. Normalized 2266 MHz. {38400, 2291200, 179, 3, 0}, // Custom. Normalized 2300 MHz. {38400, 2329600, 182, 3, 0}, // Custom. Normalized 2333 MHz. {38400, 2361600, 123, 2, 0}, // Custom. Normalized 2366 MHz. @@ -3280,7 +3280,7 @@ static u32 _minerva_set_clock(emc_table_t *src_emc_entry, emc_table_t *dst_emc_e if (needs_wr_training) training_command |= (1 << 3); // WR: Initiates WR Training. if (needs_wr_vref_training) - training_command |= (1 << 6); // WR_VREF: Initiates OB (wrire) DRAM_VREF Training. + training_command |= (1 << 6); // WR_VREF: Initiates OB (write) DRAM_VREF Training. if (needs_rd_training) training_command |= (1 << 2); // RD: Initiates RD Training. if (needs_rd_vref_training) @@ -3614,9 +3614,9 @@ void _minerva_do_over_temp_compensation(mtc_config_t *mtc_cfg) if (dram_type != DRAM_TYPE_LPDDR4) return; - u32 dram_temp = _get_dram_temperature(); + s32 dram_temp = _get_dram_temperature(); - if (mtc_cfg->prev_temp == dram_temp || dram_temp == (u32)-1) + if (dram_temp < 0 || mtc_cfg->prev_temp == (u32)dram_temp) return; u32 refr = mtc_cfg->current_emc_table->burst_regs.emc_refresh; @@ -3632,7 +3632,7 @@ void _minerva_do_over_temp_compensation(mtc_config_t *mtc_cfg) case 3: if (mtc_cfg->prev_temp < 4) { - mtc_cfg->prev_temp = dram_temp; + mtc_cfg->prev_temp = (u32)dram_temp; return; } break; From e23d469f067c490eaf787c7faa1aa2191888649d Mon Sep 17 00:00:00 2001 From: CTCaer Date: Mon, 25 Dec 2023 04:17:59 +0200 Subject: [PATCH 062/308] nyx: revamp jc/sio cal info dumping Hoag: - Add stick types - Add imu type All the rest: - Add imu calibration info - Add BT mac --- nyx/nyx_gui/frontend/gui_options.c | 105 +++++++++++++++++++---------- 1 file changed, 71 insertions(+), 34 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_options.c b/nyx/nyx_gui/frontend/gui_options.c index b523754..76e322a 100644 --- a/nyx/nyx_gui/frontend/gui_options.c +++ b/nyx/nyx_gui/frontend/gui_options.c @@ -850,19 +850,17 @@ static lv_res_t _joycon_info_dump_action(lv_obj_t * btn) char *data = (char *)malloc(SZ_16K); char *txt_buf = (char *)malloc(SZ_4K); - if (nx_hoag) - { - error = hos_dump_cal0(); - if (!error) - goto save_data; - } + error = hos_dump_cal0(); - if (!jc_pad || nx_hoag) + if ((!nx_hoag && !jc_pad) || error) { error = 255; goto disabled; } + if (nx_hoag) + goto save_data; + // Count valid joycon. u32 joycon_found = jc_pad->bt_conn_l.type ? 1 : 0; if (jc_pad->bt_conn_r.type) @@ -877,13 +875,16 @@ save_data: if (!error) { + nx_emmc_cal0_t *cal0 = (nx_emmc_cal0_t *)cal0_buf; + + f_mkdir("switchroot"); + if (!nx_hoag) { // Save binary dump. memcpy(data, &jc_pad->bt_conn_l, sizeof(jc_bt_conn_t)); memcpy(data + sizeof(jc_bt_conn_t), &jc_pad->bt_conn_r, sizeof(jc_bt_conn_t)); - f_mkdir("switchroot"); error = sd_save_to_file((u8 *)data, sizeof(jc_bt_conn_t) * 2, "switchroot/joycon_mac.bin"); // Save readable dump. @@ -913,32 +914,12 @@ save_data: f_puts(data, &fp); f_close(&fp); } - } - else - { - nx_emmc_cal0_t *cal0 = (nx_emmc_cal0_t *)cal0_buf; - jc_calib_t *stick_cal_l = (jc_calib_t *)cal0->analog_stick_cal_l; - jc_calib_t *stick_cal_r = (jc_calib_t *)cal0->analog_stick_cal_r; f_mkdir("switchroot"); - // Save Lite Gamepad Calibration data. - // Actual max/min are right/left and up/down offsets. + // Save IMU Calibration data. s_printf(data, - "lite_cal_lx_lof=0x%X\n" - "lite_cal_lx_cnt=0x%X\n" - "lite_cal_lx_rof=0x%X\n" - "lite_cal_ly_dof=0x%X\n" - "lite_cal_ly_cnt=0x%X\n" - "lite_cal_ly_uof=0x%X\n\n" - - "lite_cal_rx_lof=0x%X\n" - "lite_cal_rx_cnt=0x%X\n" - "lite_cal_rx_rof=0x%X\n" - "lite_cal_ry_dof=0x%X\n" - "lite_cal_ry_cnt=0x%X\n" - "lite_cal_ry_uof=0x%X\n\n" - + "imu_type=%d\n\n" "acc_cal_off_x=0x%X\n" "acc_cal_off_y=0x%X\n" "acc_cal_off_z=0x%X\n" @@ -954,16 +935,72 @@ save_data: "gyr_cal_scl_z=0x%X\n\n" "device_bt_mac=%02X:%02X:%02X:%02X:%02X:%02X\n", - stick_cal_l->x_min, stick_cal_l->x_center, stick_cal_l->x_max, - stick_cal_l->y_min, stick_cal_l->y_center, stick_cal_l->y_max, - stick_cal_r->x_min, stick_cal_r->x_center, stick_cal_r->x_max, - stick_cal_r->y_min, stick_cal_r->y_center, stick_cal_r->y_max, + cal0->console_6axis_sensor_type, cal0->acc_offset[0], cal0->acc_offset[1], cal0->acc_offset[2], cal0->acc_scale[0], cal0->acc_scale[1], cal0->acc_scale[2], cal0->gyro_offset[0], cal0->gyro_offset[1], cal0->gyro_offset[2], cal0->gyro_scale[0], cal0->gyro_scale[1], cal0->gyro_scale[2], cal0->bd_mac[0], cal0->bd_mac[1], cal0->bd_mac[2], cal0->bd_mac[3], cal0->bd_mac[4], cal0->bd_mac[5]); + if (!error) + error = f_open(&fp, "switchroot/switch.cal", FA_WRITE | FA_CREATE_ALWAYS); + if (!error) + { + f_puts(data, &fp); + f_close(&fp); + } + } + else + { + jc_calib_t *stick_cal_l = (jc_calib_t *)cal0->analog_stick_cal_l; + jc_calib_t *stick_cal_r = (jc_calib_t *)cal0->analog_stick_cal_r; + // Save Lite Gamepad and IMU Calibration data. + // Actual max/min are right/left and up/down offsets. + s_printf(data, + "lite_cal_l_type=0x%X\n" + "lite_cal_lx_lof=0x%X\n" + "lite_cal_lx_cnt=0x%X\n" + "lite_cal_lx_rof=0x%X\n" + "lite_cal_ly_dof=0x%X\n" + "lite_cal_ly_cnt=0x%X\n" + "lite_cal_ly_uof=0x%X\n\n" + + "lite_cal_r_type=0x%X\n" + "lite_cal_rx_lof=0x%X\n" + "lite_cal_rx_cnt=0x%X\n" + "lite_cal_rx_rof=0x%X\n" + "lite_cal_ry_dof=0x%X\n" + "lite_cal_ry_cnt=0x%X\n" + "lite_cal_ry_uof=0x%X\n\n" + + "imu_type=%d\n\n" + "acc_cal_off_x=0x%X\n" + "acc_cal_off_y=0x%X\n" + "acc_cal_off_z=0x%X\n" + "acc_cal_scl_x=0x%X\n" + "acc_cal_scl_y=0x%X\n" + "acc_cal_scl_z=0x%X\n\n" + + "gyr_cal_off_x=0x%X\n" + "gyr_cal_off_y=0x%X\n" + "gyr_cal_off_z=0x%X\n" + "gyr_cal_scl_x=0x%X\n" + "gyr_cal_scl_y=0x%X\n" + "gyr_cal_scl_z=0x%X\n\n" + + "device_bt_mac=%02X:%02X:%02X:%02X:%02X:%02X\n", + cal0->analog_stick_type_l, + stick_cal_l->x_min, stick_cal_l->x_center, stick_cal_l->x_max, + stick_cal_l->y_min, stick_cal_l->y_center, stick_cal_l->y_max, + cal0->analog_stick_type_r, + stick_cal_r->x_min, stick_cal_r->x_center, stick_cal_r->x_max, + stick_cal_r->y_min, stick_cal_r->y_center, stick_cal_r->y_max, + cal0->console_6axis_sensor_type, + cal0->acc_offset[0], cal0->acc_offset[1], cal0->acc_offset[2], + cal0->acc_scale[0], cal0->acc_scale[1], cal0->acc_scale[2], + cal0->gyro_offset[0], cal0->gyro_offset[1], cal0->gyro_offset[2], + cal0->gyro_scale[0], cal0->gyro_scale[1], cal0->gyro_scale[2], + cal0->bd_mac[0], cal0->bd_mac[1], cal0->bd_mac[2], cal0->bd_mac[3], cal0->bd_mac[4], cal0->bd_mac[5]); if (!error) error = f_open(&fp, "switchroot/switch.cal", FA_WRITE | FA_CREATE_ALWAYS); if (!error) From 41d35653530aeb3dd4c13c6adec906ac0bf0dbc5 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 27 Dec 2023 15:01:20 +0200 Subject: [PATCH 063/308] bdk: sdmmc: deduplicate function modes get And parse the whole info --- bdk/storage/sdmmc.c | 57 ++++++++++++++++++++++++++++----------------- bdk/storage/sdmmc.h | 10 ++++++++ 2 files changed, 46 insertions(+), 21 deletions(-) diff --git a/bdk/storage/sdmmc.c b/bdk/storage/sdmmc.c index 965fd73..fdfedff 100644 --- a/bdk/storage/sdmmc.c +++ b/bdk/storage/sdmmc.c @@ -1292,21 +1292,36 @@ static int _sd_storage_set_card_bus_speed(sdmmc_storage_t *storage, u32 hs_type, return 0; } -static int _sd_storage_enable_uhs_low_volt(sdmmc_storage_t *storage, u32 type, u8 *buf) +int sd_storage_get_fmodes(sdmmc_storage_t *storage, u8 *buf, sd_func_modes_t *fmodes) { - if (sdmmc_get_bus_width(storage->sdmmc) != SDMMC_BUS_WIDTH_4) - return 0; + if (!buf) + buf = (u8 *)SDMMC_UPPER_BUFFER; if (!_sd_storage_switch_get(storage, buf)) return 0; - u8 access_mode = buf[13]; - u16 power_limit = buf[7] | (buf[6] << 8); + fmodes->access_mode = buf[13] | (buf[12] << 8); + fmodes->cmd_system = buf[11] | (buf[10] << 8); + fmodes->driver_strength = buf[9] | (buf[8] << 8); + fmodes->power_limit = buf[7] | (buf[6] << 8); + + return 1; +} + +static int _sd_storage_enable_uhs_low_volt(sdmmc_storage_t *storage, u32 type, u8 *buf) +{ + sd_func_modes_t fmodes; + + if (sdmmc_get_bus_width(storage->sdmmc) != SDMMC_BUS_WIDTH_4) + return 0; + + if (!sd_storage_get_fmodes(storage, buf, &fmodes)) + return 0; + #ifdef BDK_SDMMC_UHS_DDR200_SUPPORT - u16 cmd_system = buf[11] | (buf[10] << 8); - DPRINTF("[SD] access: %02X, power: %02X, cmd: %02X\n", access_mode, power_limit, cmd_system); + DPRINTF("[SD] access: %02X, power: %02X, cmd: %02X\n", fmodes.access_mode, fmodes.power_limit, fmodes.cmd_system); #else - DPRINTF("[SD] access: %02X, power: %02X\n", access_mode, power_limit); + DPRINTF("[SD] access: %02X, power: %02X\n", fmodes.access_mode, fmodes.power_limit); #endif u32 hs_type = 0; @@ -1315,11 +1330,11 @@ static int _sd_storage_enable_uhs_low_volt(sdmmc_storage_t *storage, u32 type, u #ifdef BDK_SDMMC_UHS_DDR200_SUPPORT case SDHCI_TIMING_UHS_DDR200: // Fall through if DDR200 is not supported. - if (cmd_system & SD_MODE_UHS_DDR200) + if (fmodes.cmd_system & SD_MODE_UHS_DDR200) { DPRINTF("[SD] setting bus speed to DDR200\n"); storage->csd.busspeed = 200; - _sd_storage_set_power_limit(storage, power_limit, buf); + _sd_storage_set_power_limit(storage, fmodes.power_limit, buf); return _sd_storage_enable_DDR200(storage, buf); } #endif @@ -1327,7 +1342,7 @@ static int _sd_storage_enable_uhs_low_volt(sdmmc_storage_t *storage, u32 type, u case SDHCI_TIMING_UHS_SDR104: case SDHCI_TIMING_UHS_SDR82: // Fall through if not supported. - if (access_mode & SD_MODE_UHS_SDR104) + if (fmodes.access_mode & SD_MODE_UHS_SDR104) { type = SDHCI_TIMING_UHS_SDR104; hs_type = UHS_SDR104_BUS_SPEED; @@ -1345,7 +1360,7 @@ static int _sd_storage_enable_uhs_low_volt(sdmmc_storage_t *storage, u32 type, u } case SDHCI_TIMING_UHS_SDR50: - if (access_mode & SD_MODE_UHS_SDR50) + if (fmodes.access_mode & SD_MODE_UHS_SDR50) { type = SDHCI_TIMING_UHS_SDR50; hs_type = UHS_SDR50_BUS_SPEED; @@ -1355,7 +1370,7 @@ static int _sd_storage_enable_uhs_low_volt(sdmmc_storage_t *storage, u32 type, u } /* case SDHCI_TIMING_UHS_DDR50: - if (access_mode & SD_MODE_UHS_DDR50) + if (fmodes.access_mode & SD_MODE_UHS_DDR50) { type = SDHCI_TIMING_UHS_DDR50; hs_type = UHS_DDR50_BUS_SPEED; @@ -1365,7 +1380,7 @@ static int _sd_storage_enable_uhs_low_volt(sdmmc_storage_t *storage, u32 type, u } */ case SDHCI_TIMING_UHS_SDR25: - if (access_mode & SD_MODE_UHS_SDR25) + if (fmodes.access_mode & SD_MODE_UHS_SDR25) { type = SDHCI_TIMING_UHS_SDR25; hs_type = UHS_SDR25_BUS_SPEED; @@ -1382,7 +1397,7 @@ static int _sd_storage_enable_uhs_low_volt(sdmmc_storage_t *storage, u32 type, u // Try to raise the power limit to let the card perform better. if (hs_type != UHS_SDR25_BUS_SPEED) - _sd_storage_set_power_limit(storage, power_limit, buf); + _sd_storage_set_power_limit(storage, fmodes.power_limit, buf); // Setup and set selected card and bus speed. if (!_sd_storage_set_card_bus_speed(storage, hs_type, buf)) @@ -1402,17 +1417,17 @@ static int _sd_storage_enable_uhs_low_volt(sdmmc_storage_t *storage, u32 type, u static int _sd_storage_enable_hs_high_volt(sdmmc_storage_t *storage, u8 *buf) { - if (!_sd_storage_switch_get(storage, buf)) + sd_func_modes_t fmodes; + + if (!sd_storage_get_fmodes(storage, buf, &fmodes)) return 0; - u8 access_mode = buf[13]; - u16 power_limit = buf[7] | buf[6] << 8; - DPRINTF("[SD] access: %02X, power: %02X\n", access_mode, power_limit); + DPRINTF("[SD] access: %02X, power: %02X\n", fmodes.access_mode, fmodes.power_limit); // Try to raise the power limit to let the card perform better. - _sd_storage_set_power_limit(storage, power_limit, buf); + _sd_storage_set_power_limit(storage, fmodes.power_limit, buf); - if (!(access_mode & SD_MODE_HIGH_SPEED)) + if (!(fmodes.access_mode & SD_MODE_HIGH_SPEED)) return 1; if (!_sd_storage_set_card_bus_speed(storage, HIGH_SPEED_BUS_SPEED, buf)) diff --git a/bdk/storage/sdmmc.h b/bdk/storage/sdmmc.h index 283e0d4..bc8af81 100644 --- a/bdk/storage/sdmmc.h +++ b/bdk/storage/sdmmc.h @@ -19,6 +19,7 @@ #define _SDMMC_H_ #include +#include #include extern u32 sd_power_cycle_time_start; @@ -195,6 +196,14 @@ typedef struct _sdmmc_storage_t sd_ssr_t ssr; } sdmmc_storage_t; +typedef struct _sd_func_modes_t +{ + u16 access_mode; + u16 cmd_system; + u16 driver_strength; + u16 power_limit; +} sd_func_modes_t; + int sdmmc_storage_end(sdmmc_storage_t *storage); int sdmmc_storage_read(sdmmc_storage_t *storage, u32 sector, u32 num_sectors, void *buf); int sdmmc_storage_write(sdmmc_storage_t *storage, u32 sector, u32 num_sectors, void *buf); @@ -209,6 +218,7 @@ int sdmmc_storage_vendor_sandisk_report(sdmmc_storage_t *storage, void *buf); int mmc_storage_get_ext_csd(sdmmc_storage_t *storage, void *buf); +int sd_storage_get_fmodes(sdmmc_storage_t *storage, u8 *buf, sd_func_modes_t *functions); int sd_storage_get_scr(sdmmc_storage_t *storage, u8 *buf); int sd_storage_get_ssr(sdmmc_storage_t *storage, u8 *buf); u32 sd_storage_get_ssr_au(sdmmc_storage_t *storage); From 1522f1ee9231848e3b961840869b496a1fbeacdb Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 27 Dec 2023 15:02:00 +0200 Subject: [PATCH 064/308] nyx: info: add max bus speed info for sd --- nyx/nyx_gui/frontend/gui_info.c | 29 +++++++++++++++++++++++------ 1 file changed, 23 insertions(+), 6 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index 17a4034..6327214 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -1998,9 +1998,8 @@ static lv_res_t _create_window_sdcard_info_status(lv_obj_t *btn) "Bus Width:\n" "Current Rate:\n" "Speed Class:\n" - "UHS Grade:\n" - "Video Class:\n" - "App perf class:\n" + "UHS Grade/Classes:\n" + "Max Bus Speed:\n\n" "Write Protect:" ); lv_obj_set_width(lb_desc2, lv_obj_get_width(desc2)); @@ -2034,14 +2033,32 @@ static lv_res_t _create_window_sdcard_info_status(lv_obj_t *btn) uhs_au_size /= 1024; } + sd_func_modes_t fmodes = { 0 }; + sd_storage_get_fmodes(&sd_storage, NULL, &fmodes); + + char *bus_speed; + if (fmodes.cmd_system & SD_MODE_UHS_DDR200) + bus_speed = "DDR200"; + else if (fmodes.access_mode & SD_MODE_UHS_SDR104) + bus_speed = "SDR104"; + else if (fmodes.access_mode & SD_MODE_UHS_SDR50) + bus_speed = "SDR50"; + else if (fmodes.access_mode & SD_MODE_UHS_DDR50) + bus_speed = "DDR50"; + else if (fmodes.access_mode & SD_MODE_UHS_SDR25) + bus_speed = "SDR25"; + else + bus_speed = "SDR12"; + s_printf(txt_buf, - "#00DDFF v%d.0#\n%02X\n%d MiB\n%X (CP %X)\n%d\n%d MB/s (%d MHz)\n%d (AU: %d %s\nU%d\nV%d\nA%d\n%s", + "#00DDFF v%d.0#\n%02X\n%d MiB\n%X (CP %X)\n%d\n%d MB/s (%d MHz)\n%d (AU: %d %s\nU%d V%d A%d\n%s\n\n%s", sd_storage.csd.structure + 1, sd_storage.csd.cmdclass, sd_storage.sec_cnt >> 11, sd_storage.sec_cnt, sd_storage.ssr.protected_size >> 9, sd_storage.ssr.bus_width, sd_storage.csd.busspeed, (sd_storage.csd.busspeed > 10) ? (sd_storage.csd.busspeed * 2) : 50, - sd_storage.ssr.speed_class, uhs_au_size, uhs_au_mb ? "MiB)" : "KiB)", sd_storage.ssr.uhs_grade, - sd_storage.ssr.video_class, sd_storage.ssr.app_class, wp_info); + sd_storage.ssr.speed_class, uhs_au_size, uhs_au_mb ? "MiB)" : "KiB)", + sd_storage.ssr.uhs_grade, sd_storage.ssr.video_class, sd_storage.ssr.app_class, + bus_speed, wp_info); lv_label_set_text(lb_val2, txt_buf); From bb6e4deb4cdf4fc0e90fbd34b7ab5df4dbcf9fb2 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 27 Dec 2023 21:02:33 +0200 Subject: [PATCH 065/308] bdk: remove unused lp0 cfg from bdk --- bdk/mem/sdram_lp0.c | 1538 ----------------------------- bdk/mem/sdram_lp0_param_t210.h | 964 ------------------ bdk/mem/sdram_lp0_param_t210b01.h | 990 ------------------- 3 files changed, 3492 deletions(-) delete mode 100644 bdk/mem/sdram_lp0.c delete mode 100644 bdk/mem/sdram_lp0_param_t210.h delete mode 100644 bdk/mem/sdram_lp0_param_t210b01.h diff --git a/bdk/mem/sdram_lp0.c b/bdk/mem/sdram_lp0.c deleted file mode 100644 index 1e50103..0000000 --- a/bdk/mem/sdram_lp0.c +++ /dev/null @@ -1,1538 +0,0 @@ -/* - * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. - * Copyright 2014 Google Inc. - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2020 CTCaer - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#include -#include -#include -#include - -#define pack(src, src_bits, dst, dst_bits) { \ - u32 mask = 0xffffffff >> (31 - ((1 ? src_bits) - (0 ? src_bits))); \ - dst &= ~(mask << (0 ? dst_bits)); \ - dst |= ((src >> (0 ? src_bits)) & mask) << (0 ? dst_bits); \ -} - -#define s(param, src_bits, pmcreg, dst_bits) \ - pack(sdram->param, src_bits, pmc->pmcreg, dst_bits) - -#define c(value, pmcreg, dst_bits) \ - pack(value, (1 ? dst_bits) - (0 ? dst_bits) : 0, pmc->pmcreg, dst_bits) - -/* 32 bits version of s macro */ -#define s32(param, pmcreg) pmc->pmcreg = sdram->param - -/* 32 bits version c macro */ -#define c32(value, pmcreg) pmc->pmcreg = value - -/* - * This function reads SDRAM parameters from the common BCT format and - * writes them into PMC scratch registers (where the BootROM expects them - * on LP0 resume). - */ -static void _sdram_lp0_save_params_t210(const void *params) -{ - struct sdram_params_t210 *sdram = (struct sdram_params_t210 *)params; - struct tegra_pmc_regs *pmc = (struct tegra_pmc_regs *)PMC_BASE; - - //TODO: pkg1.1 (1.X - 3.X) reads them from MC. - // Patch carveout parameters. - /*sdram->McGeneralizedCarveout1Bom = 0; - sdram->McGeneralizedCarveout1BomHi = 0; - sdram->McGeneralizedCarveout1Size128kb = 0; - sdram->McGeneralizedCarveout1Access0 = 0; - sdram->McGeneralizedCarveout1Access1 = 0; - sdram->McGeneralizedCarveout1Access2 = 0; - sdram->McGeneralizedCarveout1Access3 = 0; - sdram->McGeneralizedCarveout1Access4 = 0; - sdram->McGeneralizedCarveout1ForceInternalAccess0 = 0; - sdram->McGeneralizedCarveout1ForceInternalAccess1 = 0; - sdram->McGeneralizedCarveout1ForceInternalAccess2 = 0; - sdram->McGeneralizedCarveout1ForceInternalAccess3 = 0; - sdram->McGeneralizedCarveout1ForceInternalAccess4 = 0; - sdram->McGeneralizedCarveout1Cfg0 = 0; - sdram->McGeneralizedCarveout2Bom = 0x80020000; - sdram->McGeneralizedCarveout2BomHi = 0; - sdram->McGeneralizedCarveout2Size128kb = 2; - sdram->McGeneralizedCarveout2Access0 = 0; - sdram->McGeneralizedCarveout2Access1 = 0; - sdram->McGeneralizedCarveout2Access2 = 0x3000000; - sdram->McGeneralizedCarveout2Access3 = 0; - sdram->McGeneralizedCarveout2Access4 = 0x300; - sdram->McGeneralizedCarveout2ForceInternalAccess0 = 0; - sdram->McGeneralizedCarveout2ForceInternalAccess1 = 0; - sdram->McGeneralizedCarveout2ForceInternalAccess2 = 0; - sdram->McGeneralizedCarveout2ForceInternalAccess3 = 0; - sdram->McGeneralizedCarveout2ForceInternalAccess4 = 0; - sdram->McGeneralizedCarveout2Cfg0 = 0x440167E; - sdram->McGeneralizedCarveout3Bom = 0; - sdram->McGeneralizedCarveout3BomHi = 0; - sdram->McGeneralizedCarveout3Size128kb = 0; - sdram->McGeneralizedCarveout3Access0 = 0; - sdram->McGeneralizedCarveout3Access1 = 0; - sdram->McGeneralizedCarveout3Access2 = 0x3000000; - sdram->McGeneralizedCarveout3Access3 = 0; - sdram->McGeneralizedCarveout3Access4 = 0x300; - sdram->McGeneralizedCarveout3ForceInternalAccess0 = 0; - sdram->McGeneralizedCarveout3ForceInternalAccess1 = 0; - sdram->McGeneralizedCarveout3ForceInternalAccess2 = 0; - sdram->McGeneralizedCarveout3ForceInternalAccess3 = 0; - sdram->McGeneralizedCarveout3ForceInternalAccess4 = 0; - sdram->McGeneralizedCarveout3Cfg0 = 0x4401E7E; - sdram->McGeneralizedCarveout4Bom = 0; - sdram->McGeneralizedCarveout4BomHi = 0; - sdram->McGeneralizedCarveout4Size128kb = 0; - sdram->McGeneralizedCarveout4Access0 = 0; - sdram->McGeneralizedCarveout4Access1 = 0; - sdram->McGeneralizedCarveout4Access2 = 0; - sdram->McGeneralizedCarveout4Access3 = 0; - sdram->McGeneralizedCarveout4Access4 = 0; - sdram->McGeneralizedCarveout4ForceInternalAccess0 = 0; - sdram->McGeneralizedCarveout4ForceInternalAccess1 = 0; - sdram->McGeneralizedCarveout4ForceInternalAccess2 = 0; - sdram->McGeneralizedCarveout4ForceInternalAccess3 = 0; - sdram->McGeneralizedCarveout4ForceInternalAccess4 = 0; - sdram->McGeneralizedCarveout4Cfg0 = 0x8F; - sdram->McGeneralizedCarveout5Bom = 0; - sdram->McGeneralizedCarveout5BomHi = 0; - sdram->McGeneralizedCarveout5Size128kb = 0; - sdram->McGeneralizedCarveout5Access0 = 0; - sdram->McGeneralizedCarveout5Access1 = 0; - sdram->McGeneralizedCarveout5Access2 = 0; - sdram->McGeneralizedCarveout5Access3 = 0; - sdram->McGeneralizedCarveout5Access4 = 0; - sdram->McGeneralizedCarveout5ForceInternalAccess0 = 0; - sdram->McGeneralizedCarveout5ForceInternalAccess1 = 0; - sdram->McGeneralizedCarveout5ForceInternalAccess2 = 0; - sdram->McGeneralizedCarveout5ForceInternalAccess3 = 0; - sdram->McGeneralizedCarveout5ForceInternalAccess4 = 0; - sdram->McGeneralizedCarveout5Cfg0 = 0x8F;*/ - - //TODO: this is 4.X+ behaviour which seems to work fine for < 4.X. - // Patch carveout parameters. - sdram->McGeneralizedCarveout1Cfg0 = 0; - sdram->McGeneralizedCarveout2Cfg0 = 0; - sdram->McGeneralizedCarveout3Cfg0 = 0; - sdram->McGeneralizedCarveout4Cfg0 = 0; - sdram->McGeneralizedCarveout5Cfg0 = 0; - - // Patch SDRAM parameters. - u32 t0 = sdram->EmcSwizzleRank0Byte0 << 5 >> 29 > sdram->EmcSwizzleRank0Byte0 << 1 >> 29; - u32 t1 = (t0 & 0xFFFFFFEF) | ((sdram->EmcSwizzleRank1Byte0 << 5 >> 29 > sdram->EmcSwizzleRank1Byte0 << 1 >> 29) << 4); - u32 t2 = (t1 & 0xFFFFFFFD) | ((sdram->EmcSwizzleRank0Byte1 << 5 >> 29 > sdram->EmcSwizzleRank0Byte1 << 1 >> 29) << 1); - u32 t3 = (t2 & 0xFFFFFFDF) | ((sdram->EmcSwizzleRank1Byte1 << 5 >> 29 > sdram->EmcSwizzleRank1Byte1 << 1 >> 29) << 5); - u32 t4 = (t3 & 0xFFFFFFFB) | ((sdram->EmcSwizzleRank0Byte2 << 5 >> 29 > sdram->EmcSwizzleRank0Byte2 << 1 >> 29) << 2); - u32 t5 = (t4 & 0xFFFFFFBF) | ((sdram->EmcSwizzleRank1Byte2 << 5 >> 29 > sdram->EmcSwizzleRank1Byte2 << 1 >> 29) << 6); - u32 t6 = (t5 & 0xFFFFFFF7) | ((sdram->EmcSwizzleRank0Byte3 << 5 >> 29 > sdram->EmcSwizzleRank0Byte3 << 1 >> 29) << 3); - u32 t7 = (t6 & 0xFFFFFF7F) | ((sdram->EmcSwizzleRank1Byte3 << 5 >> 29 > sdram->EmcSwizzleRank1Byte3 << 1 >> 29) << 7); - sdram->SwizzleRankByteEncode = t7; - sdram->EmcBctSpare2 = 0x40000DD8; - sdram->EmcBctSpare3 = t7; - - s(EmcClockSource, 7:0, scratch6, 15:8); - s(EmcClockSourceDll, 7:0, scratch6, 23:16); - s(EmcClockSource, 31:29, scratch6, 26:24); - s(EmcClockSourceDll, 31:29, scratch6, 29:27); - s(EmcClockSourceDll, 11:10, scratch6, 31:30); - s(ClkRstControllerPllmMisc2Override, 9:8, scratch7, 1:0); - s(ClkRstControllerPllmMisc2Override, 2:1, scratch7, 3:2); - s(EmcZqCalLpDdr4WarmBoot, 31:30, scratch7, 5:4); - s(EmcClockSource, 15:15, scratch7, 6:6); - s(EmcClockSource, 26:26, scratch7, 7:7); - s(EmcClockSource, 20:20, scratch7, 8:8); - s(EmcClockSource, 19:19, scratch7, 9:9); - s(ClkRstControllerPllmMisc2Override, 13:13, scratch7, 10:10); - s(ClkRstControllerPllmMisc2Override, 12:12, scratch7, 11:11); - s(ClkRstControllerPllmMisc2Override, 11:11, scratch7, 12:12); - s(ClkRstControllerPllmMisc2Override, 10:10, scratch7, 13:13); - s(ClkRstControllerPllmMisc2Override, 5:5, scratch7, 14:14); - s(ClkRstControllerPllmMisc2Override, 4:4, scratch7, 15:15); - s(ClkRstControllerPllmMisc2Override, 3:3, scratch7, 16:16); - s(ClkRstControllerPllmMisc2Override, 0:0, scratch7, 17:17); - s(EmcZqCalLpDdr4WarmBoot, 1:0, scratch7, 19:18); - s(EmcZqCalLpDdr4WarmBoot, 4:4, scratch7, 20:20); - s(EmcOdtWrite, 5:0, scratch7, 26:21); - s(EmcOdtWrite, 11:8, scratch7, 30:27); - s(EmcOdtWrite, 31:31, scratch7, 31:31); - s(EmcFdpdCtrlCmdNoRamp, 0:0, scratch13, 30:30); - s(EmcCfgPipeClk, 0:0, scratch13, 31:31); - s(McEmemArbMisc2, 0:0, scratch14, 30:30); - s(McDaCfg0, 0:0, scratch14, 31:31); - s(EmcQRst, 6:0, scratch15, 26:20); - s(EmcQRst, 20:16, scratch15, 31:27); - s(EmcPmacroCmdTxDrv, 5:0, scratch16, 25:20); - s(EmcPmacroCmdTxDrv, 13:8, scratch16, 31:26); - s(EmcPmacroAutocalCfg0, 2:0, scratch17, 22:20); - s(EmcPmacroAutocalCfg0, 10:8, scratch17, 25:23); - s(EmcPmacroAutocalCfg0, 18:16, scratch17, 28:26); - s(EmcPmacroAutocalCfg0, 26:24, scratch17, 31:29); - s(EmcPmacroAutocalCfg1, 2:0, scratch18, 22:20); - s(EmcPmacroAutocalCfg1, 10:8, scratch18, 25:23); - s(EmcPmacroAutocalCfg1, 18:16, scratch18, 28:26); - s(EmcPmacroAutocalCfg1, 26:24, scratch18, 31:29); - s(EmcPmacroAutocalCfg2, 2:0, scratch19, 22:20); - s(EmcPmacroAutocalCfg2, 10:8, scratch19, 25:23); - s(EmcPmacroAutocalCfg2, 18:16, scratch19, 28:26); - s(EmcPmacroAutocalCfg2, 26:24, scratch19, 31:29); - s32(EmcCfgRsv,scratch22); - s32(EmcAutoCalConfig, scratch23); - s32(EmcAutoCalVrefSel0, scratch24); - s32(EmcPmacroBrickCtrlRfu1, scratch25); - s32(EmcPmacroBrickCtrlRfu2, scratch26); - s32(EmcPmcScratch1, scratch27); - s32(EmcPmcScratch2, scratch28); - s32(EmcPmcScratch3, scratch29); - s32(McEmemArbDaTurns, scratch30); - s(EmcFbioSpare, 31:24, scratch58, 7:0); - s(EmcFbioSpare, 23:16, scratch58, 15:8); - s(EmcFbioSpare, 15:8, scratch58, 23:16); - s(EmcFbioSpare, 7:2, scratch58, 29:24); - s(EmcFbioSpare, 0:0, scratch58, 30:30); - s(EmcDllCfg0, 29:0, scratch59, 29:0); - s(EmcPmacroDdllBypass, 11:0, scratch60, 11:0); - s(EmcPmacroDdllBypass, 27:13, scratch60, 26:12); - s(EmcPmacroDdllBypass, 31:29, scratch60, 29:27); - s(McEmemArbMisc0, 14:0, scratch61, 14:0); - s(McEmemArbMisc0, 30:16, scratch61, 29:15); - s(EmcFdpdCtrlCmd, 16:0, scratch62, 16:0); - s(EmcFdpdCtrlCmd, 31:20, scratch62, 28:17); - s(EmcAutoCalConfig2, 27:0, scratch63, 27:0); - s(EmcBurstRefreshNum, 3:0, scratch63, 31:28); - s(EmcPmacroZctrl, 27:0, scratch64, 27:0); - s(EmcTppd, 3:0, scratch64, 31:28); - s(EmcCfgDigDll, 10:0, scratch65, 10:0); - s(EmcCfgDigDll, 25:12, scratch65, 24:11); - s(EmcCfgDigDll, 27:27, scratch65, 25:25); - s(EmcCfgDigDll, 31:30, scratch65, 27:26); - s(EmcR2r, 3:0, scratch65, 31:28); - s(EmcFdpdCtrlDq, 16:0, scratch66, 16:0); - s(EmcFdpdCtrlDq, 28:20, scratch66, 25:17); - s(EmcFdpdCtrlDq, 31:30, scratch66, 27:26); - s(EmcW2w, 3:0, scratch66, 31:28); - s(EmcPmacroTxPwrd4, 13:0, scratch67, 13:0); - s(EmcPmacroTxPwrd4, 29:16, scratch67, 27:14); - s(EmcPmacroCommonPadTxCtrl, 3:0, scratch67, 31:28); - s(EmcPmacroTxPwrd5, 13:0, scratch68, 13:0); - s(EmcPmacroTxPwrd5, 29:16, scratch68, 27:14); - s(EmcPmacroDdllPwrd0, 4:0, scratch69, 4:0); - s(EmcPmacroDdllPwrd0, 12:6, scratch69, 11:5); - s(EmcPmacroDdllPwrd0, 20:14, scratch69, 18:12); - s(EmcPmacroDdllPwrd0, 28:22, scratch69, 25:19); - s(EmcPmacroDdllPwrd0, 31:30, scratch69, 27:26); - s(EmcCfg, 4:4, scratch69, 31:31); - s(EmcPmacroDdllPwrd1, 4:0, scratch70, 4:0); - s(EmcPmacroDdllPwrd1, 12:6, scratch70, 11:5); - s(EmcPmacroDdllPwrd1, 20:14, scratch70, 18:12); - s(EmcPmacroDdllPwrd1, 28:22, scratch70, 25:19); - s(EmcPmacroDdllPwrd1, 31:30, scratch70, 27:26); - s(EmcCfg, 5:5, scratch70, 31:31); - s(EmcPmacroDdllPwrd2, 4:0, scratch71, 4:0); - s(EmcPmacroDdllPwrd2, 12:6, scratch71, 11:5); - s(EmcPmacroDdllPwrd2, 20:14, scratch71, 18:12); - s(EmcPmacroDdllPwrd2, 28:22, scratch71, 25:19); - s(EmcPmacroDdllPwrd2, 31:30, scratch71, 27:26); - s(EmcFbioCfg5, 23:20, scratch71, 31:28); - s(EmcPmacroIbVrefDq_0, 6:0, scratch72, 6:0); - s(EmcPmacroIbVrefDq_0, 14:8, scratch72, 13:7); - s(EmcPmacroIbVrefDq_0, 22:16, scratch72, 20:14); - s(EmcPmacroIbVrefDq_0, 30:24, scratch72, 27:21); - s(EmcFbioCfg5, 15:13, scratch72, 30:28); - s(EmcCfg, 6:6, scratch72, 31:31); - s(EmcPmacroIbVrefDq_1, 6:0, scratch73, 6:0); - s(EmcPmacroIbVrefDq_1, 14:8, scratch73, 13:7); - s(EmcPmacroIbVrefDq_1, 22:16, scratch73, 20:14); - s(EmcPmacroIbVrefDq_1, 30:24, scratch73, 27:21); - s(EmcCfg2, 5:3, scratch73, 30:28); - s(EmcCfg, 7:7, scratch73, 31:31); - s(EmcPmacroIbVrefDqs_0, 6:0, scratch74, 6:0); - s(EmcPmacroIbVrefDqs_0, 14:8, scratch74, 13:7); - s(EmcPmacroIbVrefDqs_0, 22:16, scratch74, 20:14); - s(EmcPmacroIbVrefDqs_0, 30:24, scratch74, 27:21); - s(EmcCfg, 17:16, scratch74, 29:28); - s(EmcFbioCfg5, 1:0, scratch74, 31:30); - s(EmcPmacroIbVrefDqs_1, 6:0, scratch75, 6:0); - s(EmcPmacroIbVrefDqs_1, 14:8, scratch75, 13:7); - s(EmcPmacroIbVrefDqs_1, 22:16, scratch75, 20:14); - s(EmcPmacroIbVrefDqs_1, 30:24, scratch75, 27:21); - s(EmcFbioCfg5, 3:2, scratch75, 29:28); - s(EmcCfg2, 27:26, scratch75, 31:30); - s(EmcPmacroDdllShortCmd_0, 6:0, scratch76, 6:0); - s(EmcPmacroDdllShortCmd_0, 14:8, scratch76, 13:7); - s(EmcPmacroDdllShortCmd_0, 22:16, scratch76, 20:14); - s(EmcPmacroDdllShortCmd_0, 30:24, scratch76, 27:21); - s(EmcPmacroCmdPadTxCtrl, 3:2, scratch76, 29:28); - s(EmcPmacroCmdPadTxCtrl, 7:6, scratch76, 31:30); - s(EmcPmacroDdllShortCmd_1, 6:0, scratch77, 6:0); - s(EmcPmacroDdllShortCmd_1, 14:8, scratch77, 13:7); - s(EmcPmacroDdllShortCmd_1, 22:16, scratch77, 20:14); - s(EmcPmacroDdllShortCmd_1, 30:24, scratch77, 27:21); - s(EmcPmacroCmdPadTxCtrl, 11:10, scratch77, 29:28); - s(EmcPmacroCmdPadTxCtrl, 15:14, scratch77, 31:30); - s(EmcAutoCalChannel, 5:0, scratch78, 5:0); - s(EmcAutoCalChannel, 11:8, scratch78, 9:6); - s(EmcAutoCalChannel, 27:16, scratch78, 21:10); - s(EmcAutoCalChannel, 31:29, scratch78, 24:22); - s(EmcConfigSampleDelay, 6:0, scratch78, 31:25); - s(EmcPmacroRxTerm, 5:0, scratch79, 5:0); - s(EmcPmacroRxTerm, 13:8, scratch79, 11:6); - s(EmcPmacroRxTerm, 21:16, scratch79, 17:12); - s(EmcPmacroRxTerm, 29:24, scratch79, 23:18); - s(EmcRc, 7:0, scratch79, 31:24); - s(EmcPmacroDqTxDrv, 5:0, scratch80, 5:0); - s(EmcPmacroDqTxDrv, 13:8, scratch80, 11:6); - s(EmcPmacroDqTxDrv, 21:16, scratch80, 17:12); - s(EmcPmacroDqTxDrv, 29:24, scratch80, 23:18); - s(EmcSelDpdCtrl, 5:2, scratch80, 27:24); - s(EmcSelDpdCtrl, 8:8, scratch80, 28:28); - s(EmcSelDpdCtrl, 18:16, scratch80, 31:29); - s(EmcPmacroCaTxDrv, 5:0, scratch81, 5:0); - s(EmcPmacroCaTxDrv, 13:8, scratch81, 11:6); - s(EmcPmacroCaTxDrv, 21:16, scratch81, 17:12); - s(EmcPmacroCaTxDrv, 29:24, scratch81, 23:18); - s(EmcObdly, 5:0, scratch81, 29:24); - s(EmcObdly, 29:28, scratch81, 31:30); - s(EmcZcalInterval, 23:10, scratch82, 13:0); - s(EmcZcalInterval, 9:0, scratch82, 23:14); - s(EmcPmacroCmdRxTermMode, 1:0, scratch82, 25:24); - s(EmcPmacroCmdRxTermMode, 5:4, scratch82, 27:26); - s(EmcPmacroCmdRxTermMode, 9:8, scratch82, 29:28); - s(EmcPmacroCmdRxTermMode, 13:12, scratch82, 31:30); - s(EmcDataBrlshft0, 23:0, scratch83, 23:0); - s(EmcPmacroDataRxTermMode, 1:0, scratch83, 25:24); - s(EmcPmacroDataRxTermMode, 5:4, scratch83, 27:26); - s(EmcPmacroDataRxTermMode, 9:8, scratch83, 29:28); - s(EmcPmacroDataRxTermMode, 13:12, scratch83, 31:30); - s(EmcDataBrlshft1, 23:0, scratch84, 23:0); - s(McEmemArbTimingRc, 7:0, scratch84, 31:24); - s(EmcDqsBrlshft0, 23:0, scratch85, 23:0); - s(McEmemArbRsv, 7:0, scratch85, 31:24); - s(EmcDqsBrlshft1, 23:0, scratch86, 23:0); - s(EmcCfgPipe2, 11:0, scratch87, 11:0); - s(EmcCfgPipe2, 27:16, scratch87, 23:12); - s(EmcCfgPipe1, 11:0, scratch88, 11:0); - s(EmcCfgPipe1, 27:16, scratch88, 23:12); - s(EmcPmacroCmdCtrl0, 5:0, scratch89, 5:0); - s(EmcPmacroCmdCtrl0, 13:8, scratch89, 11:6); - s(EmcPmacroCmdCtrl0, 21:16, scratch89, 17:12); - s(EmcPmacroCmdCtrl0, 29:24, scratch89, 23:18); - s(EmcPmacroCmdCtrl1, 5:0, scratch90, 5:0); - s(EmcPmacroCmdCtrl1, 13:8, scratch90, 11:6); - s(EmcPmacroCmdCtrl1, 21:16, scratch90, 17:12); - s(EmcPmacroCmdCtrl1, 29:24, scratch90, 23:18); - s(EmcRas, 6:0, scratch90, 30:24); - s(EmcCfg, 8:8, scratch90, 31:31); - s(EmcPmacroVttgenCtrl2, 23:0, scratch91, 23:0); - s(EmcW2p, 6:0, scratch91, 30:24); - s(EmcCfg, 9:9, scratch91, 31:31); - s(EmcPmacroCmdPadRxCtrl, 2:0, scratch92, 2:0); - s(EmcPmacroCmdPadRxCtrl, 5:4, scratch92, 4:3); - s(EmcPmacroCmdPadRxCtrl, 10:8, scratch92, 7:5); - s(EmcPmacroCmdPadRxCtrl, 22:12, scratch92, 18:8); - s(EmcPmacroCmdPadRxCtrl, 28:24, scratch92, 23:19); - s(EmcQSafe, 6:0, scratch92, 30:24); - s(EmcCfg, 18:18, scratch92, 31:31); - s(EmcPmacroDataPadRxCtrl, 2:0, scratch93, 2:0); - s(EmcPmacroDataPadRxCtrl, 5:4, scratch93, 4:3); - s(EmcPmacroDataPadRxCtrl, 10:8, scratch93, 7:5); - s(EmcPmacroDataPadRxCtrl, 22:12, scratch93, 18:8); - s(EmcPmacroDataPadRxCtrl, 28:24, scratch93, 23:19); - s(EmcRdv, 6:0, scratch93, 30:24); - s(EmcCfg, 21:21, scratch93, 31:31); - s(McEmemArbDaCovers, 23:0, scratch94, 23:0); - s(EmcRw2Pden, 6:0, scratch94, 30:24); - s(EmcCfg, 22:22, scratch94, 31:31); - s(EmcPmacroCmdCtrl2, 5:0, scratch95, 5:0); - s(EmcPmacroCmdCtrl2, 13:9, scratch95, 10:6); - s(EmcPmacroCmdCtrl2, 21:16, scratch95, 16:11); - s(EmcPmacroCmdCtrl2, 29:24, scratch95, 22:17); - s(EmcRfcPb, 8:0, scratch95, 31:23); - s(EmcPmacroQuseDdllRank0_0, 10:0, scratch96, 10:0); - s(EmcPmacroQuseDdllRank0_0, 26:16, scratch96, 21:11); - s(EmcCfgUpdate, 2:0, scratch96, 24:22); - s(EmcCfgUpdate, 10:8, scratch96, 27:25); - s(EmcCfgUpdate, 31:28, scratch96, 31:28); - s(EmcPmacroQuseDdllRank0_1, 10:0, scratch97, 10:0); - s(EmcPmacroQuseDdllRank0_1, 26:16, scratch97, 21:11); - s(EmcRfc, 9:0, scratch97, 31:22); - s(EmcPmacroQuseDdllRank0_2, 10:0, scratch98, 10:0); - s(EmcPmacroQuseDdllRank0_2, 26:16, scratch98, 21:11); - s(EmcTxsr, 9:0, scratch98, 31:22); - s(EmcPmacroQuseDdllRank0_3, 10:0, scratch99, 10:0); - s(EmcPmacroQuseDdllRank0_3, 26:16, scratch99, 21:11); - s(EmcMc2EmcQ, 2:0, scratch99, 24:22); - s(EmcMc2EmcQ, 10:8, scratch99, 27:25); - s(EmcMc2EmcQ, 27:24, scratch99, 31:28); - s(EmcPmacroQuseDdllRank0_4, 10:0, scratch100, 10:0); - s(EmcPmacroQuseDdllRank0_4, 26:16, scratch100, 21:11); - s(McEmemArbRing1Throttle, 4:0, scratch100, 26:22); - s(McEmemArbRing1Throttle, 20:16, scratch100, 31:27); - s(EmcPmacroQuseDdllRank0_5, 10:0, scratch101, 10:0); - s(EmcPmacroQuseDdllRank0_5, 26:16, scratch101, 21:11); - s(EmcPmacroQuseDdllRank1_0, 10:0, scratch102, 10:0); - s(EmcPmacroQuseDdllRank1_0, 26:16, scratch102, 21:11); - s(EmcAr2Pden, 8:0, scratch102, 30:22); - s(EmcCfg, 23:23, scratch102, 31:31); - s(EmcPmacroQuseDdllRank1_1, 10:0, scratch103, 10:0); - s(EmcPmacroQuseDdllRank1_1, 26:16, scratch103, 21:11); - s(EmcRfcSlr, 8:0, scratch103, 30:22); - s(EmcCfg, 24:24, scratch103, 31:31); - s(EmcPmacroQuseDdllRank1_2, 10:0, scratch104, 10:0); - s(EmcPmacroQuseDdllRank1_2, 26:16, scratch104, 21:11); - s(EmcIbdly, 6:0, scratch104, 28:22); - s(EmcIbdly, 29:28, scratch104, 30:29); - s(EmcCfg, 25:25, scratch104, 31:31); - s(EmcPmacroQuseDdllRank1_3, 10:0, scratch105, 10:0); - s(EmcPmacroQuseDdllRank1_3, 26:16, scratch105, 21:11); - s(McEmemArbTimingRFCPB, 8:0, scratch105, 30:22); - s(EmcCfg, 26:26, scratch105, 31:31); - s(EmcPmacroQuseDdllRank1_4, 10:0, scratch106, 10:0); - s(EmcPmacroQuseDdllRank1_4, 26:16, scratch106, 21:11); - s(EmcTfaw, 6:0, scratch106, 28:22); - s(EmcPmacroDataPadTxCtrl, 3:2, scratch106, 30:29); - s(EmcCfg, 28:28, scratch106, 31:31); - s(EmcPmacroQuseDdllRank1_5, 10:0, scratch107, 10:0); - s(EmcPmacroQuseDdllRank1_5, 26:16, scratch107, 21:11); - s(EmcTClkStable, 6:0, scratch107, 28:22); - s(EmcPmacroDataPadTxCtrl, 7:6, scratch107, 30:29); - s(EmcCfg, 29:29, scratch107, 31:31); - s(EmcPmacroObDdllLongDqRank0_0, 10:0, scratch108, 10:0); - s(EmcPmacroObDdllLongDqRank0_0, 26:16, scratch108, 21:11); - s(EmcPdex2Mrr, 6:0, scratch108, 28:22); - s(EmcPmacroDataPadTxCtrl, 11:10, scratch108, 30:29); - s(EmcCfg, 30:30, scratch108, 31:31); - s(EmcPmacroObDdllLongDqRank0_1, 10:0, scratch109, 10:0); - s(EmcPmacroObDdllLongDqRank0_1, 26:16, scratch109, 21:11); - s(EmcRdvMask, 6:0, scratch109, 28:22); - s(EmcPmacroDataPadTxCtrl, 15:14, scratch109, 30:29); - s(EmcCfg, 31:31, scratch109, 31:31); - s(EmcPmacroObDdllLongDqRank0_2, 10:0, scratch110, 10:0); - s(EmcPmacroObDdllLongDqRank0_2, 26:16, scratch110, 21:11); - s(EmcRdvEarlyMask, 6:0, scratch110, 28:22); - s(EmcFbioCfg5, 4:4, scratch110, 29:29); - s(EmcFbioCfg5, 8:8, scratch110, 30:30); - s(EmcFbioCfg5, 10:10, scratch110, 31:31); - s(EmcPmacroObDdllLongDqRank0_3, 10:0, scratch111, 10:0); - s(EmcPmacroObDdllLongDqRank0_3, 26:16, scratch111, 21:11); - s(EmcRdvEarly, 6:0, scratch111, 28:22); - s(EmcFbioCfg5, 12:12, scratch111, 29:29); - s(EmcFbioCfg5, 25:24, scratch111, 31:30); - s(EmcPmacroObDdllLongDqRank0_4, 10:0, scratch112, 10:0); - s(EmcPmacroObDdllLongDqRank0_4, 26:16, scratch112, 21:11); - s(EmcPmacroDdllShortCmd_2, 6:0, scratch112, 28:22); - s(EmcFbioCfg5, 28:26, scratch112, 31:29); - s(EmcPmacroObDdllLongDqRank0_5, 10:0, scratch113, 10:0); - s(EmcPmacroObDdllLongDqRank0_5, 26:16, scratch113, 21:11); - s(McEmemArbTimingRp, 6:0, scratch113, 28:22); - s(EmcFbioCfg5, 31:30, scratch113, 30:29); - s(EmcCfg2, 0:0, scratch113, 31:31); - s(EmcPmacroObDdllLongDqRank1_0, 10:0, scratch114, 10:0); - s(EmcPmacroObDdllLongDqRank1_0, 26:16, scratch114, 21:11); - s(McEmemArbTimingRas, 6:0, scratch114, 28:22); - s(EmcCfg2, 2:1, scratch114, 30:29); - s(EmcCfg2, 7:7, scratch114, 31:31); - s(EmcPmacroObDdllLongDqRank1_1, 10:0, scratch115, 10:0); - s(EmcPmacroObDdllLongDqRank1_1, 26:16, scratch115, 21:11); - s(McEmemArbTimingFaw, 6:0, scratch115, 28:22); - s(EmcCfg2, 11:10, scratch115, 30:29); - s(EmcCfg2, 14:14, scratch115, 31:31); - s(EmcPmacroObDdllLongDqRank1_2, 10:0, scratch123, 10:0); - s(EmcPmacroObDdllLongDqRank1_2, 26:16, scratch123, 21:11); - s(McEmemArbTimingRap2Pre, 6:0, scratch123, 28:22); - s(EmcCfg2, 16:15, scratch123, 30:29); - s(EmcCfg2, 20:20, scratch123, 31:31); - s(EmcPmacroObDdllLongDqRank1_3, 10:0, scratch124, 10:0); - s(EmcPmacroObDdllLongDqRank1_3, 26:16, scratch124, 21:11); - s(McEmemArbTimingWap2Pre, 6:0, scratch124, 28:22); - s(EmcCfg2, 24:22, scratch124, 31:29); - s(EmcPmacroObDdllLongDqRank1_4, 10:0, scratch125, 10:0); - s(EmcPmacroObDdllLongDqRank1_4, 26:16, scratch125, 21:11); - s(McEmemArbTimingR2W, 6:0, scratch125, 28:22); - s(EmcCfg2, 25:25, scratch125, 29:29); - s(EmcCfg2, 29:28, scratch125, 31:30); - s(EmcPmacroObDdllLongDqRank1_5, 10:0, scratch126, 10:0); - s(EmcPmacroObDdllLongDqRank1_5, 26:16, scratch126, 21:11); - s(McEmemArbTimingW2R, 6:0, scratch126, 28:22); - s(EmcCfg2, 31:30, scratch126, 30:29); - s(EmcCfgPipe, 0:0, scratch126, 31:31); - s(EmcPmacroObDdllLongDqsRank0_0, 10:0, scratch127, 10:0); - s(EmcPmacroObDdllLongDqsRank0_0, 26:16, scratch127, 21:11); - s(EmcRp, 5:0, scratch127, 27:22); - s(EmcCfgPipe, 4:1, scratch127, 31:28); - s(EmcPmacroObDdllLongDqsRank0_1, 10:0, scratch128, 10:0); - s(EmcPmacroObDdllLongDqsRank0_1, 26:16, scratch128, 21:11); - s(EmcR2w, 5:0, scratch128, 27:22); - s(EmcCfgPipe, 8:5, scratch128, 31:28); - s(EmcPmacroObDdllLongDqsRank0_2, 10:0, scratch129, 10:0); - s(EmcPmacroObDdllLongDqsRank0_2, 26:16, scratch129, 21:11); - s(EmcW2r, 5:0, scratch129, 27:22); - s(EmcCfgPipe, 11:9, scratch129, 30:28); - s(EmcCfgPipe, 16:16, scratch129, 31:31); - s(EmcPmacroObDdllLongDqsRank0_3, 10:0, scratch130, 10:0); - s(EmcPmacroObDdllLongDqsRank0_3, 26:16, scratch130, 21:11); - s(EmcR2p, 5:0, scratch130, 27:22); - s(EmcCfgPipe, 20:17, scratch130, 31:28); - s(EmcPmacroObDdllLongDqsRank0_4, 10:0, scratch131, 10:0); - s(EmcPmacroObDdllLongDqsRank0_4, 26:16, scratch131, 21:11); - s(EmcCcdmw, 5:0, scratch131, 27:22); - s(EmcCfgPipe, 24:21, scratch131, 31:28); - s(EmcPmacroObDdllLongDqsRank0_5, 10:0, scratch132, 10:0); - s(EmcPmacroObDdllLongDqsRank0_5, 26:16, scratch132, 21:11); - s(EmcRdRcd, 5:0, scratch132, 27:22); - s(EmcCfgPipe, 27:25, scratch132, 30:28); - s(EmcPmacroTxPwrd0, 0:0, scratch132, 31:31); - s(EmcPmacroObDdllLongDqsRank1_0, 10:0, scratch133, 10:0); - s(EmcPmacroObDdllLongDqsRank1_0, 26:16, scratch133, 21:11); - s(EmcWrRcd, 5:0, scratch133, 27:22); - s(EmcPmacroTxPwrd0, 4:1, scratch133, 31:28); - s(EmcPmacroObDdllLongDqsRank1_1, 10:0, scratch134, 10:0); - s(EmcPmacroObDdllLongDqsRank1_1, 26:16, scratch134, 21:11); - s(EmcWdv, 5:0, scratch134, 27:22); - s(EmcPmacroTxPwrd0, 8:5, scratch134, 31:28); - s(EmcPmacroObDdllLongDqsRank1_2, 10:0, scratch135, 10:0); - s(EmcPmacroObDdllLongDqsRank1_2, 26:16, scratch135, 21:11); - s(EmcQUse, 5:0, scratch135, 27:22); - s(EmcPmacroTxPwrd0, 12:9, scratch135, 31:28); - s(EmcPmacroObDdllLongDqsRank1_3, 10:0, scratch136, 10:0); - s(EmcPmacroObDdllLongDqsRank1_3, 26:16, scratch136, 21:11); - s(EmcPdEx2Wr, 5:0, scratch136, 27:22); - s(EmcPmacroTxPwrd0, 13:13, scratch136, 28:28); - s(EmcPmacroTxPwrd0, 18:16, scratch136, 31:29); - s(EmcPmacroObDdllLongDqsRank1_4, 10:0, scratch137, 10:0); - s(EmcPmacroObDdllLongDqsRank1_4, 26:16, scratch137, 21:11); - s(EmcPdEx2Rd, 5:0, scratch137, 27:22); - s(EmcPmacroTxPwrd0, 22:19, scratch137, 31:28); - s(EmcPmacroObDdllLongDqsRank1_5, 10:0, scratch138, 10:0); - s(EmcPmacroObDdllLongDqsRank1_5, 26:16, scratch138, 21:11); - s(EmcPdex2Cke, 5:0, scratch138, 27:22); - s(EmcPmacroTxPwrd0, 26:23, scratch138, 31:28); - s(EmcPmacroIbDdllLongDqsRank0_0, 10:0, scratch139, 10:0); - s(EmcPmacroIbDdllLongDqsRank0_0, 26:16, scratch139, 21:11); - s(EmcPChg2Pden, 5:0, scratch139, 27:22); - s(EmcPmacroTxPwrd0, 29:27, scratch139, 30:28); - s(EmcPmacroTxPwrd1, 0:0, scratch139, 31:31); - s(EmcPmacroIbDdllLongDqsRank0_1, 10:0, scratch140, 10:0); - s(EmcPmacroIbDdllLongDqsRank0_1, 26:16, scratch140, 21:11); - s(EmcAct2Pden, 5:0, scratch140, 27:22); - s(EmcPmacroTxPwrd1, 4:1, scratch140, 31:28); - s(EmcPmacroIbDdllLongDqsRank0_2, 10:0, scratch141, 10:0); - s(EmcPmacroIbDdllLongDqsRank0_2, 26:16, scratch141, 21:11); - s(EmcCke2Pden, 5:0, scratch141, 27:22); - s(EmcPmacroTxPwrd1, 8:5, scratch141, 31:28); - s(EmcPmacroIbDdllLongDqsRank0_3, 10:0, scratch142, 10:0); - s(EmcPmacroIbDdllLongDqsRank0_3, 26:16, scratch142, 21:11); - s(EmcTcke, 5:0, scratch142, 27:22); - s(EmcPmacroTxPwrd1, 12:9, scratch142, 31:28); - s(EmcPmacroIbDdllLongDqsRank1_0, 10:0, scratch143, 10:0); - s(EmcPmacroIbDdllLongDqsRank1_0, 26:16, scratch143, 21:11); - s(EmcTrpab, 5:0, scratch143, 27:22); - s(EmcPmacroTxPwrd1, 13:13, scratch143, 28:28); - s(EmcPmacroTxPwrd1, 18:16, scratch143, 31:29); - s(EmcPmacroIbDdllLongDqsRank1_1, 10:0, scratch144, 10:0); - s(EmcPmacroIbDdllLongDqsRank1_1, 26:16, scratch144, 21:11); - s(EmcClkenOverride, 3:1, scratch144, 24:22); - s(EmcClkenOverride, 8:6, scratch144, 27:25); - s(EmcPmacroTxPwrd1, 22:19, scratch144, 31:28); - s(EmcPmacroIbDdllLongDqsRank1_2, 10:0, scratch145, 10:0); - s(EmcPmacroIbDdllLongDqsRank1_2, 26:16, scratch145, 21:11); - s(EmcEInput, 5:0, scratch145, 27:22); - s(EmcPmacroTxPwrd1, 26:23, scratch145, 31:28); - s(EmcPmacroIbDdllLongDqsRank1_3, 10:0, scratch146, 10:0); - s(EmcPmacroIbDdllLongDqsRank1_3, 26:16, scratch146, 21:11); - s(EmcEInputDuration, 5:0, scratch146, 27:22); - s(EmcPmacroTxPwrd1, 29:27, scratch146, 30:28); - s(EmcPmacroTxPwrd2, 0:0, scratch146, 31:31); - s(EmcPmacroDdllLongCmd_0, 10:0, scratch147, 10:0); - s(EmcPmacroDdllLongCmd_0, 26:16, scratch147, 21:11); - s(EmcPutermExtra, 5:0, scratch147, 27:22); - s(EmcPmacroTxPwrd2, 4:1, scratch147, 31:28); - s(EmcPmacroDdllLongCmd_1, 10:0, scratch148, 10:0); - s(EmcPmacroDdllLongCmd_1, 26:16, scratch148, 21:11); - s(EmcTckesr, 5:0, scratch148, 27:22); - s(EmcPmacroTxPwrd2, 8:5, scratch148, 31:28); - s(EmcPmacroDdllLongCmd_2, 10:0, scratch149, 10:0); - s(EmcPmacroDdllLongCmd_2, 26:16, scratch149, 21:11); - s(EmcTpd, 5:0, scratch149, 27:22); - s(EmcPmacroTxPwrd2, 12:9, scratch149, 31:28); - s(EmcPmacroDdllLongCmd_3, 10:0, scratch150, 10:0); - s(EmcPmacroDdllLongCmd_3, 26:16, scratch150, 21:11); - s(EmcWdvMask, 5:0, scratch150, 27:22); - s(EmcPmacroTxPwrd2, 13:13, scratch150, 28:28); - s(EmcPmacroTxPwrd2, 18:16, scratch150, 31:29); - s(McEmemArbCfg, 8:0, scratch151, 8:0); - s(McEmemArbCfg, 20:16, scratch151, 13:9); - s(McEmemArbCfg, 31:24, scratch151, 21:14); - s(EmcWdvChk, 5:0, scratch151, 27:22); - s(EmcPmacroTxPwrd2, 22:19, scratch151, 31:28); - s(McEmemArbMisc1, 12:0, scratch152, 12:0); - s(McEmemArbMisc1, 25:21, scratch152, 17:13); - s(McEmemArbMisc1, 31:28, scratch152, 21:18); - s(EmcCmdBrlshft0, 5:0, scratch152, 27:22); - s(EmcPmacroTxPwrd2, 26:23, scratch152, 31:28); - s(EmcMrsWaitCnt2, 9:0, scratch153, 9:0); - s(EmcMrsWaitCnt2, 26:16, scratch153, 20:10); - s(EmcPmacroIbRxrt, 10:0, scratch153, 31:21); - s(EmcMrsWaitCnt, 9:0, scratch154, 9:0); - s(EmcMrsWaitCnt, 26:16, scratch154, 20:10); - s(EmcPmacroDdllLongCmd_4, 10:0, scratch154, 31:21); - s(EmcAutoCalInterval, 20:0, scratch155, 20:0); - s(McEmemArbOutstandingReq, 8:0, scratch155, 29:21); - s(McEmemArbOutstandingReq, 31:30, scratch155, 31:30); - s(McEmemArbRefpbHpCtrl, 6:0, scratch156, 6:0); - s(McEmemArbRefpbHpCtrl, 14:8, scratch156, 13:7); - s(McEmemArbRefpbHpCtrl, 22:16, scratch156, 20:14); - s(EmcCmdBrlshft1, 5:0, scratch156, 26:21); - s(EmcRrd, 4:0, scratch156, 31:27); - s(EmcQuseBrlshft0, 19:0, scratch157, 19:0); - s(EmcFbioCfg8, 27:16, scratch157, 31:20); - s(EmcQuseBrlshft1, 19:0, scratch158, 19:0); - s(EmcTxsrDll, 11:0, scratch158, 31:20); - s(EmcQuseBrlshft2, 19:0, scratch159, 19:0); - s(EmcTxdsrvttgen, 11:0, scratch159, 31:20); - s(EmcQuseBrlshft3, 19:0, scratch160, 19:0); - s(EmcPmacroVttgenCtrl0, 3:0, scratch160, 23:20); - s(EmcPmacroVttgenCtrl0, 11:8, scratch160, 27:24); - s(EmcPmacroVttgenCtrl0, 19:16, scratch160, 31:28); - s(EmcPmacroVttgenCtrl1, 19:0, scratch161, 19:0); - s(EmcCmdBrlshft2, 5:0, scratch161, 25:20); - s(EmcCmdBrlshft3, 5:0, scratch161, 31:26); - s(EmcAutoCalConfig3, 5:0, scratch162, 5:0); - s(EmcAutoCalConfig3, 13:8, scratch162, 11:6); - s(EmcAutoCalConfig3, 18:16, scratch162, 14:12); - s(EmcAutoCalConfig3, 22:20, scratch162, 17:15); - s(EmcTRefBw, 13:0, scratch162, 31:18); - s(EmcAutoCalConfig4, 5:0, scratch163, 5:0); - s(EmcAutoCalConfig4, 13:8, scratch163, 11:6); - s(EmcAutoCalConfig4, 18:16, scratch163, 14:12); - s(EmcAutoCalConfig4, 22:20, scratch163, 17:15); - s(EmcQpop, 6:0, scratch163, 24:18); - s(EmcQpop, 22:16, scratch163, 31:25); - s(EmcAutoCalConfig5, 5:0, scratch164, 5:0); - s(EmcAutoCalConfig5, 13:8, scratch164, 11:6); - s(EmcAutoCalConfig5, 18:16, scratch164, 14:12); - s(EmcAutoCalConfig5, 22:20, scratch164, 17:15); - s(EmcPmacroAutocalCfgCommon, 5:0, scratch164, 23:18); - s(EmcPmacroAutocalCfgCommon, 13:8, scratch164, 29:24); - s(EmcPmacroAutocalCfgCommon, 16:16, scratch164, 30:30); - s(EmcPmacroTxPwrd2, 27:27, scratch164, 31:31); - s(EmcAutoCalConfig6, 5:0, scratch165, 5:0); - s(EmcAutoCalConfig6, 13:8, scratch165, 11:6); - s(EmcAutoCalConfig6, 18:16, scratch165, 14:12); - s(EmcAutoCalConfig6, 22:20, scratch165, 17:15); - s(EmcWev, 5:0, scratch165, 23:18); - s(EmcWsv, 5:0, scratch165, 29:24); - s(EmcPmacroTxPwrd2, 29:28, scratch165, 31:30); - s(EmcAutoCalConfig7, 5:0, scratch166, 5:0); - s(EmcAutoCalConfig7, 13:8, scratch166, 11:6); - s(EmcAutoCalConfig7, 18:16, scratch166, 14:12); - s(EmcAutoCalConfig7, 22:20, scratch166, 17:15); - s(EmcCfg3, 2:0, scratch166, 20:18); - s(EmcCfg3, 6:4, scratch166, 23:21); - s(EmcQuseWidth, 3:0, scratch166, 27:24); - s(EmcQuseWidth, 29:28, scratch166, 29:28); - s(EmcPmacroTxPwrd3, 1:0, scratch166, 31:30); - s(EmcAutoCalConfig8, 5:0, scratch167, 5:0); - s(EmcAutoCalConfig8, 13:8, scratch167, 11:6); - s(EmcAutoCalConfig8, 18:16, scratch167, 14:12); - s(EmcAutoCalConfig8, 22:20, scratch167, 17:15); - s(EmcPmacroBgBiasCtrl0, 2:0, scratch167, 20:18); - s(EmcPmacroBgBiasCtrl0, 6:4, scratch167, 23:21); - s(McEmemArbTimingRcd, 5:0, scratch167, 29:24); - s(EmcPmacroTxPwrd3, 3:2, scratch167, 31:30); - s(EmcXm2CompPadCtrl2, 17:0, scratch168, 17:0); - s(McEmemArbTimingCcdmw, 5:0, scratch168, 23:18); - s(McEmemArbOverride, 27:27, scratch168, 24:24); - s(McEmemArbOverride, 26:26, scratch168, 25:25); - s(McEmemArbOverride, 16:16, scratch168, 26:26); - s(McEmemArbOverride, 10:10, scratch168, 27:27); - s(McEmemArbOverride, 4:4, scratch168, 28:28); - s(McEmemArbOverride, 3:3, scratch168, 29:29); - s(EmcPmacroTxPwrd3, 5:4, scratch168, 31:30); - s(EmcXm2CompPadCtrl3, 17:0, scratch169, 17:0); - s(EmcRext, 4:0, scratch169, 22:18); - s(EmcTClkStop, 4:0, scratch169, 27:23); - s(EmcPmacroTxPwrd3, 9:6, scratch169, 31:28); - s(EmcZcalWaitCnt, 10:0, scratch170, 10:0); - s(EmcZcalWaitCnt, 21:16, scratch170, 16:11); - s(EmcZcalWaitCnt, 31:31, scratch170, 17:17); - s(EmcWext, 4:0, scratch170, 22:18); - s(EmcRefctrl2, 0:0, scratch170, 23:23); - s(EmcRefctrl2, 26:24, scratch170, 26:24); - s(EmcRefctrl2, 31:31, scratch170, 27:27); - s(EmcPmacroTxPwrd3, 13:10, scratch170, 31:28); - s(EmcZcalMrwCmd, 7:0, scratch171, 7:0); - s(EmcZcalMrwCmd, 23:16, scratch171, 15:8); - s(EmcZcalMrwCmd, 31:30, scratch171, 17:16); - s(EmcWeDuration, 4:0, scratch171, 22:18); - s(EmcWsDuration, 4:0, scratch171, 27:23); - s(EmcPmacroTxPwrd3, 19:16, scratch171, 31:28); - s(EmcSwizzleRank0Byte0, 2:0, scratch172, 2:0); - s(EmcSwizzleRank0Byte0, 6:4, scratch172, 5:3); - s(EmcSwizzleRank0Byte0, 10:8, scratch172, 8:6); - s(EmcSwizzleRank0Byte0, 14:12, scratch172, 11:9); - s(EmcSwizzleRank0Byte0, 18:16, scratch172, 14:12); - s(EmcSwizzleRank0Byte0, 22:20, scratch172, 17:15); - s(EmcPutermWidth, 31:31, scratch172, 18:18); - s(EmcPutermWidth, 3:0, scratch172, 22:19); - s(McEmemArbTimingRrd, 4:0, scratch172, 27:23); - s(EmcPmacroTxPwrd3, 23:20, scratch172, 31:28); - s(EmcSwizzleRank0Byte1, 2:0, scratch173, 2:0); - s(EmcSwizzleRank0Byte1, 6:4, scratch173, 5:3); - s(EmcSwizzleRank0Byte1, 10:8, scratch173, 8:6); - s(EmcSwizzleRank0Byte1, 14:12, scratch173, 11:9); - s(EmcSwizzleRank0Byte1, 18:16, scratch173, 14:12); - s(EmcSwizzleRank0Byte1, 22:20, scratch173, 17:15); - s(McEmemArbTimingR2R, 4:0, scratch173, 22:18); - s(McEmemArbTimingW2W, 4:0, scratch173, 27:23); - s(EmcPmacroTxPwrd3, 27:24, scratch173, 31:28); - s(EmcSwizzleRank0Byte2, 2:0, scratch174, 2:0); - s(EmcSwizzleRank0Byte2, 6:4, scratch174, 5:3); - s(EmcSwizzleRank0Byte2, 10:8, scratch174, 8:6); - s(EmcSwizzleRank0Byte2, 14:12, scratch174, 11:9); - s(EmcSwizzleRank0Byte2, 18:16, scratch174, 14:12); - s(EmcSwizzleRank0Byte2, 22:20, scratch174, 17:15); - s(EmcPmacroTxPwrd3, 29:28, scratch174, 19:18); - s(EmcPmacroTxSelClkSrc0, 11:0, scratch174, 31:20); - s(EmcSwizzleRank0Byte3, 2:0, scratch175, 2:0); - s(EmcSwizzleRank0Byte3, 6:4, scratch175, 5:3); - s(EmcSwizzleRank0Byte3, 10:8, scratch175, 8:6); - s(EmcSwizzleRank0Byte3, 14:12, scratch175, 11:9); - s(EmcSwizzleRank0Byte3, 18:16, scratch175, 14:12); - s(EmcSwizzleRank0Byte3, 22:20, scratch175, 17:15); - s(EmcPmacroTxSelClkSrc0, 27:16, scratch175, 29:18); - s(EmcPmacroTxSelClkSrc1, 1:0, scratch175, 31:30); - s(EmcSwizzleRank1Byte0, 2:0, scratch176, 2:0); - s(EmcSwizzleRank1Byte0, 6:4, scratch176, 5:3); - s(EmcSwizzleRank1Byte0, 10:8, scratch176, 8:6); - s(EmcSwizzleRank1Byte0, 14:12, scratch176, 11:9); - s(EmcSwizzleRank1Byte0, 18:16, scratch176, 14:12); - s(EmcSwizzleRank1Byte0, 22:20, scratch176, 17:15); - s(EmcPmacroTxSelClkSrc1, 11:2, scratch176, 27:18); - s(EmcPmacroTxSelClkSrc1, 19:16, scratch176, 31:28); - s(EmcSwizzleRank1Byte1, 2:0, scratch177, 2:0); - s(EmcSwizzleRank1Byte1, 6:4, scratch177, 5:3); - s(EmcSwizzleRank1Byte1, 10:8, scratch177, 8:6); - s(EmcSwizzleRank1Byte1, 14:12, scratch177, 11:9); - s(EmcSwizzleRank1Byte1, 18:16, scratch177, 14:12); - s(EmcSwizzleRank1Byte1, 22:20, scratch177, 17:15); - s(EmcPmacroTxSelClkSrc1, 27:20, scratch177, 25:18); - s(EmcPmacroTxSelClkSrc3, 5:0, scratch177, 31:26); - s(EmcSwizzleRank1Byte2, 2:0, scratch178, 2:0); - s(EmcSwizzleRank1Byte2, 6:4, scratch178, 5:3); - s(EmcSwizzleRank1Byte2, 10:8, scratch178, 8:6); - s(EmcSwizzleRank1Byte2, 14:12, scratch178, 11:9); - s(EmcSwizzleRank1Byte2, 18:16, scratch178, 14:12); - s(EmcSwizzleRank1Byte2, 22:20, scratch178, 17:15); - s(EmcPmacroTxSelClkSrc3, 11:6, scratch178, 23:18); - s(EmcPmacroTxSelClkSrc3, 23:16, scratch178, 31:24); - s(EmcSwizzleRank1Byte3, 2:0, scratch179, 2:0); - s(EmcSwizzleRank1Byte3, 6:4, scratch179, 5:3); - s(EmcSwizzleRank1Byte3, 10:8, scratch179, 8:6); - s(EmcSwizzleRank1Byte3, 14:12, scratch179, 11:9); - s(EmcSwizzleRank1Byte3, 18:16, scratch179, 14:12); - s(EmcSwizzleRank1Byte3, 22:20, scratch179, 17:15); - s(EmcPmacroTxSelClkSrc3, 27:24, scratch179, 21:18); - s(EmcPmacroTxSelClkSrc2, 9:0, scratch179, 31:22); - s(EmcPmacroCmdBrickCtrlFdpd, 17:0, scratch180, 17:0); - s(EmcPmacroTxSelClkSrc2, 11:10, scratch180, 19:18); - s(EmcPmacroTxSelClkSrc2, 27:16, scratch180, 31:20); - s(EmcPmacroDataBrickCtrlFdpd, 17:0, scratch181, 17:0); - s(EmcPmacroTxSelClkSrc4, 11:0, scratch181, 29:18); - s(EmcPmacroTxSelClkSrc4, 17:16, scratch181, 31:30); - s(EmcFbioCfg7, 16:0, scratch182, 16:0); - s(McEmemArbRefpbBankCtrl, 6:0, scratch182, 23:17); - s(McEmemArbRefpbBankCtrl, 14:8, scratch182, 30:24); - s(McEmemArbRefpbBankCtrl, 31:31, scratch182, 31:31); - s(EmcDynSelfRefControl, 15:0, scratch183, 15:0); - s(EmcDynSelfRefControl, 31:31, scratch183, 16:16); - s(EmcPmacroTxSelClkSrc4, 27:18, scratch183, 26:17); - s(EmcPmacroTxSelClkSrc5, 4:0, scratch183, 31:27); - s(EmcDllCfg1, 16:0, scratch184, 16:0); - s(EmcPmacroTxSelClkSrc5, 11:5, scratch184, 23:17); - s(EmcPmacroTxSelClkSrc5, 23:16, scratch184, 31:24); - s(EmcPmacroPadCfgCtrl, 1:0, scratch185, 1:0); - s(EmcPmacroPadCfgCtrl, 6:5, scratch185, 3:2); - s(EmcPmacroPadCfgCtrl, 11:9, scratch185, 6:4); - s(EmcPmacroPadCfgCtrl, 13:13, scratch185, 7:7); - s(EmcPmacroPadCfgCtrl, 17:16, scratch185, 9:8); - s(EmcPmacroPadCfgCtrl, 21:20, scratch185, 11:10); - s(EmcPmacroPadCfgCtrl, 25:24, scratch185, 13:12); - s(EmcPmacroPadCfgCtrl, 30:28, scratch185, 16:14); - s(EmcPmacroTxSelClkSrc5, 27:24, scratch185, 20:17); - s(EmcPmacroCmdPadTxCtrl, 1:0, scratch185, 22:21); - s(EmcPmacroCmdPadTxCtrl, 5:4, scratch185, 24:23); - s(EmcPmacroCmdPadTxCtrl, 9:8, scratch185, 26:25); - s(EmcPmacroCmdPadTxCtrl, 13:12, scratch185, 28:27); - s(EmcPmacroCmdPadTxCtrl, 16:16, scratch185, 29:29); - s(EmcPmacroCmdPadTxCtrl, 21:20, scratch185, 31:30); - s(EmcRefresh, 15:0, scratch186, 15:0); - s(EmcCmdQ, 4:0, scratch186, 20:16); - s(EmcCmdQ, 10:8, scratch186, 23:21); - s(EmcCmdQ, 14:12, scratch186, 26:24); - s(EmcCmdQ, 28:24, scratch186, 31:27); - s(EmcAcpdControl, 15:0, scratch187, 15:0); - s(EmcAutoCalVrefSel1, 15:0, scratch187, 31:16); - s(EmcXm2CompPadCtrl, 1:0, scratch188, 1:0); - s(EmcXm2CompPadCtrl, 6:3, scratch188, 5:2); - s(EmcXm2CompPadCtrl, 9:9, scratch188, 6:6); - s(EmcXm2CompPadCtrl, 19:11, scratch188, 15:7); - s(EmcCfgDigDllPeriod, 15:0, scratch188, 31:16); - s(EmcCfgDigDll_1, 15:0, scratch189, 15:0); - s(EmcPreRefreshReqCnt, 15:0, scratch189, 31:16); - s(EmcPmacroCmdPadTxCtrl, 27:24, scratch190, 19:16); - s(EmcPmacroDataPadTxCtrl, 1:0, scratch190, 21:20); - s(EmcPmacroDataPadTxCtrl, 5:4, scratch190, 23:22); - s(EmcPmacroDataPadTxCtrl, 9:8, scratch190, 25:24); - s(EmcPmacroDataPadTxCtrl, 13:12, scratch190, 27:26); - s(EmcPmacroDataPadTxCtrl, 16:16, scratch190, 28:28); - s(EmcPmacroDataPadTxCtrl, 21:20, scratch190, 30:29); - s(EmcPmacroDataPadTxCtrl, 24:24, scratch190, 31:31); - s(EmcPmacroDataPadTxCtrl, 27:25, scratch191, 2:0); - - s(EmcPinGpio, 1:0, scratch8, 31:30); - s(EmcPinGpioEn, 1:0, scratch9, 31:30); - s(EmcDevSelect, 1:0, scratch10, 31:30); - s(EmcZcalWarmColdBootEnables, 1:0, scratch11, 31:30); - s(EmcCfgDigDllPeriodWarmBoot, 1:0, scratch12, 31:30); - s32(EmcBctSpare13, scratch31); - s32(EmcBctSpare12, scratch32); - s32(EmcBctSpare7, scratch33); - s32(EmcBctSpare6, scratch40); - s32(EmcBctSpare5, scratch42); - s32(EmcBctSpare4, scratch44); - s32(EmcBctSpare3, scratch45); - s32(EmcBctSpare2, scratch46); - s32(EmcBctSpare1, scratch47); - s32(EmcBctSpare0, scratch48); - s32(EmcBctSpare9, scratch50); - s32(EmcBctSpare8, scratch51); - s32(BootRomPatchData, scratch56); - s32(BootRomPatchControl, scratch57); - s(McClkenOverrideAllWarmBoot, 0:0, scratch58, 31:31); - s(EmcClkenOverrideAllWarmBoot, 0:0, scratch59, 30:30); - s(EmcMrsWarmBootEnable, 0:0, scratch59, 31:31); - s(ClearClk2Mc1, 0:0, scratch60, 30:30); - s(EmcWarmBootExtraModeRegWriteEnable, 0:0, scratch60, 31:31); - s(ClkRstControllerPllmMisc2OverrideEnable, 0:0, scratch61, 30:30); - s(EmcDbgWriteMux, 0:0, scratch61, 31:31); - s(EmcExtraRefreshNum, 2:0, scratch62, 31:29); - s(PmcIoDpd3ReqWait, 2:0, scratch68, 30:28); - s(AhbArbitrationXbarCtrlMemInitDone, 0:0, scratch68, 31:31); - s(MemoryType, 2:0, scratch69, 30:28); - s(PmcIoDpd4ReqWait, 2:0, scratch70, 30:28); - s(EmcTimingControlWait, 7:0, scratch86, 31:24); - s(EmcZcalWarmBootWait, 7:0, scratch87, 31:24); - s(WarmBootWait, 7:0, scratch88, 31:24); - s(EmcPinProgramWait, 7:0, scratch89, 31:24); - s(EmcAutoCalWait, 9:0, scratch101, 31:22); - s(SwizzleRankByteEncode, 15:0, scratch190, 15:0); - - switch (sdram->MemoryType) - { - case NvBootMemoryType_LpDdr2: - case NvBootMemoryType_LpDdr4: - s(EmcMrwLpddr2ZcalWarmBoot, 23:16, scratch5, 7:0); - s(EmcMrwLpddr2ZcalWarmBoot, 7:0, scratch5, 15:8); - s(EmcWarmBootMrwExtra, 23:16, scratch5, 23:16); - s(EmcWarmBootMrwExtra, 7:0, scratch5, 31:24); - s(EmcMrwLpddr2ZcalWarmBoot, 31:30, scratch6, 1:0); - s(EmcWarmBootMrwExtra, 31:30, scratch6, 3:2); - s(EmcMrwLpddr2ZcalWarmBoot, 27:26, scratch6, 5:4); - s(EmcWarmBootMrwExtra, 27:26, scratch6, 7:6); - s(EmcMrw6, 27:0, scratch8, 27:0); - s(EmcMrw6, 31:30, scratch8, 29:28); - s(EmcMrw8, 27:0, scratch9, 27:0); - s(EmcMrw8, 31:30, scratch9, 29:28); - s(EmcMrw9, 27:0, scratch10, 27:0); - s(EmcMrw9, 31:30, scratch10, 29:28); - s(EmcMrw10, 27:0, scratch11, 27:0); - s(EmcMrw10, 31:30, scratch11, 29:28); - s(EmcMrw12, 27:0, scratch12, 27:0); - s(EmcMrw12, 31:30, scratch12, 29:28); - s(EmcMrw13, 27:0, scratch13, 27:0); - s(EmcMrw13, 31:30, scratch13, 29:28); - s(EmcMrw14, 27:0, scratch14, 27:0); - s(EmcMrw14, 31:30, scratch14, 29:28); - s(EmcMrw1, 7:0, scratch15, 7:0); - s(EmcMrw1, 23:16, scratch15, 15:8); - s(EmcMrw1, 27:26, scratch15, 17:16); - s(EmcMrw1, 31:30, scratch15, 19:18); - s(EmcWarmBootMrwExtra, 7:0, scratch16, 7:0); - s(EmcWarmBootMrwExtra, 23:16, scratch16, 15:8); - s(EmcWarmBootMrwExtra, 27:26, scratch16, 17:16); - s(EmcWarmBootMrwExtra, 31:30, scratch16, 19:18); - s(EmcMrw2, 7:0, scratch17, 7:0); - s(EmcMrw2, 23:16, scratch17, 15:8); - s(EmcMrw2, 27:26, scratch17, 17:16); - s(EmcMrw2, 31:30, scratch17, 19:18); - s(EmcMrw3, 7:0, scratch18, 7:0); - s(EmcMrw3, 23:16, scratch18, 15:8); - s(EmcMrw3, 27:26, scratch18, 17:16); - s(EmcMrw3, 31:30, scratch18, 19:18); - s(EmcMrw4, 7:0, scratch19, 7:0); - s(EmcMrw4, 23:16, scratch19, 15:8); - s(EmcMrw4, 27:26, scratch19, 17:16); - s(EmcMrw4, 31:30, scratch19, 19:18); - break; - case NvBootMemoryType_Ddr3: - s(EmcMrs, 13:0, scratch5, 13:0); - s(EmcEmrs, 13:0, scratch5, 27:14); - s(EmcMrs, 21:20, scratch5, 29:28); - s(EmcMrs, 31:30, scratch5, 31:30); - s(EmcEmrs2, 13:0, scratch8, 13:0); - s(EmcEmrs3, 13:0, scratch8, 27:14); - s(EmcEmrs, 21:20, scratch8, 29:28); - s(EmcWarmBootMrsExtra, 13:0, scratch9, 13:0); - s(EmcEmrs, 31:30, scratch9, 15:14); - s(EmcEmrs2, 21:20, scratch9, 17:16); - s(EmcEmrs2, 31:30, scratch9, 19:18); - s(EmcEmrs3, 21:20, scratch9, 21:20); - s(EmcEmrs3, 31:30, scratch9, 23:22); - s(EmcWarmBootMrsExtra, 31:30, scratch9, 25:24); - s(EmcWarmBootMrsExtra, 21:20, scratch9, 27:26); - s(EmcZqCalDdr3WarmBoot, 31:30, scratch9, 29:28); - s(EmcMrs, 27:26, scratch10, 1:0); - s(EmcEmrs, 27:26, scratch10, 3:2); - s(EmcEmrs2, 27:26, scratch10, 5:4); - s(EmcEmrs3, 27:26, scratch10, 7:6); - s(EmcWarmBootMrsExtra, 27:27, scratch10, 8:8); - s(EmcWarmBootMrsExtra, 26:26, scratch10, 9:9); - s(EmcZqCalDdr3WarmBoot, 0:0, scratch10, 10:10); - s(EmcZqCalDdr3WarmBoot, 4:4, scratch10, 11:11); - break; - } - - s32(EmcCmdMappingByte, secure_scratch8); - s32(EmcPmacroBrickMapping0, secure_scratch9); - s32(EmcPmacroBrickMapping1, secure_scratch10); - s32(EmcPmacroBrickMapping2, secure_scratch11); - s32(McVideoProtectGpuOverride0, secure_scratch12); - s(EmcCmdMappingCmd0_0, 6:0, secure_scratch13, 6:0); - s(EmcCmdMappingCmd0_0, 14:8, secure_scratch13, 13:7); - s(EmcCmdMappingCmd0_0, 22:16, secure_scratch13, 20:14); - s(EmcCmdMappingCmd0_0, 30:24, secure_scratch13, 27:21); - s(McVideoProtectBomAdrHi, 1:0, secure_scratch13, 29:28); - s(McVideoProtectWriteAccess, 1:0, secure_scratch13, 31:30); - s(EmcCmdMappingCmd0_1, 6:0, secure_scratch14, 6:0); - s(EmcCmdMappingCmd0_1, 14:8, secure_scratch14, 13:7); - s(EmcCmdMappingCmd0_1, 22:16, secure_scratch14, 20:14); - s(EmcCmdMappingCmd0_1, 30:24, secure_scratch14, 27:21); - s(McSecCarveoutAdrHi, 1:0, secure_scratch14, 29:28); - s(McMtsCarveoutAdrHi, 1:0, secure_scratch14, 31:30); - s(EmcCmdMappingCmd1_0, 6:0, secure_scratch15, 6:0); - s(EmcCmdMappingCmd1_0, 14:8, secure_scratch15, 13:7); - s(EmcCmdMappingCmd1_0, 22:16, secure_scratch15, 20:14); - s(EmcCmdMappingCmd1_0, 30:24, secure_scratch15, 27:21); - s(McGeneralizedCarveout5BomHi, 1:0, secure_scratch15, 29:28); - s(McGeneralizedCarveout3BomHi, 1:0, secure_scratch15, 31:30); - s(EmcCmdMappingCmd1_1, 6:0, secure_scratch16, 6:0); - s(EmcCmdMappingCmd1_1, 14:8, secure_scratch16, 13:7); - s(EmcCmdMappingCmd1_1, 22:16, secure_scratch16, 20:14); - s(EmcCmdMappingCmd1_1, 30:24, secure_scratch16, 27:21); - s(McGeneralizedCarveout2BomHi, 1:0, secure_scratch16, 29:28); - s(McGeneralizedCarveout4BomHi, 1:0, secure_scratch16, 31:30); - s(EmcCmdMappingCmd2_0, 6:0, secure_scratch17, 6:0); - s(EmcCmdMappingCmd2_0, 14:8, secure_scratch17, 13:7); - s(EmcCmdMappingCmd2_0, 22:16, secure_scratch17, 20:14); - s(EmcCmdMappingCmd2_0, 30:24, secure_scratch17, 27:21); - s(McGeneralizedCarveout1BomHi, 1:0, secure_scratch17, 29:28); - s(EmcAdrCfg, 0:0, secure_scratch17, 30:30); - s(EmcFbioSpare, 1:1, secure_scratch17, 31:31); - s(EmcCmdMappingCmd2_1, 6:0, secure_scratch18, 6:0); - s(EmcCmdMappingCmd2_1, 14:8, secure_scratch18, 13:7); - s(EmcCmdMappingCmd2_1, 22:16, secure_scratch18, 20:14); - s(EmcCmdMappingCmd2_1, 30:24, secure_scratch18, 27:21); - s(EmcFbioCfg8, 15:15, secure_scratch18, 28:28); - s(McEmemAdrCfg, 0:0, secure_scratch18, 29:29); - s(McSecCarveoutProtectWriteAccess, 0:0, secure_scratch18, 30:30); - s(McMtsCarveoutRegCtrl, 0:0, secure_scratch18, 31:31); - s(EmcCmdMappingCmd3_0, 6:0, secure_scratch19, 6:0); - s(EmcCmdMappingCmd3_0, 14:8, secure_scratch19, 13:7); - s(EmcCmdMappingCmd3_0, 22:16, secure_scratch19, 20:14); - s(EmcCmdMappingCmd3_0, 30:24, secure_scratch19, 27:21); - s(McGeneralizedCarveout2Cfg0, 6:3, secure_scratch19, 31:28); - s(EmcCmdMappingCmd3_1, 6:0, secure_scratch20, 6:0); - s(EmcCmdMappingCmd3_1, 14:8, secure_scratch20, 13:7); - s(EmcCmdMappingCmd3_1, 22:16, secure_scratch20, 20:14); - s(EmcCmdMappingCmd3_1, 30:24, secure_scratch20, 27:21); - s(McGeneralizedCarveout2Cfg0, 10:7, secure_scratch20, 31:28); - s(McGeneralizedCarveout4Cfg0, 26:0, secure_scratch39, 26:0); - s(McGeneralizedCarveout2Cfg0, 17:14, secure_scratch39, 30:27); - s(McVideoProtectVprOverride, 0:0, secure_scratch39, 31:31); - s(McGeneralizedCarveout5Cfg0, 26:0, secure_scratch40, 26:0); - s(McGeneralizedCarveout2Cfg0, 21:18, secure_scratch40, 30:27); - s(McVideoProtectVprOverride, 1:1, secure_scratch40, 31:31); - s(EmcCmdMappingCmd0_2, 6:0, secure_scratch41, 6:0); - s(EmcCmdMappingCmd0_2, 14:8, secure_scratch41, 13:7); - s(EmcCmdMappingCmd0_2, 22:16, secure_scratch41, 20:14); - s(EmcCmdMappingCmd0_2, 27:24, secure_scratch41, 24:21); - s(McGeneralizedCarveout1Cfg0, 6:3, secure_scratch41, 28:25); - s(McGeneralizedCarveout2Cfg0, 13:11, secure_scratch41, 31:29); - s(EmcCmdMappingCmd1_2, 6:0, secure_scratch42, 6:0); - s(EmcCmdMappingCmd1_2, 14:8, secure_scratch42, 13:7); - s(EmcCmdMappingCmd1_2, 22:16, secure_scratch42, 20:14); - s(EmcCmdMappingCmd1_2, 27:24, secure_scratch42, 24:21); - s(McGeneralizedCarveout1Cfg0, 13:7, secure_scratch42, 31:25); - s(EmcCmdMappingCmd2_2, 6:0, secure_scratch43, 6:0); - s(EmcCmdMappingCmd2_2, 14:8, secure_scratch43, 13:7); - s(EmcCmdMappingCmd2_2, 22:16, secure_scratch43, 20:14); - s(EmcCmdMappingCmd2_2, 27:24, secure_scratch43, 24:21); - s(McGeneralizedCarveout1Cfg0, 17:14, secure_scratch43, 28:25); - s(McGeneralizedCarveout3Cfg0, 13:11, secure_scratch43, 31:29); - s(EmcCmdMappingCmd3_2, 6:0, secure_scratch44, 6:0); - s(EmcCmdMappingCmd3_2, 14:8, secure_scratch44, 13:7); - s(EmcCmdMappingCmd3_2, 22:16, secure_scratch44, 20:14); - s(EmcCmdMappingCmd3_2, 27:24, secure_scratch44, 24:21); - s(McGeneralizedCarveout1Cfg0, 21:18, secure_scratch44, 28:25); - s(McVideoProtectVprOverride, 3:2, secure_scratch44, 30:29); - s(McVideoProtectVprOverride, 6:6, secure_scratch44, 31:31); - s(McEmemAdrCfgChannelMask, 31:9, secure_scratch45, 22:0); - s(McEmemAdrCfgDev0, 2:0, secure_scratch45, 25:23); - s(McEmemAdrCfgDev0, 9:8, secure_scratch45, 27:26); - s(McEmemAdrCfgDev0, 19:16, secure_scratch45, 31:28); - s(McEmemAdrCfgBankMask0, 31:10, secure_scratch46, 21:0); - s(McEmemAdrCfgDev1, 2:0, secure_scratch46, 24:22); - s(McEmemAdrCfgDev1, 9:8, secure_scratch46, 26:25); - s(McEmemAdrCfgDev1, 19:16, secure_scratch46, 30:27); - s(McVideoProtectVprOverride, 7:7, secure_scratch46, 31:31); - s(McEmemAdrCfgBankMask1, 31:10, secure_scratch47, 21:0); - s(McGeneralizedCarveout3Cfg0, 10:3, secure_scratch47, 29:22); - s(McVideoProtectVprOverride, 9:8, secure_scratch47, 31:30); - s(McEmemAdrCfgBankMask2, 31:10, secure_scratch48, 21:0); - s(McGeneralizedCarveout3Cfg0, 21:14, secure_scratch48, 29:22); - s(McVideoProtectVprOverride, 11:11, secure_scratch48, 30:30); - s(McVideoProtectVprOverride, 14:14, secure_scratch48, 31:31); - s(McVideoProtectGpuOverride1, 15:0, secure_scratch49, 15:0); - s(McEmemCfg, 13:0, secure_scratch49, 29:16); - s(McEmemCfg, 31:31, secure_scratch49, 30:30); - s(McVideoProtectVprOverride, 15:15, secure_scratch49, 31:31); - s(McGeneralizedCarveout3Bom, 31:17, secure_scratch50, 14:0); - s(McGeneralizedCarveout1Bom, 31:17, secure_scratch50, 29:15); - s(McVideoProtectVprOverride, 18:17, secure_scratch50, 31:30); - s(McGeneralizedCarveout4Bom, 31:17, secure_scratch51, 14:0); - s(McGeneralizedCarveout2Bom, 31:17, secure_scratch51, 29:15); - s(McVideoProtectVprOverride, 20:19, secure_scratch51, 31:30); - s(McGeneralizedCarveout5Bom, 31:17, secure_scratch52, 14:0); - s(McVideoProtectBom, 31:20, secure_scratch52, 26:15); - s(McVideoProtectVprOverride, 23:21, secure_scratch52, 29:27); - s(McVideoProtectVprOverride, 26:26, secure_scratch52, 30:30); - s(McVideoProtectVprOverride, 29:29, secure_scratch52, 31:31); - s(McVideoProtectSizeMb, 11:0, secure_scratch53, 11:0); - s(McSecCarveoutBom, 31:20, secure_scratch53, 23:12); - s(McVideoProtectVprOverride, 31:30, secure_scratch53, 25:24); - s(McVideoProtectVprOverride1, 1:0, secure_scratch53, 27:26); - s(McVideoProtectVprOverride1, 7:4, secure_scratch53, 31:28); - s(McSecCarveoutSizeMb, 11:0, secure_scratch54, 11:0); - s(McMtsCarveoutBom, 31:20, secure_scratch54, 23:12); - s(McVideoProtectVprOverride1, 15:8, secure_scratch54, 31:24); - s(McMtsCarveoutSizeMb, 11:0, secure_scratch55, 11:0); - s(McGeneralizedCarveout4Size128kb, 11:0, secure_scratch55, 23:12); - s(McVideoProtectVprOverride1, 16:16, secure_scratch55, 24:24); - s(McGeneralizedCarveout2Cfg0, 2:0, secure_scratch55, 27:25); - s(McGeneralizedCarveout2Cfg0, 25:22, secure_scratch55, 31:28); - s(McGeneralizedCarveout3Size128kb, 11:0, secure_scratch56, 11:0); - s(McGeneralizedCarveout2Size128kb, 11:0, secure_scratch56, 23:12); - s(McGeneralizedCarveout2Cfg0, 26:26, secure_scratch56, 24:24); - s(McGeneralizedCarveout1Cfg0, 2:0, secure_scratch56, 27:25); - s(McGeneralizedCarveout1Cfg0, 25:22, secure_scratch56, 31:28); - s(McGeneralizedCarveout1Size128kb, 11:0, secure_scratch57, 11:0); - s(McGeneralizedCarveout5Size128kb, 11:0, secure_scratch57, 23:12); - s(McGeneralizedCarveout1Cfg0, 26:26, secure_scratch57, 24:24); - s(McGeneralizedCarveout3Cfg0, 2:0, secure_scratch57, 27:25); - s(McGeneralizedCarveout3Cfg0, 25:22, secure_scratch57, 31:28); - s(McGeneralizedCarveout3Cfg0, 26:26, secure_scratch58, 0:0); - - s32(McGeneralizedCarveout1Access0, secure_scratch59); - s32(McGeneralizedCarveout1Access1, secure_scratch60); - s32(McGeneralizedCarveout1Access2, secure_scratch61); - s32(McGeneralizedCarveout1Access3, secure_scratch62); - s32(McGeneralizedCarveout1Access4, secure_scratch63); - s32(McGeneralizedCarveout2Access0, secure_scratch64); - s32(McGeneralizedCarveout2Access1, secure_scratch65); - s32(McGeneralizedCarveout2Access2, secure_scratch66); - s32(McGeneralizedCarveout2Access3, secure_scratch67); - s32(McGeneralizedCarveout2Access4, secure_scratch68); - s32(McGeneralizedCarveout3Access0, secure_scratch69); - s32(McGeneralizedCarveout3Access1, secure_scratch70); - s32(McGeneralizedCarveout3Access2, secure_scratch71); - s32(McGeneralizedCarveout3Access3, secure_scratch72); - s32(McGeneralizedCarveout3Access4, secure_scratch73); - s32(McGeneralizedCarveout4Access0, secure_scratch74); - s32(McGeneralizedCarveout4Access1, secure_scratch75); - s32(McGeneralizedCarveout4Access2, secure_scratch76); - s32(McGeneralizedCarveout4Access3, secure_scratch77); - s32(McGeneralizedCarveout4Access4, secure_scratch78); - s32(McGeneralizedCarveout5Access0, secure_scratch79); - s32(McGeneralizedCarveout5Access1, secure_scratch80); - s32(McGeneralizedCarveout5Access2, secure_scratch81); - s32(McGeneralizedCarveout5Access3, secure_scratch82); - s32(McGeneralizedCarveout1ForceInternalAccess0, secure_scratch84); - s32(McGeneralizedCarveout1ForceInternalAccess1, secure_scratch85); - s32(McGeneralizedCarveout1ForceInternalAccess2, secure_scratch86); - s32(McGeneralizedCarveout1ForceInternalAccess3, secure_scratch87); - s32(McGeneralizedCarveout1ForceInternalAccess4, secure_scratch88); - s32(McGeneralizedCarveout2ForceInternalAccess0, secure_scratch89); - s32(McGeneralizedCarveout2ForceInternalAccess1, secure_scratch90); - s32(McGeneralizedCarveout2ForceInternalAccess2, secure_scratch91); - s32(McGeneralizedCarveout2ForceInternalAccess3, secure_scratch92); - s32(McGeneralizedCarveout2ForceInternalAccess4, secure_scratch93); - s32(McGeneralizedCarveout3ForceInternalAccess0, secure_scratch94); - s32(McGeneralizedCarveout3ForceInternalAccess1, secure_scratch95); - s32(McGeneralizedCarveout3ForceInternalAccess2, secure_scratch96); - s32(McGeneralizedCarveout3ForceInternalAccess3, secure_scratch97); - s32(McGeneralizedCarveout3ForceInternalAccess4, secure_scratch98); - s32(McGeneralizedCarveout4ForceInternalAccess0, secure_scratch99); - s32(McGeneralizedCarveout4ForceInternalAccess1, secure_scratch100); - s32(McGeneralizedCarveout4ForceInternalAccess2, secure_scratch101); - s32(McGeneralizedCarveout4ForceInternalAccess3, secure_scratch102); - s32(McGeneralizedCarveout4ForceInternalAccess4, secure_scratch103); - s32(McGeneralizedCarveout5ForceInternalAccess0, secure_scratch104); - s32(McGeneralizedCarveout5ForceInternalAccess1, secure_scratch105); - s32(McGeneralizedCarveout5ForceInternalAccess2, secure_scratch106); - s32(McGeneralizedCarveout5ForceInternalAccess3, secure_scratch107); - - c32(0, scratch2); - s(PllMInputDivider, 7:0, scratch2, 7:0); - s(PllMFeedbackDivider, 7:0, scratch2, 15:8); - s(PllMPostDivider, 4:0, scratch2, 20:16); - s(PllMKVCO, 0:0, scratch2, 21:21); - s(PllMKCP, 1:0, scratch2, 23:22); - - c32(0, scratch35); - s(PllMSetupControl, 15:0, scratch35, 15:0); - - c32(0, scratch3); - s(PllMInputDivider, 7:0, scratch3, 7:0); - c(0x3e, scratch3, 15:8); - c(0, scratch3, 20:16); - s(PllMKVCO, 0:0, scratch3, 21:21); - s(PllMKCP, 1:0, scratch3, 23:22); - - c32(0, scratch36); - s(PllMSetupControl, 23:0, scratch36, 23:0); - - c32(0, scratch4); - s(PllMStableTime, 9:0, scratch4, 9:0); -} - -#pragma GCC diagnostic ignored "-Wparentheses" - -static void _sdram_lp0_save_params_t210b01(const void *params) -{ - struct sdram_params_t210b01 *sdram = (struct sdram_params_t210b01 *)params; - struct tegra_pmc_regs *pmc = (struct tegra_pmc_regs *)PMC_BASE; - - u32 tmp = 0; - - sdram->mc_generalized_carveout1_cfg0 = 0; - sdram->mc_generalized_carveout2_cfg0 = 0; - sdram->mc_generalized_carveout3_cfg0 = 0; - sdram->mc_generalized_carveout4_cfg0 = 0; - sdram->mc_generalized_carveout5_cfg0 = 0; - - // Patch SDRAM parameters. - u32 t0 = sdram->emc_swizzle_rank0_byte0 << 5 >> 29 > sdram->emc_swizzle_rank0_byte0 << 1 >> 29; - u32 t1 = (t0 & 0xFFFFFFEF) | ((sdram->emc_swizzle_rank1_byte0 << 5 >> 29 > sdram->emc_swizzle_rank1_byte0 << 1 >> 29) << 4); - u32 t2 = (t1 & 0xFFFFFFFD) | ((sdram->emc_swizzle_rank0_byte1 << 5 >> 29 > sdram->emc_swizzle_rank0_byte1 << 1 >> 29) << 1); - u32 t3 = (t2 & 0xFFFFFFDF) | ((sdram->emc_swizzle_rank1_byte1 << 5 >> 29 > sdram->emc_swizzle_rank1_byte1 << 1 >> 29) << 5); - u32 t4 = (t3 & 0xFFFFFFFB) | ((sdram->emc_swizzle_rank0_byte2 << 5 >> 29 > sdram->emc_swizzle_rank0_byte2 << 1 >> 29) << 2); - u32 t5 = (t4 & 0xFFFFFFBF) | ((sdram->emc_swizzle_rank1_byte2 << 5 >> 29 > sdram->emc_swizzle_rank1_byte2 << 1 >> 29) << 6); - u32 t6 = (t5 & 0xFFFFFFF7) | ((sdram->emc_swizzle_rank0_byte3 << 5 >> 29 > sdram->emc_swizzle_rank0_byte3 << 1 >> 29) << 3); - u32 t7 = (t6 & 0xFFFFFF7F) | ((sdram->emc_swizzle_rank1_byte3 << 5 >> 29 > sdram->emc_swizzle_rank1_byte3 << 1 >> 29) << 7); - sdram->swizzle_rank_byte_encode = t7; - sdram->emc_bct_spare2 = 0x40000DD8; - sdram->emc_bct_spare3 = t7; - - s(emc_clock_source, 7:0, scratch6, 15:8); - s(emc_clock_source_dll, 7:0, scratch6, 23:16); - s(emc_clock_source, 31:29, scratch6, 26:24); - s(emc_clock_source_dll, 31:29, scratch6, 29:27); - s(emc_clock_source_dll, 11:10, scratch6, 31:30); - pmc->scratch7 = (sdram->emc_rc << 24) | ((sdram->emc_zqcal_lpddr4_warm_boot << 27 >> 31 << 23) | ((sdram->emc_zqcal_lpddr4_warm_boot << 30 >> 31 << 22) | ((sdram->emc_zqcal_lpddr4_warm_boot << 21) & 0x3FFFFF | ((sdram->clk_rst_pllm_misc20_override << 20) & 0x1FFFFF | ((sdram->clk_rst_pllm_misc20_override << 28 >> 31 << 19) | ((sdram->clk_rst_pllm_misc20_override << 27 >> 31 << 18) | ((sdram->clk_rst_pllm_misc20_override << 26 >> 31 << 17) | ((sdram->clk_rst_pllm_misc20_override << 21 >> 31 << 16) | ((sdram->clk_rst_pllm_misc20_override << 20 >> 31 << 15) | ((sdram->clk_rst_pllm_misc20_override << 19 >> 31 << 14) | ((sdram->clk_rst_pllm_misc20_override << 18 >> 31 << 13) | ((sdram->emc_clock_source << 15 >> 31 << 12) | ((sdram->emc_clock_source << 11 >> 31 << 11) | ((sdram->emc_clock_source << 12 >> 31 << 10) | ((sdram->emc_clock_source << 6 >> 31 << 9) | ((sdram->emc_clock_source << 16 >> 31 << 8) | ((32 * sdram->emc_clock_source >> 31 << 7) | ((16 * sdram->emc_clock_source >> 31 << 6) | (16 * (sdram->emc_zqcal_lpddr4_warm_boot >> 30) | (4 * (sdram->clk_rst_pllm_misc20_override << 29 >> 30) | ((sdram->clk_rst_pllm_misc20_override << 22 >> 30) | 4 * (pmc->scratch7 >> 2)) & 0xFFFFFFF3) & 0xFFFFFFCF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFFFFFF; - pmc->scratch8 = (sdram->emc_pmacro_bg_bias_ctrl0 << 18 >> 30 << 30) | ((4 * pmc->scratch8) >> 2); - pmc->scratch14 = ((u8)(sdram->emc_cfg_pipe_clk) << 31) | (2 * (((u8)(sdram->emc_fdpd_ctrl_cmd_no_ramp) << 30) | pmc->scratch14 & 0xBFFFFFFF) >> 1); - s(emc_qrst, 6:0, scratch15, 26:20); - s(emc_qrst, 20:16, scratch15, 31:27); - s(emc_pmacro_cmd_tx_drive, 5:0, scratch16, 25:20); - s(emc_pmacro_cmd_tx_drive, 13:8, scratch16, 31:26); - pmc->scratch17 = (16 * sdram->emc_fbio_cfg8 >> 31 << 31) | (2 * ((32 * sdram->emc_fbio_cfg8 >> 31 << 30) | ((sdram->emc_fbio_cfg8 << 6 >> 31 << 29) | ((sdram->emc_fbio_cfg8 << 7 >> 31 << 28) | ((sdram->emc_fbio_cfg8 << 8 >> 31 << 27) | ((sdram->emc_fbio_cfg8 << 9 >> 31 << 26) | ((sdram->emc_fbio_cfg8 << 10 >> 31 << 25) | ((sdram->emc_fbio_cfg8 << 11 >> 31 << 24) | ((sdram->emc_fbio_cfg8 << 12 >> 31 << 23) | ((sdram->emc_fbio_cfg8 << 13 >> 31 << 22) | ((sdram->emc_fbio_cfg8 << 14 >> 31 << 21) | ((sdram->emc_fbio_cfg8 << 15 >> 31 << 20) | pmc->scratch17 & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch18 = ((u16)(sdram->emc_txsr_dll) << 20) | pmc->scratch18 & 0xFFFFF; - pmc->scratch19 = (sdram->emc_txdsrvttgen << 20) | pmc->scratch19 & 0xFFFFF; - s32(emc_cfg_rsv, scratch22); - s32(emc_auto_cal_config, scratch23); - s32(emc_auto_cal_vref_sel0, scratch24); - s32(emc_pmacro_brick_ctrl_rfu1, scratch25); - s32(emc_pmacro_brick_ctrl_rfu2, scratch26); - s32(emc_pmc_scratch1, scratch27); - s32(emc_pmc_scratch2, scratch28); - s32(emc_pmc_scratch3, scratch29); - pmc->scratch30 = (sdram->emc_pmacro_perbit_rfu_ctrl0 >> 30 << 30) | (4 * ((4 * sdram->emc_pmacro_perbit_rfu_ctrl0 >> 30 << 28) | ((16 * sdram->emc_pmacro_perbit_rfu_ctrl0 >> 30 << 26) | ((sdram->emc_pmacro_perbit_rfu_ctrl0 << 6 >> 30 << 24) | ((sdram->emc_pmacro_perbit_rfu_ctrl0 << 8 >> 30 << 22) | ((sdram->emc_pmacro_perbit_rfu_ctrl0 << 10 >> 30 << 20) | ((sdram->emc_pmacro_perbit_rfu_ctrl0 << 12 >> 30 << 18) | ((sdram->emc_pmacro_perbit_rfu_ctrl0 << 14 >> 30 << 16) | ((sdram->emc_pmacro_perbit_rfu_ctrl0 << 16 >> 30 << 14) | ((sdram->emc_pmacro_perbit_rfu_ctrl0 << 18 >> 30 << 12) | ((sdram->emc_pmacro_perbit_rfu_ctrl0 << 20 >> 30 << 10) | ((sdram->emc_pmacro_perbit_rfu_ctrl0 << 22 >> 30 << 8) | ((sdram->emc_pmacro_perbit_rfu_ctrl0 << 24 >> 30 << 6) | (16 * (sdram->emc_pmacro_perbit_rfu_ctrl0 << 26 >> 30) | (4 * (sdram->emc_pmacro_perbit_rfu_ctrl0 << 28 >> 30) | (sdram->emc_pmacro_perbit_rfu_ctrl0 & 3 | 4 * (pmc->scratch30 >> 2)) & 0xFFFFFFF3) & 0xFFFFFFCF) & 0xFFFFFF3F) & 0xFFFFFCFF) & 0xFFFFF3FF) & 0xFFFFCFFF) & 0xFFFF3FFF) & 0xFFFCFFFF) & 0xFFF3FFFF) & 0xFFCFFFFF) & 0xFF3FFFFF) & 0xFCFFFFFF) & 0xF3FFFFFF) & 0xCFFFFFFF) >> 2); - pmc->scratch31 = (sdram->emc_pmacro_perbit_rfu_ctrl1 >> 30 << 30) | (4 * ((4 * sdram->emc_pmacro_perbit_rfu_ctrl1 >> 30 << 28) | ((16 * sdram->emc_pmacro_perbit_rfu_ctrl1 >> 30 << 26) | ((sdram->emc_pmacro_perbit_rfu_ctrl1 << 6 >> 30 << 24) | ((sdram->emc_pmacro_perbit_rfu_ctrl1 << 8 >> 30 << 22) | ((sdram->emc_pmacro_perbit_rfu_ctrl1 << 10 >> 30 << 20) | ((sdram->emc_pmacro_perbit_rfu_ctrl1 << 12 >> 30 << 18) | ((sdram->emc_pmacro_perbit_rfu_ctrl1 << 14 >> 30 << 16) | ((sdram->emc_pmacro_perbit_rfu_ctrl1 << 16 >> 30 << 14) | ((sdram->emc_pmacro_perbit_rfu_ctrl1 << 18 >> 30 << 12) | ((sdram->emc_pmacro_perbit_rfu_ctrl1 << 20 >> 30 << 10) | ((sdram->emc_pmacro_perbit_rfu_ctrl1 << 22 >> 30 << 8) | ((sdram->emc_pmacro_perbit_rfu_ctrl1 << 24 >> 30 << 6) | (16 * (sdram->emc_pmacro_perbit_rfu_ctrl1 << 26 >> 30) | (4 * (sdram->emc_pmacro_perbit_rfu_ctrl1 << 28 >> 30) | (sdram->emc_pmacro_perbit_rfu_ctrl1 & 3 | 4 * (pmc->scratch31 >> 2)) & 0xFFFFFFF3) & 0xFFFFFFCF) & 0xFFFFFF3F) & 0xFFFFFCFF) & 0xFFFFF3FF) & 0xFFFFCFFF) & 0xFFFF3FFF) & 0xFFFCFFFF) & 0xFFF3FFFF) & 0xFFCFFFFF) & 0xFF3FFFFF) & 0xFCFFFFFF) & 0xF3FFFFFF) & 0xCFFFFFFF) >> 2); - pmc->scratch32 = (sdram->emc_pmacro_perbit_rfu_ctrl2 >> 30 << 30) | (4 * ((4 * sdram->emc_pmacro_perbit_rfu_ctrl2 >> 30 << 28) | ((16 * sdram->emc_pmacro_perbit_rfu_ctrl2 >> 30 << 26) | ((sdram->emc_pmacro_perbit_rfu_ctrl2 << 6 >> 30 << 24) | ((sdram->emc_pmacro_perbit_rfu_ctrl2 << 8 >> 30 << 22) | ((sdram->emc_pmacro_perbit_rfu_ctrl2 << 10 >> 30 << 20) | ((sdram->emc_pmacro_perbit_rfu_ctrl2 << 12 >> 30 << 18) | ((sdram->emc_pmacro_perbit_rfu_ctrl2 << 14 >> 30 << 16) | ((sdram->emc_pmacro_perbit_rfu_ctrl2 << 16 >> 30 << 14) | ((sdram->emc_pmacro_perbit_rfu_ctrl2 << 18 >> 30 << 12) | ((sdram->emc_pmacro_perbit_rfu_ctrl2 << 20 >> 30 << 10) | ((sdram->emc_pmacro_perbit_rfu_ctrl2 << 22 >> 30 << 8) | ((sdram->emc_pmacro_perbit_rfu_ctrl2 << 24 >> 30 << 6) | (16 * (sdram->emc_pmacro_perbit_rfu_ctrl2 << 26 >> 30) | (4 * (sdram->emc_pmacro_perbit_rfu_ctrl2 << 28 >> 30) | (sdram->emc_pmacro_perbit_rfu_ctrl2 & 3 | 4 * (pmc->scratch32 >> 2)) & 0xFFFFFFF3) & 0xFFFFFFCF) & 0xFFFFFF3F) & 0xFFFFFCFF) & 0xFFFFF3FF) & 0xFFFFCFFF) & 0xFFFF3FFF) & 0xFFFCFFFF) & 0xFFF3FFFF) & 0xFFCFFFFF) & 0xFF3FFFFF) & 0xFCFFFFFF) & 0xF3FFFFFF) & 0xCFFFFFFF) >> 2); - pmc->scratch33 = (sdram->emc_pmacro_perbit_rfu_ctrl3 >> 30 << 30) | (4 * ((4 * sdram->emc_pmacro_perbit_rfu_ctrl3 >> 30 << 28) | ((16 * sdram->emc_pmacro_perbit_rfu_ctrl3 >> 30 << 26) | ((sdram->emc_pmacro_perbit_rfu_ctrl3 << 6 >> 30 << 24) | ((sdram->emc_pmacro_perbit_rfu_ctrl3 << 8 >> 30 << 22) | ((sdram->emc_pmacro_perbit_rfu_ctrl3 << 10 >> 30 << 20) | ((sdram->emc_pmacro_perbit_rfu_ctrl3 << 12 >> 30 << 18) | ((sdram->emc_pmacro_perbit_rfu_ctrl3 << 14 >> 30 << 16) | ((sdram->emc_pmacro_perbit_rfu_ctrl3 << 16 >> 30 << 14) | ((sdram->emc_pmacro_perbit_rfu_ctrl3 << 18 >> 30 << 12) | ((sdram->emc_pmacro_perbit_rfu_ctrl3 << 20 >> 30 << 10) | ((sdram->emc_pmacro_perbit_rfu_ctrl3 << 22 >> 30 << 8) | ((sdram->emc_pmacro_perbit_rfu_ctrl3 << 24 >> 30 << 6) | (16 * (sdram->emc_pmacro_perbit_rfu_ctrl3 << 26 >> 30) | (4 * (sdram->emc_pmacro_perbit_rfu_ctrl3 << 28 >> 30) | (sdram->emc_pmacro_perbit_rfu_ctrl3 & 3 | 4 * (pmc->scratch33 >> 2)) & 0xFFFFFFF3) & 0xFFFFFFCF) & 0xFFFFFF3F) & 0xFFFFFCFF) & 0xFFFFF3FF) & 0xFFFFCFFF) & 0xFFFF3FFF) & 0xFFFCFFFF) & 0xFFF3FFFF) & 0xFFCFFFFF) & 0xFF3FFFFF) & 0xFCFFFFFF) & 0xF3FFFFFF) & 0xCFFFFFFF) >> 2); - pmc->scratch40 = (sdram->emc_pmacro_perbit_rfu_ctrl4 >> 30 << 30) | (4 * ((4 * sdram->emc_pmacro_perbit_rfu_ctrl4 >> 30 << 28) | ((16 * sdram->emc_pmacro_perbit_rfu_ctrl4 >> 30 << 26) | ((sdram->emc_pmacro_perbit_rfu_ctrl4 << 6 >> 30 << 24) | ((sdram->emc_pmacro_perbit_rfu_ctrl4 << 8 >> 30 << 22) | ((sdram->emc_pmacro_perbit_rfu_ctrl4 << 10 >> 30 << 20) | ((sdram->emc_pmacro_perbit_rfu_ctrl4 << 12 >> 30 << 18) | ((sdram->emc_pmacro_perbit_rfu_ctrl4 << 14 >> 30 << 16) | ((sdram->emc_pmacro_perbit_rfu_ctrl4 << 16 >> 30 << 14) | ((sdram->emc_pmacro_perbit_rfu_ctrl4 << 18 >> 30 << 12) | ((sdram->emc_pmacro_perbit_rfu_ctrl4 << 20 >> 30 << 10) | ((sdram->emc_pmacro_perbit_rfu_ctrl4 << 22 >> 30 << 8) | ((sdram->emc_pmacro_perbit_rfu_ctrl4 << 24 >> 30 << 6) | (16 * (sdram->emc_pmacro_perbit_rfu_ctrl4 << 26 >> 30) | (4 * (sdram->emc_pmacro_perbit_rfu_ctrl4 << 28 >> 30) | (sdram->emc_pmacro_perbit_rfu_ctrl4 & 3 | 4 * (pmc->scratch40 >> 2)) & 0xFFFFFFF3) & 0xFFFFFFCF) & 0xFFFFFF3F) & 0xFFFFFCFF) & 0xFFFFF3FF) & 0xFFFFCFFF) & 0xFFFF3FFF) & 0xFFFCFFFF) & 0xFFF3FFFF) & 0xFFCFFFFF) & 0xFF3FFFFF) & 0xFCFFFFFF) & 0xF3FFFFFF) & 0xCFFFFFFF) >> 2); - pmc->scratch42 = (sdram->emc_pmacro_perbit_rfu_ctrl5 >> 30 << 30) | (4 * ((4 * sdram->emc_pmacro_perbit_rfu_ctrl5 >> 30 << 28) | ((16 * sdram->emc_pmacro_perbit_rfu_ctrl5 >> 30 << 26) | ((sdram->emc_pmacro_perbit_rfu_ctrl5 << 6 >> 30 << 24) | ((sdram->emc_pmacro_perbit_rfu_ctrl5 << 8 >> 30 << 22) | ((sdram->emc_pmacro_perbit_rfu_ctrl5 << 10 >> 30 << 20) | ((sdram->emc_pmacro_perbit_rfu_ctrl5 << 12 >> 30 << 18) | ((sdram->emc_pmacro_perbit_rfu_ctrl5 << 14 >> 30 << 16) | ((sdram->emc_pmacro_perbit_rfu_ctrl5 << 16 >> 30 << 14) | ((sdram->emc_pmacro_perbit_rfu_ctrl5 << 18 >> 30 << 12) | ((sdram->emc_pmacro_perbit_rfu_ctrl5 << 20 >> 30 << 10) | ((sdram->emc_pmacro_perbit_rfu_ctrl5 << 22 >> 30 << 8) | ((sdram->emc_pmacro_perbit_rfu_ctrl5 << 24 >> 30 << 6) | (16 * (sdram->emc_pmacro_perbit_rfu_ctrl5 << 26 >> 30) | (4 * (sdram->emc_pmacro_perbit_rfu_ctrl5 << 28 >> 30) | (sdram->emc_pmacro_perbit_rfu_ctrl5 & 3 | 4 * (pmc->scratch42 >> 2)) & 0xFFFFFFF3) & 0xFFFFFFCF) & 0xFFFFFF3F) & 0xFFFFFCFF) & 0xFFFFF3FF) & 0xFFFFCFFF) & 0xFFFF3FFF) & 0xFFFCFFFF) & 0xFFF3FFFF) & 0xFFCFFFFF) & 0xFF3FFFFF) & 0xFCFFFFFF) & 0xF3FFFFFF) & 0xCFFFFFFF) >> 2); - pmc->scratch44 = (sdram->mc_emem_arb_da_turns >> 24 << 24) | ((sdram->mc_emem_arb_da_turns >> 16 << 16) | ((sdram->mc_emem_arb_da_turns << 16 >> 24 << 8) | (sdram->mc_emem_arb_da_turns & 0xFF | (pmc->scratch44 >> 8 << 8)) & 0xFFFF00FF) & 0xFF00FFFF) & 0xFFFFFF; - pmc->scratch64 = ((u16)(sdram->mc_emem_arb_misc2) << 31) | (2 * ((sdram->emc_fbio_spare << 30) | ((sdram->emc_fbio_spare << 24 >> 26 << 24) | ((sdram->emc_fbio_spare << 16 >> 24 << 16) | ((sdram->emc_fbio_spare << 8 >> 24 << 8) | ((sdram->emc_fbio_spare >> 24) | (pmc->scratch64 >> 8 << 8)) & 0xFFFF00FF) & 0xFF00FFFF) & 0xC0FFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch65 = ((u16)(sdram->mc_da_cfg0) << 31 >> 1) | ((2 * sdram->mc_emem_arb_misc0 >> 29 << 27) | ((16 * sdram->mc_emem_arb_misc0 >> 31 << 26) | ((32 * sdram->mc_emem_arb_misc0 >> 26 << 20) | ((sdram->mc_emem_arb_misc0 << 11 >> 27 << 15) | ((sdram->mc_emem_arb_misc0 << 17 >> 25 << 8) | ((u8)sdram->mc_emem_arb_misc0 | (pmc->scratch65 >> 8 << 8)) & 0xFFFF80FF) & 0xFFF07FFF) & 0xFC0FFFFF) & 0xFBFFFFFF) & 0xC7FFFFFF) & 0xBFFFFFFF; - pmc->scratch66 = (sdram->emc_fdpd_ctrl_cmd >> 30 << 27) | ((4 * sdram->emc_fdpd_ctrl_cmd >> 31 << 26) | ((8 * sdram->emc_fdpd_ctrl_cmd >> 27 << 21) | ((sdram->emc_fdpd_ctrl_cmd << 8 >> 28 << 17) | ((sdram->emc_fdpd_ctrl_cmd << 15 >> 27 << 12) | ((sdram->emc_fdpd_ctrl_cmd << 20 >> 28 << 8) | ((u8)sdram->emc_fdpd_ctrl_cmd | (pmc->scratch66 >> 8 << 8)) & 0xFFFFF0FF) & 0xFFFE0FFF) & 0xFFE1FFFF) & 0xFC1FFFFF) & 0xFBFFFFFF) & 0xE7FFFFFF; - pmc->scratch67 = ((u8)(sdram->emc_burst_refresh_num) << 28) | ((16 * sdram->emc_auto_cal_config2 >> 30 << 26) | ((sdram->emc_auto_cal_config2 << 6 >> 30 << 24) | ((sdram->emc_auto_cal_config2 << 8 >> 30 << 22) | ((sdram->emc_auto_cal_config2 << 10 >> 30 << 20) | ((sdram->emc_auto_cal_config2 << 12 >> 30 << 18) | ((sdram->emc_auto_cal_config2 << 14 >> 30 << 16) | ((sdram->emc_auto_cal_config2 << 16 >> 30 << 14) | ((sdram->emc_auto_cal_config2 << 18 >> 30 << 12) | ((sdram->emc_auto_cal_config2 << 20 >> 30 << 10) | ((sdram->emc_auto_cal_config2 << 22 >> 30 << 8) | ((sdram->emc_auto_cal_config2 << 24 >> 30 << 6) | (16 * (sdram->emc_auto_cal_config2 << 26 >> 30) | (4 * (sdram->emc_auto_cal_config2 << 28 >> 30) | (sdram->emc_auto_cal_config2 & 3 | 4 * (pmc->scratch67 >> 2)) & 0xFFFFFFF3) & 0xFFFFFFCF) & 0xFFFFFF3F) & 0xFFFFFCFF) & 0xFFFFF3FF) & 0xFFFFCFFF) & 0xFFFF3FFF) & 0xFFFCFFFF) & 0xFFF3FFFF) & 0xFFCFFFFF) & 0xFF3FFFFF) & 0xFCFFFFFF) & 0xF3FFFFFF) & 0xFFFFFFF; - pmc->scratch68 = ((u8)(sdram->emc_tppd) << 28) | ((sdram->emc_cfg_dig_dll >> 31 << 27) | ((2 * sdram->emc_cfg_dig_dll >> 31 << 26) | ((16 * sdram->emc_cfg_dig_dll >> 31 << 25) | ((sdram->emc_cfg_dig_dll << 6 >> 22 << 15) | ((sdram->emc_cfg_dig_dll << 16 >> 31 << 14) | ((sdram->emc_cfg_dig_dll << 17 >> 31 << 13) | ((sdram->emc_cfg_dig_dll << 18 >> 30 << 11) | ((sdram->emc_cfg_dig_dll << 21 >> 29 << 8) | ((sdram->emc_cfg_dig_dll << 24 >> 30 << 6) | (32 * (sdram->emc_cfg_dig_dll << 26 >> 31) | (16 * (sdram->emc_cfg_dig_dll << 27 >> 31) | (8 * (sdram->emc_cfg_dig_dll << 28 >> 31) | (4 * (sdram->emc_cfg_dig_dll << 29 >> 31) | (2 * (sdram->emc_cfg_dig_dll << 30 >> 31) | (sdram->emc_cfg_dig_dll & 1 | 2 * (pmc->scratch68 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFF3F) & 0xFFFFF8FF) & 0xFFFFE7FF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFE007FFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xFFFFFFF; - pmc->scratch69 = (sdram->emc_r2r << 28) | ((sdram->emc_fdpd_ctrl_dq >> 30 << 26) | ((8 * sdram->emc_fdpd_ctrl_dq >> 27 << 21) | ((sdram->emc_fdpd_ctrl_dq << 8 >> 28 << 17) | ((sdram->emc_fdpd_ctrl_dq << 15 >> 27 << 12) | ((sdram->emc_fdpd_ctrl_dq << 20 >> 28 << 8) | ((u8)sdram->emc_fdpd_ctrl_dq | (pmc->scratch69 >> 8 << 8)) & 0xFFFFF0FF) & 0xFFFE0FFF) & 0xFFE1FFFF) & 0xFC1FFFFF) & 0xF3FFFFFF) & 0xFFFFFFF; - pmc->scratch70 = (sdram->emc_w2w << 28) | ((2 * sdram->emc_pmacro_ib_vref_dq_0 >> 25 << 21) | ((sdram->emc_pmacro_ib_vref_dq_0 << 9 >> 25 << 14) | ((sdram->emc_pmacro_ib_vref_dq_0 << 17 >> 25 << 7) | (sdram->emc_pmacro_ib_vref_dq_0 & 0x7F | (pmc->scratch70 >> 7 << 7)) & 0xFFFFC07F) & 0xFFE03FFF) & 0xF01FFFFF) & 0xFFFFFFF; - pmc->scratch71 = (sdram->emc_pmacro_vttgen_ctrl0 << 12 >> 28 << 28) | ((2 * sdram->emc_pmacro_ib_vref_dq_1 >> 25 << 21) | ((sdram->emc_pmacro_ib_vref_dq_1 << 9 >> 25 << 14) | ((sdram->emc_pmacro_ib_vref_dq_1 << 17 >> 25 << 7) | ((pmc->scratch71 >> 7 << 7) | sdram->emc_pmacro_ib_vref_dq_1 & 0x7F) & 0xFFFFC07F) & 0xFFE03FFF) & 0xF01FFFFF) & 0xFFFFFFF; - pmc->scratch72 = (((sdram->emc_pmacro_ib_vref_dqs_0 << 17 >> 25 << 7) | ((pmc->scratch72 >> 7 << 7) | sdram->emc_pmacro_ib_vref_dqs_0 & 0x7F) & 0xFFFFC07F) & 0xFFE03FFF | (sdram->emc_pmacro_ib_vref_dqs_0 << 9 >> 25 << 14)) & 0xF01FFFFF | (2 * sdram->emc_pmacro_ib_vref_dqs_0 >> 25 << 21); - pmc->scratch73 = (2 * sdram->emc_pmacro_ib_vref_dqs_1 >> 25 << 21) | ((sdram->emc_pmacro_ib_vref_dqs_1 << 9 >> 25 << 14) | ((sdram->emc_pmacro_ib_vref_dqs_1 << 17 >> 25 << 7) | ((pmc->scratch73 >> 7 << 7) | sdram->emc_pmacro_ib_vref_dqs_1 & 0x7F) & 0xFFFFC07F) & 0xFFE03FFF) & 0xF01FFFFF; - pmc->scratch74 = (2 * sdram->emc_pmacro_ddll_short_cmd_0 >> 25 << 21) | ((sdram->emc_pmacro_ddll_short_cmd_0 << 9 >> 25 << 14) | ((sdram->emc_pmacro_ddll_short_cmd_0 << 17 >> 25 << 7) | (sdram->emc_pmacro_ddll_short_cmd_0 & 0x7F | (pmc->scratch74 >> 7 << 7)) & 0xFFFFC07F) & 0xFFE03FFF) & 0xF01FFFFF; - pmc->scratch75 = (2 * sdram->emc_pmacro_ddll_short_cmd_1 >> 25 << 21) | ((sdram->emc_pmacro_ddll_short_cmd_1 << 9 >> 25 << 14) | ((sdram->emc_pmacro_ddll_short_cmd_1 << 17 >> 25 << 7) | (sdram->emc_pmacro_ddll_short_cmd_1 & 0x7F | (pmc->scratch75 >> 7 << 7)) & 0xFFFFC07F) & 0xFFE03FFF) & 0xF01FFFFF; - pmc->scratch76 = (sdram->emc_rp << 26) | ((4 * sdram->emc_dll_cfg0 >> 31 << 25) | ((8 * sdram->emc_dll_cfg0 >> 31 << 24) | ((16 * sdram->emc_dll_cfg0 >> 28 << 20) | ((sdram->emc_dll_cfg0 << 8 >> 28 << 16) | ((sdram->emc_dll_cfg0 << 12 >> 28 << 12) | ((sdram->emc_dll_cfg0 << 16 >> 28 << 8) | ((sdram->emc_dll_cfg0 << 20 >> 24) | (pmc->scratch76 >> 8 << 8)) & 0xFFFFF0FF) & 0xFFFF0FFF) & 0xFFF0FFFF) & 0xFF0FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0x3FFFFFF; - tmp = (sdram->emc_pmacro_tx_pwrd0 << 12 >> 31 << 16) | ((sdram->emc_pmacro_tx_pwrd0 << 13 >> 31 << 15) | ((sdram->emc_pmacro_tx_pwrd0 << 14 >> 31 << 14) | ((sdram->emc_pmacro_tx_pwrd0 << 15 >> 31 << 13) | ((sdram->emc_pmacro_tx_pwrd0 << 18 >> 31 << 12) | ((sdram->emc_pmacro_tx_pwrd0 << 19 >> 31 << 11) | ((sdram->emc_pmacro_tx_pwrd0 << 21 >> 31 << 10) | ((sdram->emc_pmacro_tx_pwrd0 << 22 >> 31 << 9) | ((sdram->emc_pmacro_tx_pwrd0 << 23 >> 31 << 8) | ((sdram->emc_pmacro_tx_pwrd0 << 24 >> 31 << 7) | ((sdram->emc_pmacro_tx_pwrd0 << 25 >> 31 << 6) | (32 * (sdram->emc_pmacro_tx_pwrd0 << 26 >> 31) | (16 * (sdram->emc_pmacro_tx_pwrd0 << 27 >> 31) | (8 * (sdram->emc_pmacro_tx_pwrd0 << 28 >> 31) | (4 * (sdram->emc_pmacro_tx_pwrd0 << 29 >> 31) | (2 * (sdram->emc_pmacro_tx_pwrd0 << 30 >> 31) | (sdram->emc_pmacro_tx_pwrd0 & 1 | 2 * (pmc->scratch77 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF; - pmc->scratch77 = (sdram->emc_r2w << 26) | ((4 * sdram->emc_pmacro_tx_pwrd0 >> 31 << 25) | ((8 * sdram->emc_pmacro_tx_pwrd0 >> 31 << 24) | ((32 * sdram->emc_pmacro_tx_pwrd0 >> 31 << 23) | ((sdram->emc_pmacro_tx_pwrd0 << 6 >> 31 << 22) | ((sdram->emc_pmacro_tx_pwrd0 << 7 >> 31 << 21) | ((sdram->emc_pmacro_tx_pwrd0 << 8 >> 31 << 20) | ((sdram->emc_pmacro_tx_pwrd0 << 9 >> 31 << 19) | ((sdram->emc_pmacro_tx_pwrd0 << 10 >> 31 << 18) | ((sdram->emc_pmacro_tx_pwrd0 << 11 >> 31 << 17) | tmp & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0x3FFFFFF; - tmp = ((8 * sdram->emc_pmacro_tx_pwrd1 >> 31 << 24) | ((32 * sdram->emc_pmacro_tx_pwrd1 >> 31 << 23) | ((sdram->emc_pmacro_tx_pwrd1 << 6 >> 31 << 22) | ((sdram->emc_pmacro_tx_pwrd1 << 7 >> 31 << 21) | ((sdram->emc_pmacro_tx_pwrd1 << 8 >> 31 << 20) | ((sdram->emc_pmacro_tx_pwrd1 << 9 >> 31 << 19) | ((sdram->emc_pmacro_tx_pwrd1 << 10 >> 31 << 18) | ((sdram->emc_pmacro_tx_pwrd1 << 11 >> 31 << 17) | ((sdram->emc_pmacro_tx_pwrd1 << 12 >> 31 << 16) | ((sdram->emc_pmacro_tx_pwrd1 << 13 >> 31 << 15) | ((sdram->emc_pmacro_tx_pwrd1 << 14 >> 31 << 14) | ((sdram->emc_pmacro_tx_pwrd1 << 15 >> 31 << 13) | ((sdram->emc_pmacro_tx_pwrd1 << 18 >> 31 << 12) | ((sdram->emc_pmacro_tx_pwrd1 << 19 >> 31 << 11) | ((sdram->emc_pmacro_tx_pwrd1 << 21 >> 31 << 10) | ((sdram->emc_pmacro_tx_pwrd1 << 22 >> 31 << 9) | ((sdram->emc_pmacro_tx_pwrd1 << 23 >> 31 << 8) | ((sdram->emc_pmacro_tx_pwrd1 << 24 >> 31 << 7) | ((sdram->emc_pmacro_tx_pwrd1 << 25 >> 31 << 6) | (32 * (sdram->emc_pmacro_tx_pwrd1 << 26 >> 31) | (16 * (sdram->emc_pmacro_tx_pwrd1 << 27 >> 31) | (8 * (sdram->emc_pmacro_tx_pwrd1 << 28 >> 31) | (4 * (sdram->emc_pmacro_tx_pwrd1 << 29 >> 31) | (2 * (sdram->emc_pmacro_tx_pwrd1 << 30 >> 31) | (sdram->emc_pmacro_tx_pwrd1 & 1 | 2 * (pmc->scratch78 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF; - pmc->scratch78 = (sdram->emc_w2r << 26) | ((4 * sdram->emc_pmacro_tx_pwrd1 >> 31 << 25) | tmp) & 0x3FFFFFF; - tmp = ((8 * sdram->emc_pmacro_tx_pwrd2 >> 31 << 24) | ((32 * sdram->emc_pmacro_tx_pwrd2 >> 31 << 23) | ((sdram->emc_pmacro_tx_pwrd2 << 6 >> 31 << 22) | ((sdram->emc_pmacro_tx_pwrd2 << 7 >> 31 << 21) | ((sdram->emc_pmacro_tx_pwrd2 << 8 >> 31 << 20) | ((sdram->emc_pmacro_tx_pwrd2 << 9 >> 31 << 19) | ((sdram->emc_pmacro_tx_pwrd2 << 10 >> 31 << 18) | ((sdram->emc_pmacro_tx_pwrd2 << 11 >> 31 << 17) | ((sdram->emc_pmacro_tx_pwrd2 << 12 >> 31 << 16) | ((sdram->emc_pmacro_tx_pwrd2 << 13 >> 31 << 15) | ((sdram->emc_pmacro_tx_pwrd2 << 14 >> 31 << 14) | ((sdram->emc_pmacro_tx_pwrd2 << 15 >> 31 << 13) | ((sdram->emc_pmacro_tx_pwrd2 << 18 >> 31 << 12) | ((sdram->emc_pmacro_tx_pwrd2 << 19 >> 31 << 11) | ((sdram->emc_pmacro_tx_pwrd2 << 21 >> 31 << 10) | ((sdram->emc_pmacro_tx_pwrd2 << 22 >> 31 << 9) | ((sdram->emc_pmacro_tx_pwrd2 << 23 >> 31 << 8) | ((sdram->emc_pmacro_tx_pwrd2 << 24 >> 31 << 7) | ((sdram->emc_pmacro_tx_pwrd2 << 25 >> 31 << 6) | (32 * (sdram->emc_pmacro_tx_pwrd2 << 26 >> 31) | (16 * (sdram->emc_pmacro_tx_pwrd2 << 27 >> 31) | (8 * (sdram->emc_pmacro_tx_pwrd2 << 28 >> 31) | (4 * (sdram->emc_pmacro_tx_pwrd2 << 29 >> 31) | (2 * (sdram->emc_pmacro_tx_pwrd2 << 30 >> 31) | (sdram->emc_pmacro_tx_pwrd2 & 1 | 2 * (pmc->scratch79 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF; - pmc->scratch79 = (sdram->emc_r2p << 26) | ((4 * sdram->emc_pmacro_tx_pwrd2 >> 31 << 25) | tmp) & 0x3FFFFFF; - tmp = (sdram->emc_pmacro_tx_pwrd3 << 23 >> 31 << 8) | ((sdram->emc_pmacro_tx_pwrd3 << 24 >> 31 << 7) | ((sdram->emc_pmacro_tx_pwrd3 << 25 >> 31 << 6) | (32 * (sdram->emc_pmacro_tx_pwrd3 << 26 >> 31) | (16 * (sdram->emc_pmacro_tx_pwrd3 << 27 >> 31) | (8 * (sdram->emc_pmacro_tx_pwrd3 << 28 >> 31) | (4 * (sdram->emc_pmacro_tx_pwrd3 << 29 >> 31) | (2 * (sdram->emc_pmacro_tx_pwrd3 << 30 >> 31) | (sdram->emc_pmacro_tx_pwrd3 & 1 | 2 * (pmc->scratch80 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF; - pmc->scratch80 = ((u8)(sdram->emc_ccdmw) << 26) | ((4 * sdram->emc_pmacro_tx_pwrd3 >> 31 << 25) | ((8 * sdram->emc_pmacro_tx_pwrd3 >> 31 << 24) | ((32 * sdram->emc_pmacro_tx_pwrd3 >> 31 << 23) | ((sdram->emc_pmacro_tx_pwrd3 << 6 >> 31 << 22) | ((sdram->emc_pmacro_tx_pwrd3 << 7 >> 31 << 21) | ((sdram->emc_pmacro_tx_pwrd3 << 8 >> 31 << 20) | ((sdram->emc_pmacro_tx_pwrd3 << 9 >> 31 << 19) | ((sdram->emc_pmacro_tx_pwrd3 << 10 >> 31 << 18) | ((sdram->emc_pmacro_tx_pwrd3 << 11 >> 31 << 17) | ((sdram->emc_pmacro_tx_pwrd3 << 12 >> 31 << 16) | ((sdram->emc_pmacro_tx_pwrd3 << 13 >> 31 << 15) | ((sdram->emc_pmacro_tx_pwrd3 << 14 >> 31 << 14) | ((sdram->emc_pmacro_tx_pwrd3 << 15 >> 31 << 13) | ((sdram->emc_pmacro_tx_pwrd3 << 18 >> 31 << 12) | ((sdram->emc_pmacro_tx_pwrd3 << 19 >> 31 << 11) | ((sdram->emc_pmacro_tx_pwrd3 << 21 >> 31 << 10) | ((sdram->emc_pmacro_tx_pwrd3 << 22 >> 31 << 9) | tmp & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0x3FFFFFF; - tmp = ((8 * sdram->emc_pmacro_tx_pwrd4 >> 31 << 24) | ((32 * sdram->emc_pmacro_tx_pwrd4 >> 31 << 23) | ((sdram->emc_pmacro_tx_pwrd4 << 6 >> 31 << 22) | ((sdram->emc_pmacro_tx_pwrd4 << 7 >> 31 << 21) | ((sdram->emc_pmacro_tx_pwrd4 << 8 >> 31 << 20) | ((sdram->emc_pmacro_tx_pwrd4 << 9 >> 31 << 19) | ((sdram->emc_pmacro_tx_pwrd4 << 10 >> 31 << 18) | ((sdram->emc_pmacro_tx_pwrd4 << 11 >> 31 << 17) | ((sdram->emc_pmacro_tx_pwrd4 << 12 >> 31 << 16) | ((sdram->emc_pmacro_tx_pwrd4 << 13 >> 31 << 15) | ((sdram->emc_pmacro_tx_pwrd4 << 14 >> 31 << 14) | ((sdram->emc_pmacro_tx_pwrd4 << 15 >> 31 << 13) | ((sdram->emc_pmacro_tx_pwrd4 << 18 >> 31 << 12) | ((sdram->emc_pmacro_tx_pwrd4 << 19 >> 31 << 11) | ((sdram->emc_pmacro_tx_pwrd4 << 21 >> 31 << 10) | ((sdram->emc_pmacro_tx_pwrd4 << 22 >> 31 << 9) | ((sdram->emc_pmacro_tx_pwrd4 << 23 >> 31 << 8) | ((sdram->emc_pmacro_tx_pwrd4 << 24 >> 31 << 7) | ((sdram->emc_pmacro_tx_pwrd4 << 25 >> 31 << 6) | (32 * (sdram->emc_pmacro_tx_pwrd4 << 26 >> 31) | (16 * (sdram->emc_pmacro_tx_pwrd4 << 27 >> 31) | (8 * (sdram->emc_pmacro_tx_pwrd4 << 28 >> 31) | (4 * (sdram->emc_pmacro_tx_pwrd4 << 29 >> 31) | (2 * (sdram->emc_pmacro_tx_pwrd4 << 30 >> 31) | (sdram->emc_pmacro_tx_pwrd4 & 1 | 2 * (pmc->scratch81 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF; - pmc->scratch81 = ((u8)(sdram->emc_rd_rcd) << 26) | ((4 * sdram->emc_pmacro_tx_pwrd4 >> 31 << 25) | tmp) & 0x3FFFFFF; - tmp = ((8 * sdram->emc_pmacro_tx_pwrd5 >> 31 << 24) | ((32 * sdram->emc_pmacro_tx_pwrd5 >> 31 << 23) | ((sdram->emc_pmacro_tx_pwrd5 << 6 >> 31 << 22) | ((sdram->emc_pmacro_tx_pwrd5 << 7 >> 31 << 21) | ((sdram->emc_pmacro_tx_pwrd5 << 8 >> 31 << 20) | ((sdram->emc_pmacro_tx_pwrd5 << 9 >> 31 << 19) | ((sdram->emc_pmacro_tx_pwrd5 << 10 >> 31 << 18) | ((sdram->emc_pmacro_tx_pwrd5 << 11 >> 31 << 17) | ((sdram->emc_pmacro_tx_pwrd5 << 12 >> 31 << 16) | ((sdram->emc_pmacro_tx_pwrd5 << 13 >> 31 << 15) | ((sdram->emc_pmacro_tx_pwrd5 << 14 >> 31 << 14) | ((sdram->emc_pmacro_tx_pwrd5 << 15 >> 31 << 13) | ((sdram->emc_pmacro_tx_pwrd5 << 18 >> 31 << 12) | ((sdram->emc_pmacro_tx_pwrd5 << 19 >> 31 << 11) | ((sdram->emc_pmacro_tx_pwrd5 << 21 >> 31 << 10) | ((sdram->emc_pmacro_tx_pwrd5 << 22 >> 31 << 9) | ((sdram->emc_pmacro_tx_pwrd5 << 23 >> 31 << 8) | ((sdram->emc_pmacro_tx_pwrd5 << 24 >> 31 << 7) | ((sdram->emc_pmacro_tx_pwrd5 << 25 >> 31 << 6) | (32 * (sdram->emc_pmacro_tx_pwrd5 << 26 >> 31) | (16 * (sdram->emc_pmacro_tx_pwrd5 << 27 >> 31) | (8 * (sdram->emc_pmacro_tx_pwrd5 << 28 >> 31) | (4 * (sdram->emc_pmacro_tx_pwrd5 << 29 >> 31) | (2 * (sdram->emc_pmacro_tx_pwrd5 << 30 >> 31) | (sdram->emc_pmacro_tx_pwrd5 & 1 | 2 * (pmc->scratch82 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF; - pmc->scratch82 = ((u16)(sdram->emc_wr_rcd) << 26) | ((4 * sdram->emc_pmacro_tx_pwrd5 >> 31 << 25) | tmp) & 0x3FFFFFF; - pmc->scratch83 = ((u8)(sdram->emc_config_sample_delay) << 25) | ((sdram->emc_auto_cal_channel >> 31 << 24) | ((2 * sdram->emc_auto_cal_channel >> 31 << 23) | ((4 * sdram->emc_auto_cal_channel >> 31 << 22) | ((16 * sdram->emc_auto_cal_channel >> 25 << 15) | ((sdram->emc_auto_cal_channel << 11 >> 27 << 10) | ((sdram->emc_auto_cal_channel << 20 >> 28 << 6) | (sdram->emc_auto_cal_channel & 0x3F | (pmc->scratch83 >> 6 << 6)) & 0xFFFFFC3F) & 0xFFFF83FF) & 0xFFC07FFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0x1FFFFFF; - pmc->scratch84 = (sdram->emc_sel_dpd_ctrl << 13 >> 29 << 29) | ((sdram->emc_sel_dpd_ctrl << 23 >> 31 << 28) | ((sdram->emc_sel_dpd_ctrl << 26 >> 31 << 27) | ((sdram->emc_sel_dpd_ctrl << 27 >> 31 << 26) | ((sdram->emc_sel_dpd_ctrl << 28 >> 31 << 25) | ((sdram->emc_sel_dpd_ctrl << 29 >> 31 << 24) | ((4 * sdram->emc_pmacro_rx_term >> 26 << 18) | ((sdram->emc_pmacro_rx_term << 10 >> 26 << 12) | ((sdram->emc_pmacro_rx_term << 18 >> 26 << 6) | (sdram->emc_pmacro_rx_term & 0x3F | (pmc->scratch84 >> 6 << 6)) & 0xFFFFF03F) & 0xFFFC0FFF) & 0xFF03FFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0x1FFFFFFF; - pmc->scratch85 = (4 * sdram->emc_obdly >> 30 << 30) | (4 * ((sdram->emc_obdly << 24) | ((4 * sdram->emc_pmacro_dq_tx_drive >> 26 << 18) | ((sdram->emc_pmacro_dq_tx_drive << 10 >> 26 << 12) | ((sdram->emc_pmacro_dq_tx_drive << 18 >> 26 << 6) | (sdram->emc_pmacro_dq_tx_drive & 0x3F | (pmc->scratch85 >> 6 << 6)) & 0xFFFFF03F) & 0xFFFC0FFF) & 0xFF03FFFF) & 0xC0FFFFFF) >> 2); - pmc->scratch86 = (sdram->emc_pmacro_vttgen_ctrl1 << 10 >> 30 << 30) | (4 * ((sdram->emc_pmacro_vttgen_ctrl1 << 16 >> 26 << 24) | ((4 * sdram->emc_pmacro_ca_tx_drive >> 26 << 18) | ((sdram->emc_pmacro_ca_tx_drive << 10 >> 26 << 12) | ((sdram->emc_pmacro_ca_tx_drive << 18 >> 26 << 6) | (sdram->emc_pmacro_ca_tx_drive & 0x3F | (pmc->scratch86 >> 6 << 6)) & 0xFFFFF03F) & 0xFFFC0FFF) & 0xFF03FFFF) & 0xC0FFFFFF) >> 2); - pmc->scratch87 = (sdram->emc_pmacro_vttgen_ctrl2 >> 16 << 24) | ((16 * sdram->emc_pmacro_zcrtl >> 30 << 22) | ((sdram->emc_pmacro_zcrtl << 6 >> 30 << 20) | ((sdram->emc_pmacro_zcrtl << 8 >> 30 << 18) | ((sdram->emc_pmacro_zcrtl << 10 >> 30 << 16) | ((sdram->emc_pmacro_zcrtl << 12 >> 30 << 14) | ((sdram->emc_pmacro_zcrtl << 14 >> 30 << 12) | ((sdram->emc_pmacro_zcrtl << 16 >> 30 << 10) | ((sdram->emc_pmacro_zcrtl << 18 >> 30 << 8) | ((sdram->emc_pmacro_zcrtl << 20 >> 30 << 6) | (16 * (sdram->emc_pmacro_zcrtl << 22 >> 30) | (4 * (sdram->emc_pmacro_zcrtl << 24 >> 30) | ((sdram->emc_pmacro_zcrtl << 26 >> 30) | 4 * (pmc->scratch87 >> 2)) & 0xFFFFFFF3) & 0xFFFFFFCF) & 0xFFFFFF3F) & 0xFFFFFCFF) & 0xFFFFF3FF) & 0xFFFFCFFF) & 0xFFFF3FFF) & 0xFFFCFFFF) & 0xFFF3FFFF) & 0xFFCFFFFF) & 0xFF3FFFFF) & 0xFFFFFF; - pmc->scratch88 = (sdram->mc_emem_arb_timing_rc << 24) | ((sdram->emc_zcal_interval << 14) | ((sdram->emc_zcal_interval << 8 >> 18) | (pmc->scratch88 >> 14 << 14)) & 0xFF003FFF) & 0xFFFFFF; - pmc->scratch89 = ((u16)(sdram->mc_emem_arb_rsv) << 24) | ((sdram->emc_data_brlshft0 << 8 >> 29 << 21) | ((sdram->emc_data_brlshft0 << 11 >> 29 << 18) | ((sdram->emc_data_brlshft0 << 14 >> 29 << 15) | ((sdram->emc_data_brlshft0 << 17 >> 29 << 12) | ((sdram->emc_data_brlshft0 << 20 >> 29 << 9) | ((sdram->emc_data_brlshft0 << 23 >> 29 << 6) | (8 * (sdram->emc_data_brlshft0 << 26 >> 29) | (sdram->emc_data_brlshft0 & 7 | 8 * (pmc->scratch89 >> 3)) & 0xFFFFFFC7) & 0xFFFFFE3F) & 0xFFFFF1FF) & 0xFFFF8FFF) & 0xFFFC7FFF) & 0xFFE3FFFF) & 0xFF1FFFFF) & 0xFFFFFF; - pmc->scratch90 = (sdram->emc_data_brlshft1 << 8 >> 29 << 21) | ((sdram->emc_data_brlshft1 << 11 >> 29 << 18) | ((sdram->emc_data_brlshft1 << 14 >> 29 << 15) | ((sdram->emc_data_brlshft1 << 17 >> 29 << 12) | ((sdram->emc_data_brlshft1 << 20 >> 29 << 9) | ((sdram->emc_data_brlshft1 << 23 >> 29 << 6) | (8 * (sdram->emc_data_brlshft1 << 26 >> 29) | (sdram->emc_data_brlshft1 & 7 | 8 * (pmc->scratch90 >> 3)) & 0xFFFFFFC7) & 0xFFFFFE3F) & 0xFFFFF1FF) & 0xFFFF8FFF) & 0xFFFC7FFF) & 0xFFE3FFFF) & 0xFF1FFFFF; - pmc->scratch91 = (sdram->emc_dqs_brlshft0 << 8 >> 29 << 21) | ((sdram->emc_dqs_brlshft0 << 11 >> 29 << 18) | ((sdram->emc_dqs_brlshft0 << 14 >> 29 << 15) | ((sdram->emc_dqs_brlshft0 << 17 >> 29 << 12) | ((sdram->emc_dqs_brlshft0 << 20 >> 29 << 9) | ((sdram->emc_dqs_brlshft0 << 23 >> 29 << 6) | (8 * (sdram->emc_dqs_brlshft0 << 26 >> 29) | (sdram->emc_dqs_brlshft0 & 7 | 8 * (pmc->scratch91 >> 3)) & 0xFFFFFFC7) & 0xFFFFFE3F) & 0xFFFFF1FF) & 0xFFFF8FFF) & 0xFFFC7FFF) & 0xFFE3FFFF) & 0xFF1FFFFF; - pmc->scratch92 = (sdram->emc_dqs_brlshft1 << 8 >> 29 << 21) | ((sdram->emc_dqs_brlshft1 << 11 >> 29 << 18) | ((sdram->emc_dqs_brlshft1 << 14 >> 29 << 15) | ((sdram->emc_dqs_brlshft1 << 17 >> 29 << 12) | ((sdram->emc_dqs_brlshft1 << 20 >> 29 << 9) | ((sdram->emc_dqs_brlshft1 << 23 >> 29 << 6) | (8 * (sdram->emc_dqs_brlshft1 << 26 >> 29) | (sdram->emc_dqs_brlshft1 & 7 | 8 * (pmc->scratch92 >> 3)) & 0xFFFFFFC7) & 0xFFFFFE3F) & 0xFFFFF1FF) & 0xFFFF8FFF) & 0xFFFC7FFF) & 0xFFE3FFFF) & 0xFF1FFFFF; - pmc->scratch93 = (2 * sdram->emc_swizzle_rank0_byte0 >> 29 << 21) | ((32 * sdram->emc_swizzle_rank0_byte0 >> 29 << 18) | ((sdram->emc_swizzle_rank0_byte0 << 9 >> 29 << 15) | ((sdram->emc_swizzle_rank0_byte0 << 13 >> 29 << 12) | ((sdram->emc_swizzle_rank0_byte0 << 17 >> 29 << 9) | ((sdram->emc_swizzle_rank0_byte0 << 21 >> 29 << 6) | (8 * (sdram->emc_swizzle_rank0_byte0 << 25 >> 29) | (sdram->emc_swizzle_rank0_byte0 & 7 | 8 * (pmc->scratch93 >> 3)) & 0xFFFFFFC7) & 0xFFFFFE3F) & 0xFFFFF1FF) & 0xFFFF8FFF) & 0xFFFC7FFF) & 0xFFE3FFFF) & 0xFF1FFFFF; - pmc->scratch94 = ((u8)(sdram->emc_cfg) << 27 >> 31 << 31) | (2 * ((sdram->emc_ras << 24) | ((2 * sdram->emc_swizzle_rank0_byte1 >> 29 << 21) | ((32 * sdram->emc_swizzle_rank0_byte1 >> 29 << 18) | ((sdram->emc_swizzle_rank0_byte1 << 9 >> 29 << 15) | ((sdram->emc_swizzle_rank0_byte1 << 13 >> 29 << 12) | ((sdram->emc_swizzle_rank0_byte1 << 17 >> 29 << 9) | ((sdram->emc_swizzle_rank0_byte1 << 21 >> 29 << 6) | (8 * (sdram->emc_swizzle_rank0_byte1 << 25 >> 29) | (sdram->emc_swizzle_rank0_byte1 & 7 | 8 * (pmc->scratch94 >> 3)) & 0xFFFFFFC7) & 0xFFFFFE3F) & 0xFFFFF1FF) & 0xFFFF8FFF) & 0xFFFC7FFF) & 0xFFE3FFFF) & 0xFF1FFFFF) & 0x80FFFFFF) >> 1); - pmc->scratch95 = ((u8)(sdram->emc_cfg) << 26 >> 31 << 31) | (2 * ((sdram->emc_w2p << 24) | ((2 * sdram->emc_swizzle_rank0_byte2 >> 29 << 21) | ((32 * sdram->emc_swizzle_rank0_byte2 >> 29 << 18) | ((sdram->emc_swizzle_rank0_byte2 << 9 >> 29 << 15) | ((sdram->emc_swizzle_rank0_byte2 << 13 >> 29 << 12) | ((sdram->emc_swizzle_rank0_byte2 << 17 >> 29 << 9) | ((sdram->emc_swizzle_rank0_byte2 << 21 >> 29 << 6) | (8 * (sdram->emc_swizzle_rank0_byte2 << 25 >> 29) | (sdram->emc_swizzle_rank0_byte2 & 7 | 8 * (pmc->scratch95 >> 3)) & 0xFFFFFFC7) & 0xFFFFFE3F) & 0xFFFFF1FF) & 0xFFFF8FFF) & 0xFFFC7FFF) & 0xFFE3FFFF) & 0xFF1FFFFF) & 0x80FFFFFF) >> 1); - pmc->scratch96 = ((u8)(sdram->emc_cfg) << 25 >> 31 << 31) | (2 * ((sdram->emc_qsafe << 24) | ((2 * sdram->emc_swizzle_rank0_byte3 >> 29 << 21) | (((sdram->emc_swizzle_rank0_byte3 << 9 >> 29 << 15) | ((sdram->emc_swizzle_rank0_byte3 << 13 >> 29 << 12) | ((sdram->emc_swizzle_rank0_byte3 << 17 >> 29 << 9) | ((sdram->emc_swizzle_rank0_byte3 << 21 >> 29 << 6) | (8 * (sdram->emc_swizzle_rank0_byte3 << 25 >> 29) | (sdram->emc_swizzle_rank0_byte3 & 7 | 8 * (pmc->scratch96 >> 3)) & 0xFFFFFFC7) & 0xFFFFFE3F) & 0xFFFFF1FF) & 0xFFFF8FFF) & 0xFFFC7FFF) & 0xFFE3FFFF | (32 * sdram->emc_swizzle_rank0_byte3 >> 29 << 18)) & 0xFF1FFFFF) & 0x80FFFFFF) >> 1); - pmc->scratch97 = ((u8)(sdram->emc_cfg) << 24 >> 31 << 31) | (2 * ((sdram->emc_rdv << 24) | ((2 * sdram->emc_swizzle_rank1_byte0 >> 29 << 21) | (((sdram->emc_swizzle_rank1_byte0 << 9 >> 29 << 15) | ((sdram->emc_swizzle_rank1_byte0 << 13 >> 29 << 12) | ((sdram->emc_swizzle_rank1_byte0 << 17 >> 29 << 9) | ((sdram->emc_swizzle_rank1_byte0 << 21 >> 29 << 6) | (8 * (sdram->emc_swizzle_rank1_byte0 << 25 >> 29) | (sdram->emc_swizzle_rank1_byte0 & 7 | 8 * (pmc->scratch97 >> 3)) & 0xFFFFFFC7) & 0xFFFFFE3F) & 0xFFFFF1FF) & 0xFFFF8FFF) & 0xFFFC7FFF) & 0xFFE3FFFF | (32 * sdram->emc_swizzle_rank1_byte0 >> 29 << 18)) & 0xFF1FFFFF) & 0x80FFFFFF) >> 1); - pmc->scratch98 = ((u16)(sdram->emc_cfg) << 23 >> 31 << 31) | (2 * (((u16)(sdram->emc_rw2pden) << 24) | ((2 * sdram->emc_swizzle_rank1_byte1 >> 29 << 21) | ((32 * sdram->emc_swizzle_rank1_byte1 >> 29 << 18) | ((sdram->emc_swizzle_rank1_byte1 << 9 >> 29 << 15) | ((sdram->emc_swizzle_rank1_byte1 << 13 >> 29 << 12) | ((sdram->emc_swizzle_rank1_byte1 << 17 >> 29 << 9) | ((sdram->emc_swizzle_rank1_byte1 << 21 >> 29 << 6) | (8 * (sdram->emc_swizzle_rank1_byte1 << 25 >> 29) | (sdram->emc_swizzle_rank1_byte1 & 7 | 8 * (pmc->scratch98 >> 3)) & 0xFFFFFFC7) & 0xFFFFFE3F) & 0xFFFFF1FF) & 0xFFFF8FFF) & 0xFFFC7FFF) & 0xFFE3FFFF) & 0xFF1FFFFF) & 0x80FFFFFF) >> 1); - pmc->scratch99 = ((u16)(sdram->emc_cfg) << 22 >> 31 << 31) | (2 * ((sdram->emc_tfaw << 24) | ((2 * sdram->emc_swizzle_rank1_byte2 >> 29 << 21) | ((32 * sdram->emc_swizzle_rank1_byte2 >> 29 << 18) | ((sdram->emc_swizzle_rank1_byte2 << 9 >> 29 << 15) | ((sdram->emc_swizzle_rank1_byte2 << 13 >> 29 << 12) | ((sdram->emc_swizzle_rank1_byte2 << 17 >> 29 << 9) | ((sdram->emc_swizzle_rank1_byte2 << 21 >> 29 << 6) | (8 * (sdram->emc_swizzle_rank1_byte2 << 25 >> 29) | (sdram->emc_swizzle_rank1_byte2 & 7 | 8 * (pmc->scratch99 >> 3)) & 0xFFFFFFC7) & 0xFFFFFE3F) & 0xFFFFF1FF) & 0xFFFF8FFF) & 0xFFFC7FFF) & 0xFFE3FFFF) & 0xFF1FFFFF) & 0x80FFFFFF) >> 1); - pmc->scratch100 = (sdram->emc_cfg << 13 >> 31 << 31) | (2 * ((sdram->emc_tclkstable << 24) | ((2 * sdram->emc_swizzle_rank1_byte3 >> 29 << 21) | ((32 * sdram->emc_swizzle_rank1_byte3 >> 29 << 18) | ((sdram->emc_swizzle_rank1_byte3 << 9 >> 29 << 15) | ((sdram->emc_swizzle_rank1_byte3 << 13 >> 29 << 12) | ((sdram->emc_swizzle_rank1_byte3 << 17 >> 29 << 9) | ((sdram->emc_swizzle_rank1_byte3 << 21 >> 29 << 6) | (8 * (sdram->emc_swizzle_rank1_byte3 << 25 >> 29) | (sdram->emc_swizzle_rank1_byte3 & 7 | 8 * (pmc->scratch100 >> 3)) & 0xFFFFFFC7) & 0xFFFFFE3F) & 0xFFFFF1FF) & 0xFFFF8FFF) & 0xFFFC7FFF) & 0xFFE3FFFF) & 0xFF1FFFFF) & 0x80FFFFFF) >> 1); - tmp = 2 * (((u8)(sdram->emc_trtm) << 24) | ((16 * sdram->emc_cfg_pipe2 >> 31 << 23) | ((32 * sdram->emc_cfg_pipe2 >> 31 << 22) | ((sdram->emc_cfg_pipe2 << 6 >> 31 << 21) | ((sdram->emc_cfg_pipe2 << 7 >> 31 << 20) | ((sdram->emc_cfg_pipe2 << 8 >> 31 << 19) | ((sdram->emc_cfg_pipe2 << 9 >> 31 << 18) | ((sdram->emc_cfg_pipe2 << 10 >> 31 << 17) | ((sdram->emc_cfg_pipe2 << 11 >> 31 << 16) | ((sdram->emc_cfg_pipe2 << 12 >> 31 << 15) | ((sdram->emc_cfg_pipe2 << 13 >> 31 << 14) | ((sdram->emc_cfg_pipe2 << 14 >> 31 << 13) | ((sdram->emc_cfg_pipe2 << 15 >> 31 << 12) | ((sdram->emc_cfg_pipe2 << 20 >> 31 << 11) | ((sdram->emc_cfg_pipe2 << 21 >> 31 << 10) | ((sdram->emc_cfg_pipe2 << 22 >> 31 << 9) | ((sdram->emc_cfg_pipe2 << 23 >> 31 << 8) | ((sdram->emc_cfg_pipe2 << 24 >> 31 << 7) | ((sdram->emc_cfg_pipe2 << 25 >> 31 << 6) | (32 * (sdram->emc_cfg_pipe2 << 26 >> 31) | (16 * (sdram->emc_cfg_pipe2 << 27 >> 31) | (8 * (sdram->emc_cfg_pipe2 << 28 >> 31) | (4 * (sdram->emc_cfg_pipe2 << 29 >> 31) | (2 * (sdram->emc_cfg_pipe2 << 30 >> 31) | (sdram->emc_cfg_pipe2 & 1 | 2 * (pmc->scratch101 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0x80FFFFFF) >> 1; - pmc->scratch101 = (sdram->emc_cfg << 10 >> 31 << 31) | tmp; - tmp = (2 * (pmc->scratch102 >> 1) | sdram->emc_cfg_pipe1 & 1) & 0xFFFFFFFD; - pmc->scratch102 = (sdram->emc_cfg << 9 >> 31 << 31) | (2 * (((u8)(sdram->emc_twtm) << 24) | ((16 * sdram->emc_cfg_pipe1 >> 31 << 23) | ((32 * sdram->emc_cfg_pipe1 >> 31 << 22) | ((sdram->emc_cfg_pipe1 << 6 >> 31 << 21) | ((sdram->emc_cfg_pipe1 << 7 >> 31 << 20) | ((sdram->emc_cfg_pipe1 << 8 >> 31 << 19) | ((sdram->emc_cfg_pipe1 << 9 >> 31 << 18) | ((sdram->emc_cfg_pipe1 << 10 >> 31 << 17) | ((sdram->emc_cfg_pipe1 << 11 >> 31 << 16) | ((sdram->emc_cfg_pipe1 << 12 >> 31 << 15) | ((sdram->emc_cfg_pipe1 << 13 >> 31 << 14) | ((sdram->emc_cfg_pipe1 << 14 >> 31 << 13) | ((sdram->emc_cfg_pipe1 << 15 >> 31 << 12) | ((sdram->emc_cfg_pipe1 << 20 >> 31 << 11) | ((sdram->emc_cfg_pipe1 << 21 >> 31 << 10) | ((sdram->emc_cfg_pipe1 << 22 >> 31 << 9) | ((sdram->emc_cfg_pipe1 << 23 >> 31 << 8) | ((sdram->emc_cfg_pipe1 << 24 >> 31 << 7) | ((sdram->emc_cfg_pipe1 << 25 >> 31 << 6) | (32 * (sdram->emc_cfg_pipe1 << 26 >> 31) | (16 * (sdram->emc_cfg_pipe1 << 27 >> 31) | (8 * (sdram->emc_cfg_pipe1 << 28 >> 31) | (4 * (sdram->emc_cfg_pipe1 << 29 >> 31) | (2 * (sdram->emc_cfg_pipe1 << 30 >> 31) | tmp) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0x80FFFFFF) >> 1); - tmp = 2 * (((u8)(sdram->emc_tratm) << 24) | ((sdram->emc_pmacro_ddll_pwrd0 >> 31 << 23) | ((2 * sdram->emc_pmacro_ddll_pwrd0 >> 31 << 22) | ((8 * sdram->emc_pmacro_ddll_pwrd0 >> 31 << 21) | ((16 * sdram->emc_pmacro_ddll_pwrd0 >> 31 << 20) | ((32 * sdram->emc_pmacro_ddll_pwrd0 >> 31 << 19) | ((sdram->emc_pmacro_ddll_pwrd0 << 6 >> 31 << 18) | ((sdram->emc_pmacro_ddll_pwrd0 << 8 >> 31 << 17) | ((sdram->emc_pmacro_ddll_pwrd0 << 9 >> 31 << 16) | ((sdram->emc_pmacro_ddll_pwrd0 << 11 >> 31 << 15) | ((sdram->emc_pmacro_ddll_pwrd0 << 12 >> 31 << 14) | ((sdram->emc_pmacro_ddll_pwrd0 << 13 >> 31 << 13) | ((sdram->emc_pmacro_ddll_pwrd0 << 14 >> 31 << 12) | ((sdram->emc_pmacro_ddll_pwrd0 << 16 >> 31 << 11) | ((sdram->emc_pmacro_ddll_pwrd0 << 17 >> 31 << 10) | ((sdram->emc_pmacro_ddll_pwrd0 << 19 >> 31 << 9) | ((sdram->emc_pmacro_ddll_pwrd0 << 20 >> 31 << 8) | ((sdram->emc_pmacro_ddll_pwrd0 << 21 >> 31 << 7) | ((sdram->emc_pmacro_ddll_pwrd0 << 22 >> 31 << 6) | (32 * (sdram->emc_pmacro_ddll_pwrd0 << 24 >> 31) | (16 * (sdram->emc_pmacro_ddll_pwrd0 << 25 >> 31) | (8 * (sdram->emc_pmacro_ddll_pwrd0 << 27 >> 31) | (4 * (sdram->emc_pmacro_ddll_pwrd0 << 28 >> 31) | (2 * (sdram->emc_pmacro_ddll_pwrd0 << 29 >> 31) | ((sdram->emc_pmacro_ddll_pwrd0 << 30 >> 31) | 2 * (pmc->scratch103 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0x80FFFFFF) >> 1; - pmc->scratch103 = (sdram->emc_cfg << 8 >> 31 << 31) | tmp; - tmp = 2 * (((u8)(sdram->emc_twatm) << 24) | ((sdram->emc_pmacro_ddll_pwrd1 >> 31 << 23) | ((2 * sdram->emc_pmacro_ddll_pwrd1 >> 31 << 22) | ((8 * sdram->emc_pmacro_ddll_pwrd1 >> 31 << 21) | ((16 * sdram->emc_pmacro_ddll_pwrd1 >> 31 << 20) | ((32 * sdram->emc_pmacro_ddll_pwrd1 >> 31 << 19) | ((sdram->emc_pmacro_ddll_pwrd1 << 6 >> 31 << 18) | ((sdram->emc_pmacro_ddll_pwrd1 << 8 >> 31 << 17) | ((sdram->emc_pmacro_ddll_pwrd1 << 9 >> 31 << 16) | ((sdram->emc_pmacro_ddll_pwrd1 << 11 >> 31 << 15) | ((sdram->emc_pmacro_ddll_pwrd1 << 12 >> 31 << 14) | ((sdram->emc_pmacro_ddll_pwrd1 << 13 >> 31 << 13) | ((sdram->emc_pmacro_ddll_pwrd1 << 14 >> 31 << 12) | ((sdram->emc_pmacro_ddll_pwrd1 << 16 >> 31 << 11) | ((sdram->emc_pmacro_ddll_pwrd1 << 17 >> 31 << 10) | ((sdram->emc_pmacro_ddll_pwrd1 << 19 >> 31 << 9) | ((sdram->emc_pmacro_ddll_pwrd1 << 20 >> 31 << 8) | ((sdram->emc_pmacro_ddll_pwrd1 << 21 >> 31 << 7) | ((sdram->emc_pmacro_ddll_pwrd1 << 22 >> 31 << 6) | (32 * (sdram->emc_pmacro_ddll_pwrd1 << 24 >> 31) | (16 * (sdram->emc_pmacro_ddll_pwrd1 << 25 >> 31) | (8 * (sdram->emc_pmacro_ddll_pwrd1 << 27 >> 31) | (4 * (sdram->emc_pmacro_ddll_pwrd1 << 28 >> 31) | (2 * (sdram->emc_pmacro_ddll_pwrd1 << 29 >> 31) | ((sdram->emc_pmacro_ddll_pwrd1 << 30 >> 31) | 2 * (pmc->scratch104 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0x80FFFFFF) >> 1; - pmc->scratch104 = (sdram->emc_cfg << 7 >> 31 << 31) | tmp; - tmp = (sdram->emc_pmacro_ddll_pwrd2 << 22 >> 31 << 6) | (32 * (sdram->emc_pmacro_ddll_pwrd2 << 24 >> 31) | (16 * (sdram->emc_pmacro_ddll_pwrd2 << 25 >> 31) | (8 * (sdram->emc_pmacro_ddll_pwrd2 << 27 >> 31) | (4 * (sdram->emc_pmacro_ddll_pwrd2 << 28 >> 31) | (2 * (sdram->emc_pmacro_ddll_pwrd2 << 29 >> 31) | ((sdram->emc_pmacro_ddll_pwrd2 << 30 >> 31) | 2 * (pmc->scratch105 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF; - pmc->scratch105 = (sdram->emc_cfg << 6 >> 31 << 31) | (2 * (((u8)(sdram->emc_tr2ref) << 24) | ((sdram->emc_pmacro_ddll_pwrd2 >> 31 << 23) | ((2 * sdram->emc_pmacro_ddll_pwrd2 >> 31 << 22) | ((8 * sdram->emc_pmacro_ddll_pwrd2 >> 31 << 21) | ((16 * sdram->emc_pmacro_ddll_pwrd2 >> 31 << 20) | ((32 * sdram->emc_pmacro_ddll_pwrd2 >> 31 << 19) | ((sdram->emc_pmacro_ddll_pwrd2 << 6 >> 31 << 18) | ((sdram->emc_pmacro_ddll_pwrd2 << 8 >> 31 << 17) | ((sdram->emc_pmacro_ddll_pwrd2 << 9 >> 31 << 16) | ((sdram->emc_pmacro_ddll_pwrd2 << 11 >> 31 << 15) | ((sdram->emc_pmacro_ddll_pwrd2 << 12 >> 31 << 14) | ((sdram->emc_pmacro_ddll_pwrd2 << 13 >> 31 << 13) | ((sdram->emc_pmacro_ddll_pwrd2 << 14 >> 31 << 12) | ((sdram->emc_pmacro_ddll_pwrd2 << 16 >> 31 << 11) | ((sdram->emc_pmacro_ddll_pwrd2 << 17 >> 31 << 10) | ((sdram->emc_pmacro_ddll_pwrd2 << 19 >> 31 << 9) | ((sdram->emc_pmacro_ddll_pwrd2 << 20 >> 31 << 8) | ((sdram->emc_pmacro_ddll_pwrd2 << 21 >> 31 << 7) | tmp & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0x80FFFFFF) >> 1); - pmc->scratch106 = (32 * sdram->emc_cfg >> 31 << 31) | (2 * (((u16)(sdram->emc_pdex2mrr) << 24) | ((8 * sdram->emc_pmacro_ddll_periodic_offset >> 31 << 23) | ((16 * sdram->emc_pmacro_ddll_periodic_offset >> 31 << 22) | ((32 * sdram->emc_pmacro_ddll_periodic_offset >> 31 << 21) | ((sdram->emc_pmacro_ddll_periodic_offset << 6 >> 31 << 20) | ((sdram->emc_pmacro_ddll_periodic_offset << 7 >> 31 << 19) | ((sdram->emc_pmacro_ddll_periodic_offset << 8 >> 31 << 18) | ((sdram->emc_pmacro_ddll_periodic_offset << 9 >> 31 << 17) | ((sdram->emc_pmacro_ddll_periodic_offset << 10 >> 31 << 16) | ((sdram->emc_pmacro_ddll_periodic_offset << 11 >> 31 << 15) | ((sdram->emc_pmacro_ddll_periodic_offset << 15 >> 31 << 14) | ((sdram->emc_pmacro_ddll_periodic_offset << 16 >> 31 << 13) | ((sdram->emc_pmacro_ddll_periodic_offset << 17 >> 31 << 12) | ((sdram->emc_pmacro_ddll_periodic_offset << 18 >> 31 << 11) | ((sdram->emc_pmacro_ddll_periodic_offset << 19 >> 31 << 10) | ((sdram->emc_pmacro_ddll_periodic_offset << 20 >> 31 << 9) | ((sdram->emc_pmacro_ddll_periodic_offset << 21 >> 31 << 8) | ((sdram->emc_pmacro_ddll_periodic_offset << 22 >> 31 << 7) | ((sdram->emc_pmacro_ddll_periodic_offset << 23 >> 31 << 6) | (sdram->emc_pmacro_ddll_periodic_offset & 0x3F | (pmc->scratch106 >> 6 << 6)) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0x80FFFFFF) >> 1); - pmc->scratch107 = (8 * sdram->emc_cfg >> 31 << 31) | (2 * ((sdram->emc_clken_override << 15 >> 31 << 30) | ((sdram->emc_clken_override << 23 >> 31 << 29) | ((sdram->emc_clken_override << 24 >> 31 << 28) | ((sdram->emc_clken_override << 25 >> 31 << 27) | ((sdram->emc_clken_override << 28 >> 31 << 26) | ((sdram->emc_clken_override << 29 >> 31 << 25) | ((sdram->emc_clken_override << 30 >> 31 << 24) | ((sdram->mc_emem_arb_da_covers << 8 >> 24 << 16) | ((sdram->mc_emem_arb_da_covers << 16 >> 24 << 8) | (sdram->mc_emem_arb_da_covers & 0xFF | (pmc->scratch107 >> 8 << 8)) & 0xFFFF00FF) & 0xFF00FFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch108 = (sdram->emc_rfc_pb << 23) | ((sdram->emc_xm2_comp_pad_ctrl >> 24 << 15) | ((sdram->emc_xm2_comp_pad_ctrl << 12 >> 24 << 7) | ((sdram->emc_xm2_comp_pad_ctrl << 20 >> 31 << 6) | (32 * (sdram->emc_xm2_comp_pad_ctrl << 22 >> 31) | (4 * (sdram->emc_xm2_comp_pad_ctrl << 25 >> 29) | (sdram->emc_xm2_comp_pad_ctrl & 3 | 4 * (pmc->scratch108 >> 2)) & 0xFFFFFFE3) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFF807F) & 0xFF807FFF) & 0x7FFFFF; - pmc->scratch109 = (sdram->emc_cfg_update >> 31 << 31) | (2 * ((2 * sdram->emc_cfg_update >> 31 << 30) | ((4 * sdram->emc_cfg_update >> 31 << 29) | ((8 * sdram->emc_cfg_update >> 31 << 28) | ((sdram->emc_cfg_update << 21 >> 30 << 26) | ((sdram->emc_cfg_update << 23 >> 31 << 25) | ((sdram->emc_cfg_update << 29 >> 30 << 23) | ((sdram->emc_cfg_update << 22) & 0x7FFFFF | ((sdram->emc_auto_cal_config3 << 8 >> 28 << 18) | ((sdram->emc_auto_cal_config3 << 12 >> 28 << 14) | ((sdram->emc_auto_cal_config3 << 17 >> 25 << 7) | ((pmc->scratch109 >> 7 << 7) | sdram->emc_auto_cal_config3 & 0x7F) & 0xFFFFC07F) & 0xFFFC3FFF) & 0xFFC3FFFF) & 0xFFBFFFFF) & 0xFE7FFFFF) & 0xFDFFFFFF) & 0xF3FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch110 = (sdram->emc_rfc << 22) | ((sdram->emc_auto_cal_config4 << 8 >> 28 << 18) | ((sdram->emc_auto_cal_config4 << 12 >> 28 << 14) | ((sdram->emc_auto_cal_config4 << 17 >> 25 << 7) | (sdram->emc_auto_cal_config4 & 0x7F | (pmc->scratch110 >> 7 << 7)) & 0xFFFFC07F) & 0xFFFC3FFF) & 0xFFC3FFFF) & 0x3FFFFF; - pmc->scratch111 = ((u16)(sdram->emc_txsr) << 22) | ((sdram->emc_auto_cal_config5 << 8 >> 28 << 18) | ((sdram->emc_auto_cal_config5 << 12 >> 28 << 14) | ((sdram->emc_auto_cal_config5 << 17 >> 25 << 7) | ((pmc->scratch111 >> 7 << 7) | sdram->emc_auto_cal_config5 & 0x7F) & 0xFFFFC07F) & 0xFFFC3FFF) & 0xFFC3FFFF) & 0x3FFFFF; - pmc->scratch112 = (16 * sdram->emc_mc2emc_q >> 28 << 28) | ((sdram->emc_mc2emc_q << 21 >> 29 << 25) | ((sdram->emc_mc2emc_q << 22) & 0x1FFFFFF | ((sdram->emc_auto_cal_config6 << 8 >> 28 << 18) | ((sdram->emc_auto_cal_config6 << 12 >> 28 << 14) | ((sdram->emc_auto_cal_config6 << 17 >> 25 << 7) | (sdram->emc_auto_cal_config6 & 0x7F | (pmc->scratch112 >> 7 << 7)) & 0xFFFFC07F) & 0xFFFC3FFF) & 0xFFC3FFFF) & 0xFE3FFFFF) & 0xF1FFFFFF) & 0xFFFFFFF; - pmc->scratch113 = (sdram->mc_emem_arb_ring1_throttle << 11 >> 27 << 27) | ((sdram->mc_emem_arb_ring1_throttle << 22) | ((sdram->emc_auto_cal_config7 << 8 >> 28 << 18) | ((sdram->emc_auto_cal_config7 << 12 >> 28 << 14) | ((sdram->emc_auto_cal_config7 << 17 >> 25 << 7) | (sdram->emc_auto_cal_config7 & 0x7F | (pmc->scratch113 >> 7 << 7)) & 0xFFFFC07F) & 0xFFFC3FFF) & 0xFFC3FFFF) & 0xF83FFFFF) & 0x7FFFFFF; - pmc->scratch114 = (sdram->emc_auto_cal_config8 << 8 >> 28 << 18) | ((sdram->emc_auto_cal_config8 << 12 >> 28 << 14) | ((sdram->emc_auto_cal_config8 << 17 >> 25 << 7) | (sdram->emc_auto_cal_config8 & 0x7F | (pmc->scratch114 >> 7 << 7)) & 0xFFFFC07F) & 0xFFFC3FFF) & 0xFFC3FFFF; - pmc->scratch115 = (4 * sdram->emc_cfg >> 31 << 31) | (2 * (((u16)(sdram->emc_ar2pden) << 22) | ((sdram->emc_fbio_cfg7 << 10 >> 30 << 20) | ((sdram->emc_fbio_cfg7 << 12 >> 31 << 19) | ((sdram->emc_fbio_cfg7 << 13 >> 31 << 18) | ((sdram->emc_fbio_cfg7 << 14 >> 31 << 17) | ((sdram->emc_fbio_cfg7 << 15 >> 31 << 16) | ((sdram->emc_fbio_cfg7 << 16 >> 31 << 15) | ((sdram->emc_fbio_cfg7 << 17 >> 31 << 14) | ((sdram->emc_fbio_cfg7 << 18 >> 31 << 13) | ((sdram->emc_fbio_cfg7 << 19 >> 31 << 12) | ((sdram->emc_fbio_cfg7 << 20 >> 31 << 11) | ((sdram->emc_fbio_cfg7 << 21 >> 31 << 10) | ((sdram->emc_fbio_cfg7 << 22 >> 31 << 9) | ((sdram->emc_fbio_cfg7 << 23 >> 31 << 8) | ((sdram->emc_fbio_cfg7 << 24 >> 31 << 7) | ((sdram->emc_fbio_cfg7 << 25 >> 31 << 6) | (32 * (sdram->emc_fbio_cfg7 << 26 >> 31) | (16 * (sdram->emc_fbio_cfg7 << 27 >> 31) | (8 * (sdram->emc_fbio_cfg7 << 28 >> 31) | (4 * (sdram->emc_fbio_cfg7 << 29 >> 31) | (2 * (sdram->emc_fbio_cfg7 << 30 >> 31) | (sdram->emc_fbio_cfg7 & 1 | 2 * (pmc->scratch115 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFCFFFFF) & 0x803FFFFF) >> 1); - pmc->scratch123 = (2 * sdram->emc_cfg >> 31 << 31) | (2 * ((sdram->emc_rfc_slr << 22) | ((32 * sdram->emc_pmacro_quse_ddll_rank0_0 >> 21 << 11) | (sdram->emc_pmacro_quse_ddll_rank0_0 & 0x7FF | (pmc->scratch123 >> 11 << 11)) & 0xFFC007FF) & 0x803FFFFF) >> 1); - pmc->scratch124 = (sdram->emc_cfg >> 31 << 31) | (2 * ((4 * sdram->emc_ibdly >> 30 << 29) | ((sdram->emc_ibdly << 22) & 0x1FFFFFFF | ((32 * sdram->emc_pmacro_quse_ddll_rank0_1 >> 21 << 11) | (sdram->emc_pmacro_quse_ddll_rank0_1 & 0x7FF | (pmc->scratch124 >> 11 << 11)) & 0xFFC007FF) & 0xE03FFFFF) & 0x9FFFFFFF) >> 1); - pmc->scratch125 = (sdram->emc_fbio_cfg5 << 27 >> 31 << 31) | (2 * (((u16)(sdram->mc_emem_arb_timing_rfcpb) << 22) | ((32 * sdram->emc_pmacro_quse_ddll_rank0_2 >> 21 << 11) | (sdram->emc_pmacro_quse_ddll_rank0_2 & 0x7FF | (pmc->scratch125 >> 11 << 11)) & 0xFFC007FF) & 0x803FFFFF) >> 1); - pmc->scratch126 = (sdram->emc_fbio_cfg5 << 16 >> 29 << 29) | ((sdram->emc_auto_cal_config9 << 25 >> 31 << 28) | ((sdram->emc_auto_cal_config9 << 26 >> 31 << 27) | ((sdram->emc_auto_cal_config9 << 27 >> 31 << 26) | ((sdram->emc_auto_cal_config9 << 28 >> 31 << 25) | ((sdram->emc_auto_cal_config9 << 29 >> 31 << 24) | ((sdram->emc_auto_cal_config9 << 30 >> 31 << 23) | ((sdram->emc_auto_cal_config9 << 22) & 0x7FFFFF | ((32 * sdram->emc_pmacro_quse_ddll_rank0_3 >> 21 << 11) | (sdram->emc_pmacro_quse_ddll_rank0_3 & 0x7FF | (pmc->scratch126 >> 11 << 11)) & 0xFFC007FF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0x1FFFFFFF; - pmc->scratch127 = ((u8)(sdram->emc_cfg2) << 26 >> 29 << 29) | ((sdram->emc_rdv_mask << 22) | ((32 * sdram->emc_pmacro_quse_ddll_rank0_4 >> 21 << 11) | (sdram->emc_pmacro_quse_ddll_rank0_4 & 0x7FF | (pmc->scratch127 >> 11 << 11)) & 0xFFC007FF) & 0xE03FFFFF) & 0x1FFFFFFF; - pmc->scratch128 = (sdram->emc_pmacro_cmd_pad_tx_ctrl << 27 >> 29 << 29) | (((u8)(sdram->emc_rdv_early_mask) << 22) | ((32 * sdram->emc_pmacro_quse_ddll_rank0_5 >> 21 << 11) | (sdram->emc_pmacro_quse_ddll_rank0_5 & 0x7FF | (pmc->scratch128 >> 11 << 11)) & 0xFFC007FF) & 0xE03FFFFF) & 0x1FFFFFFF; - pmc->scratch129 = (sdram->emc_pmacro_cmd_pad_tx_ctrl << 22 >> 29 << 29) | ((sdram->emc_rdv_early << 22) | ((32 * sdram->emc_pmacro_quse_ddll_rank1_0 >> 21 << 11) | (sdram->emc_pmacro_quse_ddll_rank1_0 & 0x7FF | (pmc->scratch129 >> 11 << 11)) & 0xFFC007FF) & 0xE03FFFFF) & 0x1FFFFFFF; - pmc->scratch130 = (sdram->emc_pmacro_cmd_pad_tx_ctrl << 17 >> 29 << 29) | ((4 * sdram->emc_quse_width >> 31 << 28) | ((8 * sdram->emc_quse_width >> 31 << 27) | ((sdram->emc_quse_width << 22) & 0x7FFFFFF | ((32 * sdram->emc_pmacro_quse_ddll_rank1_1 >> 21 << 11) | (sdram->emc_pmacro_quse_ddll_rank1_1 & 0x7FF | (pmc->scratch130 >> 11 << 11)) & 0xFFC007FF) & 0xF83FFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0x1FFFFFFF; - pmc->scratch131 = (sdram->emc_pmacro_cmd_pad_tx_ctrl << 12 >> 29 << 29) | (((u16)(sdram->emc_pmacro_ddll_short_cmd_2) << 22) | ((32 * sdram->emc_pmacro_quse_ddll_rank1_2 >> 21 << 11) | (sdram->emc_pmacro_quse_ddll_rank1_2 & 0x7FF | (pmc->scratch131 >> 11 << 11)) & 0xFFC007FF) & 0xE03FFFFF) & 0x1FFFFFFF; - pmc->scratch132 = (sdram->emc_pmacro_data_pad_tx_ctrl << 27 >> 29 << 29) | ((sdram->emc_pmacro_cmd_rx_term_mode << 18 >> 31 << 28) | ((sdram->emc_pmacro_cmd_rx_term_mode << 22 >> 30 << 26) | ((sdram->emc_pmacro_cmd_rx_term_mode << 26 >> 30 << 24) | ((sdram->emc_pmacro_cmd_rx_term_mode << 22) & 0xFFFFFF | ((32 * sdram->emc_pmacro_quse_ddll_rank1_3 >> 21 << 11) | (sdram->emc_pmacro_quse_ddll_rank1_3 & 0x7FF | (pmc->scratch132 >> 11 << 11)) & 0xFFC007FF) & 0xFF3FFFFF) & 0xFCFFFFFF) & 0xF3FFFFFF) & 0xEFFFFFFF) & 0x1FFFFFFF; - pmc->scratch133 = (sdram->emc_pmacro_data_pad_tx_ctrl << 22 >> 29 << 29) | ((sdram->emc_pmacro_data_rx_term_mode << 18 >> 31 << 28) | ((sdram->emc_pmacro_data_rx_term_mode << 22 >> 30 << 26) | ((sdram->emc_pmacro_data_rx_term_mode << 26 >> 30 << 24) | ((sdram->emc_pmacro_data_rx_term_mode << 22) & 0xFFFFFF | ((32 * sdram->emc_pmacro_quse_ddll_rank1_4 >> 21 << 11) | (sdram->emc_pmacro_quse_ddll_rank1_4 & 0x7FF | (pmc->scratch133 >> 11 << 11)) & 0xFFC007FF) & 0xFF3FFFFF) & 0xFCFFFFFF) & 0xF3FFFFFF) & 0xEFFFFFFF) & 0x1FFFFFFF; - pmc->scratch134 = (sdram->emc_pmacro_data_pad_tx_ctrl << 17 >> 29 << 29) | ((sdram->mc_emem_arb_timing_rp << 22) | ((32 * sdram->emc_pmacro_quse_ddll_rank1_5 >> 21 << 11) | (sdram->emc_pmacro_quse_ddll_rank1_5 & 0x7FF | (pmc->scratch134 >> 11 << 11)) & 0xFFC007FF) & 0xE03FFFFF) & 0x1FFFFFFF; - pmc->scratch135 = (sdram->emc_pmacro_data_pad_tx_ctrl << 12 >> 29 << 29) | ((sdram->mc_emem_arb_timing_ras << 22) | ((32 * sdram->emc_pmacro_ob_ddll_long_dq_rank0_0 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dq_rank0_0 & 0x7FF | (pmc->scratch135 >> 11 << 11)) & 0xFFC007FF) & 0xE03FFFFF) & 0x1FFFFFFF; - pmc->scratch136 = (sdram->emc_fbio_cfg5 << 23 >> 31 << 31) | (2 * ((sdram->emc_cfg << 14 >> 30 << 29) | ((sdram->mc_emem_arb_timing_faw << 22) & 0x1FFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dq_rank0_1 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dq_rank0_1 & 0x7FF | (pmc->scratch136 >> 11 << 11)) & 0xFFC007FF) & 0xE03FFFFF) & 0x9FFFFFFF) >> 1); - pmc->scratch137 = (sdram->emc_fbio_cfg5 << 21 >> 31 << 31) | (2 * ((sdram->emc_fbio_cfg5 << 29) | ((sdram->mc_emem_arb_timing_rap2pre << 22) & 0x1FFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dq_rank0_2 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dq_rank0_2 & 0x7FF | (pmc->scratch137 >> 11 << 11)) & 0xFFC007FF) & 0xE03FFFFF) & 0x9FFFFFFF) >> 1); - pmc->scratch138 = (sdram->emc_fbio_cfg5 << 19 >> 31 << 31) | (2 * ((sdram->emc_fbio_cfg5 << 28 >> 30 << 29) | ((sdram->mc_emem_arb_timing_wap2pre << 22) & 0x1FFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dq_rank0_3 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dq_rank0_3 & 0x7FF | (pmc->scratch138 >> 11 << 11)) & 0xFFC007FF) & 0xE03FFFFF) & 0x9FFFFFFF) >> 1); - pmc->scratch139 = (sdram->emc_fbio_cfg5 << 7 >> 31 << 31) | (2 * ((16 * sdram->emc_cfg2 >> 30 << 29) | (((u8)(sdram->mc_emem_arb_timing_r2w) << 22) & 0x1FFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dq_rank0_4 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dq_rank0_4 & 0x7FF | (pmc->scratch139 >> 11 << 11)) & 0xFFC007FF) & 0xE03FFFFF) & 0x9FFFFFFF) >> 1); - pmc->scratch140 = (16 * sdram->emc_fbio_cfg5 >> 31 << 31) | (2 * ((32 * sdram->emc_fbio_cfg5 >> 31 << 30) | ((sdram->emc_fbio_cfg5 << 6 >> 31 << 29) | (((u8)(sdram->mc_emem_arb_timing_w2r) << 22) & 0x1FFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dq_rank0_5 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dq_rank0_5 & 0x7FF | (pmc->scratch140 >> 11 << 11)) & 0xFFC007FF) & 0xE03FFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch141 = (sdram->emc_fbio_cfg5 << 8 >> 28 << 28) | (((u16)(sdram->emc_wdv) << 22) | ((32 * sdram->emc_pmacro_ob_ddll_long_dq_rank1_0 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dq_rank1_0 & 0x7FF | (pmc->scratch141 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xFFFFFFF; - pmc->scratch142 = ((u8)(sdram->emc_cfg2) << 31) | (2 * ((sdram->emc_fbio_cfg5 >> 31 << 30) | ((2 * sdram->emc_fbio_cfg5 >> 31 << 29) | ((8 * sdram->emc_fbio_cfg5 >> 31 << 28) | ((sdram->emc_quse << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dq_rank1_1 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dq_rank1_1 & 0x7FF | (pmc->scratch142 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch143 = (((u16)(sdram->emc_cfg2) << 21) >> 31 << 31) | (2 * ((((u16)(sdram->emc_cfg2) << 24) >> 31 << 30) | ((((u16)(sdram->emc_cfg2) << 29) >> 31 << 29) | ((((u16)(sdram->emc_cfg2) << 30) >> 31 << 28) | (((u8)(sdram->emc_pdex2wr) << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dq_rank1_2 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dq_rank1_2 & 0x7FF | (pmc->scratch143 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch144 = (sdram->emc_cfg2 << 15 >> 31 << 31) | (2 * ((sdram->emc_cfg2 << 16 >> 31 << 30) | ((sdram->emc_cfg2 << 17 >> 31 << 29) | ((sdram->emc_cfg2 << 20 >> 31 << 28) | (((u8)(sdram->emc_pdex2rd) << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dq_rank1_3 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dq_rank1_3 & 0x7FF | (pmc->scratch144 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch145 = (sdram->emc_cfg2 << 7 >> 31 << 31) | (2 * ((sdram->emc_cfg2 << 8 >> 31 << 30) | ((sdram->emc_cfg2 << 9 >> 31 << 29) | ((sdram->emc_cfg2 << 11 >> 31 << 28) | (((u16)(sdram->emc_pdex2che) << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dq_rank1_4 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dq_rank1_4 & 0x7FF | (pmc->scratch145 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch146 = (2 * sdram->emc_cfg2 >> 31 << 31) | (2 * ((4 * sdram->emc_cfg2 >> 31 << 30) | (((sdram->emc_cfg2 << 6 >> 31 << 28) | (((u8)(sdram->emc_pchg2pden) << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dq_rank1_5 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dq_rank1_5 & 0x7FF | (pmc->scratch146 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF | (8 * sdram->emc_cfg2 >> 31 << 29)) & 0xBFFFFFFF) >> 1); - pmc->scratch147 = (((u8)(sdram->emc_cfg_pipe) << 29) >> 31 << 31) | (2 * ((((u8)(sdram->emc_cfg_pipe) << 30) >> 31 << 30) | ((((u8)(sdram->emc_cfg_pipe) << 31) >> 2) | ((sdram->emc_cfg2 >> 31 << 28) | (((u16)(sdram->emc_act2pden) << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dqs_rank0_0 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dqs_rank0_0 & 0x7FF | (pmc->scratch147 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch148 = (((u8)(sdram->emc_cfg_pipe) << 25) >> 31 << 31) | (2 * ((((u8)(sdram->emc_cfg_pipe) << 26) >> 31 << 30) | ((((u8)(sdram->emc_cfg_pipe) << 27) >> 31 << 29) | ((((u8)(sdram->emc_cfg_pipe) << 28) >> 31 << 28) | (((u16)(sdram->emc_cke2pden) << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dqs_rank0_1 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dqs_rank0_1 & 0x7FF | (pmc->scratch148 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch149 = (((u16)(sdram->emc_cfg_pipe) << 21) >> 31 << 31) | (2 * ((((u16)(sdram->emc_cfg_pipe) << 22) >> 31 << 30) | ((((u16)(sdram->emc_cfg_pipe) << 23) >> 31 << 29) | ((((u16)(sdram->emc_cfg_pipe) << 24) >> 31 << 28) | ((sdram->emc_tcke << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dqs_rank0_2 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dqs_rank0_2 & 0x7FF | (pmc->scratch149 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch150 = (sdram->emc_cfg_pipe << 13 >> 31 << 31) | (2 * ((sdram->emc_cfg_pipe << 14 >> 31 << 30) | (((sdram->emc_cfg_pipe << 20 >> 31 << 28) | ((sdram->emc_trpab << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dqs_rank0_3 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dqs_rank0_3 & 0x7FF | (pmc->scratch150 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF | (sdram->emc_cfg_pipe << 15 >> 31 << 29)) & 0xBFFFFFFF) >> 1); - pmc->scratch151 = (sdram->emc_cfg_pipe << 9 >> 31 << 31) | (2 * ((sdram->emc_cfg_pipe << 10 >> 31 << 30) | ((sdram->emc_cfg_pipe << 11 >> 31 << 29) | ((sdram->emc_cfg_pipe << 12 >> 31 << 28) | ((sdram->emc_einput << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dqs_rank0_4 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dqs_rank0_4 & 0x7FF | (pmc->scratch151 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch152 = (32 * sdram->emc_cfg_pipe >> 31 << 31) | (2 * ((sdram->emc_cfg_pipe << 6 >> 31 << 30) | ((sdram->emc_cfg_pipe << 7 >> 31 << 29) | ((sdram->emc_cfg_pipe << 8 >> 31 << 28) | ((sdram->emc_einput_duration << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dqs_rank0_5 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dqs_rank0_5 & 0x7FF | (pmc->scratch152 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch153 = (((u16)(sdram->emc_pmacro_tx_sel_clk_src0) << 29) >> 31 << 31) | (2 * ((((u16)(sdram->emc_pmacro_tx_sel_clk_src0) << 30) >> 31 << 30) | ((((u16)(sdram->emc_pmacro_tx_sel_clk_src0) << 31) >> 2) | ((16 * sdram->emc_cfg_pipe >> 31 << 28) | ((sdram->emc_puterm_extra << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dqs_rank1_0 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dqs_rank1_0 & 0x7FF | (pmc->scratch153 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch154 = (((u16)(sdram->emc_pmacro_tx_sel_clk_src0) << 25) >> 31 << 31) | (2 * ((((u16)(sdram->emc_pmacro_tx_sel_clk_src0) << 26) >> 31 << 30) | (((((u16)(sdram->emc_pmacro_tx_sel_clk_src0) << 28) >> 31 << 28) | ((sdram->emc_tckesr << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dqs_rank1_1 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dqs_rank1_1 & 0x7FF | (pmc->scratch154 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF | (((u16)(sdram->emc_pmacro_tx_sel_clk_src0) << 27) >> 31 << 29)) & 0xBFFFFFFF) >> 1); - pmc->scratch155 = (((u16)(sdram->emc_pmacro_tx_sel_clk_src0) << 21) >> 31 << 31) | (2 * ((((u16)(sdram->emc_pmacro_tx_sel_clk_src0) << 22) >> 31 << 30) | ((((u16)(sdram->emc_pmacro_tx_sel_clk_src0) << 23) >> 31 << 29) | ((((u16)(sdram->emc_pmacro_tx_sel_clk_src0) << 24) >> 31 << 28) | ((sdram->emc_tpd << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dqs_rank1_2 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dqs_rank1_2 & 0x7FF | (pmc->scratch155 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch156 = (sdram->emc_pmacro_tx_sel_clk_src0 << 12 >> 31 << 31) | (2 * ((sdram->emc_pmacro_tx_sel_clk_src0 << 13 >> 31 << 30) | ((sdram->emc_pmacro_tx_sel_clk_src0 << 14 >> 31 << 29) | ((sdram->emc_pmacro_tx_sel_clk_src0 << 15 >> 31 << 28) | ((sdram->emc_wdv_mask << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dqs_rank1_3 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dqs_rank1_3 & 0x7FF | (pmc->scratch156 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch157 = (sdram->emc_pmacro_tx_sel_clk_src0 << 8 >> 31 << 31) | (2 * ((sdram->emc_pmacro_tx_sel_clk_src0 << 9 >> 31 << 30) | ((sdram->emc_pmacro_tx_sel_clk_src0 << 10 >> 31 << 29) | ((sdram->emc_pmacro_tx_sel_clk_src0 << 11 >> 31 << 28) | (((u16)(sdram->emc_wdv_chk) << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dqs_rank1_4 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dqs_rank1_4 & 0x7FF | (pmc->scratch157 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch158 = ((u16)(sdram->emc_pmacro_tx_sel_clk_src1) << 31) | (2 * ((32 * sdram->emc_pmacro_tx_sel_clk_src0 >> 31 << 30) | ((sdram->emc_pmacro_tx_sel_clk_src0 << 6 >> 31 << 29) | ((sdram->emc_pmacro_tx_sel_clk_src0 << 7 >> 31 << 28) | (((u8)(sdram->emc_cmd_brlshft0) << 26 >> 29 << 25) | (((u8)(sdram->emc_cmd_brlshft0) << 22) & 0x1FFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dqs_rank1_5 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dqs_rank1_5 & 0x7FF | (pmc->scratch158 >> 11 << 11)) & 0xFFC007FF) & 0xFE3FFFFF) & 0xF1FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch159 = (((u16)(sdram->emc_pmacro_tx_sel_clk_src1) << 27) >> 31 << 31) | (2 * ((((u16)(sdram->emc_pmacro_tx_sel_clk_src1) << 28) >> 31 << 30) | ((((u16)(sdram->emc_pmacro_tx_sel_clk_src1) << 29) >> 31 << 29) | ((((u16)(sdram->emc_pmacro_tx_sel_clk_src1) << 30) >> 31 << 28) | (((u8)(sdram->emc_cmd_brlshft1) << 26 >> 29 << 25) | (((u8)(sdram->emc_cmd_brlshft1) << 22) & 0x1FFFFFF | ((32 * sdram->emc_pmacro_ib_ddll_long_dqs_rank0_0 >> 21 << 11) | (sdram->emc_pmacro_ib_ddll_long_dqs_rank0_0 & 0x7FF | (pmc->scratch159 >> 11 << 11)) & 0xFFC007FF) & 0xFE3FFFFF) & 0xF1FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch160 = (((u16)(sdram->emc_pmacro_tx_sel_clk_src1) << 23) >> 31 << 31) | (2 * ((((u16)(sdram->emc_pmacro_tx_sel_clk_src1) << 24) >> 31 << 30) | ((((u16)(sdram->emc_pmacro_tx_sel_clk_src1) << 25) >> 31 << 29) | ((((u16)(sdram->emc_pmacro_tx_sel_clk_src1) << 26) >> 31 << 28) | (((u8)(sdram->emc_cmd_brlshft2) << 26 >> 29 << 25) | (((u8)(sdram->emc_cmd_brlshft2) << 22) & 0x1FFFFFF | ((32 * sdram->emc_pmacro_ib_ddll_long_dqs_rank0_1 >> 21 << 11) | (sdram->emc_pmacro_ib_ddll_long_dqs_rank0_1 & 0x7FF | (pmc->scratch160 >> 11 << 11)) & 0xFFC007FF) & 0xFE3FFFFF) & 0xF1FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch161 = (sdram->emc_pmacro_tx_sel_clk_src1 << 14 >> 31 << 31) | (2 * ((sdram->emc_pmacro_tx_sel_clk_src1 << 15 >> 31 << 30) | ((sdram->emc_pmacro_tx_sel_clk_src1 << 21 >> 31 << 29) | ((sdram->emc_pmacro_tx_sel_clk_src1 << 22 >> 31 << 28) | (((u8)(sdram->emc_cmd_brlshft3) << 26 >> 29 << 25) | (((u8)(sdram->emc_cmd_brlshft3) << 22) & 0x1FFFFFF | ((32 * sdram->emc_pmacro_ib_ddll_long_dqs_rank0_2 >> 21 << 11) | (sdram->emc_pmacro_ib_ddll_long_dqs_rank0_2 & 0x7FF | (pmc->scratch161 >> 11 << 11)) & 0xFFC007FF) & 0xFE3FFFFF) & 0xF1FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch162 = (sdram->emc_pmacro_tx_sel_clk_src1 << 10 >> 31 << 31) | (2 * ((sdram->emc_pmacro_tx_sel_clk_src1 << 11 >> 31 << 30) | ((sdram->emc_pmacro_tx_sel_clk_src1 << 12 >> 31 << 29) | ((sdram->emc_pmacro_tx_sel_clk_src1 << 13 >> 31 << 28) | (((u16)(sdram->emc_wev) << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ib_ddll_long_dqs_rank0_3 >> 21 << 11) | (sdram->emc_pmacro_ib_ddll_long_dqs_rank0_3 & 0x7FF | (pmc->scratch162 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch163 = (sdram->emc_pmacro_tx_sel_clk_src1 << 6 >> 31 << 31) | (2 * ((sdram->emc_pmacro_tx_sel_clk_src1 << 7 >> 31 << 30) | ((sdram->emc_pmacro_tx_sel_clk_src1 << 8 >> 31 << 29) | ((sdram->emc_pmacro_tx_sel_clk_src1 << 9 >> 31 << 28) | (((u16)(sdram->emc_wsv) << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ib_ddll_long_dqs_rank1_0 >> 21 << 11) | (sdram->emc_pmacro_ib_ddll_long_dqs_rank1_0 & 0x7FF | (pmc->scratch163 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch164 = (((u16)(sdram->emc_pmacro_tx_sel_clk_src3) << 29) >> 31 << 31) | (2 * ((((u16)(sdram->emc_pmacro_tx_sel_clk_src3) << 30) >> 31 << 30) | ((((u16)(sdram->emc_pmacro_tx_sel_clk_src3) << 31) >> 2) | ((32 * sdram->emc_pmacro_tx_sel_clk_src1 >> 31 << 28) | (((u8)(sdram->emc_cfg3) << 25 >> 29 << 25) | (((u8)(sdram->emc_cfg3) << 22) & 0x1FFFFFF | ((32 * sdram->emc_pmacro_ib_ddll_long_dqs_rank1_1 >> 21 << 11) | (sdram->emc_pmacro_ib_ddll_long_dqs_rank1_1 & 0x7FF | (pmc->scratch164 >> 11 << 11)) & 0xFFC007FF) & 0xFE3FFFFF) & 0xF1FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch165 = (((u16)(sdram->emc_pmacro_tx_sel_clk_src3) << 25) >> 31 << 31) | (2 * ((((u16)(sdram->emc_pmacro_tx_sel_clk_src3) << 26) >> 31 << 30) | ((((u16)(sdram->emc_pmacro_tx_sel_clk_src3) << 27) >> 31 << 29) | ((((u16)(sdram->emc_pmacro_tx_sel_clk_src3) << 28) >> 31 << 28) | ((sdram->emc_puterm_width << 23) & 0xFFFFFFF | ((sdram->emc_puterm_width >> 31 << 22) | ((32 * sdram->emc_pmacro_ib_ddll_long_dqs_rank1_2 >> 21 << 11) | (sdram->emc_pmacro_ib_ddll_long_dqs_rank1_2 & 0x7FF | (pmc->scratch165 >> 11 << 11)) & 0xFFC007FF) & 0xFFBFFFFF) & 0xF07FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch166 = (((u16)(sdram->emc_pmacro_tx_sel_clk_src3) << 21) >> 31 << 31) | (2 * ((((u16)(sdram->emc_pmacro_tx_sel_clk_src3) << 22) >> 31 << 30) | ((((u16)(sdram->emc_pmacro_tx_sel_clk_src3) << 23) >> 31 << 29) | ((((u16)(sdram->emc_pmacro_tx_sel_clk_src3) << 24) >> 31 << 28) | ((sdram->mc_emem_arb_timing_rcd << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ib_ddll_long_dqs_rank1_3 >> 21 << 11) | (sdram->emc_pmacro_ib_ddll_long_dqs_rank1_3 & 0x7FF | (pmc->scratch166 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch167 = (sdram->emc_pmacro_tx_sel_clk_src3 << 12 >> 31 << 31) | (2 * ((sdram->emc_pmacro_tx_sel_clk_src3 << 13 >> 31 << 30) | ((sdram->emc_pmacro_tx_sel_clk_src3 << 14 >> 31 << 29) | ((sdram->emc_pmacro_tx_sel_clk_src3 << 15 >> 31 << 28) | (((u16)(sdram->mc_emem_arb_timing_ccdmw) << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ddll_long_cmd_0 >> 21 << 11) | (sdram->emc_pmacro_ddll_long_cmd_0 & 0x7FF | (pmc->scratch167 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch168 = (sdram->emc_pmacro_tx_sel_clk_src3 << 8 >> 31 << 31) | (2 * ((sdram->emc_pmacro_tx_sel_clk_src3 << 9 >> 31 << 30) | ((sdram->emc_pmacro_tx_sel_clk_src3 << 10 >> 31 << 29) | ((sdram->emc_pmacro_tx_sel_clk_src3 << 11 >> 31 << 28) | ((sdram->mc_emem_arb_override << 28 >> 31 << 27) | (((sdram->mc_emem_arb_override << 21 >> 31 << 25) | ((sdram->mc_emem_arb_override << 15 >> 31 << 24) | ((32 * sdram->mc_emem_arb_override >> 31 << 23) | ((16 * sdram->mc_emem_arb_override >> 31 << 22) | ((32 * sdram->emc_pmacro_ddll_long_cmd_1 >> 21 << 11) | (sdram->emc_pmacro_ddll_long_cmd_1 & 0x7FF | (pmc->scratch168 >> 11 << 11)) & 0xFFC007FF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF | (sdram->mc_emem_arb_override << 27 >> 31 << 26)) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch169 = ((u16)(sdram->emc_rext) << 27) | (((u16)(sdram->emc_rrd) << 22) | ((32 * sdram->emc_pmacro_ddll_long_cmd_2 >> 21 << 11) | (sdram->emc_pmacro_ddll_long_cmd_2 & 0x7FF | (pmc->scratch169 >> 11 << 11)) & 0xFFC007FF) & 0xF83FFFFF) & 0x7FFFFFF; - pmc->scratch170 = ((u16)(sdram->emc_wext) << 27) | ((sdram->emc_tclkstop << 22) | ((32 * sdram->emc_pmacro_ddll_long_cmd_3 >> 21 << 11) | (sdram->emc_pmacro_ddll_long_cmd_3 & 0x7FF | (pmc->scratch170 >> 11 << 11)) & 0xFFC007FF) & 0xF83FFFFF) & 0x7FFFFFF; - tmp = (32 * sdram->emc_pmacro_perbit_fgcg_ctrl0 >> 31 << 21) | ((sdram->emc_pmacro_perbit_fgcg_ctrl0 << 6 >> 31 << 20) | ((sdram->emc_pmacro_perbit_fgcg_ctrl0 << 7 >> 31 << 19) | ((sdram->emc_pmacro_perbit_fgcg_ctrl0 << 8 >> 31 << 18) | ((sdram->emc_pmacro_perbit_fgcg_ctrl0 << 9 >> 31 << 17) | ((sdram->emc_pmacro_perbit_fgcg_ctrl0 << 10 >> 31 << 16) | ((sdram->emc_pmacro_perbit_fgcg_ctrl0 << 11 >> 31 << 15) | ((sdram->emc_pmacro_perbit_fgcg_ctrl0 << 12 >> 31 << 14) | ((sdram->emc_pmacro_perbit_fgcg_ctrl0 << 13 >> 31 << 13) | ((sdram->emc_pmacro_perbit_fgcg_ctrl0 << 14 >> 31 << 12) | ((sdram->emc_pmacro_perbit_fgcg_ctrl0 << 15 >> 31 << 11) | ((sdram->emc_pmacro_perbit_fgcg_ctrl0 << 21 >> 31 << 10) | ((sdram->emc_pmacro_perbit_fgcg_ctrl0 << 22 >> 31 << 9) | ((sdram->emc_pmacro_perbit_fgcg_ctrl0 << 23 >> 31 << 8) | ((sdram->emc_pmacro_perbit_fgcg_ctrl0 << 24 >> 31 << 7) | ((sdram->emc_pmacro_perbit_fgcg_ctrl0 << 25 >> 31 << 6) | (32 * (sdram->emc_pmacro_perbit_fgcg_ctrl0 << 26 >> 31) | (16 * (sdram->emc_pmacro_perbit_fgcg_ctrl0 << 27 >> 31) | (8 * (sdram->emc_pmacro_perbit_fgcg_ctrl0 << 28 >> 31) | (4 * (sdram->emc_pmacro_perbit_fgcg_ctrl0 << 29 >> 31) | (2 * (sdram->emc_pmacro_perbit_fgcg_ctrl0 << 30 >> 31) | (sdram->emc_pmacro_perbit_fgcg_ctrl0 & 1 | 2 * (pmc->scratch171 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF; - pmc->scratch171 = (sdram->emc_we_duration << 27) | ((sdram->emc_ref_ctrl2 >> 31 << 26) | ((32 * sdram->emc_ref_ctrl2 >> 29 << 23) | ((sdram->emc_ref_ctrl2 << 22) & 0x7FFFFF | tmp & 0xFFBFFFFF) & 0xFC7FFFFF) & 0xFBFFFFFF) & 0x7FFFFFF; - tmp = (sdram->emc_pmacro_pad_cfg_ctrl << 22 >> 31 << 28) | ((sdram->emc_pmacro_pad_cfg_ctrl << 27) & 0xFFFFFFF | ((sdram->emc_ws_duration << 22) & 0x7FFFFFF | ((32 * sdram->emc_pmacro_perbit_fgcg_ctrl1 >> 31 << 21) | ((sdram->emc_pmacro_perbit_fgcg_ctrl1 << 6 >> 31 << 20) | ((sdram->emc_pmacro_perbit_fgcg_ctrl1 << 7 >> 31 << 19) | ((sdram->emc_pmacro_perbit_fgcg_ctrl1 << 8 >> 31 << 18) | ((sdram->emc_pmacro_perbit_fgcg_ctrl1 << 9 >> 31 << 17) | ((sdram->emc_pmacro_perbit_fgcg_ctrl1 << 10 >> 31 << 16) | ((sdram->emc_pmacro_perbit_fgcg_ctrl1 << 11 >> 31 << 15) | ((sdram->emc_pmacro_perbit_fgcg_ctrl1 << 12 >> 31 << 14) | ((sdram->emc_pmacro_perbit_fgcg_ctrl1 << 13 >> 31 << 13) | ((sdram->emc_pmacro_perbit_fgcg_ctrl1 << 14 >> 31 << 12) | ((sdram->emc_pmacro_perbit_fgcg_ctrl1 << 15 >> 31 << 11) | ((sdram->emc_pmacro_perbit_fgcg_ctrl1 << 21 >> 31 << 10) | ((sdram->emc_pmacro_perbit_fgcg_ctrl1 << 22 >> 31 << 9) | ((sdram->emc_pmacro_perbit_fgcg_ctrl1 << 23 >> 31 << 8) | ((sdram->emc_pmacro_perbit_fgcg_ctrl1 << 24 >> 31 << 7) | ((sdram->emc_pmacro_perbit_fgcg_ctrl1 << 25 >> 31 << 6) | (32 * (sdram->emc_pmacro_perbit_fgcg_ctrl1 << 26 >> 31) | (16 * (sdram->emc_pmacro_perbit_fgcg_ctrl1 << 27 >> 31) | (8 * (sdram->emc_pmacro_perbit_fgcg_ctrl1 << 28 >> 31) | (4 * (sdram->emc_pmacro_perbit_fgcg_ctrl1 << 29 >> 31) | (2 * (sdram->emc_pmacro_perbit_fgcg_ctrl1 << 30 >> 31) | (sdram->emc_pmacro_perbit_fgcg_ctrl1 & 1 | 2 * (pmc->scratch172 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xF83FFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF; - pmc->scratch172 = (sdram->emc_pmacro_pad_cfg_ctrl << 14 >> 30 << 30) | (4 * ((sdram->emc_pmacro_pad_cfg_ctrl << 18 >> 31 << 29) | tmp & 0xDFFFFFFF) >> 2); - pmc->scratch173 = ((u8)(sdram->mc_emem_arb_timing_r2r) << 27) | ((sdram->mc_emem_arb_timing_rrd << 22) | ((32 * sdram->emc_pmacro_perbit_fgcg_ctrl2 >> 31 << 21) | ((sdram->emc_pmacro_perbit_fgcg_ctrl2 << 6 >> 31 << 20) | ((sdram->emc_pmacro_perbit_fgcg_ctrl2 << 7 >> 31 << 19) | ((sdram->emc_pmacro_perbit_fgcg_ctrl2 << 8 >> 31 << 18) | ((sdram->emc_pmacro_perbit_fgcg_ctrl2 << 9 >> 31 << 17) | ((sdram->emc_pmacro_perbit_fgcg_ctrl2 << 10 >> 31 << 16) | ((sdram->emc_pmacro_perbit_fgcg_ctrl2 << 11 >> 31 << 15) | ((sdram->emc_pmacro_perbit_fgcg_ctrl2 << 12 >> 31 << 14) | ((sdram->emc_pmacro_perbit_fgcg_ctrl2 << 13 >> 31 << 13) | ((sdram->emc_pmacro_perbit_fgcg_ctrl2 << 14 >> 31 << 12) | ((sdram->emc_pmacro_perbit_fgcg_ctrl2 << 15 >> 31 << 11) | ((sdram->emc_pmacro_perbit_fgcg_ctrl2 << 21 >> 31 << 10) | ((sdram->emc_pmacro_perbit_fgcg_ctrl2 << 22 >> 31 << 9) | ((sdram->emc_pmacro_perbit_fgcg_ctrl2 << 23 >> 31 << 8) | ((sdram->emc_pmacro_perbit_fgcg_ctrl2 << 24 >> 31 << 7) | ((sdram->emc_pmacro_perbit_fgcg_ctrl2 << 25 >> 31 << 6) | (32 * (sdram->emc_pmacro_perbit_fgcg_ctrl2 << 26 >> 31) | (16 * (sdram->emc_pmacro_perbit_fgcg_ctrl2 << 27 >> 31) | (8 * (sdram->emc_pmacro_perbit_fgcg_ctrl2 << 28 >> 31) | (4 * (sdram->emc_pmacro_perbit_fgcg_ctrl2 << 29 >> 31) | (2 * (sdram->emc_pmacro_perbit_fgcg_ctrl2 << 30 >> 31) | (sdram->emc_pmacro_perbit_fgcg_ctrl2 & 1 | 2 * (pmc->scratch173 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xF83FFFFF) & 0x7FFFFFF; - tmp = 32 * (sdram->emc_pmacro_perbit_fgcg_ctrl3 << 26 >> 31) | (16 * (sdram->emc_pmacro_perbit_fgcg_ctrl3 << 27 >> 31) | (8 * (sdram->emc_pmacro_perbit_fgcg_ctrl3 << 28 >> 31) | (4 * (sdram->emc_pmacro_perbit_fgcg_ctrl3 << 29 >> 31) | (2 * (sdram->emc_pmacro_perbit_fgcg_ctrl3 << 30 >> 31) | (sdram->emc_pmacro_perbit_fgcg_ctrl3 & 1 | 2 * (pmc->scratch174 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF; - pmc->scratch174 = ((u16)(sdram->emc_pmacro_tx_sel_clk_src2) << 30 >> 31 << 31) | (2 * (((u16)(sdram->emc_pmacro_tx_sel_clk_src2) << 30) | ((32 * sdram->emc_pmacro_tx_sel_clk_src3 >> 31 << 29) | ((sdram->emc_pmacro_tx_sel_clk_src3 << 6 >> 31 << 28) | ((sdram->emc_pmacro_tx_sel_clk_src3 << 7 >> 31 << 27) | (((u8)(sdram->mc_emem_arb_timing_w2w) << 22) & 0x7FFFFFF | ((32 * sdram->emc_pmacro_perbit_fgcg_ctrl3 >> 31 << 21) | ((sdram->emc_pmacro_perbit_fgcg_ctrl3 << 6 >> 31 << 20) | ((sdram->emc_pmacro_perbit_fgcg_ctrl3 << 7 >> 31 << 19) | ((sdram->emc_pmacro_perbit_fgcg_ctrl3 << 8 >> 31 << 18) | ((sdram->emc_pmacro_perbit_fgcg_ctrl3 << 9 >> 31 << 17) | ((sdram->emc_pmacro_perbit_fgcg_ctrl3 << 10 >> 31 << 16) | ((sdram->emc_pmacro_perbit_fgcg_ctrl3 << 11 >> 31 << 15) | ((sdram->emc_pmacro_perbit_fgcg_ctrl3 << 12 >> 31 << 14) | ((sdram->emc_pmacro_perbit_fgcg_ctrl3 << 13 >> 31 << 13) | ((sdram->emc_pmacro_perbit_fgcg_ctrl3 << 14 >> 31 << 12) | ((sdram->emc_pmacro_perbit_fgcg_ctrl3 << 15 >> 31 << 11) | ((sdram->emc_pmacro_perbit_fgcg_ctrl3 << 21 >> 31 << 10) | ((sdram->emc_pmacro_perbit_fgcg_ctrl3 << 22 >> 31 << 9) | ((sdram->emc_pmacro_perbit_fgcg_ctrl3 << 23 >> 31 << 8) | ((sdram->emc_pmacro_perbit_fgcg_ctrl3 << 24 >> 31 << 7) | ((sdram->emc_pmacro_perbit_fgcg_ctrl3 << 25 >> 31 << 6) | tmp & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xF83FFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - tmp = (sdram->emc_pmacro_tx_sel_clk_src2 << 28 >> 31 << 23) | ((sdram->emc_pmacro_tx_sel_clk_src2 << 29 >> 31 << 22) | ((32 * sdram->emc_pmacro_perbit_fgcg_ctrl4 >> 31 << 21) | ((sdram->emc_pmacro_perbit_fgcg_ctrl4 << 6 >> 31 << 20) | ((sdram->emc_pmacro_perbit_fgcg_ctrl4 << 7 >> 31 << 19) | ((sdram->emc_pmacro_perbit_fgcg_ctrl4 << 8 >> 31 << 18) | ((sdram->emc_pmacro_perbit_fgcg_ctrl4 << 9 >> 31 << 17) | ((sdram->emc_pmacro_perbit_fgcg_ctrl4 << 10 >> 31 << 16) | ((sdram->emc_pmacro_perbit_fgcg_ctrl4 << 11 >> 31 << 15) | ((sdram->emc_pmacro_perbit_fgcg_ctrl4 << 12 >> 31 << 14) | ((sdram->emc_pmacro_perbit_fgcg_ctrl4 << 13 >> 31 << 13) | ((sdram->emc_pmacro_perbit_fgcg_ctrl4 << 14 >> 31 << 12) | ((sdram->emc_pmacro_perbit_fgcg_ctrl4 << 15 >> 31 << 11) | ((sdram->emc_pmacro_perbit_fgcg_ctrl4 << 21 >> 31 << 10) | ((sdram->emc_pmacro_perbit_fgcg_ctrl4 << 22 >> 31 << 9) | ((sdram->emc_pmacro_perbit_fgcg_ctrl4 << 23 >> 31 << 8) | ((sdram->emc_pmacro_perbit_fgcg_ctrl4 << 24 >> 31 << 7) | ((sdram->emc_pmacro_perbit_fgcg_ctrl4 << 25 >> 31 << 6) | (32 * (sdram->emc_pmacro_perbit_fgcg_ctrl4 << 26 >> 31) | (16 * (sdram->emc_pmacro_perbit_fgcg_ctrl4 << 27 >> 31) | (8 * (sdram->emc_pmacro_perbit_fgcg_ctrl4 << 28 >> 31) | (4 * (sdram->emc_pmacro_perbit_fgcg_ctrl4 << 29 >> 31) | (2 * (sdram->emc_pmacro_perbit_fgcg_ctrl4 << 30 >> 31) | (sdram->emc_pmacro_perbit_fgcg_ctrl4 & 1 | 2 * (pmc->scratch175 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF; - pmc->scratch175 = (sdram->emc_pmacro_tx_sel_clk_src2 << 15 >> 31 << 31) | (2 * ((sdram->emc_pmacro_tx_sel_clk_src2 << 21 >> 31 << 30) | ((sdram->emc_pmacro_tx_sel_clk_src2 << 22 >> 31 << 29) | ((sdram->emc_pmacro_tx_sel_clk_src2 << 23 >> 31 << 28) | ((sdram->emc_pmacro_tx_sel_clk_src2 << 24 >> 31 << 27) | ((sdram->emc_pmacro_tx_sel_clk_src2 << 25 >> 31 << 26) | ((sdram->emc_pmacro_tx_sel_clk_src2 << 26 >> 31 << 25) | ((sdram->emc_pmacro_tx_sel_clk_src2 << 27 >> 31 << 24) | tmp & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - tmp = (sdram->emc_pmacro_tx_sel_clk_src2 << 12 >> 31 << 24) | ((sdram->emc_pmacro_tx_sel_clk_src2 << 13 >> 31 << 23) | ((sdram->emc_pmacro_tx_sel_clk_src2 << 14 >> 31 << 22) | ((32 * sdram->emc_pmacro_perbit_fgcg_ctrl5 >> 31 << 21) | ((sdram->emc_pmacro_perbit_fgcg_ctrl5 << 6 >> 31 << 20) | ((sdram->emc_pmacro_perbit_fgcg_ctrl5 << 7 >> 31 << 19) | ((sdram->emc_pmacro_perbit_fgcg_ctrl5 << 8 >> 31 << 18) | ((sdram->emc_pmacro_perbit_fgcg_ctrl5 << 9 >> 31 << 17) | ((sdram->emc_pmacro_perbit_fgcg_ctrl5 << 10 >> 31 << 16) | ((sdram->emc_pmacro_perbit_fgcg_ctrl5 << 11 >> 31 << 15) | ((sdram->emc_pmacro_perbit_fgcg_ctrl5 << 12 >> 31 << 14) | ((sdram->emc_pmacro_perbit_fgcg_ctrl5 << 13 >> 31 << 13) | ((sdram->emc_pmacro_perbit_fgcg_ctrl5 << 14 >> 31 << 12) | ((sdram->emc_pmacro_perbit_fgcg_ctrl5 << 15 >> 31 << 11) | ((sdram->emc_pmacro_perbit_fgcg_ctrl5 << 21 >> 31 << 10) | ((sdram->emc_pmacro_perbit_fgcg_ctrl5 << 22 >> 31 << 9) | ((sdram->emc_pmacro_perbit_fgcg_ctrl5 << 23 >> 31 << 8) | ((sdram->emc_pmacro_perbit_fgcg_ctrl5 << 24 >> 31 << 7) | ((sdram->emc_pmacro_perbit_fgcg_ctrl5 << 25 >> 31 << 6) | (32 * (sdram->emc_pmacro_perbit_fgcg_ctrl5 << 26 >> 31) | (16 * (sdram->emc_pmacro_perbit_fgcg_ctrl5 << 27 >> 31) | (8 * (sdram->emc_pmacro_perbit_fgcg_ctrl5 << 28 >> 31) | (4 * (sdram->emc_pmacro_perbit_fgcg_ctrl5 << 29 >> 31) | (2 * (sdram->emc_pmacro_perbit_fgcg_ctrl5 << 30 >> 31) | (sdram->emc_pmacro_perbit_fgcg_ctrl5 & 1 | 2 * (pmc->scratch176 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF; - pmc->scratch176 = (32 * sdram->emc_pmacro_tx_sel_clk_src2 >> 31 << 31) | (2 * ((sdram->emc_pmacro_tx_sel_clk_src2 << 6 >> 31 << 30) | ((sdram->emc_pmacro_tx_sel_clk_src2 << 7 >> 31 << 29) | ((sdram->emc_pmacro_tx_sel_clk_src2 << 8 >> 31 << 28) | ((sdram->emc_pmacro_tx_sel_clk_src2 << 9 >> 31 << 27) | ((sdram->emc_pmacro_tx_sel_clk_src2 << 10 >> 31 << 26) | ((sdram->emc_pmacro_tx_sel_clk_src2 << 11 >> 31 << 25) | tmp & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch177 = (sdram->emc_pmacro_tx_sel_clk_src4 << 22 >> 31 << 31) | (2 * ((sdram->emc_pmacro_tx_sel_clk_src4 << 23 >> 31 << 30) | ((sdram->emc_pmacro_tx_sel_clk_src4 << 24 >> 31 << 29) | ((sdram->emc_pmacro_tx_sel_clk_src4 << 25 >> 31 << 28) | ((sdram->emc_pmacro_tx_sel_clk_src4 << 26 >> 31 << 27) | ((sdram->emc_pmacro_tx_sel_clk_src4 << 27 >> 31 << 26) | ((sdram->emc_pmacro_tx_sel_clk_src4 << 28 >> 31 << 25) | ((sdram->emc_pmacro_tx_sel_clk_src4 << 29 >> 31 << 24) | ((sdram->emc_pmacro_tx_sel_clk_src4 << 30 >> 31 << 23) | ((sdram->emc_pmacro_tx_sel_clk_src4 << 22) & 0x7FFFFF | ((sdram->mc_emem_arb_cfg >> 28 << 18) | ((16 * sdram->mc_emem_arb_cfg >> 28 << 14) | ((sdram->mc_emem_arb_cfg << 11 >> 27 << 9) | (sdram->mc_emem_arb_cfg & 0x1FF | (pmc->scratch177 >> 9 << 9)) & 0xFFFFC1FF) & 0xFFFC3FFF) & 0xFFC3FFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch178 = (sdram->emc_pmacro_tx_sel_clk_src4 << 7 >> 31 << 31) | (2 * ((sdram->emc_pmacro_tx_sel_clk_src4 << 8 >> 31 << 30) | ((sdram->emc_pmacro_tx_sel_clk_src4 << 9 >> 31 << 29) | ((sdram->emc_pmacro_tx_sel_clk_src4 << 10 >> 31 << 28) | ((sdram->emc_pmacro_tx_sel_clk_src4 << 11 >> 31 << 27) | ((sdram->emc_pmacro_tx_sel_clk_src4 << 12 >> 31 << 26) | ((sdram->emc_pmacro_tx_sel_clk_src4 << 13 >> 31 << 25) | ((sdram->emc_pmacro_tx_sel_clk_src4 << 14 >> 31 << 24) | ((sdram->emc_pmacro_tx_sel_clk_src4 << 15 >> 31 << 23) | ((sdram->emc_pmacro_tx_sel_clk_src4 << 21 >> 31 << 22) | ((sdram->mc_emem_arb_misc1 >> 28 << 18) | ((sdram->mc_emem_arb_misc1 << 6 >> 30 << 16) | ((sdram->mc_emem_arb_misc1 << 8 >> 29 << 13) | (16 * (sdram->mc_emem_arb_misc1 << 19 >> 23) | (8 * (sdram->mc_emem_arb_misc1 << 28 >> 31) | (4 * (sdram->mc_emem_arb_misc1 << 29 >> 31) | (2 * (sdram->mc_emem_arb_misc1 << 30 >> 31) | (sdram->mc_emem_arb_misc1 & 1 | 2 * (pmc->scratch178 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFE00F) & 0xFFFF1FFF) & 0xFFFCFFFF) & 0xFFC3FFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch179 = (sdram->emc_odt_write >> 31 << 31) | (2 * ((sdram->emc_odt_write << 20 >> 28 << 27) | ((sdram->emc_odt_write << 26 >> 31 << 26) | ((sdram->emc_odt_write << 27 >> 31 << 25) | ((sdram->emc_odt_write << 21) & 0x1FFFFFF | ((32 * sdram->emc_mrs_wait_cnt2 >> 21 << 10) | (sdram->emc_mrs_wait_cnt2 & 0x3FF | (pmc->scratch179 >> 10 << 10)) & 0xFFE003FF) & 0xFE1FFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0x87FFFFFF) >> 1); - pmc->scratch180 = (sdram->emc_pmacro_ib_rxrt << 21) | ((32 * sdram->emc_mrs_wait_cnt >> 21 << 10) | (sdram->emc_mrs_wait_cnt & 0x3FF | (pmc->scratch180 >> 10 << 10)) & 0xFFE003FF) & 0x1FFFFF; - pmc->scratch181 = ((u16)(sdram->emc_pmacro_ddll_long_cmd_4) << 21) | sdram->emc_auto_cal_interval & 0x1FFFFF; - pmc->scratch182 = (sdram->mc_emem_arb_outstanding_req >> 31 << 31) | (2 * ((2 * sdram->mc_emem_arb_outstanding_req >> 31 << 30) | ((sdram->mc_emem_arb_outstanding_req << 23 >> 2) | ((sdram->emc_emem_arb_refpb_hp_ctrl << 9 >> 25 << 14) | ((sdram->emc_emem_arb_refpb_hp_ctrl << 17 >> 25 << 7) | (sdram->emc_emem_arb_refpb_hp_ctrl & 0x7F | (pmc->scratch182 >> 7 << 7)) & 0xFFFFC07F) & 0xFFE03FFF) & 0xC01FFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch183 = (4 * sdram->emc_pmacro_cmd_ctrl0 >> 31 << 31) | (2 * ((8 * sdram->emc_pmacro_cmd_ctrl0 >> 31 << 30) | ((sdram->emc_pmacro_cmd_ctrl0 << 7 >> 31 << 29) | ((sdram->emc_pmacro_cmd_ctrl0 << 10 >> 31 << 28) | ((sdram->emc_pmacro_cmd_ctrl0 << 11 >> 31 << 27) | ((sdram->emc_pmacro_cmd_ctrl0 << 15 >> 31 << 26) | ((sdram->emc_pmacro_cmd_ctrl0 << 18 >> 31 << 25) | ((sdram->emc_pmacro_cmd_ctrl0 << 19 >> 31 << 24) | ((sdram->emc_pmacro_cmd_ctrl0 << 23 >> 31 << 23) | ((sdram->emc_pmacro_cmd_ctrl0 << 26 >> 31 << 22) | ((sdram->emc_pmacro_cmd_ctrl0 << 27 >> 31 << 21) | ((sdram->emc_pmacro_cmd_ctrl0 << 20) & 0x1FFFFF | ((4 * sdram->emc_xm2_comp_pad_ctrl2 >> 26 << 14) | ((sdram->emc_xm2_comp_pad_ctrl2 << 10 >> 30 << 12) | ((sdram->emc_xm2_comp_pad_ctrl2 << 14 >> 31 << 11) | ((sdram->emc_xm2_comp_pad_ctrl2 << 15 >> 31 << 10) | ((sdram->emc_xm2_comp_pad_ctrl2 << 16 >> 30 << 8) | ((sdram->emc_xm2_comp_pad_ctrl2 << 18 >> 30 << 6) | (4 * (sdram->emc_xm2_comp_pad_ctrl2 << 26 >> 28) | (sdram->emc_xm2_comp_pad_ctrl2 & 3 | 4 * (pmc->scratch183 >> 2)) & 0xFFFFFFC3) & 0xFFFFFF3F) & 0xFFFFFCFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFCFFF) & 0xFFF03FFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch184 = (4 * sdram->emc_pmacro_cmd_ctrl1 >> 31 << 31) | (2 * ((8 * sdram->emc_pmacro_cmd_ctrl1 >> 31 << 30) | ((sdram->emc_pmacro_cmd_ctrl1 << 7 >> 31 << 29) | ((sdram->emc_pmacro_cmd_ctrl1 << 10 >> 31 << 28) | ((sdram->emc_pmacro_cmd_ctrl1 << 11 >> 31 << 27) | ((sdram->emc_pmacro_cmd_ctrl1 << 15 >> 31 << 26) | ((sdram->emc_pmacro_cmd_ctrl1 << 18 >> 31 << 25) | ((sdram->emc_pmacro_cmd_ctrl1 << 19 >> 31 << 24) | ((sdram->emc_pmacro_cmd_ctrl1 << 23 >> 31 << 23) | ((sdram->emc_pmacro_cmd_ctrl1 << 26 >> 31 << 22) | ((sdram->emc_pmacro_cmd_ctrl1 << 27 >> 31 << 21) | ((sdram->emc_pmacro_cmd_ctrl1 << 20) & 0x1FFFFF | ((sdram->emc_cfg_dig_dll_1 << 12 >> 28 << 16) | ((sdram->emc_cfg_dig_dll_1 << 16 >> 28 << 12) | ((sdram->emc_cfg_dig_dll_1 << 20 >> 26 << 6) | (2 * (sdram->emc_cfg_dig_dll_1 << 26 >> 27) | (sdram->emc_cfg_dig_dll_1 & 1 | 2 * (pmc->scratch184 >> 1)) & 0xFFFFFFC1) & 0xFFFFF03F) & 0xFFFF0FFF) & 0xFFF0FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch185 = (4 * sdram->emc_pmacro_cmd_ctrl2 >> 31 << 31) | (2 * ((8 * sdram->emc_pmacro_cmd_ctrl2 >> 31 << 30) | ((sdram->emc_pmacro_cmd_ctrl2 << 7 >> 31 << 29) | ((sdram->emc_pmacro_cmd_ctrl2 << 10 >> 31 << 28) | ((sdram->emc_pmacro_cmd_ctrl2 << 11 >> 31 << 27) | ((sdram->emc_pmacro_cmd_ctrl2 << 15 >> 31 << 26) | ((sdram->emc_pmacro_cmd_ctrl2 << 18 >> 31 << 25) | ((sdram->emc_pmacro_cmd_ctrl2 << 19 >> 31 << 24) | ((sdram->emc_pmacro_cmd_ctrl2 << 23 >> 31 << 23) | ((sdram->emc_pmacro_cmd_ctrl2 << 26 >> 31 << 22) | ((sdram->emc_pmacro_cmd_ctrl2 << 27 >> 31 << 21) | ((sdram->emc_pmacro_cmd_ctrl2 << 20) & 0x1FFFFF | ((sdram->emc_quse_brlshft0 << 12 >> 27 << 15) | ((sdram->emc_quse_brlshft0 << 17 >> 27 << 10) | (32 * (sdram->emc_quse_brlshft0 << 22 >> 27) | (sdram->emc_quse_brlshft0 & 0x1F | 32 * (pmc->scratch185 >> 5)) & 0xFFFFFC1F) & 0xFFFF83FF) & 0xFFF07FFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch186 = (sdram->emc_pmacro_dsr_vttgen_ctrl0 >> 8 << 24) | ((sdram->emc_pmacro_dsr_vttgen_ctrl0 << 20) | ((sdram->emc_quse_brlshft1 << 12 >> 27 << 15) | ((sdram->emc_quse_brlshft1 << 17 >> 27 << 10) | (32 * (sdram->emc_quse_brlshft1 << 22 >> 27) | (sdram->emc_quse_brlshft1 & 0x1F | 32 * (pmc->scratch186 >> 5)) & 0xFFFFFC1F) & 0xFFFF83FF) & 0xFFF07FFF) & 0xFF0FFFFF) & 0xFFFFFF; - pmc->scratch187 = (sdram->emc_pmacro_perbit_rfu1_ctrl0 << 10 >> 30 << 30) | (4 * ((sdram->emc_pmacro_perbit_rfu1_ctrl0 << 12 >> 30 << 28) | ((sdram->emc_pmacro_perbit_rfu1_ctrl0 << 14 >> 30 << 26) | ((sdram->emc_pmacro_perbit_rfu1_ctrl0 << 26 >> 30 << 24) | ((sdram->emc_pmacro_perbit_rfu1_ctrl0 << 28 >> 30 << 22) | ((sdram->emc_pmacro_perbit_rfu1_ctrl0 << 20) & 0x3FFFFF | ((sdram->emc_quse_brlshft2 << 12 >> 27 << 15) | ((sdram->emc_quse_brlshft2 << 17 >> 27 << 10) | (32 * (sdram->emc_quse_brlshft2 << 22 >> 27) | (sdram->emc_quse_brlshft2 & 0x1F | 32 * (pmc->scratch187 >> 5)) & 0xFFFFFC1F) & 0xFFFF83FF) & 0xFFF07FFF) & 0xFFCFFFFF) & 0xFF3FFFFF) & 0xFCFFFFFF) & 0xF3FFFFFF) & 0xCFFFFFFF) >> 2); - pmc->scratch188 = (sdram->emc_pmacro_perbit_rfu1_ctrl1 << 10 >> 30 << 30) | (4 * ((sdram->emc_pmacro_perbit_rfu1_ctrl1 << 12 >> 30 << 28) | ((sdram->emc_pmacro_perbit_rfu1_ctrl1 << 14 >> 30 << 26) | ((sdram->emc_pmacro_perbit_rfu1_ctrl1 << 26 >> 30 << 24) | ((sdram->emc_pmacro_perbit_rfu1_ctrl1 << 28 >> 30 << 22) | ((sdram->emc_pmacro_perbit_rfu1_ctrl1 << 20) & 0x3FFFFF | ((sdram->emc_quse_brlshft3 << 12 >> 27 << 15) | ((sdram->emc_quse_brlshft3 << 17 >> 27 << 10) | (32 * (sdram->emc_quse_brlshft3 << 22 >> 27) | (sdram->emc_quse_brlshft3 & 0x1F | 32 * (pmc->scratch188 >> 5)) & 0xFFFFFC1F) & 0xFFFF83FF) & 0xFFF07FFF) & 0xFFCFFFFF) & 0xFF3FFFFF) & 0xFCFFFFFF) & 0xF3FFFFFF) & 0xCFFFFFFF) >> 2); - pmc->scratch189 = (sdram->emc_trefbw << 18) | ((sdram->emc_dbg >> 31 << 17) | ((2 * sdram->emc_dbg >> 31 << 16) | ((4 * sdram->emc_dbg >> 31 << 15) | ((8 * sdram->emc_dbg >> 31 << 14) | ((16 * sdram->emc_dbg >> 30 << 12) | ((sdram->emc_dbg << 6 >> 31 << 11) | ((sdram->emc_dbg << 7 >> 31 << 10) | ((sdram->emc_dbg << 18 >> 31 << 9) | ((sdram->emc_dbg << 19 >> 31 << 8) | ((sdram->emc_dbg << 20 >> 31 << 7) | ((sdram->emc_dbg << 21 >> 31 << 6) | (32 * (sdram->emc_dbg << 22 >> 31) | (16 * (sdram->emc_dbg << 27 >> 31) | (8 * (sdram->emc_dbg << 28 >> 31) | (4 * (sdram->emc_dbg << 29 >> 31) | (2 * (sdram->emc_dbg << 30 >> 31) | (sdram->emc_dbg & 1 | 2 * (pmc->scratch189 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFCFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0x3FFFF; - pmc->scratch191 = (sdram->emc_qpop << 9 >> 25 << 25) | ((sdram->emc_qpop << 18) | ((sdram->emc_zcal_wait_cnt >> 31 << 17) | ((sdram->emc_zcal_wait_cnt << 10 >> 26 << 11) | (sdram->emc_zcal_wait_cnt & 0x7FF | (pmc->scratch191 >> 11 << 11)) & 0xFFFE07FF) & 0xFFFDFFFF) & 0xFE03FFFF) & 0x1FFFFFF; - pmc->scratch192 = (sdram->emc_pmacro_tx_sel_clk_src4 << 6 >> 31 << 31) | (2 * ((sdram->emc_pmacro_auto_cal_common << 15 >> 31 << 30) | ((sdram->emc_pmacro_auto_cal_common << 18 >> 26 << 24) | ((sdram->emc_pmacro_auto_cal_common << 18) & 0xFFFFFF | ((sdram->emc_zcal_mrw_cmd >> 30 << 16) | ((sdram->emc_zcal_mrw_cmd << 8 >> 24 << 8) | (sdram->emc_zcal_mrw_cmd & 0xFF | (pmc->scratch192 >> 8 << 8)) & 0xFFFF00FF) & 0xFFFCFFFF) & 0xFF03FFFF) & 0xC0FFFFFF) & 0xBFFFFFFF) >> 1); - tmp = (sdram->emc_dll_cfg1 << 7 >> 31 << 17) | ((sdram->emc_dll_cfg1 << 10 >> 31 << 16) | ((sdram->emc_dll_cfg1 << 11 >> 31 << 15) | ((sdram->emc_dll_cfg1 << 14 >> 30 << 13) | ((sdram->emc_dll_cfg1 << 18 >> 31 << 12) | ((sdram->emc_dll_cfg1 << 19 >> 31 << 11) | ((pmc->scratch193 >> 11 << 11) | sdram->emc_dll_cfg1 & 0x7FF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFF9FFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF; - pmc->scratch193 = (sdram->emc_pmacro_tx_sel_clk_src5 << 31) | (2 * ((32 * sdram->emc_pmacro_tx_sel_clk_src4 >> 31 << 30) | ((sdram->emc_pmacro_perbit_rfu1_ctrl2 << 10 >> 30 << 28) | (((sdram->emc_pmacro_perbit_rfu1_ctrl2 << 14 >> 30 << 24) | ((sdram->emc_pmacro_perbit_rfu1_ctrl2 << 26 >> 30 << 22) | ((sdram->emc_pmacro_perbit_rfu1_ctrl2 << 28 >> 30 << 20) | ((sdram->emc_pmacro_perbit_rfu1_ctrl2 << 18) & 0xFFFFF | tmp & 0xFFF3FFFF) & 0xFFCFFFFF) & 0xFF3FFFFF) & 0xFCFFFFFF) & 0xF3FFFFFF | (sdram->emc_pmacro_perbit_rfu1_ctrl2 << 12 >> 30 << 26)) & 0xCFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch194 = (sdram->emc_pmacro_tx_sel_clk_src5 << 29 >> 31 << 31) | (2 * ((sdram->emc_pmacro_tx_sel_clk_src5 << 30 >> 31 << 30) | ((sdram->emc_pmacro_perbit_rfu1_ctrl3 << 10 >> 30 << 28) | (((sdram->emc_pmacro_perbit_rfu1_ctrl3 << 14 >> 30 << 24) | (((sdram->emc_pmacro_perbit_rfu1_ctrl3 << 28 >> 30 << 20) | ((sdram->emc_pmacro_perbit_rfu1_ctrl3 << 18) & 0xFFFFF | ((sdram->emc_pmacro_cmd_brick_ctrl_fdpd << 14 >> 30 << 16) | ((sdram->emc_pmacro_cmd_brick_ctrl_fdpd << 16 >> 30 << 14) | ((sdram->emc_pmacro_cmd_brick_ctrl_fdpd << 18 >> 30 << 12) | ((sdram->emc_pmacro_cmd_brick_ctrl_fdpd << 20 >> 30 << 10) | ((sdram->emc_pmacro_cmd_brick_ctrl_fdpd << 22 >> 30 << 8) | ((sdram->emc_pmacro_cmd_brick_ctrl_fdpd << 24 >> 30 << 6) | (16 * (sdram->emc_pmacro_cmd_brick_ctrl_fdpd << 26 >> 30) | (4 * (sdram->emc_pmacro_cmd_brick_ctrl_fdpd << 28 >> 30) | (sdram->emc_pmacro_cmd_brick_ctrl_fdpd & 3 | 4 * (pmc->scratch194 >> 2)) & 0xFFFFFFF3) & 0xFFFFFFCF) & 0xFFFFFF3F) & 0xFFFFFCFF) & 0xFFFFF3FF) & 0xFFFFCFFF) & 0xFFFF3FFF) & 0xFFFCFFFF) & 0xFFF3FFFF) & 0xFFCFFFFF) & 0xFF3FFFFF | (sdram->emc_pmacro_perbit_rfu1_ctrl3 << 26 >> 30 << 22)) & 0xFCFFFFFF) & 0xF3FFFFFF | (sdram->emc_pmacro_perbit_rfu1_ctrl3 << 12 >> 30 << 26)) & 0xCFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch195 = (sdram->emc_pmacro_tx_sel_clk_src5 << 27 >> 31 << 31) | (2 * ((sdram->emc_pmacro_tx_sel_clk_src5 << 28 >> 31 << 30) | ((sdram->emc_pmacro_perbit_rfu1_ctrl4 << 10 >> 30 << 28) | (((sdram->emc_pmacro_perbit_rfu1_ctrl4 << 14 >> 30 << 24) | ((sdram->emc_pmacro_perbit_rfu1_ctrl4 << 26 >> 30 << 22) | ((sdram->emc_pmacro_perbit_rfu1_ctrl4 << 28 >> 30 << 20) | ((sdram->emc_pmacro_perbit_rfu1_ctrl4 << 18) & 0xFFFFF | ((sdram->emc_pmacro_data_brick_ctrl_fdpd << 14 >> 30 << 16) | ((sdram->emc_pmacro_data_brick_ctrl_fdpd << 16 >> 30 << 14) | ((sdram->emc_pmacro_data_brick_ctrl_fdpd << 18 >> 30 << 12) | ((sdram->emc_pmacro_data_brick_ctrl_fdpd << 20 >> 30 << 10) | ((sdram->emc_pmacro_data_brick_ctrl_fdpd << 22 >> 30 << 8) | ((sdram->emc_pmacro_data_brick_ctrl_fdpd << 24 >> 30 << 6) | (16 * (sdram->emc_pmacro_data_brick_ctrl_fdpd << 26 >> 30) | (4 * (sdram->emc_pmacro_data_brick_ctrl_fdpd << 28 >> 30) | (sdram->emc_pmacro_data_brick_ctrl_fdpd & 3 | 4 * (pmc->scratch195 >> 2)) & 0xFFFFFFF3) & 0xFFFFFFCF) & 0xFFFFFF3F) & 0xFFFFFCFF) & 0xFFFFF3FF) & 0xFFFFCFFF) & 0xFFFF3FFF) & 0xFFFCFFFF) & 0xFFF3FFFF) & 0xFFCFFFFF) & 0xFF3FFFFF) & 0xFCFFFFFF) & 0xF3FFFFFF | (sdram->emc_pmacro_perbit_rfu1_ctrl4 << 12 >> 30 << 26)) & 0xCFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch196 = (sdram->emc_emem_arb_refpb_bank_ctrl >> 31 << 31) | (2 * ((sdram->emc_emem_arb_refpb_bank_ctrl << 17 >> 25 << 24) | ((sdram->emc_emem_arb_refpb_bank_ctrl << 17) & 0xFFFFFF | ((sdram->emc_dyn_self_ref_control >> 31 << 16) | (sdram->emc_dyn_self_ref_control & 0xFFFF | (pmc->scratch196 >> 16 << 16)) & 0xFFFEFFFF) & 0xFF01FFFF) & 0x80FFFFFF) >> 1); - pmc->scratch197 = (sdram->emc_pmacro_tx_sel_clk_src5 << 24 >> 31 << 31) | (2 * ((sdram->emc_pmacro_tx_sel_clk_src5 << 25 >> 31 << 30) | ((sdram->emc_pmacro_tx_sel_clk_src5 << 26 >> 31 << 29) | ((sdram->emc_pmacro_perbit_rfu1_ctrl5 << 10 >> 30 << 27) | (((sdram->emc_pmacro_perbit_rfu1_ctrl5 << 14 >> 30 << 23) | ((sdram->emc_pmacro_perbit_rfu1_ctrl5 << 26 >> 30 << 21) | ((sdram->emc_pmacro_perbit_rfu1_ctrl5 << 28 >> 30 << 19) | ((sdram->emc_pmacro_perbit_rfu1_ctrl5 << 17) & 0x7FFFF | ((16 * sdram->emc_pmacro_cmd_pad_rx_ctrl >> 28 << 13) | ((sdram->emc_pmacro_cmd_pad_rx_ctrl << 8 >> 31 << 12) | ((sdram->emc_pmacro_cmd_pad_rx_ctrl << 9 >> 31 << 11) | ((sdram->emc_pmacro_cmd_pad_rx_ctrl << 10 >> 31 << 10) | ((sdram->emc_pmacro_cmd_pad_rx_ctrl << 12 >> 28 << 6) | (32 * (sdram->emc_pmacro_cmd_pad_rx_ctrl << 16 >> 31) | (16 * (sdram->emc_pmacro_cmd_pad_rx_ctrl << 19 >> 31) | (4 * (sdram->emc_pmacro_cmd_pad_rx_ctrl << 26 >> 30) | (sdram->emc_pmacro_cmd_pad_rx_ctrl & 3 | 4 * (pmc->scratch197 >> 2)) & 0xFFFFFFF3) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFC3F) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFE1FFF) & 0xFFF9FFFF) & 0xFFE7FFFF) & 0xFF9FFFFF) & 0xFE7FFFFF) & 0xF9FFFFFF | (sdram->emc_pmacro_perbit_rfu1_ctrl5 << 12 >> 30 << 25)) & 0xE7FFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch198 = (sdram->emc_pmacro_cmd_pad_tx_ctrl << 31) | (2 * ((32 * sdram->emc_pmacro_tx_sel_clk_src5 >> 31 << 30) | ((sdram->emc_pmacro_tx_sel_clk_src5 << 6 >> 31 << 29) | ((sdram->emc_pmacro_tx_sel_clk_src5 << 7 >> 31 << 28) | ((sdram->emc_pmacro_tx_sel_clk_src5 << 8 >> 31 << 27) | ((sdram->emc_pmacro_tx_sel_clk_src5 << 9 >> 31 << 26) | ((sdram->emc_pmacro_tx_sel_clk_src5 << 10 >> 31 << 25) | ((sdram->emc_pmacro_tx_sel_clk_src5 << 11 >> 31 << 24) | ((sdram->emc_pmacro_tx_sel_clk_src5 << 12 >> 31 << 23) | ((sdram->emc_pmacro_tx_sel_clk_src5 << 13 >> 31 << 22) | ((sdram->emc_pmacro_tx_sel_clk_src5 << 14 >> 31 << 21) | ((sdram->emc_pmacro_tx_sel_clk_src5 << 15 >> 31 << 20) | ((sdram->emc_pmacro_tx_sel_clk_src5 << 21 >> 31 << 19) | ((sdram->emc_pmacro_tx_sel_clk_src5 << 22 >> 31 << 18) | ((sdram->emc_pmacro_tx_sel_clk_src5 << 23 >> 31 << 17) | ((16 * sdram->emc_pmacro_data_pad_rx_ctrl >> 28 << 13) | ((sdram->emc_pmacro_data_pad_rx_ctrl << 8 >> 31 << 12) | ((sdram->emc_pmacro_data_pad_rx_ctrl << 9 >> 31 << 11) | ((sdram->emc_pmacro_data_pad_rx_ctrl << 10 >> 31 << 10) | ((sdram->emc_pmacro_data_pad_rx_ctrl << 12 >> 28 << 6) | (32 * (sdram->emc_pmacro_data_pad_rx_ctrl << 16 >> 31) | (16 * (sdram->emc_pmacro_data_pad_rx_ctrl << 19 >> 31) | (4 * (sdram->emc_pmacro_data_pad_rx_ctrl << 26 >> 30) | (sdram->emc_pmacro_data_pad_rx_ctrl & 3 | 4 * (pmc->scratch198 >> 2)) & 0xFFFFFFF3) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFC3F) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFE1FFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch199 = (8 * sdram->emc_cmd_q >> 27 << 27) | ((sdram->emc_cmd_q << 17 >> 29 << 24) | ((sdram->emc_cmd_q << 21 >> 29 << 21) | ((sdram->emc_cmd_q << 16) & 0x1FFFFF | (((u16)(sdram->emc_refresh) << 16 >> 22 << 6) | (sdram->emc_refresh & 0x3F | (pmc->scratch199 >> 6 << 6)) & 0xFFFF003F) & 0xFFE0FFFF) & 0xFF1FFFFF) & 0xF8FFFFFF) & 0x7FFFFFF; - pmc->scratch210 = (sdram->emc_auto_cal_vref_sel1 << 16 >> 31 << 31) | (2 * ((sdram->emc_auto_cal_vref_sel1 << 17 >> 25 << 24) | ((sdram->emc_auto_cal_vref_sel1 << 24 >> 31 << 23) | ((sdram->emc_auto_cal_vref_sel1 << 16) & 0x7FFFFF | (sdram->emc_acpd_control & 0xFFFF | (pmc->scratch210 >> 16 << 16)) & 0xFF80FFFF) & 0xFF7FFFFF) & 0x80FFFFFF) >> 1); - tmp = 8 * (sdram->emc_pmacro_auto_cal_cfg0 << 28 >> 31) | (4 * (sdram->emc_pmacro_auto_cal_cfg0 << 29 >> 31) | (2 * (sdram->emc_pmacro_auto_cal_cfg0 << 30 >> 31) | (sdram->emc_pmacro_auto_cal_cfg0 & 1 | 2 * (pmc->scratch211 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7; - tmp = (sdram->emc_pmacro_auto_cal_cfg1 << 7 >> 31 << 28) | ((sdram->emc_pmacro_auto_cal_cfg1 << 12 >> 31 << 27) | ((sdram->emc_pmacro_auto_cal_cfg1 << 13 >> 31 << 26) | ((sdram->emc_pmacro_auto_cal_cfg1 << 14 >> 31 << 25) | ((sdram->emc_pmacro_auto_cal_cfg1 << 15 >> 31 << 24) | ((sdram->emc_pmacro_auto_cal_cfg1 << 20 >> 31 << 23) | ((sdram->emc_pmacro_auto_cal_cfg1 << 21 >> 31 << 22) | ((sdram->emc_pmacro_auto_cal_cfg1 << 22 >> 31 << 21) | ((sdram->emc_pmacro_auto_cal_cfg1 << 23 >> 31 << 20) | ((sdram->emc_pmacro_auto_cal_cfg1 << 28 >> 31 << 19) | ((sdram->emc_pmacro_auto_cal_cfg1 << 29 >> 31 << 18) | ((sdram->emc_pmacro_auto_cal_cfg1 << 30 >> 31 << 17) | ((sdram->emc_pmacro_auto_cal_cfg1 << 16) & 0x1FFFF | ((16 * sdram->emc_pmacro_auto_cal_cfg0 >> 31 << 15) | ((32 * sdram->emc_pmacro_auto_cal_cfg0 >> 31 << 14) | ((sdram->emc_pmacro_auto_cal_cfg0 << 6 >> 31 << 13) | ((sdram->emc_pmacro_auto_cal_cfg0 << 7 >> 31 << 12) | ((sdram->emc_pmacro_auto_cal_cfg0 << 12 >> 31 << 11) | ((sdram->emc_pmacro_auto_cal_cfg0 << 13 >> 31 << 10) | ((sdram->emc_pmacro_auto_cal_cfg0 << 14 >> 31 << 9) | ((sdram->emc_pmacro_auto_cal_cfg0 << 15 >> 31 << 8) | ((sdram->emc_pmacro_auto_cal_cfg0 << 20 >> 31 << 7) | ((sdram->emc_pmacro_auto_cal_cfg0 << 21 >> 31 << 6) | (32 * (sdram->emc_pmacro_auto_cal_cfg0 << 22 >> 31) | (16 * (sdram->emc_pmacro_auto_cal_cfg0 << 23 >> 31) | tmp & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF; - pmc->scratch211 = (16 * sdram->emc_pmacro_auto_cal_cfg1 >> 31 << 31) | (2 * ((32 * sdram->emc_pmacro_auto_cal_cfg1 >> 31 << 30) | ((sdram->emc_pmacro_auto_cal_cfg1 << 6 >> 31 << 29) | tmp & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->scratch212 = (sdram->emc_xm2_comp_pad_ctrl3 << 8 >> 28 << 28) | ((sdram->emc_xm2_comp_pad_ctrl3 << 14 >> 31 << 27) | ((sdram->emc_xm2_comp_pad_ctrl3 << 15 >> 31 << 26) | ((sdram->emc_xm2_comp_pad_ctrl3 << 16 >> 30 << 24) | ((sdram->emc_xm2_comp_pad_ctrl3 << 18 >> 30 << 22) | ((sdram->emc_xm2_comp_pad_ctrl3 << 26 >> 28 << 18) | ((sdram->emc_xm2_comp_pad_ctrl3 << 16) & 0x3FFFF | ((16 * sdram->emc_pmacro_auto_cal_cfg2 >> 31 << 15) | ((32 * sdram->emc_pmacro_auto_cal_cfg2 >> 31 << 14) | ((sdram->emc_pmacro_auto_cal_cfg2 << 6 >> 31 << 13) | ((sdram->emc_pmacro_auto_cal_cfg2 << 7 >> 31 << 12) | ((sdram->emc_pmacro_auto_cal_cfg2 << 12 >> 31 << 11) | ((sdram->emc_pmacro_auto_cal_cfg2 << 13 >> 31 << 10) | ((sdram->emc_pmacro_auto_cal_cfg2 << 14 >> 31 << 9) | ((sdram->emc_pmacro_auto_cal_cfg2 << 15 >> 31 << 8) | ((sdram->emc_pmacro_auto_cal_cfg2 << 20 >> 31 << 7) | ((sdram->emc_pmacro_auto_cal_cfg2 << 21 >> 31 << 6) | (32 * (sdram->emc_pmacro_auto_cal_cfg2 << 22 >> 31) | (16 * (sdram->emc_pmacro_auto_cal_cfg2 << 23 >> 31) | (8 * (sdram->emc_pmacro_auto_cal_cfg2 << 28 >> 31) | (4 * (sdram->emc_pmacro_auto_cal_cfg2 << 29 >> 31) | (2 * (sdram->emc_pmacro_auto_cal_cfg2 << 30 >> 31) | (sdram->emc_pmacro_auto_cal_cfg2 & 1 | 2 * (pmc->scratch212 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFCFFFF) & 0xFFC3FFFF) & 0xFF3FFFFF) & 0xFCFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xFFFFFFF; - pmc->scratch213 = ((u16)(sdram->emc_prerefresh_req_cnt) << 16) | (u16)(sdram->emc_cfg_dig_dll_period); - pmc->scratch214 = (sdram->emc_pmacro_data_pi_ctrl << 10 >> 26 << 26) | ((sdram->emc_pmacro_data_pi_ctrl << 19 >> 31 << 25) | ((sdram->emc_pmacro_data_pi_ctrl << 20 >> 28 << 21) | ((sdram->emc_pmacro_data_pi_ctrl << 27 >> 31 << 20) | ((sdram->emc_pmacro_data_pi_ctrl << 16) & 0xFFFFF | ((sdram->emc_pmacro_ddll_bypass >> 31 << 15) | ((2 * sdram->emc_pmacro_ddll_bypass >> 31 << 14) | ((4 * sdram->emc_pmacro_ddll_bypass >> 31 << 13) | ((16 * sdram->emc_pmacro_ddll_bypass >> 31 << 12) | ((32 * sdram->emc_pmacro_ddll_bypass >> 31 << 11) | ((sdram->emc_pmacro_ddll_bypass << 6 >> 31 << 10) | ((sdram->emc_pmacro_ddll_bypass << 7 >> 31 << 9) | ((sdram->emc_pmacro_ddll_bypass << 15 >> 31 << 8) | ((sdram->emc_pmacro_ddll_bypass << 16 >> 31 << 7) | ((sdram->emc_pmacro_ddll_bypass << 17 >> 31 << 6) | (32 * (sdram->emc_pmacro_ddll_bypass << 18 >> 31) | (16 * (sdram->emc_pmacro_ddll_bypass << 20 >> 31) | (8 * (sdram->emc_pmacro_ddll_bypass << 21 >> 31) | (4 * (sdram->emc_pmacro_ddll_bypass << 22 >> 31) | (2 * (sdram->emc_pmacro_ddll_bypass << 23 >> 31) | (sdram->emc_pmacro_ddll_bypass & 1 | 2 * (pmc->scratch214 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFF0FFFF) & 0xFFEFFFFF) & 0xFE1FFFFF) & 0xFDFFFFFF) & 0x3FFFFFF; - pmc->scratch215 = (sdram->emc_pmacro_cmd_pi_ctrl << 10 >> 26 << 10) | ((sdram->emc_pmacro_cmd_pi_ctrl << 19 >> 31 << 9) | (32 * (sdram->emc_pmacro_cmd_pi_ctrl << 20 >> 28) | (16 * (sdram->emc_pmacro_cmd_pi_ctrl << 27 >> 31) | (sdram->emc_pmacro_cmd_pi_ctrl & 0xF | 16 * (pmc->scratch215 >> 4)) & 0xFFFFFFEF) & 0xFFFFFE1F) & 0xFFFFFDFF) & 0xFFFF03FF; - tmp = (sdram->emc_pmacro_data_pad_tx_ctrl << 7 >> 31 << 24) | ((sdram->emc_pmacro_data_pad_tx_ctrl << 8 >> 31 << 23) | ((sdram->emc_pmacro_data_pad_tx_ctrl << 9 >> 31 << 22) | ((sdram->emc_pmacro_data_pad_tx_ctrl << 10 >> 31 << 21) | ((sdram->emc_pmacro_data_pad_tx_ctrl << 15 >> 31 << 20) | ((sdram->emc_pmacro_data_pad_tx_ctrl << 16 >> 31 << 19) | ((sdram->emc_pmacro_data_pad_tx_ctrl << 21 >> 31 << 18) | ((sdram->emc_pmacro_data_pad_tx_ctrl << 25 >> 31 << 17) | ((sdram->emc_pmacro_data_pad_tx_ctrl << 26 >> 31 << 16) | ((sdram->emc_pmacro_data_pad_tx_ctrl << 15) & 0xFFFF | ((2 * sdram->emc_pmacro_cmd_pad_tx_ctrl >> 31 << 14) | ((4 * sdram->emc_pmacro_cmd_pad_tx_ctrl >> 31 << 13) | ((8 * sdram->emc_pmacro_cmd_pad_tx_ctrl >> 31 << 12) | ((16 * sdram->emc_pmacro_cmd_pad_tx_ctrl >> 31 << 11) | ((32 * sdram->emc_pmacro_cmd_pad_tx_ctrl >> 31 << 10) | ((sdram->emc_pmacro_cmd_pad_tx_ctrl << 6 >> 31 << 9) | ((sdram->emc_pmacro_cmd_pad_tx_ctrl << 7 >> 31 << 8) | ((sdram->emc_pmacro_cmd_pad_tx_ctrl << 8 >> 31 << 7) | ((sdram->emc_pmacro_cmd_pad_tx_ctrl << 9 >> 31 << 6) | (32 * (sdram->emc_pmacro_cmd_pad_tx_ctrl << 10 >> 31) | (16 * (sdram->emc_pmacro_cmd_pad_tx_ctrl << 15 >> 31) | (8 * (sdram->emc_pmacro_cmd_pad_tx_ctrl << 16 >> 31) | (4 * (sdram->emc_pmacro_cmd_pad_tx_ctrl << 21 >> 31) | (2 * (sdram->emc_pmacro_cmd_pad_tx_ctrl << 25 >> 31) | ((sdram->emc_pmacro_cmd_pad_tx_ctrl << 26 >> 31) | 2 * (pmc->scratch216 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF; - - s(emc_pin_gpio, 1:0, scratch9, 31:30); - s(emc_pin_gpio_enable, 1:0, scratch10, 31:30); - s(emc_dev_select, 1:0, scratch11, 31:30); - s(emc_zcal_warm_cold_boot_enables, 1:0, scratch12, 31:30); - s(emc_cfg_dig_dll_period_warm_boot, 1:0, scratch13, 31:30); - s32(emc_bct_spare13, scratch45); - s32(emc_bct_spare12, scratch46); - s32(emc_bct_spare7, scratch47); - s32(emc_bct_spare6, scratch48); - s32(emc_bct_spare5, scratch50); - s32(emc_bct_spare4, scratch51); - s32(emc_bct_spare3, scratch56); - s32(emc_bct_spare2, scratch57); - s32(emc_bct_spare1, scratch58); - s32(emc_bct_spare0, scratch59); - s32(emc_bct_spare9, scratch60); - s32(emc_bct_spare8, scratch61); - s32(boot_rom_patch_data, scratch62); - s32(boot_rom_patch_control, scratch63); - s(mc_clken_override_allwarm_boot, 0:0, scratch65, 31:31); - pmc->scratch66 = pmc->scratch66 & 0x1FFFFFFF | ((u8)(sdram->emc_extra_refresh_num) << 29); - pmc->scratch72 = pmc->scratch72 & 0x8FFFFFFF | ((u16)(sdram->pmc_io_dpd3_req_wait) << 28) & 0x70000000; - pmc->scratch72 = ((2 * pmc->scratch72) >> 1) | ((u16)(sdram->emc_clken_override_allwarm_boot) << 31); - pmc->scratch73 = pmc->scratch73 & 0x8FFFFFFF | ((u8)(sdram->memory_type) << 28) & 0x70000000; - pmc->scratch73 = ((2 * pmc->scratch73) >> 1) | (sdram->emc_mrs_warm_boot_enable << 31); - pmc->scratch74 = pmc->scratch74 & 0x8FFFFFFF | (sdram->pmc_io_dpd4_req_wait << 28) & 0x70000000; - pmc->scratch74 = ((2 * pmc->scratch74) >> 1) | (sdram->clear_clock2_mc1 << 31); - pmc->scratch75 = pmc->scratch75 & 0xEFFFFFFF | (sdram->emc_warm_boot_extramode_reg_write_enable << 28) & 0x10000000; - pmc->scratch75 = pmc->scratch75 & 0xDFFFFFFF | (sdram->clk_rst_pllm_misc20_override_enable << 29) & 0x20000000; - pmc->scratch75 = pmc->scratch75 & 0xBFFFFFFF | ((u16)(sdram->emc_dbg_write_mux) << 30) & 0x40000000; - pmc->scratch75 = ((2 * pmc->scratch75) >> 1) | ((u16)(sdram->ahb_arbitration_xbar_ctrl_meminit_done) << 31); - pmc->scratch90 = pmc->scratch90 & 0xFFFFFF | (sdram->emc_timing_control_wait << 24); - pmc->scratch91 = pmc->scratch91 & 0xFFFFFF | (sdram->emc_zcal_warm_boot_wait << 24); - pmc->scratch92 = pmc->scratch92 & 0xFFFFFF | (sdram->warm_boot_wait << 24); - pmc->scratch93 = pmc->scratch93 & 0xFFFFFF | ((u16)(sdram->emc_pin_program_wait) << 24); - pmc->scratch114 = pmc->scratch114 & 0x3FFFFF | ((u16)(sdram->emc_auto_cal_wait) << 22); - pmc->scratch215 = (u16)pmc->scratch215 | ((u16)(sdram->swizzle_rank_byte_encode) << 16); - pmc->scratch216 = (2 * sdram->emc_pmacro_data_pad_tx_ctrl >> 31 << 30) | ((4 * sdram->emc_pmacro_data_pad_tx_ctrl >> 31 << 29) | ((8 * sdram->emc_pmacro_data_pad_tx_ctrl >> 31 << 28) | ((16 * sdram->emc_pmacro_data_pad_tx_ctrl >> 31 << 27) | ((32 * sdram->emc_pmacro_data_pad_tx_ctrl >> 31 << 26) | ((sdram->emc_pmacro_data_pad_tx_ctrl << 6 >> 31 << 25) | tmp & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF; - s(emc_mrw_lpddr2zcal_warm_boot, 23:16, scratch5, 7:0); - s(emc_mrw_lpddr2zcal_warm_boot, 7:0, scratch5, 15:8); - s(emc_warm_boot_mrw_extra, 23:16, scratch5, 23:16); - s(emc_warm_boot_mrw_extra, 7:0, scratch5, 31:24); - s(emc_mrw_lpddr2zcal_warm_boot, 31:30, scratch6, 1:0); - s(emc_warm_boot_mrw_extra, 31:30, scratch6, 3:2); - s(emc_mrw_lpddr2zcal_warm_boot, 27:26, scratch6, 5:4); - s(emc_warm_boot_mrw_extra, 27:26, scratch6, 7:6); - s(emc_mrw6, 27:0, scratch8, 27:0); - s(emc_mrw6, 31:30, scratch8, 29:28); - s(emc_mrw8, 27:0, scratch9, 27:0); - s(emc_mrw8, 31:30, scratch9, 29:28); - s(emc_mrw9, 27:0, scratch10, 27:0); - s(emc_mrw9, 31:30, scratch10, 29:28); - s(emc_mrw10, 27:0, scratch11, 27:0); - s(emc_mrw10, 31:30, scratch11, 29:28); - s(emc_mrw12, 27:0, scratch12, 27:0); - s(emc_mrw12, 31:30, scratch12, 29:28); - s(emc_mrw13, 27:0, scratch13, 27:0); - s(emc_mrw13, 31:30, scratch13, 29:28); - s(emc_mrw14, 27:0, scratch14, 27:0); - s(emc_mrw14, 31:30, scratch14, 29:28); - s(emc_mrw1, 7:0, scratch15, 7:0); - s(emc_mrw1, 23:16, scratch15, 15:8); - s(emc_mrw1, 27:26, scratch15, 17:16); - s(emc_mrw1, 31:30, scratch15, 19:18); - s(emc_warm_boot_mrw_extra, 7:0, scratch16, 7:0); - s(emc_warm_boot_mrw_extra, 23:16, scratch16, 15:8); - s(emc_warm_boot_mrw_extra, 27:26, scratch16, 17:16); - s(emc_warm_boot_mrw_extra, 31:30, scratch16, 19:18); - s(emc_mrw2, 7:0, scratch17, 7:0); - s(emc_mrw2, 23:16, scratch17, 15:8); - s(emc_mrw2, 27:26, scratch17, 17:16); - s(emc_mrw2, 31:30, scratch17, 19:18); - pmc->scratch18 = (sdram->emc_mrw3 >> 30 << 18) | ((16 * sdram->emc_mrw3 >> 31 << 17) | ((32 * sdram->emc_mrw3 >> 31 << 16) | ((sdram->emc_mrw3 << 8 >> 24 << 8) | ((u8)sdram->emc_mrw3 | (pmc->scratch18 >> 8 << 8)) & 0xFFFF00FF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFF3FFFF; - pmc->scratch19 = (sdram->emc_mrw4 >> 30 << 18) | ((16 * sdram->emc_mrw4 >> 31 << 17) | ((32 * sdram->emc_mrw4 >> 31 << 16) | ((sdram->emc_mrw4 << 8 >> 24 << 8) | ((u8)sdram->emc_mrw4 | (pmc->scratch19 >> 8 << 8)) & 0xFFFF00FF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFF3FFFF; - s32(emc_cmd_mapping_byte, secure_scratch8); - s32(emc_pmacro_brick_mapping0, secure_scratch9); - s32(emc_pmacro_brick_mapping1, secure_scratch10); - s32(emc_pmacro_brick_mapping2, secure_scratch11); - s32(mc_video_protect_gpu_override0, secure_scratch12); - pmc->secure_scratch13 = ((u16)(sdram->emc_adr_cfg) << 31) | (2 * ((((u16)(sdram->mc_untranslated_region_check) << 22) >> 31 << 30) | ((((u16)(sdram->mc_untranslated_region_check) << 23) >> 31 << 29) | (((u16)(sdram->mc_untranslated_region_check) << 28) & 0x1FFFFFFF | ((2 * sdram->emc_cmd_mapping_cmd0_0 >> 25 << 21) | ((sdram->emc_cmd_mapping_cmd0_0 << 9 >> 25 << 14) | ((sdram->emc_cmd_mapping_cmd0_0 << 17 >> 25 << 7) | (sdram->emc_cmd_mapping_cmd0_0 & 0x7F | (pmc->secure_scratch13 >> 7 << 7)) & 0xFFFFC07F) & 0xFFE03FFF) & 0xF01FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->secure_scratch14 = (sdram->mc_video_protect_write_access << 30 >> 31 << 31) | (2 * ((sdram->mc_video_protect_write_access << 30) | ((sdram->mc_video_protect_bom_adr_hi << 30 >> 2) | ((2 * sdram->emc_cmd_mapping_cmd0_1 >> 25 << 21) | ((sdram->emc_cmd_mapping_cmd0_1 << 9 >> 25 << 14) | ((sdram->emc_cmd_mapping_cmd0_1 << 17 >> 25 << 7) | (sdram->emc_cmd_mapping_cmd0_1 & 0x7F | (pmc->secure_scratch14 >> 7 << 7)) & 0xFFFFC07F) & 0xFFE03FFF) & 0xF01FFFFF) & 0xCFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->secure_scratch15 = ((u16)(sdram->mc_mts_carveout_adr_hi) << 30) | (4 * ((sdram->mc_sec_carveout_adr_hi << 28) | ((2 * sdram->emc_cmd_mapping_cmd1_0 >> 25 << 21) | ((sdram->emc_cmd_mapping_cmd1_0 << 9 >> 25 << 14) | ((sdram->emc_cmd_mapping_cmd1_0 << 17 >> 25 << 7) | (sdram->emc_cmd_mapping_cmd1_0 & 0x7F | (pmc->secure_scratch15 >> 7 << 7)) & 0xFFFFC07F) & 0xFFE03FFF) & 0xF01FFFFF) & 0xCFFFFFFF) >> 2); - pmc->secure_scratch16 = (sdram->mc_generalized_carveout3_bom_hi << 30) | (4 * ((sdram->mc_generalized_carveout5_bom_hi << 28) | ((2 * sdram->emc_cmd_mapping_cmd1_1 >> 25 << 21) | ((sdram->emc_cmd_mapping_cmd1_1 << 9 >> 25 << 14) | ((sdram->emc_cmd_mapping_cmd1_1 << 17 >> 25 << 7) | (sdram->emc_cmd_mapping_cmd1_1 & 0x7F | (pmc->secure_scratch16 >> 7 << 7)) & 0xFFFFC07F) & 0xFFE03FFF) & 0xF01FFFFF) & 0xCFFFFFFF) >> 2); - pmc->secure_scratch17 = ((u16)(sdram->mc_generalized_carveout4_bom_hi) << 30) | (4 * (((u16)(sdram->mc_generalized_carveout2_bom_hi) << 28) | ((2 * sdram->emc_cmd_mapping_cmd2_0 >> 25 << 21) | ((sdram->emc_cmd_mapping_cmd2_0 << 9 >> 25 << 14) | ((sdram->emc_cmd_mapping_cmd2_0 << 17 >> 25 << 7) | (sdram->emc_cmd_mapping_cmd2_0 & 0x7F | (pmc->secure_scratch17 >> 7 << 7)) & 0xFFFFC07F) & 0xFFE03FFF) & 0xF01FFFFF) & 0xCFFFFFFF) >> 2); - pmc->secure_scratch18 = (sdram->emc_fbio_cfg8 << 16 >> 31 << 31) | (2 * (((u16)(sdram->emc_fbio_spare) << 30 >> 31 << 30) | ((sdram->mc_generalized_carveout1_bom_hi << 30 >> 2) | ((2 * sdram->emc_cmd_mapping_cmd2_1 >> 25 << 21) | ((sdram->emc_cmd_mapping_cmd2_1 << 9 >> 25 << 14) | ((sdram->emc_cmd_mapping_cmd2_1 << 17 >> 25 << 7) | (sdram->emc_cmd_mapping_cmd2_1 & 0x7F | (pmc->secure_scratch18 >> 7 << 7)) & 0xFFFFC07F) & 0xFFE03FFF) & 0xF01FFFFF) & 0xCFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->secure_scratch19 = (sdram->mc_video_protect_vpr_override << 31) | (2 * (((u16)(sdram->mc_mts_carveout_reg_ctrl) << 30) | ((sdram->mc_sec_carveout_protect_write_access << 31 >> 2) | (((u16)(sdram->mc_emem_adr_cfg) << 28) & 0x1FFFFFFF | ((2 * sdram->emc_cmd_mapping_cmd3_0 >> 25 << 21) | ((sdram->emc_cmd_mapping_cmd3_0 << 9 >> 25 << 14) | ((sdram->emc_cmd_mapping_cmd3_0 << 17 >> 25 << 7) | (sdram->emc_cmd_mapping_cmd3_0 & 0x7F | (pmc->secure_scratch19 >> 7 << 7)) & 0xFFFFC07F) & 0xFFE03FFF) & 0xF01FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->secure_scratch20 = (sdram->mc_generalized_carveout2_cfg0 << 25 >> 28 << 28) | ((2 * sdram->emc_cmd_mapping_cmd3_1 >> 25 << 21) | ((sdram->emc_cmd_mapping_cmd3_1 << 9 >> 25 << 14) | ((sdram->emc_cmd_mapping_cmd3_1 << 17 >> 25 << 7) | (sdram->emc_cmd_mapping_cmd3_1 & 0x7F | (pmc->secure_scratch20 >> 7 << 7)) & 0xFFFFC07F) & 0xFFE03FFF) & 0xF01FFFFF) & 0xFFFFFFF; - pmc->secure_scratch39 = (sdram->mc_video_protect_vpr_override << 30 >> 31 << 31) | (2 * ((sdram->mc_generalized_carveout2_cfg0 << 21 >> 28 << 27) | ((32 * sdram->mc_generalized_carveout4_cfg0 >> 31 << 26) | ((sdram->mc_generalized_carveout4_cfg0 << 6 >> 31 << 25) | ((sdram->mc_generalized_carveout4_cfg0 << 7 >> 31 << 24) | ((sdram->mc_generalized_carveout4_cfg0 << 8 >> 31 << 23) | ((sdram->mc_generalized_carveout4_cfg0 << 9 >> 31 << 22) | ((sdram->mc_generalized_carveout4_cfg0 << 10 >> 28 << 18) | ((sdram->mc_generalized_carveout4_cfg0 << 14 >> 28 << 14) | ((sdram->mc_generalized_carveout4_cfg0 << 18 >> 29 << 11) | ((sdram->mc_generalized_carveout4_cfg0 << 21 >> 28 << 7) | (8 * (sdram->mc_generalized_carveout4_cfg0 << 25 >> 28) | (4 * (sdram->mc_generalized_carveout4_cfg0 << 29 >> 31) | (2 * (sdram->mc_generalized_carveout4_cfg0 << 30 >> 31) | (sdram->mc_generalized_carveout4_cfg0 & 1 | 2 * (pmc->secure_scratch39 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFF87) & 0xFFFFF87F) & 0xFFFFC7FF) & 0xFFFC3FFF) & 0xFFC3FFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0x87FFFFFF) >> 1); - pmc->secure_scratch40 = (sdram->mc_video_protect_vpr_override << 29 >> 31 << 31) | (2 * ((sdram->mc_generalized_carveout2_cfg0 << 14 >> 28 << 27) | ((32 * sdram->mc_generalized_carveout5_cfg0 >> 31 << 26) | ((sdram->mc_generalized_carveout5_cfg0 << 6 >> 31 << 25) | ((sdram->mc_generalized_carveout5_cfg0 << 7 >> 31 << 24) | ((sdram->mc_generalized_carveout5_cfg0 << 8 >> 31 << 23) | ((sdram->mc_generalized_carveout5_cfg0 << 9 >> 31 << 22) | ((sdram->mc_generalized_carveout5_cfg0 << 10 >> 28 << 18) | ((sdram->mc_generalized_carveout5_cfg0 << 14 >> 28 << 14) | ((sdram->mc_generalized_carveout5_cfg0 << 18 >> 29 << 11) | ((sdram->mc_generalized_carveout5_cfg0 << 21 >> 28 << 7) | (8 * (sdram->mc_generalized_carveout5_cfg0 << 25 >> 28) | (4 * (sdram->mc_generalized_carveout5_cfg0 << 29 >> 31) | (2 * (sdram->mc_generalized_carveout5_cfg0 << 30 >> 31) | (sdram->mc_generalized_carveout5_cfg0 & 1 | 2 * (pmc->secure_scratch40 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFF87) & 0xFFFFF87F) & 0xFFFFC7FF) & 0xFFFC3FFF) & 0xFFC3FFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0x87FFFFFF) >> 1); - pmc->secure_scratch41 = (sdram->mc_generalized_carveout2_cfg0 << 18 >> 29 << 29) | ((sdram->mc_generalized_carveout2_cfg0 << 10 >> 28 << 25) | ((16 * sdram->emc_cmd_mapping_cmd0_2 >> 28 << 21) | ((sdram->emc_cmd_mapping_cmd0_2 << 9 >> 25 << 14) | ((sdram->emc_cmd_mapping_cmd0_2 << 17 >> 25 << 7) | (sdram->emc_cmd_mapping_cmd0_2 & 0x7F | (pmc->secure_scratch41 >> 7 << 7)) & 0xFFFFC07F) & 0xFFE03FFF) & 0xFE1FFFFF) & 0xE1FFFFFF) & 0x1FFFFFFF; - pmc->secure_scratch42 = ((u16)(sdram->mc_generalized_carveout1_cfg0) << 18 >> 29 << 29) | (((u16)(sdram->mc_generalized_carveout1_cfg0) << 25 >> 28 << 25) | ((16 * sdram->emc_cmd_mapping_cmd1_2 >> 28 << 21) | ((sdram->emc_cmd_mapping_cmd1_2 << 9 >> 25 << 14) | ((sdram->emc_cmd_mapping_cmd1_2 << 17 >> 25 << 7) | (sdram->emc_cmd_mapping_cmd1_2 & 0x7F | (pmc->secure_scratch42 >> 7 << 7)) & 0xFFFFC07F) & 0xFFE03FFF) & 0xFE1FFFFF) & 0xE1FFFFFF) & 0x1FFFFFFF; - pmc->secure_scratch43 = ((u16)(sdram->mc_generalized_carveout3_cfg0) << 18 >> 29 << 29) | (((u16)(sdram->mc_generalized_carveout1_cfg0) << 21 >> 28 << 25) | ((16 * sdram->emc_cmd_mapping_cmd2_2 >> 28 << 21) | ((sdram->emc_cmd_mapping_cmd2_2 << 9 >> 25 << 14) | ((sdram->emc_cmd_mapping_cmd2_2 << 17 >> 25 << 7) | (sdram->emc_cmd_mapping_cmd2_2 & 0x7F | (pmc->secure_scratch43 >> 7 << 7)) & 0xFFFFC07F) & 0xFFE03FFF) & 0xFE1FFFFF) & 0xE1FFFFFF) & 0x1FFFFFFF; - pmc->secure_scratch44 = (sdram->mc_video_protect_vpr_override << 24 >> 31 << 31) | (2 * ((sdram->mc_video_protect_vpr_override << 25 >> 31 << 30) | ((sdram->mc_video_protect_vpr_override << 28 >> 31 << 29) | ((sdram->mc_generalized_carveout1_cfg0 << 14 >> 28 << 25) | ((16 * sdram->emc_cmd_mapping_cmd3_2 >> 28 << 21) | ((sdram->emc_cmd_mapping_cmd3_2 << 9 >> 25 << 14) | ((sdram->emc_cmd_mapping_cmd3_2 << 17 >> 25 << 7) | (sdram->emc_cmd_mapping_cmd3_2 & 0x7F | (pmc->secure_scratch44 >> 7 << 7)) & 0xFFFFC07F) & 0xFFE03FFF) & 0xFE1FFFFF) & 0xE1FFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - s(mc_emem_adr_cfg_channel_mask, 31:9, secure_scratch45, 22:0); - s(mc_emem_adr_cfg_dev0, 2:0, secure_scratch45, 25:23); - s(mc_emem_adr_cfg_dev0, 9:8, secure_scratch45, 27:26); - s(mc_emem_adr_cfg_dev0, 19:16, secure_scratch45, 31:28); - pmc->secure_scratch46 = (sdram->mc_video_protect_vpr_override << 23 >> 31 << 31) | (2 * ((sdram->mc_emem_adr_cfg_dev1 << 12 >> 28 << 27) | ((sdram->mc_emem_adr_cfg_dev1 << 22 >> 30 << 25) | ((sdram->mc_emem_adr_cfg_dev1 << 22) & 0x1FFFFFF | ((sdram->mc_emem_adr_cfg_bank_mask0 >> 10) | (pmc->secure_scratch46 >> 22 << 22)) & 0xFE3FFFFF) & 0xF9FFFFFF) & 0x87FFFFFF) >> 1); - pmc->secure_scratch47 = (sdram->mc_video_protect_vpr_override << 20 >> 31 << 31) | (2 * ((sdram->mc_video_protect_vpr_override << 22 >> 31 << 30) | (((u8)(sdram->mc_generalized_carveout3_cfg0) << 25 >> 28 << 26) | ((sdram->mc_generalized_carveout1_cfg0 << 10 >> 28 << 22) | ((sdram->mc_emem_adr_cfg_bank_mask1 >> 10) | (pmc->secure_scratch47 >> 22 << 22)) & 0xFC3FFFFF) & 0xC3FFFFFF) & 0xBFFFFFFF) >> 1); - pmc->secure_scratch48 = (sdram->mc_video_protect_vpr_override << 16 >> 31 << 31) | (2 * ((sdram->mc_video_protect_vpr_override << 17 >> 31 << 30) | ((sdram->mc_generalized_carveout3_cfg0 << 14 >> 28 << 26) | ((sdram->mc_generalized_carveout3_cfg0 << 21 >> 28 << 22) | ((sdram->mc_emem_adr_cfg_bank_mask2 >> 10) | (pmc->secure_scratch48 >> 22 << 22)) & 0xFC3FFFFF) & 0xC3FFFFFF) & 0xBFFFFFFF) >> 1); - pmc->secure_scratch49 = (sdram->mc_video_protect_vpr_override << 14 >> 31 << 31) | (2 * ((sdram->mc_emem_cfg >> 31 << 30) | ((sdram->mc_emem_cfg << 18 >> 2) | (sdram->mc_video_protect_gpu_override1 & 0xFFFF | (pmc->secure_scratch49 >> 16 << 16)) & 0xC000FFFF) & 0xBFFFFFFF) >> 1); - pmc->secure_scratch50 = (sdram->mc_video_protect_vpr_override << 12 >> 31 << 31) | (2 * ((sdram->mc_video_protect_vpr_override << 13 >> 31 << 30) | ((sdram->mc_generalized_carveout1_bom >> 17 << 15) | ((sdram->mc_generalized_carveout3_bom >> 17) | (pmc->secure_scratch50 >> 15 << 15)) & 0xC0007FFF) & 0xBFFFFFFF) >> 1); - pmc->secure_scratch51 = (sdram->mc_video_protect_vpr_override << 10 >> 31 << 31) | (2 * ((sdram->mc_video_protect_vpr_override << 11 >> 31 << 30) | ((sdram->mc_generalized_carveout2_bom >> 17 << 15) | ((sdram->mc_generalized_carveout4_bom >> 17) | (pmc->secure_scratch51 >> 15 << 15)) & 0xC0007FFF) & 0xBFFFFFFF) >> 1); - pmc->secure_scratch52 = (sdram->mc_video_protect_vpr_override << 9 >> 31 << 31) | (2 * ((sdram->mc_generalized_carveout3_cfg0 << 10 >> 28 << 27) | ((sdram->mc_video_protect_bom >> 20 << 15) | ((sdram->mc_generalized_carveout5_bom >> 17) | (pmc->secure_scratch52 >> 15 << 15)) & 0xF8007FFF) & 0x87FFFFFF) >> 1); - pmc->secure_scratch53 = (sdram->mc_video_protect_vpr_override1 << 27 >> 31 << 31) | (2 * ((sdram->mc_video_protect_vpr_override1 << 30 >> 31 << 30) | ((sdram->mc_video_protect_vpr_override1 << 31 >> 2) | ((sdram->mc_video_protect_vpr_override >> 31 << 28) | ((2 * sdram->mc_video_protect_vpr_override >> 31 << 27) | ((4 * sdram->mc_video_protect_vpr_override >> 31 << 26) | ((32 * sdram->mc_video_protect_vpr_override >> 31 << 25) | ((sdram->mc_video_protect_vpr_override << 8 >> 31 << 24) | ((sdram->mc_sec_carveout_bom >> 20 << 12) | (sdram->mc_video_protect_size_mb & 0xFFF | (pmc->secure_scratch53 >> 12 << 12)) & 0xFF000FFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->secure_scratch54 = (sdram->mc_video_protect_vpr_override1 << 19 >> 31 << 31) | (2 * ((sdram->mc_video_protect_vpr_override1 << 20 >> 31 << 30) | ((sdram->mc_video_protect_vpr_override1 << 21 >> 31 << 29) | ((sdram->mc_video_protect_vpr_override1 << 22 >> 31 << 28) | ((sdram->mc_video_protect_vpr_override1 << 23 >> 31 << 27) | ((sdram->mc_video_protect_vpr_override1 << 24 >> 31 << 26) | ((sdram->mc_video_protect_vpr_override1 << 25 >> 31 << 25) | ((sdram->mc_video_protect_vpr_override1 << 26 >> 31 << 24) | ((sdram->mc_mts_carveout_bom >> 20 << 12) | (sdram->mc_sec_carveout_size_mb & 0xFFF | (pmc->secure_scratch54 >> 12 << 12)) & 0xFF000FFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->secure_scratch55 = (sdram->mc_generalized_carveout2_cfg0 << 30 >> 31 << 31) | (2 * ((sdram->mc_generalized_carveout2_cfg0 << 30) | ((32 * sdram->mc_video_protect_vpr_override1 >> 31 << 29) | ((sdram->mc_video_protect_vpr_override1 << 6 >> 31 << 28) | ((sdram->mc_video_protect_vpr_override1 << 15 >> 31 << 27) | ((sdram->mc_video_protect_vpr_override1 << 16 >> 31 << 26) | ((sdram->mc_video_protect_vpr_override1 << 17 >> 31 << 25) | ((sdram->mc_video_protect_vpr_override1 << 18 >> 31 << 24) | (((u16)(sdram->mc_generalized_carveout4_size_128kb) << 12) & 0xFFFFFF | (sdram->mc_mts_carveout_size_mb & 0xFFF | (pmc->secure_scratch55 >> 12 << 12)) & 0xFF000FFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->secure_scratch56 = ((u16)(sdram->mc_generalized_carveout1_cfg0) << 30 >> 31 << 31) | (2 * (((u16)(sdram->mc_generalized_carveout1_cfg0) << 30) | ((32 * sdram->mc_generalized_carveout2_cfg0 >> 31 << 29) | ((sdram->mc_generalized_carveout2_cfg0 << 6 >> 31 << 28) | ((sdram->mc_generalized_carveout2_cfg0 << 7 >> 31 << 27) | ((sdram->mc_generalized_carveout2_cfg0 << 8 >> 31 << 26) | ((sdram->mc_generalized_carveout2_cfg0 << 9 >> 31 << 25) | ((sdram->mc_generalized_carveout2_cfg0 << 29 >> 31 << 24) | (((u16)(sdram->mc_generalized_carveout2_size_128kb) << 12) & 0xFFFFFF | (sdram->mc_generalized_carveout3_size_128kb & 0xFFF | (pmc->secure_scratch56 >> 12 << 12)) & 0xFF000FFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - pmc->secure_scratch57 = ((u8)(sdram->mc_generalized_carveout3_cfg0) << 30 >> 31 << 31) | (2 * (((u8)(sdram->mc_generalized_carveout3_cfg0) << 30) | ((32 * sdram->mc_generalized_carveout1_cfg0 >> 31 << 29) | ((sdram->mc_generalized_carveout1_cfg0 << 6 >> 31 << 28) | ((sdram->mc_generalized_carveout1_cfg0 << 7 >> 31 << 27) | ((sdram->mc_generalized_carveout1_cfg0 << 8 >> 31 << 26) | ((sdram->mc_generalized_carveout1_cfg0 << 9 >> 31 << 25) | ((sdram->mc_generalized_carveout1_cfg0 << 29 >> 31 << 24) | ((sdram->mc_generalized_carveout5_size_128kb << 12) & 0xFFFFFF | (sdram->mc_generalized_carveout1_size_128kb & 0xFFF | (pmc->secure_scratch57 >> 12 << 12)) & 0xFF000FFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1); - - s32(mc_generalized_carveout1_access0, secure_scratch59); - s32(mc_generalized_carveout1_access1, secure_scratch60); - s32(mc_generalized_carveout1_access2, secure_scratch61); - s32(mc_generalized_carveout1_access3, secure_scratch62); - s32(mc_generalized_carveout1_access4, secure_scratch63); - s32(mc_generalized_carveout2_access0, secure_scratch64); - s32(mc_generalized_carveout2_access1, secure_scratch65); - s32(mc_generalized_carveout2_access2, secure_scratch66); - s32(mc_generalized_carveout2_access3, secure_scratch67); - s32(mc_generalized_carveout2_access4, secure_scratch68); - s32(mc_generalized_carveout3_access0, secure_scratch69); - s32(mc_generalized_carveout3_access1, secure_scratch70); - s32(mc_generalized_carveout3_access2, secure_scratch71); - s32(mc_generalized_carveout3_access3, secure_scratch72); - s32(mc_generalized_carveout3_access4, secure_scratch73); - s32(mc_generalized_carveout4_access0, secure_scratch74); - s32(mc_generalized_carveout4_access1, secure_scratch75); - s32(mc_generalized_carveout4_access2, secure_scratch76); - s32(mc_generalized_carveout4_access3, secure_scratch77); - s32(mc_generalized_carveout4_access4, secure_scratch78); - s32(mc_generalized_carveout5_access0, secure_scratch79); - s32(mc_generalized_carveout5_access1, secure_scratch80); - s32(mc_generalized_carveout5_access2, secure_scratch81); - s32(mc_generalized_carveout5_access3, secure_scratch82); - s32(mc_generalized_carveout1_force_internal_access0, secure_scratch84); - s32(mc_generalized_carveout1_force_internal_access1, secure_scratch85); - s32(mc_generalized_carveout1_force_internal_access2, secure_scratch86); - s32(mc_generalized_carveout1_force_internal_access3, secure_scratch87); - s32(mc_generalized_carveout1_force_internal_access4, secure_scratch88); - s32(mc_generalized_carveout2_force_internal_access0, secure_scratch89); - s32(mc_generalized_carveout2_force_internal_access1, secure_scratch90); - s32(mc_generalized_carveout2_force_internal_access2, secure_scratch91); - s32(mc_generalized_carveout2_force_internal_access3, secure_scratch92); - s32(mc_generalized_carveout2_force_internal_access4, secure_scratch93); - s32(mc_generalized_carveout3_force_internal_access0, secure_scratch94); - s32(mc_generalized_carveout3_force_internal_access1, secure_scratch95); - s32(mc_generalized_carveout3_force_internal_access2, secure_scratch96); - s32(mc_generalized_carveout3_force_internal_access3, secure_scratch97); - s32(mc_generalized_carveout3_force_internal_access4, secure_scratch98); - s32(mc_generalized_carveout4_force_internal_access0, secure_scratch99); - s32(mc_generalized_carveout4_force_internal_access1, secure_scratch100); - s32(mc_generalized_carveout4_force_internal_access2, secure_scratch101); - s32(mc_generalized_carveout4_force_internal_access3, secure_scratch102); - s32(mc_generalized_carveout4_force_internal_access4, secure_scratch103); - s32(mc_generalized_carveout5_force_internal_access0, secure_scratch104); - s32(mc_generalized_carveout5_force_internal_access1, secure_scratch105); - s32(mc_generalized_carveout5_force_internal_access2, secure_scratch106); - s32(mc_generalized_carveout5_force_internal_access3, secure_scratch107); - - pmc->secure_scratch58 = 32 * (32 * sdram->mc_generalized_carveout3_cfg0 >> 31) | (16 * (sdram->mc_generalized_carveout3_cfg0 << 6 >> 31) | (8 * (sdram->mc_generalized_carveout3_cfg0 << 7 >> 31) | (4 * (sdram->mc_generalized_carveout3_cfg0 << 8 >> 31) | (2 * (sdram->mc_generalized_carveout3_cfg0 << 9 >> 31) | ((sdram->mc_generalized_carveout3_cfg0 << 29 >> 31) | 2 * (pmc->secure_scratch58 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF; - - c32(0, scratch2); - s(pllm_input_divider, 7:0, scratch2, 7:0); - s(pllm_feedback_divider, 7:0, scratch2, 15:8); - s(pllm_post_divider, 4:0, scratch2, 20:16); - s(pllm_kvco, 0:0, scratch2, 17:17); - s(pllm_kcp, 1:0, scratch2, 19:18); - - c32(0, scratch35); - s(pllm_setup_control, 15:0, scratch35, 15:0); - - c32(0, scratch3); - s(pllm_input_divider, 7:0, scratch3, 7:0); - c(0x3e, scratch3, 15:8); - c(0, scratch3, 20:16); - s(pllm_kvco, 0:0, scratch3, 21:21); - s(pllm_kcp, 1:0, scratch3, 23:22); - - c32(0, scratch36); - s(pllm_setup_control, 23:0, scratch36, 23:0); - - c32(0, scratch4); - s(pllm_stable_time, 9:0, scratch4, 9:0); // s32(pllm_stable_time, scratch4);, s(pllm_stable_time, 31:0, scratch4, 31:10); - s(pllm_stable_time, 31:0, scratch4, 31:10); -} - -#pragma GCC diagnostic pop - -void sdram_lp0_save_params(const void *params) -{ - u32 chip_id = (APB_MISC(APB_MISC_GP_HIDREV) >> 4) & 0xF; - - if (chip_id != GP_HIDREV_MAJOR_T210B01) - _sdram_lp0_save_params_t210(params); - else - _sdram_lp0_save_params_t210b01(params); -} diff --git a/bdk/mem/sdram_lp0_param_t210.h b/bdk/mem/sdram_lp0_param_t210.h deleted file mode 100644 index 09e960e..0000000 --- a/bdk/mem/sdram_lp0_param_t210.h +++ /dev/null @@ -1,964 +0,0 @@ -/* - * Copyright (c) 2013-2015, NVIDIA CORPORATION. All rights reserved. - * Copyright 2014 Google Inc. - * Copyright (c) 2018 CTCaer - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -/** - * Defines the SDRAM parameter structure. - * - * Note that PLLM is used by EMC. The field names are in camel case to ease - * directly converting BCT config files (*.cfg) into C structure. - */ - -#ifndef __TEGRA210_SDRAM_PARAM_H__ -#define __TEGRA210_SDRAM_PARAM_H__ - -#include - -enum -{ - /* Specifies the memory type to be undefined */ - NvBootMemoryType_None = 0, - - /* Specifies the memory type to be DDR SDRAM */ - NvBootMemoryType_Ddr = 0, - - /* Specifies the memory type to be LPDDR SDRAM */ - NvBootMemoryType_LpDdr = 0, - - /* Specifies the memory type to be DDR2 SDRAM */ - NvBootMemoryType_Ddr2 = 0, - - /* Specifies the memory type to be LPDDR2 SDRAM */ - NvBootMemoryType_LpDdr2, - - /* Specifies the memory type to be DDR3 SDRAM */ - NvBootMemoryType_Ddr3, - - /* Specifies the memory type to be LPDDR4 SDRAM */ - NvBootMemoryType_LpDdr4, - - NvBootMemoryType_Num, - - /* Specifies an entry in the ram_code table that's not in use */ - NvBootMemoryType_Unused = 0X7FFFFFF, -}; - -/** - * Defines the SDRAM parameter structure - */ -struct sdram_params_t210 -{ - - /* Specifies the type of memory device */ - u32 MemoryType; - - /* MC/EMC clock source configuration */ - - /* Specifies the M value for PllM */ - u32 PllMInputDivider; - /* Specifies the N value for PllM */ - u32 PllMFeedbackDivider; - /* Specifies the time to wait for PLLM to lock (in microseconds) */ - u32 PllMStableTime; - /* Specifies misc. control bits */ - u32 PllMSetupControl; - /* Specifies the P value for PLLM */ - u32 PllMPostDivider; - /* Specifies value for Charge Pump Gain Control */ - u32 PllMKCP; - /* Specifies VCO gain */ - u32 PllMKVCO; - /* Spare BCT param */ - u32 EmcBctSpare0; - /* Spare BCT param */ - u32 EmcBctSpare1; - /* Spare BCT param */ - u32 EmcBctSpare2; - /* Spare BCT param */ - u32 EmcBctSpare3; - /* Spare BCT param */ - u32 EmcBctSpare4; - /* Spare BCT param */ - u32 EmcBctSpare5; - /* Spare BCT param */ - u32 EmcBctSpare6; - /* Spare BCT param */ - u32 EmcBctSpare7; - /* Spare BCT param */ - u32 EmcBctSpare8; - /* Spare BCT param */ - u32 EmcBctSpare9; - /* Spare BCT param */ - u32 EmcBctSpare10; - /* Spare BCT param */ - u32 EmcBctSpare11; - /* Spare BCT param */ - u32 EmcBctSpare12; - /* Spare BCT param */ - u32 EmcBctSpare13; - - /* Defines EMC_2X_CLK_SRC, EMC_2X_CLK_DIVISOR, EMC_INVERT_DCD */ - u32 EmcClockSource; - u32 EmcClockSourceDll; - - /* Defines possible override for PLLLM_MISC2 */ - u32 ClkRstControllerPllmMisc2Override; - /* enables override for PLLLM_MISC2 */ - u32 ClkRstControllerPllmMisc2OverrideEnable; - /* defines CLK_ENB_MC1 in register clk_rst_controller_clk_enb_w_clr */ - u32 ClearClk2Mc1; - - /* Auto-calibration of EMC pads */ - - /* Specifies the value for EMC_AUTO_CAL_INTERVAL */ - u32 EmcAutoCalInterval; - /* - * Specifies the value for EMC_AUTO_CAL_CONFIG - * Note: Trigger bits are set by the SDRAM code. - */ - u32 EmcAutoCalConfig; - - /* Specifies the value for EMC_AUTO_CAL_CONFIG2 */ - u32 EmcAutoCalConfig2; - - /* Specifies the value for EMC_AUTO_CAL_CONFIG3 */ - u32 EmcAutoCalConfig3; - - /* Specifies the values for EMC_AUTO_CAL_CONFIG4-8 */ - u32 EmcAutoCalConfig4; - u32 EmcAutoCalConfig5; - u32 EmcAutoCalConfig6; - u32 EmcAutoCalConfig7; - u32 EmcAutoCalConfig8; - - /* Specifies the value for EMC_AUTO_CAL_VREF_SEL_0 */ - u32 EmcAutoCalVrefSel0; - u32 EmcAutoCalVrefSel1; - - /* Specifies the value for EMC_AUTO_CAL_CHANNEL */ - u32 EmcAutoCalChannel; - - /* Specifies the value for EMC_PMACRO_AUTOCAL_CFG_0 */ - u32 EmcPmacroAutocalCfg0; - u32 EmcPmacroAutocalCfg1; - u32 EmcPmacroAutocalCfg2; - u32 EmcPmacroRxTerm; - u32 EmcPmacroDqTxDrv; - u32 EmcPmacroCaTxDrv; - u32 EmcPmacroCmdTxDrv; - u32 EmcPmacroAutocalCfgCommon; - u32 EmcPmacroZctrl; - - /* - * Specifies the time for the calibration - * to stabilize (in microseconds) - */ - u32 EmcAutoCalWait; - - u32 EmcXm2CompPadCtrl; - u32 EmcXm2CompPadCtrl2; - u32 EmcXm2CompPadCtrl3; - - /* - * DRAM size information - * Specifies the value for EMC_ADR_CFG - */ - u32 EmcAdrCfg; - - /* - * Specifies the time to wait after asserting pin - * CKE (in microseconds) - */ - u32 EmcPinProgramWait; - /* Specifies the extra delay before/after pin RESET/CKE command */ - u32 EmcPinExtraWait; - - u32 EmcPinGpioEn; - u32 EmcPinGpio; - - /* - * Specifies the extra delay after the first writing - * of EMC_TIMING_CONTROL - */ - u32 EmcTimingControlWait; - - /* Timing parameters required for the SDRAM */ - - /* Specifies the value for EMC_RC */ - u32 EmcRc; - /* Specifies the value for EMC_RFC */ - u32 EmcRfc; - /* Specifies the value for EMC_RFC_PB */ - u32 EmcRfcPb; - /* Specifies the value for EMC_RFC_CTRL2 */ - u32 EmcRefctrl2; - /* Specifies the value for EMC_RFC_SLR */ - u32 EmcRfcSlr; - /* Specifies the value for EMC_RAS */ - u32 EmcRas; - /* Specifies the value for EMC_RP */ - u32 EmcRp; - /* Specifies the value for EMC_R2R */ - u32 EmcR2r; - /* Specifies the value for EMC_W2W */ - u32 EmcW2w; - /* Specifies the value for EMC_R2W */ - u32 EmcR2w; - /* Specifies the value for EMC_W2R */ - u32 EmcW2r; - /* Specifies the value for EMC_R2P */ - u32 EmcR2p; - /* Specifies the value for EMC_W2P */ - u32 EmcW2p; - - u32 EmcTppd; - u32 EmcCcdmw; - - /* Specifies the value for EMC_RD_RCD */ - u32 EmcRdRcd; - /* Specifies the value for EMC_WR_RCD */ - u32 EmcWrRcd; - /* Specifies the value for EMC_RRD */ - u32 EmcRrd; - /* Specifies the value for EMC_REXT */ - u32 EmcRext; - /* Specifies the value for EMC_WEXT */ - u32 EmcWext; - /* Specifies the value for EMC_WDV */ - u32 EmcWdv; - - u32 EmcWdvChk; - u32 EmcWsv; - u32 EmcWev; - - /* Specifies the value for EMC_WDV_MASK */ - u32 EmcWdvMask; - - u32 EmcWsDuration; - u32 EmcWeDuration; - - /* Specifies the value for EMC_QUSE */ - u32 EmcQUse; - /* Specifies the value for EMC_QUSE_WIDTH */ - u32 EmcQuseWidth; - /* Specifies the value for EMC_IBDLY */ - u32 EmcIbdly; - /* Specifies the value for EMC_OBDLY */ - u32 EmcObdly; - /* Specifies the value for EMC_EINPUT */ - u32 EmcEInput; - /* Specifies the value for EMC_EINPUT_DURATION */ - u32 EmcEInputDuration; - /* Specifies the value for EMC_PUTERM_EXTRA */ - u32 EmcPutermExtra; - /* Specifies the value for EMC_PUTERM_WIDTH */ - u32 EmcPutermWidth; - /* Specifies the value for EMC_PUTERM_ADJ */ - ////u32 EmcPutermAdj; - - /* Specifies the value for EMC_QRST */ - u32 EmcQRst; - /* Specifies the value for EMC_QSAFE */ - u32 EmcQSafe; - /* Specifies the value for EMC_RDV */ - u32 EmcRdv; - /* Specifies the value for EMC_RDV_MASK */ - u32 EmcRdvMask; - /* Specifies the value for EMC_RDV_EARLY */ - u32 EmcRdvEarly; - /* Specifies the value for EMC_RDV_EARLY_MASK */ - u32 EmcRdvEarlyMask; - /* Specifies the value for EMC_QPOP */ - u32 EmcQpop; - - /* Specifies the value for EMC_REFRESH */ - u32 EmcRefresh; - /* Specifies the value for EMC_BURST_REFRESH_NUM */ - u32 EmcBurstRefreshNum; - /* Specifies the value for EMC_PRE_REFRESH_REQ_CNT */ - u32 EmcPreRefreshReqCnt; - /* Specifies the value for EMC_PDEX2WR */ - u32 EmcPdEx2Wr; - /* Specifies the value for EMC_PDEX2RD */ - u32 EmcPdEx2Rd; - /* Specifies the value for EMC_PCHG2PDEN */ - u32 EmcPChg2Pden; - /* Specifies the value for EMC_ACT2PDEN */ - u32 EmcAct2Pden; - /* Specifies the value for EMC_AR2PDEN */ - u32 EmcAr2Pden; - /* Specifies the value for EMC_RW2PDEN */ - u32 EmcRw2Pden; - /* Specifies the value for EMC_CKE2PDEN */ - u32 EmcCke2Pden; - /* Specifies the value for EMC_PDEX2CKE */ - u32 EmcPdex2Cke; - /* Specifies the value for EMC_PDEX2MRR */ - u32 EmcPdex2Mrr; - /* Specifies the value for EMC_TXSR */ - u32 EmcTxsr; - /* Specifies the value for EMC_TXSRDLL */ - u32 EmcTxsrDll; - /* Specifies the value for EMC_TCKE */ - u32 EmcTcke; - /* Specifies the value for EMC_TCKESR */ - u32 EmcTckesr; - /* Specifies the value for EMC_TPD */ - u32 EmcTpd; - /* Specifies the value for EMC_TFAW */ - u32 EmcTfaw; - /* Specifies the value for EMC_TRPAB */ - u32 EmcTrpab; - /* Specifies the value for EMC_TCLKSTABLE */ - u32 EmcTClkStable; - /* Specifies the value for EMC_TCLKSTOP */ - u32 EmcTClkStop; - /* Specifies the value for EMC_TREFBW */ - u32 EmcTRefBw; - - /* FBIO configuration values */ - - /* Specifies the value for EMC_FBIO_CFG5 */ - u32 EmcFbioCfg5; - /* Specifies the value for EMC_FBIO_CFG7 */ - u32 EmcFbioCfg7; - /* Specifies the value for EMC_FBIO_CFG8 */ - u32 EmcFbioCfg8; - - /* Command mapping for CMD brick 0 */ - u32 EmcCmdMappingCmd0_0; - u32 EmcCmdMappingCmd0_1; - u32 EmcCmdMappingCmd0_2; - u32 EmcCmdMappingCmd1_0; - u32 EmcCmdMappingCmd1_1; - u32 EmcCmdMappingCmd1_2; - u32 EmcCmdMappingCmd2_0; - u32 EmcCmdMappingCmd2_1; - u32 EmcCmdMappingCmd2_2; - u32 EmcCmdMappingCmd3_0; - u32 EmcCmdMappingCmd3_1; - u32 EmcCmdMappingCmd3_2; - u32 EmcCmdMappingByte; - - /* Specifies the value for EMC_FBIO_SPARE */ - u32 EmcFbioSpare; - - /* Specifies the value for EMC_CFG_RSV */ - u32 EmcCfgRsv; - - /* MRS command values */ - - /* Specifies the value for EMC_MRS */ - u32 EmcMrs; - /* Specifies the MP0 command to initialize mode registers */ - u32 EmcEmrs; - /* Specifies the MP2 command to initialize mode registers */ - u32 EmcEmrs2; - /* Specifies the MP3 command to initialize mode registers */ - u32 EmcEmrs3; - /* Specifies the programming to LPDDR2 Mode Register 1 at cold boot */ - u32 EmcMrw1; - /* Specifies the programming to LPDDR2 Mode Register 2 at cold boot */ - u32 EmcMrw2; - /* Specifies the programming to LPDDR2 Mode Register 3 at cold boot */ - u32 EmcMrw3; - /* Specifies the programming to LPDDR2 Mode Register 11 at cold boot */ - u32 EmcMrw4; - /* Specifies the programming to LPDDR2 Mode Register 3? at cold boot */ - u32 EmcMrw6; - /* Specifies the programming to LPDDR2 Mode Register 11 at cold boot */ - u32 EmcMrw8; - /* Specifies the programming to LPDDR2 Mode Register 11? at cold boot */ - u32 EmcMrw9; - /* Specifies the programming to LPDDR2 Mode Register 12 at cold boot */ - u32 EmcMrw10; - /* Specifies the programming to LPDDR2 Mode Register 14 at cold boot */ - u32 EmcMrw12; - /* Specifies the programming to LPDDR2 Mode Register 14? at cold boot */ - u32 EmcMrw13; - /* Specifies the programming to LPDDR2 Mode Register 22 at cold boot */ - u32 EmcMrw14; - /* - * Specifies the programming to extra LPDDR2 Mode Register - * at cold boot - */ - u32 EmcMrwExtra; - /* - * Specifies the programming to extra LPDDR2 Mode Register - * at warm boot - */ - u32 EmcWarmBootMrwExtra; - /* - * Specify the enable of extra Mode Register programming at - * warm boot - */ - u32 EmcWarmBootExtraModeRegWriteEnable; - /* - * Specify the enable of extra Mode Register programming at - * cold boot - */ - u32 EmcExtraModeRegWriteEnable; - - /* Specifies the EMC_MRW reset command value */ - u32 EmcMrwResetCommand; - /* Specifies the EMC Reset wait time (in microseconds) */ - u32 EmcMrwResetNInitWait; - /* Specifies the value for EMC_MRS_WAIT_CNT */ - u32 EmcMrsWaitCnt; - /* Specifies the value for EMC_MRS_WAIT_CNT2 */ - u32 EmcMrsWaitCnt2; - - /* EMC miscellaneous configurations */ - - /* Specifies the value for EMC_CFG */ - u32 EmcCfg; - /* Specifies the value for EMC_CFG_2 */ - u32 EmcCfg2; - /* Specifies the pipe bypass controls */ - u32 EmcCfgPipe; - u32 EmcCfgPipeClk; - u32 EmcFdpdCtrlCmdNoRamp; - u32 EmcCfgUpdate; - - /* Specifies the value for EMC_DBG */ - u32 EmcDbg; - u32 EmcDbgWriteMux; - - /* Specifies the value for EMC_CMDQ */ - u32 EmcCmdQ; - /* Specifies the value for EMC_MC2EMCQ */ - u32 EmcMc2EmcQ; - /* Specifies the value for EMC_DYN_SELF_REF_CONTROL */ - u32 EmcDynSelfRefControl; - - /* Specifies the value for MEM_INIT_DONE */ - u32 AhbArbitrationXbarCtrlMemInitDone; - - /* Specifies the value for EMC_CFG_DIG_DLL */ - u32 EmcCfgDigDll; - u32 EmcCfgDigDll_1; - /* Specifies the value for EMC_CFG_DIG_DLL_PERIOD */ - u32 EmcCfgDigDllPeriod; - /* Specifies the value of *DEV_SELECTN of various EMC registers */ - u32 EmcDevSelect; - - /* Specifies the value for EMC_SEL_DPD_CTRL */ - u32 EmcSelDpdCtrl; - - /* Pads trimmer delays */ - u32 EmcFdpdCtrlDq; - u32 EmcFdpdCtrlCmd; - u32 EmcPmacroIbVrefDq_0; - u32 EmcPmacroIbVrefDq_1; - u32 EmcPmacroIbVrefDqs_0; - u32 EmcPmacroIbVrefDqs_1; - u32 EmcPmacroIbRxrt; - u32 EmcCfgPipe1; - u32 EmcCfgPipe2; - - /* Specifies the value for EMC_PMACRO_QUSE_DDLL_RANK0_0 */ - u32 EmcPmacroQuseDdllRank0_0; - u32 EmcPmacroQuseDdllRank0_1; - u32 EmcPmacroQuseDdllRank0_2; - u32 EmcPmacroQuseDdllRank0_3; - u32 EmcPmacroQuseDdllRank0_4; - u32 EmcPmacroQuseDdllRank0_5; - u32 EmcPmacroQuseDdllRank1_0; - u32 EmcPmacroQuseDdllRank1_1; - u32 EmcPmacroQuseDdllRank1_2; - u32 EmcPmacroQuseDdllRank1_3; - u32 EmcPmacroQuseDdllRank1_4; - u32 EmcPmacroQuseDdllRank1_5; - - u32 EmcPmacroObDdllLongDqRank0_0; - u32 EmcPmacroObDdllLongDqRank0_1; - u32 EmcPmacroObDdllLongDqRank0_2; - u32 EmcPmacroObDdllLongDqRank0_3; - u32 EmcPmacroObDdllLongDqRank0_4; - u32 EmcPmacroObDdllLongDqRank0_5; - u32 EmcPmacroObDdllLongDqRank1_0; - u32 EmcPmacroObDdllLongDqRank1_1; - u32 EmcPmacroObDdllLongDqRank1_2; - u32 EmcPmacroObDdllLongDqRank1_3; - u32 EmcPmacroObDdllLongDqRank1_4; - u32 EmcPmacroObDdllLongDqRank1_5; - - u32 EmcPmacroObDdllLongDqsRank0_0; - u32 EmcPmacroObDdllLongDqsRank0_1; - u32 EmcPmacroObDdllLongDqsRank0_2; - u32 EmcPmacroObDdllLongDqsRank0_3; - u32 EmcPmacroObDdllLongDqsRank0_4; - u32 EmcPmacroObDdllLongDqsRank0_5; - u32 EmcPmacroObDdllLongDqsRank1_0; - u32 EmcPmacroObDdllLongDqsRank1_1; - u32 EmcPmacroObDdllLongDqsRank1_2; - u32 EmcPmacroObDdllLongDqsRank1_3; - u32 EmcPmacroObDdllLongDqsRank1_4; - u32 EmcPmacroObDdllLongDqsRank1_5; - - u32 EmcPmacroIbDdllLongDqsRank0_0; - u32 EmcPmacroIbDdllLongDqsRank0_1; - u32 EmcPmacroIbDdllLongDqsRank0_2; - u32 EmcPmacroIbDdllLongDqsRank0_3; - u32 EmcPmacroIbDdllLongDqsRank1_0; - u32 EmcPmacroIbDdllLongDqsRank1_1; - u32 EmcPmacroIbDdllLongDqsRank1_2; - u32 EmcPmacroIbDdllLongDqsRank1_3; - - u32 EmcPmacroDdllLongCmd_0; - u32 EmcPmacroDdllLongCmd_1; - u32 EmcPmacroDdllLongCmd_2; - u32 EmcPmacroDdllLongCmd_3; - u32 EmcPmacroDdllLongCmd_4; - u32 EmcPmacroDdllShortCmd_0; - u32 EmcPmacroDdllShortCmd_1; - u32 EmcPmacroDdllShortCmd_2; - - /* - * Specifies the delay after asserting CKE pin during a WarmBoot0 - * sequence (in microseconds) - */ - u32 WarmBootWait; - - /* Specifies the value for EMC_ODT_WRITE */ - u32 EmcOdtWrite; - - /* Periodic ZQ calibration */ - - /* - * Specifies the value for EMC_ZCAL_INTERVAL - * Value 0 disables ZQ calibration - */ - u32 EmcZcalInterval; - /* Specifies the value for EMC_ZCAL_WAIT_CNT */ - u32 EmcZcalWaitCnt; - /* Specifies the value for EMC_ZCAL_MRW_CMD */ - u32 EmcZcalMrwCmd; - - /* DRAM initialization sequence flow control */ - - /* Specifies the MRS command value for resetting DLL */ - u32 EmcMrsResetDll; - /* Specifies the command for ZQ initialization of device 0 */ - u32 EmcZcalInitDev0; - /* Specifies the command for ZQ initialization of device 1 */ - u32 EmcZcalInitDev1; - /* - * Specifies the wait time after programming a ZQ initialization - * command (in microseconds) - */ - u32 EmcZcalInitWait; - /* - * Specifies the enable for ZQ calibration at cold boot [bit 0] - * and warm boot [bit 1] - */ - u32 EmcZcalWarmColdBootEnables; - - /* - * Specifies the MRW command to LPDDR2 for ZQ calibration - * on warmboot - */ - /* Is issued to both devices separately */ - u32 EmcMrwLpddr2ZcalWarmBoot; - /* - * Specifies the ZQ command to DDR3 for ZQ calibration on warmboot - * Is issued to both devices separately - */ - u32 EmcZqCalDdr3WarmBoot; - u32 EmcZqCalLpDdr4WarmBoot; - /* - * Specifies the wait time for ZQ calibration on warmboot - * (in microseconds) - */ - u32 EmcZcalWarmBootWait; - /* - * Specifies the enable for DRAM Mode Register programming - * at warm boot - */ - u32 EmcMrsWarmBootEnable; - /* - * Specifies the wait time after sending an MRS DLL reset command - * in microseconds) - */ - u32 EmcMrsResetDllWait; - /* Specifies the extra MRS command to initialize mode registers */ - u32 EmcMrsExtra; - /* Specifies the extra MRS command at warm boot */ - u32 EmcWarmBootMrsExtra; - /* Specifies the EMRS command to enable the DDR2 DLL */ - u32 EmcEmrsDdr2DllEnable; - /* Specifies the MRS command to reset the DDR2 DLL */ - u32 EmcMrsDdr2DllReset; - /* Specifies the EMRS command to set OCD calibration */ - u32 EmcEmrsDdr2OcdCalib; - /* - * Specifies the wait between initializing DDR and setting OCD - * calibration (in microseconds) - */ - u32 EmcDdr2Wait; - /* Specifies the value for EMC_CLKEN_OVERRIDE */ - u32 EmcClkenOverride; - - /* - * Specifies LOG2 of the extra refresh numbers after booting - * Program 0 to disable - */ - u32 EmcExtraRefreshNum; - /* Specifies the master override for all EMC clocks */ - u32 EmcClkenOverrideAllWarmBoot; - /* Specifies the master override for all MC clocks */ - u32 McClkenOverrideAllWarmBoot; - /* Specifies digital dll period, choosing between 4 to 64 ms */ - u32 EmcCfgDigDllPeriodWarmBoot; - - /* Pad controls */ - - /* Specifies the value for PMC_VDDP_SEL */ - u32 PmcVddpSel; - /* Specifies the wait time after programming PMC_VDDP_SEL */ - u32 PmcVddpSelWait; - /* Specifies the value for PMC_DDR_PWR */ - u32 PmcDdrPwr; - /* Specifies the value for PMC_DDR_CFG */ - u32 PmcDdrCfg; - /* Specifies the value for PMC_IO_DPD3_REQ */ - u32 PmcIoDpd3Req; - /* Specifies the wait time after programming PMC_IO_DPD3_REQ */ - u32 PmcIoDpd3ReqWait; - u32 PmcIoDpd4ReqWait; - - /* Specifies the value for PMC_REG_SHORT */ - u32 PmcRegShort; - /* Specifies the value for PMC_NO_IOPOWER */ - u32 PmcNoIoPower; - - u32 PmcDdrCntrlWait; - u32 PmcDdrCntrl; - - /* Specifies the value for EMC_ACPD_CONTROL */ - u32 EmcAcpdControl; - - /* Specifies the value for EMC_SWIZZLE_RANK0_BYTE_CFG */ - ////u32 EmcSwizzleRank0ByteCfg; - /* Specifies the value for EMC_SWIZZLE_RANK0_BYTE0 */ - u32 EmcSwizzleRank0Byte0; - /* Specifies the value for EMC_SWIZZLE_RANK0_BYTE1 */ - u32 EmcSwizzleRank0Byte1; - /* Specifies the value for EMC_SWIZZLE_RANK0_BYTE2 */ - u32 EmcSwizzleRank0Byte2; - /* Specifies the value for EMC_SWIZZLE_RANK0_BYTE3 */ - u32 EmcSwizzleRank0Byte3; - /* Specifies the value for EMC_SWIZZLE_RANK1_BYTE_CFG */ - ////u32 EmcSwizzleRank1ByteCfg; - /* Specifies the value for EMC_SWIZZLE_RANK1_BYTE0 */ - u32 EmcSwizzleRank1Byte0; - /* Specifies the value for EMC_SWIZZLE_RANK1_BYTE1 */ - u32 EmcSwizzleRank1Byte1; - /* Specifies the value for EMC_SWIZZLE_RANK1_BYTE2 */ - u32 EmcSwizzleRank1Byte2; - /* Specifies the value for EMC_SWIZZLE_RANK1_BYTE3 */ - u32 EmcSwizzleRank1Byte3; - - /* Specifies the value for EMC_TXDSRVTTGEN */ - u32 EmcTxdsrvttgen; - - /* Specifies the value for EMC_DATA_BRLSHFT_0 */ - u32 EmcDataBrlshft0; - u32 EmcDataBrlshft1; - - u32 EmcDqsBrlshft0; - u32 EmcDqsBrlshft1; - - u32 EmcCmdBrlshft0; - u32 EmcCmdBrlshft1; - u32 EmcCmdBrlshft2; - u32 EmcCmdBrlshft3; - - u32 EmcQuseBrlshft0; - u32 EmcQuseBrlshft1; - u32 EmcQuseBrlshft2; - u32 EmcQuseBrlshft3; - - u32 EmcDllCfg0; - u32 EmcDllCfg1; - - u32 EmcPmcScratch1; - u32 EmcPmcScratch2; - u32 EmcPmcScratch3; - - u32 EmcPmacroPadCfgCtrl; - - u32 EmcPmacroVttgenCtrl0; - u32 EmcPmacroVttgenCtrl1; - u32 EmcPmacroVttgenCtrl2; - - u32 EmcPmacroBrickCtrlRfu1; - u32 EmcPmacroCmdBrickCtrlFdpd; - u32 EmcPmacroBrickCtrlRfu2; - u32 EmcPmacroDataBrickCtrlFdpd; - u32 EmcPmacroBgBiasCtrl0; - u32 EmcPmacroDataPadRxCtrl; - u32 EmcPmacroCmdPadRxCtrl; - u32 EmcPmacroDataRxTermMode; - u32 EmcPmacroCmdRxTermMode; - u32 EmcPmacroDataPadTxCtrl; - u32 EmcPmacroCommonPadTxCtrl; - u32 EmcPmacroCmdPadTxCtrl; - u32 EmcCfg3; - - u32 EmcPmacroTxPwrd0; - u32 EmcPmacroTxPwrd1; - u32 EmcPmacroTxPwrd2; - u32 EmcPmacroTxPwrd3; - u32 EmcPmacroTxPwrd4; - u32 EmcPmacroTxPwrd5; - - u32 EmcConfigSampleDelay; - - u32 EmcPmacroBrickMapping0; - u32 EmcPmacroBrickMapping1; - u32 EmcPmacroBrickMapping2; - - u32 EmcPmacroTxSelClkSrc0; - u32 EmcPmacroTxSelClkSrc1; - u32 EmcPmacroTxSelClkSrc2; - u32 EmcPmacroTxSelClkSrc3; - u32 EmcPmacroTxSelClkSrc4; - u32 EmcPmacroTxSelClkSrc5; - - u32 EmcPmacroDdllBypass; - - u32 EmcPmacroDdllPwrd0; - u32 EmcPmacroDdllPwrd1; - u32 EmcPmacroDdllPwrd2; - - u32 EmcPmacroCmdCtrl0; - u32 EmcPmacroCmdCtrl1; - u32 EmcPmacroCmdCtrl2; - - /* DRAM size information */ - - /* Specifies the value for MC_EMEM_ADR_CFG */ - u32 McEmemAdrCfg; - /* Specifies the value for MC_EMEM_ADR_CFG_DEV0 */ - u32 McEmemAdrCfgDev0; - /* Specifies the value for MC_EMEM_ADR_CFG_DEV1 */ - u32 McEmemAdrCfgDev1; - u32 McEmemAdrCfgChannelMask; - - /* Specifies the value for MC_EMEM_BANK_SWIZZLECfg0 */ - u32 McEmemAdrCfgBankMask0; - /* Specifies the value for MC_EMEM_BANK_SWIZZLE_CFG1 */ - u32 McEmemAdrCfgBankMask1; - /* Specifies the value for MC_EMEM_BANK_SWIZZLE_CFG2 */ - u32 McEmemAdrCfgBankMask2; - - /* - * Specifies the value for MC_EMEM_CFG which holds the external memory - * size (in KBytes) - */ - u32 McEmemCfg; - - /* MC arbitration configuration */ - - /* Specifies the value for MC_EMEM_ARB_CFG */ - u32 McEmemArbCfg; - /* Specifies the value for MC_EMEM_ARB_OUTSTANDING_REQ */ - u32 McEmemArbOutstandingReq; - - u32 McEmemArbRefpbHpCtrl; - u32 McEmemArbRefpbBankCtrl; - - /* Specifies the value for MC_EMEM_ARB_TIMING_RCD */ - u32 McEmemArbTimingRcd; - /* Specifies the value for MC_EMEM_ARB_TIMING_RP */ - u32 McEmemArbTimingRp; - /* Specifies the value for MC_EMEM_ARB_TIMING_RC */ - u32 McEmemArbTimingRc; - /* Specifies the value for MC_EMEM_ARB_TIMING_RAS */ - u32 McEmemArbTimingRas; - /* Specifies the value for MC_EMEM_ARB_TIMING_FAW */ - u32 McEmemArbTimingFaw; - /* Specifies the value for MC_EMEM_ARB_TIMING_RRD */ - u32 McEmemArbTimingRrd; - /* Specifies the value for MC_EMEM_ARB_TIMING_RAP2PRE */ - u32 McEmemArbTimingRap2Pre; - /* Specifies the value for MC_EMEM_ARB_TIMING_WAP2PRE */ - u32 McEmemArbTimingWap2Pre; - /* Specifies the value for MC_EMEM_ARB_TIMING_R2R */ - u32 McEmemArbTimingR2R; - /* Specifies the value for MC_EMEM_ARB_TIMING_W2W */ - u32 McEmemArbTimingW2W; - /* Specifies the value for MC_EMEM_ARB_TIMING_R2W */ - u32 McEmemArbTimingR2W; - /* Specifies the value for MC_EMEM_ARB_TIMING_W2R */ - u32 McEmemArbTimingW2R; - - u32 McEmemArbTimingRFCPB; - - /* Specifies the value for MC_EMEM_ARB_DA_TURNS */ - u32 McEmemArbDaTurns; - /* Specifies the value for MC_EMEM_ARB_DA_COVERS */ - u32 McEmemArbDaCovers; - /* Specifies the value for MC_EMEM_ARB_MISC0 */ - u32 McEmemArbMisc0; - /* Specifies the value for MC_EMEM_ARB_MISC1 */ - u32 McEmemArbMisc1; - u32 McEmemArbMisc2; - - /* Specifies the value for MC_EMEM_ARB_RING1_THROTTLE */ - u32 McEmemArbRing1Throttle; - /* Specifies the value for MC_EMEM_ARB_OVERRIDE */ - u32 McEmemArbOverride; - /* Specifies the value for MC_EMEM_ARB_OVERRIDE_1 */ - u32 McEmemArbOverride1; - /* Specifies the value for MC_EMEM_ARB_RSV */ - u32 McEmemArbRsv; - - u32 McDaCfg0; - u32 McEmemArbTimingCcdmw; - - /* Specifies the value for MC_CLKEN_OVERRIDE */ - u32 McClkenOverride; - - /* Specifies the value for MC_STAT_CONTROL */ - u32 McStatControl; - - /* Specifies the value for MC_VIDEO_PROTECT_BOM */ - u32 McVideoProtectBom; - /* Specifies the value for MC_VIDEO_PROTECT_BOM_ADR_HI */ - u32 McVideoProtectBomAdrHi; - /* Specifies the value for MC_VIDEO_PROTECT_SIZE_MB */ - u32 McVideoProtectSizeMb; - /* Specifies the value for MC_VIDEO_PROTECT_VPR_OVERRIDE */ - u32 McVideoProtectVprOverride; - /* Specifies the value for MC_VIDEO_PROTECT_VPR_OVERRIDE1 */ - u32 McVideoProtectVprOverride1; - /* Specifies the value for MC_VIDEO_PROTECT_GPU_OVERRIDE_0 */ - u32 McVideoProtectGpuOverride0; - /* Specifies the value for MC_VIDEO_PROTECT_GPU_OVERRIDE_1 */ - u32 McVideoProtectGpuOverride1; - /* Specifies the value for MC_SEC_CARVEOUT_BOM */ - u32 McSecCarveoutBom; - /* Specifies the value for MC_SEC_CARVEOUT_ADR_HI */ - u32 McSecCarveoutAdrHi; - /* Specifies the value for MC_SEC_CARVEOUT_SIZE_MB */ - u32 McSecCarveoutSizeMb; - /* Specifies the value for MC_VIDEO_PROTECT_REG_CTRL. - VIDEO_PROTECT_WRITEAccess */ - u32 McVideoProtectWriteAccess; - /* Specifies the value for MC_SEC_CARVEOUT_REG_CTRL. - SEC_CARVEOUT_WRITEAccess */ - u32 McSecCarveoutProtectWriteAccess; - - /* Write-Protect Regions (WPR) */ - u32 McGeneralizedCarveout1Bom; - u32 McGeneralizedCarveout1BomHi; - u32 McGeneralizedCarveout1Size128kb; - u32 McGeneralizedCarveout1Access0; - u32 McGeneralizedCarveout1Access1; - u32 McGeneralizedCarveout1Access2; - u32 McGeneralizedCarveout1Access3; - u32 McGeneralizedCarveout1Access4; - u32 McGeneralizedCarveout1ForceInternalAccess0; - u32 McGeneralizedCarveout1ForceInternalAccess1; - u32 McGeneralizedCarveout1ForceInternalAccess2; - u32 McGeneralizedCarveout1ForceInternalAccess3; - u32 McGeneralizedCarveout1ForceInternalAccess4; - u32 McGeneralizedCarveout1Cfg0; - - u32 McGeneralizedCarveout2Bom; - u32 McGeneralizedCarveout2BomHi; - u32 McGeneralizedCarveout2Size128kb; - u32 McGeneralizedCarveout2Access0; - u32 McGeneralizedCarveout2Access1; - u32 McGeneralizedCarveout2Access2; - u32 McGeneralizedCarveout2Access3; - u32 McGeneralizedCarveout2Access4; - u32 McGeneralizedCarveout2ForceInternalAccess0; - u32 McGeneralizedCarveout2ForceInternalAccess1; - u32 McGeneralizedCarveout2ForceInternalAccess2; - u32 McGeneralizedCarveout2ForceInternalAccess3; - u32 McGeneralizedCarveout2ForceInternalAccess4; - u32 McGeneralizedCarveout2Cfg0; - - u32 McGeneralizedCarveout3Bom; - u32 McGeneralizedCarveout3BomHi; - u32 McGeneralizedCarveout3Size128kb; - u32 McGeneralizedCarveout3Access0; - u32 McGeneralizedCarveout3Access1; - u32 McGeneralizedCarveout3Access2; - u32 McGeneralizedCarveout3Access3; - u32 McGeneralizedCarveout3Access4; - u32 McGeneralizedCarveout3ForceInternalAccess0; - u32 McGeneralizedCarveout3ForceInternalAccess1; - u32 McGeneralizedCarveout3ForceInternalAccess2; - u32 McGeneralizedCarveout3ForceInternalAccess3; - u32 McGeneralizedCarveout3ForceInternalAccess4; - u32 McGeneralizedCarveout3Cfg0; - - u32 McGeneralizedCarveout4Bom; - u32 McGeneralizedCarveout4BomHi; - u32 McGeneralizedCarveout4Size128kb; - u32 McGeneralizedCarveout4Access0; - u32 McGeneralizedCarveout4Access1; - u32 McGeneralizedCarveout4Access2; - u32 McGeneralizedCarveout4Access3; - u32 McGeneralizedCarveout4Access4; - u32 McGeneralizedCarveout4ForceInternalAccess0; - u32 McGeneralizedCarveout4ForceInternalAccess1; - u32 McGeneralizedCarveout4ForceInternalAccess2; - u32 McGeneralizedCarveout4ForceInternalAccess3; - u32 McGeneralizedCarveout4ForceInternalAccess4; - u32 McGeneralizedCarveout4Cfg0; - - u32 McGeneralizedCarveout5Bom; - u32 McGeneralizedCarveout5BomHi; - u32 McGeneralizedCarveout5Size128kb; - u32 McGeneralizedCarveout5Access0; - u32 McGeneralizedCarveout5Access1; - u32 McGeneralizedCarveout5Access2; - u32 McGeneralizedCarveout5Access3; - u32 McGeneralizedCarveout5Access4; - u32 McGeneralizedCarveout5ForceInternalAccess0; - u32 McGeneralizedCarveout5ForceInternalAccess1; - u32 McGeneralizedCarveout5ForceInternalAccess2; - u32 McGeneralizedCarveout5ForceInternalAccess3; - u32 McGeneralizedCarveout5ForceInternalAccess4; - u32 McGeneralizedCarveout5Cfg0; - - /* Specifies enable for CA training */ - u32 EmcCaTrainingEnable; - - /* Set if bit 6 select is greater than bit 7 select; uses aremc. - spec packet SWIZZLE_BIT6_GT_BIT7 */ - u32 SwizzleRankByteEncode; - /* Specifies enable and offset for patched boot ROM write */ - u32 BootRomPatchControl; - /* Specifies data for patched boot ROM write */ - u32 BootRomPatchData; - - /* Specifies the value for MC_MTS_CARVEOUT_BOM */ - u32 McMtsCarveoutBom; - /* Specifies the value for MC_MTS_CARVEOUT_ADR_HI */ - u32 McMtsCarveoutAdrHi; - /* Specifies the value for MC_MTS_CARVEOUT_SIZE_MB */ - u32 McMtsCarveoutSizeMb; - /* Specifies the value for MC_MTS_CARVEOUT_REG_CTRL */ - u32 McMtsCarveoutRegCtrl; - - /* End */ -}; - -#endif /* __SOC_NVIDIA_TEGRA210_SDRAM_PARAM_H__ */ diff --git a/bdk/mem/sdram_lp0_param_t210b01.h b/bdk/mem/sdram_lp0_param_t210b01.h deleted file mode 100644 index f987a1e..0000000 --- a/bdk/mem/sdram_lp0_param_t210b01.h +++ /dev/null @@ -1,990 +0,0 @@ -/* - * Copyright (c) 2020 CTCaer - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __TEGRA210B01_SDRAM_PARAM_H__ -#define __TEGRA210B01_SDRAM_PARAM_H__ - -#include - -struct sdram_params_t210b01 -{ - /* Specifies the type of memory device */ - u32 memory_type; - - /* MC/EMC clock source configuration */ - - /* Specifies the M value for PllM */ - u32 pllm_input_divider; - /* Specifies the N value for PllM */ - u32 pllm_feedback_divider; - /* Specifies the time to wait for PLLM to lock (in microseconds) */ - u32 pllm_stable_time; - /* Specifies misc. control bits */ - u32 pllm_setup_control; - /* Specifies the P value for PLLM */ - u32 pllm_post_divider; - /* Specifies value for Charge Pump Gain Control */ - u32 pllm_kcp; - /* Specifies VCO gain */ - u32 pllm_kvco; - /* Spare BCT param */ - u32 emc_bct_spare0; - /* Spare BCT param */ - u32 emc_bct_spare1; - /* Spare BCT param */ - u32 emc_bct_spare2; - /* Spare BCT param */ - u32 emc_bct_spare3; - /* Spare BCT param */ - u32 emc_bct_spare4; - /* Spare BCT param */ - u32 emc_bct_spare5; - /* Spare BCT param */ - u32 emc_bct_spare6; - /* Spare BCT param */ - u32 emc_bct_spare7; - /* Spare BCT param */ - u32 emc_bct_spare8; - /* Spare BCT param */ - u32 emc_bct_spare9; - /* Spare BCT param */ - u32 emc_bct_spare10; - /* Spare BCT param */ - u32 emc_bct_spare11; - /* Spare BCT param */ - u32 emc_bct_spare12; - /* Spare BCT param */ - u32 emc_bct_spare13; - /* Spare BCT param */ - u32 emc_bct_spare_secure0; - /* Spare BCT param */ - u32 emc_bct_spare_secure1; - /* Spare BCT param */ - u32 emc_bct_spare_secure2; - /* Spare BCT param */ - u32 emc_bct_spare_secure3; - /* Spare BCT param */ - u32 emc_bct_spare_secure4; - /* Spare BCT param */ - u32 emc_bct_spare_secure5; - /* Spare BCT param */ - u32 emc_bct_spare_secure6; - /* Spare BCT param */ - u32 emc_bct_spare_secure7; - /* Spare BCT param */ - u32 emc_bct_spare_secure8; - /* Spare BCT param */ - u32 emc_bct_spare_secure9; - /* Spare BCT param */ - u32 emc_bct_spare_secure10; - /* Spare BCT param */ - u32 emc_bct_spare_secure11; - /* Spare BCT param */ - u32 emc_bct_spare_secure12; - /* Spare BCT param */ - u32 emc_bct_spare_secure13; - /* Spare BCT param */ - u32 emc_bct_spare_secure14; - /* Spare BCT param */ - u32 emc_bct_spare_secure15; - /* Spare BCT param */ - u32 emc_bct_spare_secure16; - /* Spare BCT param */ - u32 emc_bct_spare_secure17; - /* Spare BCT param */ - u32 emc_bct_spare_secure18; - /* Spare BCT param */ - u32 emc_bct_spare_secure19; - /* Spare BCT param */ - u32 emc_bct_spare_secure20; - /* Spare BCT param */ - u32 emc_bct_spare_secure21; - /* Spare BCT param */ - u32 emc_bct_spare_secure22; - /* Spare BCT param */ - u32 emc_bct_spare_secure23; - - /* Defines EMC_2X_CLK_SRC, EMC_2X_CLK_DIVISOR, EMC_INVERT_DCD */ - u32 emc_clock_source; - u32 emc_clock_source_dll; - - /* Defines possible override for PLLLM_MISC2 */ - u32 clk_rst_pllm_misc20_override; - /* enables override for PLLLM_MISC2 */ - u32 clk_rst_pllm_misc20_override_enable; - /* defines CLK_ENB_MC1 in register clk_rst_controller_clk_enb_w_clr */ - u32 clear_clock2_mc1; - - /* Auto-calibration of EMC pads */ - - /* Specifies the value for EMC_AUTO_CAL_INTERVAL */ - u32 emc_auto_cal_interval; - /* - * Specifies the value for EMC_AUTO_CAL_CONFIG - * Note: Trigger bits are set by the SDRAM code. - */ - u32 emc_auto_cal_config; - - /* Specifies the value for EMC_AUTO_CAL_CONFIG2 */ - u32 emc_auto_cal_config2; - - /* Specifies the value for EMC_AUTO_CAL_CONFIG3 */ - u32 emc_auto_cal_config3; - u32 emc_auto_cal_config4; - u32 emc_auto_cal_config5; - u32 emc_auto_cal_config6; - u32 emc_auto_cal_config7; - u32 emc_auto_cal_config8; - u32 emc_auto_cal_config9; - - /* Specifies the value for EMC_AUTO_CAL_VREF_SEL_0 */ - u32 emc_auto_cal_vref_sel0; - u32 emc_auto_cal_vref_sel1; - - /* Specifies the value for EMC_AUTO_CAL_CHANNEL */ - u32 emc_auto_cal_channel; - - /* Specifies the value for EMC_PMACRO_AUTOCAL_CFG_0 */ - u32 emc_pmacro_auto_cal_cfg0; - u32 emc_pmacro_auto_cal_cfg1; - u32 emc_pmacro_auto_cal_cfg2; - - u32 emc_pmacro_rx_term; - u32 emc_pmacro_dq_tx_drive; - u32 emc_pmacro_ca_tx_drive; - u32 emc_pmacro_cmd_tx_drive; - u32 emc_pmacro_auto_cal_common; - u32 emc_pmacro_zcrtl; - - /* - * Specifies the time for the calibration - * to stabilize (in microseconds) - */ - u32 emc_auto_cal_wait; - - u32 emc_xm2_comp_pad_ctrl; - u32 emc_xm2_comp_pad_ctrl2; - u32 emc_xm2_comp_pad_ctrl3; - - /* - * DRAM size information - * Specifies the value for EMC_ADR_CFG - */ - u32 emc_adr_cfg; - - /* - * Specifies the time to wait after asserting pin - * CKE (in microseconds) - */ - u32 emc_pin_program_wait; - /* Specifies the extra delay before/after pin RESET/CKE command */ - u32 emc_pin_extra_wait; - - u32 emc_pin_gpio_enable; - u32 emc_pin_gpio; - - /* - * Specifies the extra delay after the first writing - * of EMC_TIMING_CONTROL - */ - u32 emc_timing_control_wait; - - /* Timing parameters required for the SDRAM */ - - /* Specifies the value for EMC_RC */ - u32 emc_rc; - /* Specifies the value for EMC_RFC */ - u32 emc_rfc; - - u32 emc_rfc_pb; - u32 emc_ref_ctrl2; - - /* Specifies the value for EMC_RFC_SLR */ - u32 emc_rfc_slr; - /* Specifies the value for EMC_RAS */ - u32 emc_ras; - /* Specifies the value for EMC_RP */ - u32 emc_rp; - /* Specifies the value for EMC_R2R */ - u32 emc_r2r; - /* Specifies the value for EMC_W2W */ - u32 emc_w2w; - /* Specifies the value for EMC_R2W */ - u32 emc_r2w; - /* Specifies the value for EMC_W2R */ - u32 emc_w2r; - /* Specifies the value for EMC_R2P */ - u32 emc_r2p; - /* Specifies the value for EMC_W2P */ - u32 emc_w2p; - /* Specifies the value for EMC_RD_RCD */ - - u32 emc_tppd; - u32 emc_trtm; - u32 emc_twtm; - u32 emc_tratm; - u32 emc_twatm; - u32 emc_tr2ref; - u32 emc_ccdmw; - - u32 emc_rd_rcd; - /* Specifies the value for EMC_WR_RCD */ - u32 emc_wr_rcd; - /* Specifies the value for EMC_RRD */ - u32 emc_rrd; - /* Specifies the value for EMC_REXT */ - u32 emc_rext; - /* Specifies the value for EMC_WEXT */ - u32 emc_wext; - /* Specifies the value for EMC_WDV */ - u32 emc_wdv; - - u32 emc_wdv_chk; - u32 emc_wsv; - u32 emc_wev; - - /* Specifies the value for EMC_WDV_MASK */ - u32 emc_wdv_mask; - - u32 emc_ws_duration; - u32 emc_we_duration; - - /* Specifies the value for EMC_QUSE */ - u32 emc_quse; - /* Specifies the value for EMC_QUSE_WIDTH */ - u32 emc_quse_width; - /* Specifies the value for EMC_IBDLY */ - u32 emc_ibdly; - - u32 emc_obdly; - - /* Specifies the value for EMC_EINPUT */ - u32 emc_einput; - /* Specifies the value for EMC_EINPUT_DURATION */ - u32 emc_einput_duration; - /* Specifies the value for EMC_PUTERM_EXTRA */ - u32 emc_puterm_extra; - /* Specifies the value for EMC_PUTERM_WIDTH */ - u32 emc_puterm_width; - - u32 emc_qrst; - u32 emc_qsafe; - u32 emc_rdv; - u32 emc_rdv_mask; - - u32 emc_rdv_early; - u32 emc_rdv_early_mask; - - /* Specifies the value for EMC_QPOP */ - u32 emc_qpop; - - /* Specifies the value for EMC_REFRESH */ - u32 emc_refresh; - /* Specifies the value for EMC_BURST_REFRESH_NUM */ - u32 emc_burst_refresh_num; - /* Specifies the value for EMC_PRE_REFRESH_REQ_CNT */ - u32 emc_prerefresh_req_cnt; - /* Specifies the value for EMC_PDEX2WR */ - u32 emc_pdex2wr; - /* Specifies the value for EMC_PDEX2RD */ - u32 emc_pdex2rd; - /* Specifies the value for EMC_PCHG2PDEN */ - u32 emc_pchg2pden; - /* Specifies the value for EMC_ACT2PDEN */ - u32 emc_act2pden; - /* Specifies the value for EMC_AR2PDEN */ - u32 emc_ar2pden; - /* Specifies the value for EMC_RW2PDEN */ - u32 emc_rw2pden; - - u32 emc_cke2pden; - u32 emc_pdex2che; - u32 emc_pdex2mrr; - - /* Specifies the value for EMC_TXSR */ - u32 emc_txsr; - /* Specifies the value for EMC_TXSRDLL */ - u32 emc_txsr_dll; - /* Specifies the value for EMC_TCKE */ - u32 emc_tcke; - /* Specifies the value for EMC_TCKESR */ - u32 emc_tckesr; - /* Specifies the value for EMC_TPD */ - u32 emc_tpd; - /* Specifies the value for EMC_TFAW */ - u32 emc_tfaw; - /* Specifies the value for EMC_TRPAB */ - u32 emc_trpab; - /* Specifies the value for EMC_TCLKSTABLE */ - u32 emc_tclkstable; - /* Specifies the value for EMC_TCLKSTOP */ - u32 emc_tclkstop; - /* Specifies the value for EMC_TREFBW */ - u32 emc_trefbw; - - /* FBIO configuration values */ - - /* Specifies the value for EMC_FBIO_CFG5 */ - u32 emc_fbio_cfg5; - /* Specifies the value for EMC_FBIO_CFG7 */ - u32 emc_fbio_cfg7; - u32 emc_fbio_cfg8; - - /* Command mapping for CMD brick 0 */ - u32 emc_cmd_mapping_cmd0_0; - u32 emc_cmd_mapping_cmd0_1; - u32 emc_cmd_mapping_cmd0_2; - u32 emc_cmd_mapping_cmd1_0; - u32 emc_cmd_mapping_cmd1_1; - u32 emc_cmd_mapping_cmd1_2; - u32 emc_cmd_mapping_cmd2_0; - u32 emc_cmd_mapping_cmd2_1; - u32 emc_cmd_mapping_cmd2_2; - u32 emc_cmd_mapping_cmd3_0; - u32 emc_cmd_mapping_cmd3_1; - u32 emc_cmd_mapping_cmd3_2; - u32 emc_cmd_mapping_byte; - - /* Specifies the value for EMC_FBIO_SPARE */ - u32 emc_fbio_spare; - - /* Specifies the value for EMC_CFG_RSV */ - u32 emc_cfg_rsv; - - /* MRS command values */ - - /* Specifies the value for EMC_MRS */ - u32 emc_mrs; - /* Specifies the MP0 command to initialize mode registers */ - u32 emc_emrs; - /* Specifies the MP2 command to initialize mode registers */ - u32 emc_emrs2; - /* Specifies the MP3 command to initialize mode registers */ - u32 emc_emrs3; - /* Specifies the programming to LPDDR2 Mode Register 1 at cold boot */ - u32 emc_mrw1; - /* Specifies the programming to LPDDR2 Mode Register 2 at cold boot */ - u32 emc_mrw2; - /* Specifies the programming to LPDDR2 Mode Register 3 at cold boot */ - u32 emc_mrw3; - /* Specifies the programming to LPDDR2 Mode Register 11 at cold boot */ - u32 emc_mrw4; - - /* Specifies the programming to LPDDR4 Mode Register 3 at cold boot */ - u32 emc_mrw6; - /* Specifies the programming to LPDDR4 Mode Register 11 at cold boot */ - u32 emc_mrw8; - /* Specifies the programming to LPDDR4 Mode Register 11 at cold boot */ - u32 emc_mrw9; - /* Specifies the programming to LPDDR4 Mode Register 12 at cold boot */ - u32 emc_mrw10; - /* Specifies the programming to LPDDR4 Mode Register 14 at cold boot */ - u32 emc_mrw12; - /* Specifies the programming to LPDDR4 Mode Register 14 at cold boot */ - u32 emc_mrw13; - /* Specifies the programming to LPDDR4 Mode Register 22 at cold boot */ - u32 emc_mrw14; - - /* - * Specifies the programming to extra LPDDR2 Mode Register - * at cold boot - */ - u32 emc_mrw_extra; - /* - * Specifies the programming to extra LPDDR2 Mode Register - * at warm boot - */ - u32 emc_warm_boot_mrw_extra; - /* - * Specify the enable of extra Mode Register programming at - * warm boot - */ - u32 emc_warm_boot_extramode_reg_write_enable; - /* - * Specify the enable of extra Mode Register programming at - * cold boot - */ - u32 emc_extramode_reg_write_enable; - - /* Specifies the EMC_MRW reset command value */ - u32 emc_mrw_reset_command; - /* Specifies the EMC Reset wait time (in microseconds) */ - u32 emc_mrw_reset_ninit_wait; - /* Specifies the value for EMC_MRS_WAIT_CNT */ - u32 emc_mrs_wait_cnt; - /* Specifies the value for EMC_MRS_WAIT_CNT2 */ - u32 emc_mrs_wait_cnt2; - - /* EMC miscellaneous configurations */ - - /* Specifies the value for EMC_CFG */ - u32 emc_cfg; - /* Specifies the value for EMC_CFG_2 */ - u32 emc_cfg2; - /* Specifies the pipe bypass controls */ - u32 emc_cfg_pipe; - - u32 emc_cfg_pipe_clk; - u32 emc_fdpd_ctrl_cmd_no_ramp; - u32 emc_cfg_update; - - /* Specifies the value for EMC_DBG */ - u32 emc_dbg; - - u32 emc_dbg_write_mux; - - /* Specifies the value for EMC_CMDQ */ - u32 emc_cmd_q; - /* Specifies the value for EMC_MC2EMCQ */ - u32 emc_mc2emc_q; - /* Specifies the value for EMC_DYN_SELF_REF_CONTROL */ - u32 emc_dyn_self_ref_control; - - /* Specifies the value for MEM_INIT_DONE */ - u32 ahb_arbitration_xbar_ctrl_meminit_done; - - /* Specifies the value for EMC_CFG_DIG_DLL */ - u32 emc_cfg_dig_dll; - u32 emc_cfg_dig_dll_1; - - /* Specifies the value for EMC_CFG_DIG_DLL_PERIOD */ - u32 emc_cfg_dig_dll_period; - /* Specifies the value of *DEV_SELECTN of various EMC registers */ - u32 emc_dev_select; - - /* Specifies the value for EMC_SEL_DPD_CTRL */ - u32 emc_sel_dpd_ctrl; - - /* Pads trimmer delays */ - u32 emc_fdpd_ctrl_dq; - u32 emc_fdpd_ctrl_cmd; - u32 emc_pmacro_ib_vref_dq_0; - u32 emc_pmacro_ib_vref_dq_1; - u32 emc_pmacro_ib_vref_dqs_0; - u32 emc_pmacro_ib_vref_dqs_1; - u32 emc_pmacro_ib_rxrt; - u32 emc_cfg_pipe1; - u32 emc_cfg_pipe2; - - /* Specifies the value for EMC_PMACRO_QUSE_DDLL_RANK0_0 */ - u32 emc_pmacro_quse_ddll_rank0_0; - u32 emc_pmacro_quse_ddll_rank0_1; - u32 emc_pmacro_quse_ddll_rank0_2; - u32 emc_pmacro_quse_ddll_rank0_3; - u32 emc_pmacro_quse_ddll_rank0_4; - u32 emc_pmacro_quse_ddll_rank0_5; - u32 emc_pmacro_quse_ddll_rank1_0; - u32 emc_pmacro_quse_ddll_rank1_1; - u32 emc_pmacro_quse_ddll_rank1_2; - u32 emc_pmacro_quse_ddll_rank1_3; - u32 emc_pmacro_quse_ddll_rank1_4; - u32 emc_pmacro_quse_ddll_rank1_5; - - u32 emc_pmacro_ob_ddll_long_dq_rank0_0; - u32 emc_pmacro_ob_ddll_long_dq_rank0_1; - u32 emc_pmacro_ob_ddll_long_dq_rank0_2; - u32 emc_pmacro_ob_ddll_long_dq_rank0_3; - u32 emc_pmacro_ob_ddll_long_dq_rank0_4; - u32 emc_pmacro_ob_ddll_long_dq_rank0_5; - u32 emc_pmacro_ob_ddll_long_dq_rank1_0; - u32 emc_pmacro_ob_ddll_long_dq_rank1_1; - u32 emc_pmacro_ob_ddll_long_dq_rank1_2; - u32 emc_pmacro_ob_ddll_long_dq_rank1_3; - u32 emc_pmacro_ob_ddll_long_dq_rank1_4; - u32 emc_pmacro_ob_ddll_long_dq_rank1_5; - - u32 emc_pmacro_ob_ddll_long_dqs_rank0_0; - u32 emc_pmacro_ob_ddll_long_dqs_rank0_1; - u32 emc_pmacro_ob_ddll_long_dqs_rank0_2; - u32 emc_pmacro_ob_ddll_long_dqs_rank0_3; - u32 emc_pmacro_ob_ddll_long_dqs_rank0_4; - u32 emc_pmacro_ob_ddll_long_dqs_rank0_5; - u32 emc_pmacro_ob_ddll_long_dqs_rank1_0; - u32 emc_pmacro_ob_ddll_long_dqs_rank1_1; - u32 emc_pmacro_ob_ddll_long_dqs_rank1_2; - u32 emc_pmacro_ob_ddll_long_dqs_rank1_3; - u32 emc_pmacro_ob_ddll_long_dqs_rank1_4; - u32 emc_pmacro_ob_ddll_long_dqs_rank1_5; - - u32 emc_pmacro_ib_ddll_long_dqs_rank0_0; - u32 emc_pmacro_ib_ddll_long_dqs_rank0_1; - u32 emc_pmacro_ib_ddll_long_dqs_rank0_2; - u32 emc_pmacro_ib_ddll_long_dqs_rank0_3; - u32 emc_pmacro_ib_ddll_long_dqs_rank1_0; - u32 emc_pmacro_ib_ddll_long_dqs_rank1_1; - u32 emc_pmacro_ib_ddll_long_dqs_rank1_2; - u32 emc_pmacro_ib_ddll_long_dqs_rank1_3; - - u32 emc_pmacro_ddll_long_cmd_0; - u32 emc_pmacro_ddll_long_cmd_1; - u32 emc_pmacro_ddll_long_cmd_2; - u32 emc_pmacro_ddll_long_cmd_3; - u32 emc_pmacro_ddll_long_cmd_4; - u32 emc_pmacro_ddll_short_cmd_0; - u32 emc_pmacro_ddll_short_cmd_1; - u32 emc_pmacro_ddll_short_cmd_2; - - u32 emc_pmacro_ddll_periodic_offset; - - /* - * Specifies the delay after asserting CKE pin during a WarmBoot0 - * sequence (in microseconds) - */ - u32 warm_boot_wait; - - /* Specifies the value for EMC_ODT_WRITE */ - u32 emc_odt_write; - - /* Periodic ZQ calibration */ - - /* - * Specifies the value for EMC_ZCAL_INTERVAL - * Value 0 disables ZQ calibration - */ - u32 emc_zcal_interval; - /* Specifies the value for EMC_ZCAL_WAIT_CNT */ - u32 emc_zcal_wait_cnt; - /* Specifies the value for EMC_ZCAL_MRW_CMD */ - u32 emc_zcal_mrw_cmd; - - /* DRAM initialization sequence flow control */ - - /* Specifies the MRS command value for resetting DLL */ - u32 emc_mrs_reset_dll; - /* Specifies the command for ZQ initialization of device 0 */ - u32 emc_zcal_init_dev0; - /* Specifies the command for ZQ initialization of device 1 */ - u32 emc_zcal_init_dev1; - /* - * Specifies the wait time after programming a ZQ initialization - * command (in microseconds) - */ - u32 emc_zcal_init_wait; - /* - * Specifies the enable for ZQ calibration at cold boot [bit 0] - * and warm boot [bit 1] - */ - u32 emc_zcal_warm_cold_boot_enables; - - /* - * Specifies the MRW command to LPDDR2 for ZQ calibration - * on warmboot - */ - /* Is issued to both devices separately */ - u32 emc_mrw_lpddr2zcal_warm_boot; - /* - * Specifies the ZQ command to DDR3 for ZQ calibration on warmboot - * Is issued to both devices separately - */ - u32 emc_zqcal_ddr3_warm_boot; - - u32 emc_zqcal_lpddr4_warm_boot; - - /* - * Specifies the wait time for ZQ calibration on warmboot - * (in microseconds) - */ - u32 emc_zcal_warm_boot_wait; - /* - * Specifies the enable for DRAM Mode Register programming - * at warm boot - */ - u32 emc_mrs_warm_boot_enable; - /* - * Specifies the wait time after sending an MRS DLL reset command - * in microseconds) - */ - u32 emc_mrs_reset_dll_wait; - /* Specifies the extra MRS command to initialize mode registers */ - u32 emc_mrs_extra; - /* Specifies the extra MRS command at warm boot */ - u32 emc_warm_boot_mrs_extra; - /* Specifies the EMRS command to enable the DDR2 DLL */ - u32 emc_emrs_ddr2_dll_enable; - /* Specifies the MRS command to reset the DDR2 DLL */ - u32 emc_mrs_ddr2_dll_reset; - /* Specifies the EMRS command to set OCD calibration */ - u32 emc_emrs_ddr2_ocd_calib; - /* - * Specifies the wait between initializing DDR and setting OCD - * calibration (in microseconds) - */ - u32 emc_ddr2_wait; - /* Specifies the value for EMC_CLKEN_OVERRIDE */ - u32 emc_clken_override; - /* - * Specifies LOG2 of the extra refresh numbers after booting - * Program 0 to disable - */ - u32 emc_extra_refresh_num; - /* Specifies the master override for all EMC clocks */ - u32 emc_clken_override_allwarm_boot; - /* Specifies the master override for all MC clocks */ - u32 mc_clken_override_allwarm_boot; - /* Specifies digital dll period, choosing between 4 to 64 ms */ - u32 emc_cfg_dig_dll_period_warm_boot; - - /* Pad controls */ - - /* Specifies the value for PMC_VDDP_SEL */ - u32 pmc_vddp_sel; - /* Specifies the wait time after programming PMC_VDDP_SEL */ - u32 pmc_vddp_sel_wait; - /* Specifies the value for PMC_DDR_CFG */ - u32 pmc_ddr_cfg; - /* Specifies the value for PMC_IO_DPD3_REQ */ - u32 pmc_io_dpd3_req; - /* Specifies the wait time after programming PMC_IO_DPD3_REQ */ - u32 pmc_io_dpd3_req_wait; - - u32 pmc_io_dpd4_req_wait; - - /* Specifies the value for PMC_REG_SHORT */ - u32 pmc_reg_short; - /* Specifies the value for PMC_NO_IOPOWER */ - u32 pmc_no_io_power; - - u32 pmc_ddr_ctrl_wait; - u32 pmc_ddr_ctrl; - - /* Specifies the value for EMC_ACPD_CONTROL */ - u32 emc_acpd_control; - - /* Specifies the value for EMC_SWIZZLE_RANK0_BYTE0 */ - u32 emc_swizzle_rank0_byte0; - /* Specifies the value for EMC_SWIZZLE_RANK0_BYTE1 */ - u32 emc_swizzle_rank0_byte1; - /* Specifies the value for EMC_SWIZZLE_RANK0_BYTE2 */ - u32 emc_swizzle_rank0_byte2; - /* Specifies the value for EMC_SWIZZLE_RANK0_BYTE3 */ - u32 emc_swizzle_rank0_byte3; - /* Specifies the value for EMC_SWIZZLE_RANK1_BYTE0 */ - u32 emc_swizzle_rank1_byte0; - /* Specifies the value for EMC_SWIZZLE_RANK1_BYTE1 */ - u32 emc_swizzle_rank1_byte1; - /* Specifies the value for EMC_SWIZZLE_RANK1_BYTE2 */ - u32 emc_swizzle_rank1_byte2; - /* Specifies the value for EMC_SWIZZLE_RANK1_BYTE3 */ - u32 emc_swizzle_rank1_byte3; - - /* Specifies the value for EMC_TXDSRVTTGEN */ - u32 emc_txdsrvttgen; - - /* Specifies the value for EMC_DATA_BRLSHFT_0 */ - u32 emc_data_brlshft0; - u32 emc_data_brlshft1; - - u32 emc_dqs_brlshft0; - u32 emc_dqs_brlshft1; - - u32 emc_cmd_brlshft0; - u32 emc_cmd_brlshft1; - u32 emc_cmd_brlshft2; - u32 emc_cmd_brlshft3; - - u32 emc_quse_brlshft0; - u32 emc_quse_brlshft1; - u32 emc_quse_brlshft2; - u32 emc_quse_brlshft3; - - u32 emc_dll_cfg0; - u32 emc_dll_cfg1; - - u32 emc_pmc_scratch1; - u32 emc_pmc_scratch2; - u32 emc_pmc_scratch3; - - u32 emc_pmacro_pad_cfg_ctrl; - - u32 emc_pmacro_vttgen_ctrl0; - u32 emc_pmacro_vttgen_ctrl1; - u32 emc_pmacro_vttgen_ctrl2; - u32 emc_pmacro_dsr_vttgen_ctrl0; - u32 emc_pmacro_brick_ctrl_rfu1; - u32 emc_pmacro_cmd_brick_ctrl_fdpd; - u32 emc_pmacro_brick_ctrl_rfu2; - u32 emc_pmacro_data_brick_ctrl_fdpd; - u32 emc_pmacro_bg_bias_ctrl0; - u32 emc_pmacro_data_pad_rx_ctrl; - u32 emc_pmacro_cmd_pad_rx_ctrl; - u32 emc_pmacro_data_rx_term_mode; - u32 emc_pmacro_cmd_rx_term_mode; - u32 emc_pmacro_data_pad_tx_ctrl; - u32 emc_pmacro_cmd_pad_tx_ctrl; - u32 emc_cfg3; - - u32 emc_pmacro_tx_pwrd0; - u32 emc_pmacro_tx_pwrd1; - u32 emc_pmacro_tx_pwrd2; - u32 emc_pmacro_tx_pwrd3; - u32 emc_pmacro_tx_pwrd4; - u32 emc_pmacro_tx_pwrd5; - - u32 emc_config_sample_delay; - - u32 emc_pmacro_brick_mapping0; - u32 emc_pmacro_brick_mapping1; - u32 emc_pmacro_brick_mapping2; - - u32 emc_pmacro_tx_sel_clk_src0; - u32 emc_pmacro_tx_sel_clk_src1; - u32 emc_pmacro_tx_sel_clk_src2; - u32 emc_pmacro_tx_sel_clk_src3; - u32 emc_pmacro_tx_sel_clk_src4; - u32 emc_pmacro_tx_sel_clk_src5; - - u32 emc_pmacro_perbit_fgcg_ctrl0; - u32 emc_pmacro_perbit_fgcg_ctrl1; - u32 emc_pmacro_perbit_fgcg_ctrl2; - u32 emc_pmacro_perbit_fgcg_ctrl3; - u32 emc_pmacro_perbit_fgcg_ctrl4; - u32 emc_pmacro_perbit_fgcg_ctrl5; - u32 emc_pmacro_perbit_rfu_ctrl0; - u32 emc_pmacro_perbit_rfu_ctrl1; - u32 emc_pmacro_perbit_rfu_ctrl2; - u32 emc_pmacro_perbit_rfu_ctrl3; - u32 emc_pmacro_perbit_rfu_ctrl4; - u32 emc_pmacro_perbit_rfu_ctrl5; - u32 emc_pmacro_perbit_rfu1_ctrl0; - u32 emc_pmacro_perbit_rfu1_ctrl1; - u32 emc_pmacro_perbit_rfu1_ctrl2; - u32 emc_pmacro_perbit_rfu1_ctrl3; - u32 emc_pmacro_perbit_rfu1_ctrl4; - u32 emc_pmacro_perbit_rfu1_ctrl5; - - u32 emc_pmacro_data_pi_ctrl; - u32 emc_pmacro_cmd_pi_ctrl; - - u32 emc_pmacro_ddll_bypass; - - u32 emc_pmacro_ddll_pwrd0; - u32 emc_pmacro_ddll_pwrd1; - u32 emc_pmacro_ddll_pwrd2; - - u32 emc_pmacro_cmd_ctrl0; - u32 emc_pmacro_cmd_ctrl1; - u32 emc_pmacro_cmd_ctrl2; - - /* DRAM size information */ - - /* Specifies the value for MC_EMEM_ADR_CFG */ - u32 mc_emem_adr_cfg; - /* Specifies the value for MC_EMEM_ADR_CFG_DEV0 */ - u32 mc_emem_adr_cfg_dev0; - /* Specifies the value for MC_EMEM_ADR_CFG_DEV1 */ - u32 mc_emem_adr_cfg_dev1; - - u32 mc_emem_adr_cfg_channel_mask; - - /* Specifies the value for MC_EMEM_BANK_SWIZZLE_CFG0 */ - u32 mc_emem_adr_cfg_bank_mask0; - /* Specifies the value for MC_EMEM_BANK_SWIZZLE_CFG1 */ - u32 mc_emem_adr_cfg_bank_mask1; - /* Specifies the value for MC_EMEM_BANK_SWIZZLE_CFG2 */ - u32 mc_emem_adr_cfg_bank_mask2; - - /* - * Specifies the value for MC_EMEM_CFG which holds the external memory - * size (in KBytes) - */ - u32 mc_emem_cfg; - - /* MC arbitration configuration */ - - /* Specifies the value for MC_EMEM_ARB_CFG */ - u32 mc_emem_arb_cfg; - /* Specifies the value for MC_EMEM_ARB_OUTSTANDING_REQ */ - u32 mc_emem_arb_outstanding_req; - - u32 emc_emem_arb_refpb_hp_ctrl; - u32 emc_emem_arb_refpb_bank_ctrl; - - /* Specifies the value for MC_EMEM_ARB_TIMING_RCD */ - u32 mc_emem_arb_timing_rcd; - /* Specifies the value for MC_EMEM_ARB_TIMING_RP */ - u32 mc_emem_arb_timing_rp; - /* Specifies the value for MC_EMEM_ARB_TIMING_RC */ - u32 mc_emem_arb_timing_rc; - /* Specifies the value for MC_EMEM_ARB_TIMING_RAS */ - u32 mc_emem_arb_timing_ras; - /* Specifies the value for MC_EMEM_ARB_TIMING_FAW */ - u32 mc_emem_arb_timing_faw; - /* Specifies the value for MC_EMEM_ARB_TIMING_RRD */ - u32 mc_emem_arb_timing_rrd; - /* Specifies the value for MC_EMEM_ARB_TIMING_RAP2PRE */ - u32 mc_emem_arb_timing_rap2pre; - /* Specifies the value for MC_EMEM_ARB_TIMING_WAP2PRE */ - u32 mc_emem_arb_timing_wap2pre; - /* Specifies the value for MC_EMEM_ARB_TIMING_R2R */ - u32 mc_emem_arb_timing_r2r; - /* Specifies the value for MC_EMEM_ARB_TIMING_W2W */ - u32 mc_emem_arb_timing_w2w; - /* Specifies the value for MC_EMEM_ARB_TIMING_R2W */ - u32 mc_emem_arb_timing_r2w; - /* Specifies the value for MC_EMEM_ARB_TIMING_W2R */ - u32 mc_emem_arb_timing_w2r; - - u32 mc_emem_arb_timing_rfcpb; - - /* Specifies the value for MC_EMEM_ARB_DA_TURNS */ - u32 mc_emem_arb_da_turns; - /* Specifies the value for MC_EMEM_ARB_DA_COVERS */ - u32 mc_emem_arb_da_covers; - /* Specifies the value for MC_EMEM_ARB_MISC0 */ - u32 mc_emem_arb_misc0; - /* Specifies the value for MC_EMEM_ARB_MISC1 */ - u32 mc_emem_arb_misc1; - u32 mc_emem_arb_misc2; - - /* Specifies the value for MC_EMEM_ARB_RING1_THROTTLE */ - u32 mc_emem_arb_ring1_throttle; - /* Specifies the value for MC_EMEM_ARB_OVERRIDE */ - u32 mc_emem_arb_override; - /* Specifies the value for MC_EMEM_ARB_OVERRIDE_1 */ - u32 mc_emem_arb_override1; - /* Specifies the value for MC_EMEM_ARB_RSV */ - u32 mc_emem_arb_rsv; - - u32 mc_da_cfg0; - u32 mc_emem_arb_timing_ccdmw; - - /* Specifies the value for MC_CLKEN_OVERRIDE */ - u32 mc_clken_override; - - /* Specifies the value for MC_STAT_CONTROL */ - u32 mc_stat_control; - /* Specifies the value for MC_VIDEO_PROTECT_BOM */ - u32 mc_video_protect_bom; - /* Specifies the value for MC_VIDEO_PROTECT_BOM_ADR_HI */ - u32 mc_video_protect_bom_adr_hi; - /* Specifies the value for MC_VIDEO_PROTECT_SIZE_MB */ - u32 mc_video_protect_size_mb; - /* Specifies the value for MC_VIDEO_PROTECT_VPR_OVERRIDE */ - u32 mc_video_protect_vpr_override; - /* Specifies the value for MC_VIDEO_PROTECT_VPR_OVERRIDE1 */ - u32 mc_video_protect_vpr_override1; - /* Specifies the value for MC_VIDEO_PROTECT_GPU_OVERRIDE_0 */ - u32 mc_video_protect_gpu_override0; - /* Specifies the value for MC_VIDEO_PROTECT_GPU_OVERRIDE_1 */ - u32 mc_video_protect_gpu_override1; - /* Specifies the value for MC_SEC_CARVEOUT_BOM */ - u32 mc_sec_carveout_bom; - /* Specifies the value for MC_SEC_CARVEOUT_ADR_HI */ - u32 mc_sec_carveout_adr_hi; - /* Specifies the value for MC_SEC_CARVEOUT_SIZE_MB */ - u32 mc_sec_carveout_size_mb; - /* Specifies the value for MC_VIDEO_PROTECT_REG_CTRL.VIDEO_PROTECT_WRITE_ACCESS */ - u32 mc_video_protect_write_access; - /* Specifies the value for MC_SEC_CARVEOUT_REG_CTRL.SEC_CARVEOUT_WRITE_ACCESS */ - u32 mc_sec_carveout_protect_write_access; - - u32 mc_generalized_carveout1_bom; - u32 mc_generalized_carveout1_bom_hi; - u32 mc_generalized_carveout1_size_128kb; - u32 mc_generalized_carveout1_access0; - u32 mc_generalized_carveout1_access1; - u32 mc_generalized_carveout1_access2; - u32 mc_generalized_carveout1_access3; - u32 mc_generalized_carveout1_access4; - u32 mc_generalized_carveout1_force_internal_access0; - u32 mc_generalized_carveout1_force_internal_access1; - u32 mc_generalized_carveout1_force_internal_access2; - u32 mc_generalized_carveout1_force_internal_access3; - u32 mc_generalized_carveout1_force_internal_access4; - u32 mc_generalized_carveout1_cfg0; - - u32 mc_generalized_carveout2_bom; - u32 mc_generalized_carveout2_bom_hi; - u32 mc_generalized_carveout2_size_128kb; - u32 mc_generalized_carveout2_access0; - u32 mc_generalized_carveout2_access1; - u32 mc_generalized_carveout2_access2; - u32 mc_generalized_carveout2_access3; - u32 mc_generalized_carveout2_access4; - u32 mc_generalized_carveout2_force_internal_access0; - u32 mc_generalized_carveout2_force_internal_access1; - u32 mc_generalized_carveout2_force_internal_access2; - u32 mc_generalized_carveout2_force_internal_access3; - u32 mc_generalized_carveout2_force_internal_access4; - u32 mc_generalized_carveout2_cfg0; - - u32 mc_generalized_carveout3_bom; - u32 mc_generalized_carveout3_bom_hi; - u32 mc_generalized_carveout3_size_128kb; - u32 mc_generalized_carveout3_access0; - u32 mc_generalized_carveout3_access1; - u32 mc_generalized_carveout3_access2; - u32 mc_generalized_carveout3_access3; - u32 mc_generalized_carveout3_access4; - u32 mc_generalized_carveout3_force_internal_access0; - u32 mc_generalized_carveout3_force_internal_access1; - u32 mc_generalized_carveout3_force_internal_access2; - u32 mc_generalized_carveout3_force_internal_access3; - u32 mc_generalized_carveout3_force_internal_access4; - u32 mc_generalized_carveout3_cfg0; - - u32 mc_generalized_carveout4_bom; - u32 mc_generalized_carveout4_bom_hi; - u32 mc_generalized_carveout4_size_128kb; - u32 mc_generalized_carveout4_access0; - u32 mc_generalized_carveout4_access1; - u32 mc_generalized_carveout4_access2; - u32 mc_generalized_carveout4_access3; - u32 mc_generalized_carveout4_access4; - u32 mc_generalized_carveout4_force_internal_access0; - u32 mc_generalized_carveout4_force_internal_access1; - u32 mc_generalized_carveout4_force_internal_access2; - u32 mc_generalized_carveout4_force_internal_access3; - u32 mc_generalized_carveout4_force_internal_access4; - u32 mc_generalized_carveout4_cfg0; - - u32 mc_generalized_carveout5_bom; - u32 mc_generalized_carveout5_bom_hi; - u32 mc_generalized_carveout5_size_128kb; - u32 mc_generalized_carveout5_access0; - u32 mc_generalized_carveout5_access1; - u32 mc_generalized_carveout5_access2; - u32 mc_generalized_carveout5_access3; - u32 mc_generalized_carveout5_access4; - u32 mc_generalized_carveout5_force_internal_access0; - u32 mc_generalized_carveout5_force_internal_access1; - u32 mc_generalized_carveout5_force_internal_access2; - u32 mc_generalized_carveout5_force_internal_access3; - u32 mc_generalized_carveout5_force_internal_access4; - u32 mc_generalized_carveout5_cfg0; - - /* Specifies enable for CA training */ - u32 emc_ca_training_enable; - /* Set if bit 6 select is greater than bit 7 select; uses aremc.spec packet SWIZZLE_BIT6_GT_BIT7 */ - u32 swizzle_rank_byte_encode; - /* Specifies enable and offset for patched boot rom write */ - u32 boot_rom_patch_control; - /* Specifies data for patched boot rom write */ - u32 boot_rom_patch_data; - - /* Specifies the value for MC_MTS_CARVEOUT_BOM */ - u32 mc_mts_carveout_bom; - /* Specifies the value for MC_MTS_CARVEOUT_ADR_HI */ - u32 mc_mts_carveout_adr_hi; - /* Specifies the value for MC_MTS_CARVEOUT_SIZE_MB */ - u32 mc_mts_carveout_size_mb; - /* Specifies the value for MC_MTS_CARVEOUT_REG_CTRL */ - u32 mc_mts_carveout_reg_ctrl; - - u32 mc_untranslated_region_check; - - /* Just a place holder for special usage when there is no BCT for certain registers */ - u32 bct_na; -}; - -#endif From a6ec41744b6784fbd3404eac27538d8bc6420880 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 27 Dec 2023 21:04:04 +0200 Subject: [PATCH 066/308] bdk: sdram: refactor patching offsets --- bdk/mem/sdram.c | 2 +- bdk/mem/sdram_config.inl | 35 ++++++------ bdk/mem/sdram_config_t210b01.inl | 98 ++++++++++++++++---------------- bdk/mem/sdram_param_t210b01.h | 2 +- 4 files changed, 71 insertions(+), 66 deletions(-) diff --git a/bdk/mem/sdram.c b/bdk/mem/sdram.c index 486e10f..171cd32 100644 --- a/bdk/mem/sdram.c +++ b/bdk/mem/sdram.c @@ -42,8 +42,8 @@ typedef struct _sdram_vendor_patch_t { u32 val; - u32 offset:16; u32 dramcf:16; + u32 offset:16; } sdram_vendor_patch_t; static const u8 dram_encoding_t210b01[] = { diff --git a/bdk/mem/sdram_config.inl b/bdk/mem/sdram_config.inl index 78c9b94..66ce0c6 100644 --- a/bdk/mem/sdram_config.inl +++ b/bdk/mem/sdram_config.inl @@ -549,6 +549,7 @@ static const sdram_params_t210_t _dram_cfg_0_samsung_4gb = { .mc_video_protect_gpu_override0 = 0x00000000, .mc_video_protect_gpu_override1 = 0x00000000, + .mc_sec_carveout_bom = 0xFFF00000, .mc_sec_carveout_adr_hi = 0x00000000, .mc_sec_carveout_size_mb = 0x00000000, @@ -646,26 +647,28 @@ static const sdram_params_t210_t _dram_cfg_0_samsung_4gb = { .mc_mts_carveout_reg_ctrl = 0x00000000 }; +#define DCFG_OFFSET_OF(m) (OFFSET_OF(sdram_params_t210_t, m) / 4) static const sdram_vendor_patch_t sdram_cfg_vendor_patches_t210[] = { // Hynix timing config. - { 0x0000000D, 0x10C / 4, DRAM_ID(1) }, // emc_r2w. - { 0x00000001, 0x16C / 4, DRAM_ID(1) }, // emc_puterm_extra. - { 0x80000000, 0x170 / 4, DRAM_ID(1) }, // emc_puterm_width. - { 0x00000210, 0x4F4 / 4, DRAM_ID(1) }, // emc_pmacro_data_rx_term_mode. - { 0x00000005, 0x5C0 / 4, DRAM_ID(1) }, // mc_emem_arb_timing_r2w. + { 0x0000000D, DRAM_ID(1), DCFG_OFFSET_OF(emc_r2w) }, + { 0x00000001, DRAM_ID(1), DCFG_OFFSET_OF(emc_puterm_extra) }, + { 0x80000000, DRAM_ID(1), DCFG_OFFSET_OF(emc_puterm_width) }, + { 0x00000210, DRAM_ID(1), DCFG_OFFSET_OF(emc_pmacro_data_rx_term_mode) }, + { 0x00000005, DRAM_ID(1), DCFG_OFFSET_OF(mc_emem_arb_timing_r2w) }, // Samsung 6GB density config. - { 0x000C0302, 0x56C / 4, DRAM_ID(4) }, // mc_emem_adr_cfg_dev0. 768MB Chip 0 density. - { 0x000C0302, 0x570 / 4, DRAM_ID(4) }, // mc_emem_adr_cfg_dev1. 768MB Chip 1 density. - { 0x00001800, 0x584 / 4, DRAM_ID(4) }, // mc_emem_cfg. 6GB total density. Max 8GB. + { 0x000C0302, DRAM_ID(4), DCFG_OFFSET_OF(mc_emem_adr_cfg_dev0) }, // 768MB Chip 0 density. + { 0x000C0302, DRAM_ID(4), DCFG_OFFSET_OF(mc_emem_adr_cfg_dev1) }, // 768MB Chip 1 density. + { 0x00001800, DRAM_ID(4), DCFG_OFFSET_OF(mc_emem_cfg) }, // 6GB total density. Max 8GB. // Samsung 8GB density config. - { 0x0000003A, 0xEC / 4, DRAM_ID(7) }, // emc_rfc. - { 0x0000001D, 0xF0 / 4, DRAM_ID(7) }, // emc_rfc_pb. - { 0x0000003B, 0x1C0 / 4, DRAM_ID(7) }, // emc_txsr. - { 0x0000003B, 0x1C4 / 4, DRAM_ID(7) }, // emc_txsr_dll. - { 0x00000713, 0x2B4 / 4, DRAM_ID(7) }, // emc_dyn_self_ref_control. - { 0x00080302, 0x56C / 4, DRAM_ID(7) }, // mc_emem_adr_cfg_dev0. 1024MB Chip 0 density. - { 0x00080302, 0x570 / 4, DRAM_ID(7) }, // mc_emem_adr_cfg_dev1. 1024MB Chip 1 density. - { 0x00002000, 0x584 / 4, DRAM_ID(7) }, // mc_emem_cfg. 8GB total density. Max 8GB. + { 0x0000003A, DRAM_ID(7), DCFG_OFFSET_OF(emc_rfc) }, + { 0x0000001D, DRAM_ID(7), DCFG_OFFSET_OF(emc_rfc_pb) }, + { 0x0000003B, DRAM_ID(7), DCFG_OFFSET_OF(emc_txsr) }, + { 0x0000003B, DRAM_ID(7), DCFG_OFFSET_OF(emc_txsr_dll) }, + { 0x00000713, DRAM_ID(7), DCFG_OFFSET_OF(emc_dyn_self_ref_control) }, + { 0x00080302, DRAM_ID(7), DCFG_OFFSET_OF(mc_emem_adr_cfg_dev0) }, // 1024MB Chip 0 density. + { 0x00080302, DRAM_ID(7), DCFG_OFFSET_OF(mc_emem_adr_cfg_dev1) }, // 1024MB Chip 1 density. + { 0x00002000, DRAM_ID(7), DCFG_OFFSET_OF(mc_emem_cfg) }, // 8GB total density. Max 8GB. }; +#undef DCFG_OFFSET_OF diff --git a/bdk/mem/sdram_config_t210b01.inl b/bdk/mem/sdram_config_t210b01.inl index f71db10..4a6b83c 100644 --- a/bdk/mem/sdram_config_t210b01.inl +++ b/bdk/mem/sdram_config_t210b01.inl @@ -708,7 +708,7 @@ static const sdram_params_t210b01_t _dram_cfg_08_10_12_14_samsung_hynix_4gb = { #define DRAM_CC_LPDDR4X_PMACRO_IB (DRAM_CC(LPDDR4X_8GB_SAMSUNG_K4UBE3D4AM_MGCJ)) -#define DRAM_CC_LPDDR4X_AUTOCAL_VPR (DRAM_CC(LPDDR4X_8GB_SAMSUNG_K4UBE3D4AM_MGCJ) | \ +#define DRAM_CC_LPDDR4X_PUPD_VPR (DRAM_CC(LPDDR4X_8GB_SAMSUNG_K4UBE3D4AM_MGCJ) | \ DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D2NP_046_WTE) | \ DRAM_CC(LPDDR4X_4GB_SAMSUNG_K4U6E3S4AA_MGCL) | \ DRAM_CC(LPDDR4X_8GB_SAMSUNG_K4UBE3D4AA_MGCL) | \ @@ -718,7 +718,7 @@ static const sdram_params_t210b01_t _dram_cfg_08_10_12_14_samsung_hynix_4gb = { DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D1NP_046_WTB) | \ DRAM_CC(LPDDR4X_4GB_SAMSUNG_K4U6E3S4AB_MGCL)) -#define DRAM_CC_LPDDR4X_DYN_SELF_CTRL (DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D2NP_046_WTE) | \ +#define DRAM_CC_LPDDR4X_DSR (DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D2NP_046_WTE) | \ DRAM_CC(LPDDR4X_4GB_SAMSUNG_K4U6E3S4AA_MGCL) | \ DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D2NP_046_WTF) | \ DRAM_CC(LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEE) | \ @@ -726,7 +726,7 @@ static const sdram_params_t210b01_t _dram_cfg_08_10_12_14_samsung_hynix_4gb = { DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D1NP_046_WTB) | \ DRAM_CC(LPDDR4X_4GB_SAMSUNG_K4U6E3S4AB_MGCL)) -#define DRAM_CC_LPDDR4X_QUSE_EINPUT (DRAM_CC(LPDDR4X_8GB_SAMSUNG_K4UBE3D4AM_MGCJ) | \ +#define DRAM_CC_LPDDR4X_QUSE (DRAM_CC(LPDDR4X_8GB_SAMSUNG_K4UBE3D4AM_MGCJ) | \ DRAM_CC(LPDDR4X_4GB_SAMSUNG_K4U6E3S4AA_MGCL) | \ DRAM_CC(LPDDR4X_8GB_SAMSUNG_K4UBE3D4AA_MGCL) | \ DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D2NP_046_WTF) | \ @@ -748,60 +748,62 @@ static const sdram_params_t210b01_t _dram_cfg_08_10_12_14_samsung_hynix_4gb = { #define DRAM_CC_LPDDR4X_8GB (DRAM_CC(LPDDR4X_8GB_SAMSUNG_K4UBE3D4AM_MGCJ) | \ DRAM_CC(LPDDR4X_8GB_SAMSUNG_K4UBE3D4AA_MGCL)) +#define DCFG_OFFSET_OF(m) (OFFSET_OF(sdram_params_t210b01_t, m) / 4) static const sdram_vendor_patch_t sdram_cfg_vendor_patches_t210b01[] = { // Samsung LPDDR4X 8GB K4UBE3D4AM-MGCJ Die-M for SDEV Iowa and Hoag. - { 0x35353535, 0x350 / 4, DRAM_CC_LPDDR4X_PMACRO_IB }, // emc_pmacro_ib_vref_dq_0. - { 0x35353535, 0x354 / 4, DRAM_CC_LPDDR4X_PMACRO_IB }, // emc_pmacro_ib_vref_dq_1. - { 0x00100010, 0x3FC / 4, DRAM_CC_LPDDR4X_PMACRO_IB }, // emc_pmacro_ib_ddll_long_dqs_rank0_0. - { 0x00100010, 0x400 / 4, DRAM_CC_LPDDR4X_PMACRO_IB }, // emc_pmacro_ib_ddll_long_dqs_rank0_1. - { 0x00100010, 0x404 / 4, DRAM_CC_LPDDR4X_PMACRO_IB }, // emc_pmacro_ib_ddll_long_dqs_rank0_2. - { 0x00100010, 0x408 / 4, DRAM_CC_LPDDR4X_PMACRO_IB }, // emc_pmacro_ib_ddll_long_dqs_rank0_3. - { 0x00100010, 0x40C / 4, DRAM_CC_LPDDR4X_PMACRO_IB }, // emc_pmacro_ib_ddll_long_dqs_rank1_0. - { 0x00100010, 0x410 / 4, DRAM_CC_LPDDR4X_PMACRO_IB }, // emc_pmacro_ib_ddll_long_dqs_rank1_1. - { 0x00100010, 0x414 / 4, DRAM_CC_LPDDR4X_PMACRO_IB }, // emc_pmacro_ib_ddll_long_dqs_rank1_2. - { 0x00100010, 0x418 / 4, DRAM_CC_LPDDR4X_PMACRO_IB }, // emc_pmacro_ib_ddll_long_dqs_rank1_3. + { 0x35353535, DRAM_CC_LPDDR4X_PMACRO_IB, DCFG_OFFSET_OF(emc_pmacro_ib_vref_dq_0) }, + { 0x35353535, DRAM_CC_LPDDR4X_PMACRO_IB, DCFG_OFFSET_OF(emc_pmacro_ib_vref_dq_1) }, + { 0x00100010, DRAM_CC_LPDDR4X_PMACRO_IB, DCFG_OFFSET_OF(emc_pmacro_ib_ddll_long_dqs_rank0_0) }, + { 0x00100010, DRAM_CC_LPDDR4X_PMACRO_IB, DCFG_OFFSET_OF(emc_pmacro_ib_ddll_long_dqs_rank0_1) }, + { 0x00100010, DRAM_CC_LPDDR4X_PMACRO_IB, DCFG_OFFSET_OF(emc_pmacro_ib_ddll_long_dqs_rank0_2) }, + { 0x00100010, DRAM_CC_LPDDR4X_PMACRO_IB, DCFG_OFFSET_OF(emc_pmacro_ib_ddll_long_dqs_rank0_3) }, + { 0x00100010, DRAM_CC_LPDDR4X_PMACRO_IB, DCFG_OFFSET_OF(emc_pmacro_ib_ddll_long_dqs_rank1_0) }, + { 0x00100010, DRAM_CC_LPDDR4X_PMACRO_IB, DCFG_OFFSET_OF(emc_pmacro_ib_ddll_long_dqs_rank1_1) }, + { 0x00100010, DRAM_CC_LPDDR4X_PMACRO_IB, DCFG_OFFSET_OF(emc_pmacro_ib_ddll_long_dqs_rank1_2) }, + { 0x00100010, DRAM_CC_LPDDR4X_PMACRO_IB, DCFG_OFFSET_OF(emc_pmacro_ib_ddll_long_dqs_rank1_3) }, /*! Shared patched between DRAM Codes. */ - { 0x05500000, 0x0D4 / 4, DRAM_CC_LPDDR4X_AUTOCAL_VPR }, // emc_auto_cal_config2. - { 0xC9AFBCBC, 0x0F4 / 4, DRAM_CC_LPDDR4X_AUTOCAL_VPR }, // emc_auto_cal_vref_sel0. - { 0x2A800000, 0x6DC / 4, DRAM_CC_LPDDR4X_AUTOCAL_VPR }, // mc_video_protect_gpu_override0. - { 0x00000002, 0x6E0 / 4, DRAM_CC_LPDDR4X_AUTOCAL_VPR }, // mc_video_protect_gpu_override1. + { 0x05500000, DRAM_CC_LPDDR4X_PUPD_VPR, DCFG_OFFSET_OF(emc_auto_cal_config2) }, + { 0xC9AFBCBC, DRAM_CC_LPDDR4X_PUPD_VPR, DCFG_OFFSET_OF(emc_auto_cal_vref_sel0) }, + { 0x2A800000, DRAM_CC_LPDDR4X_PUPD_VPR, DCFG_OFFSET_OF(mc_video_protect_gpu_override0) }, + { 0x00000002, DRAM_CC_LPDDR4X_PUPD_VPR, DCFG_OFFSET_OF(mc_video_protect_gpu_override1) }, //!TODO Find out what mc_video_protect_gpu_override0 and mc_video_protect_gpu_override1 new bits are. - { 0x88161414, 0x2E0 / 4, DRAM_CC_LPDDR4X_DYN_SELF_CTRL }, // emc_mrw14. - { 0x80000713, 0x32C / 4, DRAM_CC_LPDDR4X_DYN_SELF_CTRL }, // emc_dyn_self_ref_control. + { 0x88161414, DRAM_CC_LPDDR4X_DSR, DCFG_OFFSET_OF(emc_mrw14) }, + { 0x80000713, DRAM_CC_LPDDR4X_DSR, DCFG_OFFSET_OF(emc_dyn_self_ref_control) }, - { 0x00000006, 0x1CC / 4, DRAM_CC_LPDDR4X_QUSE_EINPUT }, // emc_quse. - { 0x00000005, 0x1D0 / 4, DRAM_CC_LPDDR4X_QUSE_EINPUT }, // emc_quse_width. - { 0x00000003, 0x1DC / 4, DRAM_CC_LPDDR4X_QUSE_EINPUT }, // emc_einput. - { 0x0000000C, 0x1E0 / 4, DRAM_CC_LPDDR4X_QUSE_EINPUT }, // emc_einput_duration. + { 0x00000006, DRAM_CC_LPDDR4X_QUSE, DCFG_OFFSET_OF(emc_quse) }, + { 0x00000005, DRAM_CC_LPDDR4X_QUSE, DCFG_OFFSET_OF(emc_quse_width) }, + { 0x00000003, DRAM_CC_LPDDR4X_QUSE, DCFG_OFFSET_OF(emc_einput) }, + { 0x0000000C, DRAM_CC_LPDDR4X_QUSE, DCFG_OFFSET_OF(emc_einput_duration) }, - { 0x00000008, 0x24C / 4, DRAM_CC_LPDDR4X_FAW }, // emc_tfaw. - { 0x00000001, 0x670 / 4, DRAM_CC_LPDDR4X_FAW }, // mc_emem_arb_timing_faw. + { 0x00000008, DRAM_CC_LPDDR4X_FAW, DCFG_OFFSET_OF(emc_tfaw) }, + { 0x00000001, DRAM_CC_LPDDR4X_FAW, DCFG_OFFSET_OF(mc_emem_arb_timing_faw) }, - { 0xE4FACB43, 0x6D4 / 4, DRAM_CC_LPDDR4X_VPR }, // mc_video_protect_vpr_override. + TSEC, NVENC. - { 0x0600FED3, 0x6D8 / 4, DRAM_CC_LPDDR4X_VPR }, // mc_video_protect_vpr_override1. + TSECB, TSEC1, TSECB1. + { 0xE4FACB43, DRAM_CC_LPDDR4X_VPR, DCFG_OFFSET_OF(mc_video_protect_vpr_override) }, // + TSEC, NVENC. + { 0x0600FED3, DRAM_CC_LPDDR4X_VPR, DCFG_OFFSET_OF(mc_video_protect_vpr_override1) }, // + TSECB, TSEC1, TSECB1. - { 0x00000001, 0x134 / 4, DRAM_CC_LPDDR4X_8GB }, // emc_adr_cfg. 2 Ranks. - { 0x08010004, 0x2B8 / 4, DRAM_CC_LPDDR4X_8GB }, // emc_mrw1. - { 0x08020000, 0x2BC / 4, DRAM_CC_LPDDR4X_8GB }, // emc_mrw2. - { 0x080D0000, 0x2C0 / 4, DRAM_CC_LPDDR4X_8GB }, // emc_mrw3. - { 0x08033131, 0x2C8 / 4, DRAM_CC_LPDDR4X_8GB }, // emc_mrw6. - { 0x080B0000, 0x2CC / 4, DRAM_CC_LPDDR4X_8GB }, // emc_mrw8. - { 0x0C0E5D5D, 0x2D0 / 4, DRAM_CC_LPDDR4X_8GB }, // emc_mrw9. - { 0x080C5D5D, 0x2D4 / 4, DRAM_CC_LPDDR4X_8GB }, // emc_mrw10. - { 0x0C0D0808, 0x2D8 / 4, DRAM_CC_LPDDR4X_8GB }, // emc_mrw12. - { 0x0C0D0000, 0x2DC / 4, DRAM_CC_LPDDR4X_8GB }, // emc_mrw13. - { 0x08161414, 0x2E0 / 4, DRAM_CC_LPDDR4X_8GB }, // emc_mrw14. - { 0x08010004, 0x2E4 / 4, DRAM_CC_LPDDR4X_8GB }, // emc_mrw_extra. - { 0x00000000, 0x340 / 4, DRAM_CC_LPDDR4X_8GB }, // emc_dev_select. Both devices. - { 0x0051004F, 0x450 / 4, DRAM_CC_LPDDR4X_8GB }, // emc_zcal_mrw_cmd. - { 0x40000001, 0x45C / 4, DRAM_CC_LPDDR4X_8GB }, // emc_zcal_init_dev1. - { 0x00000000, 0x594 / 4, DRAM_CC_LPDDR4X_8GB }, // emc_pmacro_tx_pwrd4. - { 0x00001000, 0x598 / 4, DRAM_CC_LPDDR4X_8GB }, // emc_pmacro_tx_pwrd5. - { 0x00000001, 0x630 / 4, DRAM_CC_LPDDR4X_8GB }, // mc_emem_adr_cfg. 2 Ranks. - { 0x00002000, 0x64C / 4, DRAM_CC_LPDDR4X_8GB }, // mc_emem_cfg. 8GB total density. Max 8GB. - { 0x00000002, 0x680 / 4, DRAM_CC_LPDDR4X_8GB }, // mc_emem_arb_timing_r2r. - { 0x02020001, 0x694 / 4, DRAM_CC_LPDDR4X_8GB }, // mc_emem_arb_da_turns. + { 0x00000001, DRAM_CC_LPDDR4X_8GB, DCFG_OFFSET_OF(emc_adr_cfg) }, // 2 Ranks. + { 0x08010004, DRAM_CC_LPDDR4X_8GB, DCFG_OFFSET_OF(emc_mrw1) }, + { 0x08020000, DRAM_CC_LPDDR4X_8GB, DCFG_OFFSET_OF(emc_mrw2) }, + { 0x080D0000, DRAM_CC_LPDDR4X_8GB, DCFG_OFFSET_OF(emc_mrw3) }, + { 0x08033131, DRAM_CC_LPDDR4X_8GB, DCFG_OFFSET_OF(emc_mrw6) }, + { 0x080B0000, DRAM_CC_LPDDR4X_8GB, DCFG_OFFSET_OF(emc_mrw8) }, + { 0x0C0E5D5D, DRAM_CC_LPDDR4X_8GB, DCFG_OFFSET_OF(emc_mrw9) }, + { 0x080C5D5D, DRAM_CC_LPDDR4X_8GB, DCFG_OFFSET_OF(emc_mrw10) }, + { 0x0C0D0808, DRAM_CC_LPDDR4X_8GB, DCFG_OFFSET_OF(emc_mrw12) }, + { 0x0C0D0000, DRAM_CC_LPDDR4X_8GB, DCFG_OFFSET_OF(emc_mrw13) }, + { 0x08161414, DRAM_CC_LPDDR4X_8GB, DCFG_OFFSET_OF(emc_mrw14) }, + { 0x08010004, DRAM_CC_LPDDR4X_8GB, DCFG_OFFSET_OF(emc_mrw_extra) }, + { 0x00000000, DRAM_CC_LPDDR4X_8GB, DCFG_OFFSET_OF(emc_dev_select) }, // Both devices. + { 0x0051004F, DRAM_CC_LPDDR4X_8GB, DCFG_OFFSET_OF(emc_zcal_mrw_cmd) }, + { 0x40000001, DRAM_CC_LPDDR4X_8GB, DCFG_OFFSET_OF(emc_zcal_init_dev1) }, + { 0x00000000, DRAM_CC_LPDDR4X_8GB, DCFG_OFFSET_OF(emc_pmacro_tx_pwrd4) }, + { 0x00001000, DRAM_CC_LPDDR4X_8GB, DCFG_OFFSET_OF(emc_pmacro_tx_pwrd5) }, + { 0x00000001, DRAM_CC_LPDDR4X_8GB, DCFG_OFFSET_OF(mc_emem_adr_cfg) }, // 2 Ranks. + { 0x00002000, DRAM_CC_LPDDR4X_8GB, DCFG_OFFSET_OF(mc_emem_cfg) }, // 8GB total density. Max 8GB. + { 0x00000002, DRAM_CC_LPDDR4X_8GB, DCFG_OFFSET_OF(mc_emem_arb_timing_r2r) }, + { 0x02020001, DRAM_CC_LPDDR4X_8GB, DCFG_OFFSET_OF(mc_emem_arb_da_turns) }, }; +#undef DCFG_OFFSET_OF diff --git a/bdk/mem/sdram_param_t210b01.h b/bdk/mem/sdram_param_t210b01.h index 8bcbed3..f7b956c 100644 --- a/bdk/mem/sdram_param_t210b01.h +++ b/bdk/mem/sdram_param_t210b01.h @@ -225,7 +225,6 @@ typedef struct _sdram_params_t210b01_t u32 emc_r2p; /* Specifies the value for EMC_W2P */ u32 emc_w2p; - /* Specifies the value for EMC_RD_RCD */ u32 emc_tppd; u32 emc_trtm; @@ -235,6 +234,7 @@ typedef struct _sdram_params_t210b01_t u32 emc_tr2ref; u32 emc_ccdmw; + /* Specifies the value for EMC_RD_RCD */ u32 emc_rd_rcd; /* Specifies the value for EMC_WR_RCD */ u32 emc_wr_rcd; From 2cc6cd45d91ddf04d0939b7e53f32b1287c14479 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 27 Dec 2023 21:06:09 +0200 Subject: [PATCH 067/308] bdk: dram: small refactor --- bdk/mem/mc.c | 8 +++----- bdk/mem/sdram.c | 46 +++++++++++++++++++++++++--------------------- 2 files changed, 28 insertions(+), 26 deletions(-) diff --git a/bdk/mem/mc.c b/bdk/mem/mc.c index d8949bc..0b0749e 100644 --- a/bdk/mem/mc.c +++ b/bdk/mem/mc.c @@ -157,12 +157,10 @@ bool mc_client_has_access(void *address) void mc_enable() { // Reset EMC source to PLLP. - CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_EMC) = (CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_EMC) & 0x1FFFFFFF) | (2 << 29); - // Enable memory clocks. - CLOCK(CLK_RST_CONTROLLER_CLK_ENB_H_SET) = BIT(CLK_H_EMC); - CLOCK(CLK_RST_CONTROLLER_CLK_ENB_H_SET) = BIT(CLK_H_MEM); + CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_EMC) = (CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_EMC) & 0x1FFFFFFF) | (2 << 29u); + // Enable and clear reset for memory clocks. + CLOCK(CLK_RST_CONTROLLER_CLK_ENB_H_SET) = BIT(CLK_H_EMC) | BIT(CLK_H_MEM); CLOCK(CLK_RST_CONTROLLER_CLK_ENB_X_SET) = BIT(CLK_X_EMC_DLL); - // Clear clock resets for memory. CLOCK(CLK_RST_CONTROLLER_RST_DEV_H_CLR) = BIT(CLK_H_EMC) | BIT(CLK_H_MEM); usleep(5); diff --git a/bdk/mem/sdram.c b/bdk/mem/sdram.c index 171cd32..f383aed 100644 --- a/bdk/mem/sdram.c +++ b/bdk/mem/sdram.c @@ -167,12 +167,12 @@ static void _sdram_config_t210(const sdram_params_t210_t *params) { // Program DPD3/DPD4 regs (coldboot path). // Enable sel_dpd on unused pins. - u32 dpd_req = (params->emc_pmc_scratch1 & 0x3FFFFFFF) | 0x80000000; + u32 dpd_req = (params->emc_pmc_scratch1 & 0x3FFFFFFF) | (2 << 30u); PMC(APBDEV_PMC_IO_DPD3_REQ) = (dpd_req ^ 0xFFFF) & 0xC000FFFF; usleep(params->pmc_io_dpd3_req_wait); // Disable e_dpd_vttgen. - dpd_req = (params->emc_pmc_scratch2 & 0x3FFFFFFF) | 0x80000000; + dpd_req = (params->emc_pmc_scratch2 & 0x3FFFFFFF) | (2 << 30u); PMC(APBDEV_PMC_IO_DPD4_REQ) = (dpd_req & 0xFFFF0000) ^ 0x3FFF0000; usleep(params->pmc_io_dpd4_req_wait); @@ -209,7 +209,7 @@ break_nosleep: if (params->emc_clock_source_dll) CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_EMC_DLL) = params->emc_clock_source_dll; if (params->clear_clock2_mc1) - CLOCK(CLK_RST_CONTROLLER_CLK_ENB_W_CLR) = 0x40000000; // Clear Reset to MC1. + CLOCK(CLK_RST_CONTROLLER_CLK_ENB_W_CLR) = BIT(CLK_W_MC1); // Clear Reset to MC1. // Enable and clear reset for memory clocks. CLOCK(CLK_RST_CONTROLLER_CLK_ENB_H_SET) = BIT(CLK_H_EMC) | BIT(CLK_H_MEM); @@ -233,7 +233,7 @@ break_nosleep: // Program CMD mapping. Required before brick mapping, else // we can't guarantee CK will be differential at all times. - EMC(EMC_FBIO_CFG7) = params->emc_fbio_cfg7; + EMC(EMC_FBIO_CFG7) = params->emc_fbio_cfg7; EMC(EMC_CMD_MAPPING_CMD0_0) = params->emc_cmd_mapping_cmd0_0; EMC(EMC_CMD_MAPPING_CMD0_1) = params->emc_cmd_mapping_cmd0_1; EMC(EMC_CMD_MAPPING_CMD0_2) = params->emc_cmd_mapping_cmd0_2; @@ -246,7 +246,7 @@ break_nosleep: EMC(EMC_CMD_MAPPING_CMD3_0) = params->emc_cmd_mapping_cmd3_0; EMC(EMC_CMD_MAPPING_CMD3_1) = params->emc_cmd_mapping_cmd3_1; EMC(EMC_CMD_MAPPING_CMD3_2) = params->emc_cmd_mapping_cmd3_2; - EMC(EMC_CMD_MAPPING_BYTE) = params->emc_cmd_mapping_byte; + EMC(EMC_CMD_MAPPING_BYTE) = params->emc_cmd_mapping_byte; // Program brick mapping. EMC(EMC_PMACRO_BRICK_MAPPING_0) = params->emc_pmacro_brick_mapping0; @@ -289,13 +289,13 @@ break_nosleep: EMC(EMC_AUTO_CAL_CONFIG7) = params->emc_auto_cal_config7; EMC(EMC_AUTO_CAL_CONFIG8) = params->emc_auto_cal_config8; - EMC(EMC_PMACRO_RX_TERM) = params->emc_pmacro_rx_term; - EMC(EMC_PMACRO_DQ_TX_DRV) = params->emc_pmacro_dq_tx_drive; - EMC(EMC_PMACRO_CA_TX_DRV) = params->emc_pmacro_ca_tx_drive; - EMC(EMC_PMACRO_CMD_TX_DRV) = params->emc_pmacro_cmd_tx_drive; + EMC(EMC_PMACRO_RX_TERM) = params->emc_pmacro_rx_term; + EMC(EMC_PMACRO_DQ_TX_DRV) = params->emc_pmacro_dq_tx_drive; + EMC(EMC_PMACRO_CA_TX_DRV) = params->emc_pmacro_ca_tx_drive; + EMC(EMC_PMACRO_CMD_TX_DRV) = params->emc_pmacro_cmd_tx_drive; EMC(EMC_PMACRO_AUTOCAL_CFG_COMMON) = params->emc_pmacro_auto_cal_common; - EMC(EMC_AUTO_CAL_CHANNEL) = params->emc_auto_cal_channel; - EMC(EMC_PMACRO_ZCTRL) = params->emc_pmacro_zcrtl; + EMC(EMC_AUTO_CAL_CHANNEL) = params->emc_auto_cal_channel; + EMC(EMC_PMACRO_ZCTRL) = params->emc_pmacro_zcrtl; EMC(EMC_DLL_CFG_0) = params->emc_dll_cfg0; EMC(EMC_DLL_CFG_1) = params->emc_dll_cfg1; @@ -328,7 +328,7 @@ break_nosleep: EMC(EMC_PMACRO_CMD_RX_TERM_MODE) = params->emc_pmacro_cmd_rx_term_mode; EMC(EMC_PMACRO_CMD_PAD_TX_CTRL) = params->emc_pmacro_cmd_pad_tx_ctrl; - EMC(EMC_CFG_3) = params->emc_cfg3; + EMC(EMC_CFG_3) = params->emc_cfg3; EMC(EMC_PMACRO_TX_PWRD_0) = params->emc_pmacro_tx_pwrd0; EMC(EMC_PMACRO_TX_PWRD_1) = params->emc_pmacro_tx_pwrd1; EMC(EMC_PMACRO_TX_PWRD_2) = params->emc_pmacro_tx_pwrd2; @@ -561,9 +561,11 @@ break_nosleep: EMC(EMC_PMACRO_COMMON_PAD_TX_CTRL) = params->emc_pmacro_common_pad_tx_ctrl; EMC(EMC_DBG) = params->emc_dbg; + EMC(EMC_QRST) = params->emc_qrst; EMC(EMC_ISSUE_QRST) = 1; EMC(EMC_ISSUE_QRST) = 0; + EMC(EMC_QSAFE) = params->emc_qsafe; EMC(EMC_RDV) = params->emc_rdv; EMC(EMC_RDV_MASK) = params->emc_rdv_mask; @@ -616,7 +618,7 @@ break_nosleep: } // Release SEL_DPD_CMD. - PMC(APBDEV_PMC_IO_DPD3_REQ) = ((params->emc_pmc_scratch1 & 0x3FFFFFFF) | 0x40000000) & 0xCFFF0000; + PMC(APBDEV_PMC_IO_DPD3_REQ) = (params->emc_pmc_scratch1 & 0xFFF0000) | (1 << 30u); usleep(params->pmc_io_dpd3_req_wait); // Set autocal interval if not configured. @@ -707,7 +709,7 @@ break_nosleep: EMC(EMC_REF) = (((1 << params->emc_extra_refresh_num) - 1) << 8) | (params->emc_dev_select << 30) | 3; // Enable refresh. - EMC(EMC_REFCTRL) = params->emc_dev_select | 0x80000000; + EMC(EMC_REFCTRL) = params->emc_dev_select | BIT(31); EMC(EMC_DYN_SELF_REF_CONTROL) = params->emc_dyn_self_ref_control; EMC(EMC_CFG_UPDATE) = params->emc_cfg_update; @@ -717,7 +719,7 @@ break_nosleep: EMC(EMC_SEL_DPD_CTRL) = params->emc_sel_dpd_ctrl; // Write addr swizzle lock bit. - EMC(EMC_FBIO_SPARE) = params->emc_fbio_spare | 2; + EMC(EMC_FBIO_SPARE) = params->emc_fbio_spare | BIT(1); EMC(EMC_TIMING_CONTROL) = 1; // Re-trigger timing to latch power saving functions. @@ -751,15 +753,15 @@ static void _sdram_config_t210b01(const sdram_params_t210b01_t *params) // Program DPD3/DPD4 regs (coldboot path). // Enable sel_dpd on unused pins. PMC(APBDEV_PMC_WEAK_BIAS) = (pmc_scratch1 & 0x1000) << 19 | (pmc_scratch1 & 0xFFF) << 18 | (pmc_scratch1 & 0x8000) << 15; - PMC(APBDEV_PMC_IO_DPD3_REQ) = (pmc_scratch1 & 0x9FFF) + 0x80000000; + PMC(APBDEV_PMC_IO_DPD3_REQ) = (pmc_scratch1 & 0x9FFF) | (2 << 30u); usleep(params->pmc_io_dpd3_req_wait); // Disable e_dpd_vttgen. - PMC(APBDEV_PMC_IO_DPD4_REQ) = (pmc_scratch2 & 0x3FFF0000) | 0x80000000; + PMC(APBDEV_PMC_IO_DPD4_REQ) = (pmc_scratch2 & 0x3FFF0000) | (2 << 30u); usleep(params->pmc_io_dpd4_req_wait); // Disable e_dpd_bg. - PMC(APBDEV_PMC_IO_DPD4_REQ) = (pmc_scratch2 & 0x1FFF) | 0x80000000; + PMC(APBDEV_PMC_IO_DPD4_REQ) = (pmc_scratch2 & 0x1FFF) | (2 << 30u); usleep(1); // Program CMD mapping. Required before brick mapping, else @@ -1155,9 +1157,11 @@ static void _sdram_config_t210b01(const sdram_params_t210b01_t *params) EMC(EMC_PUTERM_WIDTH) = params->emc_puterm_width; EMC(EMC_DBG) = params->emc_dbg; + EMC(EMC_QRST) = params->emc_qrst; EMC(EMC_ISSUE_QRST) = 1; EMC(EMC_ISSUE_QRST) = 0; + EMC(EMC_QSAFE) = params->emc_qsafe; EMC(EMC_RDV) = params->emc_rdv; EMC(EMC_RDV_MASK) = params->emc_rdv_mask; @@ -1219,7 +1223,7 @@ static void _sdram_config_t210b01(const sdram_params_t210b01_t *params) *(vu32 *)params->emc_bct_spare_secure16 = params->emc_bct_spare_secure17; // Release SEL_DPD_CMD. - PMC(APBDEV_PMC_IO_DPD3_REQ) = ((params->emc_pmc_scratch1 & 0x3FFFFFFF) | 0x40000000) & 0xCFFF0000; + PMC(APBDEV_PMC_IO_DPD3_REQ) = (params->emc_pmc_scratch1 & 0xFFF0000) | (1 << 30u); usleep(params->pmc_io_dpd3_req_wait); // Set transmission pad control parameters. @@ -1315,7 +1319,7 @@ static void _sdram_config_t210b01(const sdram_params_t210b01_t *params) EMC(EMC_REF) = ((1 << params->emc_extra_refresh_num << 8) - 253) | (params->emc_dev_select << 30); // Enable refresh. - EMC(EMC_REFCTRL) = params->emc_dev_select | 0x80000000; + EMC(EMC_REFCTRL) = params->emc_dev_select | BIT(31); EMC(EMC_DYN_SELF_REF_CONTROL) = params->emc_dyn_self_ref_control; EMC(EMC_CFG) = params->emc_cfg; @@ -1324,7 +1328,7 @@ static void _sdram_config_t210b01(const sdram_params_t210b01_t *params) EMC(EMC_SEL_DPD_CTRL) = params->emc_sel_dpd_ctrl; // Write addr swizzle lock bit. - EMC(EMC_FBIO_SPARE) = params->emc_fbio_spare | 2; + EMC(EMC_FBIO_SPARE) = params->emc_fbio_spare | BIT(1); EMC(EMC_TIMING_CONTROL) = 1; // Re-trigger timing to latch power saving functions. From 92093ff08ec56473a7e739697f88ea70a19b5350 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 27 Dec 2023 21:07:52 +0200 Subject: [PATCH 068/308] bdk: se: deduplicate sha hash extraction --- bdk/sec/se.c | 55 ++++++++++++++++++++++++++++------------------------ 1 file changed, 30 insertions(+), 25 deletions(-) diff --git a/bdk/sec/se.c b/bdk/sec/se.c index d377049..c0f5406 100644 --- a/bdk/sec/se.c +++ b/bdk/sec/se.c @@ -487,6 +487,23 @@ int se_aes_xts_crypt(u32 tweak_ks, u32 crypt_ks, u32 enc, u64 sec, void *dst, vo return 1; } +static void se_calc_sha256_get_hash(void *hash, u32 *msg_left) +{ + u32 hash32[SE_SHA_256_SIZE / 4]; + + // Backup message left. + if (msg_left) + { + msg_left[0] = SE(SE_SHA_MSG_LEFT_0_REG); + msg_left[1] = SE(SE_SHA_MSG_LEFT_1_REG); + } + + // Copy output hash. + for (u32 i = 0; i < (SE_SHA_256_SIZE / 4); i++) + hash32[i] = byte_swap_32(SE(SE_HASH_RESULT_REG + (i * 4))); + memcpy(hash, hash32, SE_SHA_256_SIZE); +} + int se_calc_sha256(void *hash, u32 *msg_left, const void *src, u32 src_size, u64 total_size, u32 sha_cfg, bool is_oneshot) { int res; @@ -496,6 +513,17 @@ int se_calc_sha256(void *hash, u32 *msg_left, const void *src, u32 src_size, u64 if (src_size > 0xFFFFFF || !hash) // Max 16MB - 1 chunks and aligned x4 hash buffer. return 0; + // Src size of 0 is not supported, so return null string sha256. + // if (!src_size) + // { + // const u8 null_hash[SE_SHA_256_SIZE] = { + // 0xE3, 0xB0, 0xC4, 0x42, 0x98, 0xFC, 0x1C, 0x14, 0x9A, 0xFB, 0xF4, 0xC8, 0x99, 0x6F, 0xB9, 0x24, + // 0x27, 0xAE, 0x41, 0xE4, 0x64, 0x9B, 0x93, 0x4C, 0xA4, 0x95, 0x99, 0x1B, 0x78, 0x52, 0xB8, 0x55 + // }; + // memcpy(hash, null_hash, SE_SHA_256_SIZE); + // return 1; + // } + // Setup config for SHA256. SE(SE_CONFIG_REG) = SE_CONFIG_ENC_MODE(MODE_SHA256) | SE_CONFIG_ENC_ALG(ALG_SHA) | SE_CONFIG_DST(DST_HASHREG); SE(SE_SHA_CONFIG_REG) = sha_cfg; @@ -534,19 +562,7 @@ int se_calc_sha256(void *hash, u32 *msg_left, const void *src, u32 src_size, u64 res = _se_execute(SE_OP_START, NULL, 0, src, src_size, is_oneshot); if (is_oneshot) - { - // Backup message left. - if (msg_left) - { - msg_left[0] = SE(SE_SHA_MSG_LEFT_0_REG); - msg_left[1] = SE(SE_SHA_MSG_LEFT_1_REG); - } - - // Copy output hash. - for (u32 i = 0; i < (SE_SHA_256_SIZE / 4); i++) - hash32[i] = byte_swap_32(SE(SE_HASH_RESULT_REG + (i * 4))); - memcpy(hash, hash32, SE_SHA_256_SIZE); - } + se_calc_sha256_get_hash(hash, msg_left); return res; } @@ -558,20 +574,9 @@ int se_calc_sha256_oneshot(void *hash, const void *src, u32 src_size) int se_calc_sha256_finalize(void *hash, u32 *msg_left) { - u32 hash32[SE_SHA_256_SIZE / 4]; int res = _se_execute_finalize(); - // Backup message left. - if (msg_left) - { - msg_left[0] = SE(SE_SHA_MSG_LEFT_0_REG); - msg_left[1] = SE(SE_SHA_MSG_LEFT_1_REG); - } - - // Copy output hash. - for (u32 i = 0; i < (SE_SHA_256_SIZE / 4); i++) - hash32[i] = byte_swap_32(SE(SE_HASH_RESULT_REG + (i * 4))); - memcpy(hash, hash32, SE_SHA_256_SIZE); + se_calc_sha256_get_hash(hash, msg_left); return res; } From dab5eb9aa085f25232e6ebbc09a2f60cb3bf2df0 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sat, 6 Jan 2024 21:52:48 +0200 Subject: [PATCH 069/308] bdk: sprintf: do not accept null chars Skip NULL chars on putc since they break the resulted string. --- bdk/utils/sprintf.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/bdk/utils/sprintf.c b/bdk/utils/sprintf.c index 87f1526..c1e382c 100644 --- a/bdk/utils/sprintf.c +++ b/bdk/utils/sprintf.c @@ -112,7 +112,9 @@ void s_printf(char *out_buf, const char *fmt, ...) switch (*fmt) { case 'c': - _s_putc(va_arg(ap, u32)); + char c = va_arg(ap, u32); + if (c != '\0') + _s_putc(c); break; case 's': _s_puts(va_arg(ap, char *)); From c7333e710ce457cdcf7a1a6a148f43feceeeb4cb Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sat, 6 Jan 2024 21:55:21 +0200 Subject: [PATCH 070/308] bdk: strtol: support unsigned 32bit hex If base is 16 and input is not negative allow unsigned 32bit parsing. This allows parsing numbers of up to 4294967295 in that case. --- bdk/utils/util.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/bdk/utils/util.c b/bdk/utils/util.c index 5f00fe0..5434adf 100644 --- a/bdk/utils/util.c +++ b/bdk/utils/util.c @@ -102,8 +102,9 @@ u64 sqrt64(u64 num) return square_root; } -#define TLONG_MAX ((long)(((unsigned long)(~0L)) >> 1)) -#define TLONG_MIN ((long)(~TLONG_MAX)) +#define TULONG_MAX ((unsigned long)((unsigned long)(~0L))) +#define TLONG_MAX ((long)(((unsigned long)(~0L)) >> 1)) +#define TLONG_MIN ((long)(~TLONG_MAX)) #define ISSPACE(ch) ((ch >= '\t' && ch <= '\r') || (ch == ' ')) #define ISDIGIT(ch) ( ch >= '0' && ch <= '9' ) #define ISALPHA(ch) ((ch >= 'a' && ch <= 'z') || (ch >= 'A' && ch <= 'Z')) @@ -162,7 +163,7 @@ long strtol(const char *nptr, char **endptr, register int base) * Set any if any `digits' consumed; make it negative to indicate * overflow. */ - cutoff = neg ? -(unsigned long)TLONG_MIN : TLONG_MAX; + cutoff = neg ? -(unsigned long)TLONG_MIN : (base == 16 ? TULONG_MAX : TLONG_MAX); cutlim = cutoff % (unsigned long)base; cutoff /= (unsigned long)base; for (acc = 0, any = 0;; c = *s++) { From 74e252aaf25777e1249bd0cd29f5cc507e073d69 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sat, 6 Jan 2024 21:58:51 +0200 Subject: [PATCH 071/308] bdk: sdram: update latest reg tool vpr overrides Set them to default config and remove them from patching. --- bdk/mem/sdram_config.inl | 9 +++++---- bdk/mem/sdram_config_t210b01.inl | 14 ++++++++------ 2 files changed, 13 insertions(+), 10 deletions(-) diff --git a/bdk/mem/sdram_config.inl b/bdk/mem/sdram_config.inl index 66ce0c6..52f2611 100644 --- a/bdk/mem/sdram_config.inl +++ b/bdk/mem/sdram_config.inl @@ -542,10 +542,10 @@ static const sdram_params_t210_t _dram_cfg_0_samsung_4gb = { .mc_video_protect_bom_adr_hi = 0x00000000, .mc_video_protect_size_mb = 0x00000000, - // AFI, BPMP, HC, ISP2, CCPLEX, PPCS (AHB), SATA, VI, XUSB_HOST, XUSB_DEV, ADSP, PPCS1 (AHB), DC1, SDMMC1A, SDMMC2A, SDMMC3A. - .mc_video_protect_vpr_override = 0xE4BAC343, - // SDMMC4A, ISP2B, PPCS2 (AHB), APE, SE, HC1, SE1, AXIAP, ETR. - .mc_video_protect_vpr_override1 = 0x00001ED3, + // AFI, BPMP, HC, ISP2, CCPLEX, PPCS (AHB), SATA, VI, XUSB_HOST, XUSB_DEV, ADSP, PPCS1 (AHB), DC1, SDMMC1A, SDMMC2A, SDMMC3A. Plus TSEC, NVENC. + .mc_video_protect_vpr_override = 0xE4FACB43, // Default: 0xE4BAC343. New: 0xE4FACB43. + TSEC, NVENC. + // SDMMC4A, ISP2B, PPCS2 (AHB), APE, SE, HC1, SE1, AXIAP, ETR. Plus TSECB, TSEC1, TSECB1. + .mc_video_protect_vpr_override1 = 0x0000FED3, // Default: 0x00001ED3. New: 0x0000FED3. + TSECB, TSEC1, TSECB1. .mc_video_protect_gpu_override0 = 0x00000000, .mc_video_protect_gpu_override1 = 0x00000000, @@ -553,6 +553,7 @@ static const sdram_params_t210_t _dram_cfg_0_samsung_4gb = { .mc_sec_carveout_bom = 0xFFF00000, .mc_sec_carveout_adr_hi = 0x00000000, .mc_sec_carveout_size_mb = 0x00000000, + .mc_video_protect_write_access = 0x00000000, .mc_sec_carveout_protect_write_access = 0x00000000, diff --git a/bdk/mem/sdram_config_t210b01.inl b/bdk/mem/sdram_config_t210b01.inl index 4a6b83c..85d0094 100644 --- a/bdk/mem/sdram_config_t210b01.inl +++ b/bdk/mem/sdram_config_t210b01.inl @@ -595,10 +595,10 @@ static const sdram_params_t210b01_t _dram_cfg_08_10_12_14_samsung_hynix_4gb = { .mc_video_protect_bom_adr_hi = 0x00000000, .mc_video_protect_size_mb = 0x00000000, - // AFI, BPMP, HC, ISP2, CCPLEX, PPCS (AHB), SATA, VI, XUSB_HOST, XUSB_DEV, ADSP, PPCS1 (AHB), DC1, SDMMC1A, SDMMC2A, SDMMC3A. - .mc_video_protect_vpr_override = 0xE4BAC343, - // SDMMC4A, ISP2B, PPCS2 (AHB), APE, SE, HC1, SE1, AXIAP, ETR. Plus SE2, SE2B. - .mc_video_protect_vpr_override1 = 0x06001ED3, + // AFI, BPMP, HC, ISP2, CCPLEX, PPCS (AHB), SATA, VI, XUSB_HOST, XUSB_DEV, ADSP, PPCS1 (AHB), DC1, SDMMC1A, SDMMC2A, SDMMC3A. Plus TSEC, NVENC. + .mc_video_protect_vpr_override = 0xE4FACB43, // Default: 0xE4BAC343. + // SDMMC4A, ISP2B, PPCS2 (AHB), APE, SE, HC1, SE1, AXIAP, ETR. Plus SE2, SE2B and TSECB, TSEC1, TSECB1. + .mc_video_protect_vpr_override1 = 0x0600FED3, // Default: 0x06001ED3. .mc_video_protect_gpu_override0 = 0x00000000, .mc_video_protect_gpu_override1 = 0x00000000, @@ -606,6 +606,7 @@ static const sdram_params_t210b01_t _dram_cfg_08_10_12_14_samsung_hynix_4gb = { .mc_sec_carveout_bom = 0xFFF00000, .mc_sec_carveout_adr_hi = 0x00000000, .mc_sec_carveout_size_mb = 0x00000000, + .mc_video_protect_write_access = 0x00000000, .mc_sec_carveout_protect_write_access = 0x00000000, @@ -781,8 +782,9 @@ static const sdram_vendor_patch_t sdram_cfg_vendor_patches_t210b01[] = { { 0x00000008, DRAM_CC_LPDDR4X_FAW, DCFG_OFFSET_OF(emc_tfaw) }, { 0x00000001, DRAM_CC_LPDDR4X_FAW, DCFG_OFFSET_OF(mc_emem_arb_timing_faw) }, - { 0xE4FACB43, DRAM_CC_LPDDR4X_VPR, DCFG_OFFSET_OF(mc_video_protect_vpr_override) }, // + TSEC, NVENC. - { 0x0600FED3, DRAM_CC_LPDDR4X_VPR, DCFG_OFFSET_OF(mc_video_protect_vpr_override1) }, // + TSECB, TSEC1, TSECB1. + // Moved to default config. + // { 0xE4FACB43, DRAM_CC_LPDDR4X_VPR, DCFG_OFFSET_OF(mc_video_protect_vpr_override) }, // + TSEC, NVENC. + // { 0x0600FED3, DRAM_CC_LPDDR4X_VPR, DCFG_OFFSET_OF(mc_video_protect_vpr_override1) }, // + TSECB, TSEC1, TSECB1. { 0x00000001, DRAM_CC_LPDDR4X_8GB, DCFG_OFFSET_OF(emc_adr_cfg) }, // 2 Ranks. { 0x08010004, DRAM_CC_LPDDR4X_8GB, DCFG_OFFSET_OF(emc_mrw1) }, From 3874840d77b84cbd35b4cf36d2f3cd5d94fbb99e Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sat, 6 Jan 2024 21:59:18 +0200 Subject: [PATCH 072/308] bdk: sdram: update cfg for 8GB erista --- bdk/mem/sdram_config.inl | 1 - 1 file changed, 1 deletion(-) diff --git a/bdk/mem/sdram_config.inl b/bdk/mem/sdram_config.inl index 52f2611..9da06e9 100644 --- a/bdk/mem/sdram_config.inl +++ b/bdk/mem/sdram_config.inl @@ -667,7 +667,6 @@ static const sdram_vendor_patch_t sdram_cfg_vendor_patches_t210[] = { { 0x0000001D, DRAM_ID(7), DCFG_OFFSET_OF(emc_rfc_pb) }, { 0x0000003B, DRAM_ID(7), DCFG_OFFSET_OF(emc_txsr) }, { 0x0000003B, DRAM_ID(7), DCFG_OFFSET_OF(emc_txsr_dll) }, - { 0x00000713, DRAM_ID(7), DCFG_OFFSET_OF(emc_dyn_self_ref_control) }, { 0x00080302, DRAM_ID(7), DCFG_OFFSET_OF(mc_emem_adr_cfg_dev0) }, // 1024MB Chip 0 density. { 0x00080302, DRAM_ID(7), DCFG_OFFSET_OF(mc_emem_adr_cfg_dev1) }, // 1024MB Chip 1 density. { 0x00002000, DRAM_ID(7), DCFG_OFFSET_OF(mc_emem_cfg) }, // 8GB total density. Max 8GB. From eff27d92f2452ff4572c8bcd91a42934e115ff66 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sat, 6 Jan 2024 22:03:54 +0200 Subject: [PATCH 073/308] bdk: sdram: update default wpr overrides Since it's only used in L4T set them to the correct latest reg tool values. HOS overrides them anyway. --- bdk/mem/sdram_config.inl | 4 ++-- bdk/mem/sdram_config_t210b01.inl | 11 ++++++----- 2 files changed, 8 insertions(+), 7 deletions(-) diff --git a/bdk/mem/sdram_config.inl b/bdk/mem/sdram_config.inl index 9da06e9..88a8cb7 100644 --- a/bdk/mem/sdram_config.inl +++ b/bdk/mem/sdram_config.inl @@ -547,8 +547,8 @@ static const sdram_params_t210_t _dram_cfg_0_samsung_4gb = { // SDMMC4A, ISP2B, PPCS2 (AHB), APE, SE, HC1, SE1, AXIAP, ETR. Plus TSECB, TSEC1, TSECB1. .mc_video_protect_vpr_override1 = 0x0000FED3, // Default: 0x00001ED3. New: 0x0000FED3. + TSECB, TSEC1, TSECB1. - .mc_video_protect_gpu_override0 = 0x00000000, - .mc_video_protect_gpu_override1 = 0x00000000, + .mc_video_protect_gpu_override0 = 0x2A800000, // Default: 0x00000000. Forced to 1 by HOS Secmon. + .mc_video_protect_gpu_override1 = 0x00000002, // Default: 0x00000000. Forced to 0 by HOS Secmon. .mc_sec_carveout_bom = 0xFFF00000, .mc_sec_carveout_adr_hi = 0x00000000, diff --git a/bdk/mem/sdram_config_t210b01.inl b/bdk/mem/sdram_config_t210b01.inl index 85d0094..45c7c83 100644 --- a/bdk/mem/sdram_config_t210b01.inl +++ b/bdk/mem/sdram_config_t210b01.inl @@ -600,8 +600,8 @@ static const sdram_params_t210b01_t _dram_cfg_08_10_12_14_samsung_hynix_4gb = { // SDMMC4A, ISP2B, PPCS2 (AHB), APE, SE, HC1, SE1, AXIAP, ETR. Plus SE2, SE2B and TSECB, TSEC1, TSECB1. .mc_video_protect_vpr_override1 = 0x0600FED3, // Default: 0x06001ED3. - .mc_video_protect_gpu_override0 = 0x00000000, - .mc_video_protect_gpu_override1 = 0x00000000, + .mc_video_protect_gpu_override0 = 0x2A800000, // Default: 0x00000000. Forced to 1 by HOS Secmon. + .mc_video_protect_gpu_override1 = 0x00000002, // Default: 0x00000000. Forced to 0 by HOS Secmon. .mc_sec_carveout_bom = 0xFFF00000, .mc_sec_carveout_adr_hi = 0x00000000, @@ -767,9 +767,10 @@ static const sdram_vendor_patch_t sdram_cfg_vendor_patches_t210b01[] = { /*! Shared patched between DRAM Codes. */ { 0x05500000, DRAM_CC_LPDDR4X_PUPD_VPR, DCFG_OFFSET_OF(emc_auto_cal_config2) }, { 0xC9AFBCBC, DRAM_CC_LPDDR4X_PUPD_VPR, DCFG_OFFSET_OF(emc_auto_cal_vref_sel0) }, - { 0x2A800000, DRAM_CC_LPDDR4X_PUPD_VPR, DCFG_OFFSET_OF(mc_video_protect_gpu_override0) }, - { 0x00000002, DRAM_CC_LPDDR4X_PUPD_VPR, DCFG_OFFSET_OF(mc_video_protect_gpu_override1) }, - //!TODO Find out what mc_video_protect_gpu_override0 and mc_video_protect_gpu_override1 new bits are. + + // Moved to default config. + // { 0x2A800000, DRAM_CC_LPDDR4X_PUPD_VPR, DCFG_OFFSET_OF(mc_video_protect_gpu_override0) }, + // { 0x00000002, DRAM_CC_LPDDR4X_PUPD_VPR, DCFG_OFFSET_OF(mc_video_protect_gpu_override1) }, { 0x88161414, DRAM_CC_LPDDR4X_DSR, DCFG_OFFSET_OF(emc_mrw14) }, { 0x80000713, DRAM_CC_LPDDR4X_DSR, DCFG_OFFSET_OF(emc_dyn_self_ref_control) }, From 30c320d6e7e75559ab89bb5bd465e126eb4347d8 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sat, 6 Jan 2024 22:05:24 +0200 Subject: [PATCH 074/308] bdk: sdram: update all ram info comments --- bdk/mem/sdram.h | 54 ++++++++++++++++++++++++++++--------------------- 1 file changed, 31 insertions(+), 23 deletions(-) diff --git a/bdk/mem/sdram.h b/bdk/mem/sdram.h index e7832c7..ce28625 100644 --- a/bdk/mem/sdram.h +++ b/bdk/mem/sdram.h @@ -42,44 +42,52 @@ enum sdram_ids_erista { // LPDDR4 3200Mbps. - LPDDR4_ICOSA_4GB_SAMSUNG_K4F6E304HB_MGCH = 0, - LPDDR4_ICOSA_4GB_HYNIX_H9HCNNNBPUMLHR_NLE = 1, - LPDDR4_ICOSA_4GB_MICRON_MT53B512M32D2NP_062_WT = 2, // WT:C. + LPDDR4_ICOSA_4GB_SAMSUNG_K4F6E304HB_MGCH = 0, // Die-B. (2y-01). + LPDDR4_ICOSA_4GB_HYNIX_H9HCNNNBPUMLHR_NLE = 1, // Die-M. (2y-01). + LPDDR4_ICOSA_4GB_MICRON_MT53B512M32D2NP_062_WTC = 2, // Die-C. (2y-01). - LPDDR4_ICOSA_6GB_SAMSUNG_K4FHE3D4HM_MGCH = 4, + LPDDR4_ICOSA_6GB_SAMSUNG_K4FHE3D4HM_MGCH = 4, // Die-C. (2y-01). - LPDDR4_ICOSA_8GB_SAMSUNG_K4FBE3D4HM_MGXX = 7, // Custom 8GB. XX: CH/CJ/CL. 7 since it can be easily applied in fuses. + // Custom hekate/L4T supported 8GB. 7 dram id can be easily applied in fuses. + LPDDR4_ICOSA_8GB_SAMSUNG_K4FBE3D4HM_MGXX = 7, // XX: CH/CJ/CL. }; enum sdram_ids_mariko { + /* + * Nintendo Switch LPDRR4X generations: + * - 1x nm are 1st-gen + * - 1y nm are 2nd-gen + * - 1z/a nm are 3rd-gen + */ + // LPDDR4X 4266Mbps. LPDDR4X_HOAG_4GB_HYNIX_H9HCNNNBKMMLXR_NEE = 3, // Die-M. (1y-01). LPDDR4X_AULA_4GB_HYNIX_H9HCNNNBKMMLXR_NEE = 5, // Die-M. (1y-01). LPDDR4X_IOWA_4GB_HYNIX_H9HCNNNBKMMLXR_NEE = 6, // Die-M. (1y-01). // LPDDR4X 3733Mbps. - LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AM_MGCJ = 8, // Die-M. (1x-03). 1st gen. - LPDDR4X_IOWA_8GB_SAMSUNG_K4UBE3D4AM_MGCJ = 9, // Die-M. (1x-03). 1st gen. + LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AM_MGCJ = 8, // Die-M. (1x-03). + LPDDR4X_IOWA_8GB_SAMSUNG_K4UBE3D4AM_MGCJ = 9, // Die-M. (1x-03). LPDDR4X_IOWA_4GB_HYNIX_H9HCNNNBKMMLHR_NME = 10, // Die-M. (1x-03). LPDDR4X_IOWA_4GB_MICRON_MT53E512M32D2NP_046_WTE = 11, // Die-E. (1x-03). D9WGB. 4266Mbps. - LPDDR4X_HOAG_4GB_SAMSUNG_K4U6E3S4AM_MGCJ = 12, // Die-M. (1x-03). 1st gen. - LPDDR4X_HOAG_8GB_SAMSUNG_K4UBE3D4AM_MGCJ = 13, // Die-M. (1x-03). 1st gen. + LPDDR4X_HOAG_4GB_SAMSUNG_K4U6E3S4AM_MGCJ = 12, // Die-M. (1x-03). + LPDDR4X_HOAG_8GB_SAMSUNG_K4UBE3D4AM_MGCJ = 13, // Die-M. (1x-03). LPDDR4X_HOAG_4GB_HYNIX_H9HCNNNBKMMLHR_NME = 14, // Die-M. (1x-03). LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D2NP_046_WTE = 15, // Die-E. (1x-03). D9WGB. 4266Mbps. // LPDDR4X 4266Mbps. - LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AA_MGCL = 17, // Die-A. (1y-X03). 2nd gen. - LPDDR4X_IOWA_8GB_SAMSUNG_K4UBE3D4AA_MGCL = 18, // Die-A. (1y-X03). 2nd gen. - LPDDR4X_HOAG_4GB_SAMSUNG_K4U6E3S4AA_MGCL = 19, // Die-A. (1y-X03). 2nd gen. + LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AA_MGCL = 17, // Die-A. (1y-X03). + LPDDR4X_IOWA_8GB_SAMSUNG_K4UBE3D4AA_MGCL = 18, // Die-A. (1y-X03). + LPDDR4X_HOAG_4GB_SAMSUNG_K4U6E3S4AA_MGCL = 19, // Die-A. (1y-X03). - LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AB_MGCL = 20, // Die-B. (1z-01). 3rd gen. 40% lower power usage. - LPDDR4X_HOAG_4GB_SAMSUNG_K4U6E3S4AB_MGCL = 21, // Die-B. (1z-01). 3rd gen. 40% lower power usage. - LPDDR4X_AULA_4GB_SAMSUNG_K4U6E3S4AB_MGCL = 22, // Die-B. (1z-01). 3rd gen. 40% lower power usage. + LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AB_MGCL = 20, // Die-B. (1z-01). 40% lp. + LPDDR4X_HOAG_4GB_SAMSUNG_K4U6E3S4AB_MGCL = 21, // Die-B. (1z-01). 40% lp. + LPDDR4X_AULA_4GB_SAMSUNG_K4U6E3S4AB_MGCL = 22, // Die-B. (1z-01). 40% lp. - LPDDR4X_HOAG_8GB_SAMSUNG_K4UBE3D4AA_MGCL = 23, // Die-A. (1y-X03). 2nd gen. - LPDDR4X_AULA_4GB_SAMSUNG_K4U6E3S4AA_MGCL = 24, // Die-A. (1y-X03). 2nd gen. + LPDDR4X_HOAG_8GB_SAMSUNG_K4UBE3D4AA_MGCL = 23, // Die-A. (1y-X03). + LPDDR4X_AULA_4GB_SAMSUNG_K4U6E3S4AA_MGCL = 24, // Die-A. (1y-X03). LPDDR4X_IOWA_4GB_MICRON_MT53E512M32D2NP_046_WTF = 25, // Die-F. (1y-01). D9XRR. LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D2NP_046_WTF = 26, // Die-F. (1y-01). D9XRR. @@ -87,13 +95,13 @@ enum sdram_ids_mariko LPDDR4X_AULA_8GB_SAMSUNG_K4UBE3D4AA_MGCL = 28, // Die-A. (1y-X03). 2nd gen. - LPDDR4X_IOWA_4GB_HYNIX_H54G46CYRBX267 = 29, // Die-C. (1a-01). 61% lower power usage. - LPDDR4X_HOAG_4GB_HYNIX_H54G46CYRBX267 = 30, // Die-C. (1a-01). 61% lower power usage. - LPDDR4X_AULA_4GB_HYNIX_H54G46CYRBX267 = 31, // Die-C. (1a-01). 61% lower power usage. + LPDDR4X_IOWA_4GB_HYNIX_H54G46CYRBX267 = 29, // Die-C. (1a-01). 61% lp. + LPDDR4X_HOAG_4GB_HYNIX_H54G46CYRBX267 = 30, // Die-C. (1a-01). 61% lp. + LPDDR4X_AULA_4GB_HYNIX_H54G46CYRBX267 = 31, // Die-C. (1a-01). 61% lp. - LPDDR4X_IOWA_4GB_MICRON_MT53E512M32D1NP_046_WTB = 32, // Die-B. (1a-01). 61% lower power usage. - LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D1NP_046_WTB = 33, // Die-B. (1a-01). 61% lower power usage. - LPDDR4X_AULA_4GB_MICRON_MT53E512M32D1NP_046_WTB = 34, // Die-B. (1a-01). 61% lower power usage. + LPDDR4X_IOWA_4GB_MICRON_MT53E512M32D1NP_046_WTB = 32, // Die-B. (1a-01). 61% lp. + LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D1NP_046_WTB = 33, // Die-B. (1a-01). 61% lp. + LPDDR4X_AULA_4GB_MICRON_MT53E512M32D1NP_046_WTB = 34, // Die-B. (1a-01). 61% lp. }; enum sdram_codes_mariko From d1bae553ec1c56d4932e9e03f1f205a66856ca4e Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sat, 6 Jan 2024 22:06:21 +0200 Subject: [PATCH 075/308] nyx: info: use the updated define for micron wtc --- nyx/nyx_gui/frontend/gui_info.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index 6327214..76884b1 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -440,7 +440,7 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) case LPDDR4_ICOSA_4GB_HYNIX_H9HCNNNBPUMLHR_NLE: strcpy(dram_man, "Hynix H9HCNNNBPUMLHR-NLE 4GB"); break; - case LPDDR4_ICOSA_4GB_MICRON_MT53B512M32D2NP_062_WT: + case LPDDR4_ICOSA_4GB_MICRON_MT53B512M32D2NP_062_WTC: strcpy(dram_man, "Micron MT53B512M32D2NP-062 WT:C"); break; case LPDDR4_ICOSA_6GB_SAMSUNG_K4FHE3D4HM_MGCH: From cc50ed20512a5393e00c0a1a674817bd3e2d594e Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sat, 6 Jan 2024 22:09:18 +0200 Subject: [PATCH 076/308] l4t: remove redundant wpr cfg It's now done in dram cfg. --- bootloader/l4t/l4t.c | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/bootloader/l4t/l4t.c b/bootloader/l4t/l4t.c index f83fc82..f21ea5d 100644 --- a/bootloader/l4t/l4t.c +++ b/bootloader/l4t/l4t.c @@ -362,8 +362,6 @@ static void _l4t_sdram_lp0_save_params(bool t210b01) } else { s(MC_VIDEO_PROTECT_REG_CTRL, 1:0, secure_scratch14, 31:30); } - s32(MC_VIDEO_PROTECT_GPU_OVERRIDE_0, secure_scratch12); - s(MC_VIDEO_PROTECT_GPU_OVERRIDE_1, 15:0, secure_scratch49, 15:0); // TZD. s(MC_SEC_CARVEOUT_BOM, 31:20, secure_scratch53, 23:12); @@ -471,14 +469,6 @@ static void _l4t_mc_config_carveout(bool t210b01) // Disabled VPR carveout. DT decides if enabled or not. MC(MC_VIDEO_PROTECT_BOM) = 0xFFF00000; MC(MC_VIDEO_PROTECT_SIZE_MB) = 0; - if (!t210b01) - { - // For T210 force the following values for Falcon to configure WPR access. - // For T210B01 use default, already set from dram config. - // HOS forces 1 and 0. - MC(MC_VIDEO_PROTECT_GPU_OVERRIDE_0) = 0x2A800000; - MC(MC_VIDEO_PROTECT_GPU_OVERRIDE_1) = 2; - } MC(MC_VIDEO_PROTECT_REG_CTRL) = VPR_CTRL_TZ_SECURE | VPR_CTRL_LOCKED; // Temporarily disable TZDRAM carveout. For launching coldboot TZ. From 75543875e2f7fdc23b98d6a30177fd5f26e1bd15 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 7 Jan 2024 12:33:29 +0200 Subject: [PATCH 077/308] bdk: mc: remove some redundant carveout cfg --- bdk/mem/mc.c | 93 +++++++++++++--------------------------------------- 1 file changed, 22 insertions(+), 71 deletions(-) diff --git a/bdk/mem/mc.c b/bdk/mem/mc.c index 0b0749e..4e6ede6 100644 --- a/bdk/mem/mc.c +++ b/bdk/mem/mc.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2022 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -21,7 +21,7 @@ #include #include -void mc_config_tsec_carveout(u32 bom, u32 size1mb, bool lock) +void mc_config_tzdram_carveout(u32 bom, u32 size1mb, bool lock) { MC(MC_SEC_CARVEOUT_BOM) = bom; MC(MC_SEC_CARVEOUT_SIZE_MB) = size1mb; @@ -31,96 +31,47 @@ void mc_config_tsec_carveout(u32 bom, u32 size1mb, bool lock) void mc_config_carveout() { + // Enable ACR GSR3. *(vu32 *)0x8005FFFC = 0xC0EDBBCC; MC(MC_VIDEO_PROTECT_GPU_OVERRIDE_0) = 1; MC(MC_VIDEO_PROTECT_GPU_OVERRIDE_1) = 0; MC(MC_VIDEO_PROTECT_BOM) = 0; - MC(MC_VIDEO_PROTECT_SIZE_MB) = 0; - MC(MC_VIDEO_PROTECT_REG_CTRL) = 1; + MC(MC_VIDEO_PROTECT_REG_CTRL) = VPR_CTRL_LOCKED; - // Configure TSEC carveout @ 0x90000000, 1MB. - //mc_config_tsec_carveout(0x90000000, 1, false); - mc_config_tsec_carveout(0, 0, true); + // Configure TZDRAM carveout @ 0x90000000, 1MB. + //mc_config_tzdram_carveout(0x90000000, 1, false); + mc_config_tzdram_carveout(0, 0, true); MC(MC_MTS_CARVEOUT_BOM) = 0; - MC(MC_MTS_CARVEOUT_SIZE_MB) = 0; - MC(MC_MTS_CARVEOUT_ADR_HI) = 0; MC(MC_MTS_CARVEOUT_REG_CTRL) = 1; - MC(MC_SECURITY_CARVEOUT1_BOM) = 0; - MC(MC_SECURITY_CARVEOUT1_BOM_HI) = 0; MC(MC_SECURITY_CARVEOUT1_SIZE_128KB) = 0; - MC(MC_SECURITY_CARVEOUT1_CLIENT_ACCESS0) = 0; - MC(MC_SECURITY_CARVEOUT1_CLIENT_ACCESS1) = 0; MC(MC_SECURITY_CARVEOUT1_CLIENT_ACCESS2) = 0; MC(MC_SECURITY_CARVEOUT1_CLIENT_ACCESS3) = 0; - MC(MC_SECURITY_CARVEOUT1_CLIENT_ACCESS4) = 0; - MC(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS0) = 0; - MC(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS1) = 0; - MC(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS2) = 0; - MC(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS3) = 0; - MC(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS4) = 0; - MC(MC_SECURITY_CARVEOUT1_CFG0) = 0x4000006; + MC(MC_SECURITY_CARVEOUT1_CFG0) = SEC_CARVEOUT_CFG_LOCKED | + SEC_CARVEOUT_CFG_UNTRANSLATED_ONLY | + SEC_CARVEOUT_CFG_APERTURE_ID(0) | + SEC_CARVEOUT_CFG_FORCE_APERTURE_ID_MATCH; MC(MC_SECURITY_CARVEOUT2_BOM) = 0x80020000; - MC(MC_SECURITY_CARVEOUT2_BOM_HI) = 0; - MC(MC_SECURITY_CARVEOUT2_SIZE_128KB) = 2; - MC(MC_SECURITY_CARVEOUT2_CLIENT_ACCESS0) = 0; - MC(MC_SECURITY_CARVEOUT2_CLIENT_ACCESS1) = 0; - MC(MC_SECURITY_CARVEOUT2_CLIENT_ACCESS2) = 0x3100000; - MC(MC_SECURITY_CARVEOUT2_CLIENT_ACCESS3) = 0; - MC(MC_SECURITY_CARVEOUT2_CLIENT_ACCESS4) = 0x300; - MC(MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS0) = 0; - MC(MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS1) = 0; - MC(MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS2) = 0; - MC(MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS3) = 0; - MC(MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS4) = 0; - MC(MC_SECURITY_CARVEOUT2_CFG0) = 0x440167E; + MC(MC_SECURITY_CARVEOUT2_CLIENT_ACCESS2) = SEC_CARVEOUT_CA2_R_GPU | SEC_CARVEOUT_CA2_W_GPU | SEC_CARVEOUT_CA2_R_TSEC; - MC(MC_SECURITY_CARVEOUT3_BOM) = 0; - MC(MC_SECURITY_CARVEOUT3_BOM_HI) = 0; - MC(MC_SECURITY_CARVEOUT3_SIZE_128KB) = 0; - MC(MC_SECURITY_CARVEOUT3_CLIENT_ACCESS0) = 0; - MC(MC_SECURITY_CARVEOUT3_CLIENT_ACCESS1) = 0; - MC(MC_SECURITY_CARVEOUT3_CLIENT_ACCESS2) = 0x3000000; - MC(MC_SECURITY_CARVEOUT3_CLIENT_ACCESS3) = 0; - MC(MC_SECURITY_CARVEOUT3_CLIENT_ACCESS4) = 0x300; - MC(MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS0) = 0; - MC(MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS1) = 0; - MC(MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS2) = 0; - MC(MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS3) = 0; - MC(MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS4) = 0; - MC(MC_SECURITY_CARVEOUT3_CFG0) = 0x4401E7E; - - MC(MC_SECURITY_CARVEOUT4_BOM) = 0; - MC(MC_SECURITY_CARVEOUT4_BOM_HI) = 0; MC(MC_SECURITY_CARVEOUT4_SIZE_128KB) = 0; - MC(MC_SECURITY_CARVEOUT4_CLIENT_ACCESS0) = 0; - MC(MC_SECURITY_CARVEOUT4_CLIENT_ACCESS1) = 0; MC(MC_SECURITY_CARVEOUT4_CLIENT_ACCESS2) = 0; - MC(MC_SECURITY_CARVEOUT4_CLIENT_ACCESS3) = 0; MC(MC_SECURITY_CARVEOUT4_CLIENT_ACCESS4) = 0; - MC(MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS0) = 0; - MC(MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS1) = 0; - MC(MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS2) = 0; - MC(MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS3) = 0; - MC(MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS4) = 0; - MC(MC_SECURITY_CARVEOUT4_CFG0) = 0x8F; + MC(MC_SECURITY_CARVEOUT4_CFG0) = SEC_CARVEOUT_CFG_TZ_SECURE | + SEC_CARVEOUT_CFG_LOCKED | + SEC_CARVEOUT_CFG_UNTRANSLATED_ONLY | + SEC_CARVEOUT_CFG_RD_NS | + SEC_CARVEOUT_CFG_WR_NS; - MC(MC_SECURITY_CARVEOUT5_BOM) = 0; - MC(MC_SECURITY_CARVEOUT5_BOM_HI) = 0; MC(MC_SECURITY_CARVEOUT5_SIZE_128KB) = 0; - MC(MC_SECURITY_CARVEOUT5_CLIENT_ACCESS0) = 0; - MC(MC_SECURITY_CARVEOUT5_CLIENT_ACCESS1) = 0; MC(MC_SECURITY_CARVEOUT5_CLIENT_ACCESS2) = 0; - MC(MC_SECURITY_CARVEOUT5_CLIENT_ACCESS3) = 0; - MC(MC_SECURITY_CARVEOUT5_CLIENT_ACCESS4) = 0; - MC(MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS0) = 0; - MC(MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS1) = 0; - MC(MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS2) = 0; - MC(MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS3) = 0; - MC(MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS4) = 0; - MC(MC_SECURITY_CARVEOUT5_CFG0) = 0x8F; + MC(MC_SECURITY_CARVEOUT5_CFG0) = SEC_CARVEOUT_CFG_TZ_SECURE | + SEC_CARVEOUT_CFG_LOCKED | + SEC_CARVEOUT_CFG_UNTRANSLATED_ONLY | + SEC_CARVEOUT_CFG_RD_NS | + SEC_CARVEOUT_CFG_WR_NS; } void mc_enable_ahb_redirect() From b37430dc1da7ea836fc9a630c0c0799aa5e8aa4b Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 7 Jan 2024 12:38:10 +0200 Subject: [PATCH 078/308] bdk: update copyright year --- bdk/mem/sdram.h | 3 ++- bdk/mem/sdram_config.inl | 32 ++++++++++++++++---------------- bdk/mem/sdram_config_t210b01.inl | 2 +- bdk/utils/sprintf.c | 2 +- bdk/utils/util.c | 2 +- 5 files changed, 21 insertions(+), 20 deletions(-) diff --git a/bdk/mem/sdram.h b/bdk/mem/sdram.h index ce28625..902162c 100644 --- a/bdk/mem/sdram.h +++ b/bdk/mem/sdram.h @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2020-2023 CTCaer + * Copyright (c) 2020-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -95,6 +95,7 @@ enum sdram_ids_mariko LPDDR4X_AULA_8GB_SAMSUNG_K4UBE3D4AA_MGCL = 28, // Die-A. (1y-X03). 2nd gen. + // Old naming scheme: H9HCNNNBKMCLXR-NEE LPDDR4X_IOWA_4GB_HYNIX_H54G46CYRBX267 = 29, // Die-C. (1a-01). 61% lp. LPDDR4X_HOAG_4GB_HYNIX_H54G46CYRBX267 = 30, // Die-C. (1a-01). 61% lp. LPDDR4X_AULA_4GB_HYNIX_H54G46CYRBX267 = 31, // Die-C. (1a-01). 61% lp. diff --git a/bdk/mem/sdram_config.inl b/bdk/mem/sdram_config.inl index 88a8cb7..e3025d6 100644 --- a/bdk/mem/sdram_config.inl +++ b/bdk/mem/sdram_config.inl @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2020-2022 CTCaer + * Copyright (c) 2020-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -651,24 +651,24 @@ static const sdram_params_t210_t _dram_cfg_0_samsung_4gb = { #define DCFG_OFFSET_OF(m) (OFFSET_OF(sdram_params_t210_t, m) / 4) static const sdram_vendor_patch_t sdram_cfg_vendor_patches_t210[] = { // Hynix timing config. - { 0x0000000D, DRAM_ID(1), DCFG_OFFSET_OF(emc_r2w) }, - { 0x00000001, DRAM_ID(1), DCFG_OFFSET_OF(emc_puterm_extra) }, - { 0x80000000, DRAM_ID(1), DCFG_OFFSET_OF(emc_puterm_width) }, - { 0x00000210, DRAM_ID(1), DCFG_OFFSET_OF(emc_pmacro_data_rx_term_mode) }, - { 0x00000005, DRAM_ID(1), DCFG_OFFSET_OF(mc_emem_arb_timing_r2w) }, + { 0x0000000D, DRAM_ID(LPDDR4_ICOSA_4GB_HYNIX_H9HCNNNBPUMLHR_NLE), DCFG_OFFSET_OF(emc_r2w) }, + { 0x00000001, DRAM_ID(LPDDR4_ICOSA_4GB_HYNIX_H9HCNNNBPUMLHR_NLE), DCFG_OFFSET_OF(emc_puterm_extra) }, + { 0x80000000, DRAM_ID(LPDDR4_ICOSA_4GB_HYNIX_H9HCNNNBPUMLHR_NLE), DCFG_OFFSET_OF(emc_puterm_width) }, + { 0x00000210, DRAM_ID(LPDDR4_ICOSA_4GB_HYNIX_H9HCNNNBPUMLHR_NLE), DCFG_OFFSET_OF(emc_pmacro_data_rx_term_mode) }, + { 0x00000005, DRAM_ID(LPDDR4_ICOSA_4GB_HYNIX_H9HCNNNBPUMLHR_NLE), DCFG_OFFSET_OF(mc_emem_arb_timing_r2w) }, // Samsung 6GB density config. - { 0x000C0302, DRAM_ID(4), DCFG_OFFSET_OF(mc_emem_adr_cfg_dev0) }, // 768MB Chip 0 density. - { 0x000C0302, DRAM_ID(4), DCFG_OFFSET_OF(mc_emem_adr_cfg_dev1) }, // 768MB Chip 1 density. - { 0x00001800, DRAM_ID(4), DCFG_OFFSET_OF(mc_emem_cfg) }, // 6GB total density. Max 8GB. + { 0x000C0302, DRAM_ID(LPDDR4_ICOSA_6GB_SAMSUNG_K4FHE3D4HM_MGCH), DCFG_OFFSET_OF(mc_emem_adr_cfg_dev0) }, // 768MB Chip 0 density. + { 0x000C0302, DRAM_ID(LPDDR4_ICOSA_6GB_SAMSUNG_K4FHE3D4HM_MGCH), DCFG_OFFSET_OF(mc_emem_adr_cfg_dev1) }, // 768MB Chip 1 density. + { 0x00001800, DRAM_ID(LPDDR4_ICOSA_6GB_SAMSUNG_K4FHE3D4HM_MGCH), DCFG_OFFSET_OF(mc_emem_cfg) }, // 6GB total density. Max 8GB. // Samsung 8GB density config. - { 0x0000003A, DRAM_ID(7), DCFG_OFFSET_OF(emc_rfc) }, - { 0x0000001D, DRAM_ID(7), DCFG_OFFSET_OF(emc_rfc_pb) }, - { 0x0000003B, DRAM_ID(7), DCFG_OFFSET_OF(emc_txsr) }, - { 0x0000003B, DRAM_ID(7), DCFG_OFFSET_OF(emc_txsr_dll) }, - { 0x00080302, DRAM_ID(7), DCFG_OFFSET_OF(mc_emem_adr_cfg_dev0) }, // 1024MB Chip 0 density. - { 0x00080302, DRAM_ID(7), DCFG_OFFSET_OF(mc_emem_adr_cfg_dev1) }, // 1024MB Chip 1 density. - { 0x00002000, DRAM_ID(7), DCFG_OFFSET_OF(mc_emem_cfg) }, // 8GB total density. Max 8GB. + { 0x0000003A, DRAM_ID(LPDDR4_ICOSA_8GB_SAMSUNG_K4FBE3D4HM_MGXX), DCFG_OFFSET_OF(emc_rfc) }, + { 0x0000001D, DRAM_ID(LPDDR4_ICOSA_8GB_SAMSUNG_K4FBE3D4HM_MGXX), DCFG_OFFSET_OF(emc_rfc_pb) }, + { 0x0000003B, DRAM_ID(LPDDR4_ICOSA_8GB_SAMSUNG_K4FBE3D4HM_MGXX), DCFG_OFFSET_OF(emc_txsr) }, + { 0x0000003B, DRAM_ID(LPDDR4_ICOSA_8GB_SAMSUNG_K4FBE3D4HM_MGXX), DCFG_OFFSET_OF(emc_txsr_dll) }, + { 0x00080302, DRAM_ID(LPDDR4_ICOSA_8GB_SAMSUNG_K4FBE3D4HM_MGXX), DCFG_OFFSET_OF(mc_emem_adr_cfg_dev0) }, // 1024MB Chip 0 density. + { 0x00080302, DRAM_ID(LPDDR4_ICOSA_8GB_SAMSUNG_K4FBE3D4HM_MGXX), DCFG_OFFSET_OF(mc_emem_adr_cfg_dev1) }, // 1024MB Chip 1 density. + { 0x00002000, DRAM_ID(LPDDR4_ICOSA_8GB_SAMSUNG_K4FBE3D4HM_MGXX), DCFG_OFFSET_OF(mc_emem_cfg) }, // 8GB total density. Max 8GB. }; #undef DCFG_OFFSET_OF diff --git a/bdk/mem/sdram_config_t210b01.inl b/bdk/mem/sdram_config_t210b01.inl index 45c7c83..3879e0c 100644 --- a/bdk/mem/sdram_config_t210b01.inl +++ b/bdk/mem/sdram_config_t210b01.inl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2023 CTCaer + * Copyright (c) 2020-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, diff --git a/bdk/utils/sprintf.c b/bdk/utils/sprintf.c index c1e382c..3745c53 100644 --- a/bdk/utils/sprintf.c +++ b/bdk/utils/sprintf.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert -* Copyright (c) 2019-2022 CTCaer +* Copyright (c) 2019-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, diff --git a/bdk/utils/util.c b/bdk/utils/util.c index 5434adf..630fbf2 100644 --- a/bdk/utils/util.c +++ b/bdk/utils/util.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert -* Copyright (c) 2018-2022 CTCaer +* Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, From e9d2bdb12405b9e568ac8e5345b96ad8d3fdf123 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 7 Jan 2024 12:40:28 +0200 Subject: [PATCH 079/308] l4t: remove more redundant carveout cfg --- bootloader/l4t/l4t.c | 29 +---------------------------- 1 file changed, 1 insertion(+), 28 deletions(-) diff --git a/bootloader/l4t/l4t.c b/bootloader/l4t/l4t.c index f21ea5d..5a2b4fa 100644 --- a/bootloader/l4t/l4t.c +++ b/bootloader/l4t/l4t.c @@ -1,7 +1,7 @@ /* * L4T Loader for Tegra X1 * - * Copyright (c) 2020-2023 CTCaer + * Copyright (c) 2020-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -476,11 +476,6 @@ static void _l4t_mc_config_carveout(bool t210b01) MC(MC_SEC_CARVEOUT_SIZE_MB) = 0; MC(MC_SEC_CARVEOUT_REG_CTRL) = 0; - // Disable MTS carveout. Only CCPLEX has access. - MC(MC_SEC_CARVEOUT_BOM) = 0xFFF00000; - MC(MC_SEC_CARVEOUT_SIZE_MB) = 0; - MC(MC_SEC_CARVEOUT_REG_CTRL) = 0; - // Print real one, not temp disabled. UPRINTF("TZD: TZDRAM Carveout: %08X - %08X\n", TZDRAM_BASE, TZDRAM_BASE - 1 + TZDRAM_SIZE); @@ -647,18 +642,7 @@ static void _l4t_mc_config_carveout(bool t210b01) */ carveout_base -= CARVEOUT_NVDEC_TSEC_ENABLE ? ALIGN(CARVEOUT_TSEC_SIZE, SZ_1M) : 0; MC(MC_SECURITY_CARVEOUT4_BOM) = CARVEOUT_NVDEC_TSEC_ENABLE ? carveout_base : 0; - MC(MC_SECURITY_CARVEOUT4_BOM_HI) = 0x0; MC(MC_SECURITY_CARVEOUT4_SIZE_128KB) = CARVEOUT_NVDEC_TSEC_ENABLE ? CARVEOUT_TSEC_SIZE / SZ_128K : 0; - MC(MC_SECURITY_CARVEOUT4_CLIENT_ACCESS0) = 0; - MC(MC_SECURITY_CARVEOUT4_CLIENT_ACCESS1) = 0; - MC(MC_SECURITY_CARVEOUT4_CLIENT_ACCESS2) = SEC_CARVEOUT_CA2_R_TSEC | SEC_CARVEOUT_CA2_W_TSEC; - MC(MC_SECURITY_CARVEOUT4_CLIENT_ACCESS3) = 0; - MC(MC_SECURITY_CARVEOUT4_CLIENT_ACCESS4) = SEC_CARVEOUT_CA4_R_TSECB | SEC_CARVEOUT_CA4_W_TSECB; - MC(MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS0) = 0; - MC(MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS1) = 0; - MC(MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS2) = 0; - MC(MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS3) = 0; - MC(MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS4) = 0; MC(MC_SECURITY_CARVEOUT4_CFG0) = SEC_CARVEOUT_CFG_LOCKED | SEC_CARVEOUT_CFG_RD_FALCON_HS | SEC_CARVEOUT_CFG_WR_FALCON_HS | @@ -671,18 +655,7 @@ static void _l4t_mc_config_carveout(bool t210b01) // Set TSECA carveout. Only for NVDEC bl/prod and TSEC. Otherwise disabled. carveout_base -= CARVEOUT_NVDEC_TSEC_ENABLE ? ALIGN(CARVEOUT_TSEC_SIZE, SZ_1M) : 0; MC(MC_SECURITY_CARVEOUT5_BOM) = CARVEOUT_NVDEC_TSEC_ENABLE ? carveout_base : 0; - MC(MC_SECURITY_CARVEOUT5_BOM_HI) = 0; MC(MC_SECURITY_CARVEOUT5_SIZE_128KB) = CARVEOUT_NVDEC_TSEC_ENABLE ? CARVEOUT_TSEC_SIZE / SZ_128K : 0; - MC(MC_SECURITY_CARVEOUT5_CLIENT_ACCESS0) = 0; - MC(MC_SECURITY_CARVEOUT5_CLIENT_ACCESS1) = 0; - MC(MC_SECURITY_CARVEOUT5_CLIENT_ACCESS2) = SEC_CARVEOUT_CA2_R_TSEC | SEC_CARVEOUT_CA2_W_TSEC; - MC(MC_SECURITY_CARVEOUT5_CLIENT_ACCESS3) = 0; - MC(MC_SECURITY_CARVEOUT5_CLIENT_ACCESS4) = 0; - MC(MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS0) = 0; - MC(MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS1) = 0; - MC(MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS2) = 0; - MC(MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS3) = 0; - MC(MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS4) = 0; MC(MC_SECURITY_CARVEOUT5_CFG0) = SEC_CARVEOUT_CFG_LOCKED | SEC_CARVEOUT_CFG_RD_FALCON_HS | SEC_CARVEOUT_CFG_WR_FALCON_HS | From 4576ed81ef3068379e6f6ba17d8413a9a1f2f47e Mon Sep 17 00:00:00 2001 From: CTCaer Date: Mon, 12 Feb 2024 04:08:39 +0200 Subject: [PATCH 080/308] sdram: acquire per chip mrr info --- bdk/mem/emc.h | 8 +++++++- bdk/mem/sdram.c | 45 +++++++++++++++++++++++++++++++++------------ 2 files changed, 40 insertions(+), 13 deletions(-) diff --git a/bdk/mem/emc.h b/bdk/mem/emc.h index e4ff626..24266e2 100644 --- a/bdk/mem/emc.h +++ b/bdk/mem/emc.h @@ -712,7 +712,7 @@ enum EMC_CHAN1 = 1 }; -typedef struct _emc_mr_data_t +typedef struct _emc_mr_chip_data_t { // Device 0. u8 rank0_ch0; @@ -721,6 +721,12 @@ typedef struct _emc_mr_data_t // Device 1. u8 rank1_ch0; u8 rank1_ch1; +} emc_mr_chip_data_t; + +typedef struct _emc_mr_data_t +{ + emc_mr_chip_data_t chip0; + emc_mr_chip_data_t chip1; } emc_mr_data_t; #endif diff --git a/bdk/mem/sdram.c b/bdk/mem/sdram.c index f383aed..868387a 100644 --- a/bdk/mem/sdram.c +++ b/bdk/mem/sdram.c @@ -127,15 +127,19 @@ static void _sdram_req_mrr_data(u32 data, bool dual_channel) emc_mr_data_t sdram_read_mrx(emc_mr_t mrx) { emc_mr_data_t data; - u32 dual_channel = (EMC(EMC_FBIO_CFG7) >> 2) & 1; + u32 mrr; + bool dual_rank = EMC(EMC_ADR_CFG) & 1; + bool dual_channel = (EMC(EMC_FBIO_CFG7) >> 2) & 1; // Each EMC channel is a RAM chip module. // Clear left overs. - for (u32 i = 0; i < 32; i++) + for (u32 i = 0; i < 16; i++) { (void)EMC(EMC_MRR); usleep(1); } + memset(&data, 0xFF, sizeof(emc_mr_data_t)); + /* * When a dram chip has only one rank, then the info from the 2 ranks differs. * Info not matching is only allowed on different channels. @@ -143,21 +147,38 @@ emc_mr_data_t sdram_read_mrx(emc_mr_t mrx) // Get Device 0 (Rank 0) info from both dram chips (channels). _sdram_req_mrr_data((2u << 30) | (mrx << 16), dual_channel); - data.rank0_ch0 = EMC(EMC_MRR) & 0xFF; - data.rank0_ch1 = (EMC(EMC_MRR) & 0xFF00 >> 8); + + // Ram module 0 info. + mrr = EMC_CH0(EMC_MRR); + data.chip0.rank0_ch0 = mrr & 0xFF; + data.chip0.rank0_ch1 = (mrr & 0xFF00 >> 8); + + // Ram module 1 info. + if (dual_channel) + { + mrr = EMC_CH1(EMC_MRR); + data.chip1.rank0_ch0 = mrr & 0xFF; + data.chip1.rank0_ch1 = (mrr & 0xFF00 >> 8); + } // If Rank 1 exists, get info. - if (EMC(EMC_ADR_CFG) & 1) + if (dual_rank) { // Get Device 1 (Rank 1) info from both dram chips (channels). _sdram_req_mrr_data((1u << 30) | (mrx << 16), dual_channel); - data.rank1_ch0 = EMC(EMC_MRR) & 0xFF; - data.rank1_ch1 = (EMC(EMC_MRR) & 0xFF00 >> 8); - } - else - { - data.rank1_ch0 = 0xFF; - data.rank1_ch1 = 0xFF; + + // Ram module 0 info. + mrr = EMC_CH0(EMC_MRR); + data.chip0.rank1_ch0 = mrr & 0xFF; + data.chip0.rank1_ch1 = (mrr & 0xFF00 >> 8); + + // Ram module 1 info. + if (dual_channel) + { + mrr = EMC_CH1(EMC_MRR); + data.chip1.rank1_ch0 = mrr & 0xFF; + data.chip1.rank1_ch1 = (mrr & 0xFF00 >> 8); + } } return data; From 8c5fdf52d4f9c5a4b967861cc8907ed33b9bd7c2 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Mon, 12 Feb 2024 04:13:39 +0200 Subject: [PATCH 081/308] nyx: correct dram info Parse per module info on channel A, rank 0. It was channel info on chip 0, rank0 before. --- nyx/nyx_gui/frontend/gui_info.c | 34 ++++++++++++++++++++++----------- 1 file changed, 23 insertions(+), 11 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index 76884b1..6af7259 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -658,11 +658,11 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) emc_mr_data_t ram_rev0 = sdram_read_mrx(MR6_REV_ID1); emc_mr_data_t ram_rev1 = sdram_read_mrx(MR7_REV_ID2); emc_mr_data_t ram_density = sdram_read_mrx(MR8_DENSITY); - u32 ranks = EMC(EMC_ADR_CFG) + 1; + u32 ranks = EMC(EMC_ADR_CFG) + 1; u32 channels = (EMC(EMC_FBIO_CFG7) >> 1) & 3; channels = (channels & 1) + ((channels & 2) >> 1); s_printf(txt_buf, "#00DDFF %s SDRAM ##FF8000 (Ch 0 | Ch 1):#\n#FF8000 Vendor:# ", h_cfg.t210b01 ? "LPDDR4X" : "LPDDR4"); - switch (ram_vendor.rank0_ch0) + switch (ram_vendor.chip0.rank0_ch0) { case 1: strcat(txt_buf, "Samsung"); @@ -682,12 +682,24 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) case 9: strcat(txt_buf, "ESMT"); break; + case 19: + strcat(txt_buf, "CXMT"); + break; case 26: - strcat(txt_buf, "Xi'an UniIC Semiconductors Co., Ltd"); + strcat(txt_buf, "Xi'an UniIC"); + break; + case 27: + strcat(txt_buf, "ISSI"); break; case 28: strcat(txt_buf, "JSC"); break; + case 197: + strcat(txt_buf, "SINKER"); + break; + case 229: + strcat(txt_buf, "Dosilicon"); + break; case 248: strcat(txt_buf, "Fidelix"); break; @@ -702,11 +714,11 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) strcat(txt_buf, "Micron"); break; default: - s_printf(txt_buf + strlen(txt_buf), "#FF8000 Unknown# (%d)", ram_vendor.rank0_ch0); + s_printf(txt_buf + strlen(txt_buf), "#FF8000 Unknown# (%d)", ram_vendor.chip0.rank0_ch0); break; } strcat(txt_buf, " #FF8000 |# "); - switch (ram_vendor.rank0_ch1) + switch (ram_vendor.chip1.rank0_ch0) { case 1: strcat(txt_buf, "Samsung"); @@ -718,12 +730,12 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) strcat(txt_buf, "Micron"); break; default: - s_printf(txt_buf + strlen(txt_buf), "#FF8000 Unknown# (%d)", ram_vendor.rank0_ch1); + s_printf(txt_buf + strlen(txt_buf), "#FF8000 Unknown# (%d)", ram_vendor.chip1.rank0_ch0); break; } s_printf(txt_buf + strlen(txt_buf), "\n#FF8000 Rev ID:# %X.%02X #FF8000 |# %X.%02X\n#FF8000 Density:# %d", - ram_rev0.rank0_ch0, ram_rev1.rank0_ch0, ram_rev0.rank0_ch1, ram_rev1.rank0_ch1, ranks * channels); - switch ((ram_density.rank0_ch0 & 0x3C) >> 2) + ram_rev0.chip0.rank0_ch0, ram_rev1.chip0.rank0_ch0, ram_rev0.chip1.rank0_ch0, ram_rev1.chip1.rank0_ch0, ranks * channels); + switch ((ram_density.chip0.rank0_ch0 & 0x3C) >> 2) { case 2: strcat(txt_buf, " x 512MB"); @@ -741,11 +753,11 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) strcat(txt_buf, " x 2GB"); break; default: - s_printf(txt_buf + strlen(txt_buf), " x Unk (%d)", (ram_density.rank0_ch0 & 0x3C) >> 2); + s_printf(txt_buf + strlen(txt_buf), " x Unk (%d)", (ram_density.chip0.rank0_ch0 & 0x3C) >> 2); break; } s_printf(txt_buf + strlen(txt_buf), " #FF8000 |# %d", ranks * channels); - switch ((ram_density.rank0_ch1 & 0x3C) >> 2) + switch ((ram_density.chip1.rank0_ch0 & 0x3C) >> 2) { case 2: strcat(txt_buf, " x 512MB"); @@ -763,7 +775,7 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) strcat(txt_buf, " x 2GB"); break; default: - s_printf(txt_buf + strlen(txt_buf), " x Unk (%d)", (ram_density.rank0_ch1 & 0x3C) >> 2); + s_printf(txt_buf + strlen(txt_buf), " x Unk (%d)", (ram_density.chip1.rank0_ch0 & 0x3C) >> 2); break; } strcat(txt_buf, "\n\n"); From 38a792e564db5949257bd2254201ed3d05ef9bdf Mon Sep 17 00:00:00 2001 From: CTCaer Date: Mon, 12 Feb 2024 04:14:14 +0200 Subject: [PATCH 082/308] nyx: add penel rev and change some labels --- nyx/nyx_gui/frontend/gui_info.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index 6af7259..1420415 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -813,6 +813,9 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) case 0x98: strcat(txt_buf, "-???"); break; + case 0x99: + strcat(txt_buf, "-???"); + break; default: strcat(txt_buf, " #FFDD00 Contact me!#"); break; @@ -832,13 +835,13 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) strcat(txt_buf, "02"); break; case 0x96: - strcat(txt_buf, "XX"); + strcat(txt_buf, "??"); break; case 0x97: - strcat(txt_buf, "XX"); + strcat(txt_buf, "??"); break; case 0x98: - strcat(txt_buf, "XX"); + strcat(txt_buf, "??"); break; default: strcat(txt_buf, " #FFDD00 Contact me!#"); @@ -2010,7 +2013,7 @@ static lv_res_t _create_window_sdcard_info_status(lv_obj_t *btn) "Bus Width:\n" "Current Rate:\n" "Speed Class:\n" - "UHS Grade/Classes:\n" + "UHS Classes:\n" "Max Bus Speed:\n\n" "Write Protect:" ); From bfc6069b2d00dbb3b8197646915cdc741c58ebe6 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 14 Feb 2024 00:08:06 +0200 Subject: [PATCH 083/308] bdk: display: add OEM panel id --- bdk/display/di.h | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/bdk/display/di.h b/bdk/display/di.h index 6161066..f353def 100644 --- a/bdk/display/di.h +++ b/bdk/display/di.h @@ -732,9 +732,10 @@ * [10] 96 [09]: JDI LAM062M109A * [20] 93 [0F]: InnoLux P062CCA-AZ1 (Rev A1) * [20] 95 [0F]: InnoLux P062CCA-AZ2 (Rev B1) - * [20] 96 [0F]: InnoLux P062CCA-AZ3 (Rev XX) [UNCONFIRMED MODEL+REV] + * [20] 96 [0F]: InnoLux P062CCA-??? (Rev XX) [UNCONFIRMED MODEL+REV] * [20] 97 [0F]: InnoLux P062CCA-??? (Rev XX) [UNCONFIRMED MODEL+REV] * [20] 98 [0F]: InnoLux P062CCA-??? (Rev XX) [UNCONFIRMED MODEL+REV] + * [20] 99 [0F]: InnoLux P062CCA-??? (Rev XX) [UNCONFIRMED MODEL+REV] * [30] 93 [0F]: AUO A062TAN00 (59.06A33.000) * [30] 94 [0F]: AUO A062TAN01 (59.06A33.001) * [30] 95 [0F]: AUO A062TAN02 (59.06A33.002) @@ -786,7 +787,9 @@ enum PANEL_INL_2J055IA_27A = 0x1020, PANEL_AUO_A055TAN01 = 0x1030, PANEL_SHP_LQ055T1SW10 = 0x1040, - PANEL_SAM_AMS699VC01 = 0x2050 + PANEL_SAM_AMS699VC01 = 0x2050, + + PANEL_OEM_5_5 = 0xB3 }; void display_init(); From 25e48472c802f982e4fbcb27788caf00af544bba Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 14 Feb 2024 02:17:45 +0200 Subject: [PATCH 084/308] nyx: add info about oem 5.5" panel --- nyx/nyx_gui/frontend/gui_info.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index 1420415..7a3c065 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -861,6 +861,9 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) case PANEL_SAM_AMS699VC01: strcat(txt_buf, "Samsung AMS699VC01"); break; + case PANEL_OEM_5_5: + strcat(txt_buf, "OEM 5.5\""); + break; case 0xCCCC: strcat(txt_buf, "#FFDD00 Failed to get info!#"); break; From 6c518435ec0f70914942d932921d7cf69fbd106b Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 14 Feb 2024 02:18:01 +0200 Subject: [PATCH 085/308] nyx: add info about 3rd gen micron lpddr4x --- nyx/nyx_gui/frontend/gui_info.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index 7a3c065..9e75333 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -502,18 +502,15 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) case LPDDR4X_IOWA_4GB_HYNIX_H9HCNNNBKMMLXR_NEE: // Replaced from Copper. strcpy(dram_man, "Hynix H9HCNNNBKMMLXR-NEE 4GB"); break; - case LPDDR4X_IOWA_4GB_HYNIX_H54G46CYRBX267: case LPDDR4X_HOAG_4GB_HYNIX_H54G46CYRBX267: case LPDDR4X_AULA_4GB_HYNIX_H54G46CYRBX267: strcpy(dram_man, "Hynix H54G46CYRBX267 4GB"); break; - case LPDDR4X_IOWA_4GB_MICRON_MT53E512M32D1NP_046_WTB: case LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D1NP_046_WTB: case LPDDR4X_AULA_4GB_MICRON_MT53E512M32D1NP_046_WTB: - //strcpy(dram_man, "Micron MT53E512M32D1NP-046 WT:B"); - strcpy(dram_man, "Micron 1a 4GB #FF8000 Contact me!#"); + strcpy(dram_man, "Micron MT53E512M32D1NP-046 WT:B"); break; default: From 1f30b8deb76667e4e4b2f60b1f17c06d8dad3628 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 16 Feb 2024 15:51:02 +0200 Subject: [PATCH 086/308] bdk: minerva: add custom option in table --- bdk/mem/minerva.c | 6 ++++-- bdk/mem/minerva.h | 2 +- bdk/mem/mtc_table.h | 3 ++- 3 files changed, 7 insertions(+), 4 deletions(-) diff --git a/bdk/mem/minerva.c b/bdk/mem/minerva.c index 44468f9..2d0ed2d 100644 --- a/bdk/mem/minerva.c +++ b/bdk/mem/minerva.c @@ -171,7 +171,7 @@ void minerva_prep_boot_freq() minerva_change_freq(FREQ_800); } -void minerva_prep_boot_l4t(u32 oc_freq) +void minerva_prep_boot_l4t(u32 oc_freq, u32 opt_custom) { if (!minerva_cfg) return; @@ -188,7 +188,9 @@ void minerva_prep_boot_l4t(u32 oc_freq) memcpy(&mtc_cfg->mtc_table[mtc_cfg->table_entries], &mtc_cfg->mtc_table[mtc_cfg->table_entries - 1], sizeof(emc_table_t)); - mtc_cfg->mtc_table[mtc_cfg->table_entries].rate_khz = oc_freq; + + mtc_cfg->mtc_table[mtc_cfg->table_entries].opt_custom = opt_custom; + mtc_cfg->mtc_table[mtc_cfg->table_entries].rate_khz = oc_freq; mtc_cfg->table_entries++; } diff --git a/bdk/mem/minerva.h b/bdk/mem/minerva.h index 8e20bbd..f105c3d 100644 --- a/bdk/mem/minerva.h +++ b/bdk/mem/minerva.h @@ -63,7 +63,7 @@ u32 minerva_init(); void minerva_change_freq(minerva_freq_t freq); void minerva_sdmmc_la_program(void *table, bool t210b01); void minerva_prep_boot_freq(); -void minerva_prep_boot_l4t(u32 oc_freq); +void minerva_prep_boot_l4t(u32 oc_freq, u32 opt_custom); void minerva_periodic_training(); emc_table_t *minerva_get_mtc_table(); int minerva_get_mtc_table_entries(); diff --git a/bdk/mem/mtc_table.h b/bdk/mem/mtc_table.h index e24fa81..7802280 100644 --- a/bdk/mem/mtc_table.h +++ b/bdk/mem/mtc_table.h @@ -481,7 +481,8 @@ typedef struct u32 rate_khz; u32 min_volt; u32 gpu_min_volt; - char clock_src[32]; + char clock_src[28]; + u32 opt_custom; u32 clk_src_emc; u32 needs_training; u32 training_pattern; From 05f4c42a2d8097446686ab1d3003b5e418bf31d7 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 16 Feb 2024 15:53:04 +0200 Subject: [PATCH 087/308] l4t: add custom options That's a special flag config that controls ARC. --- bootloader/l4t/l4t.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/bootloader/l4t/l4t.c b/bootloader/l4t/l4t.c index 5a2b4fa..1ce0542 100644 --- a/bootloader/l4t/l4t.c +++ b/bootloader/l4t/l4t.c @@ -109,13 +109,11 @@ #define BPMPFW_B01_DTB_EMC_ENABLE_OFF 0x20 #define BPMPFW_B01_DTB_EMC_VALUES_OFF 0x4C #define BPMPFW_B01_DTB_EMC_FREQ_VAL 0x8C -#define BPMPFW_B01_DTB_EMC_SCC_OFF 0x108C -#define BPMPFW_B01_DTB_EMC_PLLM_DIVM_VAL 0x10A4 -#define BPMPFW_B01_DTB_EMC_PLLM_DIVN_VAL 0x10A8 -#define BPMPFW_B01_DTB_EMC_PLLM_DIVP_VAL 0x10AC +#define BPMPFW_B01_DTB_EMC_OPT_VAL 0xEDC #define BPMPFW_B01_DTB_EMC_TBL_START(idx) (BPMPFW_B01_DTB_EMC_TBL_OFF + BPMPFW_B01_DTB_EMC_TBL_SZ * (idx)) #define BPMPFW_B01_DTB_EMC_TBL_SET_VAL(idx, off, val) (*(u32 *)(BPMPFW_B01_DTB_EMC_TBL_START(idx) + (off)) = (val)) #define BPMPFW_B01_DTB_EMC_TBL_SET_FREQ(idx, freq) (*(u32 *)(BPMPFW_B01_DTB_EMC_TBL_START(idx) + BPMPFW_B01_DTB_EMC_FREQ_VAL) = (freq)) +#define BPMPFW_B01_DTB_EMC_TBL_SET_OPTC(idx, opt) (*(u32 *)(BPMPFW_B01_DTB_EMC_TBL_START(idx) + BPMPFW_B01_DTB_EMC_OPT_VAL) = (opt)) #define BPMPFW_B01_DTB_EMC_TBL_SET_NAME(idx, name) (strcpy((char *)(BPMPFW_B01_DTB_EMC_TBL_START(idx) + BPMPFW_B01_DTB_EMC_NAME_VAL), (name))) #define BPMPFW_B01_DTB_EMC_TBL_ENABLE(idx) (*(char *)(BPMPFW_B01_DTB_EMC_TBL_START(idx) + BPMPFW_B01_DTB_EMC_ENABLE_OFF) = 'n') #define BPMPFW_B01_DTB_EMC_TBL_OFFSET(idx) ((void *)(BPMPFW_B01_DTB_EMC_TBL_START(idx) + BPMPFW_B01_DTB_EMC_VALUES_OFF)) @@ -258,6 +256,7 @@ typedef struct _l4t_ctxt_t int ram_oc_freq; int ram_oc_vdd2; int ram_oc_vddq; + int ram_oc_opt; u32 serial_port; u32 sc7entry_size; @@ -720,6 +719,7 @@ static void _l4t_bpmpfw_b01_config(l4t_ctxt_t *ctxt) { char *ram_oc_txt = ctxt->ram_oc_txt; u32 ram_oc_freq = ctxt->ram_oc_freq; + u32 ram_oc_opt = ctxt->ram_oc_opt; u32 ram_id = fuse_read_dramid(true); // Set default parameters. @@ -778,6 +778,7 @@ static void _l4t_bpmpfw_b01_config(l4t_ctxt_t *ctxt) BPMPFW_B01_DTB_EMC_TBL_SET_NAME(tbl_idx, ram_oc_txt); BPMPFW_B01_DTB_EMC_TBL_SET_FREQ(tbl_idx, ram_oc_freq); + BPMPFW_B01_DTB_EMC_TBL_SET_OPTC(tbl_idx, ram_oc_opt); // Enable table. BPMPFW_B01_DTB_EMC_TBL_ENABLE(tbl_idx); @@ -871,6 +872,8 @@ static void _l4t_set_config(l4t_ctxt_t *ctxt, const ini_sec_t *ini_sec, int entr else if (ctxt->ram_oc_vddq < DRAM_VDDQ_OC_MIN_VOLTAGE) ctxt->ram_oc_vddq = 0; } + else if (!strcmp("ram_oc_opt", kv->key)) + ctxt->ram_oc_opt = atoi(kv->val); else if (!strcmp("uart_port", kv->key)) ctxt->serial_port = atoi(kv->val); @@ -1109,7 +1112,7 @@ void launch_l4t(const ini_sec_t *ini_sec, int entry_idx, int is_list, bool t210b max7762x_regulator_set_voltage(REGULATOR_SD1, ctxt.ram_oc_vdd2 * 1000); // Train the rest of the table, apply FSP WAR, set RAM to 800 MHz. - minerva_prep_boot_l4t(ctxt.ram_oc_freq); + minerva_prep_boot_l4t(ctxt.ram_oc_freq, ctxt.ram_oc_opt); // Set emc table parameters and copy it. int table_entries = minerva_get_mtc_table_entries(); From 644747230cc32d5637491122a2f07de7cd3b3c06 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 16 Feb 2024 15:54:22 +0200 Subject: [PATCH 088/308] bdk: dram: add FPGA code for 3rd gen micron --- bdk/mem/sdram.h | 6 +++--- bdk/mem/sdram_config.inl | 4 ++-- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/bdk/mem/sdram.h b/bdk/mem/sdram.h index 902162c..5e885ab 100644 --- a/bdk/mem/sdram.h +++ b/bdk/mem/sdram.h @@ -100,9 +100,9 @@ enum sdram_ids_mariko LPDDR4X_HOAG_4GB_HYNIX_H54G46CYRBX267 = 30, // Die-C. (1a-01). 61% lp. LPDDR4X_AULA_4GB_HYNIX_H54G46CYRBX267 = 31, // Die-C. (1a-01). 61% lp. - LPDDR4X_IOWA_4GB_MICRON_MT53E512M32D1NP_046_WTB = 32, // Die-B. (1a-01). 61% lp. - LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D1NP_046_WTB = 33, // Die-B. (1a-01). 61% lp. - LPDDR4X_AULA_4GB_MICRON_MT53E512M32D1NP_046_WTB = 34, // Die-B. (1a-01). 61% lp. + LPDDR4X_IOWA_4GB_MICRON_MT53E512M32D1NP_046_WTB = 32, // Die-B. (1a-01). D8BQM. 61% lp. + LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D1NP_046_WTB = 33, // Die-B. (1a-01). D8BQM. 61% lp. + LPDDR4X_AULA_4GB_MICRON_MT53E512M32D1NP_046_WTB = 34, // Die-B. (1a-01). D8BQM. 61% lp. }; enum sdram_codes_mariko diff --git a/bdk/mem/sdram_config.inl b/bdk/mem/sdram_config.inl index e3025d6..e6d6f0b 100644 --- a/bdk/mem/sdram_config.inl +++ b/bdk/mem/sdram_config.inl @@ -434,9 +434,9 @@ static const sdram_params_t210_t _dram_cfg_0_samsung_4gb = { .emc_dll_cfg0 = 0x1F13412F, .emc_dll_cfg1 = 0x00010014, - .emc_pmc_scratch1 = 0x4FAFFFFF, + .emc_pmc_scratch1 = 0x4FAFFFFF, // APBDEV_PMC_IO_DPD3_REQ. .emc_pmc_scratch2 = 0x7FFFFFFF, - .emc_pmc_scratch3 = 0x4006D70B, + .emc_pmc_scratch3 = 0x4006D70B, // APBDEV_PMC_DDR_CNTRL. .emc_pmacro_pad_cfg_ctrl = 0x00020000, .emc_pmacro_vttgen_ctrl0 = 0x00030808, From f05563579e8c9b46e1875b45639e48571fabda42 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 16 Feb 2024 15:55:40 +0200 Subject: [PATCH 089/308] bdk: max77620: raise sd1 max voltage For T210. --- bdk/power/max7762x.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bdk/power/max7762x.c b/bdk/power/max7762x.c index c5189fa..70756c4 100644 --- a/bdk/power/max7762x.c +++ b/bdk/power/max7762x.c @@ -75,7 +75,7 @@ typedef struct _max77620_regulator_t static const max77620_regulator_t _pmic_regulators[] = { { "sd0", 12500, 600000, 625000, 1400000, REGULATOR_SD, MAX77620_REG_SD0, MAX77620_REG_SD0_CFG, MAX77620_SD0_VOLT_MASK, {{ MAX77620_REG_FPS_SD0, 1, 7, 1 }} }, - { "sd1", 12500, 600000, 1125000, 1175000, REGULATOR_SD, MAX77620_REG_SD1, MAX77620_REG_SD1_CFG, MAX77620_SD1_VOLT_MASK, {{ MAX77620_REG_FPS_SD1, 0, 1, 5 }} }, + { "sd1", 12500, 600000, 1125000, 1237500, REGULATOR_SD, MAX77620_REG_SD1, MAX77620_REG_SD1_CFG, MAX77620_SD1_VOLT_MASK, {{ MAX77620_REG_FPS_SD1, 0, 1, 5 }} }, { "sd2", 12500, 600000, 1325000, 1350000, REGULATOR_SD, MAX77620_REG_SD2, MAX77620_REG_SD2_CFG, MAX77620_SDX_VOLT_MASK, {{ MAX77620_REG_FPS_SD2, 1, 5, 2 }} }, { "sd3", 12500, 600000, 1800000, 1800000, REGULATOR_SD, MAX77620_REG_SD3, MAX77620_REG_SD3_CFG, MAX77620_SDX_VOLT_MASK, {{ MAX77620_REG_FPS_SD3, 0, 3, 3 }} }, { "ldo0", 25000, 800000, 1200000, 1200000, REGULATOR_LDO, MAX77620_REG_LDO0_CFG, MAX77620_REG_LDO0_CFG2, MAX77620_LDO_VOLT_MASK, {{ MAX77620_REG_FPS_LDO0, 3, 7, 0 }} }, From be3297ae1fb61ce5a80b89092d311d124a1a0694 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 16 Feb 2024 15:57:22 +0200 Subject: [PATCH 090/308] l4t: raise T210 vdd2 limit to 1237.5mV --- bootloader/l4t/l4t.c | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/bootloader/l4t/l4t.c b/bootloader/l4t/l4t.c index 1ce0542..839eb89 100644 --- a/bootloader/l4t/l4t.c +++ b/bootloader/l4t/l4t.c @@ -264,10 +264,11 @@ typedef struct _l4t_ctxt_t emc_table_t *mtc_table; } l4t_ctxt_t; -#define DRAM_VDD2_OC_MIN_VOLTAGE 1050 -#define DRAM_VDD2_OC_MAX_VOLTAGE 1175 -#define DRAM_VDDQ_OC_MIN_VOLTAGE 550 -#define DRAM_VDDQ_OC_MAX_VOLTAGE 650 +#define DRAM_VDD2_OC_MIN_VOLTAGE 1050 +#define DRAM_VDD2_OC_MAX_VOLTAGE 1175 +#define DRAM_VDD2Q_OC_MAX_VOLTAGE 1237 +#define DRAM_VDDQ_OC_MIN_VOLTAGE 550 +#define DRAM_VDDQ_OC_MAX_VOLTAGE 650 #define DRAM_T210B01_TBL_MAX_FREQ 1600000 //! TODO: Update on dram config changes. @@ -840,7 +841,7 @@ static void _l4t_bl33_cfg_set_key(char *env, char *key, char *val) strcat(env, "\n"); } -static void _l4t_set_config(l4t_ctxt_t *ctxt, const ini_sec_t *ini_sec, int entry_idx, int is_list) +static void _l4t_set_config(l4t_ctxt_t *ctxt, const ini_sec_t *ini_sec, int entry_idx, int is_list, bool t210b01) { char *bl33_env = (char *)BL33_ENV_BASE; bl33_env[0] = '\0'; @@ -859,10 +860,13 @@ static void _l4t_set_config(l4t_ctxt_t *ctxt, const ini_sec_t *ini_sec, int entr else if (!strcmp("ram_oc_vdd2", kv->key)) { ctxt->ram_oc_vdd2 = atoi(kv->val); - if (ctxt->ram_oc_vdd2 > DRAM_VDD2_OC_MAX_VOLTAGE) + + if (t210b01 && ctxt->ram_oc_vdd2 > DRAM_VDD2_OC_MAX_VOLTAGE) ctxt->ram_oc_vdd2 = DRAM_VDD2_OC_MAX_VOLTAGE; + else if (!t210b01 && ctxt->ram_oc_vdd2 > DRAM_VDD2Q_OC_MAX_VOLTAGE) + ctxt->ram_oc_vdd2 = DRAM_VDD2Q_OC_MAX_VOLTAGE; else if (ctxt->ram_oc_vdd2 < DRAM_VDD2_OC_MIN_VOLTAGE) - ctxt->ram_oc_vdd2 = 0; + ctxt->ram_oc_vdd2 = DRAM_VDD2_OC_MIN_VOLTAGE; } else if (!strcmp("ram_oc_vddq", kv->key)) { @@ -924,7 +928,7 @@ void launch_l4t(const ini_sec_t *ini_sec, int entry_idx, int is_list, bool t210b gfx_con_setpos(0, 0); // Parse config. - _l4t_set_config(&ctxt, ini_sec, entry_idx, is_list); + _l4t_set_config(&ctxt, ini_sec, entry_idx, is_list, t210b01); if (!ctxt.path) { From abeafb9a672aa64d208955498b993695550562eb Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 16 Feb 2024 15:59:30 +0200 Subject: [PATCH 091/308] l4t: allow exFAT as boot drive Allow exFAT support of boot partition. For newer bl33 (U-Boot >= 2024-NX02). Old ones will just fail to load the boot script in such cases. --- bootloader/l4t/l4t.c | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) diff --git a/bootloader/l4t/l4t.c b/bootloader/l4t/l4t.c index 839eb89..75a2f4a 100644 --- a/bootloader/l4t/l4t.c +++ b/bootloader/l4t/l4t.c @@ -34,8 +34,8 @@ * 2: Arachne Register Cell v1. * 3: Arachne Register Cell v2. PTSA Rework support. */ -#define L4T_LOADER_API_REV 3 -#define L4T_FIRMWARE_REV 0x33524556 // REV3. +#define L4T_LOADER_API_REV 4 +#define L4T_FIRMWARE_REV 0x34524556 // REV4. #ifdef DEBUG_UART_PORT #include @@ -944,13 +944,6 @@ void launch_l4t(const ini_sec_t *ini_sec, int entry_idx, int is_list, bool t210b return; } - // U-BOOT does not support exfat. - if (sd_fs.fs_type == FS_EXFAT) - { - _l4t_crit_error("exFAT not supported", false); - return; - } - // Load BL31 (ATF/TrustZone fw). if (!_l4t_sd_load(BL31_FW)) { From 6d69ef3cf6905d52550462aa92032913912d110f Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 16 Feb 2024 16:01:54 +0200 Subject: [PATCH 092/308] bdk: sprintf: allow padding > 9 --- bdk/utils/sprintf.c | 52 ++++++++++++++++++++++++++++++++++++++++----- 1 file changed, 47 insertions(+), 5 deletions(-) diff --git a/bdk/utils/sprintf.c b/bdk/utils/sprintf.c index 3745c53..0ba1466 100644 --- a/bdk/utils/sprintf.c +++ b/bdk/utils/sprintf.c @@ -39,7 +39,7 @@ static void _s_putn(u32 v, int base, char fill, int fcnt) static const char digits[] = "0123456789ABCDEF"; char *p; - char buf[65]; + char buf[65]; // Number char size + leftover for padding. int c = fcnt; bool negative = false; @@ -93,22 +93,36 @@ void s_printf(char *out_buf, const char *fmt, ...) fmt++; fill = 0; fcnt = 0; + + // Check for padding. Number or space based. if ((*fmt >= '0' && *fmt <= '9') || *fmt == ' ') { - fcnt = *fmt; + fcnt = *fmt; // Padding size or padding type. fmt++; + if (*fmt >= '0' && *fmt <= '9') { + // Padding size exists. Previous char was type. fill = fcnt; fcnt = *fmt - '0'; fmt++; +parse_padding_dec: + // Parse padding size extra digits. + if (*fmt >= '0' && *fmt <= '9') + { + fcnt = fcnt * 10 + *fmt - '0'; + fmt++; + goto parse_padding_dec; + } } else { + // No padding type, use space. (Max padding size is 9). fill = ' '; fcnt -= '0'; } } + switch (*fmt) { case 'c': @@ -116,23 +130,29 @@ void s_printf(char *out_buf, const char *fmt, ...) if (c != '\0') _s_putc(c); break; + case 's': _s_puts(va_arg(ap, char *)); break; + case 'd': _s_putn(va_arg(ap, u32), 10, fill, fcnt); break; + case 'p': case 'P': case 'x': case 'X': _s_putn(va_arg(ap, u32), 16, fill, fcnt); break; + case '%': _s_putc('%'); break; + case '\0': goto out; + default: _s_putc('%'); _s_putc(*fmt); @@ -162,44 +182,66 @@ void s_vprintf(char *out_buf, const char *fmt, va_list ap) fmt++; fill = 0; fcnt = 0; + + // Check for padding. Number or space based. if ((*fmt >= '0' && *fmt <= '9') || *fmt == ' ') { - fcnt = *fmt; + fcnt = *fmt; // Padding size or padding type. fmt++; + if (*fmt >= '0' && *fmt <= '9') { + // Padding size exists. Previous char was type. fill = fcnt; fcnt = *fmt - '0'; fmt++; +parse_padding_dec: + // Parse padding size extra digits. + if (*fmt >= '0' && *fmt <= '9') + { + fcnt = fcnt * 10 + *fmt - '0'; + fmt++; + goto parse_padding_dec; + } } else { + // No padding type, use space. (Max padding size is 9). fill = ' '; fcnt -= '0'; } } - switch(*fmt) + + switch (*fmt) { case 'c': - _s_putc(va_arg(ap, u32)); + char c = va_arg(ap, u32); + if (c != '\0') + _s_putc(c); break; + case 's': _s_puts(va_arg(ap, char *)); break; + case 'd': _s_putn(va_arg(ap, u32), 10, fill, fcnt); break; + case 'p': case 'P': case 'x': case 'X': _s_putn(va_arg(ap, u32), 16, fill, fcnt); break; + case '%': _s_putc('%'); break; + case '\0': goto out; + default: _s_putc('%'); _s_putc(*fmt); From 35c36908a1c83cc432bc5947ab6d1ff76c5207db Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 16 Feb 2024 16:03:54 +0200 Subject: [PATCH 093/308] hekate/nyx: change fs/clock year to 2024 --- bootloader/libs/fatfs/ffconf.h | 2 +- nyx/nyx_gui/frontend/gui_options.c | 6 +++--- nyx/nyx_gui/libs/fatfs/ffconf.h | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/bootloader/libs/fatfs/ffconf.h b/bootloader/libs/fatfs/ffconf.h index 346f3d7..33516fe 100644 --- a/bootloader/libs/fatfs/ffconf.h +++ b/bootloader/libs/fatfs/ffconf.h @@ -256,7 +256,7 @@ #define FF_FS_NORTC 1 #define FF_NORTC_MON 1 #define FF_NORTC_MDAY 1 -#define FF_NORTC_YEAR 2023 +#define FF_NORTC_YEAR 2024 /* The option FF_FS_NORTC switches timestamp function. If the system does not have / any RTC function or valid timestamp is not needed, set FF_FS_NORTC = 1 to disable / the timestamp function. Every object modified by FatFs will have a fixed timestamp diff --git a/nyx/nyx_gui/frontend/gui_options.c b/nyx/nyx_gui/frontend/gui_options.c index 76e322a..05039a6 100644 --- a/nyx/nyx_gui/frontend/gui_options.c +++ b/nyx/nyx_gui/frontend/gui_options.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2022 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -24,9 +24,9 @@ #include #include -#define CLOCK_MIN_YEAR 2023 +#define CLOCK_MIN_YEAR 2024 #define CLOCK_MAX_YEAR (CLOCK_MIN_YEAR + 10) -#define CLOCK_YEARLIST "2023\n2024\n2025\n2026\n2027\n2028\n2029\n2030\n2031\n2032\n2033" +#define CLOCK_YEARLIST "2024\n2025\n2026\n2027\n2028\n2029\n2030\n2031\n2032\n2033\n2034" extern hekate_config h_cfg; extern nyx_config n_cfg; diff --git a/nyx/nyx_gui/libs/fatfs/ffconf.h b/nyx/nyx_gui/libs/fatfs/ffconf.h index b049774..d0c6f70 100644 --- a/nyx/nyx_gui/libs/fatfs/ffconf.h +++ b/nyx/nyx_gui/libs/fatfs/ffconf.h @@ -257,7 +257,7 @@ #define FF_FS_NORTC 0 #define FF_NORTC_MON 1 #define FF_NORTC_MDAY 1 -#define FF_NORTC_YEAR 2023 +#define FF_NORTC_YEAR 2024 /* The option FF_FS_NORTC switches timestamp function. If the system does not have / any RTC function or valid timestamp is not needed, set FF_FS_NORTC = 1 to disable / the timestamp function. Every object modified by FatFs will have a fixed timestamp From 6e6f5f8eed2a2d5468d3c631089b03d64e5488d7 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 16 Feb 2024 16:05:42 +0200 Subject: [PATCH 094/308] hekate: reduce binary size By using the same message everywhere. --- bootloader/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bootloader/main.c b/bootloader/main.c index f2d9ae6..fe8e6f1 100644 --- a/bootloader/main.c +++ b/bootloader/main.c @@ -665,7 +665,7 @@ static void _nyx_load_run() gfx_con_setpos(0, 0); WPRINTF("Old Nyx GUI found! There will be dragons!\n"); - WPRINTF("\nUpdate the bootloader folder!\n\n"); + WPRINTF("\nUpdate bootloader folder!\n\n"); WPRINTF("Press any key..."); msleep(1000); From e96e74c72a6e29b8f928b77051dc54b15689e8f6 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 16 Feb 2024 16:07:27 +0200 Subject: [PATCH 095/308] nyx: finer control of fan when temp is high --- nyx/nyx_gui/frontend/gui.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui.c b/nyx/nyx_gui/frontend/gui.c index b281d98..06e14b3 100644 --- a/nyx/nyx_gui/frontend/gui.c +++ b/nyx/nyx_gui/frontend/gui.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2023 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -1330,11 +1330,13 @@ static void _update_status_bar(void *params) max17050_get_property(MAX17050_VCELL, &batt_volt); max17050_get_property(MAX17050_Current, &batt_curr); - // Enable fan if more than 46 oC. + // Enable fan if more than 41 oC. u32 soc_temp_dec = (soc_temp >> 8); if (soc_temp_dec > 51) set_fan_duty(102); else if (soc_temp_dec > 46) + set_fan_duty(76); + else if (soc_temp_dec > 41) set_fan_duty(51); else if (soc_temp_dec < 40) set_fan_duty(0); From feb5b11f66051e3d71e99be45a39ee93ad49f0a3 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 16 Feb 2024 16:34:30 +0200 Subject: [PATCH 096/308] minerva: do not reread mrr for channel b Just in case the mrr fifo is not empty. --- modules/hekate_libsys_minerva/sys_sdrammtc.c | 42 ++++++++++++-------- 1 file changed, 25 insertions(+), 17 deletions(-) diff --git a/modules/hekate_libsys_minerva/sys_sdrammtc.c b/modules/hekate_libsys_minerva/sys_sdrammtc.c index 38a9945..f447501 100644 --- a/modules/hekate_libsys_minerva/sys_sdrammtc.c +++ b/modules/hekate_libsys_minerva/sys_sdrammtc.c @@ -1168,7 +1168,7 @@ static u32 _get_dram_temperature() if (channel1_enabled) { _request_mmr_data(0x40040000, EMC_CHANNEL1); - mr4_1 = EMC(EMC_MRR); + mr4_1 = EMC(EMC_MRR) & 0xFFFF; if (mr4_1 < 0xF001) mr4_1 &= 0x7; @@ -1549,21 +1549,25 @@ static u32 _minerva_update_clock_tree_delay(emc_table_t *src_emc_entry, emc_tabl if (upd_type_bits & 0x5400) { _request_mmr_data(0x80130000, channel1_enabled); // Dev0 MRR 19. - temp_ch0_0 = (EMC(EMC_MRR) & 0xFF) << 8; - temp_ch0_1 = EMC(EMC_MRR) & 0xFF00; + u32 mrr = EMC(EMC_MRR); + temp_ch0_0 = (mrr & 0xFF) << 8; + temp_ch0_1 = mrr & 0xFF00; if (channel1_enabled) { - temp_ch1_0 = (EMC_CH1(EMC_MRR) & 0xFF) << 8; - temp_ch1_1 = EMC_CH1(EMC_MRR) & 0xFF00; + mrr = EMC_CH1(EMC_MRR); + temp_ch1_0 = (mrr & 0xFF) << 8; + temp_ch1_1 = mrr & 0xFF00; } _request_mmr_data(0x80120000, channel1_enabled); // Dev0 MRR 18. - temp_ch0_0 |= EMC(EMC_MRR) & 0xFF; - temp_ch0_1 |= (EMC(EMC_MRR) & 0xFF00) >> 8; + mrr = EMC(EMC_MRR); + temp_ch0_0 |= mrr & 0xFF; + temp_ch0_1 |= (mrr & 0xFF00) >> 8; if (channel1_enabled) { - temp_ch1_0 |= EMC_CH1(EMC_MRR) & 0xFF; - temp_ch1_1 |= (EMC_CH1(EMC_MRR) & 0xFF00) >> 8; + mrr = EMC_CH1(EMC_MRR); + temp_ch1_0 |= mrr & 0xFF; + temp_ch1_1 |= (mrr & 0xFF00) >> 8; } } @@ -1723,21 +1727,25 @@ calc_dev2: if (update_type <= PERIODIC_TRAINING_UPDATE && upd_type_bits & 0x5400) { _request_mmr_data(0x40130000, channel1_enabled); // Dev1 MRR 19. - temp_ch0_0 = (EMC(EMC_MRR) & 0xFF) << 8; - temp_ch0_1 = EMC(EMC_MRR) & 0xFF00; + u32 mrr = EMC(EMC_MRR); + temp_ch0_0 = (mrr& 0xFF) << 8; + temp_ch0_1 = mrr & 0xFF00; if (channel1_enabled) { - temp_ch1_0 = (EMC_CH1(EMC_MRR) & 0xFF) << 8; - temp_ch1_1 = EMC_CH1(EMC_MRR) & 0xFF00; + mrr = EMC_CH1(EMC_MRR); + temp_ch1_0 = (mrr & 0xFF) << 8; + temp_ch1_1 = mrr & 0xFF00; } _request_mmr_data(0x40120000, channel1_enabled); // Dev1 MRR 18 - temp_ch0_0 |= EMC(EMC_MRR) & 0xFF; - temp_ch0_1 |= ((EMC(EMC_MRR) & 0xFF00) >> 8); + mrr = EMC(EMC_MRR); + temp_ch0_0 |= mrr & 0xFF; + temp_ch0_1 |= ((mrr & 0xFF00) >> 8); if (channel1_enabled) { - temp_ch1_0 |= EMC_CH1(EMC_MRR) & 0xFF; - temp_ch1_1 |= (EMC_CH1(EMC_MRR) & 0xFF00) >> 8; + mrr = EMC_CH1(EMC_MRR); + temp_ch1_0 |= mrr & 0xFF; + temp_ch1_1 |= (mrr & 0xFF00) >> 8; } } From f37ae083ae10a32e4f654f0b90e8211f4fffdbca Mon Sep 17 00:00:00 2001 From: Thomas Makin Date: Sat, 27 Jan 2024 14:26:40 -0500 Subject: [PATCH 097/308] nyx: add android dynamic partition support Will be used in Android >=13 for larger capacity and future-proofing. New full system size: 6 GiB. Partitions: - boot - recovery - dtb - misc - cache - super - userdata --- .../frontend/gui_tools_partition_manager.c | 138 ++++++++++++++---- 1 file changed, 108 insertions(+), 30 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_tools_partition_manager.c b/nyx/nyx_gui/frontend/gui_tools_partition_manager.c index e9fbe92..53b6dd5 100644 --- a/nyx/nyx_gui/frontend/gui_tools_partition_manager.c +++ b/nyx/nyx_gui/frontend/gui_tools_partition_manager.c @@ -30,7 +30,7 @@ #define SECTORS_PER_GB 0x200000 #define HOS_MIN_SIZE_MB 2048 -#define ANDROID_SYSTEM_SIZE_MB 4096 // 4 GB which is > 3888 MB of the actual size. +#define ANDROID_SYSTEM_SIZE_MB 6144 // 6 GB. Fits both Legacy (4912MB) and Dynamic (6144MB) partition schemes. extern volatile boot_cfg_t *b_cfg; extern volatile nyx_storage_t *nyx_str; @@ -49,6 +49,8 @@ typedef struct _partition_ctxt_t bool emu_double; bool emmc_is_64gb; + bool and_dynamic; + mbr_t mbr_old; lv_obj_t *bar_hos; @@ -387,37 +389,66 @@ static void _prepare_and_flash_mbr_gpt() if (part_info.l4t_size) _create_gpt_partition(gpt, &gpt_idx, &curr_part_lba, part_info.l4t_size << 11, (char[]) { 'l', 0, '4', 0, 't', 0 }, 6); - // Android Vendor partition. 1GB - _create_gpt_partition(gpt, &gpt_idx, &curr_part_lba, 0x200000, (char[]) { 'v', 0, 'e', 0, 'n', 0, 'd', 0, 'o', 0, 'r', 0 }, 12); + if (part_info.and_dynamic) + { + // Android Linux Kernel partition. 64MB. + _create_gpt_partition(gpt, &gpt_idx, &curr_part_lba, 0x20000, (char[]) { 'b', 0, 'o', 0, 'o', 0, 't', 0 }, 8); - // Android System partition. 2GB. - _create_gpt_partition(gpt, &gpt_idx, &curr_part_lba, 0x400000, (char[]) { 'A', 0, 'P', 0, 'P', 0 }, 6); + // Android Recovery partition. 64MB. + _create_gpt_partition(gpt, &gpt_idx, &curr_part_lba, 0x20000, (char[]) { 'r', 0, 'e', 0, 'c', 0, 'o', 0, 'v', 0, 'e', 0, 'r', 0, 'y', 0 }, 16); - // Android Linux Kernel partition. 32MB. - _create_gpt_partition(gpt, &gpt_idx, &curr_part_lba, 0x10000, (char[]) { 'L', 0, 'N', 0, 'X', 0 }, 6); + // Android Device Tree Reference partition. 1MB. + _create_gpt_partition(gpt, &gpt_idx, &curr_part_lba, 0x800, (char[]) { 'd', 0, 't', 0, 'b', 0 }, 6); - // Android Recovery partition. 64MB. - _create_gpt_partition(gpt, &gpt_idx, &curr_part_lba, 0x20000, (char[]) { 'S', 0, 'O', 0, 'S', 0 }, 6); + // Android Misc partition. 3MB. + _create_gpt_partition(gpt, &gpt_idx, &curr_part_lba, 0x1800, (char[]) { 'm', 0, 'i', 0, 's', 0, 'c', 0 }, 8); - // Android Device Tree Reference partition. 1MB. - _create_gpt_partition(gpt, &gpt_idx, &curr_part_lba, 0x800, (char[]) { 'D', 0, 'T', 0, 'B', 0 }, 6); + // Android Cache partition. 60MB. + _create_gpt_partition(gpt, &gpt_idx, &curr_part_lba, 0x1E000, (char[]) { 'c', 0, 'a', 0, 'c', 0, 'h', 0, 'e', 0 }, 10); - // Android Encryption partition. 16MB. - // Note: 16MB size is for aligning UDA. If any other tiny partition must be added, it should split the MDA one. - sdmmc_storage_write(&sd_storage, curr_part_lba, 0x8000, (void *)SDMMC_UPPER_BUFFER); // Clear the whole of it. - _create_gpt_partition(gpt, &gpt_idx, &curr_part_lba, 0x8000, (char[]) { 'M', 0, 'D', 0, 'A', 0 }, 6); + // Android Super dynamic partition. 5922MB. + _create_gpt_partition(gpt, &gpt_idx, &curr_part_lba, 0xB91000, (char[]) { 's', 0, 'u', 0, 'p', 0, 'e', 0, 'r', 0 }, 10); - // Android Cache partition. 700MB. - _create_gpt_partition(gpt, &gpt_idx, &curr_part_lba, 0x15E000, (char[]) { 'C', 0, 'A', 0, 'C', 0 }, 6); + // Android Userdata partition. + u32 uda_size = (part_info.and_size << 11) - 0xC00000; // Subtract the other partitions (6144MB). + if (!part_info.emu_size) + uda_size -= 0x800; // Reserve 1MB. + _create_gpt_partition(gpt, &gpt_idx, &curr_part_lba, uda_size, (char[]) { 'u', 0, 's', 0, 'e', 0, 'r', 0, 'd', 0, 'a', 0, 't', 0, 'a', 0 }, 16); + } + else + { + // Android Vendor partition. 1GB + _create_gpt_partition(gpt, &gpt_idx, &curr_part_lba, 0x200000, (char[]) { 'v', 0, 'e', 0, 'n', 0, 'd', 0, 'o', 0, 'r', 0 }, 12); - // Android Misc partition. 3MB. - _create_gpt_partition(gpt, &gpt_idx, &curr_part_lba, 0x1800, (char[]) { 'M', 0, 'S', 0, 'C', 0 }, 6); + // Android System partition. 3GB. + _create_gpt_partition(gpt, &gpt_idx, &curr_part_lba, 0x600000, (char[]) { 'A', 0, 'P', 0, 'P', 0 }, 6); - // Android Userdata partition. - u32 uda_size = (part_info.and_size << 11) - 0x798000; // Subtract the other partitions (3888MB). - if (!part_info.emu_size) - uda_size -= 0x800; // Reserve 1MB. - _create_gpt_partition(gpt, &gpt_idx, &curr_part_lba, uda_size, (char[]) { 'U', 0, 'D', 0, 'A', 0 }, 6); + // Android Linux Kernel partition. 32MB. + _create_gpt_partition(gpt, &gpt_idx, &curr_part_lba, 0x10000, (char[]) { 'L', 0, 'N', 0, 'X', 0 }, 6); + + // Android Recovery partition. 64MB. + _create_gpt_partition(gpt, &gpt_idx, &curr_part_lba, 0x20000, (char[]) { 'S', 0, 'O', 0, 'S', 0 }, 6); + + // Android Device Tree Reference partition. 1MB. + _create_gpt_partition(gpt, &gpt_idx, &curr_part_lba, 0x800, (char[]) { 'D', 0, 'T', 0, 'B', 0 }, 6); + + // Android Encryption partition. 16MB. + // Note: 16MB size is for aligning UDA. If any other tiny partition must be added, it should split the MDA one. + sdmmc_storage_write(&sd_storage, curr_part_lba, 0x8000, (void *)SDMMC_UPPER_BUFFER); // Clear the whole of it. + _create_gpt_partition(gpt, &gpt_idx, &curr_part_lba, 0x8000, (char[]) { 'M', 0, 'D', 0, 'A', 0 }, 6); + + // Android Cache partition. 700MB. + _create_gpt_partition(gpt, &gpt_idx, &curr_part_lba, 0x15E000, (char[]) { 'C', 0, 'A', 0, 'C', 0 }, 6); + + // Android Misc partition. 3MB. + _create_gpt_partition(gpt, &gpt_idx, &curr_part_lba, 0x1800, (char[]) { 'M', 0, 'S', 0, 'C', 0 }, 6); + + // Android Userdata partition. + u32 uda_size = (part_info.and_size << 11) - 0x998000; // Subtract the other partitions (4912MB). + if (!part_info.emu_size) + uda_size -= 0x800; // Reserve 1MB. + _create_gpt_partition(gpt, &gpt_idx, &curr_part_lba, uda_size, (char[]) { 'U', 0, 'D', 0, 'A', 0 }, 6); + } // Handle emuMMC partitions manually. if (part_info.emu_size) @@ -796,7 +827,7 @@ static bool _get_available_android_partition() // Find kernel partition. for (u32 i = 0; i < gpt->header.num_part_ents; i++) { - if (gpt->entries[i].lba_start && !memcmp(gpt->entries[i].name, (char[]) { 'L', 0, 'N', 0, 'X', 0 }, 6)) + if (gpt->entries[i].lba_start && (!memcmp(gpt->entries[i].name, (char[]) { 'L', 0, 'N', 0, 'X', 0 }, 6) || !memcmp(gpt->entries[i].name, (char[]) { 'b', 0, 'o', 0, 'o', 0, 't', 0 }, 8))) { free(gpt); @@ -1026,7 +1057,7 @@ static lv_res_t _action_flash_android_data(lv_obj_t * btns, const char * txt) // Find Kernel partition. for (u32 i = 0; i < gpt->header.num_part_ents; i++) { - if (!memcmp(gpt->entries[i].name, (char[]) { 'L', 0, 'N', 0, 'X', 0 }, 6)) + if (!memcmp(gpt->entries[i].name, (char[]) { 'L', 0, 'N', 0, 'X', 0 }, 6) || !memcmp(gpt->entries[i].name, (char[]) { 'b', 0, 'o', 0, 'o', 0, 't', 0 }, 8)) { offset_sct = gpt->entries[i].lba_start; size_sct = (gpt->entries[i].lba_end + 1) - gpt->entries[i].lba_start; @@ -1090,7 +1121,7 @@ boot_img_not_found: // Find Recovery partition. for (u32 i = 0; i < gpt->header.num_part_ents; i++) { - if (!memcmp(gpt->entries[i].name, (char[]) { 'S', 0, 'O', 0, 'S', 0 }, 6)) + if (!memcmp(gpt->entries[i].name, (char[]) { 'S', 0, 'O', 0, 'S', 0 }, 6) || !memcmp(gpt->entries[i].name, (char[]) { 'r', 0, 'e', 0, 'c', 0, 'o', 0, 'v', 0, 'e', 0, 'r', 0, 'y', 0 }, 16)) { offset_sct = gpt->entries[i].lba_start; size_sct = (gpt->entries[i].lba_end + 1) - gpt->entries[i].lba_start; @@ -1152,7 +1183,7 @@ recovery_not_found: // Find Device Tree partition. for (u32 i = 0; i < gpt->header.num_part_ents; i++) { - if (!memcmp(gpt->entries[i].name, (char[]) { 'D', 0, 'T', 0, 'B', 0 }, 6)) + if (!memcmp(gpt->entries[i].name, (char[]) { 'D', 0, 'T', 0, 'B', 0 }, 6) || !memcmp(gpt->entries[i].name, (char[]) { 'd', 0, 't', 0, 'b', 0 }, 6)) { offset_sct = gpt->entries[i].lba_start; size_sct = (gpt->entries[i].lba_end + 1) - gpt->entries[i].lba_start; @@ -1198,7 +1229,7 @@ dtb_not_found: // Check if Recovery is flashed unconditionally. for (u32 i = 0; i < gpt->header.num_part_ents; i++) { - if (!memcmp(gpt->entries[i].name, (char[]) { 'S', 0, 'O', 0, 'S', 0 }, 6)) + if (!memcmp(gpt->entries[i].name, (char[]) { 'S', 0, 'O', 0, 'S', 0 }, 6) || !memcmp(gpt->entries[i].name, (char[]) { 'r', 0, 'e', 0, 'c', 0, 'o', 0, 'v', 0, 'e', 0, 'r', 0, 'y', 0 }, 16)) { u8 *buf = malloc(512); sdmmc_storage_read(&sd_storage, gpt->entries[i].lba_start, 1, buf); @@ -1679,7 +1710,7 @@ static lv_res_t _create_mbox_partitioning_option1(lv_obj_t *btns, const char *tx return LV_RES_OK; } -static lv_res_t _create_mbox_partitioning_next(lv_obj_t *btn) +static lv_res_t _create_mbox_partitioning_warn(lv_obj_t *btn) { lv_obj_t *dark_bg = lv_obj_create(lv_scr_act(), NULL); lv_obj_set_style(dark_bg, &mbox_darken); @@ -1726,6 +1757,53 @@ static lv_res_t _create_mbox_partitioning_next(lv_obj_t *btn) return LV_RES_OK; } +static lv_res_t _create_mbox_partitioning_android(lv_obj_t *btns, const char *txt) +{ + int btn_idx = lv_btnm_get_pressed(btns); + + mbox_action(btns, txt); + + part_info.and_dynamic = !btn_idx; + _create_mbox_partitioning_warn(NULL); + + return LV_RES_INV; +} + +static lv_res_t _create_mbox_partitioning_andr_part(lv_obj_t *btn) +{ + lv_obj_t *dark_bg = lv_obj_create(lv_scr_act(), NULL); + lv_obj_set_style(dark_bg, &mbox_darken); + lv_obj_set_size(dark_bg, LV_HOR_RES, LV_VER_RES); + + static const char *mbox_btn_map[] = { "\222Dynamic", "\222Legacy", "" }; + lv_obj_t * mbox = lv_mbox_create(dark_bg, NULL); + lv_mbox_set_recolor_text(mbox, true); + + lv_obj_set_width(mbox, LV_HOR_RES / 10 * 5); + lv_mbox_set_text(mbox, "#FF8000 Android Partitioning#"); + + lv_obj_t *lbl_status = lv_label_create(mbox, NULL); + lv_label_set_recolor(lbl_status, true); + + lv_label_set_text(lbl_status, + "Please select a partition scheme:\n\n" + "#C7EA46 Dynamic:# Android 13+\n" + "#C7EA46 Legacy:# Android 10-11\n"); + + lv_mbox_add_btns(mbox, mbox_btn_map, _create_mbox_partitioning_android); + lv_obj_align(mbox, NULL, LV_ALIGN_CENTER, 0, 0); + lv_obj_set_top(mbox, true); + + return LV_RES_OK; +} + +static lv_res_t _create_mbox_partitioning_next(lv_obj_t *btn) { + if (part_info.and_size) + return _create_mbox_partitioning_andr_part(NULL); + else + return _create_mbox_partitioning_warn(NULL); +} + static void _update_partition_bar() { lv_obj_t *h1 = lv_obj_get_parent(part_info.bar_hos); From 9ea847578eab719884f9745471d6743b8ba67d1a Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 21 Feb 2024 10:40:46 +0200 Subject: [PATCH 098/308] bdk: display: add another oem clone --- bdk/display/di.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/bdk/display/di.h b/bdk/display/di.h index f353def..ae58a32 100644 --- a/bdk/display/di.h +++ b/bdk/display/di.h @@ -789,7 +789,10 @@ enum PANEL_SHP_LQ055T1SW10 = 0x1040, PANEL_SAM_AMS699VC01 = 0x2050, - PANEL_OEM_5_5 = 0xB3 + // Found on 5.5" clones with AUO A055TAN02 (59.05A30.001) fake markings. + PANEL_OEM_CLONE_5_5 = 0xB3, + // Found on 5.5" clones with AUO A055TAN02 (59.05A30.001) fake markings. + PANEL_OEM_CLONE = 0 }; void display_init(); From 5f8814311e4b116377466430f0dfb801830cde2b Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 21 Feb 2024 10:42:28 +0200 Subject: [PATCH 099/308] nyx: info: add panel clone info --- nyx/nyx_gui/frontend/gui_info.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index 9e75333..20edc41 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -858,8 +858,11 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) case PANEL_SAM_AMS699VC01: strcat(txt_buf, "Samsung AMS699VC01"); break; - case PANEL_OEM_5_5: - strcat(txt_buf, "OEM 5.5\""); + case PANEL_OEM_CLONE_5_5: + strcat(txt_buf, "#FFDD00 OEM Clone 5.5\"#"); + break; + case PANEL_OEM_CLONE: + strcat(txt_buf, "#FFDD00 OEM Clone#"); break; case 0xCCCC: strcat(txt_buf, "#FFDD00 Failed to get info!#"); From 4131ff12d7dfc293125f45051d2c5b6c4cb585d0 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 21 Feb 2024 10:50:15 +0200 Subject: [PATCH 100/308] bdk: sdram: adjust sdmmc1 la for l4t --- bdk/mem/minerva.c | 24 ++++++++++++++++++------ 1 file changed, 18 insertions(+), 6 deletions(-) diff --git a/bdk/mem/minerva.c b/bdk/mem/minerva.c index 2d0ed2d..7b2275e 100644 --- a/bdk/mem/minerva.c +++ b/bdk/mem/minerva.c @@ -27,10 +27,10 @@ #include #include -#define LA_REGS_OFFSET_T210 0x1284 -#define LA_REGS_OFFSET_T210B01 0xFA4 +#define TABLE_FREQ_KHZ_OFFSET 0x40 +#define TABLE_LA_REGS_T210_OFFSET 0x1284 +#define TABLE_LA_REGS_T210B01_OFFSET 0xFA4 #define LA_SDMMC1_INDEX 6 -#define LA_SDMMC4_INDEX 9 extern volatile nyx_storage_t *nyx_str; @@ -148,10 +148,22 @@ void minerva_change_freq(minerva_freq_t freq) void minerva_sdmmc_la_program(void *table, bool t210b01) { - u32 *la_scale_regs = (u32 *)(table + (t210b01 ? LA_REGS_OFFSET_T210B01 : LA_REGS_OFFSET_T210)); + u32 freq = *(u32 *)(table + TABLE_FREQ_KHZ_OFFSET); + u32 *la_scale_regs = (u32 *)(table + (t210b01 ? TABLE_LA_REGS_T210B01_OFFSET : TABLE_LA_REGS_T210_OFFSET)); - // Promote SDMMC1 latency allowance to SDMMC4 (SD to eMMC). - la_scale_regs[LA_SDMMC1_INDEX] = la_scale_regs[LA_SDMMC4_INDEX]; + // Adjust SDMMC1 latency allowance. + switch (freq) + { + case 204000: + la_scale_regs[LA_SDMMC1_INDEX] = (la_scale_regs[LA_SDMMC1_INDEX] & 0xFF0000) | 75; + break; + case 408000: + la_scale_regs[LA_SDMMC1_INDEX] = (la_scale_regs[LA_SDMMC1_INDEX] & 0xFF0000) | 37; + break; + default: + la_scale_regs[LA_SDMMC1_INDEX] = (la_scale_regs[LA_SDMMC1_INDEX] & 0xFF0000) | 30; + break; + } } void minerva_prep_boot_freq() From 2ff2a5df2f9259a34403656a94a187731aff5175 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 22 Feb 2024 11:44:43 +0200 Subject: [PATCH 101/308] nyx: add error code info on lite gamepad dumping --- nyx/nyx_gui/frontend/gui_options.c | 29 +++++++++++++++-------------- 1 file changed, 15 insertions(+), 14 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_options.c b/nyx/nyx_gui/frontend/gui_options.c index 05039a6..3b15dde 100644 --- a/nyx/nyx_gui/frontend/gui_options.c +++ b/nyx/nyx_gui/frontend/gui_options.c @@ -841,7 +841,7 @@ void first_time_clock_edit(void *param) static lv_res_t _joycon_info_dump_action(lv_obj_t * btn) { FIL fp; - int error; + int error = 0; bool is_l_hos = false; bool is_r_hos = false; bool nx_hoag = fuse_read_hw_type() == FUSE_NX_HW_TYPE_HOAG; @@ -850,13 +850,14 @@ static lv_res_t _joycon_info_dump_action(lv_obj_t * btn) char *data = (char *)malloc(SZ_16K); char *txt_buf = (char *)malloc(SZ_4K); - error = hos_dump_cal0(); - - if ((!nx_hoag && !jc_pad) || error) - { + if (!nx_hoag && !jc_pad) error = 255; - goto disabled; - } + + if (!error) + error = hos_dump_cal0(); + + if (error) + goto disabled_or_cal0_issue; if (nx_hoag) goto save_data; @@ -871,7 +872,7 @@ static lv_res_t _joycon_info_dump_action(lv_obj_t * btn) jc_pad->bt_conn_r.type = is_r_hos ? jc_pad->bt_conn_r.type : 0; save_data: - error = !sd_mount(); + error = !sd_mount() ? 5 : 0; if (!error) { @@ -885,7 +886,7 @@ save_data: memcpy(data, &jc_pad->bt_conn_l, sizeof(jc_bt_conn_t)); memcpy(data + sizeof(jc_bt_conn_t), &jc_pad->bt_conn_r, sizeof(jc_bt_conn_t)); - error = sd_save_to_file((u8 *)data, sizeof(jc_bt_conn_t) * 2, "switchroot/joycon_mac.bin"); + error = sd_save_to_file((u8 *)data, sizeof(jc_bt_conn_t) * 2, "switchroot/joycon_mac.bin") ? 4 : 0; // Save readable dump. jc_bt_conn_t *bt = &jc_pad->bt_conn_l; @@ -908,7 +909,7 @@ save_data: bt->ltk[8], bt->ltk[9], bt->ltk[10], bt->ltk[11], bt->ltk[12], bt->ltk[13], bt->ltk[14], bt->ltk[15]); if (!error) - error = f_open(&fp, "switchroot/joycon_mac.ini", FA_WRITE | FA_CREATE_ALWAYS); + error = f_open(&fp, "switchroot/joycon_mac.ini", FA_WRITE | FA_CREATE_ALWAYS) ? 4 : 0; if (!error) { f_puts(data, &fp); @@ -942,7 +943,7 @@ save_data: cal0->gyro_scale[0], cal0->gyro_scale[1], cal0->gyro_scale[2], cal0->bd_mac[0], cal0->bd_mac[1], cal0->bd_mac[2], cal0->bd_mac[3], cal0->bd_mac[4], cal0->bd_mac[5]); if (!error) - error = f_open(&fp, "switchroot/switch.cal", FA_WRITE | FA_CREATE_ALWAYS); + error = f_open(&fp, "switchroot/switch.cal", FA_WRITE | FA_CREATE_ALWAYS) ? 4 : 0; if (!error) { f_puts(data, &fp); @@ -1002,7 +1003,7 @@ save_data: cal0->gyro_scale[0], cal0->gyro_scale[1], cal0->gyro_scale[2], cal0->bd_mac[0], cal0->bd_mac[1], cal0->bd_mac[2], cal0->bd_mac[3], cal0->bd_mac[4], cal0->bd_mac[5]); if (!error) - error = f_open(&fp, "switchroot/switch.cal", FA_WRITE | FA_CREATE_ALWAYS); + error = f_open(&fp, "switchroot/switch.cal", FA_WRITE | FA_CREATE_ALWAYS) ? 4 : 0; if (!error) { f_puts(data, &fp); @@ -1013,7 +1014,7 @@ save_data: sd_unmount(); } -disabled:; +disabled_or_cal0_issue:; lv_obj_t *dark_bg = lv_obj_create(lv_scr_act(), NULL); lv_obj_set_style(dark_bg, &mbox_darken); lv_obj_set_size(dark_bg, LV_HOR_RES, LV_VER_RES); @@ -1079,7 +1080,7 @@ disabled:; if (!nx_hoag) s_printf(txt_buf, "#FFDD00 Failed to dump Joy-Con pairing info!#\n#FFDD00 Error: %d#", error); else - s_printf(txt_buf, "#FFDD00 Failed to get Lite Gamepad info!#\n"); + s_printf(txt_buf, "#FFDD00 Failed to get Lite Gamepad info!#\n#FFDD00 Error: %d#", error); } lv_mbox_set_text(mbox, txt_buf); From 29d1e4a8094d6ebfbb164ba1c893818a13af9fa2 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 22 Feb 2024 11:45:19 +0200 Subject: [PATCH 102/308] Bump hekate to v6.1.0 and Nyx to v1.6.0 --- Versions.inc | 8 ++++---- bootloader/main.c | 2 +- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/Versions.inc b/Versions.inc index f8f9724..d2066ea 100644 --- a/Versions.inc +++ b/Versions.inc @@ -1,11 +1,11 @@ # IPL Version. BLVERSION_MAJOR := 6 -BLVERSION_MINOR := 0 -BLVERSION_HOTFX := 7 +BLVERSION_MINOR := 1 +BLVERSION_HOTFX := 0 BLVERSION_RSVD := 0 # Nyx Version. NYXVERSION_MAJOR := 1 -NYXVERSION_MINOR := 5 -NYXVERSION_HOTFX := 6 +NYXVERSION_MINOR := 6 +NYXVERSION_HOTFX := 0 NYXVERSION_RSVD := 0 diff --git a/bootloader/main.c b/bootloader/main.c index fe8e6f1..dbcb8b5 100644 --- a/bootloader/main.c +++ b/bootloader/main.c @@ -1478,7 +1478,7 @@ ment_t ment_top[] = { MDEF_END() }; -menu_t menu_top = { ment_top, "hekate v6.0.7", 0, 0 }; +menu_t menu_top = { ment_top, "hekate v6.1.0", 0, 0 }; extern void pivot_stack(u32 stack_top); From 83ac40c4b9d848f65e1b9b01eeb4d5be01c97b99 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Tue, 12 Mar 2024 15:08:55 +0200 Subject: [PATCH 103/308] bdk: rtc: handle offset adjustment in-place --- bdk/rtc/max77620-rtc.c | 17 +++++++++++++++++ bdk/rtc/max77620-rtc.h | 2 ++ 2 files changed, 19 insertions(+) diff --git a/bdk/rtc/max77620-rtc.c b/bdk/rtc/max77620-rtc.c index ab01b40..6f813c0 100644 --- a/bdk/rtc/max77620-rtc.c +++ b/bdk/rtc/max77620-rtc.c @@ -23,6 +23,8 @@ #include #include +int epoch_offset = 0; + void max77620_rtc_prep_read() { i2c_send_byte(I2C_5, MAX77620_RTC_I2C_ADDR, MAX77620_RTC_UPDATE0_REG, MAX77620_RTC_READ_UPDATE); @@ -154,6 +156,21 @@ u32 max77620_rtc_date_to_epoch(const rtc_time_t *time) return epoch; } +void max77620_rtc_get_time_adjusted(rtc_time_t *time) +{ + max77620_rtc_get_time(time); + if (epoch_offset) + { + u32 epoch = (u32)((s64)max77620_rtc_date_to_epoch(time) + epoch_offset); + max77620_rtc_epoch_to_date(epoch, time); + } +} + +void max77620_rtc_set_epoch_offset(int offset) +{ + epoch_offset = offset; +} + void max77620_rtc_set_reboot_reason(rtc_reboot_reason_t *rr) { max77620_rtc_stop_alarm(); diff --git a/bdk/rtc/max77620-rtc.h b/bdk/rtc/max77620-rtc.h index b0d616d..b82c3e6 100644 --- a/bdk/rtc/max77620-rtc.h +++ b/bdk/rtc/max77620-rtc.h @@ -109,6 +109,8 @@ typedef struct _rtc_reboot_reason_t void max77620_rtc_prep_read(); void max77620_rtc_get_time(rtc_time_t *time); +void max77620_rtc_get_time_adjusted(rtc_time_t *time); +void max77620_rtc_set_epoch_offset(int offset); void max77620_rtc_stop_alarm(); void max77620_rtc_epoch_to_date(u32 epoch, rtc_time_t *time); u32 max77620_rtc_date_to_epoch(const rtc_time_t *time); From b1e6661a7ae05c9fce075db205098da7a89e4dde Mon Sep 17 00:00:00 2001 From: CTCaer Date: Tue, 12 Mar 2024 15:11:32 +0200 Subject: [PATCH 104/308] nyx: get rtc adjustments via driver --- nyx/nyx_gui/frontend/gui.c | 14 ++------------ nyx/nyx_gui/frontend/gui_options.c | 12 ++++++------ nyx/nyx_gui/libs/fatfs/ffsystem.c | 10 +--------- nyx/nyx_gui/nyx.c | 4 ++++ 4 files changed, 13 insertions(+), 27 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui.c b/nyx/nyx_gui/frontend/gui.c index 06e14b3..370d24c 100644 --- a/nyx/nyx_gui/frontend/gui.c +++ b/nyx/nyx_gui/frontend/gui.c @@ -282,12 +282,7 @@ static void _save_fb_to_bmp() // Create date/time name. char fname[32]; rtc_time_t time; - max77620_rtc_get_time(&time); - if (n_cfg.timeoff) - { - u32 epoch = max77620_rtc_date_to_epoch(&time) + (s32)n_cfg.timeoff; - max77620_rtc_epoch_to_date(epoch, &time); - } + max77620_rtc_get_time_adjusted(&time); s_printf(fname, "%04d%02d%02d_%02d%02d%02d", time.year, time.month, time.day, time.hour, time.min, time.sec); s_printf(path + strlen(path), "/nyx%s.bmp", fname); @@ -1318,12 +1313,7 @@ static void _update_status_bar(void *params) rtc_time_t time; // Get sensor data. - max77620_rtc_get_time(&time); - if (n_cfg.timeoff) - { - u32 epoch = max77620_rtc_date_to_epoch(&time) + (s32)n_cfg.timeoff; - max77620_rtc_epoch_to_date(epoch, &time); - } + max77620_rtc_get_time_adjusted(&time); soc_temp = tmp451_get_soc_temp(false); bq24193_get_property(BQ24193_ChargeStatus, &charge_status); max17050_get_property(MAX17050_RepSOC, (int *)&batt_percent); diff --git a/nyx/nyx_gui/frontend/gui_options.c b/nyx/nyx_gui/frontend/gui_options.c index 3b15dde..bf4b869 100644 --- a/nyx/nyx_gui/frontend/gui_options.c +++ b/nyx/nyx_gui/frontend/gui_options.c @@ -706,9 +706,14 @@ static lv_res_t _action_clock_edit(lv_obj_t *btns, const char * txt) u32 new_epoch = max77620_rtc_date_to_epoch(&time); + // Stored in u32 and allow overflow for integer offset casting. n_cfg.timeoff = new_epoch - epoch; + + // If canceled set 1 for invalidating first boot clock edit. if (!n_cfg.timeoff) n_cfg.timeoff = 1; + else + max77620_rtc_set_epoch_offset((int)n_cfg.timeoff); nyx_changes_made = true; } @@ -744,12 +749,7 @@ static lv_res_t _create_mbox_clock_edit(lv_obj_t *btn) // Get current time. rtc_time_t time; - max77620_rtc_get_time(&time); - if (n_cfg.timeoff) - { - u32 epoch = max77620_rtc_date_to_epoch(&time) + (s32)n_cfg.timeoff; - max77620_rtc_epoch_to_date(epoch, &time); - } + max77620_rtc_get_time_adjusted(&time); // Normalize year if out of range. if (time.year < CLOCK_MIN_YEAR) diff --git a/nyx/nyx_gui/libs/fatfs/ffsystem.c b/nyx/nyx_gui/libs/fatfs/ffsystem.c index 59df4cc..2dd87a2 100644 --- a/nyx/nyx_gui/libs/fatfs/ffsystem.c +++ b/nyx/nyx_gui/libs/fatfs/ffsystem.c @@ -7,9 +7,6 @@ #include #include -#include "../../config.h" - -extern nyx_config n_cfg; #if FF_USE_LFN == 3 /* Dynamic memory allocation */ @@ -50,12 +47,7 @@ DWORD get_fattime ( { rtc_time_t time; - max77620_rtc_get_time(&time); - if (n_cfg.timeoff) - { - u32 epoch = (u32)((s32)max77620_rtc_date_to_epoch(&time) + (s32)n_cfg.timeoff); - max77620_rtc_epoch_to_date(epoch, &time); - } + max77620_rtc_get_time_adjusted(&time); return (((DWORD)(time.year - 1980) << 25) | ((DWORD)time.month << 21) | ((DWORD)time.day << 16) | ((DWORD)time.hour << 11) | ((DWORD)time.min << 5) | (time.sec >> 1)); diff --git a/nyx/nyx_gui/nyx.c b/nyx/nyx_gui/nyx.c index 6bc7f4b..e53d315 100644 --- a/nyx/nyx_gui/nyx.c +++ b/nyx/nyx_gui/nyx.c @@ -269,7 +269,11 @@ skip_main_cfg_parse: else if (!strcmp("entries5col", kv->key)) n_cfg.entries_5_col = atoi(kv->val) == 1; else if (!strcmp("timeoff", kv->key)) + { n_cfg.timeoff = strtol(kv->val, NULL, 16); + if (n_cfg.timeoff != 1) + max77620_rtc_set_epoch_offset((int)n_cfg.timeoff); + } else if (!strcmp("homescreen", kv->key)) n_cfg.home_screen = atoi(kv->val); else if (!strcmp("verification", kv->key)) From 7d1600b85ceee6bf228eddb3bdcc0fdcd4759485 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Tue, 12 Mar 2024 15:16:18 +0200 Subject: [PATCH 105/308] bdk: consolidate ffsystem into bdk --- {nyx/nyx_gui => bdk}/libs/fatfs/ffsystem.c | 4 +-- bootloader/libs/fatfs/ffsystem.c | 35 ---------------------- 2 files changed, 2 insertions(+), 37 deletions(-) rename {nyx/nyx_gui => bdk}/libs/fatfs/ffsystem.c (95%) delete mode 100644 bootloader/libs/fatfs/ffsystem.c diff --git a/nyx/nyx_gui/libs/fatfs/ffsystem.c b/bdk/libs/fatfs/ffsystem.c similarity index 95% rename from nyx/nyx_gui/libs/fatfs/ffsystem.c rename to bdk/libs/fatfs/ffsystem.c index 2dd87a2..1af941f 100644 --- a/nyx/nyx_gui/libs/fatfs/ffsystem.c +++ b/bdk/libs/fatfs/ffsystem.c @@ -1,7 +1,7 @@ /*------------------------------------------------------------------------*/ /* Sample Code of OS Dependent Functions for FatFs */ -/* (C) ChaN, 2018 */ -/* (C) CTCaer, 2018 */ +/* (C) ChaN, 2018 */ +/* (C) CTCaer, 2018-2024 */ /*------------------------------------------------------------------------*/ #include diff --git a/bootloader/libs/fatfs/ffsystem.c b/bootloader/libs/fatfs/ffsystem.c deleted file mode 100644 index a1a5172..0000000 --- a/bootloader/libs/fatfs/ffsystem.c +++ /dev/null @@ -1,35 +0,0 @@ -/*------------------------------------------------------------------------*/ -/* Sample Code of OS Dependent Functions for FatFs */ -/* (C) ChaN, 2018 */ -/* (C) CTCaer, 2018 */ -/*------------------------------------------------------------------------*/ - -#include - -#if FF_USE_LFN == 3 /* Dynamic memory allocation */ - -/*------------------------------------------------------------------------*/ -/* Allocate a memory block */ -/*------------------------------------------------------------------------*/ - -void* ff_memalloc ( /* Returns pointer to the allocated memory block (null if not enough core) */ - UINT msize /* Number of bytes to allocate */ -) -{ - return malloc(msize); /* Allocate a new memory block with POSIX API */ -} - - -/*------------------------------------------------------------------------*/ -/* Free a memory block */ -/*------------------------------------------------------------------------*/ - -void ff_memfree ( - void* mblock /* Pointer to the memory block to free (nothing to do if null) */ -) -{ - free(mblock); /* Free the memory block with POSIX API */ -} - -#endif - From 25b7ffecd1a97e0951ca4a78a42c2ca8878b385a Mon Sep 17 00:00:00 2001 From: CTCaer Date: Tue, 12 Mar 2024 15:43:44 +0200 Subject: [PATCH 106/308] bdk: fatfs: always align malloc to lba --- bdk/libs/fatfs/ffsystem.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/bdk/libs/fatfs/ffsystem.c b/bdk/libs/fatfs/ffsystem.c index 1af941f..0e08743 100644 --- a/bdk/libs/fatfs/ffsystem.c +++ b/bdk/libs/fatfs/ffsystem.c @@ -18,7 +18,8 @@ void* ff_memalloc ( /* Returns pointer to the allocated memory block (null if no UINT msize /* Number of bytes to allocate */ ) { - return malloc(msize); /* Allocate a new memory block with POSIX API */ + // Ensure size is aligned to SDMMC block size. + return malloc(ALIGN(msize, 512)); /* Allocate a new memory block with POSIX API */ } From f126486266d5c0eca90572b01fae050c1b23c966 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Tue, 12 Mar 2024 15:47:14 +0200 Subject: [PATCH 107/308] bdk: sdmmc: utilize block size defines --- bdk/libs/fatfs/ffsystem.c | 2 +- bdk/storage/emmc.h | 2 +- bdk/storage/sd.h | 2 +- bdk/storage/sdmmc.c | 36 ++++++++++++++++++------------------ bdk/storage/sdmmc.h | 3 +++ 5 files changed, 24 insertions(+), 21 deletions(-) diff --git a/bdk/libs/fatfs/ffsystem.c b/bdk/libs/fatfs/ffsystem.c index 0e08743..b4af454 100644 --- a/bdk/libs/fatfs/ffsystem.c +++ b/bdk/libs/fatfs/ffsystem.c @@ -19,7 +19,7 @@ void* ff_memalloc ( /* Returns pointer to the allocated memory block (null if no ) { // Ensure size is aligned to SDMMC block size. - return malloc(ALIGN(msize, 512)); /* Allocate a new memory block with POSIX API */ + return malloc(ALIGN(msize, SDMMC_DAT_BLOCKSIZE)); /* Allocate a new memory block with POSIX API */ } diff --git a/bdk/storage/emmc.h b/bdk/storage/emmc.h index f2010bf..904852d 100644 --- a/bdk/storage/emmc.h +++ b/bdk/storage/emmc.h @@ -26,7 +26,7 @@ #define GPT_FIRST_LBA 1 #define GPT_NUM_BLOCKS 33 -#define EMMC_BLOCKSIZE 512 +#define EMMC_BLOCKSIZE SDMMC_DAT_BLOCKSIZE enum { diff --git a/bdk/storage/sd.h b/bdk/storage/sd.h index 7c6170b..1008b65 100644 --- a/bdk/storage/sd.h +++ b/bdk/storage/sd.h @@ -22,7 +22,7 @@ #include #include -#define SD_BLOCKSIZE 512 +#define SD_BLOCKSIZE SDMMC_DAT_BLOCKSIZE enum { diff --git a/bdk/storage/sdmmc.c b/bdk/storage/sdmmc.c index fdfedff..0fd8427 100644 --- a/bdk/storage/sdmmc.c +++ b/bdk/storage/sdmmc.c @@ -184,7 +184,7 @@ int sdmmc_storage_vendor_sandisk_report(sdmmc_storage_t *storage, void *buf) reqbuf.buf = buf; reqbuf.num_sectors = 1; - reqbuf.blksize = 512; + reqbuf.blksize = SDMMC_DAT_BLOCKSIZE; reqbuf.is_write = 0; reqbuf.is_multi_block = 0; reqbuf.is_auto_stop_trn = 0; @@ -215,7 +215,7 @@ static int _sdmmc_storage_readwrite_ex(sdmmc_storage_t *storage, u32 *blkcnt_out reqbuf.buf = buf; reqbuf.num_sectors = num_sectors; - reqbuf.blksize = 512; + reqbuf.blksize = SDMMC_DAT_BLOCKSIZE; reqbuf.is_write = is_write; reqbuf.is_multi_block = 1; reqbuf.is_auto_stop_trn = 1; @@ -326,7 +326,7 @@ reinit_try: out: sct_off += blkcnt; sct_total -= blkcnt; - bbuf += 512 * blkcnt; + bbuf += SDMMC_DAT_BLOCKSIZE * blkcnt; } return 1; @@ -338,13 +338,13 @@ int sdmmc_storage_read(sdmmc_storage_t *storage, u32 sector, u32 num_sectors, vo if (mc_client_has_access(buf) && !((u32)buf % 8)) return _sdmmc_storage_readwrite(storage, sector, num_sectors, buf, 0); - if (num_sectors > (SDMMC_UP_BUF_SZ / 512)) + if (num_sectors > (SDMMC_UP_BUF_SZ / SDMMC_DAT_BLOCKSIZE)) return 0; u8 *tmp_buf = (u8 *)SDMMC_UPPER_BUFFER; if (_sdmmc_storage_readwrite(storage, sector, num_sectors, tmp_buf, 0)) { - memcpy(buf, tmp_buf, 512 * num_sectors); + memcpy(buf, tmp_buf, SDMMC_DAT_BLOCKSIZE * num_sectors); return 1; } return 0; @@ -356,11 +356,11 @@ int sdmmc_storage_write(sdmmc_storage_t *storage, u32 sector, u32 num_sectors, v if (mc_client_has_access(buf) && !((u32)buf % 8)) return _sdmmc_storage_readwrite(storage, sector, num_sectors, buf, 1); - if (num_sectors > (SDMMC_UP_BUF_SZ / 512)) + if (num_sectors > (SDMMC_UP_BUF_SZ / SDMMC_DAT_BLOCKSIZE)) return 0; u8 *tmp_buf = (u8 *)SDMMC_UPPER_BUFFER; - memcpy(tmp_buf, buf, 512 * num_sectors); + memcpy(tmp_buf, buf, SDMMC_DAT_BLOCKSIZE * num_sectors); return _sdmmc_storage_readwrite(storage, sector, num_sectors, tmp_buf, 1); } @@ -519,7 +519,7 @@ int mmc_storage_get_ext_csd(sdmmc_storage_t *storage, void *buf) sdmmc_req_t reqbuf; reqbuf.buf = buf; - reqbuf.blksize = 512; + reqbuf.blksize = SDMMC_DAT_BLOCKSIZE; reqbuf.num_sectors = 1; reqbuf.is_write = 0; reqbuf.is_multi_block = 0; @@ -708,9 +708,9 @@ int sdmmc_storage_init_mmc(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 bus_wid return 0; DPRINTF("[MMC] card selected\n"); - if (!_sdmmc_storage_set_blocklen(storage, 512)) + if (!_sdmmc_storage_set_blocklen(storage, EMMC_BLOCKSIZE)) return 0; - DPRINTF("[MMC] set blocklen to 512\n"); + DPRINTF("[MMC] set blocklen to EMMC_BLOCKSIZE\n"); // Check system specification version, only version 4.0 and later support below features. if (storage->csd.mmca_vsn < CSD_SPEC_VER_4) @@ -1089,7 +1089,7 @@ static int _sd_storage_switch_get(sdmmc_storage_t *storage, void *buf) sdmmc_req_t reqbuf; reqbuf.buf = buf; - reqbuf.blksize = 64; + reqbuf.blksize = SDMMC_CMD_BLOCKSIZE; reqbuf.num_sectors = 1; reqbuf.is_write = 0; reqbuf.is_multi_block = 0; @@ -1113,7 +1113,7 @@ static int _sd_storage_switch(sdmmc_storage_t *storage, void *buf, int mode, int sdmmc_req_t reqbuf; reqbuf.buf = buf; - reqbuf.blksize = 64; + reqbuf.blksize = SDMMC_CMD_BLOCKSIZE; reqbuf.num_sectors = 1; reqbuf.is_write = 0; reqbuf.is_multi_block = 0; @@ -1526,7 +1526,7 @@ int sd_storage_get_ssr(sdmmc_storage_t *storage, u8 *buf) sdmmc_req_t reqbuf; reqbuf.buf = buf; - reqbuf.blksize = 64; + reqbuf.blksize = SDMMC_CMD_BLOCKSIZE; reqbuf.num_sectors = 1; reqbuf.is_write = 0; reqbuf.is_multi_block = 0; @@ -1545,7 +1545,7 @@ int sd_storage_get_ssr(sdmmc_storage_t *storage, u8 *buf) sdmmc_get_rsp(storage->sdmmc, &tmp, 4, SDMMC_RSP_TYPE_1); // Convert buffer to LE. - for (int i = 0; i < 64; i += 4) + for (int i = 0; i < SDMMC_CMD_BLOCKSIZE; i += 4) { storage->raw_ssr[i + 3] = buf[i]; storage->raw_ssr[i + 2] = buf[i + 1]; @@ -1596,7 +1596,7 @@ static void _sd_storage_parse_csd(sdmmc_storage_t *storage) { case 0: storage->csd.capacity = (1 + unstuff_bits(raw_csd, 62, 12)) << (unstuff_bits(raw_csd, 47, 3) + 2); - storage->csd.capacity <<= unstuff_bits(raw_csd, 80, 4) - 9; // Convert native block size to LBA 512B. + storage->csd.capacity <<= unstuff_bits(raw_csd, 80, 4) - 9; // Convert native block size to LBA SDMMC_DAT_BLOCKSIZE. break; case 1: @@ -1698,9 +1698,9 @@ int sdmmc_storage_init_sd(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 bus_widt return 0; DPRINTF("[SD] card selected\n"); - if (!_sdmmc_storage_set_blocklen(storage, 512)) + if (!_sdmmc_storage_set_blocklen(storage, SD_BLOCKSIZE)) return 0; - DPRINTF("[SD] set blocklen to 512\n"); + DPRINTF("[SD] set blocklen to SD_BLOCKSIZE\n"); // Disconnect Card Detect resistor from DAT3. if (!_sd_storage_execute_app_cmd_type1(storage, &tmp, SD_APP_SET_CLR_CARD_DETECT, 0, 0, R1_STATE_TRAN)) @@ -1775,7 +1775,7 @@ int _gc_storage_custom_cmd(sdmmc_storage_t *storage, void *buf) sdmmc_req_t reqbuf; reqbuf.buf = buf; - reqbuf.blksize = 64; + reqbuf.blksize = SDMMC_CMD_BLOCKSIZE; reqbuf.num_sectors = 1; reqbuf.is_write = 1; reqbuf.is_multi_block = 0; diff --git a/bdk/storage/sdmmc.h b/bdk/storage/sdmmc.h index bc8af81..8a98dc3 100644 --- a/bdk/storage/sdmmc.h +++ b/bdk/storage/sdmmc.h @@ -22,6 +22,9 @@ #include #include +#define SDMMC_CMD_BLOCKSIZE 64 +#define SDMMC_DAT_BLOCKSIZE 512 + extern u32 sd_power_cycle_time_start; typedef enum _sdmmc_type From 82925845e32e85a752ef19a08d7fd0207d772299 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Tue, 12 Mar 2024 15:53:05 +0200 Subject: [PATCH 108/308] hekate/nyx: utilize existing block size defines --- bootloader/frontend/fe_info.c | 8 ++++---- bootloader/hos/hos.c | 12 ++++++------ bootloader/hos/pkg1.c | 2 +- nyx/nyx_gui/frontend/fe_emmc_tools.c | 2 +- nyx/nyx_gui/frontend/gui_info.c | 12 ++++++------ nyx/nyx_gui/frontend/gui_tools.c | 2 +- nyx/nyx_gui/frontend/gui_tools_partition_manager.c | 8 ++++---- nyx/nyx_gui/hos/hos.c | 12 ++++++------ 8 files changed, 29 insertions(+), 29 deletions(-) diff --git a/bootloader/frontend/fe_info.c b/bootloader/frontend/fe_info.c index 2253eca..c24fd7c 100644 --- a/bootloader/frontend/fe_info.c +++ b/bootloader/frontend/fe_info.c @@ -145,7 +145,7 @@ void print_mmc_info() " Current Rate: %d MB/s\n" " Type Support: ", emmc_storage.csd.mmca_vsn, emmc_storage.ext_csd.rev, emmc_storage.ext_csd.dev_version, emmc_storage.csd.cmdclass, - emmc_storage.csd.capacity == (4096 * 512) ? "High" : "Low", speed & 0xFFFF, (speed >> 16) & 0xFFFF, + emmc_storage.csd.capacity == (4096 * EMMC_BLOCKSIZE) ? "High" : "Low", speed & 0xFFFF, (speed >> 16) & 0xFFFF, emmc_storage.csd.busspeed); gfx_con.fntsz = 8; gfx_printf("%s", card_type_support); @@ -156,13 +156,13 @@ void print_mmc_info() u32 rpmb_size = emmc_storage.ext_csd.rpmb_mult << 17; gfx_printf("%keMMC Partitions:%k\n", TXT_CLR_CYAN_L, TXT_CLR_DEFAULT); gfx_printf(" 1: %kBOOT0 %k\n Size: %5d KiB (LBA Sectors: 0x%07X)\n", TXT_CLR_GREENISH, TXT_CLR_DEFAULT, - boot_size / 1024, boot_size / 512); + boot_size / 1024, boot_size / EMMC_BLOCKSIZE); gfx_put_small_sep(); gfx_printf(" 2: %kBOOT1 %k\n Size: %5d KiB (LBA Sectors: 0x%07X)\n", TXT_CLR_GREENISH, TXT_CLR_DEFAULT, - boot_size / 1024, boot_size / 512); + boot_size / 1024, boot_size / EMMC_BLOCKSIZE); gfx_put_small_sep(); gfx_printf(" 3: %kRPMB %k\n Size: %5d KiB (LBA Sectors: 0x%07X)\n", TXT_CLR_GREENISH, TXT_CLR_DEFAULT, - rpmb_size / 1024, rpmb_size / 512); + rpmb_size / 1024, rpmb_size / EMMC_BLOCKSIZE); gfx_put_small_sep(); gfx_printf(" 0: %kGPP (USER) %k\n Size: %5d MiB (LBA Sectors: 0x%07X)\n\n", TXT_CLR_GREENISH, TXT_CLR_DEFAULT, emmc_storage.sec_cnt >> SECTORS_TO_MIB_COEFF, emmc_storage.sec_cnt); diff --git a/bootloader/hos/hos.c b/bootloader/hos/hos.c index 8a6a18e..26b10ab 100644 --- a/bootloader/hos/hos.c +++ b/bootloader/hos/hos.c @@ -218,7 +218,7 @@ static void _hos_eks_get() if (!h_cfg.eks) { // Read EKS blob. - u8 *mbr = calloc(512 , 1); + u8 *mbr = calloc(SD_BLOCKSIZE, 1); if (!hos_eks_rw_try(mbr, false)) goto out; @@ -248,7 +248,7 @@ static void _hos_eks_save() bool new_eks = false; if (!h_cfg.eks) { - h_cfg.eks = calloc(512 , 1); + h_cfg.eks = calloc(SD_BLOCKSIZE, 1); new_eks = true; } @@ -256,7 +256,7 @@ static void _hos_eks_save() if (h_cfg.eks->enabled != HOS_EKS_TSEC_VER) { // Read EKS blob. - u8 *mbr = calloc(512 , 1); + u8 *mbr = calloc(SD_BLOCKSIZE, 1); if (!hos_eks_rw_try(mbr, false)) { if (new_eks) @@ -283,7 +283,7 @@ static void _hos_eks_save() memcpy(h_cfg.eks->troot_dev, keys + 11 * SE_KEY_128_SIZE, SE_KEY_128_SIZE); // Encrypt EKS blob. - u8 *eks = calloc(512 , 1); + u8 *eks = calloc(SD_BLOCKSIZE, 1); memcpy(eks, h_cfg.eks, sizeof(hos_eks_mbr_t)); se_aes_crypt_ecb(14, ENCRYPT, eks, sizeof(hos_eks_mbr_t), eks, sizeof(hos_eks_mbr_t)); @@ -310,7 +310,7 @@ void hos_eks_clear(u32 kb) if (h_cfg.eks->enabled) { // Read EKS blob. - u8 *mbr = calloc(512 , 1); + u8 *mbr = calloc(SD_BLOCKSIZE, 1); if (!hos_eks_rw_try(mbr, false)) goto out; @@ -318,7 +318,7 @@ void hos_eks_clear(u32 kb) h_cfg.eks->enabled = 0; // Encrypt EKS blob. - u8 *eks = calloc(512 , 1); + u8 *eks = calloc(SD_BLOCKSIZE, 1); memcpy(eks, h_cfg.eks, sizeof(hos_eks_mbr_t)); se_aes_crypt_ecb(14, ENCRYPT, eks, sizeof(hos_eks_mbr_t), eks, sizeof(hos_eks_mbr_t)); diff --git a/bootloader/hos/pkg1.c b/bootloader/hos/pkg1.c index 0eded29..c8a0b95 100644 --- a/bootloader/hos/pkg1.c +++ b/bootloader/hos/pkg1.c @@ -436,7 +436,7 @@ int pkg1_warmboot_config(void *hos_ctxt, u32 warmboot_base, u32 fuses_fw, u8 kb) void pkg1_warmboot_rsa_mod(u32 warmboot_base) { // Set warmboot binary rsa modulus. - u8 *rsa_mod = (u8 *)malloc(512); + u8 *rsa_mod = (u8 *)malloc(EMMC_BLOCKSIZE); emmc_set_partition(EMMC_BOOT0); diff --git a/nyx/nyx_gui/frontend/fe_emmc_tools.c b/nyx/nyx_gui/frontend/fe_emmc_tools.c index 4bd498f..f594b15 100644 --- a/nyx/nyx_gui/frontend/fe_emmc_tools.c +++ b/nyx/nyx_gui/frontend/fe_emmc_tools.c @@ -57,7 +57,7 @@ static void _get_valid_partition(u32 *sector_start, u32 *sector_size, u32 *part_ { if (backup) { - u8 gpt_check[512] = { 0 }; + u8 gpt_check[SD_BLOCKSIZE] = { 0 }; sdmmc_storage_read(&sd_storage, *sector_start + 0xC001, 1, gpt_check); if (!memcmp(gpt_check, "EFI PART", 8)) { diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index 20edc41..86e4b64 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -1107,7 +1107,7 @@ static lv_res_t _create_mbox_emmc_sandisk_report(lv_obj_t * btn) lv_mbox_set_text(mbox, "#C7EA46 Sandisk Device Report#"); - u8 *buf = calloc(512, 1); + u8 *buf = calloc(EMMC_BLOCKSIZE, 1); char *txt_buf = (char *)malloc(SZ_32K); char *txt_buf2 = (char *)malloc(SZ_32K); txt_buf[0] = 0; @@ -1694,7 +1694,7 @@ static lv_res_t _create_window_emmc_info_status(lv_obj_t *btn) emmc_storage.csd.cmdclass, speed & 0xFFFF, (speed >> 16) & 0xFFFF, emmc_storage.csd.busspeed, card_type_support, !(cache % 1024) ? (cache / 1024) : cache, !(cache % 1024) ? "MiB" : "KiB", - emmc_storage.ext_csd.max_enh_mult * 512 / 1024, + emmc_storage.ext_csd.max_enh_mult * EMMC_BLOCKSIZE / 1024, life_a_txt, life_b_txt, rsvd_blocks); lv_label_set_static_text(lb_desc, @@ -1735,9 +1735,9 @@ static lv_res_t _create_window_emmc_info_status(lv_obj_t *btn) u32 boot_size = emmc_storage.ext_csd.boot_mult << 17; u32 rpmb_size = emmc_storage.ext_csd.rpmb_mult << 17; strcpy(txt_buf, "#00DDFF eMMC Physical Partitions:#\n"); - s_printf(txt_buf + strlen(txt_buf), "1: #96FF00 BOOT0# Size: %6d KiB (Sect: 0x%08X)\n", boot_size / 1024, boot_size / 512); - s_printf(txt_buf + strlen(txt_buf), "2: #96FF00 BOOT1# Size: %6d KiB (Sect: 0x%08X)\n", boot_size / 1024, boot_size / 512); - s_printf(txt_buf + strlen(txt_buf), "3: #96FF00 RPMB# Size: %6d KiB (Sect: 0x%08X)\n", rpmb_size / 1024, rpmb_size / 512); + s_printf(txt_buf + strlen(txt_buf), "1: #96FF00 BOOT0# Size: %6d KiB (Sect: 0x%08X)\n", boot_size / 1024, boot_size / EMMC_BLOCKSIZE); + s_printf(txt_buf + strlen(txt_buf), "2: #96FF00 BOOT1# Size: %6d KiB (Sect: 0x%08X)\n", boot_size / 1024, boot_size / EMMC_BLOCKSIZE); + s_printf(txt_buf + strlen(txt_buf), "3: #96FF00 RPMB# Size: %6d KiB (Sect: 0x%08X)\n", rpmb_size / 1024, rpmb_size / EMMC_BLOCKSIZE); s_printf(txt_buf + strlen(txt_buf), "0: #96FF00 GPP# Size: %6d MiB (Sect: 0x%08X)\n", emmc_storage.sec_cnt >> SECTORS_TO_MIB_COEFF, emmc_storage.sec_cnt); strcat(txt_buf, "\n#00DDFF GPP (eMMC USER) Partition Table:#\n"); @@ -2119,7 +2119,7 @@ static lv_res_t _create_window_sdcard_info_status(lv_obj_t *btn) s_printf(txt_buf, "\n%s\n%d %s\n%d/%d MiB", sd_fs.fs_type == FS_EXFAT ? ("exFAT "SYMBOL_SHRK) : ("FAT32"), - (sd_fs.csize > 1) ? (sd_fs.csize >> 1) : 512, + (sd_fs.csize > 1) ? (sd_fs.csize >> 1) : SD_BLOCKSIZE, (sd_fs.csize > 1) ? "KiB" : "B", (u32)(sd_fs.free_clst * sd_fs.csize >> SECTORS_TO_MIB_COEFF), (u32)(sd_fs.n_fatent * sd_fs.csize >> SECTORS_TO_MIB_COEFF)); diff --git a/nyx/nyx_gui/frontend/gui_tools.c b/nyx/nyx_gui/frontend/gui_tools.c index b98bcd6..5d7f2ae 100644 --- a/nyx/nyx_gui/frontend/gui_tools.c +++ b/nyx/nyx_gui/frontend/gui_tools.c @@ -595,7 +595,7 @@ static lv_res_t _action_ums_emuemmc_gpp(lv_obj_t *btn) error = 1; usbs.offset = emu_info.sector + 0x4000; - u8 *gpt = malloc(512); + u8 *gpt = malloc(SD_BLOCKSIZE); if (sdmmc_storage_read(&sd_storage, usbs.offset + 1, 1, gpt)) { if (!memcmp(gpt, "EFI PART", 8)) diff --git a/nyx/nyx_gui/frontend/gui_tools_partition_manager.c b/nyx/nyx_gui/frontend/gui_tools_partition_manager.c index 53b6dd5..9a810ec 100644 --- a/nyx/nyx_gui/frontend/gui_tools_partition_manager.c +++ b/nyx/nyx_gui/frontend/gui_tools_partition_manager.c @@ -926,8 +926,8 @@ static lv_res_t _action_check_flash_linux(lv_obj_t *btn) goto error; } - // Last part. Align size to LBA (512 bytes). - fno.fsize = ALIGN((u64)fno.fsize, 512); + // Last part. Align size to LBA (SD_BLOCKSIZE). + fno.fsize = ALIGN((u64)fno.fsize, SD_BLOCKSIZE); idx--; } l4t_flash_ctxt.image_size_sct += (u64)fno.fsize >> 9; @@ -1231,7 +1231,7 @@ dtb_not_found: { if (!memcmp(gpt->entries[i].name, (char[]) { 'S', 0, 'O', 0, 'S', 0 }, 6) || !memcmp(gpt->entries[i].name, (char[]) { 'r', 0, 'e', 0, 'c', 0, 'o', 0, 'v', 0, 'e', 0, 'r', 0, 'y', 0 }, 16)) { - u8 *buf = malloc(512); + u8 *buf = malloc(SD_BLOCKSIZE); sdmmc_storage_read(&sd_storage, gpt->entries[i].lba_start, 1, buf); if (!memcmp(buf, "ANDROID", 7)) boot_recovery = true; @@ -2429,7 +2429,7 @@ check_changes: gpt_hdr_backup.crc32 = crc32_calc(0, (const u8 *)&gpt_hdr_backup, gpt_hdr_backup.size); // Write main GPT. - u32 aligned_entries_size = ALIGN(entries_size, 512); + u32 aligned_entries_size = ALIGN(entries_size, SD_BLOCKSIZE); sdmmc_storage_write(&sd_storage, gpt->header.my_lba, (sizeof(gpt_header_t) + aligned_entries_size) >> 9, gpt); // Write backup GPT partition table. diff --git a/nyx/nyx_gui/hos/hos.c b/nyx/nyx_gui/hos/hos.c index 9acc2ca..2e1f9ce 100644 --- a/nyx/nyx_gui/hos/hos.c +++ b/nyx/nyx_gui/hos/hos.c @@ -210,7 +210,7 @@ static void _hos_eks_get() if (!h_cfg.eks) { // Read EKS blob. - u8 *mbr = calloc(512 , 1); + u8 *mbr = calloc(SD_BLOCKSIZE, 1); if (!hos_eks_rw_try(mbr, false)) goto out; @@ -240,7 +240,7 @@ static void _hos_eks_save() bool new_eks = false; if (!h_cfg.eks) { - h_cfg.eks = calloc(512 , 1); + h_cfg.eks = calloc(SD_BLOCKSIZE, 1); new_eks = true; } @@ -248,7 +248,7 @@ static void _hos_eks_save() if (h_cfg.eks->enabled != HOS_EKS_TSEC_VER) { // Read EKS blob. - u8 *mbr = calloc(512 , 1); + u8 *mbr = calloc(SD_BLOCKSIZE, 1); if (!hos_eks_rw_try(mbr, false)) { if (new_eks) @@ -275,7 +275,7 @@ static void _hos_eks_save() memcpy(h_cfg.eks->troot_dev, keys + 11 * SE_KEY_128_SIZE, SE_KEY_128_SIZE); // Encrypt EKS blob. - u8 *eks = calloc(512 , 1); + u8 *eks = calloc(SD_BLOCKSIZE, 1); memcpy(eks, h_cfg.eks, sizeof(hos_eks_mbr_t)); se_aes_crypt_ecb(14, ENCRYPT, eks, sizeof(hos_eks_mbr_t), eks, sizeof(hos_eks_mbr_t)); @@ -302,7 +302,7 @@ void hos_eks_clear(u32 kb) if (h_cfg.eks->enabled) { // Read EKS blob. - u8 *mbr = calloc(512 , 1); + u8 *mbr = calloc(SD_BLOCKSIZE, 1); if (!hos_eks_rw_try(mbr, false)) goto out; @@ -310,7 +310,7 @@ void hos_eks_clear(u32 kb) h_cfg.eks->enabled = 0; // Encrypt EKS blob. - u8 *eks = calloc(512 , 1); + u8 *eks = calloc(SD_BLOCKSIZE, 1); memcpy(eks, h_cfg.eks, sizeof(hos_eks_mbr_t)); se_aes_crypt_ecb(14, ENCRYPT, eks, sizeof(hos_eks_mbr_t), eks, sizeof(hos_eks_mbr_t)); From fb31cb2926d8aae4b91a53512155c021e573ad4c Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 13 Mar 2024 01:37:52 +0200 Subject: [PATCH 109/308] bdk: ccplex: add no rst vector lock & powergating Allow not locking the reset vectors and launch a new payload after powergating ccplex. --- bdk/mem/smmu.c | 4 +-- bdk/soc/ccplex.c | 81 ++++++++++++++++++++++++++++++++++++++++-------- bdk/soc/ccplex.h | 3 +- 3 files changed, 72 insertions(+), 16 deletions(-) diff --git a/bdk/mem/smmu.c b/bdk/mem/smmu.c index 8bc9aac..6e2b7e8 100644 --- a/bdk/mem/smmu.c +++ b/bdk/mem/smmu.c @@ -1,7 +1,7 @@ /* * Copyright (c) 2018 naehrwert * Copyright (c) 2018 balika011 - * Copyright (c) 2018-2022 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -94,7 +94,7 @@ void smmu_enable() if (smmu_used) return; - ccplex_boot_cpu0((u32)smmu_payload); + ccplex_boot_cpu0((u32)smmu_payload, true); smmu_used = true; msleep(150); diff --git a/bdk/soc/ccplex.c b/bdk/soc/ccplex.c index 37ce73d..d8e315a 100644 --- a/bdk/soc/ccplex.c +++ b/bdk/soc/ccplex.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2022 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -27,7 +27,9 @@ #include #include -void _ccplex_enable_power_t210() +#define CCPLEX_FLOWCTRL_POWERGATING 0 + +static void _ccplex_enable_power_t210() { // Configure GPIO5 and enable output in order to power CPU pmic. max77620_config_gpio(5, MAX77620_GPIO_OUTPUT_ENABLE); @@ -37,19 +39,31 @@ void _ccplex_enable_power_t210() // 1.0.0-3.x: MAX77621_T_JUNCTION_120 | MAX77621_CKKADV_TRIP_DISABLE | MAX77621_INDUCTOR_NOMINAL. max77621_config_default(REGULATOR_CPU0, MAX77621_CTRL_HOS_CFG); - // Set voltage and enable cores power. + // Set voltage and enable cluster power. max7762x_regulator_set_voltage(REGULATOR_CPU0, 950000); max7762x_regulator_enable(REGULATOR_CPU0, true); } -void _ccplex_enable_power_t210b01() +static void _ccplex_enable_power_t210b01() { - // Set voltage and enable cores power. + // Set voltage and enable cluster power. max7762x_regulator_set_voltage(REGULATOR_CPU1, 800000); max7762x_regulator_enable(REGULATOR_CPU1, true); } -void ccplex_boot_cpu0(u32 entry) +static void _ccplex_disable_power() +{ + // Disable cluster power. + if (hw_get_chip_id() == GP_HIDREV_MAJOR_T210) + { + max7762x_regulator_enable(REGULATOR_CPU0, false); + i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_GPIO5, 0); + } + else + max7762x_regulator_enable(REGULATOR_CPU1, false); +} + +void ccplex_boot_cpu0(u32 entry, bool lock) { // Set ACTIVE_CLUSER to FAST. FLOW_CTLR(FLOW_CTLR_BPMP_CLUSTER_CONTROL) &= ~CLUSTER_CTRL_ACTIVE_SLOW; @@ -62,12 +76,12 @@ void ccplex_boot_cpu0(u32 entry) clock_enable_pllx(); // Configure MSELECT source and enable clock to 102MHz. - CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_MSELECT) = (CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_MSELECT) & 0x1FFFFF00) | 6; + CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_MSELECT) = 6; CLOCK(CLK_RST_CONTROLLER_CLK_ENB_V_SET) = BIT(CLK_V_MSELECT); // Configure initial CPU clock frequency and enable clock. CLOCK(CLK_RST_CONTROLLER_CCLK_BURST_POLICY) = 0x20008888; // PLLX_OUT0_LJ. - CLOCK(CLK_RST_CONTROLLER_SUPER_CCLK_DIVIDER) = 0x80000000; + CLOCK(CLK_RST_CONTROLLER_SUPER_CCLK_DIVIDER) = BIT(31); // SUPER_CDIV_ENB. CLOCK(CLK_RST_CONTROLLER_CLK_ENB_V_SET) = BIT(CLK_V_CPUG); clock_enable_coresight(); @@ -90,12 +104,15 @@ void ccplex_boot_cpu0(u32 entry) EXCP_VEC(EVP_CPU_RESET_VECTOR) = 0; // Set reset vector. - SB(SB_AA64_RESET_LOW) = entry | SB_AA64_RST_AARCH64_MODE_EN; + SB(SB_AA64_RESET_LOW) = entry | SB_AA64_RST_AARCH64_MODE_EN; SB(SB_AA64_RESET_HIGH) = 0; // Non-secure reset vector write disable. - SB(SB_CSR) = SB_CSR_NS_RST_VEC_WR_DIS; - (void)SB(SB_CSR); + if (lock) + { + SB(SB_CSR) = SB_CSR_NS_RST_VEC_WR_DIS; + (void)SB(SB_CSR); + } // Tighten up the security aperture. // MC(MC_TZ_SECURITY_CTRL) = 1; @@ -103,8 +120,46 @@ void ccplex_boot_cpu0(u32 entry) // Clear MSELECT reset. CLOCK(CLK_RST_CONTROLLER_RST_DEV_V_CLR) = BIT(CLK_V_MSELECT); // Clear NONCPU reset. - CLOCK(CLK_RST_CONTROLLER_RST_CPUG_CMPLX_CLR) = 0x20000000; + CLOCK(CLK_RST_CONTROLLER_RST_CPUG_CMPLX_CLR) = BIT(29); // CLR_NONCPURESET. // Clear CPU0 reset. // < 5.x: 0x411F000F, Clear CPU{0,1,2,3} POR and CORE, CX0, L2, and DBG reset. - CLOCK(CLK_RST_CONTROLLER_RST_CPUG_CMPLX_CLR) = 0x41010001; + CLOCK(CLK_RST_CONTROLLER_RST_CPUG_CMPLX_CLR) = BIT(30) | BIT(24) | BIT(16) | BIT(0); +} + +void ccplex_powergate_cpu0() +{ +#if CCPLEX_FLOWCTRL_POWERGATING + // Halt CPU0. + FLOW_CTLR(FLOW_CTLR_HALT_CPU0_EVENTS) = HALT_MODE_STOP_UNTIL_IRQ; + + // Powergate cluster via flow control without waiting for WFI. + FLOW_CTLR(FLOW_CTLR_CPU0_CSR) = CSR_INTR_FLAG | CSR_EVENT_FLAG | CSR_ENABLE_EXT_CPU_RAIL | CSR_WAIT_WFI_NONE | CSR_ENABLE; + + // Wait for the rail power off to finish. + while((FLOW_CTLR(FLOW_CTLR_CPU_PWR_CSR) & CPU_PWR_RAIL_STS_MASK) != CPU_PWR_RAIL_OFF); + + // Set CPU0 to waitevent. + FLOW_CTLR(FLOW_CTLR_HALT_CPU0_EVENTS) = HALT_MODE_WAITEVENT; +#endif + + // Set CPU0 POR and CORE, CX0, L2, and DBG reset. + CLOCK(CLK_RST_CONTROLLER_RST_CPUG_CMPLX_SET) = BIT(30) | BIT(24) | BIT(16) | BIT(0); + // Set NONCPU reset. + CLOCK(CLK_RST_CONTROLLER_RST_CPUG_CMPLX_SET) = BIT(29); + // Set MSELECT reset. + CLOCK(CLK_RST_CONTROLLER_RST_DEV_V_SET) = BIT(CLK_V_MSELECT); + + // Disable CE0. + pmc_enable_partition(POWER_RAIL_CE0, DISABLE); + // Disable cluster 0 non-CPU. + pmc_enable_partition(POWER_RAIL_C0NC, DISABLE); + // Disable CPU rail. + pmc_enable_partition(POWER_RAIL_CRAIL, DISABLE); + + clock_disable_coresight(); + + // Clear out MSELECT and CPU clocks. + CLOCK(CLK_RST_CONTROLLER_CLK_ENB_V_CLR) = BIT(CLK_V_MSELECT) | BIT(CLK_V_CPUG); + + _ccplex_disable_power(); } diff --git a/bdk/soc/ccplex.h b/bdk/soc/ccplex.h index fb5be92..496da43 100644 --- a/bdk/soc/ccplex.h +++ b/bdk/soc/ccplex.h @@ -19,6 +19,7 @@ #include -void ccplex_boot_cpu0(u32 entry); +void ccplex_boot_cpu0(u32 entry, bool lock); +void ccplex_powergate_cpu0(); #endif From 3a4fa12f4262781d2ade3069114ce81718343261 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 13 Mar 2024 01:44:58 +0200 Subject: [PATCH 110/308] bdk: smmu: powergate ccplex after enabling smmu --- bdk/mem/smmu.c | 40 +++++++++++----------------------------- bdk/mem/smmu.h | 5 ++--- bdk/sec/tsec.c | 10 +++++----- bdk/sec/tsec.h | 3 +-- 4 files changed, 19 insertions(+), 39 deletions(-) diff --git a/bdk/mem/smmu.c b/bdk/mem/smmu.c index 6e2b7e8..048203f 100644 --- a/bdk/mem/smmu.c +++ b/bdk/mem/smmu.c @@ -23,27 +23,18 @@ #include #include #include -#include -bool smmu_used = false; u8 *_pageheap = (u8 *)SMMU_HEAP_ADDR; -//Enabling SMMU requires a TZ secure write: MC(MC_SMMU_CONFIG) = 1; +// Enabling SMMU requires a TZ secure write: MC(MC_SMMU_CONFIG) = 1; u8 smmu_payload[] __attribute__((aligned(16))) = { - 0x41, 0x01, 0x00, 0x58, // 0x00: LDR X1, =0x70019010 + 0xC1, 0x00, 0x00, 0x58, // 0x00: LDR X1, =0x70019010 0x20, 0x00, 0x80, 0xD2, // 0x04: MOV X0, #0x1 0x20, 0x00, 0x00, 0xB9, // 0x08: STR W0, [X1] 0x1F, 0x71, 0x08, 0xD5, // 0x0C: IC IALLUIS 0x9F, 0x3B, 0x03, 0xD5, // 0x10: DSB ISH 0xFE, 0xFF, 0xFF, 0x17, // 0x14: B loop - 0x00, 0x00, 0x80, 0xD2, // 0x18: MOV X0, #0x0 - 0x20, 0x00, 0x00, 0xB9, // 0x1C: STR W0, [X1] - 0x80, 0x00, 0x00, 0x58, // 0x20: LDR X0, =0x4002B000 - 0x00, 0x00, 0x1F, 0xD6, // 0x28: BR X0 - 0x10, 0x90, 0x01, 0x70, // 0x28: MC_SMMU_CONFIG - 0x00, 0x00, 0x00, 0x00, // 0x2C: - 0x00, 0x00, 0x00, 0x00, // 0x30: secmon address - 0x00, 0x00, 0x00, 0x00 // 0x34: + 0x10, 0x90, 0x01, 0x70, // 0x18: MC_SMMU_CONFIG }; void *page_alloc(u32 num) @@ -76,7 +67,7 @@ void smmu_flush_all() smmu_flush_regs(); } -void smmu_init(u32 secmon_base) +void smmu_init() { MC(MC_SMMU_PTB_ASID) = 0; MC(MC_SMMU_PTB_DATA) = 0; @@ -84,31 +75,22 @@ void smmu_init(u32 secmon_base) MC(MC_SMMU_PTC_CONFIG) = 0x28000F3F; MC(MC_SMMU_PTC_FLUSH) = 0; MC(MC_SMMU_TLB_FLUSH) = 0; - - // Set the secmon address - *(u32 *)(smmu_payload + 0x30) = secmon_base; } void smmu_enable() { - if (smmu_used) + static bool enabled = false; + + if (enabled) return; - ccplex_boot_cpu0((u32)smmu_payload, true); - smmu_used = true; - msleep(150); + ccplex_boot_cpu0((u32)smmu_payload, false); + msleep(100); + ccplex_powergate_cpu0(); smmu_flush_all(); -} -bool smmu_is_used() -{ - return smmu_used; -} - -void smmu_exit() -{ - *(u32 *)(smmu_payload + 0x14) = _NOP(); + enabled = true; } u32 *smmu_init_domain4(u32 dev_base, u32 asid) diff --git a/bdk/mem/smmu.h b/bdk/mem/smmu.h index 97cd9d5..80ef66f 100644 --- a/bdk/mem/smmu.h +++ b/bdk/mem/smmu.h @@ -1,5 +1,6 @@ /* * Copyright (c) 2018 naehrwert + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -72,10 +73,8 @@ void *page_alloc(u32 num); u32 *smmu_alloc_pdir(); void smmu_flush_regs(); void smmu_flush_all(); -void smmu_init(u32 secmon_base); +void smmu_init(); void smmu_enable(); -bool smmu_is_used(); -void smmu_exit(); u32 *smmu_init_domain4(u32 dev_base, u32 asid); u32 *smmu_get_pte(u32 *pdir, u32 iova); void smmu_map(u32 *pdir, u32 addr, u32 page, int cnt, u32 attr); diff --git a/bdk/sec/tsec.c b/bdk/sec/tsec.c index 3dcf084..820a2d3 100644 --- a/bdk/sec/tsec.c +++ b/bdk/sec/tsec.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2023 CTCaer + * Copyright (c) 2018-2024 CTCaer * Copyright (c) 2018 balika011 * * This program is free software; you can redistribute it and/or modify it @@ -146,10 +146,10 @@ int tsec_query(void *tsec_keys, tsec_ctxt_t *tsec_ctxt) { // Init SMMU translation for TSEC. pdir = smmu_init_for_tsec(); - smmu_init(tsec_ctxt->secmon_base); - // Enable SMMU - if (!smmu_is_used()) - smmu_enable(); + smmu_init(); + + // Enable SMMU. + smmu_enable(); // Clock reset controller. car = page_alloc(1); diff --git a/bdk/sec/tsec.h b/bdk/sec/tsec.h index 81a2cce..16aa4b7 100644 --- a/bdk/sec/tsec.h +++ b/bdk/sec/tsec.h @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert -* Copyright (c) 2018-2021 CTCaer +* Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -35,7 +35,6 @@ typedef struct _tsec_ctxt_t u32 type; void *pkg1; u32 pkg11_off; - u32 secmon_base; } tsec_ctxt_t; int tsec_query(void *tsec_keys, tsec_ctxt_t *tsec_ctxt); From e341cf39f254d59f8fff5c000c678ecc959b0499 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 13 Mar 2024 01:49:31 +0200 Subject: [PATCH 111/308] hekate/nyx: apply ccplex changes HOS procedure can now launch secmon from coldboot again when HOS is 6.2.0. And update L4T for the function signature change. --- bootloader/hos/hos.c | 8 ++------ bootloader/l4t/l4t.c | 2 +- nyx/nyx_gui/frontend/gui_tools.c | 3 +-- nyx/nyx_gui/hos/hos.c | 2 +- 4 files changed, 5 insertions(+), 10 deletions(-) diff --git a/bootloader/hos/hos.c b/bootloader/hos/hos.c index 26b10ab..e5ca239 100644 --- a/bootloader/hos/hos.c +++ b/bootloader/hos/hos.c @@ -2,7 +2,7 @@ * Copyright (c) 2018 naehrwert * Copyright (c) 2018 st4rk * Copyright (c) 2018 Ced2911 - * Copyright (c) 2018-2023 CTCaer + * Copyright (c) 2018-2024 CTCaer * Copyright (c) 2018 balika011 * * This program is free software; you can redistribute it and/or modify it @@ -857,7 +857,6 @@ int hos_launch(ini_sec_t *cfg) tsec_ctxt.fw = (u8 *)ctxt.pkg1 + ctxt.pkg1_id->tsec_off; tsec_ctxt.pkg1 = ctxt.pkg1; tsec_ctxt.pkg11_off = ctxt.pkg1_id->pkg11_off; - tsec_ctxt.secmon_base = secmon_base; if (!hos_keygen(ctxt.keyblob, kb, &tsec_ctxt, ctxt.stock, is_exo)) goto error; @@ -1173,10 +1172,7 @@ int hos_launch(ini_sec_t *cfg) bpmp_clk_rate_set(BPMP_CLK_NORMAL); // Launch secmon. - if (smmu_is_used()) - smmu_exit(); - else - ccplex_boot_cpu0(secmon_base); + ccplex_boot_cpu0(secmon_base, true); // Halt ourselves in wait-event state. while (true) diff --git a/bootloader/l4t/l4t.c b/bootloader/l4t/l4t.c index 75a2f4a..a1c2318 100644 --- a/bootloader/l4t/l4t.c +++ b/bootloader/l4t/l4t.c @@ -1156,7 +1156,7 @@ void launch_l4t(const ini_sec_t *ini_sec, int entry_idx, int is_list, bool t210b if (t210b01) { // Launch BL31. - ccplex_boot_cpu0(TZDRAM_COLD_ENTRY); + ccplex_boot_cpu0(TZDRAM_COLD_ENTRY, true); // Enable Wrap burst for BPMP, GPU and PCIE. MSELECT(MSELECT_CONFIG) = (MSELECT(MSELECT_CONFIG) & (~(MSELECT_CFG_ERR_RESP_EN_GPU | MSELECT_CFG_ERR_RESP_EN_PCIE))) | diff --git a/nyx/nyx_gui/frontend/gui_tools.c b/nyx/nyx_gui/frontend/gui_tools.c index 5d7f2ae..b8a57e3 100644 --- a/nyx/nyx_gui/frontend/gui_tools.c +++ b/nyx/nyx_gui/frontend/gui_tools.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2023 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -1205,7 +1205,6 @@ static lv_res_t _create_window_dump_pk12_tool(lv_obj_t *btn) tsec_ctxt.fw = (void *)(pkg1 + pkg1_id->tsec_off); tsec_ctxt.pkg1 = (void *)pkg1; tsec_ctxt.pkg11_off = pkg1_id->pkg11_off; - tsec_ctxt.secmon_base = pkg1_id->secmon_base; // Read keyblob. u8 *keyblob = (u8 *)calloc(EMMC_BLOCKSIZE, 1); diff --git a/nyx/nyx_gui/hos/hos.c b/nyx/nyx_gui/hos/hos.c index 2e1f9ce..1828e66 100644 --- a/nyx/nyx_gui/hos/hos.c +++ b/nyx/nyx_gui/hos/hos.c @@ -2,7 +2,7 @@ * Copyright (c) 2018 naehrwert * Copyright (c) 2018 st4rk * Copyright (c) 2018 Ced2911 - * Copyright (c) 2018-2023 CTCaer + * Copyright (c) 2018-2024 CTCaer * Copyright (c) 2018 balika011 * * This program is free software; you can redistribute it and/or modify it From 20e661fc0190fce2cc73cec08891e0b97f0c845b Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 13 Mar 2024 01:50:45 +0200 Subject: [PATCH 112/308] bdk: refactor flow control defines --- bdk/soc/bpmp.c | 10 ++++---- bdk/soc/t210.h | 64 ++++++++++++++++++++++++++++++++------------------ 2 files changed, 46 insertions(+), 28 deletions(-) diff --git a/bdk/soc/bpmp.c b/bdk/soc/bpmp.c index 5a33f4b..669dcc2 100644 --- a/bdk/soc/bpmp.c +++ b/bdk/soc/bpmp.c @@ -287,10 +287,10 @@ void bpmp_usleep(u32 us) // Each iteration takes 1us. while (us) { - delay = (us > HALT_COP_MAX_CNT) ? HALT_COP_MAX_CNT : us; + delay = (us > HALT_MAX_CNT) ? HALT_MAX_CNT : us; us -= delay; - FLOW_CTLR(FLOW_CTLR_HALT_COP_EVENTS) = HALT_COP_WAIT_EVENT | HALT_COP_USEC | delay; + FLOW_CTLR(FLOW_CTLR_HALT_COP_EVENTS) = HALT_MODE_WAITEVENT | HALT_USEC | delay; } } @@ -301,14 +301,14 @@ void bpmp_msleep(u32 ms) // Iteration time is variable. ~200 - 1000us. while (ms) { - delay = (ms > HALT_COP_MAX_CNT) ? HALT_COP_MAX_CNT : ms; + delay = (ms > HALT_MAX_CNT) ? HALT_MAX_CNT : ms; ms -= delay; - FLOW_CTLR(FLOW_CTLR_HALT_COP_EVENTS) = HALT_COP_WAIT_EVENT | HALT_COP_MSEC | delay; + FLOW_CTLR(FLOW_CTLR_HALT_COP_EVENTS) = HALT_MODE_WAITEVENT | HALT_MSEC | delay; } } void bpmp_halt() { - FLOW_CTLR(FLOW_CTLR_HALT_COP_EVENTS) = HALT_COP_WAIT_EVENT | HALT_COP_JTAG; + FLOW_CTLR(FLOW_CTLR_HALT_COP_EVENTS) = HALT_MODE_WAITEVENT | HALT_JTAG; } diff --git a/bdk/soc/t210.h b/bdk/soc/t210.h index 97819a6..37bebae 100644 --- a/bdk/soc/t210.h +++ b/bdk/soc/t210.h @@ -308,29 +308,47 @@ #define EMC_HEKA_UPD BIT(30) /*! Flow controller registers. */ -#define FLOW_CTLR_HALT_COP_EVENTS 0x4 -#define HALT_COP_GIC_IRQ BIT(9) -#define HALT_COP_LIC_IRQ BIT(11) -#define HALT_COP_SEC BIT(23) -#define HALT_COP_MSEC BIT(24) -#define HALT_COP_USEC BIT(25) -#define HALT_COP_JTAG BIT(28) -#define HALT_COP_WAIT_EVENT BIT(30) -#define HALT_COP_STOP_UNTIL_IRQ BIT(31) -#define HALT_COP_MAX_CNT 0xFF -#define FLOW_CTLR_HALT_CPU0_EVENTS 0x0 -#define FLOW_CTLR_HALT_CPU1_EVENTS 0x14 -#define FLOW_CTLR_HALT_CPU2_EVENTS 0x1C -#define FLOW_CTLR_HALT_CPU3_EVENTS 0x24 -#define FLOW_CTLR_CPU0_CSR 0x8 -#define FLOW_CTLR_CPU1_CSR 0x18 -#define FLOW_CTLR_CPU2_CSR 0x20 -#define FLOW_CTLR_CPU3_CSR 0x28 -#define FLOW_CTLR_RAM_REPAIR 0x40 -#define RAM_REPAIR_REQ BIT(0) -#define RAM_REPAIR_STS BIT(1) -#define FLOW_CTLR_BPMP_CLUSTER_CONTROL 0x98 -#define CLUSTER_CTRL_ACTIVE_SLOW BIT(0) +#define FLOW_CTLR_HALT_COP_EVENTS 0x4 +#define FLOW_CTLR_HALT_CPU0_EVENTS 0x0 +#define FLOW_CTLR_HALT_CPU1_EVENTS 0x14 +#define FLOW_CTLR_HALT_CPU2_EVENTS 0x1C +#define FLOW_CTLR_HALT_CPU3_EVENTS 0x24 +#define HALT_GIC_IRQ BIT(9) +#define HALT_LIC_IRQ BIT(11) +#define HALT_SEC BIT(23) +#define HALT_MSEC BIT(24) +#define HALT_USEC BIT(25) +#define HALT_JTAG BIT(28) +#define HALT_MODE_NONE (0 << 29u) +#define HALT_MODE_RUN_AND_INT (1 << 29u) +#define HALT_MODE_WAITEVENT (2 << 29u) +#define HALT_MODE_WAITEVENT_AND_INT (3 << 29u) +#define HALT_MODE_STOP_UNTIL_IRQ (4 << 29u) +#define HALT_MODE_STOP_UNTIL_IRQ_AND_INT (5 << 29u) +#define HALT_MODE_STOP_UNTIL_EVENT_AND_IRQ (6 << 29u) +#define HALT_MAX_CNT 0xFF +#define FLOW_CTLR_COP_CSR 0xC +#define FLOW_CTLR_CPU0_CSR 0x8 +#define FLOW_CTLR_CPU1_CSR 0x18 +#define FLOW_CTLR_CPU2_CSR 0x20 +#define FLOW_CTLR_CPU3_CSR 0x28 +#define CSR_ENABLE BIT(0) +#define CSR_WAIT_WFI_NONE (0 << 8u) +#define CSR_WAIT_WFI_CPU0 (BIT(0) << 8u) +#define CSR_ENABLE_EXT_CPU_ONLY (0 << 12u) +#define CSR_ENABLE_EXT_CPU_NCPU (1 << 12u) +#define CSR_ENABLE_EXT_CPU_RAIL (2 << 12u) +#define CSR_EVENT_FLAG BIT(14) +#define CSR_INTR_FLAG BIT(15) +#define CSR_HALT BIT(22) +#define FLOW_CTLR_CPU_PWR_CSR 0x38 +#define CPU_PWR_RAIL_STS_MASK (3 << 1u) +#define CPU_PWR_RAIL_OFF 0 +#define FLOW_CTLR_RAM_REPAIR 0x40 +#define RAM_REPAIR_REQ BIT(0) +#define RAM_REPAIR_STS BIT(1) +#define FLOW_CTLR_BPMP_CLUSTER_CONTROL 0x98 +#define CLUSTER_CTRL_ACTIVE_SLOW BIT(0) /* MSelect registers */ #define MSELECT_CONFIG 0x00 From 9a520d63a6b97dceb59aff8a8e659dc3325520ec Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 13 Mar 2024 01:54:46 +0200 Subject: [PATCH 113/308] bdk: smmu: refactor driver and allow other asid --- bdk/mem/mc_t210.h | 29 +++++++++++++++++++------ bdk/mem/smmu.c | 47 ++++++++++++++++++++++++++++------------- bdk/mem/smmu.h | 54 ++++++++--------------------------------------- bdk/memory_map.h | 4 +++- bdk/sec/tsec.c | 22 +++++++++---------- bdk/soc/irq.c | 2 +- 6 files changed, 79 insertions(+), 79 deletions(-) diff --git a/bdk/mem/mc_t210.h b/bdk/mem/mc_t210.h index ed96852..ff96b9d 100644 --- a/bdk/mem/mc_t210.h +++ b/bdk/mem/mc_t210.h @@ -1,5 +1,6 @@ /* - * Copyright (c) 2014, NVIDIA Corporation. All rights reserved. + * Copyright (c) 2014, NVIDIA Corporation. + * Copyright (c) 2018-2023, CTCaer * * This software is licensed under the terms of the GNU General Public * License version 2, as published by the Free Software Foundation, and @@ -14,6 +15,22 @@ #ifndef _MC_T210_H_ #define _MC_T210_H_ +/*! MC SMMU registers */ +#define MC_SMMU_CONFIG 0x10 +#define MC_SMMU_TLB_CONFIG 0x14 +#define MC_SMMU_PTC_CONFIG 0x18 +#define MC_SMMU_PTB_ASID 0x1c +#define MC_SMMU_PTB_DATA 0x20 +#define MC_SMMU_TLB_FLUSH 0x30 +#define MC_SMMU_PTC_FLUSH 0x34 +#define MC_SMMU_ASID_SECURITY 0x38 +#define MC_SMMU_TRANSLATION_ENABLE_0 0x228 +#define MC_SMMU_TRANSLATION_ENABLE_1 0x22c +#define MC_SMMU_TRANSLATION_ENABLE_2 0x230 +#define MC_SMMU_TRANSLATION_ENABLE_3 0x234 +#define MC_SMMU_TRANSLATION_ENABLE_4 0xb98 + +/*! MC General registers */ #define MC_INTSTATUS 0x0 #define MC_INTMASK 0x4 #define MC_ERR_STATUS 0x8 @@ -464,7 +481,7 @@ #define MC_UNTRANSLATED_REGION_CHECK 0x948 #define MC_DA_CONFIG0 0x9dc -/* MC_SECURITY_CARVEOUTX_CLIENT_FORCE_INTERNAL_ACCESS0 */ +/*! MC_SECURITY_CARVEOUTX_CLIENT_FORCE_INTERNAL_ACCESS0 */ #define SEC_CARVEOUT_CA0_R_PTCR BIT(0) #define SEC_CARVEOUT_CA0_R_DISPLAY0A BIT(1) #define SEC_CARVEOUT_CA0_R_DISPLAY0AB BIT(2) @@ -484,7 +501,7 @@ #define SEC_CARVEOUT_CA0_R_PPCSAHBSLV BIT(30) #define SEC_CARVEOUT_CA0_R_SATAR BIT(31) -/* MC_SECURITY_CARVEOUTX_CLIENT_FORCE_INTERNAL_ACCESS1 */ +/*! MC_SECURITY_CARVEOUTX_CLIENT_FORCE_INTERNAL_ACCESS1 */ #define SEC_CARVEOUT_CA1_R_VDEBSEV BIT(2) #define SEC_CARVEOUT_CA1_R_VDEMBE BIT(3) #define SEC_CARVEOUT_CA1_R_VDEMCE BIT(4) @@ -504,7 +521,7 @@ #define SEC_CARVEOUT_CA1_W_VDEBSEV BIT(30) #define SEC_CARVEOUT_CA1_W_VDEDBG BIT(31) -/* MC_SECURITY_CARVEOUTX_CLIENT_FORCE_INTERNAL_ACCESS2 */ +/*! MC_SECURITY_CARVEOUTX_CLIENT_FORCE_INTERNAL_ACCESS2 */ #define SEC_CARVEOUT_CA2_W_VDEMBE BIT(0) #define SEC_CARVEOUT_CA2_W_VDETPM BIT(1) #define SEC_CARVEOUT_CA2_R_ISPRA BIT(4) @@ -524,7 +541,7 @@ #define SEC_CARVEOUT_CA2_W_GPU BIT(25) #define SEC_CARVEOUT_CA2_R_DISPLAYT BIT(26) -/* MC_SECURITY_CARVEOUTX_CLIENT_FORCE_INTERNAL_ACCESS3 */ +/*! MC_SECURITY_CARVEOUTX_CLIENT_FORCE_INTERNAL_ACCESS3 */ #define SEC_CARVEOUT_CA3_R_SDMMCA BIT(0) #define SEC_CARVEOUT_CA3_R_SDMMCAA BIT(1) #define SEC_CARVEOUT_CA3_R_SDMMC BIT(2) @@ -544,7 +561,7 @@ #define SEC_CARVEOUT_CA3_R_NVJPG BIT(30) #define SEC_CARVEOUT_CA3_W_NVJPG BIT(31) -/* MC_SECURITY_CARVEOUTX_CLIENT_FORCE_INTERNAL_ACCESS4 */ +/*! MC_SECURITY_CARVEOUTX_CLIENT_FORCE_INTERNAL_ACCESS4 */ #define SEC_CARVEOUT_CA4_R_SE BIT(0) #define SEC_CARVEOUT_CA4_W_SE BIT(1) #define SEC_CARVEOUT_CA4_R_AXIAP BIT(2) diff --git a/bdk/mem/smmu.c b/bdk/mem/smmu.c index 048203f..0128103 100644 --- a/bdk/mem/smmu.c +++ b/bdk/mem/smmu.c @@ -23,6 +23,23 @@ #include #include #include +#include + +#define SMMU_PAGE_SHIFT 12 +#define SMMU_PAGE_SIZE (1 << SMMU_PAGE_SHIFT) +#define SMMU_PDIR_COUNT 1024 +#define SMMU_PDIR_SIZE (sizeof(u32) * SMMU_PDIR_COUNT) +#define SMMU_PTBL_COUNT 1024 +#define SMMU_PTBL_SIZE (sizeof(u32) * SMMU_PTBL_COUNT) +#define SMMU_PDIR_SHIFT 12 +#define SMMU_PDE_SHIFT 12 +#define SMMU_PTE_SHIFT 12 +#define SMMU_PFN_MASK 0x000FFFFF +#define SMMU_ADDR_TO_PFN(addr) ((addr) >> 12) +#define SMMU_ADDR_TO_PDN(addr) ((addr) >> 22) +#define SMMU_PDN_TO_ADDR(addr) ((pdn) << 22) +#define SMMU_MK_PDIR(page, attr) (((page) >> SMMU_PDIR_SHIFT) | (attr)) +#define SMMU_MK_PDE(page, attr) (((page) >> SMMU_PDE_SHIFT) | (attr)) u8 *_pageheap = (u8 *)SMMU_HEAP_ADDR; @@ -37,7 +54,7 @@ u8 smmu_payload[] __attribute__((aligned(16))) = { 0x10, 0x90, 0x01, 0x70, // 0x18: MC_SMMU_CONFIG }; -void *page_alloc(u32 num) +void *smmu_page_zalloc(u32 num) { u8 *res = _pageheap; _pageheap += SZ_PAGE * num; @@ -45,15 +62,15 @@ void *page_alloc(u32 num) return res; } -u32 *smmu_alloc_pdir() +static u32 *_smmu_pdir_alloc() { - u32 *pdir = (u32 *)page_alloc(1); + u32 *pdir = (u32 *)smmu_page_zalloc(1); for (int pdn = 0; pdn < SMMU_PDIR_COUNT; pdn++) pdir[pdn] = _PDE_VACANT(pdn); return pdir; } -void smmu_flush_regs() +static void _smmu_flush_regs() { (void)MC(MC_SMMU_PTB_DATA); } @@ -61,10 +78,10 @@ void smmu_flush_regs() void smmu_flush_all() { MC(MC_SMMU_PTC_FLUSH) = 0; - smmu_flush_regs(); + _smmu_flush_regs(); MC(MC_SMMU_TLB_FLUSH) = 0; - smmu_flush_regs(); + _smmu_flush_regs(); } void smmu_init() @@ -95,14 +112,14 @@ void smmu_enable() u32 *smmu_init_domain4(u32 dev_base, u32 asid) { - u32 *pdir = smmu_alloc_pdir(); + u32 *pdir = _smmu_pdir_alloc(); MC(MC_SMMU_PTB_ASID) = asid; MC(MC_SMMU_PTB_DATA) = SMMU_MK_PDIR((u32)pdir, _PDIR_ATTR); - smmu_flush_regs(); + _smmu_flush_regs(); MC(dev_base) = 0x80000000 | (asid << 24) | (asid << 16) | (asid << 8) | (asid); - smmu_flush_regs(); + _smmu_flush_regs(); return pdir; } @@ -117,7 +134,7 @@ u32 *smmu_get_pte(u32 *pdir, u32 iova) ptbl = (u32 *)((pdir[pdn] & SMMU_PFN_MASK) << SMMU_PDIR_SHIFT); else { - ptbl = (u32 *)page_alloc(1); + ptbl = (u32 *)smmu_page_zalloc(1); u32 addr = SMMU_PDN_TO_ADDR(pdn); for (int pn = 0; pn < SMMU_PTBL_COUNT; pn++, addr += SMMU_PAGE_SIZE) ptbl[pn] = _PTE_VACANT(addr); @@ -140,16 +157,16 @@ void smmu_map(u32 *pdir, u32 addr, u32 page, int cnt, u32 attr) smmu_flush_all(); } -u32 *smmu_init_for_tsec() +u32 *smmu_init_domain(u32 asid) { - return smmu_init_domain4(MC_SMMU_TSEC_ASID, 1); + return smmu_init_domain4(asid, 1); } -void smmu_deinit_for_tsec() +void smmu_deinit_domain(u32 asid) { MC(MC_SMMU_PTB_ASID) = 1; MC(MC_SMMU_PTB_DATA) = 0; - MC(MC_SMMU_TSEC_ASID) = 0; - smmu_flush_regs(); + MC(asid) = 0; + _smmu_flush_regs(); } diff --git a/bdk/mem/smmu.h b/bdk/mem/smmu.h index 80ef66f..c0c765c 100644 --- a/bdk/mem/smmu.h +++ b/bdk/mem/smmu.h @@ -17,45 +17,13 @@ #include -#define SMMU_HEAP_ADDR 0xA0000000 - -#define MC_INTSTATUS 0x0 -#define MC_INTMASK 0x4 -#define MC_ERR_STATUS 0x8 -#define MC_ERR_ADR 0xc -#define MC_SMMU_CONFIG 0x10 -#define MC_SMMU_TLB_CONFIG 0x14 -#define MC_SMMU_PTC_CONFIG 0x18 -#define MC_SMMU_PTB_ASID 0x1c -#define MC_SMMU_PTB_DATA 0x20 -#define MC_SMMU_TLB_FLUSH 0x30 -#define MC_SMMU_PTC_FLUSH 0x34 -#define MC_SMMU_ASID_SECURITY 0x38 #define MC_SMMU_AVPC_ASID 0x23C #define MC_SMMU_TSEC_ASID 0x294 -#define MC_SMMU_TRANSLATION_ENABLE_0 0x228 -#define MC_SMMU_TRANSLATION_ENABLE_1 0x22c -#define MC_SMMU_TRANSLATION_ENABLE_2 0x230 -#define MC_SMMU_TRANSLATION_ENABLE_3 0x234 -#define MC_SMMU_TRANSLATION_ENABLE_4 0xb98 #define SMMU_PDE_NEXT_SHIFT 28 #define MC_SMMU_PTB_DATA_0_ASID_NONSECURE_SHIFT 29 #define MC_SMMU_PTB_DATA_0_ASID_WRITABLE_SHIFT 30 #define MC_SMMU_PTB_DATA_0_ASID_READABLE_SHIFT 31 -#define SMMU_PAGE_SHIFT 12 -#define SMMU_PAGE_SIZE (1 << SMMU_PAGE_SHIFT) -#define SMMU_PDIR_COUNT 1024 -#define SMMU_PDIR_SIZE (sizeof(u32) * SMMU_PDIR_COUNT) -#define SMMU_PTBL_COUNT 1024 -#define SMMU_PTBL_SIZE (sizeof(u32) * SMMU_PTBL_COUNT) -#define SMMU_PDIR_SHIFT 12 -#define SMMU_PDE_SHIFT 12 -#define SMMU_PTE_SHIFT 12 -#define SMMU_PFN_MASK 0x000FFFFF -#define SMMU_ADDR_TO_PFN(addr) ((addr) >> 12) -#define SMMU_ADDR_TO_PDN(addr) ((addr) >> 22) -#define SMMU_PDN_TO_ADDR(addr) ((pdn) << 22) #define _READABLE (1 << MC_SMMU_PTB_DATA_0_ASID_READABLE_SHIFT) #define _WRITABLE (1 << MC_SMMU_PTB_DATA_0_ASID_WRITABLE_SHIFT) #define _NONSECURE (1 << MC_SMMU_PTB_DATA_0_ASID_NONSECURE_SHIFT) @@ -66,17 +34,13 @@ #define _PDE_VACANT(pdn) (((pdn) << 10) | _PDE_ATTR) #define _PTE_ATTR (_READABLE | _WRITABLE | _NONSECURE) #define _PTE_VACANT(addr) (((addr) >> SMMU_PAGE_SHIFT) | _PTE_ATTR) -#define SMMU_MK_PDIR(page, attr) (((page) >> SMMU_PDIR_SHIFT) | (attr)) -#define SMMU_MK_PDE(page, attr) (((page) >> SMMU_PDE_SHIFT) | (attr)) -void *page_alloc(u32 num); -u32 *smmu_alloc_pdir(); -void smmu_flush_regs(); -void smmu_flush_all(); -void smmu_init(); -void smmu_enable(); -u32 *smmu_init_domain4(u32 dev_base, u32 asid); -u32 *smmu_get_pte(u32 *pdir, u32 iova); -void smmu_map(u32 *pdir, u32 addr, u32 page, int cnt, u32 attr); -u32 *smmu_init_for_tsec(); -void smmu_deinit_for_tsec(); +void *smmu_page_zalloc(u32 num); +void smmu_flush_all(); +void smmu_init(); +void smmu_enable(); +u32 *smmu_init_domain4(u32 dev_base, u32 asid); +u32 *smmu_get_pte(u32 *pdir, u32 iova); +void smmu_map(u32 *pdir, u32 addr, u32 page, int cnt, u32 attr); +u32 *smmu_init_domain(u32 asid); +void smmu_deinit_domain(u32 asid); diff --git a/bdk/memory_map.h b/bdk/memory_map.h index e24d924..c687f2c 100644 --- a/bdk/memory_map.h +++ b/bdk/memory_map.h @@ -50,7 +50,9 @@ /* Stack theoretical max: 33MB */ #define IPL_STACK_TOP 0x83100000 #define IPL_HEAP_START 0x84000000 -#define IPL_HEAP_SZ SZ_512M +#define IPL_HEAP_SZ (SZ_512M - SZ_64M) + +#define SMMU_HEAP_ADDR 0xA0000000 /* --- Gap: 1040MB 0xA4000000 - 0xE4FFFFFF --- */ // Virtual disk / Chainloader buffers. diff --git a/bdk/sec/tsec.c b/bdk/sec/tsec.c index 820a2d3..52f130e 100644 --- a/bdk/sec/tsec.c +++ b/bdk/sec/tsec.c @@ -145,20 +145,20 @@ int tsec_query(void *tsec_keys, tsec_ctxt_t *tsec_ctxt) if (type == TSEC_FW_TYPE_EMU) { // Init SMMU translation for TSEC. - pdir = smmu_init_for_tsec(); + pdir = smmu_init_domain(MC_SMMU_TSEC_ASID); smmu_init(); // Enable SMMU. smmu_enable(); // Clock reset controller. - car = page_alloc(1); + car = smmu_page_zalloc(1); memcpy(car, (void *)CLOCK_BASE, SZ_PAGE); car[CLK_RST_CONTROLLER_CLK_SOURCE_TSEC / 4] = 2; smmu_map(pdir, CLOCK_BASE, (u32)car, 1, _WRITABLE | _READABLE | _NONSECURE); // Fuse driver. - fuse = page_alloc(1); + fuse = smmu_page_zalloc(1); memcpy((void *)&fuse[0x800/4], (void *)FUSE_BASE, SZ_1K); fuse[0x82C / 4] = 0; fuse[0x9E0 / 4] = (1 << (TSEC_HOS_KB_620 + 2)) - 1; @@ -166,34 +166,34 @@ int tsec_query(void *tsec_keys, tsec_ctxt_t *tsec_ctxt) smmu_map(pdir, (FUSE_BASE - 0x800), (u32)fuse, 1, _READABLE | _NONSECURE); // Power management controller. - pmc = page_alloc(1); + pmc = smmu_page_zalloc(1); smmu_map(pdir, RTC_BASE, (u32)pmc, 1, _READABLE | _NONSECURE); // Flow control. - flowctrl = page_alloc(1); + flowctrl = smmu_page_zalloc(1); smmu_map(pdir, FLOW_CTLR_BASE, (u32)flowctrl, 1, _WRITABLE | _NONSECURE); // Security engine. - se = page_alloc(1); + se = smmu_page_zalloc(1); memcpy(se, (void *)SE_BASE, SZ_PAGE); smmu_map(pdir, SE_BASE, (u32)se, 1, _READABLE | _WRITABLE | _NONSECURE); // Memory controller. - mc = page_alloc(1); + mc = smmu_page_zalloc(1); memcpy(mc, (void *)MC_BASE, SZ_PAGE); mc[MC_IRAM_BOM / 4] = 0; mc[MC_IRAM_TOM / 4] = DRAM_START; smmu_map(pdir, MC_BASE, (u32)mc, 1, _READABLE | _NONSECURE); // IRAM - iram = page_alloc(0x30); + iram = smmu_page_zalloc(0x30); memcpy(iram, tsec_ctxt->pkg1, 0x30000); // PKG1.1 magic offset. pkg11_magic_off = (u32 *)(iram + ((tsec_ctxt->pkg11_off + 0x20) / 4)); smmu_map(pdir, 0x40010000, (u32)iram, 0x30, _READABLE | _WRITABLE | _NONSECURE); // Exception vectors - evec = page_alloc(1); + evec = smmu_page_zalloc(1); smmu_map(pdir, EXCP_VEC_BASE, (u32)evec, 1, _READABLE | _WRITABLE | _NONSECURE); } @@ -229,7 +229,7 @@ int tsec_query(void *tsec_keys, tsec_ctxt_t *tsec_ctxt) if (kidx != 8) { res = -6; - smmu_deinit_for_tsec(); + smmu_deinit_domain(MC_SMMU_TSEC_ASID); goto out_free; } @@ -240,7 +240,7 @@ int tsec_query(void *tsec_keys, tsec_ctxt_t *tsec_ctxt) memcpy(tsec_keys, &key, 0x20); memcpy(tsec_ctxt->pkg1, iram, 0x30000); - smmu_deinit_for_tsec(); + smmu_deinit_domain(MC_SMMU_TSEC_ASID); // for (int i = 0; i < kidx; i++) // gfx_printf("key %08X\n", key[i]); diff --git a/bdk/soc/irq.c b/bdk/soc/irq.c index 380cfe1..5ecfb58 100644 --- a/bdk/soc/irq.c +++ b/bdk/soc/irq.c @@ -194,7 +194,7 @@ void irq_wait_event(u32 irq) _irq_enable_source(irq); // Halt BPMP and wait for the IRQ. No need to use WAIT_EVENT + LIC_IRQ when BPMP serves the IRQ. - FLOW_CTLR(FLOW_CTLR_HALT_COP_EVENTS) = HALT_COP_STOP_UNTIL_IRQ; + FLOW_CTLR(FLOW_CTLR_HALT_COP_EVENTS) = HALT_MODE_STOP_UNTIL_IRQ; _irq_disable_source(irq); _irq_ack_source(irq); From cdf0f30b17d412554b9c98d7de871b6ecefc7ee2 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 13 Mar 2024 01:56:31 +0200 Subject: [PATCH 114/308] hekate/nyx: smmu refactor --- bootloader/hos/hos.c | 2 +- nyx/nyx_gui/hos/hos.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/bootloader/hos/hos.c b/bootloader/hos/hos.c index e5ca239..f2f6e62 100644 --- a/bootloader/hos/hos.c +++ b/bootloader/hos/hos.c @@ -392,7 +392,7 @@ int hos_keygen(void *keyblob, u32 kb, tsec_ctxt_t *tsec_ctxt, bool stock, bool i tsec_ctxt->type = TSEC_FW_TYPE_EMU; // Prepare smmu tsec page for 6.2.0. - u8 *tsec_paged = (u8 *)page_alloc(3); + u8 *tsec_paged = (u8 *)smmu_page_zalloc(3); memcpy(tsec_paged, (void *)tsec_ctxt->fw, tsec_ctxt->size); tsec_ctxt->fw = tsec_paged; } diff --git a/nyx/nyx_gui/hos/hos.c b/nyx/nyx_gui/hos/hos.c index 1828e66..4eca1c5 100644 --- a/nyx/nyx_gui/hos/hos.c +++ b/nyx/nyx_gui/hos/hos.c @@ -373,7 +373,7 @@ int hos_keygen(void *keyblob, u32 kb, tsec_ctxt_t *tsec_ctxt) tsec_ctxt->type = TSEC_FW_TYPE_EMU; // Prepare smmu tsec page for 6.2.0. - u8 *tsec_paged = (u8 *)page_alloc(3); + u8 *tsec_paged = (u8 *)smmu_page_zalloc(3); memcpy(tsec_paged, (void *)tsec_ctxt->fw, tsec_ctxt->size); tsec_ctxt->fw = tsec_paged; } From 9ba7c44b89d8b5995c1d6cee79cb072aa6f8be60 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 13 Mar 2024 02:01:01 +0200 Subject: [PATCH 115/308] bdk: clock: use real source clock dividers Use CLK_SRC_DIV macro in order to have the actual divider showing. --- bdk/display/di.c | 6 ++-- bdk/sec/tsec.c | 2 +- bdk/soc/ccplex.c | 2 +- bdk/soc/clock.c | 94 ++++++++++++++++++++++++------------------------ bdk/soc/clock.h | 5 ++- 5 files changed, 56 insertions(+), 53 deletions(-) diff --git a/bdk/display/di.c b/bdk/display/di.c index 5239245..0b3301f 100644 --- a/bdk/display/di.c +++ b/bdk/display/di.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2023 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -398,10 +398,10 @@ void display_init() CLOCK(CLK_RST_CONTROLLER_CLK_ENB_L_SET) = BIT(CLK_L_DISP1); CLOCK(CLK_RST_CONTROLLER_CLK_ENB_X_SET) = BIT(CLK_X_UART_FST_MIPI_CAL); - CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_UART_FST_MIPI_CAL) = 10; // Set PLLP_OUT3 and div 6 (17MHz). + CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_UART_FST_MIPI_CAL) = CLK_SRC_DIV(6); // Set PLLP_OUT3 and div 6 (17MHz). CLOCK(CLK_RST_CONTROLLER_CLK_ENB_W_SET) = BIT(CLK_W_DSIA_LP); - CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_DSIA_LP) = 10; // Set PLLP_OUT and div 6 (68MHz). + CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_DSIA_LP) = CLK_SRC_DIV(6); // Set PLLP_OUT and div 6 (68MHz). // Bring every IO rail out of deep power down. PMC(APBDEV_PMC_IO_DPD_REQ) = PMC_IO_DPD_REQ_DPD_OFF; diff --git a/bdk/sec/tsec.c b/bdk/sec/tsec.c index 52f130e..487076b 100644 --- a/bdk/sec/tsec.c +++ b/bdk/sec/tsec.c @@ -154,7 +154,7 @@ int tsec_query(void *tsec_keys, tsec_ctxt_t *tsec_ctxt) // Clock reset controller. car = smmu_page_zalloc(1); memcpy(car, (void *)CLOCK_BASE, SZ_PAGE); - car[CLK_RST_CONTROLLER_CLK_SOURCE_TSEC / 4] = 2; + car[CLK_RST_CONTROLLER_CLK_SOURCE_TSEC / 4] = CLK_SRC_DIV(2); smmu_map(pdir, CLOCK_BASE, (u32)car, 1, _WRITABLE | _READABLE | _NONSECURE); // Fuse driver. diff --git a/bdk/soc/ccplex.c b/bdk/soc/ccplex.c index d8e315a..c01a892 100644 --- a/bdk/soc/ccplex.c +++ b/bdk/soc/ccplex.c @@ -76,7 +76,7 @@ void ccplex_boot_cpu0(u32 entry, bool lock) clock_enable_pllx(); // Configure MSELECT source and enable clock to 102MHz. - CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_MSELECT) = 6; + CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_MSELECT) = (0 << 29) | CLK_SRC_DIV(4); CLOCK(CLK_RST_CONTROLLER_CLK_ENB_V_SET) = BIT(CLK_V_MSELECT); // Configure initial CPU clock frequency and enable clock. diff --git a/bdk/soc/clock.c b/bdk/soc/clock.c index 22c3486..083a0ed 100644 --- a/bdk/soc/clock.c +++ b/bdk/soc/clock.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2023 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -42,82 +42,82 @@ static const clock_osc_t _clock_osc_cnt[] = { /* clk_rst_t: reset, enable, source, index, clk_src, clk_div */ static const clk_rst_t _clock_uart[] = { - { CLK_RST_CONTROLLER_RST_DEVICES_L, CLK_RST_CONTROLLER_CLK_OUT_ENB_L, CLK_RST_CONTROLLER_CLK_SOURCE_UARTA, CLK_L_UARTA, 0, 2 }, - { CLK_RST_CONTROLLER_RST_DEVICES_L, CLK_RST_CONTROLLER_CLK_OUT_ENB_L, CLK_RST_CONTROLLER_CLK_SOURCE_UARTB, CLK_L_UARTB, 0, 2 }, - { CLK_RST_CONTROLLER_RST_DEVICES_H, CLK_RST_CONTROLLER_CLK_OUT_ENB_H, CLK_RST_CONTROLLER_CLK_SOURCE_UARTC, CLK_H_UARTC, 0, 2 }, - { CLK_RST_CONTROLLER_RST_DEVICES_U, CLK_RST_CONTROLLER_CLK_OUT_ENB_U, CLK_RST_CONTROLLER_CLK_SOURCE_UARTD, CLK_U_UARTD, 0, 2 }, - { CLK_RST_CONTROLLER_RST_DEVICES_Y, CLK_RST_CONTROLLER_CLK_OUT_ENB_Y, CLK_RST_CONTROLLER_CLK_SOURCE_UARTAPE, CLK_Y_UARTAPE, 0, 2 } + { CLK_RST_CONTROLLER_RST_DEVICES_L, CLK_RST_CONTROLLER_CLK_OUT_ENB_L, CLK_RST_CONTROLLER_CLK_SOURCE_UARTA, CLK_L_UARTA, 0, CLK_SRC_DIV(2) }, + { CLK_RST_CONTROLLER_RST_DEVICES_L, CLK_RST_CONTROLLER_CLK_OUT_ENB_L, CLK_RST_CONTROLLER_CLK_SOURCE_UARTB, CLK_L_UARTB, 0, CLK_SRC_DIV(2) }, + { CLK_RST_CONTROLLER_RST_DEVICES_H, CLK_RST_CONTROLLER_CLK_OUT_ENB_H, CLK_RST_CONTROLLER_CLK_SOURCE_UARTC, CLK_H_UARTC, 0, CLK_SRC_DIV(2) }, + { CLK_RST_CONTROLLER_RST_DEVICES_U, CLK_RST_CONTROLLER_CLK_OUT_ENB_U, CLK_RST_CONTROLLER_CLK_SOURCE_UARTD, CLK_U_UARTD, 0, CLK_SRC_DIV(2) }, + { CLK_RST_CONTROLLER_RST_DEVICES_Y, CLK_RST_CONTROLLER_CLK_OUT_ENB_Y, CLK_RST_CONTROLLER_CLK_SOURCE_UARTAPE, CLK_Y_UARTAPE, 0, CLK_SRC_DIV(2) } }; //I2C default parameters - TLOW: 4, THIGH: 2, DEBOUNCE: 0, FM_DIV: 26. static const clk_rst_t _clock_i2c[] = { - { CLK_RST_CONTROLLER_RST_DEVICES_L, CLK_RST_CONTROLLER_CLK_OUT_ENB_L, CLK_RST_CONTROLLER_CLK_SOURCE_I2C1, CLK_L_I2C1, 0, 19 }, //20.4MHz -> 100KHz - { CLK_RST_CONTROLLER_RST_DEVICES_H, CLK_RST_CONTROLLER_CLK_OUT_ENB_H, CLK_RST_CONTROLLER_CLK_SOURCE_I2C2, CLK_H_I2C2, 0, 4 }, //81.6MHz -> 400KHz - { CLK_RST_CONTROLLER_RST_DEVICES_U, CLK_RST_CONTROLLER_CLK_OUT_ENB_U, CLK_RST_CONTROLLER_CLK_SOURCE_I2C3, CLK_U_I2C3, 0, 4 }, //81.6MHz -> 400KHz - { CLK_RST_CONTROLLER_RST_DEVICES_V, CLK_RST_CONTROLLER_CLK_OUT_ENB_V, CLK_RST_CONTROLLER_CLK_SOURCE_I2C4, CLK_V_I2C4, 0, 19 }, //20.4MHz -> 100KHz - { CLK_RST_CONTROLLER_RST_DEVICES_H, CLK_RST_CONTROLLER_CLK_OUT_ENB_H, CLK_RST_CONTROLLER_CLK_SOURCE_I2C5, CLK_H_I2C5, 0, 4 }, //81.6MHz -> 400KHz - { CLK_RST_CONTROLLER_RST_DEVICES_X, CLK_RST_CONTROLLER_CLK_OUT_ENB_X, CLK_RST_CONTROLLER_CLK_SOURCE_I2C6, CLK_X_I2C6, 0, 19 } //20.4MHz -> 100KHz + { CLK_RST_CONTROLLER_RST_DEVICES_L, CLK_RST_CONTROLLER_CLK_OUT_ENB_L, CLK_RST_CONTROLLER_CLK_SOURCE_I2C1, CLK_L_I2C1, 0, CLK_SRC_DIV(10.5) }, //20.4MHz -> 100KHz + { CLK_RST_CONTROLLER_RST_DEVICES_H, CLK_RST_CONTROLLER_CLK_OUT_ENB_H, CLK_RST_CONTROLLER_CLK_SOURCE_I2C2, CLK_H_I2C2, 0, CLK_SRC_DIV(3) }, //81.6MHz -> 400KHz + { CLK_RST_CONTROLLER_RST_DEVICES_U, CLK_RST_CONTROLLER_CLK_OUT_ENB_U, CLK_RST_CONTROLLER_CLK_SOURCE_I2C3, CLK_U_I2C3, 0, CLK_SRC_DIV(3) }, //81.6MHz -> 400KHz + { CLK_RST_CONTROLLER_RST_DEVICES_V, CLK_RST_CONTROLLER_CLK_OUT_ENB_V, CLK_RST_CONTROLLER_CLK_SOURCE_I2C4, CLK_V_I2C4, 0, CLK_SRC_DIV(10.5) }, //20.4MHz -> 100KHz + { CLK_RST_CONTROLLER_RST_DEVICES_H, CLK_RST_CONTROLLER_CLK_OUT_ENB_H, CLK_RST_CONTROLLER_CLK_SOURCE_I2C5, CLK_H_I2C5, 0, CLK_SRC_DIV(3) }, //81.6MHz -> 400KHz + { CLK_RST_CONTROLLER_RST_DEVICES_X, CLK_RST_CONTROLLER_CLK_OUT_ENB_X, CLK_RST_CONTROLLER_CLK_SOURCE_I2C6, CLK_X_I2C6, 0, CLK_SRC_DIV(10.5) } //20.4MHz -> 100KHz }; static clk_rst_t _clock_se = { - CLK_RST_CONTROLLER_RST_DEVICES_V, CLK_RST_CONTROLLER_CLK_OUT_ENB_V, CLK_RST_CONTROLLER_CLK_SOURCE_SE, CLK_V_SE, 0, 0 // 408MHz. Default: 408MHz. Max: 627.2 MHz. + CLK_RST_CONTROLLER_RST_DEVICES_V, CLK_RST_CONTROLLER_CLK_OUT_ENB_V, CLK_RST_CONTROLLER_CLK_SOURCE_SE, CLK_V_SE, 0, CLK_SRC_DIV(1) // 408MHz. Default: 408MHz. Max: 627.2 MHz. }; static clk_rst_t _clock_tzram = { - CLK_RST_CONTROLLER_RST_DEVICES_V, CLK_RST_CONTROLLER_CLK_OUT_ENB_V, CLK_NO_SOURCE, CLK_V_TZRAM, 0, 0 + CLK_RST_CONTROLLER_RST_DEVICES_V, CLK_RST_CONTROLLER_CLK_OUT_ENB_V, CLK_NO_SOURCE, CLK_V_TZRAM, 0, CLK_SRC_DIV(1) }; static clk_rst_t _clock_host1x = { - CLK_RST_CONTROLLER_RST_DEVICES_L, CLK_RST_CONTROLLER_CLK_OUT_ENB_L, CLK_RST_CONTROLLER_CLK_SOURCE_HOST1X, CLK_L_HOST1X, 4, 3 // 163.2MHz. Max: 408MHz. + CLK_RST_CONTROLLER_RST_DEVICES_L, CLK_RST_CONTROLLER_CLK_OUT_ENB_L, CLK_RST_CONTROLLER_CLK_SOURCE_HOST1X, CLK_L_HOST1X, 4, CLK_SRC_DIV(2.5) // 163.2MHz. Max: 408MHz. }; static clk_rst_t _clock_tsec = { - CLK_RST_CONTROLLER_RST_DEVICES_U, CLK_RST_CONTROLLER_CLK_OUT_ENB_U, CLK_RST_CONTROLLER_CLK_SOURCE_TSEC, CLK_U_TSEC, 0, 2 // 204MHz. Max: 408MHz. + CLK_RST_CONTROLLER_RST_DEVICES_U, CLK_RST_CONTROLLER_CLK_OUT_ENB_U, CLK_RST_CONTROLLER_CLK_SOURCE_TSEC, CLK_U_TSEC, 0, CLK_SRC_DIV(2) // 204MHz. Max: 408MHz. }; static clk_rst_t _clock_nvdec = { - CLK_RST_CONTROLLER_RST_DEVICES_Y, CLK_RST_CONTROLLER_CLK_OUT_ENB_Y, CLK_RST_CONTROLLER_CLK_SOURCE_NVDEC, CLK_Y_NVDEC, 4, 0 // 408 MHz. Max: 716.8/979.2MHz. + CLK_RST_CONTROLLER_RST_DEVICES_Y, CLK_RST_CONTROLLER_CLK_OUT_ENB_Y, CLK_RST_CONTROLLER_CLK_SOURCE_NVDEC, CLK_Y_NVDEC, 4, CLK_SRC_DIV(1) // 408 MHz. Max: 716.8/979.2MHz. }; static clk_rst_t _clock_nvjpg = { - CLK_RST_CONTROLLER_RST_DEVICES_Y, CLK_RST_CONTROLLER_CLK_OUT_ENB_Y, CLK_RST_CONTROLLER_CLK_SOURCE_NVJPG, CLK_Y_NVJPG, 4, 0 // 408 MHz. Max: 627.2/652.8MHz. + CLK_RST_CONTROLLER_RST_DEVICES_Y, CLK_RST_CONTROLLER_CLK_OUT_ENB_Y, CLK_RST_CONTROLLER_CLK_SOURCE_NVJPG, CLK_Y_NVJPG, 4, CLK_SRC_DIV(1) // 408 MHz. Max: 627.2/652.8MHz. }; static clk_rst_t _clock_vic = { - CLK_RST_CONTROLLER_RST_DEVICES_X, CLK_RST_CONTROLLER_CLK_OUT_ENB_X, CLK_RST_CONTROLLER_CLK_SOURCE_VIC, CLK_X_VIC, 2, 0 // 408 MHz. Max: 627.2/652.8MHz. + CLK_RST_CONTROLLER_RST_DEVICES_X, CLK_RST_CONTROLLER_CLK_OUT_ENB_X, CLK_RST_CONTROLLER_CLK_SOURCE_VIC, CLK_X_VIC, 2, CLK_SRC_DIV(1) // 408 MHz. Max: 627.2/652.8MHz. }; static clk_rst_t _clock_sor_safe = { - CLK_RST_CONTROLLER_RST_DEVICES_Y, CLK_RST_CONTROLLER_CLK_OUT_ENB_Y, CLK_NO_SOURCE, CLK_Y_SOR_SAFE, 0, 0 + CLK_RST_CONTROLLER_RST_DEVICES_Y, CLK_RST_CONTROLLER_CLK_OUT_ENB_Y, CLK_NO_SOURCE, CLK_Y_SOR_SAFE, 0, CLK_SRC_DIV(1) }; static clk_rst_t _clock_sor0 = { - CLK_RST_CONTROLLER_RST_DEVICES_X, CLK_RST_CONTROLLER_CLK_OUT_ENB_X, CLK_NOT_USED, CLK_X_SOR0, 0, 0 + CLK_RST_CONTROLLER_RST_DEVICES_X, CLK_RST_CONTROLLER_CLK_OUT_ENB_X, CLK_NOT_USED, CLK_X_SOR0, 0, CLK_SRC_DIV(1) }; static clk_rst_t _clock_sor1 = { - CLK_RST_CONTROLLER_RST_DEVICES_X, CLK_RST_CONTROLLER_CLK_OUT_ENB_X, CLK_RST_CONTROLLER_CLK_SOURCE_SOR1, CLK_X_SOR1, 0, 2 // 204MHz. + CLK_RST_CONTROLLER_RST_DEVICES_X, CLK_RST_CONTROLLER_CLK_OUT_ENB_X, CLK_RST_CONTROLLER_CLK_SOURCE_SOR1, CLK_X_SOR1, 0, CLK_SRC_DIV(2) // 204MHz. }; static clk_rst_t _clock_kfuse = { - CLK_RST_CONTROLLER_RST_DEVICES_H, CLK_RST_CONTROLLER_CLK_OUT_ENB_H, CLK_NO_SOURCE, CLK_H_KFUSE, 0, 0 + CLK_RST_CONTROLLER_RST_DEVICES_H, CLK_RST_CONTROLLER_CLK_OUT_ENB_H, CLK_NO_SOURCE, CLK_H_KFUSE, 0, CLK_SRC_DIV(1) }; static clk_rst_t _clock_cl_dvfs = { - CLK_RST_CONTROLLER_RST_DEVICES_W, CLK_RST_CONTROLLER_CLK_OUT_ENB_W, CLK_NO_SOURCE, CLK_W_DVFS, 0, 0 + CLK_RST_CONTROLLER_RST_DEVICES_W, CLK_RST_CONTROLLER_CLK_OUT_ENB_W, CLK_NO_SOURCE, CLK_W_DVFS, 0, CLK_SRC_DIV(1) }; static clk_rst_t _clock_coresight = { - CLK_RST_CONTROLLER_RST_DEVICES_U, CLK_RST_CONTROLLER_CLK_OUT_ENB_U, CLK_RST_CONTROLLER_CLK_SOURCE_CSITE, CLK_U_CSITE, 0, 4 // 136MHz. + CLK_RST_CONTROLLER_RST_DEVICES_U, CLK_RST_CONTROLLER_CLK_OUT_ENB_U, CLK_RST_CONTROLLER_CLK_SOURCE_CSITE, CLK_U_CSITE, 0, CLK_SRC_DIV(3) // 136MHz. }; static clk_rst_t _clock_pwm = { - CLK_RST_CONTROLLER_RST_DEVICES_L, CLK_RST_CONTROLLER_CLK_OUT_ENB_L, CLK_RST_CONTROLLER_CLK_SOURCE_PWM, CLK_L_PWM, 6, 4 // Fref: 6.4MHz. HOS: PLLP / 54 = 7.55MHz. + CLK_RST_CONTROLLER_RST_DEVICES_L, CLK_RST_CONTROLLER_CLK_OUT_ENB_L, CLK_RST_CONTROLLER_CLK_SOURCE_PWM, CLK_L_PWM, 6, CLK_SRC_DIV(3) // Fref: 6.4MHz. HOS: PLLP / 54 = 7.55MHz. }; static clk_rst_t _clock_sdmmc_legacy_tm = { - CLK_RST_CONTROLLER_RST_DEVICES_Y, CLK_RST_CONTROLLER_CLK_OUT_ENB_Y, CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC_LEGACY_TM, CLK_Y_SDMMC_LEGACY_TM, 4, 66 + CLK_RST_CONTROLLER_RST_DEVICES_Y, CLK_RST_CONTROLLER_CLK_OUT_ENB_Y, CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC_LEGACY_TM, CLK_Y_SDMMC_LEGACY_TM, 4, CLK_SRC_DIV(34) // 12MHz. }; static clk_rst_t _clock_apbdma = { - CLK_RST_CONTROLLER_RST_DEVICES_H, CLK_RST_CONTROLLER_CLK_OUT_ENB_H, CLK_NO_SOURCE, CLK_H_APBDMA, 0, 0 // Max: 204MHz. + CLK_RST_CONTROLLER_RST_DEVICES_H, CLK_RST_CONTROLLER_CLK_OUT_ENB_H, CLK_NO_SOURCE, CLK_H_APBDMA, 0, CLK_SRC_DIV(1) // Max: 204MHz. }; static clk_rst_t _clock_ahbdma = { - CLK_RST_CONTROLLER_RST_DEVICES_H, CLK_RST_CONTROLLER_CLK_OUT_ENB_H, CLK_NO_SOURCE, CLK_H_AHBDMA, 0, 0 + CLK_RST_CONTROLLER_RST_DEVICES_H, CLK_RST_CONTROLLER_CLK_OUT_ENB_H, CLK_NO_SOURCE, CLK_H_AHBDMA, 0, CLK_SRC_DIV(1) }; static clk_rst_t _clock_actmon = { - CLK_RST_CONTROLLER_RST_DEVICES_V, CLK_RST_CONTROLLER_CLK_OUT_ENB_V, CLK_RST_CONTROLLER_CLK_SOURCE_ACTMON, CLK_V_ACTMON, 6, 0 // 19.2MHz. + CLK_RST_CONTROLLER_RST_DEVICES_V, CLK_RST_CONTROLLER_CLK_OUT_ENB_V, CLK_RST_CONTROLLER_CLK_SOURCE_ACTMON, CLK_V_ACTMON, 6, CLK_SRC_DIV(1) // 19.2MHz. }; static clk_rst_t _clock_extperiph1 = { - CLK_RST_CONTROLLER_RST_DEVICES_V, CLK_RST_CONTROLLER_CLK_OUT_ENB_V, CLK_RST_CONTROLLER_CLK_SOURCE_EXTPERIPH1, CLK_V_EXTPERIPH1, 0, 0 + CLK_RST_CONTROLLER_RST_DEVICES_V, CLK_RST_CONTROLLER_CLK_OUT_ENB_V, CLK_RST_CONTROLLER_CLK_SOURCE_EXTPERIPH1, CLK_V_EXTPERIPH1, 0, CLK_SRC_DIV(1) }; static clk_rst_t _clock_extperiph2 = { - CLK_RST_CONTROLLER_RST_DEVICES_V, CLK_RST_CONTROLLER_CLK_OUT_ENB_V, CLK_RST_CONTROLLER_CLK_SOURCE_EXTPERIPH2, CLK_V_EXTPERIPH2, 2, 202 // 4.0MHz + CLK_RST_CONTROLLER_RST_DEVICES_V, CLK_RST_CONTROLLER_CLK_OUT_ENB_V, CLK_RST_CONTROLLER_CLK_SOURCE_EXTPERIPH2, CLK_V_EXTPERIPH2, 2, CLK_SRC_DIV(102) // 4.0MHz }; void clock_enable(const clk_rst_t *clk) @@ -128,7 +128,7 @@ void clock_enable(const clk_rst_t *clk) CLOCK(clk->enable) &= ~BIT(clk->index); // Configure clock source if required. if (clk->source) - CLOCK(clk->source) = clk->clk_div | (clk->clk_src << 29); + CLOCK(clk->source) = clk->clk_div | (clk->clk_src << 29u); // Enable. CLOCK(clk->enable) = (CLOCK(clk->enable) & ~BIT(clk->index)) | BIT(clk->index); usleep(2); @@ -168,12 +168,12 @@ int clock_uart_use_src_div(u32 idx, u32 baud) u32 clk_src_div = CLOCK(_clock_uart[idx].source) & 0xE0000000; if (baud == 3000000) - CLOCK(_clock_uart[idx].source) = clk_src_div | UART_SRC_CLK_DIV_EN | 15; + CLOCK(_clock_uart[idx].source) = clk_src_div | UART_SRC_CLK_DIV_EN | CLK_SRC_DIV(8.5); else if (baud == 1000000) - CLOCK(_clock_uart[idx].source) = clk_src_div | UART_SRC_CLK_DIV_EN | 49; + CLOCK(_clock_uart[idx].source) = clk_src_div | UART_SRC_CLK_DIV_EN | CLK_SRC_DIV(25.5); else { - CLOCK(_clock_uart[idx].source) = clk_src_div | 2; + CLOCK(_clock_uart[idx].source) = clk_src_div | CLK_SRC_DIV(2); return 1; } @@ -401,7 +401,7 @@ void clock_enable_plld(u32 divp, u32 divn, bool lowpower, bool tegra_t210) // Set DISP1 clock source and parent clock. if (lowpower) - CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_DISP1) = 0x40000000; // PLLD_OUT0. + CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_DISP1) = (2 << 29u) | CLK_SRC_DIV(1); // PLLD_OUT0. // Set dividers and enable PLLD. CLOCK(CLK_RST_CONTROLLER_PLLD_BASE) = PLLCX_BASE_ENABLE | PLLCX_BASE_LOCK | plld_div; @@ -715,38 +715,38 @@ static int _clock_sdmmc_config_clock_host(u32 *pclock, u32 id, u32 val) { case 25000: *pclock = 24728; - divisor = 31; // 16.5 div. + divisor = CLK_SRC_DIV(16.5); break; case 26000: *pclock = 25500; - divisor = 30; // 16 div. + divisor = CLK_SRC_DIV(16); break; case 50000: *pclock = 48000; - divisor = 15; // 8.5 div. + divisor = CLK_SRC_DIV(8.5); break; case 52000: *pclock = 51000; - divisor = 14; // 8 div. + divisor = CLK_SRC_DIV(8); break; case 82000: *pclock = 81600; - divisor = 8; // 5 div. + divisor = CLK_SRC_DIV(5); break; case 100000: source = SDMMC_CLOCK_SRC_PLLC4_OUT2; *pclock = 99840; - divisor = 2; // 2 div. + divisor = CLK_SRC_DIV(2); break; case 164000: *pclock = 163200; - divisor = 3; // 2.5 div. + divisor = CLK_SRC_DIV(2.5); break; case 200000: @@ -762,14 +762,14 @@ static int _clock_sdmmc_config_clock_host(u32 *pclock, u32 id, u32 val) break; } *pclock = 199680; - divisor = 0; // 1 div. + divisor = CLK_SRC_DIV(1); break; #ifdef BDK_SDMMC_UHS_DDR200_SUPPORT case 400000: source = SDMMC_CLOCK_SRC_PLLC4_OUT0; *pclock = 399360; - divisor = 3; // 2.5 div + divisor = CLK_SRC_DIV(2.5); break; #endif } @@ -785,7 +785,7 @@ static int _clock_sdmmc_config_clock_host(u32 *pclock, u32 id, u32 val) _clock_sdmmc_config_legacy_tm(); // Set SDMMC clock. - u32 src_div = (source << 29) | divisor; + u32 src_div = (source << 29u) | divisor; switch (id) { case SDMMC_1: diff --git a/bdk/soc/clock.h b/bdk/soc/clock.h index 54818f7..0e91836 100644 --- a/bdk/soc/clock.h +++ b/bdk/soc/clock.h @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2022 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -198,6 +198,9 @@ #define UTMIPLL_LOCK BIT(31) +/*! Clock source */ +#define CLK_SRC_DIV(d) ((d) ? ((u32)(((d) - 1) * 2)) : 0) + /*! PTO_CLK_CNT */ #define PTO_REF_CLK_WIN_CFG_MASK 0xF #define PTO_REF_CLK_WIN_CFG_16P 0xF From 0100c11757c8eaa79b911dab7a2536f0d1e70f29 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 13 Mar 2024 02:02:09 +0200 Subject: [PATCH 116/308] nyx: info: show unknown for relevant eMMC vendors --- nyx/nyx_gui/frontend/gui_info.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index 86e4b64..23d479d 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -1619,6 +1619,9 @@ static lv_res_t _create_window_emmc_info_status(lv_obj_t *btn) case 0x90: strcat(txt_buf, "SK Hynix "); break; + default: + strcat(txt_buf, "Unknown "); + break; } s_printf(txt_buf + strlen(txt_buf), "(%02X)\n%c%c%c%c%c%c\n%d.%d\n%04X\n%02d/%04d\n\n", From 9e41aa7759fc1741280d90cf6b5940ced69213e8 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 14 Mar 2024 09:21:06 +0200 Subject: [PATCH 117/308] bdk: smmu: refactor and update driver - Allow ASID to be configured - Allow 34-bit PAs - Use special type for setting PDE/PTE config - Initialize all pages as non accessible - Add function for mapping 4MB regions directly - Add SMMU heap reset function - Correct address load OP to 32-bit and remove alignment on SMMU enable payload - Refactor all defines --- bdk/mem/smmu.c | 205 +++++++++++++++++++++++++++++++++---------------- bdk/mem/smmu.h | 63 ++++++++++----- bdk/sec/tsec.c | 27 +++---- 3 files changed, 197 insertions(+), 98 deletions(-) diff --git a/bdk/mem/smmu.c b/bdk/mem/smmu.c index 0128103..65b85aa 100644 --- a/bdk/mem/smmu.c +++ b/bdk/mem/smmu.c @@ -18,6 +18,7 @@ #include +#include #include #include #include @@ -25,27 +26,39 @@ #include #include -#define SMMU_PAGE_SHIFT 12 -#define SMMU_PAGE_SIZE (1 << SMMU_PAGE_SHIFT) +/*! SMMU register defines */ +#define SMMU_ASID(asid) (((asid) << 24u) | ((asid) << 16u) | ((asid) << 8u) | (asid)) +#define SMMU_ENABLE BIT(31) +#define SMMU_TLB_ACTIVE_LINES(l) ((l) << 0u) +#define SMMU_TLB_RR_ARBITRATION BIT(28) +#define SMMU_TLB_HIT_UNDER_MISS BIT(29) +#define SMMU_TLB_STATS_ENABLE BIT(31) +#define SMUU_PTC_INDEX_MAP(m) ((m) << 0u) +#define SMUU_PTC_LINE_MASK(m) ((m) << 8u) +#define SMUU_PTC_REQ_LIMIT(l) ((l) << 24u) +#define SMUU_PTC_CACHE_ENABLE BIT(29) +#define SMUU_PTC_STATS_ENABLE BIT(31) + +/*! Page table defines */ +#define SMMU_4MB_REGION 0 +#define SMMU_PAGE_TABLE 1 #define SMMU_PDIR_COUNT 1024 -#define SMMU_PDIR_SIZE (sizeof(u32) * SMMU_PDIR_COUNT) #define SMMU_PTBL_COUNT 1024 -#define SMMU_PTBL_SIZE (sizeof(u32) * SMMU_PTBL_COUNT) -#define SMMU_PDIR_SHIFT 12 -#define SMMU_PDE_SHIFT 12 -#define SMMU_PTE_SHIFT 12 -#define SMMU_PFN_MASK 0x000FFFFF -#define SMMU_ADDR_TO_PFN(addr) ((addr) >> 12) -#define SMMU_ADDR_TO_PDN(addr) ((addr) >> 22) -#define SMMU_PDN_TO_ADDR(addr) ((pdn) << 22) -#define SMMU_MK_PDIR(page, attr) (((page) >> SMMU_PDIR_SHIFT) | (attr)) -#define SMMU_MK_PDE(page, attr) (((page) >> SMMU_PDE_SHIFT) | (attr)) +#define SMMU_PAGE_SHIFT 12u +#define SMMU_PTN_SHIFT SMMU_PAGE_SHIFT +#define SMMU_PDN_SHIFT 22u +#define SMMU_ADDR_TO_PFN(addr) ((addr) >> SMMU_PAGE_SHIFT) +#define SMMU_ADDR_TO_PTN(addr) ((addr) >> SMMU_PTN_SHIFT) +#define SMMU_ADDR_TO_PDN(addr) ((addr) >> SMMU_PDN_SHIFT) +#define SMMU_PTN_TO_ADDR(ptn) ((ptn) << SMMU_PTN_SHIFT) +#define SMMU_PDN_TO_ADDR(pdn) ((pdn) << SMMU_PDN_SHIFT) +#define SMMU_PTB(page, attr) (((attr) << 29u) | ((page) >> SMMU_PAGE_SHIFT)) -u8 *_pageheap = (u8 *)SMMU_HEAP_ADDR; +static void *smmu_heap = (void *)SMMU_HEAP_ADDR; -// Enabling SMMU requires a TZ secure write: MC(MC_SMMU_CONFIG) = 1; -u8 smmu_payload[] __attribute__((aligned(16))) = { - 0xC1, 0x00, 0x00, 0x58, // 0x00: LDR X1, =0x70019010 +// Enabling SMMU requires a TZ (EL3) secure write. MC(MC_SMMU_CONFIG) = 1; +static const u8 smmu_enable_payload[] = { + 0xC1, 0x00, 0x00, 0x18, // 0x00: LDR W1, =0x70019010 0x20, 0x00, 0x80, 0xD2, // 0x04: MOV X0, #0x1 0x20, 0x00, 0x00, 0xB9, // 0x08: STR W0, [X1] 0x1F, 0x71, 0x08, 0xD5, // 0x0C: IC IALLUIS @@ -56,17 +69,22 @@ u8 smmu_payload[] __attribute__((aligned(16))) = { void *smmu_page_zalloc(u32 num) { - u8 *res = _pageheap; - _pageheap += SZ_PAGE * num; - memset(res, 0, SZ_PAGE * num); - return res; + void *page = smmu_heap; + memset(page, 0, SZ_PAGE * num); + + smmu_heap += SZ_PAGE * num; + + return page; } -static u32 *_smmu_pdir_alloc() +static pde_t *_smmu_pdir_alloc() { - u32 *pdir = (u32 *)smmu_page_zalloc(1); - for (int pdn = 0; pdn < SMMU_PDIR_COUNT; pdn++) - pdir[pdn] = _PDE_VACANT(pdn); + pde_t *pdir = (pde_t *)smmu_page_zalloc(1); + + // Initialize pdes with no permissions. + for (u32 pdn = 0; pdn < SMMU_PDIR_COUNT; pdn++) + pdir[pdn].huge.page = pdn; + return pdir; } @@ -77,9 +95,12 @@ static void _smmu_flush_regs() void smmu_flush_all() { + + // Flush the entire page table cache. MC(MC_SMMU_PTC_FLUSH) = 0; _smmu_flush_regs(); + // Flush the entire table. MC(MC_SMMU_TLB_FLUSH) = 0; _smmu_flush_regs(); } @@ -88,8 +109,8 @@ void smmu_init() { MC(MC_SMMU_PTB_ASID) = 0; MC(MC_SMMU_PTB_DATA) = 0; - MC(MC_SMMU_TLB_CONFIG) = 0x30000030; - MC(MC_SMMU_PTC_CONFIG) = 0x28000F3F; + MC(MC_SMMU_TLB_CONFIG) = SMMU_TLB_HIT_UNDER_MISS | SMMU_TLB_RR_ARBITRATION | SMMU_TLB_ACTIVE_LINES(48); + MC(MC_SMMU_PTC_CONFIG) = SMUU_PTC_CACHE_ENABLE | SMUU_PTC_REQ_LIMIT(8) | SMUU_PTC_LINE_MASK(0xF) | SMUU_PTC_INDEX_MAP(0x3F); MC(MC_SMMU_PTC_FLUSH) = 0; MC(MC_SMMU_TLB_FLUSH) = 0; } @@ -101,7 +122,8 @@ void smmu_enable() if (enabled) return; - ccplex_boot_cpu0((u32)smmu_payload, false); + // Launch payload on CCPLEX in order to set SMMU enable bit. + ccplex_boot_cpu0((u32)smmu_enable_payload, false); msleep(100); ccplex_powergate_cpu0(); @@ -110,63 +132,114 @@ void smmu_enable() enabled = true; } -u32 *smmu_init_domain4(u32 dev_base, u32 asid) +void smmu_reset_heap() { - u32 *pdir = _smmu_pdir_alloc(); - - MC(MC_SMMU_PTB_ASID) = asid; - MC(MC_SMMU_PTB_DATA) = SMMU_MK_PDIR((u32)pdir, _PDIR_ATTR); - _smmu_flush_regs(); - - MC(dev_base) = 0x80000000 | (asid << 24) | (asid << 16) | (asid << 8) | (asid); - _smmu_flush_regs(); - - return pdir; + smmu_heap = (void *)SMMU_HEAP_ADDR; } -u32 *smmu_get_pte(u32 *pdir, u32 iova) +void *smmu_init_domain(u32 dev_base, u32 asid) { - u32 ptn = SMMU_ADDR_TO_PFN(iova); - u32 pdn = SMMU_ADDR_TO_PDN(iova); - u32 *ptbl; + void *ptb = _smmu_pdir_alloc(); - if (pdir[pdn] != _PDE_VACANT(pdn)) - ptbl = (u32 *)((pdir[pdn] & SMMU_PFN_MASK) << SMMU_PDIR_SHIFT); + MC(MC_SMMU_PTB_ASID) = asid; + MC(MC_SMMU_PTB_DATA) = SMMU_PTB((u32)ptb, SMMU_ATTR_ALL); + _smmu_flush_regs(); + + // Use the same macro for both quad and single domains. Reserved bits are not set anyway. + MC(dev_base) = SMMU_ENABLE | SMMU_ASID(asid); + _smmu_flush_regs(); + + return ptb; +} + +void smmu_deinit_domain(u32 dev_base, u32 asid) +{ + MC(MC_SMMU_PTB_ASID) = asid; + MC(MC_SMMU_PTB_DATA) = 0; + MC(dev_base) = 0; + _smmu_flush_regs(); +} + +void smmu_domain_bypass(u32 dev_base, bool bypass) +{ + if (bypass) + { + smmu_flush_all(); + bpmp_mmu_maintenance(BPMP_MMU_MAINT_CLN_INV_WAY, false); + MC(dev_base) &= ~SMMU_ENABLE; + } else { - ptbl = (u32 *)smmu_page_zalloc(1); + bpmp_mmu_maintenance(BPMP_MMU_MAINT_CLN_INV_WAY, false); + MC(dev_base) |= SMMU_ENABLE; + smmu_flush_all(); + } + _smmu_flush_regs(); +} + +static pte_t *_smmu_get_pte(pde_t *pdir, u32 iova) +{ + u32 pdn = SMMU_ADDR_TO_PDN(iova); + pte_t *ptbl; + + // Get 4MB page table or initialize one. + if (pdir[pdn].tbl.attr) + ptbl = (pte_t *)(SMMU_PTN_TO_ADDR(pdir[pdn].tbl.table)); + else + { + // Allocate page table. + ptbl = (pte_t *)smmu_page_zalloc(1); + + // Get address. u32 addr = SMMU_PDN_TO_ADDR(pdn); - for (int pn = 0; pn < SMMU_PTBL_COUNT; pn++, addr += SMMU_PAGE_SIZE) - ptbl[pn] = _PTE_VACANT(addr); - pdir[pdn] = SMMU_MK_PDE((u32)ptbl, _PDE_ATTR | _PDE_NEXT); + + // Initialize page table with no permissions. + for (u32 pn = 0; pn < SMMU_PTBL_COUNT; pn++, addr += SZ_PAGE) + ptbl[pn].page = SMMU_ADDR_TO_PFN(addr); + + // Set page table to the page directory. + pdir[pdn].tbl.table = SMMU_ADDR_TO_PTN((u32)ptbl); + pdir[pdn].tbl.next = SMMU_PAGE_TABLE; + pdir[pdn].tbl.attr = SMMU_ATTR_ALL; + smmu_flush_all(); } - return &ptbl[ptn % SMMU_PTBL_COUNT]; + return &ptbl[SMMU_ADDR_TO_PTN(iova) % SMMU_PTBL_COUNT]; } -void smmu_map(u32 *pdir, u32 addr, u32 page, int cnt, u32 attr) +void smmu_map(void *ptb, u32 iova, u64 iopa, u32 pages, u32 attr) { - for (int i = 0; i < cnt; i++) + // Map pages to page table entries. VA/PA should be aligned to 4KB. + for (u32 i = 0; i < pages; i++) { - u32 *pte = smmu_get_pte(pdir, addr); - *pte = SMMU_ADDR_TO_PFN(page) | attr; - addr += SZ_PAGE; - page += SZ_PAGE; + pte_t *pte = _smmu_get_pte((pde_t *)ptb, iova); + + pte->page = SMMU_ADDR_TO_PFN(iopa); + pte->attr = attr; + + iova += SZ_PAGE; + iopa += SZ_PAGE; } + smmu_flush_all(); } -u32 *smmu_init_domain(u32 asid) +void smmu_map_huge(void *ptb, u32 iova, u64 iopa, u32 regions, u32 attr) { - return smmu_init_domain4(asid, 1); -} + pde_t *pdir = (pde_t *)ptb; -void smmu_deinit_domain(u32 asid) -{ - MC(MC_SMMU_PTB_ASID) = 1; - MC(MC_SMMU_PTB_DATA) = 0; - MC(asid) = 0; - _smmu_flush_regs(); -} + // Map 4MB regions to page directory entries. VA/PA should be aligned to 4MB. + for (u32 i = 0; i < regions; i++) + { + u32 pdn = SMMU_ADDR_TO_PDN(iova); + pdir[pdn].huge.page = SMMU_ADDR_TO_PDN(iopa); + pdir[pdn].huge.next = SMMU_4MB_REGION; + pdir[pdn].huge.attr = attr; + iova += SZ_4M; + iopa += SZ_4M; + } + + smmu_flush_all(); +} diff --git a/bdk/mem/smmu.h b/bdk/mem/smmu.h index c0c765c..e45a672 100644 --- a/bdk/mem/smmu.h +++ b/bdk/mem/smmu.h @@ -15,32 +15,57 @@ * along with this program. If not, see . */ +#include + #include #define MC_SMMU_AVPC_ASID 0x23C #define MC_SMMU_TSEC_ASID 0x294 -#define SMMU_PDE_NEXT_SHIFT 28 -#define MC_SMMU_PTB_DATA_0_ASID_NONSECURE_SHIFT 29 -#define MC_SMMU_PTB_DATA_0_ASID_WRITABLE_SHIFT 30 -#define MC_SMMU_PTB_DATA_0_ASID_READABLE_SHIFT 31 -#define _READABLE (1 << MC_SMMU_PTB_DATA_0_ASID_READABLE_SHIFT) -#define _WRITABLE (1 << MC_SMMU_PTB_DATA_0_ASID_WRITABLE_SHIFT) -#define _NONSECURE (1 << MC_SMMU_PTB_DATA_0_ASID_NONSECURE_SHIFT) -#define _PDE_NEXT (1 << SMMU_PDE_NEXT_SHIFT) -#define _MASK_ATTR (_READABLE | _WRITABLE | _NONSECURE) -#define _PDIR_ATTR (_READABLE | _WRITABLE | _NONSECURE) -#define _PDE_ATTR (_READABLE | _WRITABLE | _NONSECURE) -#define _PDE_VACANT(pdn) (((pdn) << 10) | _PDE_ATTR) -#define _PTE_ATTR (_READABLE | _WRITABLE | _NONSECURE) -#define _PTE_VACANT(addr) (((addr) >> SMMU_PAGE_SHIFT) | _PTE_ATTR) +#define SMMU_NS BIT(0) +#define SMMU_WRITE BIT(1) +#define SMMU_READ BIT(2) +#define SMMU_ATTR_ALL (SMMU_READ | SMMU_WRITE | SMMU_NS) + +typedef struct _pde_t { + union { + union { + struct { + u32 table:22; + u32 rsvd:6; + u32 next:1; + u32 attr:3; + } tbl; + + struct { + u32 rsvd_:10; + u32 page:12; + u32 rsvd:6; + u32 next:1; + u32 attr:3; + } huge; + }; + + u32 pde; + }; +} pde_t; + +typedef struct _pte_t { + u32 page:22; + u32 rsvd:7; + u32 attr:3; +} pte_t; + +static_assert(sizeof(pde_t) == sizeof(u32), "pde_t size is wrong!"); +static_assert(sizeof(pte_t) == sizeof(u32), "pte_t size is wrong!"); void *smmu_page_zalloc(u32 num); void smmu_flush_all(); void smmu_init(); void smmu_enable(); -u32 *smmu_init_domain4(u32 dev_base, u32 asid); -u32 *smmu_get_pte(u32 *pdir, u32 iova); -void smmu_map(u32 *pdir, u32 addr, u32 page, int cnt, u32 attr); -u32 *smmu_init_domain(u32 asid); -void smmu_deinit_domain(u32 asid); +void smmu_reset_heap(); +void *smmu_init_domain(u32 dev_base, u32 asid); +void smmu_deinit_domain(u32 dev_base, u32 asid); +void smmu_domain_bypass(u32 dev_base, bool bypass); +void smmu_map(void *ptb, u32 iova, u64 iopa, u32 pages, u32 attr); +void smmu_map_huge(void *ptb, u32 iova, u64 iopa, u32 regions, u32 attr); diff --git a/bdk/sec/tsec.c b/bdk/sec/tsec.c index 487076b..687af40 100644 --- a/bdk/sec/tsec.c +++ b/bdk/sec/tsec.c @@ -70,8 +70,9 @@ int tsec_query(void *tsec_keys, tsec_ctxt_t *tsec_ctxt) int res = 0; u8 *fwbuf = NULL; u32 type = tsec_ctxt->type; - u32 *pdir, *car, *fuse, *pmc, *flowctrl, *se, *mc, *iram, *evec; + u32 *car, *fuse, *pmc, *flowctrl, *se, *mc, *iram, *evec; u32 *pkg11_magic_off; + void *ptb; bpmp_mmu_disable(); bpmp_freq_t prev_fid = bpmp_clk_rate_set(BPMP_CLK_NORMAL); @@ -145,7 +146,7 @@ int tsec_query(void *tsec_keys, tsec_ctxt_t *tsec_ctxt) if (type == TSEC_FW_TYPE_EMU) { // Init SMMU translation for TSEC. - pdir = smmu_init_domain(MC_SMMU_TSEC_ASID); + ptb = smmu_init_domain(MC_SMMU_TSEC_ASID, 1); smmu_init(); // Enable SMMU. @@ -155,7 +156,7 @@ int tsec_query(void *tsec_keys, tsec_ctxt_t *tsec_ctxt) car = smmu_page_zalloc(1); memcpy(car, (void *)CLOCK_BASE, SZ_PAGE); car[CLK_RST_CONTROLLER_CLK_SOURCE_TSEC / 4] = CLK_SRC_DIV(2); - smmu_map(pdir, CLOCK_BASE, (u32)car, 1, _WRITABLE | _READABLE | _NONSECURE); + smmu_map(ptb, CLOCK_BASE, (u32)car, 1, SMMU_WRITE | SMMU_READ | SMMU_NS); // Fuse driver. fuse = smmu_page_zalloc(1); @@ -163,38 +164,38 @@ int tsec_query(void *tsec_keys, tsec_ctxt_t *tsec_ctxt) fuse[0x82C / 4] = 0; fuse[0x9E0 / 4] = (1 << (TSEC_HOS_KB_620 + 2)) - 1; fuse[0x9E4 / 4] = (1 << (TSEC_HOS_KB_620 + 2)) - 1; - smmu_map(pdir, (FUSE_BASE - 0x800), (u32)fuse, 1, _READABLE | _NONSECURE); + smmu_map(ptb, (FUSE_BASE - 0x800), (u32)fuse, 1, SMMU_READ | SMMU_NS); // Power management controller. pmc = smmu_page_zalloc(1); - smmu_map(pdir, RTC_BASE, (u32)pmc, 1, _READABLE | _NONSECURE); + smmu_map(ptb, RTC_BASE, (u32)pmc, 1, SMMU_READ | SMMU_NS); // Flow control. flowctrl = smmu_page_zalloc(1); - smmu_map(pdir, FLOW_CTLR_BASE, (u32)flowctrl, 1, _WRITABLE | _NONSECURE); + smmu_map(ptb, FLOW_CTLR_BASE, (u32)flowctrl, 1, SMMU_WRITE | SMMU_NS); // Security engine. se = smmu_page_zalloc(1); memcpy(se, (void *)SE_BASE, SZ_PAGE); - smmu_map(pdir, SE_BASE, (u32)se, 1, _READABLE | _WRITABLE | _NONSECURE); + smmu_map(ptb, SE_BASE, (u32)se, 1, SMMU_READ | SMMU_WRITE | SMMU_NS); // Memory controller. mc = smmu_page_zalloc(1); memcpy(mc, (void *)MC_BASE, SZ_PAGE); mc[MC_IRAM_BOM / 4] = 0; mc[MC_IRAM_TOM / 4] = DRAM_START; - smmu_map(pdir, MC_BASE, (u32)mc, 1, _READABLE | _NONSECURE); + smmu_map(ptb, MC_BASE, (u32)mc, 1, SMMU_READ | SMMU_NS); // IRAM iram = smmu_page_zalloc(0x30); memcpy(iram, tsec_ctxt->pkg1, 0x30000); // PKG1.1 magic offset. - pkg11_magic_off = (u32 *)(iram + ((tsec_ctxt->pkg11_off + 0x20) / 4)); - smmu_map(pdir, 0x40010000, (u32)iram, 0x30, _READABLE | _WRITABLE | _NONSECURE); + pkg11_magic_off = (u32 *)(iram + ((tsec_ctxt->pkg11_off + 0x20) / sizeof(u32))); + smmu_map(ptb, 0x40010000, (u32)iram, 0x30, SMMU_READ | SMMU_WRITE | SMMU_NS); // Exception vectors evec = smmu_page_zalloc(1); - smmu_map(pdir, EXCP_VEC_BASE, (u32)evec, 1, _READABLE | _WRITABLE | _NONSECURE); + smmu_map(ptb, EXCP_VEC_BASE, (u32)evec, 1, SMMU_READ | SMMU_WRITE | SMMU_NS); } // Execute firmware. @@ -229,7 +230,7 @@ int tsec_query(void *tsec_keys, tsec_ctxt_t *tsec_ctxt) if (kidx != 8) { res = -6; - smmu_deinit_domain(MC_SMMU_TSEC_ASID); + smmu_deinit_domain(MC_SMMU_TSEC_ASID, 1); goto out_free; } @@ -240,7 +241,7 @@ int tsec_query(void *tsec_keys, tsec_ctxt_t *tsec_ctxt) memcpy(tsec_keys, &key, 0x20); memcpy(tsec_ctxt->pkg1, iram, 0x30000); - smmu_deinit_domain(MC_SMMU_TSEC_ASID); + smmu_deinit_domain(MC_SMMU_TSEC_ASID, 1); // for (int i = 0; i < kidx; i++) // gfx_printf("key %08X\n", key[i]); From d687b53249f4c2ec23a2be922760d169fbb9095e Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 27 Mar 2024 09:00:53 +0200 Subject: [PATCH 118/308] bdk: heap: add zalloc and utilize it --- bdk/libs/compr/lz4.c | 2 +- bdk/mem/heap.c | 9 ++++++++- bdk/mem/heap.h | 3 ++- bdk/sec/se.c | 8 ++++---- bdk/storage/emmc.c | 6 +++--- bdk/utils/dirlist.c | 6 +++--- bdk/utils/ini.c | 6 +++--- bdk/utils/util.c | 2 +- 8 files changed, 25 insertions(+), 17 deletions(-) diff --git a/bdk/libs/compr/lz4.c b/bdk/libs/compr/lz4.c index 4f6f425..689c4d1 100644 --- a/bdk/libs/compr/lz4.c +++ b/bdk/libs/compr/lz4.c @@ -107,7 +107,7 @@ **************************************/ #include /* malloc, calloc, free */ #define ALLOC(s) malloc(s) -#define ALLOC_AND_ZERO(s) calloc(1,s) +#define ALLOC_AND_ZERO(s) zalloc(s) #define FREEMEM free #include /* memset, memcpy */ #define MEM_INIT memset diff --git a/bdk/mem/heap.c b/bdk/mem/heap.c index 9c5b406..ad70729 100644 --- a/bdk/mem/heap.c +++ b/bdk/mem/heap.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2020 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -159,6 +159,13 @@ void *calloc(u32 num, u32 size) return res; } +void *zalloc(u32 size) +{ + void *res = (void *)_heap_alloc(size); + memset(res, 0, ALIGN(size, sizeof(hnode_t))); // Clear the aligned size. + return res; +} + void free(void *buf) { if (buf >= _heap.start) diff --git a/bdk/mem/heap.h b/bdk/mem/heap.h index 9150104..c898ee0 100644 --- a/bdk/mem/heap.h +++ b/bdk/mem/heap.h @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2020 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -48,6 +48,7 @@ void heap_init(void *base); void heap_set(heap_t *heap); void *malloc(u32 size); void *calloc(u32 num, u32 size); +void *zalloc(u32 size); void free(void *buf); void heap_monitor(heap_monitor_t *mon, bool print_node_stats); diff --git a/bdk/sec/se.c b/bdk/sec/se.c index c0f5406..b6a2841 100644 --- a/bdk/sec/se.c +++ b/bdk/sec/se.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2022 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -182,7 +182,7 @@ static int _se_execute_one_block(u32 op, void *dst, u32 dst_size, const void *sr if (!src || !dst) return 0; - u8 *block = (u8 *)calloc(1, SE_AES_BLOCK_SIZE); + u8 *block = (u8 *)zalloc(SE_AES_BLOCK_SIZE); SE(SE_CRYPTO_BLOCK_COUNT_REG) = 1 - 1; @@ -657,8 +657,8 @@ void se_get_aes_keys(u8 *buf, u8 *keys, u32 keysize) int se_aes_cmac_128(u32 ks, void *dst, const void *src, u32 src_size) { int res = 0; - u8 *key = (u8 *)calloc(1, SE_KEY_128_SIZE); - u8 *last_block = (u8 *)calloc(1, SE_AES_BLOCK_SIZE); + u8 *key = (u8 *)zalloc(SE_KEY_128_SIZE); + u8 *last_block = (u8 *)zalloc(SE_AES_BLOCK_SIZE); se_aes_iv_clear(ks); se_aes_iv_updated_clear(ks); diff --git a/bdk/storage/emmc.c b/bdk/storage/emmc.c index 5412fb5..b1ab03d 100644 --- a/bdk/storage/emmc.c +++ b/bdk/storage/emmc.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2019-2022 CTCaer + * Copyright (c) 2019-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -135,7 +135,7 @@ int emmc_set_partition(u32 partition) { return sdmmc_storage_set_mmc_partition(& void emmc_gpt_parse(link_t *gpt) { - gpt_t *gpt_buf = (gpt_t *)calloc(GPT_NUM_BLOCKS, EMMC_BLOCKSIZE); + gpt_t *gpt_buf = (gpt_t *)zalloc(GPT_NUM_BLOCKS * EMMC_BLOCKSIZE); #ifdef BDK_EMUMMC_ENABLE emummc_storage_read(GPT_FIRST_LBA, GPT_NUM_BLOCKS, gpt_buf); @@ -149,7 +149,7 @@ void emmc_gpt_parse(link_t *gpt) for (u32 i = 0; i < gpt_buf->header.num_part_ents; i++) { - emmc_part_t *part = (emmc_part_t *)calloc(sizeof(emmc_part_t), 1); + emmc_part_t *part = (emmc_part_t *)zalloc(sizeof(emmc_part_t)); if (gpt_buf->entries[i].lba_start < gpt_buf->header.first_use_lba) continue; diff --git a/bdk/utils/dirlist.c b/bdk/utils/dirlist.c index 3b09d1d..5197c01 100644 --- a/bdk/utils/dirlist.c +++ b/bdk/utils/dirlist.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -30,8 +30,8 @@ char *dirlist(const char *directory, const char *pattern, bool includeHiddenFile DIR dir; FILINFO fno; - char *dir_entries = (char *)calloc(MAX_ENTRIES, 256); - char *temp = (char *)calloc(1, 256); + char *dir_entries = (char *)zalloc(MAX_ENTRIES * 256); + char *temp = (char *)zalloc(256); if (!pattern && !f_opendir(&dir, directory)) { diff --git a/bdk/utils/ini.c b/bdk/utils/ini.c index 7e13ff3..104b261 100644 --- a/bdk/utils/ini.c +++ b/bdk/utils/ini.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2022 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -41,7 +41,7 @@ ini_sec_t *_ini_create_section(link_t *dst, ini_sec_t *csec, char *name, u8 type // Calculate total allocation size. u32 len = name ? strlen(name) + 1 : 0; - char *buf = calloc(sizeof(ini_sec_t) + len, 1); + char *buf = zalloc(sizeof(ini_sec_t) + len); csec = (ini_sec_t *)buf; csec->name = strcpy_ns(buf + sizeof(ini_sec_t), name); @@ -144,7 +144,7 @@ int ini_parse(link_t *dst, char *ini_path, bool is_dir) // Calculate total allocation size. u32 klen = strlen(&lbuf[0]) + 1; u32 vlen = strlen(&lbuf[i + 1]) + 1; - char *buf = calloc(sizeof(ini_kv_t) + klen + vlen, 1); + char *buf = zalloc(sizeof(ini_kv_t) + klen + vlen); ini_kv_t *kv = (ini_kv_t *)buf; buf += sizeof(ini_kv_t); diff --git a/bdk/utils/util.c b/bdk/utils/util.c index 630fbf2..0f97971 100644 --- a/bdk/utils/util.c +++ b/bdk/utils/util.c @@ -211,7 +211,7 @@ u32 crc32_calc(u32 crc, const u8 *buf, u32 len) // Calculate CRC table. if (!table) { - table = calloc(256, sizeof(u32)); + table = zalloc(256 * sizeof(u32)); for (u32 i = 0; i < 256; i++) { u32 rem = i; From 4effaab24149cf2014b7e9f0155c85981f2e2e1a Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 27 Mar 2024 09:16:06 +0200 Subject: [PATCH 119/308] hekate/nyx: use zalloc where appropriate --- bootloader/hos/hos.c | 16 +-- bootloader/hos/hos_config.c | 37 ++--- bootloader/hos/pkg2.c | 12 +- bootloader/hos/pkg2_ini_kippatch.c | 6 +- bootloader/main.c | 6 +- nyx/nyx_gui/frontend/fe_emmc_tools.c | 6 +- nyx/nyx_gui/frontend/fe_emummc_tools.c | 4 +- nyx/nyx_gui/frontend/gui_info.c | 4 +- nyx/nyx_gui/frontend/gui_tools.c | 10 +- .../frontend/gui_tools_partition_manager.c | 20 +-- nyx/nyx_gui/hos/hos.c | 14 +- res/patches_template.ini | 129 ------------------ 12 files changed, 68 insertions(+), 196 deletions(-) diff --git a/bootloader/hos/hos.c b/bootloader/hos/hos.c index f2f6e62..f7ab52a 100644 --- a/bootloader/hos/hos.c +++ b/bootloader/hos/hos.c @@ -218,7 +218,7 @@ static void _hos_eks_get() if (!h_cfg.eks) { // Read EKS blob. - u8 *mbr = calloc(SD_BLOCKSIZE, 1); + u8 *mbr = zalloc(SD_BLOCKSIZE); if (!hos_eks_rw_try(mbr, false)) goto out; @@ -248,7 +248,7 @@ static void _hos_eks_save() bool new_eks = false; if (!h_cfg.eks) { - h_cfg.eks = calloc(SD_BLOCKSIZE, 1); + h_cfg.eks = zalloc(SD_BLOCKSIZE); new_eks = true; } @@ -256,7 +256,7 @@ static void _hos_eks_save() if (h_cfg.eks->enabled != HOS_EKS_TSEC_VER) { // Read EKS blob. - u8 *mbr = calloc(SD_BLOCKSIZE, 1); + u8 *mbr = zalloc(SD_BLOCKSIZE); if (!hos_eks_rw_try(mbr, false)) { if (new_eks) @@ -269,7 +269,7 @@ static void _hos_eks_save() } // Get keys. - u8 *keys = (u8 *)calloc(SZ_4K, 2); + u8 *keys = (u8 *)zalloc(SZ_8K); se_get_aes_keys(keys + SZ_4K, keys, SE_KEY_128_SIZE); // Set magic and personalized info. @@ -283,7 +283,7 @@ static void _hos_eks_save() memcpy(h_cfg.eks->troot_dev, keys + 11 * SE_KEY_128_SIZE, SE_KEY_128_SIZE); // Encrypt EKS blob. - u8 *eks = calloc(SD_BLOCKSIZE, 1); + u8 *eks = zalloc(SD_BLOCKSIZE); memcpy(eks, h_cfg.eks, sizeof(hos_eks_mbr_t)); se_aes_crypt_ecb(14, ENCRYPT, eks, sizeof(hos_eks_mbr_t), eks, sizeof(hos_eks_mbr_t)); @@ -310,7 +310,7 @@ void hos_eks_clear(u32 kb) if (h_cfg.eks->enabled) { // Read EKS blob. - u8 *mbr = calloc(SD_BLOCKSIZE, 1); + u8 *mbr = zalloc(SD_BLOCKSIZE); if (!hos_eks_rw_try(mbr, false)) goto out; @@ -318,7 +318,7 @@ void hos_eks_clear(u32 kb) h_cfg.eks->enabled = 0; // Encrypt EKS blob. - u8 *eks = calloc(SD_BLOCKSIZE, 1); + u8 *eks = zalloc(SD_BLOCKSIZE); memcpy(eks, h_cfg.eks, sizeof(hos_eks_mbr_t)); se_aes_crypt_ecb(14, ENCRYPT, eks, sizeof(hos_eks_mbr_t), eks, sizeof(hos_eks_mbr_t)); @@ -646,7 +646,7 @@ try_load: // Read the correct keyblob for older HOS versions. if (ctxt->pkg1_id->kb <= HOS_KB_VERSION_600) { - ctxt->keyblob = (u8 *)calloc(EMMC_BLOCKSIZE, 1); + ctxt->keyblob = (u8 *)zalloc(EMMC_BLOCKSIZE); emummc_storage_read(PKG1_HOS_KEYBLOBS_OFFSET / EMMC_BLOCKSIZE + ctxt->pkg1_id->kb, 1, ctxt->keyblob); } diff --git a/bootloader/hos/hos_config.c b/bootloader/hos/hos_config.c index b014c0b..f272f33 100644 --- a/bootloader/hos/hos_config.c +++ b/bootloader/hos/hos_config.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2021 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -122,27 +122,28 @@ int config_kip1patch(launch_ctxt_t *ctxt, const char *value) if (value == NULL) return 0; - int valueLen = strlen(value); - if (!valueLen) + int len = strlen(value); + if (!len) return 0; if (ctxt->kip1_patches == NULL) { - ctxt->kip1_patches = malloc(valueLen + 1); - memcpy(ctxt->kip1_patches, value, valueLen); - ctxt->kip1_patches[valueLen] = 0; + ctxt->kip1_patches = malloc(len + 1); + memcpy(ctxt->kip1_patches, value, len); + ctxt->kip1_patches[len] = 0; } else { - char *oldAlloc = ctxt->kip1_patches; - int oldSize = strlen(oldAlloc); - ctxt->kip1_patches = malloc(oldSize + 1 + valueLen + 1); - memcpy(ctxt->kip1_patches, oldAlloc, oldSize); - free(oldAlloc); - oldAlloc = NULL; - ctxt->kip1_patches[oldSize++] = ','; - memcpy(&ctxt->kip1_patches[oldSize], value, valueLen); - ctxt->kip1_patches[oldSize + valueLen] = 0; + char *old_addr = ctxt->kip1_patches; + int old_len = strlen(old_addr); + + ctxt->kip1_patches = malloc(old_len + 1 + len + 1); + memcpy(ctxt->kip1_patches, old_addr, old_len); + free(old_addr); + + ctxt->kip1_patches[old_len++] = ','; + memcpy(&ctxt->kip1_patches[old_len], value, len); + ctxt->kip1_patches[old_len + len] = 0; } return 1; } @@ -220,7 +221,7 @@ static int _config_exo_user_pmu_access(launch_ctxt_t *ctxt, const char *value) static int _config_exo_usb3_force(launch_ctxt_t *ctxt, const char *value) { // Override key found. - ctxt->exo_ctx.usb3_force = calloc(sizeof(bool), 1); + ctxt->exo_ctx.usb3_force = zalloc(sizeof(bool)); if (*value == '1') { @@ -233,7 +234,7 @@ static int _config_exo_usb3_force(launch_ctxt_t *ctxt, const char *value) static int _config_exo_cal0_blanking(launch_ctxt_t *ctxt, const char *value) { // Override key found. - ctxt->exo_ctx.cal0_blank = calloc(sizeof(bool), 1); + ctxt->exo_ctx.cal0_blank = zalloc(sizeof(bool)); if (*value == '1') { @@ -246,7 +247,7 @@ static int _config_exo_cal0_blanking(launch_ctxt_t *ctxt, const char *value) static int _config_exo_cal0_writes_enable(launch_ctxt_t *ctxt, const char *value) { // Override key found. - ctxt->exo_ctx.cal0_allow_writes_sys = calloc(sizeof(bool), 1); + ctxt->exo_ctx.cal0_allow_writes_sys = zalloc(sizeof(bool)); if (*value == '1') { diff --git a/bootloader/hos/pkg2.c b/bootloader/hos/pkg2.c index f7c9bfa..934ad08 100644 --- a/bootloader/hos/pkg2.c +++ b/bootloader/hos/pkg2.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2023 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -77,7 +77,7 @@ static void parse_external_kip_patches() if (ini_patch_parse(&ini_kip_sections, "bootloader/patches.ini")) { // Copy ids into a new patchset. - _kip_id_sets = calloc(sizeof(kip1_id_t), 256); // Max 256 kip ids. + _kip_id_sets = zalloc(sizeof(kip1_id_t) * 256); // Max 256 kip ids. memcpy(_kip_id_sets, _kip_ids, sizeof(_kip_ids)); // Parse patchsets and glue them together. @@ -109,12 +109,12 @@ static void parse_external_kip_patches() { curr_kip->name = ini_psec->name; memcpy(curr_kip->hash, ini_psec->hash, 8); - curr_kip->patchset = calloc(sizeof(kip1_patchset_t), 1); + curr_kip->patchset = zalloc(sizeof(kip1_patchset_t)); _kip_id_sets_cnt++; } - kip1_patchset_t *patchsets = (kip1_patchset_t *)calloc(sizeof(kip1_patchset_t), 16); // Max 16 patchsets per kip. + kip1_patchset_t *patchsets = (kip1_patchset_t *)zalloc(sizeof(kip1_patchset_t) * 16); // Max 16 patchsets per kip. u32 curr_patchset_idx; for (curr_patchset_idx = 0; curr_kip->patchset[curr_patchset_idx].name != NULL; curr_patchset_idx++) @@ -128,7 +128,7 @@ static void parse_external_kip_patches() u32 curr_patch_idx = 0; // Parse patches and glue them together to a patchset. - kip1_patch_t *patches = calloc(sizeof(kip1_patch_t), 32); // Max 32 patches per set. + kip1_patch_t *patches = zalloc(sizeof(kip1_patch_t) * 32); // Max 32 patches per set. LIST_FOREACH_ENTRY(ini_patchset_t, pt, &ini_psec->pts, link) { if (first_ext_patch) @@ -142,7 +142,7 @@ static void parse_external_kip_patches() // New patchset name found, create a new set. curr_patchset_idx++; curr_patch_idx = 0; - patches = calloc(sizeof(kip1_patch_t), 32); // Max 32 patches per set. + patches = zalloc(sizeof(kip1_patch_t) * 32); // Max 32 patches per set. patchsets[curr_patchset_idx].name = pt->name; patchsets[curr_patchset_idx].patches = patches; diff --git a/bootloader/hos/pkg2_ini_kippatch.c b/bootloader/hos/pkg2_ini_kippatch.c index 2d1eb5b..54730c6 100644 --- a/bootloader/hos/pkg2_ini_kippatch.c +++ b/bootloader/hos/pkg2_ini_kippatch.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022 CTCaer + * Copyright (c) 2019-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -80,7 +80,7 @@ static ini_kip_sec_t *_ini_create_kip_section(link_t *dst, ini_kip_sec_t *ksec, // Calculate total allocation size. u32 len = strlen(name); - char *buf = calloc(sizeof(ini_kip_sec_t) + len + 1, 1); + char *buf = zalloc(sizeof(ini_kip_sec_t) + len + 1); ksec = (ini_kip_sec_t *)buf; u32 i = _find_patch_section_name(name, len, ':') + 1; @@ -132,7 +132,7 @@ int ini_patch_parse(link_t *dst, char *ini_path) u32 pos = _find_patch_section_name(lbuf, lblen, '='); // Calculate total allocation size. - char *buf = calloc(sizeof(ini_patchset_t) + strlen(&lbuf[1]) + 1, 1); + char *buf = zalloc(sizeof(ini_patchset_t) + strlen(&lbuf[1]) + 1); ini_patchset_t *pt = (ini_patchset_t *)buf; // Set patch name. diff --git a/bootloader/main.c b/bootloader/main.c index dbcb8b5..933aac3 100644 --- a/bootloader/main.c +++ b/bootloader/main.c @@ -1,7 +1,7 @@ /* * Copyright (c) 2018 naehrwert * - * Copyright (c) 2018-2023 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -767,7 +767,7 @@ static void _check_for_updated_bootloader() _launch_payload("bootloader/update.bin", true, false); else { - u8 *buf = calloc(0x200, 1); + u8 *buf = zalloc(0x200); is_ipl_updated(buf, "bootloader/update.bin", true); free(buf); } @@ -1236,7 +1236,7 @@ static void _check_low_battery() u8 *battery_icon = malloc(0x95A); // 21x38x3 u8 *charging_icon = malloc(0x2F4); // 21x12x3 - u8 *no_charging_icon = calloc(0x2F4, 1); + u8 *no_charging_icon = zalloc(0x2F4); memcpy(charging_icon, battery_res, 0x2F4); memcpy(battery_icon, battery_res + 0x2F4, 0x95A); diff --git a/nyx/nyx_gui/frontend/fe_emmc_tools.c b/nyx/nyx_gui/frontend/fe_emmc_tools.c index f594b15..c38d147 100644 --- a/nyx/nyx_gui/frontend/fe_emmc_tools.c +++ b/nyx/nyx_gui/frontend/fe_emmc_tools.c @@ -1,7 +1,7 @@ /* * Copyright (c) 2018 naehrwert * Copyright (c) 2018 Rajko Stojadinovic - * Copyright (c) 2018-2022 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -40,7 +40,7 @@ extern char *emmcsn_path_impl(char *path, char *sub_dir, char *filename, sdmmc_s static void _get_valid_partition(u32 *sector_start, u32 *sector_size, u32 *part_idx, bool backup) { sd_mount(); - mbr_t *mbr = (mbr_t *)calloc(sizeof(mbr_t), 1); + mbr_t *mbr = (mbr_t *)zalloc(sizeof(mbr_t)); sdmmc_storage_read(&sd_storage, 0, 1, mbr); *part_idx = 0; @@ -90,7 +90,7 @@ static void _get_valid_partition(u32 *sector_start, u32 *sector_size, u32 *part_ // Get emuMMC GPP size. if (backup && *part_idx && *sector_size) { - gpt_t *gpt = (gpt_t *)calloc(sizeof(gpt_t), 1); + gpt_t *gpt = (gpt_t *)zalloc(sizeof(gpt_t)); sdmmc_storage_read(&sd_storage, *sector_start + 0x4001, 1, gpt); u32 new_size = gpt->header.alt_lba + 1; diff --git a/nyx/nyx_gui/frontend/fe_emummc_tools.c b/nyx/nyx_gui/frontend/fe_emummc_tools.c index c36f0b9..929a936 100644 --- a/nyx/nyx_gui/frontend/fe_emummc_tools.c +++ b/nyx/nyx_gui/frontend/fe_emummc_tools.c @@ -1,7 +1,7 @@ /* * Copyright (c) 2018 naehrwert * Copyright (c) 2018 Rajko Stojadinovic - * Copyright (c) 2018-2023 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -705,7 +705,7 @@ static int _dump_emummc_raw_part(emmc_tool_gui_t *gui, int active_part, int part // Read MBR, GPT and backup GPT. mbr_t mbr; - gpt_t *gpt = calloc(1, sizeof(gpt_t)); + gpt_t *gpt = zalloc(sizeof(gpt_t)); gpt_header_t gpt_hdr_backup; sdmmc_storage_read(&emmc_storage, 0, 1, &mbr); sdmmc_storage_read(&emmc_storage, 1, sizeof(gpt_t) >> 9, gpt); diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index 23d479d..7d0e523 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2023 CTCaer + * Copyright (c) 2018-2024 CTCaer * Copyright (c) 2018 balika011 * * This program is free software; you can redistribute it and/or modify it @@ -1107,7 +1107,7 @@ static lv_res_t _create_mbox_emmc_sandisk_report(lv_obj_t * btn) lv_mbox_set_text(mbox, "#C7EA46 Sandisk Device Report#"); - u8 *buf = calloc(EMMC_BLOCKSIZE, 1); + u8 *buf = zalloc(EMMC_BLOCKSIZE); char *txt_buf = (char *)malloc(SZ_32K); char *txt_buf2 = (char *)malloc(SZ_32K); txt_buf[0] = 0; diff --git a/nyx/nyx_gui/frontend/gui_tools.c b/nyx/nyx_gui/frontend/gui_tools.c index b8a57e3..9d97696 100644 --- a/nyx/nyx_gui/frontend/gui_tools.c +++ b/nyx/nyx_gui/frontend/gui_tools.c @@ -1145,10 +1145,10 @@ static lv_res_t _create_window_dump_pk12_tool(lv_obj_t *btn) char path[128]; u8 kb = 0; - u8 *pkg1 = (u8 *)calloc(1, SZ_256K); - u8 *warmboot = (u8 *)calloc(1, SZ_256K); - u8 *secmon = (u8 *)calloc(1, SZ_256K); - u8 *loader = (u8 *)calloc(1, SZ_256K); + u8 *pkg1 = (u8 *)zalloc(SZ_256K); + u8 *warmboot = (u8 *)zalloc(SZ_256K); + u8 *secmon = (u8 *)zalloc(SZ_256K); + u8 *loader = (u8 *)zalloc(SZ_256K); u8 *pkg2 = NULL; char *txt_buf = (char *)malloc(SZ_16K); @@ -1207,7 +1207,7 @@ static lv_res_t _create_window_dump_pk12_tool(lv_obj_t *btn) tsec_ctxt.pkg11_off = pkg1_id->pkg11_off; // Read keyblob. - u8 *keyblob = (u8 *)calloc(EMMC_BLOCKSIZE, 1); + u8 *keyblob = (u8 *)zalloc(EMMC_BLOCKSIZE); sdmmc_storage_read(&emmc_storage, HOS_KEYBLOBS_OFFSET / EMMC_BLOCKSIZE + kb, 1, keyblob); // Decrypt. diff --git a/nyx/nyx_gui/frontend/gui_tools_partition_manager.c b/nyx/nyx_gui/frontend/gui_tools_partition_manager.c index 9a810ec..0038eea 100644 --- a/nyx/nyx_gui/frontend/gui_tools_partition_manager.c +++ b/nyx/nyx_gui/frontend/gui_tools_partition_manager.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022 CTCaer + * Copyright (c) 2019-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -345,7 +345,7 @@ static void _prepare_and_flash_mbr_gpt() if (part_info.and_size) { - gpt_t *gpt = calloc(1, sizeof(gpt_t)); + gpt_t *gpt = zalloc(sizeof(gpt_t)); gpt_header_t gpt_hdr_backup = { 0 }; // Set GPT protective partition in MBR. @@ -768,7 +768,7 @@ exit: static u32 _get_available_l4t_partition() { mbr_t mbr = { 0 }; - gpt_t *gpt = calloc(1, sizeof(gpt_t)); + gpt_t *gpt = zalloc(sizeof(gpt_t)); memset(&l4t_flash_ctxt, 0, sizeof(l4t_flasher_ctxt_t)); @@ -815,7 +815,7 @@ static u32 _get_available_l4t_partition() static bool _get_available_android_partition() { - gpt_t *gpt = calloc(1, sizeof(gpt_t)); + gpt_t *gpt = zalloc(sizeof(gpt_t)); // Read main GPT. sdmmc_storage_read(&sd_storage, 1, sizeof(gpt_t) >> 9, gpt); @@ -1007,7 +1007,7 @@ static lv_res_t _action_flash_android_data(lv_obj_t * btns, const char * txt) // Flash Android components. char path[128]; - gpt_t *gpt = calloc(1, sizeof(gpt_t)); + gpt_t *gpt = zalloc(sizeof(gpt_t)); char *txt_buf = malloc(SZ_4K); lv_obj_t *dark_bg = lv_obj_create(lv_scr_act(), NULL); @@ -1077,7 +1077,7 @@ static lv_res_t _action_flash_android_data(lv_obj_t * btns, const char * txt) if (file_size % 0x200) { file_size = ALIGN(file_size, 0x200); - u8 *buf_tmp = calloc(file_size, 1); + u8 *buf_tmp = zalloc(file_size); memcpy(buf_tmp, buf, file_size); free(buf); buf = buf_tmp; @@ -1141,7 +1141,7 @@ boot_img_not_found: if (file_size % 0x200) { file_size = ALIGN(file_size, 0x200); - u8 *buf_tmp = calloc(file_size, 1); + u8 *buf_tmp = zalloc(file_size); memcpy(buf_tmp, buf, file_size); free(buf); buf = buf_tmp; @@ -1203,7 +1203,7 @@ recovery_not_found: if (file_size % 0x200) { file_size = ALIGN(file_size, 0x200); - u8 *buf_tmp = calloc(file_size, 1); + u8 *buf_tmp = zalloc(file_size); memcpy(buf_tmp, buf, file_size); free(buf); buf = buf_tmp; @@ -2228,7 +2228,7 @@ static lv_res_t _action_fix_mbr(lv_obj_t *btn) lv_label_set_recolor(lbl_status, true); mbr_t mbr[2] = { 0 }; - gpt_t *gpt = calloc(1, sizeof(gpt_t)); + gpt_t *gpt = zalloc(sizeof(gpt_t)); gpt_header_t gpt_hdr_backup = { 0 }; bool has_mbr_attributes = false; @@ -2279,7 +2279,7 @@ static lv_res_t _action_fix_mbr(lv_obj_t *btn) LIST_INIT(gpt_parsed); for (u32 i = 0; i < gpt->header.num_part_ents; i++) { - emmc_part_t *part = (emmc_part_t *)calloc(sizeof(emmc_part_t), 1); + emmc_part_t *part = (emmc_part_t *)zalloc(sizeof(emmc_part_t)); if (gpt->entries[i].lba_start < gpt->header.first_use_lba) continue; diff --git a/nyx/nyx_gui/hos/hos.c b/nyx/nyx_gui/hos/hos.c index 4eca1c5..b8cc5fd 100644 --- a/nyx/nyx_gui/hos/hos.c +++ b/nyx/nyx_gui/hos/hos.c @@ -210,7 +210,7 @@ static void _hos_eks_get() if (!h_cfg.eks) { // Read EKS blob. - u8 *mbr = calloc(SD_BLOCKSIZE, 1); + u8 *mbr = zalloc(SD_BLOCKSIZE); if (!hos_eks_rw_try(mbr, false)) goto out; @@ -240,7 +240,7 @@ static void _hos_eks_save() bool new_eks = false; if (!h_cfg.eks) { - h_cfg.eks = calloc(SD_BLOCKSIZE, 1); + h_cfg.eks = zalloc(SD_BLOCKSIZE); new_eks = true; } @@ -248,7 +248,7 @@ static void _hos_eks_save() if (h_cfg.eks->enabled != HOS_EKS_TSEC_VER) { // Read EKS blob. - u8 *mbr = calloc(SD_BLOCKSIZE, 1); + u8 *mbr = zalloc(SD_BLOCKSIZE); if (!hos_eks_rw_try(mbr, false)) { if (new_eks) @@ -261,7 +261,7 @@ static void _hos_eks_save() } // Get keys. - u8 *keys = (u8 *)calloc(SZ_4K, 2); + u8 *keys = (u8 *)calloc(2, SZ_4K); se_get_aes_keys(keys + SZ_4K, keys, SE_KEY_128_SIZE); // Set magic and personalized info. @@ -275,7 +275,7 @@ static void _hos_eks_save() memcpy(h_cfg.eks->troot_dev, keys + 11 * SE_KEY_128_SIZE, SE_KEY_128_SIZE); // Encrypt EKS blob. - u8 *eks = calloc(SD_BLOCKSIZE, 1); + u8 *eks = zalloc(SD_BLOCKSIZE); memcpy(eks, h_cfg.eks, sizeof(hos_eks_mbr_t)); se_aes_crypt_ecb(14, ENCRYPT, eks, sizeof(hos_eks_mbr_t), eks, sizeof(hos_eks_mbr_t)); @@ -302,7 +302,7 @@ void hos_eks_clear(u32 kb) if (h_cfg.eks->enabled) { // Read EKS blob. - u8 *mbr = calloc(SD_BLOCKSIZE, 1); + u8 *mbr = zalloc(SD_BLOCKSIZE); if (!hos_eks_rw_try(mbr, false)) goto out; @@ -310,7 +310,7 @@ void hos_eks_clear(u32 kb) h_cfg.eks->enabled = 0; // Encrypt EKS blob. - u8 *eks = calloc(SD_BLOCKSIZE, 1); + u8 *eks = zalloc(SD_BLOCKSIZE); memcpy(eks, h_cfg.eks, sizeof(hos_eks_mbr_t)); se_aes_crypt_ecb(14, ENCRYPT, eks, sizeof(hos_eks_mbr_t), eks, sizeof(hos_eks_mbr_t)); diff --git a/res/patches_template.ini b/res/patches_template.ini index 0ebe8bd..786fcc8 100644 --- a/res/patches_template.ini +++ b/res/patches_template.ini @@ -21,132 +21,3 @@ .nosigchk=0:0x194A0:0x4:BA090094,E0031F2A .nosigchk=0:0x3A79C:0x4:E0060036,1F2003D5 -#FS Patches for 2.0.0 -[FS:cd7bbe18d6130b28] -.nosigchk=0:0x15DF4:0x4:BC0A0094,E0031F2A -.nosigchk=0:0x3F720:0x4:00060036,1F2003D5 - -#FS Patches for 2.0.0 exfat -[FS:e76692dfaa0420e9] -.nosigchk=0:0x15DF4:0x4:BC0A0094,E0031F2A -.nosigchk=0:0x3F720:0x4:00060036,1F2003D5 - -#FS Patches for 2.1.0 -[FS:0d7005627b07767c] -.nosigchk=0:0x15F64:0x4:DF0A0094,E0031F2A -.nosigchk=0:0x3FAF8:0x4:00060036,1F2003D5 - -#FS Patches for 2.1.0 exfat -[FS:dbd85fcacc193da8] -.nosigchk=0:0x15F64:0x4:DF0A0094,E0031F2A -.nosigchk=0:0x3FAF8:0x4:00060036,1F2003D5 - -#FS Patches for 3.0.0 -[FS:a86da5e87ef1097b] -.nosigchk=0:0x18E24:0x4:520C0094,E0031F2A -.nosigchk=0:0x49EC8:0x4:40040036,1F2003D5 - -#FS Patches for 3.0.0 exfat -[FS:981c57e7f02f70f7] -.nosigchk=0:0x18E24:0x4:520C0094,E0031F2A -.nosigchk=0:0x49EC8:0x4:40040036,1F2003D5 - -#FS Patches for 3.0.1 -[FS:57397c063f10b631] -.nosigchk=0:0x18E90:0x4:520C0094,E0031F2A -.nosigchk=0:0x49F34:0x4:E0030036,1F2003D5 - -#FS Patches for 3.0.1 exfat -[FS:073099d7c6ad7d89] -.nosigchk=0:0x18E90:0x4:520C0094,E0031F2A -.nosigchk=0:0x49F34:0x4:E0030036,1F2003D5 - -#FS Patches for 4.0.0 -[FS:06e90719595a010c] -.nosigchk=0:0x1C4FC:0x4:3C2F0094,E0031F2A -.nosigchk=0:0x57934:0x4:E0020036,1F2003D5 - -#FS Patches for 4.0.0 exfat -[FS:549b0f8d6f72c4e9] -.nosigchk=0:0x1C4FC:0x4:3C2F0094,E0031F2A -.nosigchk=0:0x57934:0x4:E0020036,1F2003D5 - -#FS Patches for 4.1.0 -[FS:8096af7c6a35aa82] -.nosigchk=0:0x1C4FC:0x4:3C2F0094,E0031F2A -.nosigchk=0:0x57934:0x4:E0020036,1F2003D5 - -#FS Patches for 4.1.0 exfat -[FS:02d5abaafd20c8b0] -.nosigchk=0:0x1C4FC:0x4:3C2F0094,E0031F2A -.nosigchk=0:0x57934:0x4:E0020036,1F2003D5 - -#FS Patches for 5.0.0 -[FS:a6f27ad9ac7c73ad] -.nosigchk=0:0x22DDC:0x4:7D3E0094,E0031F2A -.nosigchk=0:0x7D490:0x4:40030036,1F2003D5 - -#FS Patches for 5.0.0 exfat -[FS:ce3ecba2f2f062f5] -.nosigchk=0:0x22DDC:0x4:7D3E0094,E0031F2A -.nosigchk=0:0x7D490:0x4:40030036,1F2003D5 - -#FS Patches for 5.1.0 -[FS:76f87402c9387c0f] -.nosigchk=0:0x22E0C:0x4:853E0094,E0031F2A -.nosigchk=0:0x7D860:0x4:40030036,1F2003D5 - -#FS Patches for 5.1.0 exfat -[FS:10b2d81605488599] -.nosigchk=0:0x22E0C:0x4:853E0094,E0031F2A -.nosigchk=0:0x7D860:0x4:40030036,1F2003D5 - -#FS Patches for 6.0.0 - 4 -[FS:1b82cb221867cb52] -.nosigchk=0:0x712A8:0x4:8E3E0094,E0031F2A -.nosigchk=0:0xEB08C:0x4:C0030036,1F2003D5 - -#FS Patches for 6.0.0 - 4 exfat -[FS:966add3d20b62713] -.nosigchk=0:0x7C9A8:0x4:8E3E0094,E0031F2A -.nosigchk=0:0xF678C:0x4:C0030036,1F2003D5 - -#FS Patches for 6.0.0 - 5 -[FS:3a574d436186191d] -.nosigchk=0:0x712A8:0x4:8E3E0094,E0031F2A -.nosigchk=0:0xEB08C:0x4:C0030036,1F2003D5 - -#FS Patches for 6.0.0 - 5 exfat -[FS:330553f6b5fb55c4] -.nosigchk=0:0x7C9A8:0x4:8E3E0094,E0031F2A -.nosigchk=0:0xF678C:0x4:C0030036,1F2003D5 - -#FS Patches for 7.0.0 -[FS:2ADBE97E9B5F4177] -.nosigchk=0:0x74A2C:0x4:31430094,E0031F2A -.nosigchk=0:0xF25E4:0x4:C0030036,1F2003D5 - -#FS Patches for 7.0.0 exfat -[FS:2CCE659CEC536A8E] -.nosigchk=0:0x7FFDC:0x4:31430094,E0031F2A -.nosigchk=0:0xFDB94:0x4:C0030036,1F2003D5 - -#FS Patches for 8.0.0 -[FS:B2F5176B3548364D] -.nosigchk=0:0x7630C:0x4:51440094,E0031F2A -.nosigchk=0:0xF49A4:0x4:C0030036,1F2003D5 - -#FS Patches for 8.0.0 exfat -[FS:DBD941C0C53C52CC] -.nosigchk=0:0x818BC:0x4:51440094,E0031F2A -.nosigchk=0:0xFFF54:0x4:C0030036,1F2003D5 - -#FS Patches for 8.1.0 -[FS:6B09B67B29C02024] -.nosigchk=0:0x7630C:0x4:51440094,E0031F2A -.nosigchk=0:0xF49A4:0x4:C0030036,1F2003D5 - -#FS Patches for 8.1.0 exfat -[FS:B4CAE1F24965D92E] -.nosigchk=0:0x818BC:0x4:51440094,E0031F2A -.nosigchk=0:0xFFF54:0x4:C0030036,1F2003D5 From 4b3014bc18b25118c4d6687deec74913b52df5e1 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 27 Mar 2024 10:17:56 +0200 Subject: [PATCH 120/308] hos: pkg2: simple refactor --- bootloader/hos/pkg2.c | 335 +++++++++++++++-------------- bootloader/hos/pkg2.h | 34 +-- bootloader/hos/pkg2_ini_kippatch.c | 4 +- bootloader/hos/pkg2_ini_kippatch.h | 8 +- 4 files changed, 199 insertions(+), 182 deletions(-) diff --git a/bootloader/hos/pkg2.c b/bootloader/hos/pkg2.c index 934ad08..defafd4 100644 --- a/bootloader/hos/pkg2.c +++ b/bootloader/hos/pkg2.c @@ -83,49 +83,49 @@ static void parse_external_kip_patches() // Parse patchsets and glue them together. LIST_FOREACH_ENTRY(ini_kip_sec_t, ini_psec, &ini_kip_sections, link) { - kip1_id_t* curr_kip = NULL; + kip1_id_t *kip = NULL; bool found = false; - for (u32 curr_kip_idx = 0; curr_kip_idx < _kip_id_sets_cnt + 1; curr_kip_idx++) + for (u32 kip_idx = 0; kip_idx < _kip_id_sets_cnt + 1; kip_idx++) { - curr_kip = &_kip_id_sets[curr_kip_idx]; + kip = &_kip_id_sets[kip_idx]; // Check if reached the end of predefined list. - if (!curr_kip->name) + if (!kip->name) break; // Check if name and hash match. - if (!strcmp(curr_kip->name, ini_psec->name) && !memcmp(curr_kip->hash, ini_psec->hash, 8)) + if (!strcmp(kip->name, ini_psec->name) && !memcmp(kip->hash, ini_psec->hash, 8)) { found = true; break; } } - if (!curr_kip) + if (!kip) continue; // If not found, create a new empty entry. if (!found) { - curr_kip->name = ini_psec->name; - memcpy(curr_kip->hash, ini_psec->hash, 8); - curr_kip->patchset = zalloc(sizeof(kip1_patchset_t)); + kip->name = ini_psec->name; + memcpy(kip->hash, ini_psec->hash, 8); + kip->patchset = zalloc(sizeof(kip1_patchset_t)); _kip_id_sets_cnt++; } kip1_patchset_t *patchsets = (kip1_patchset_t *)zalloc(sizeof(kip1_patchset_t) * 16); // Max 16 patchsets per kip. - u32 curr_patchset_idx; - for (curr_patchset_idx = 0; curr_kip->patchset[curr_patchset_idx].name != NULL; curr_patchset_idx++) + u32 patchset_idx; + for (patchset_idx = 0; kip->patchset[patchset_idx].name != NULL; patchset_idx++) { - patchsets[curr_patchset_idx].name = curr_kip->patchset[curr_patchset_idx].name; - patchsets[curr_patchset_idx].patches = curr_kip->patchset[curr_patchset_idx].patches; + patchsets[patchset_idx].name = kip->patchset[patchset_idx].name; + patchsets[patchset_idx].patches = kip->patchset[patchset_idx].patches; } - curr_kip->patchset = patchsets; + kip->patchset = patchsets; bool first_ext_patch = true; - u32 curr_patch_idx = 0; + u32 patch_idx = 0; // Parse patches and glue them together to a patchset. kip1_patch_t *patches = zalloc(sizeof(kip1_patch_t) * 32); // Max 32 patches per set. @@ -134,36 +134,36 @@ static void parse_external_kip_patches() if (first_ext_patch) { first_ext_patch = false; - patchsets[curr_patchset_idx].name = pt->name; - patchsets[curr_patchset_idx].patches = patches; + patchsets[patchset_idx].name = pt->name; + patchsets[patchset_idx].patches = patches; } - else if (strcmp(pt->name, patchsets[curr_patchset_idx].name)) + else if (strcmp(pt->name, patchsets[patchset_idx].name)) { // New patchset name found, create a new set. - curr_patchset_idx++; - curr_patch_idx = 0; + patchset_idx++; + patch_idx = 0; patches = zalloc(sizeof(kip1_patch_t) * 32); // Max 32 patches per set. - patchsets[curr_patchset_idx].name = pt->name; - patchsets[curr_patchset_idx].patches = patches; + patchsets[patchset_idx].name = pt->name; + patchsets[patchset_idx].patches = patches; } if (pt->length) { - patches[curr_patch_idx].offset = pt->offset; - patches[curr_patch_idx].length = pt->length; + patches[patch_idx].offset = pt->offset; + patches[patch_idx].length = pt->length; - patches[curr_patch_idx].srcData = (char *)pt->srcData; - patches[curr_patch_idx].dstData = (char *)pt->dstData; + patches[patch_idx].src_data = (char *)pt->src_data; + patches[patch_idx].dst_data = (char *)pt->dst_data; } else - patches[curr_patch_idx].srcData = malloc(1); // Empty patches check. Keep everything else as 0. + patches[patch_idx].src_data = malloc(1); // Empty patches check. Keep everything else as 0. - curr_patch_idx++; + patch_idx++; } - curr_patchset_idx++; - patchsets[curr_patchset_idx].name = NULL; - patchsets[curr_patchset_idx].patches = NULL; + patchset_idx++; + patchsets[patchset_idx].name = NULL; + patchsets[patchset_idx].patches = NULL; } } @@ -307,7 +307,7 @@ void pkg2_merge_kip(link_t *info, pkg2_kip1_t *kip1) pkg2_add_kip(info, kip1); } -int pkg2_decompress_kip(pkg2_kip1_info_t* ki, u32 sectsToDecomp) +static int _decompress_kip(pkg2_kip1_info_t *ki, u32 sectsToDecomp) { u32 compClearMask = ~sectsToDecomp; if ((ki->kip1->flags & compClearMask) == ki->kip1->flags) @@ -316,68 +316,68 @@ int pkg2_decompress_kip(pkg2_kip1_info_t* ki, u32 sectsToDecomp) pkg2_kip1_t hdr; memcpy(&hdr, ki->kip1, sizeof(hdr)); - unsigned int newKipSize = sizeof(hdr); - for (u32 sectIdx = 0; sectIdx < KIP1_NUM_SECTIONS; sectIdx++) + u32 new_kip_size = sizeof(hdr); + for (u32 sect_idx = 0; sect_idx < KIP1_NUM_SECTIONS; sect_idx++) { - u32 sectCompBit = BIT(sectIdx); + u32 comp_bit_mask = BIT(sect_idx); // For compressed, cant get actual decompressed size without doing it, so use safe "output size". - if (sectIdx < 3 && (sectsToDecomp & sectCompBit) && (hdr.flags & sectCompBit)) - newKipSize += hdr.sections[sectIdx].size_decomp; + if (sect_idx < 3 && (sectsToDecomp & comp_bit_mask) && (hdr.flags & comp_bit_mask)) + new_kip_size += hdr.sections[sect_idx].size_decomp; else - newKipSize += hdr.sections[sectIdx].size_comp; + new_kip_size += hdr.sections[sect_idx].size_comp; } - pkg2_kip1_t* newKip = malloc(newKipSize); - unsigned char* dstDataPtr = newKip->data; - const unsigned char* srcDataPtr = ki->kip1->data; - for (u32 sectIdx = 0; sectIdx < KIP1_NUM_SECTIONS; sectIdx++) + pkg2_kip1_t *new_kip = malloc(new_kip_size); + u8 *dst_data = new_kip->data; + const u8 *src_data = ki->kip1->data; + for (u32 sect_idx = 0; sect_idx < KIP1_NUM_SECTIONS; sect_idx++) { - u32 sectCompBit = BIT(sectIdx); + u32 comp_bit_mask = BIT(sect_idx); // Easy copy path for uncompressed or ones we dont want to uncompress. - if (sectIdx >= 3 || !(sectsToDecomp & sectCompBit) || !(hdr.flags & sectCompBit)) + if (sect_idx >= 3 || !(sectsToDecomp & comp_bit_mask) || !(hdr.flags & comp_bit_mask)) { - unsigned int dataSize = hdr.sections[sectIdx].size_comp; + u32 dataSize = hdr.sections[sect_idx].size_comp; if (dataSize == 0) continue; - memcpy(dstDataPtr, srcDataPtr, dataSize); - srcDataPtr += dataSize; - dstDataPtr += dataSize; + memcpy(dst_data, src_data, dataSize); + src_data += dataSize; + dst_data += dataSize; continue; } - unsigned int compSize = hdr.sections[sectIdx].size_comp; - unsigned int outputSize = hdr.sections[sectIdx].size_decomp; - gfx_printf("Decomping '%s', sect %d, size %d..\n", (const char*)hdr.name, sectIdx, compSize); - if (blz_uncompress_srcdest(srcDataPtr, compSize, dstDataPtr, outputSize) == 0) + u32 comp_size = hdr.sections[sect_idx].size_comp; + u32 output_size = hdr.sections[sect_idx].size_decomp; + gfx_printf("Decomping '%s', sect %d, size %d..\n", (char *)hdr.name, sect_idx, comp_size); + if (blz_uncompress_srcdest(src_data, comp_size, dst_data, output_size) == 0) { gfx_con.mute = false; - gfx_printf("%kERROR decomping sect %d of '%s'!%k\n", TXT_CLR_ERROR, sectIdx, (char*)hdr.name, TXT_CLR_DEFAULT); - free(newKip); + gfx_printf("%kERROR decomping sect %d of '%s'!%k\n", TXT_CLR_ERROR, sect_idx, (char *)hdr.name, TXT_CLR_DEFAULT); + free(new_kip); return 1; } else { - DPRINTF("Done! Decompressed size is %d!\n", outputSize); + DPRINTF("Done! Decompressed size is %d!\n", output_size); } - hdr.sections[sectIdx].size_comp = outputSize; - srcDataPtr += compSize; - dstDataPtr += outputSize; + hdr.sections[sect_idx].size_comp = output_size; + src_data += comp_size; + dst_data += output_size; } hdr.flags &= compClearMask; - memcpy(newKip, &hdr, sizeof(hdr)); - newKipSize = dstDataPtr-(unsigned char*)(newKip); + memcpy(new_kip, &hdr, sizeof(hdr)); + new_kip_size = dst_data - (u8 *)(new_kip); free(ki->kip1); - ki->kip1 = newKip; - ki->size = newKipSize; + ki->kip1 = new_kip; + ki->size = new_kip_size; return 0; } -static int _kipm_inject(const char *kipm_path, char *target_name, pkg2_kip1_info_t* ki) +static int _kipm_inject(const char *kipm_path, char *target_name, pkg2_kip1_info_t *ki) { if (!strncmp((const char *)ki->kip1->name, target_name, sizeof(ki->kip1->name))) { @@ -403,9 +403,9 @@ static int _kipm_inject(const char *kipm_path, char *target_name, pkg2_kip1_info u32 new_offset = 0; - for (u32 currSectIdx = 0; currSectIdx < KIP1_NUM_SECTIONS - 2; currSectIdx++) + for (u32 section_idx = 0; section_idx < KIP1_NUM_SECTIONS - 2; section_idx++) { - if (!currSectIdx) // .text. + if (!section_idx) // .text. { memcpy(ki->kip1->data + inject_size, fs_kip->data, fs_kip->sections[0].size_comp); ki->kip1->sections[0].size_decomp += inject_size; @@ -413,11 +413,11 @@ static int _kipm_inject(const char *kipm_path, char *target_name, pkg2_kip1_info } else // Others. { - if (currSectIdx < 3) - memcpy(ki->kip1->data + new_offset + inject_size, fs_kip->data + new_offset, fs_kip->sections[currSectIdx].size_comp); - ki->kip1->sections[currSectIdx].offset += inject_size; + if (section_idx < 3) + memcpy(ki->kip1->data + new_offset + inject_size, fs_kip->data + new_offset, fs_kip->sections[section_idx].size_comp); + ki->kip1->sections[section_idx].offset += inject_size; } - new_offset += fs_kip->sections[currSectIdx].size_comp; + new_offset += fs_kip->sections[section_idx].size_comp; } // Patch PMC capabilities for 1.0.0. @@ -440,24 +440,24 @@ static int _kipm_inject(const char *kipm_path, char *target_name, pkg2_kip1_info return 1; } -const char* pkg2_patch_kips(link_t *info, char* patchNames) +const char *pkg2_patch_kips(link_t *info, char *patch_names) { - if (patchNames == NULL || patchNames[0] == 0) + if (patch_names == NULL || patch_names[0] == 0) return NULL; static const u32 MAX_NUM_PATCHES_REQUESTED = sizeof(u32) * 8; - char* patches[MAX_NUM_PATCHES_REQUESTED]; + char *patches[MAX_NUM_PATCHES_REQUESTED]; - u32 numPatches = 1; - patches[0] = patchNames; + u32 patches_num = 1; + patches[0] = patch_names; { - for (char* p = patchNames; *p != 0; p++) + for (char *p = patch_names; *p != 0; p++) { if (*p == ',') { *p = 0; - patches[numPatches++] = p + 1; - if (numPatches >= MAX_NUM_PATCHES_REQUESTED) + patches[patches_num++] = p + 1; + if (patches_num >= MAX_NUM_PATCHES_REQUESTED) return "too_many_patches"; } else if (*p >= 'A' && *p <= 'Z') // Convert to lowercase. @@ -465,37 +465,38 @@ const char* pkg2_patch_kips(link_t *info, char* patchNames) } } - u32 patchesApplied = 0; // Bitset over patches. - for (u32 i = 0; i < numPatches; i++) + u32 patches_applied = 0; // Bitset over patches. + for (u32 i = 0; i < patches_num; i++) { // Eliminate leading spaces. - for (const char* p = patches[i]; *p != 0; p++) + for (const char *p = patches[i]; *p != 0; p++) { if (*p == ' ' || *p == '\t' || *p == '\r' || *p == '\n') patches[i]++; else break; } - int valueLen = strlen(patches[i]); - if (valueLen == 0) + + int patch_len = strlen(patches[i]); + if (patch_len == 0) continue; // Eliminate trailing spaces. - for (int chIdx = valueLen - 1; chIdx >= 0; chIdx--) + for (int chIdx = patch_len - 1; chIdx >= 0; chIdx--) { - const char* p = patches[i] + chIdx; + const char *p = patches[i] + chIdx; if (*p == ' ' || *p == '\t' || *p == '\r' || *p == '\n') - valueLen = chIdx; + patch_len = chIdx; else break; } - patches[i][valueLen] = 0; + patches[i][patch_len] = 0; DPRINTF("Requested patch: '%s'\n", patches[i]); } // Parse external patches if needed. - for (u32 i = 0; i < numPatches; i++) + for (u32 i = 0; i < patches_num; i++) { if (strcmp(patches[i], "emummc") && strcmp(patches[i], "nogc")) { @@ -504,159 +505,175 @@ const char* pkg2_patch_kips(link_t *info, char* patchNames) } } - u32 shaBuf[SE_SHA_256_SIZE / sizeof(u32)]; + u32 kip_hash[SE_SHA_256_SIZE / sizeof(u32)]; LIST_FOREACH_ENTRY(pkg2_kip1_info_t, ki, info, link) { - shaBuf[0] = 0; // sha256 for this kip not yet calculated. - for (u32 currKipIdx = 0; currKipIdx < _kip_id_sets_cnt; currKipIdx++) + // Reset hash so it can be calculated for the new kip. + kip_hash[0] = 0; + + // Check all SHA256 ID sets. (IDs are grouped per KIP. IDs are still unique.) + for (u32 kip_id_idx = 0; kip_id_idx < _kip_id_sets_cnt; kip_id_idx++) { - if (strncmp((const char*)ki->kip1->name, _kip_id_sets[currKipIdx].name, sizeof(ki->kip1->name)) != 0) + // Check if KIP name macthes ID's KIP name. + if (strncmp((char *)ki->kip1->name, _kip_id_sets[kip_id_idx].name, sizeof(ki->kip1->name)) != 0) continue; - u32 bitsAffected = 0; - kip1_patchset_t* currPatchset = _kip_id_sets[currKipIdx].patchset; - while (currPatchset != NULL && currPatchset->name != NULL) + // Check if there are patches to apply. + bool patches_found = false; + kip1_patchset_t *patchset = _kip_id_sets[kip_id_idx].patchset; + while (patchset != NULL && patchset->name != NULL && !patches_found) { - for (u32 i = 0; i < numPatches; i++) + for (u32 i = 0; i < patches_num; i++) { // Continue if patch name does not match. - if (strcmp(currPatchset->name, patches[i]) != 0) + if (strcmp(patchset->name, patches[i]) != 0) continue; - bitsAffected = i + 1; + patches_found = true; break; } - currPatchset++; + patchset++; } - // Dont bother even hashing this KIP if we dont have any patches enabled for it. - if (bitsAffected == 0) + // Don't bother hashing this KIP if no patches are enabled for it. + if (!patches_found) continue; - if (shaBuf[0] == 0) - { - if (!se_calc_sha256_oneshot(shaBuf, ki->kip1, ki->size)) - memset(shaBuf, 0, sizeof(shaBuf)); - } + // Check if current KIP not hashed and hash it. + if (kip_hash[0] == 0) + if (!se_calc_sha256_oneshot(kip_hash, ki->kip1, ki->size)) + memset(kip_hash, 0, sizeof(kip_hash)); - if (memcmp(shaBuf, _kip_id_sets[currKipIdx].hash, sizeof(_kip_id_sets[0].hash)) != 0) + // Check if kip is the expected version. + if (memcmp(kip_hash, _kip_id_sets[kip_id_idx].hash, sizeof(_kip_id_sets[0].hash)) != 0) continue; - // Find out which sections are affected by the enabled patches, to know which to decompress. - bitsAffected = 0; - currPatchset = _kip_id_sets[currKipIdx].patchset; - while (currPatchset != NULL && currPatchset->name != NULL) + // Find out which sections are affected by the enabled patches, in order to decompress them. + u32 sections_affected = 0; + patchset = _kip_id_sets[kip_id_idx].patchset; + while (patchset != NULL && patchset->name != NULL) { - if (currPatchset->patches != NULL) + if (patchset->patches != NULL) { - for (u32 currEnabIdx = 0; currEnabIdx < numPatches; currEnabIdx++) + for (u32 patch_idx = 0; patch_idx < patches_num; patch_idx++) { - if (strcmp(currPatchset->name, patches[currEnabIdx])) + if (strcmp(patchset->name, patches[patch_idx])) continue; - if (!strcmp(currPatchset->name, "emummc")) - bitsAffected |= BIT(GET_KIP_PATCH_SECTION(currPatchset->patches->offset)); + if (!strcmp(patchset->name, "emummc")) + sections_affected |= BIT(GET_KIP_PATCH_SECTION(patchset->patches->offset)); - for (const kip1_patch_t* currPatch=currPatchset->patches; currPatch != NULL && (currPatch->length != 0); currPatch++) - bitsAffected |= BIT(GET_KIP_PATCH_SECTION(currPatch->offset)); + for (const kip1_patch_t *patch = patchset->patches; patch != NULL && (patch->length != 0); patch++) + sections_affected |= BIT(GET_KIP_PATCH_SECTION(patch->offset)); } } - currPatchset++; + patchset++; } // Got patches to apply to this kip, have to decompress it. - if (pkg2_decompress_kip(ki, bitsAffected)) - return (const char*)ki->kip1->name; // Failed to decompress. + if (_decompress_kip(ki, sections_affected)) + return (char *)ki->kip1->name; // Failed to decompress. - currPatchset = _kip_id_sets[currKipIdx].patchset; + // Apply all patches from matched ID. + patchset = _kip_id_sets[kip_id_idx].patchset; bool emummc_patch_selected = false; - while (currPatchset != NULL && currPatchset->name != NULL) + while (patchset != NULL && patchset->name != NULL) { - for (u32 currEnabIdx = 0; currEnabIdx < numPatches; currEnabIdx++) + for (u32 patch_idx = 0; patch_idx < patches_num; patch_idx++) { - if (strcmp(currPatchset->name, patches[currEnabIdx])) + // Check if patchset name matches requested patch. + if (strcmp(patchset->name, patches[patch_idx])) continue; - u32 appliedMask = BIT(currEnabIdx); + u32 applied_mask = BIT(patch_idx); - if (!strcmp(currPatchset->name, "emummc")) + if (!strcmp(patchset->name, "emummc")) { emummc_patch_selected = true; - patchesApplied |= appliedMask; + patches_applied |= applied_mask; continue; // Patching is done later. } - if (currPatchset->patches == NULL) + // Check if patchset is empty. + if (patchset->patches == NULL) { - DPRINTF("Patch '%s' not necessary for %s\n", currPatchset->name, (const char*)ki->kip1->name); - patchesApplied |= appliedMask; + DPRINTF("Patch '%s' not necessary for %s\n", patchset->name, (char *)ki->kip1->name); + patches_applied |= applied_mask; continue; // Continue in case it's double defined. } - unsigned char* kipSectData = ki->kip1->data; - for (u32 currSectIdx = 0; currSectIdx < KIP1_NUM_SECTIONS; currSectIdx++) + // Apply patches per section. + u8 *kip_sect_data = ki->kip1->data; + for (u32 section_idx = 0; section_idx < KIP1_NUM_SECTIONS; section_idx++) { - if (bitsAffected & BIT(currSectIdx)) + if (sections_affected & BIT(section_idx)) { - gfx_printf("Applying '%s' on %s, sect %d\n", currPatchset->name, (const char*)ki->kip1->name, currSectIdx); - for (const kip1_patch_t* currPatch = currPatchset->patches; currPatch != NULL && currPatch->srcData != NULL; currPatch++) + gfx_printf("Applying '%s' on %s, sect %d\n", patchset->name, (char *)ki->kip1->name, section_idx); + for (const kip1_patch_t *patch = patchset->patches; patch != NULL && patch->src_data != NULL; patch++) { - if (GET_KIP_PATCH_SECTION(currPatch->offset) != currSectIdx) + // Check if patch is in current section. + if (GET_KIP_PATCH_SECTION(patch->offset) != section_idx) continue; - if (!currPatch->length) + // Check if patch is empty. + if (!patch->length) { gfx_con.mute = false; gfx_printf("%kPatch empty!%k\n", TXT_CLR_ERROR, TXT_CLR_DEFAULT); - return currPatchset->name; // MUST stop here as it's not probably intended. + return patchset->name; // MUST stop here as it's not probably intended. } - u32 currOffset = GET_KIP_PATCH_OFFSET(currPatch->offset); // If source does not match and is not already patched, throw an error. - if ((memcmp(&kipSectData[currOffset], currPatch->srcData, currPatch->length) != 0) && - (memcmp(&kipSectData[currOffset], currPatch->dstData, currPatch->length) != 0)) + u32 patch_offset = GET_KIP_PATCH_OFFSET(patch->offset); + if ((memcmp(&kip_sect_data[patch_offset], patch->src_data, patch->length) != 0) && + (memcmp(&kip_sect_data[patch_offset], patch->dst_data, patch->length) != 0)) { gfx_con.mute = false; - gfx_printf("%kPatch mismatch at 0x%x!%k\n", TXT_CLR_ERROR, currOffset, TXT_CLR_DEFAULT); - return currPatchset->name; // MUST stop here as kip is likely corrupt. + gfx_printf("%kPatch mismatch at 0x%x!%k\n", TXT_CLR_ERROR, patch_offset, TXT_CLR_DEFAULT); + return patchset->name; // MUST stop here as kip is likely corrupt. } else { - DPRINTF("Patching %d bytes at offset 0x%x\n", currPatch->length, currOffset); - memcpy(&kipSectData[currOffset], currPatch->dstData, currPatch->length); + DPRINTF("Patching %d bytes at offset 0x%x\n", patch->length, patch_offset); + memcpy(&kip_sect_data[patch_offset], patch->dst_data, patch->length); } } } - kipSectData += ki->kip1->sections[currSectIdx].size_comp; + kip_sect_data += ki->kip1->sections[section_idx].size_comp; } - patchesApplied |= appliedMask; - continue; // Continue in case it's double defined. + patches_applied |= applied_mask; } - currPatchset++; + + patchset++; } - if (emummc_patch_selected && !strncmp(_kip_id_sets[currKipIdx].name, "FS", sizeof(ki->kip1->name))) + if (emummc_patch_selected && !strncmp(_kip_id_sets[kip_id_idx].name, "FS", sizeof(ki->kip1->name))) { - emummc_patch_selected = false; - emu_cfg.fs_ver = currKipIdx; - if (currKipIdx) + // Encode ID. + emu_cfg.fs_ver = kip_id_idx; + if (kip_id_idx) emu_cfg.fs_ver--; - if (currKipIdx > 17) + if (kip_id_idx > 17) emu_cfg.fs_ver -= 2; + // Inject emuMMC code. gfx_printf("Injecting emuMMC. FS ID: %d\n", emu_cfg.fs_ver); - if (_kipm_inject("/bootloader/sys/emummc.kipm", "FS", ki)) + if (_kipm_inject("bootloader/sys/emummc.kipm", "FS", ki)) return "emummc"; + + // Skip checking again. + emummc_patch_selected = false; } } } - for (u32 i = 0; i < numPatches; i++) + // Check if all patches were applied. + for (u32 i = 0; i < patches_num; i++) { - if ((patchesApplied & BIT(i)) == 0) + if ((patches_applied & BIT(i)) == 0) return patches[i]; } @@ -746,7 +763,7 @@ static u32 _pkg2_ini1_build(u8 *pdst, u8 *psec, pkg2_hdr_t *hdr, link_t *kips_in // Merge KIPs into INI1. LIST_FOREACH_ENTRY(pkg2_kip1_info_t, ki, kips_info, link) { -DPRINTF("adding kip1 '%s' @ %08X (%08X)\n", ki->kip1->name, (u32)ki->kip1, ki->size); +DPRINTF("adding kip1 '%s' @ %08X (%08X)\n", (char *)ki->kip1->name, (u32)ki->kip1, ki->size); memcpy(pdst, ki->kip1, ki->size); pdst += ki->size; ini1->num_procs++; @@ -770,7 +787,7 @@ DPRINTF("adding kip1 '%s' @ %08X (%08X)\n", ki->kip1->name, (u32)ki->kip1, ki->s void pkg2_build_encrypt(void *dst, void *hos_ctxt, link_t *kips_info, bool is_exo) { - launch_ctxt_t * ctxt = (launch_ctxt_t *)hos_ctxt; + launch_ctxt_t *ctxt = (launch_ctxt_t *)hos_ctxt; u32 meso_magic = *(u32 *)(ctxt->kernel + 4); u32 kernel_size = ctxt->kernel_size; u8 kb = ctxt->pkg1_id->kb; diff --git a/bootloader/hos/pkg2.h b/bootloader/hos/pkg2.h index aef88bb..80e014a 100644 --- a/bootloader/hos/pkg2.h +++ b/bootloader/hos/pkg2.h @@ -40,9 +40,9 @@ extern u32 pkg2_newkern_ini1_end; typedef struct _kernel_patch_t { - u32 id; - u32 off; - u32 val; + u32 id; + u32 off; + u32 val; u32 *ptr; } kernel_patch_t; @@ -67,8 +67,8 @@ enum typedef struct _pkg2_hdr_t { - u8 ctr[0x10]; - u8 sec_ctr[0x40]; + u8 ctr[0x10]; + u8 sec_ctr[0x40]; u32 magic; u32 base; u32 pad0; @@ -77,8 +77,8 @@ typedef struct _pkg2_hdr_t u16 pad1; u32 sec_size[4]; u32 sec_off[4]; - u8 sec_sha256[0x80]; - u8 data[]; + u8 sec_sha256[0x80]; + u8 data[]; } pkg2_hdr_t; typedef struct _pkg2_ini1_t @@ -102,7 +102,7 @@ typedef struct _pkg2_kip1_sec_t typedef struct _pkg2_kip1_t { /* 0x000 */ u32 magic; -/* 0x004*/ u8 name[12]; +/* 0x004*/ u8 name[12]; /* 0x010 */ u64 tid; /* 0x018 */ u32 proc_cat; /* 0x01C */ u8 main_thrd_prio; @@ -129,23 +129,23 @@ typedef struct _pkg2_kernel_id_t typedef struct _kip1_patch_t { - u32 offset; // section+offset of patch to apply. - u32 length; // In bytes, 0 means last patch. - char* srcData; // That must match. - char* dstData; // That it gets replaced by. + u32 offset; // section+offset of patch to apply. + u32 length; // In bytes, 0 means last patch. + char *src_data; // That must match. + char *dst_data; // That it gets replaced by. } kip1_patch_t; typedef struct _kip1_patchset_t { - char* name; // NULL means end. - kip1_patch_t* patches; // NULL means not necessary. + char *name; // NULL means end. + kip1_patch_t *patches; // NULL means not necessary. } kip1_patchset_t; typedef struct _kip1_id_t { - const char* name; + const char *name; u8 hash[8]; - kip1_patchset_t* patchset; + kip1_patchset_t *patchset; } kip1_id_t; void pkg2_get_newkern_info(u8 *kern_data); @@ -155,7 +155,7 @@ void pkg2_replace_kip(link_t *info, u64 tid, pkg2_kip1_t *kip1); void pkg2_add_kip(link_t *info, pkg2_kip1_t *kip1); void pkg2_merge_kip(link_t *info, pkg2_kip1_t *kip1); void pkg2_get_ids(kip1_id_t **ids, u32 *entries); -const char* pkg2_patch_kips(link_t *info, char* patchNames); +const char *pkg2_patch_kips(link_t *info, char *patch_names); const pkg2_kernel_id_t *pkg2_identify(u8 *hash); pkg2_hdr_t *pkg2_decrypt(void *data, u8 kb, bool is_exo); diff --git a/bootloader/hos/pkg2_ini_kippatch.c b/bootloader/hos/pkg2_ini_kippatch.c index 54730c6..08aa5ad 100644 --- a/bootloader/hos/pkg2_ini_kippatch.c +++ b/bootloader/hos/pkg2_ini_kippatch.c @@ -158,11 +158,11 @@ int ini_patch_parse(link_t *dst, char *ini_path) // Set patch source data. str_start = _find_patch_section_name(&lbuf[pos], lblen - pos, ','); - pt->srcData = _htoa(NULL, &lbuf[pos], pt->length, buf); + pt->src_data = _htoa(NULL, &lbuf[pos], pt->length, buf); pos += str_start + 1; // Set patch destination data. - pt->dstData = _htoa(NULL, &lbuf[pos], pt->length, buf + pt->length); + pt->dst_data = _htoa(NULL, &lbuf[pos], pt->length, buf + pt->length); } list_append(&ksec->pts, &pt->link); diff --git a/bootloader/hos/pkg2_ini_kippatch.h b/bootloader/hos/pkg2_ini_kippatch.h index 8fd9eb3..e32f040 100644 --- a/bootloader/hos/pkg2_ini_kippatch.h +++ b/bootloader/hos/pkg2_ini_kippatch.h @@ -22,10 +22,10 @@ typedef struct _ini_patchset_t { char *name; - u32 offset; // section + offset of patch to apply. - u32 length; // In bytes, 0 means last patch. - u8 *srcData; // That must match. - u8 *dstData; // Gets replaced with. + u32 offset; // section + offset of patch to apply. + u32 length; // In bytes, 0 means last patch. + u8 *src_data; // That must match. + u8 *dst_data; // Gets replaced with. link_t link; } ini_patchset_t; From 42c02e97e807ecb1badc5635f24b9550f9d9bd43 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 27 Mar 2024 09:17:31 +0200 Subject: [PATCH 121/308] bdk: display: add 6.2" panel clone --- bdk/display/di.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/bdk/display/di.h b/bdk/display/di.h index ae58a32..d2ea5db 100644 --- a/bdk/display/di.h +++ b/bdk/display/di.h @@ -789,10 +789,12 @@ enum PANEL_SHP_LQ055T1SW10 = 0x1040, PANEL_SAM_AMS699VC01 = 0x2050, + // Found on 6/2" clones. Unknown markings. Quality seems JDI like. Has bad low backlight scaling. ID: [83] 94 [0F]. + PANEL_OEM_CLONE_6_2 = 0x0F83, // Found on 5.5" clones with AUO A055TAN02 (59.05A30.001) fake markings. - PANEL_OEM_CLONE_5_5 = 0xB3, + PANEL_OEM_CLONE_5_5 = 0x00B3, // Found on 5.5" clones with AUO A055TAN02 (59.05A30.001) fake markings. - PANEL_OEM_CLONE = 0 + PANEL_OEM_CLONE = 0x0000 }; void display_init(); From e846f4576e2ff37689bf364a422f1c37da542a0c Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 27 Mar 2024 09:25:29 +0200 Subject: [PATCH 122/308] bdk: minerva: l4t: adjust sdmmc1 la and freq table - LA is tightened up - Copied frequencies are now 204/408/800/1333/1600/OC (from 204/666/800/1600/OC) --- bdk/mem/minerva.c | 50 +++++++++++++++++++++++------------------------ bdk/mem/minerva.h | 3 ++- 2 files changed, 27 insertions(+), 26 deletions(-) diff --git a/bdk/mem/minerva.c b/bdk/mem/minerva.c index 7b2275e..3fd05e4 100644 --- a/bdk/mem/minerva.c +++ b/bdk/mem/minerva.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022 CTCaer + * Copyright (c) 2019-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -155,13 +155,13 @@ void minerva_sdmmc_la_program(void *table, bool t210b01) switch (freq) { case 204000: - la_scale_regs[LA_SDMMC1_INDEX] = (la_scale_regs[LA_SDMMC1_INDEX] & 0xFF0000) | 75; + la_scale_regs[LA_SDMMC1_INDEX] = (la_scale_regs[LA_SDMMC1_INDEX] & 0xFF0000) | 50; break; case 408000: - la_scale_regs[LA_SDMMC1_INDEX] = (la_scale_regs[LA_SDMMC1_INDEX] & 0xFF0000) | 37; + la_scale_regs[LA_SDMMC1_INDEX] = (la_scale_regs[LA_SDMMC1_INDEX] & 0xFF0000) | 25; break; default: - la_scale_regs[LA_SDMMC1_INDEX] = (la_scale_regs[LA_SDMMC1_INDEX] & 0xFF0000) | 30; + la_scale_regs[LA_SDMMC1_INDEX] = (la_scale_regs[LA_SDMMC1_INDEX] & 0xFF0000) | 20; break; } } @@ -206,6 +206,23 @@ void minerva_prep_boot_l4t(u32 oc_freq, u32 opt_custom) mtc_cfg->table_entries++; } + // Trim table. + int entries = 0; + for (u32 i = 0; i < mtc_cfg->table_entries; i++) + { + // Copy frequencies from 204/408/800 MHz and 1333+ MHz. + int rate = mtc_cfg->mtc_table[i].rate_khz; + if (rate == FREQ_204 || + rate == FREQ_408 || + rate == FREQ_800 || + rate >= FREQ_1333) + { + memcpy(&mtc_cfg->mtc_table[entries], &mtc_cfg->mtc_table[i], sizeof(emc_table_t)); + entries++; + } + } + mtc_cfg->table_entries = entries; + // Set init frequency. minerva_change_freq(FREQ_204); @@ -213,38 +230,21 @@ void minerva_prep_boot_l4t(u32 oc_freq, u32 opt_custom) mtc_cfg->train_mode = OP_TRAIN; for (u32 i = 0; i < mtc_cfg->table_entries; i++) { - mtc_cfg->rate_to = mtc_cfg->mtc_table[i].rate_khz; - // Skip already trained frequencies. - if (mtc_cfg->rate_to == FREQ_204 || - mtc_cfg->rate_to == FREQ_800 || - mtc_cfg->rate_to == FREQ_1600 || - mtc_cfg->rate_to == oc_freq) // Skip OC freq since Arachne handles it. + // Skip already trained frequencies and OC freq (Arachne handles it). + if (mtc_cfg->mtc_table[i].trained || mtc_cfg->rate_to == oc_freq) continue; // Train frequency. + mtc_cfg->rate_to = mtc_cfg->mtc_table[i].rate_khz; minerva_cfg(mtc_cfg, NULL); } // Do FSP WAR and scale to 800 MHz as boot freq. bool fsp_opwr_disabled = !(EMC(EMC_MRW3) & 0xC0); if (fsp_opwr_disabled) - minerva_change_freq(FREQ_666); + minerva_change_freq(FREQ_1333); minerva_change_freq(FREQ_800); - // Trim table. - int entries = 0; - for (u32 i = 0; i < mtc_cfg->table_entries; i++) - { - // Copy freqs from 204 MHz to 800 MHz and 1600 MHz and above. - int rate = mtc_cfg->mtc_table[i].rate_khz; - if ((rate >= FREQ_204 && rate <= FREQ_800) || rate >= FREQ_1600) - { - memcpy(&mtc_cfg->mtc_table[entries], &mtc_cfg->mtc_table[i], sizeof(emc_table_t)); - entries++; - } - } - mtc_cfg->table_entries = entries; - // Do not let other mtc ops. mtc_cfg->init_done = 0; } diff --git a/bdk/mem/minerva.h b/bdk/mem/minerva.h index f105c3d..de32c78 100644 --- a/bdk/mem/minerva.h +++ b/bdk/mem/minerva.h @@ -53,8 +53,9 @@ enum train_mode_t typedef enum { FREQ_204 = 204000, - FREQ_666 = 665600, + FREQ_408 = 408000, FREQ_800 = 800000, + FREQ_1333 = 1331200, FREQ_1600 = 1600000 } minerva_freq_t; From 622f7124ac46be7efc93cd531093e17276352136 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 27 Mar 2024 09:33:08 +0200 Subject: [PATCH 123/308] fss: remove dynamic path Atmosphere never implemented per sysMMC/emuMMC support for configs. So remove path parsing to reduce codesize. --- bootloader/hos/fss.c | 35 +++++++-------------------------- bootloader/hos/hos.h | 3 +-- bootloader/hos/secmon_exo.c | 39 +++++++++++++++++-------------------- 3 files changed, 26 insertions(+), 51 deletions(-) diff --git a/bootloader/hos/fss.c b/bootloader/hos/fss.c index 74e6e0e..213df25 100644 --- a/bootloader/hos/fss.c +++ b/bootloader/hos/fss.c @@ -1,7 +1,7 @@ /* * Atmosphère Fusée Secondary Storage (Package3) parser. * - * Copyright (c) 2019-2023 CTCaer + * Copyright (c) 2019-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -82,34 +82,13 @@ typedef struct _fss_content_t char name[0x10]; } fss_content_t; -static void _set_fss_path_and_update_r2p(launch_ctxt_t *ctxt, const char *path) +static void _fss_update_r2p() { - char *r2p_path = malloc(256); - u32 path_len = strlen(path); + u8 *r2p_payload = sd_file_read("atmosphere/reboot_payload.bin", NULL); - strcpy(r2p_path, path); + is_ipl_updated(r2p_payload, "atmosphere/reboot_payload.bin", h_cfg.updater2p ? true : false); - while (path_len) - { - if ((r2p_path[path_len - 1] == '/') || (r2p_path[path_len - 1] == '\\')) - { - r2p_path[path_len] = 0; - strcat(r2p_path, "reboot_payload.bin"); - u8 *r2p_payload = sd_file_read(r2p_path, NULL); - - is_ipl_updated(r2p_payload, r2p_path, h_cfg.updater2p ? true : false); - - free(r2p_payload); - - // Save FSS0 parent path. - r2p_path[path_len] = 0; - ctxt->fss0_main_path = r2p_path; - return; - } - path_len--; - } - - free(r2p_path); + free(r2p_payload); } int parse_fss(launch_ctxt_t *ctxt, const char *path) @@ -230,8 +209,8 @@ int parse_fss(launch_ctxt_t *ctxt, const char *path) gfx_printf("Done!\n"); f_close(&fp); - // Set FSS0 path and update r2p if needed. - _set_fss_path_and_update_r2p(ctxt, path); + // Update r2p if needed. + _fss_update_r2p(); return 1; } diff --git a/bootloader/hos/hos.h b/bootloader/hos/hos.h index e86b073..be2f76d 100644 --- a/bootloader/hos/hos.h +++ b/bootloader/hos/hos.h @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2023 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -109,7 +109,6 @@ typedef struct _launch_ctxt_t bool stock; bool emummc_forced; - char *fss0_main_path; u32 fss0_hosver; bool atmosphere; diff --git a/bootloader/hos/secmon_exo.c b/bootloader/hos/secmon_exo.c index ea1b45c..7b81e8a 100644 --- a/bootloader/hos/secmon_exo.c +++ b/bootloader/hos/secmon_exo.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2023 CTCaer + * Copyright (c) 2018-2024 CTCaer * Copyright (c) 2019 Atmosphère-NX * * This program is free software; you can redistribute it and/or modify it @@ -245,32 +245,29 @@ void config_exosphere(launch_ctxt_t *ctxt, u32 warmboot_base) } break; } - } - // Parse usb mtim settings. Avoid parsing if it's overridden. - if (ctxt->fss0_main_path && !ctxt->exo_ctx.usb3_force) - { - char settings_path[256]; - strcpy(settings_path, ctxt->fss0_main_path); - strcat(settings_path, "config/system_settings.ini"); - LIST_INIT(sys_settings); - if (ini_parse(&ini_sections, settings_path, false)) + // Parse usb mtim settings. Avoid parsing if it's overridden. + if (!ctxt->exo_ctx.usb3_force) { - LIST_FOREACH_ENTRY(ini_sec_t, ini_sec, &ini_sections, link) + LIST_INIT(ini_sections); + if (ini_parse(&ini_sections, "atmosphere/config/system_settings.ini", false)) { - // Only parse usb section. - if (!(ini_sec->type == INI_CHOICE) || strcmp(ini_sec->name, "usb")) - continue; - - LIST_FOREACH_ENTRY(ini_kv_t, kv, &ini_sec->kvs, link) + LIST_FOREACH_ENTRY(ini_sec_t, ini_sec, &ini_sections, link) { - if (!strcmp("usb30_force_enabled", kv->key)) + // Only parse usb section. + if (!(ini_sec->type == INI_CHOICE) || strcmp(ini_sec->name, "usb")) + continue; + + LIST_FOREACH_ENTRY(ini_kv_t, kv, &ini_sec->kvs, link) { - usb3_force = !strcmp("u8!0x1", kv->val); - break; // Only parse usb30_force_enabled key. + if (!strcmp("usb30_force_enabled", kv->key)) + { + usb3_force = !strcmp("u8!0x1", kv->val); + break; // Only parse usb30_force_enabled key. + } } + break; } - break; } } } @@ -416,7 +413,7 @@ void secmon_exo_check_panic() // Save context to the SD card. char filepath[0x40]; f_mkdir("atmosphere/fatal_errors"); - strcpy(filepath, "/atmosphere/fatal_errors/report_"); + strcpy(filepath, "atmosphere/fatal_errors/report_"); itoa((u32)((u64)rpt->report_identifier >> 32), filepath + strlen(filepath), 16); itoa((u32)(rpt->report_identifier), filepath + strlen(filepath), 16); strcat(filepath, ".bin"); From c021aef9b0c49625ecf56a105d6b32dae5b5fa1b Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 27 Mar 2024 09:36:08 +0200 Subject: [PATCH 124/308] fss: save fss0 for being able to free it if error Also do not free secmon/kernel in case it's from fss --- bootloader/hos/fss.c | 2 ++ bootloader/hos/hos.c | 9 +++------ bootloader/hos/hos.h | 1 + 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/bootloader/hos/fss.c b/bootloader/hos/fss.c index 213df25..6bb66f0 100644 --- a/bootloader/hos/fss.c +++ b/bootloader/hos/fss.c @@ -209,6 +209,8 @@ int parse_fss(launch_ctxt_t *ctxt, const char *path) gfx_printf("Done!\n"); f_close(&fp); + ctxt->fss0 = fss; + // Update r2p if needed. _fss_update_r2p(); diff --git a/bootloader/hos/hos.c b/bootloader/hos/hos.c index f7ab52a..d63e0b7 100644 --- a/bootloader/hos/hos.c +++ b/bootloader/hos/hos.c @@ -694,12 +694,12 @@ out: static void _free_launch_components(launch_ctxt_t *ctxt) { + // Free the malloc'ed guaranteed addresses. + free(ctxt->fss0); free(ctxt->keyblob); free(ctxt->pkg1); free(ctxt->pkg2); free(ctxt->warmboot); - free(ctxt->secmon); - free(ctxt->kernel); free(ctxt->kip1_patches); } @@ -1035,7 +1035,6 @@ int hos_launch(ini_sec_t *cfg) { _hos_crit_error("SD Card is exFAT but installed HOS driver\nonly supports FAT32!"); - _free_launch_components(&ctxt); goto error; } } @@ -1056,10 +1055,7 @@ int hos_launch(ini_sec_t *cfg) } if (emmc_patch_failed || !(btn_wait() & BTN_POWER)) - { - _free_launch_components(&ctxt); goto error; // MUST stop here, because if user requests 'nogc' but it's not applied, their GC controller gets updated! - } } // Rebuild and encrypt package2. @@ -1179,6 +1175,7 @@ int hos_launch(ini_sec_t *cfg) bpmp_halt(); error: + _free_launch_components(&ctxt); emmc_end(); EPRINTF("\nFailed to launch HOS!"); diff --git a/bootloader/hos/hos.h b/bootloader/hos/hos.h index be2f76d..f27728c 100644 --- a/bootloader/hos/hos.h +++ b/bootloader/hos/hos.h @@ -109,6 +109,7 @@ typedef struct _launch_ctxt_t bool stock; bool emummc_forced; + void *fss0; u32 fss0_hosver; bool atmosphere; From 368ca2131690d1c3f5e581724d7204cf8c106d1c Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 27 Mar 2024 09:37:33 +0200 Subject: [PATCH 125/308] hos: fix sys counters reset and always apply it --- bootloader/hos/hos.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/bootloader/hos/hos.c b/bootloader/hos/hos.c index d63e0b7..26e0797 100644 --- a/bootloader/hos/hos.c +++ b/bootloader/hos/hos.c @@ -1123,12 +1123,9 @@ int hos_launch(ini_sec_t *cfg) // Lock SE before starting 'SecureMonitor' if < 6.2.0, otherwise lock bootrom and ipatches. _se_lock(kb <= HOS_KB_VERSION_600 && !is_exo); - // Reset sysctr0 counters. - if (kb >= HOS_KB_VERSION_620) - { - for (u32 i = 0; i < SYSCTR0_COUNTERS; i += sizeof(u32)) - SYSCTR0(SYSCTR0_COUNTERS_BASE + i) = 0; - } + // Reset sysctr0 counters. Mandatory for 6.2.0 and up. + for (u32 i = 0; i < SYSCTR0_COUNTERS; i++) + SYSCTR0(SYSCTR0_COUNTERS_BASE + i * sizeof(u32)) = 0; // NX Bootloader locks LP0 Carveout secure scratch registers. //pmc_scratch_lock(PMC_SEC_LOCK_LP0_PARAMS); From 471b99366d14ea9ce4f5db22fb03461b63148dd6 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 27 Mar 2024 09:38:39 +0200 Subject: [PATCH 126/308] hos: small refactor --- bootloader/hos/hos.c | 25 +++++++++++++------------ bootloader/hos/pkg2.c | 2 ++ 2 files changed, 15 insertions(+), 12 deletions(-) diff --git a/bootloader/hos/hos.c b/bootloader/hos/hos.c index 26e0797..5ef6b94 100644 --- a/bootloader/hos/hos.c +++ b/bootloader/hos/hos.c @@ -849,15 +849,18 @@ int hos_launch(ini_sec_t *cfg) // Check if secmon is exosphere. if (ctxt.secmon) is_exo = !memcmp((void *)((u8 *)ctxt.secmon + ctxt.secmon_size - 4), "LENY", 4); + + // Get secmon and warmboot bases. const pkg1_id_t *pk1_latest = pkg1_get_latest(); - secmon_base = is_exo ? pk1_latest->secmon_base : ctxt.pkg1_id->secmon_base; + secmon_base = is_exo ? pk1_latest->secmon_base : ctxt.pkg1_id->secmon_base; warmboot_base = is_exo ? pk1_latest->warmboot_base : ctxt.pkg1_id->warmboot_base; - // Generate keys. - tsec_ctxt.fw = (u8 *)ctxt.pkg1 + ctxt.pkg1_id->tsec_off; - tsec_ctxt.pkg1 = ctxt.pkg1; + // Set package1 and tsec fw offsets. + tsec_ctxt.fw = (u8 *)ctxt.pkg1 + ctxt.pkg1_id->tsec_off; + tsec_ctxt.pkg1 = ctxt.pkg1; tsec_ctxt.pkg11_off = ctxt.pkg1_id->pkg11_off; + // Generate keys. if (!hos_keygen(ctxt.keyblob, kb, &tsec_ctxt, ctxt.stock, is_exo)) goto error; gfx_puts("Generated keys\n"); @@ -902,7 +905,7 @@ int hos_launch(ini_sec_t *cfg) } else { - _hos_crit_error("No mandatory secmon or warmboot provided!"); + _hos_crit_error("No mandatory pkg1 files provided!"); goto error; } } @@ -1040,14 +1043,12 @@ int hos_launch(ini_sec_t *cfg) } // Patch kip1s in memory if needed. - if (ctxt.kip1_patches) - gfx_printf("%kPatching kips%k\n", TXT_CLR_ORANGE, TXT_CLR_DEFAULT); - const char* unappliedPatch = pkg2_patch_kips(&kip1_info, ctxt.kip1_patches); - if (unappliedPatch != NULL) + const char *failed_patch = pkg2_patch_kips(&kip1_info, ctxt.kip1_patches); + if (failed_patch != NULL) { - EHPRINTFARGS("Failed to apply '%s'!", unappliedPatch); + EHPRINTFARGS("Failed to apply '%s'!", failed_patch); - bool emmc_patch_failed = !strcmp(unappliedPatch, "emummc"); + bool emmc_patch_failed = !strcmp(failed_patch, "emummc"); if (!emmc_patch_failed) { gfx_puts("\nPress POWER to continue.\nPress VOL to go to the menu.\n"); @@ -1144,7 +1145,7 @@ int hos_launch(ini_sec_t *cfg) } // Start directly from PKG2 ready signal and reset outgoing value. - secmon_mailbox->in = pkg1_state_pkg2_ready; + secmon_mailbox->in = pkg1_state_pkg2_ready; secmon_mailbox->out = SECMON_STATE_NOT_READY; // Disable display. This must be executed before secmon to provide support for all fw versions. diff --git a/bootloader/hos/pkg2.c b/bootloader/hos/pkg2.c index defafd4..3332067 100644 --- a/bootloader/hos/pkg2.c +++ b/bootloader/hos/pkg2.c @@ -445,6 +445,8 @@ const char *pkg2_patch_kips(link_t *info, char *patch_names) if (patch_names == NULL || patch_names[0] == 0) return NULL; + gfx_printf("%kPatching kips%k\n", TXT_CLR_ORANGE, TXT_CLR_DEFAULT); + static const u32 MAX_NUM_PATCHES_REQUESTED = sizeof(u32) * 8; char *patches[MAX_NUM_PATCHES_REQUESTED]; From 8b1486c74b634ff4e22dde865f41b9fe201aacd5 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 27 Mar 2024 09:39:41 +0200 Subject: [PATCH 127/308] hekate: expose autorcm check --- bootloader/frontend/fe_tools.c | 67 +++++++++++++++++----------------- bootloader/frontend/fe_tools.h | 3 +- 2 files changed, 35 insertions(+), 35 deletions(-) diff --git a/bootloader/frontend/fe_tools.c b/bootloader/frontend/fe_tools.c index 3419f03..61b6174 100644 --- a/bootloader/frontend/fe_tools.c +++ b/bootloader/frontend/fe_tools.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2022 CTCaer + * Copyright (c) 2018-2024 CTCaer * Copyright (c) 2018 Reisyukaku * * This program is free software; you can redistribute it and/or modify it @@ -32,22 +32,14 @@ extern hekate_config h_cfg; #pragma GCC push_options #pragma GCC optimize ("Os") -void _toggle_autorcm(bool enable) +static void _toggle_autorcm(bool enable) { gfx_clear_partial_grey(0x1B, 0, 1256); gfx_con_setpos(0, 0); - if (!emmc_initialize(false)) - { - EPRINTF("Failed to init eMMC."); - goto out; - } - - u8 *tempbuf = (u8 *)malloc(0x200); - emmc_set_partition(EMMC_BOOT0); - int i, sect = 0; u8 corr_mod0, mod1; + u8 *tempbuf = (u8 *)malloc(0x200); // Get the correct RSA modulus byte masks. nx_emmc_get_autorcm_masks(&corr_mod0, &mod1); @@ -70,7 +62,6 @@ void _toggle_autorcm(bool enable) } free(tempbuf); - emmc_end(); if (enable) gfx_printf("%kAutoRCM mode enabled!%k", TXT_CLR_ORANGE, TXT_CLR_DEFAULT); @@ -78,12 +69,34 @@ void _toggle_autorcm(bool enable) gfx_printf("%kAutoRCM mode disabled!%k", TXT_CLR_GREENISH, TXT_CLR_DEFAULT); gfx_printf("\n\nPress any key...\n"); -out: btn_wait(); } -void _enable_autorcm() { _toggle_autorcm(true); } -void _disable_autorcm() { _toggle_autorcm(false); } +static void _enable_autorcm() { _toggle_autorcm(true); } +static void _disable_autorcm() { _toggle_autorcm(false); } + +bool tools_autorcm_enabled() +{ + u8 mod0, mod1; + u8 *tempbuf = (u8 *)malloc(0x200); + + // Get the correct RSA modulus byte masks. + nx_emmc_get_autorcm_masks(&mod0, &mod1); + + // Get 1st RSA modulus. + emmc_set_partition(EMMC_BOOT0); + sdmmc_storage_read(&emmc_storage, 0x200 / EMMC_BLOCKSIZE, 1, tempbuf); + + // Check if 2nd byte of modulus is correct. + bool enabled = false; + if (tempbuf[0x11] == mod1) + if (tempbuf[0x10] != mod0) + enabled = true; + + free(tempbuf); + + return enabled; +} void menu_autorcm() { @@ -98,9 +111,6 @@ void menu_autorcm() return; } - // Do a simple check on the main BCT. - bool disabled = true; - if (!emmc_initialize(false)) { EPRINTF("Failed to init eMMC."); @@ -109,21 +119,8 @@ void menu_autorcm() return; } - u8 mod0, mod1; - // Get the correct RSA modulus byte masks. - nx_emmc_get_autorcm_masks(&mod0, &mod1); - - u8 *tempbuf = (u8 *)malloc(0x200); - emmc_set_partition(EMMC_BOOT0); - sdmmc_storage_read(&emmc_storage, 0x200 / EMMC_BLOCKSIZE, 1, tempbuf); - - // Check if 2nd byte of modulus is correct. - if (tempbuf[0x11] == mod1) - if (tempbuf[0x10] != mod0) - disabled = false; - - free(tempbuf); - emmc_end(); + // Do a simple check on the main BCT. + bool enabled = tools_autorcm_enabled(); // Create AutoRCM menu. ment_t *ments = (ment_t *)malloc(sizeof(ment_t) * 6); @@ -135,7 +132,7 @@ void menu_autorcm() ments[2].type = MENT_CAPTION; ments[3].type = MENT_CHGLINE; - if (disabled) + if (!enabled) { ments[2].caption = "Status: Disabled!"; ments[2].color = TXT_CLR_GREENISH; @@ -156,6 +153,8 @@ void menu_autorcm() menu_t menu = {ments, "This corrupts BOOT0!", 0, 0}; tui_do_menu(&menu); + + emmc_end(); } #pragma GCC pop_options diff --git a/bootloader/frontend/fe_tools.h b/bootloader/frontend/fe_tools.h index db48d27..e9f2bfb 100644 --- a/bootloader/frontend/fe_tools.h +++ b/bootloader/frontend/fe_tools.h @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2022 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -19,5 +19,6 @@ #define _FE_TOOLS_H_ void menu_autorcm(); +bool tools_autorcm_enabled(); #endif From f764bf04b11332e4933316000a539126256e9a97 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 27 Mar 2024 09:41:55 +0200 Subject: [PATCH 128/308] hos: reboot to ofw if stock fails If package1 fails to be read and conditions are valid, reboot to OFW automatically when stock mode is enabled. --- bootloader/hos/hos.c | 25 +++++++++++++++++++------ 1 file changed, 19 insertions(+), 6 deletions(-) diff --git a/bootloader/hos/hos.c b/bootloader/hos/hos.c index 5ef6b94..f319866 100644 --- a/bootloader/hos/hos.c +++ b/bootloader/hos/hos.c @@ -25,6 +25,7 @@ #include "hos.h" #include "hos_config.h" #include "secmon_exo.h" +#include "../frontend/fe_tools.h" #include "../config.h" #include "../storage/emummc.h" @@ -785,12 +786,6 @@ int hos_launch(ini_sec_t *cfg) goto error; } - // Read package1 and the correct keyblob. - if (!_read_emmc_pkg1(&ctxt)) - goto error; - - kb = ctxt.pkg1_id->kb; - // Try to parse config if present. if (ctxt.cfg && !parse_boot_config(&ctxt)) { @@ -798,6 +793,24 @@ int hos_launch(ini_sec_t *cfg) goto error; } + // Read package1 and the correct keyblob. + if (!_read_emmc_pkg1(&ctxt)) + { + // Check if stock is enabled and device can boot in OFW. + if (ctxt.stock && (h_cfg.t210b01 || !tools_autorcm_enabled())) + { + emmc_end(); + + WPRINTF("\nRebooting to OFW in 5s..."); + msleep(5000); + + power_set_state(REBOOT_BYPASS_FUSES); + } + goto error; + } + + kb = ctxt.pkg1_id->kb; + bool emummc_enabled = emu_cfg.enabled && !h_cfg.emummc_force_disable; // Enable emummc patching. From c9ff5179f9eff60562a6a1db4f69cecfea0cc804 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 27 Mar 2024 09:47:28 +0200 Subject: [PATCH 129/308] exo: use mixed version identification --- bootloader/hos/secmon_exo.c | 26 +++++++++++--------------- 1 file changed, 11 insertions(+), 15 deletions(-) diff --git a/bootloader/hos/secmon_exo.c b/bootloader/hos/secmon_exo.c index 7b81e8a..9fb95cb 100644 --- a/bootloader/hos/secmon_exo.c +++ b/bootloader/hos/secmon_exo.c @@ -156,28 +156,24 @@ void config_exosphere(launch_ctxt_t *ctxt, u32 warmboot_base) //! TODO: Replace current HOS version decoding (as it's bound to break in the future). - // Old exosphere target versioning. Use fuses for a simpler decoding. - if (ctxt->pkg1_id->fuses <= 3 || ctxt->pkg1_id->fuses >= 10) // 1.0.0 - 3.0.0, 8.1.0+. + // Old exosphere target versioning. + if (ctxt->pkg1_id->kb >= HOS_KB_VERSION_1210) // 12.1.0+ + exo_fw_no = ctxt->pkg1_id->kb + 4; + else if (ctxt->pkg1_id->fuses <= 3 || ctxt->pkg1_id->fuses >= 10) // 1.0.0 - 3.0.0, 8.1.0 - 12.0.3. exo_fw_no = ctxt->pkg1_id->fuses; else - exo_fw_no = ctxt->pkg1_id->fuses - 1; // 3.0.1 - 7.0.1, 8.0.x. + exo_fw_no = ctxt->pkg1_id->fuses - 1; // 3.0.1 - 7.0.1, 8.0.x. + + // Handle versions that change API and do not burn new fuse. + if (!memcmp(ctxt->pkg1_id->id, "20190314", 8) || // 8.0.x, same fuses with 7.0.1. + !memcmp(ctxt->pkg1_id->id, "20210129", 8) // 12.0.0, same fuses with 11.0.0. + ) + exo_fw_no++; // Set 12.1.0 specific revision. if (ctxt->pkg1_id->kb == HOS_KB_VERSION_1210) ctxt->exo_ctx.hos_revision = 1; - // Handle 15.0.0+. - if (ctxt->pkg1_id->fuses >= 17) - exo_fw_no++; - - // Handle versions that change API and do not burn new fuse. - if (!memcmp(ctxt->pkg1_id->id, "20190314", 8) || // 8.0.x, same fuses with 7.0.1. - !memcmp(ctxt->pkg1_id->id, "20210129", 8) || // 12.0.0, same fuses with 11.0.0. - !memcmp(ctxt->pkg1_id->id, "20210805", 8) || // 13.0.0, same fuses with 12.1.0. - !memcmp(ctxt->pkg1_id->id, "20220209", 8) // 14.0.0, same fuses with 13.2.1. - ) - exo_fw_no++; - // Feed old exosphere target versioning to new. switch (exo_fw_no) { From 9567ba19c85296a404bb8c94ee93a1ae10f12014 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 27 Mar 2024 09:50:11 +0200 Subject: [PATCH 130/308] l4t: bump loader/firmware revisions --- bootloader/l4t/l4t.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/bootloader/l4t/l4t.c b/bootloader/l4t/l4t.c index a1c2318..813b4be 100644 --- a/bootloader/l4t/l4t.c +++ b/bootloader/l4t/l4t.c @@ -33,9 +33,12 @@ * 1: SDMMC1 LA programming for SDMMC1 UHS DDR200. * 2: Arachne Register Cell v1. * 3: Arachne Register Cell v2. PTSA Rework support. + * 4: Arachne Register Cell v3. DRAM OPT and DDR200 changes. + * 5: Arachne Register Cell v4. DRAM FREQ and DDR200 changes. */ -#define L4T_LOADER_API_REV 4 -#define L4T_FIRMWARE_REV 0x34524556 // REV4. + +#define L4T_LOADER_API_REV 5 +#define L4T_FIRMWARE_REV 0x35524556 // REV5. #ifdef DEBUG_UART_PORT #include From 06b7a38d47c7863f884b3cef165dd8935decb7de Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 27 Mar 2024 10:02:05 +0200 Subject: [PATCH 131/308] nyx: retry to dump imu cal and skip it failed On devices with mangled cal0 imu calibration can now be skipped (still mandatory on Lite). --- nyx/nyx_gui/frontend/gui_options.c | 76 ++++++++++++++++++------------ 1 file changed, 46 insertions(+), 30 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_options.c b/nyx/nyx_gui/frontend/gui_options.c index bf4b869..18be76f 100644 --- a/nyx/nyx_gui/frontend/gui_options.c +++ b/nyx/nyx_gui/frontend/gui_options.c @@ -842,6 +842,7 @@ static lv_res_t _joycon_info_dump_action(lv_obj_t * btn) { FIL fp; int error = 0; + int cal_error = 0; bool is_l_hos = false; bool is_r_hos = false; bool nx_hoag = fuse_read_hw_type() == FUSE_NX_HW_TYPE_HOAG; @@ -853,8 +854,17 @@ static lv_res_t _joycon_info_dump_action(lv_obj_t * btn) if (!nx_hoag && !jc_pad) error = 255; - if (!error) - error = hos_dump_cal0(); + // Try 2 times to get factory calibration data. + for (u32 i = 0; i < 2; i++) + { + if (!error) + cal_error = hos_dump_cal0(); + if (!cal_error) + break; + } + + if (cal_error && nx_hoag) + error = cal_error; if (error) goto disabled_or_cal0_issue; @@ -919,35 +929,38 @@ save_data: f_mkdir("switchroot"); // Save IMU Calibration data. - s_printf(data, - "imu_type=%d\n\n" - "acc_cal_off_x=0x%X\n" - "acc_cal_off_y=0x%X\n" - "acc_cal_off_z=0x%X\n" - "acc_cal_scl_x=0x%X\n" - "acc_cal_scl_y=0x%X\n" - "acc_cal_scl_z=0x%X\n\n" - - "gyr_cal_off_x=0x%X\n" - "gyr_cal_off_y=0x%X\n" - "gyr_cal_off_z=0x%X\n" - "gyr_cal_scl_x=0x%X\n" - "gyr_cal_scl_y=0x%X\n" - "gyr_cal_scl_z=0x%X\n\n" - - "device_bt_mac=%02X:%02X:%02X:%02X:%02X:%02X\n", - cal0->console_6axis_sensor_type, - cal0->acc_offset[0], cal0->acc_offset[1], cal0->acc_offset[2], - cal0->acc_scale[0], cal0->acc_scale[1], cal0->acc_scale[2], - cal0->gyro_offset[0], cal0->gyro_offset[1], cal0->gyro_offset[2], - cal0->gyro_scale[0], cal0->gyro_scale[1], cal0->gyro_scale[2], - cal0->bd_mac[0], cal0->bd_mac[1], cal0->bd_mac[2], cal0->bd_mac[3], cal0->bd_mac[4], cal0->bd_mac[5]); - if (!error) - error = f_open(&fp, "switchroot/switch.cal", FA_WRITE | FA_CREATE_ALWAYS) ? 4 : 0; - if (!error) + if (!error && !cal_error) { - f_puts(data, &fp); - f_close(&fp); + s_printf(data, + "imu_type=%d\n\n" + "acc_cal_off_x=0x%X\n" + "acc_cal_off_y=0x%X\n" + "acc_cal_off_z=0x%X\n" + "acc_cal_scl_x=0x%X\n" + "acc_cal_scl_y=0x%X\n" + "acc_cal_scl_z=0x%X\n\n" + + "gyr_cal_off_x=0x%X\n" + "gyr_cal_off_y=0x%X\n" + "gyr_cal_off_z=0x%X\n" + "gyr_cal_scl_x=0x%X\n" + "gyr_cal_scl_y=0x%X\n" + "gyr_cal_scl_z=0x%X\n\n" + + "device_bt_mac=%02X:%02X:%02X:%02X:%02X:%02X\n", + cal0->console_6axis_sensor_type, + cal0->acc_offset[0], cal0->acc_offset[1], cal0->acc_offset[2], + cal0->acc_scale[0], cal0->acc_scale[1], cal0->acc_scale[2], + cal0->gyro_offset[0], cal0->gyro_offset[1], cal0->gyro_offset[2], + cal0->gyro_scale[0], cal0->gyro_scale[1], cal0->gyro_scale[2], + cal0->bd_mac[0], cal0->bd_mac[1], cal0->bd_mac[2], cal0->bd_mac[3], cal0->bd_mac[4], cal0->bd_mac[5]); + if (!error) + error = f_open(&fp, "switchroot/switch.cal", FA_WRITE | FA_CREATE_ALWAYS) ? 4 : 0; + if (!error) + { + f_puts(data, &fp); + f_close(&fp); + } } } else @@ -1066,6 +1079,9 @@ disabled_or_cal0_issue:; strcat(txt_buf, "\n\n#FFDD00 Make sure that both Joy-Con are connected,#\n" "#FFDD00 and that you paired them in HOS!#"); + + if (cal_error) + strcat(txt_buf, "\n\n#FF8000 Warning:# Failed to get full calibration data!"); } else { From dca350bfe98b91a09a5a8497b8bc01baa2f5de42 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 27 Mar 2024 10:22:09 +0200 Subject: [PATCH 132/308] hos: use strcmp for kip name KIP1 names are NULL terminated, so use strcmp to reduce codesize. --- bootloader/hos/hos.c | 2 +- bootloader/hos/pkg2.c | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/bootloader/hos/hos.c b/bootloader/hos/hos.c index f319866..9b426dd 100644 --- a/bootloader/hos/hos.c +++ b/bootloader/hos/hos.c @@ -712,7 +712,7 @@ static bool _get_fs_exfat_compatible(link_t *info, u32 *hos_revision) LIST_FOREACH_ENTRY(pkg2_kip1_info_t, ki, info, link) { - if (strncmp((const char*)ki->kip1->name, "FS", sizeof(ki->kip1->name))) + if (strcmp((char *)ki->kip1->name, "FS")) continue; if (!se_calc_sha256_oneshot(sha_buf, ki->kip1, ki->size)) diff --git a/bootloader/hos/pkg2.c b/bootloader/hos/pkg2.c index 3332067..b4d629e 100644 --- a/bootloader/hos/pkg2.c +++ b/bootloader/hos/pkg2.c @@ -379,7 +379,7 @@ static int _decompress_kip(pkg2_kip1_info_t *ki, u32 sectsToDecomp) static int _kipm_inject(const char *kipm_path, char *target_name, pkg2_kip1_info_t *ki) { - if (!strncmp((const char *)ki->kip1->name, target_name, sizeof(ki->kip1->name))) + if (!strcmp((char *)ki->kip1->name, target_name)) { u32 size = 0; u8 *kipm_data = (u8 *)sd_file_read(kipm_path, &size); @@ -517,7 +517,7 @@ const char *pkg2_patch_kips(link_t *info, char *patch_names) for (u32 kip_id_idx = 0; kip_id_idx < _kip_id_sets_cnt; kip_id_idx++) { // Check if KIP name macthes ID's KIP name. - if (strncmp((char *)ki->kip1->name, _kip_id_sets[kip_id_idx].name, sizeof(ki->kip1->name)) != 0) + if (strcmp((char *)ki->kip1->name, _kip_id_sets[kip_id_idx].name) != 0) continue; // Check if there are patches to apply. @@ -652,7 +652,7 @@ const char *pkg2_patch_kips(link_t *info, char *patch_names) patchset++; } - if (emummc_patch_selected && !strncmp(_kip_id_sets[kip_id_idx].name, "FS", sizeof(ki->kip1->name))) + if (emummc_patch_selected && !strcmp((char *)_kip_id_sets[kip_id_idx].name, "FS")) { // Encode ID. emu_cfg.fs_ver = kip_id_idx; From 547cfca0c9dd07c51e465f62cff32a69112d1eff Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 27 Mar 2024 10:26:12 +0200 Subject: [PATCH 133/308] hos: simplify emummc patch --- bootloader/hos/pkg2.c | 38 +++++++++++++++++++-------------- bootloader/hos/pkg2_patches.inl | 35 ------------------------------ 2 files changed, 22 insertions(+), 51 deletions(-) diff --git a/bootloader/hos/pkg2.c b/bootloader/hos/pkg2.c index b4d629e..113bc16 100644 --- a/bootloader/hos/pkg2.c +++ b/bootloader/hos/pkg2.c @@ -442,6 +442,8 @@ static int _kipm_inject(const char *kipm_path, char *target_name, pkg2_kip1_info const char *pkg2_patch_kips(link_t *info, char *patch_names) { + bool emummc_patch_selected = false; + if (patch_names == NULL || patch_names[0] == 0) return NULL; @@ -500,7 +502,15 @@ const char *pkg2_patch_kips(link_t *info, char *patch_names) // Parse external patches if needed. for (u32 i = 0; i < patches_num; i++) { - if (strcmp(patches[i], "emummc") && strcmp(patches[i], "nogc")) + if (!strcmp(patches[i], "emummc")) + { + // emuMMC patch is managed on its own. + emummc_patch_selected = true; + patches_applied |= BIT(i); + continue; + } + + if (strcmp(patches[i], "nogc")) { parse_external_kip_patches(); break; @@ -513,6 +523,8 @@ const char *pkg2_patch_kips(link_t *info, char *patch_names) // Reset hash so it can be calculated for the new kip. kip_hash[0] = 0; + bool emummc_patch_apply = emummc_patch_selected && !strcmp((char *)ki->kip1->name, "FS"); + // Check all SHA256 ID sets. (IDs are grouped per KIP. IDs are still unique.) for (u32 kip_id_idx = 0; kip_id_idx < _kip_id_sets_cnt; kip_id_idx++) { @@ -538,7 +550,7 @@ const char *pkg2_patch_kips(link_t *info, char *patch_names) } // Don't bother hashing this KIP if no patches are enabled for it. - if (!patches_found) + if (!patches_found && !emummc_patch_apply) continue; // Check if current KIP not hashed and hash it. @@ -562,9 +574,6 @@ const char *pkg2_patch_kips(link_t *info, char *patch_names) if (strcmp(patchset->name, patches[patch_idx])) continue; - if (!strcmp(patchset->name, "emummc")) - sections_affected |= BIT(GET_KIP_PATCH_SECTION(patchset->patches->offset)); - for (const kip1_patch_t *patch = patchset->patches; patch != NULL && (patch->length != 0); patch++) sections_affected |= BIT(GET_KIP_PATCH_SECTION(patch->offset)); } @@ -572,13 +581,16 @@ const char *pkg2_patch_kips(link_t *info, char *patch_names) patchset++; } + // If emuMMC is enabled, set its affected section. + if (emummc_patch_apply) + sections_affected |= BIT(KIP_TEXT); + // Got patches to apply to this kip, have to decompress it. if (_decompress_kip(ki, sections_affected)) return (char *)ki->kip1->name; // Failed to decompress. - // Apply all patches from matched ID. + // Apply all patches for matched ID. patchset = _kip_id_sets[kip_id_idx].patchset; - bool emummc_patch_selected = false; while (patchset != NULL && patchset->name != NULL) { for (u32 patch_idx = 0; patch_idx < patches_num; patch_idx++) @@ -589,14 +601,6 @@ const char *pkg2_patch_kips(link_t *info, char *patch_names) u32 applied_mask = BIT(patch_idx); - if (!strcmp(patchset->name, "emummc")) - { - emummc_patch_selected = true; - patches_applied |= applied_mask; - - continue; // Patching is done later. - } - // Check if patchset is empty. if (patchset->patches == NULL) { @@ -652,7 +656,8 @@ const char *pkg2_patch_kips(link_t *info, char *patch_names) patchset++; } - if (emummc_patch_selected && !strcmp((char *)_kip_id_sets[kip_id_idx].name, "FS")) + // emuMMC must be applied after all other patches, since it affects TEXT offset. + if (emummc_patch_apply) { // Encode ID. emu_cfg.fs_ver = kip_id_idx; @@ -668,6 +673,7 @@ const char *pkg2_patch_kips(link_t *info, char *patch_names) // Skip checking again. emummc_patch_selected = false; + emummc_patch_apply = false; } } } diff --git a/bootloader/hos/pkg2_patches.inl b/bootloader/hos/pkg2_patches.inl index b0b2ac8..7c3dc23 100644 --- a/bootloader/hos/pkg2_patches.inl +++ b/bootloader/hos/pkg2_patches.inl @@ -448,14 +448,8 @@ static const pkg2_kernel_id_t _pkg2_kernel_ids[] = }; // All kip patch offsets are without the 0x100-sized header. -static kip1_patch_t _fs_emummc[] = { - { KPS(KIP_TEXT) | 1, 0, "", "" }, - { 0, 0, NULL, NULL } -}; - static kip1_patchset_t _fs_patches_100[] = { { "nogc", NULL }, - { "emummc", _fs_emummc }, { NULL, NULL } }; @@ -467,7 +461,6 @@ static kip1_patch_t _fs_nogc_40x[] = { static kip1_patchset_t _fs_patches_40x[] = { { "nogc", _fs_nogc_40x }, - { "emummc", _fs_emummc }, { NULL, NULL } }; @@ -479,7 +472,6 @@ static kip1_patch_t _fs_nogc_410[] = { static kip1_patchset_t _fs_patches_410[] = { { "nogc", _fs_nogc_410 }, - { "emummc", _fs_emummc }, { NULL, NULL } }; @@ -491,7 +483,6 @@ static kip1_patch_t _fs_nogc_50x[] = { static kip1_patchset_t _fs_patches_50x[] = { { "nogc", _fs_nogc_50x }, - { "emummc", _fs_emummc }, { NULL, NULL } }; @@ -503,7 +494,6 @@ static kip1_patch_t _fs_nogc_510[] = { static kip1_patchset_t _fs_patches_510[] = { { "nogc", _fs_nogc_510 }, - { "emummc", _fs_emummc }, { NULL, NULL } }; @@ -521,13 +511,11 @@ static kip1_patch_t _fs_nogc_600_exfat[] = { static kip1_patchset_t _fs_patches_600[] = { { "nogc", _fs_nogc_600 }, - { "emummc", _fs_emummc }, { NULL, NULL } }; static kip1_patchset_t _fs_patches_600_exfat[] = { { "nogc", _fs_nogc_600_exfat }, - { "emummc", _fs_emummc }, { NULL, NULL } }; @@ -545,13 +533,11 @@ static kip1_patch_t _fs_nogc_700_exfat[] = { static kip1_patchset_t _fs_patches_700[] = { { "nogc", _fs_nogc_700 }, - { "emummc", _fs_emummc }, { NULL, NULL } }; static kip1_patchset_t _fs_patches_700_exfat[] = { { "nogc", _fs_nogc_700_exfat }, - { "emummc", _fs_emummc }, { NULL, NULL } }; @@ -569,13 +555,11 @@ static kip1_patch_t _fs_nogc_800_exfat[] = { static kip1_patchset_t _fs_patches_800[] = { { "nogc", _fs_nogc_800 }, - { "emummc", _fs_emummc }, { NULL, NULL } }; static kip1_patchset_t _fs_patches_800_exfat[] = { { "nogc", _fs_nogc_800_exfat }, - { "emummc", _fs_emummc }, { NULL, NULL } }; @@ -587,7 +571,6 @@ static kip1_patch_t _fs_nogc_900[] = { static kip1_patchset_t _fs_patches_900[] = { { "nogc", _fs_nogc_900 }, - { "emummc", _fs_emummc }, { NULL, NULL } }; @@ -599,7 +582,6 @@ static kip1_patch_t _fs_nogc_910[] = { static kip1_patchset_t _fs_patches_910[] = { { "nogc", _fs_nogc_910 }, - { "emummc", _fs_emummc }, { NULL, NULL } }; @@ -611,7 +593,6 @@ static kip1_patch_t _fs_nogc_1000[] = { static kip1_patchset_t _fs_patches_1000[] = { { "nogc", _fs_nogc_1000 }, - { "emummc", _fs_emummc }, { NULL, NULL } }; @@ -623,7 +604,6 @@ static kip1_patch_t _fs_nogc_1020[] = { static kip1_patchset_t _fs_patches_1020[] = { { "nogc", _fs_nogc_1020 }, - { "emummc", _fs_emummc }, { NULL, NULL } }; @@ -635,7 +615,6 @@ static kip1_patch_t _fs_nogc_1100[] = { static kip1_patchset_t _fs_patches_1100[] = { { "nogc", _fs_nogc_1100 }, - { "emummc", _fs_emummc }, { NULL, NULL } }; @@ -647,7 +626,6 @@ static kip1_patch_t _fs_nogc_1200[] = { static kip1_patchset_t _fs_patches_1200[] = { { "nogc", _fs_nogc_1200 }, - { "emummc", _fs_emummc }, { NULL, NULL } }; @@ -659,7 +637,6 @@ static kip1_patch_t _fs_nogc_1203[] = { static kip1_patchset_t _fs_patches_1203[] = { { "nogc", _fs_nogc_1203 }, - { "emummc", _fs_emummc }, { NULL, NULL } }; @@ -671,7 +648,6 @@ static kip1_patch_t _fs_nogc_1300[] = { static kip1_patchset_t _fs_patches_1300[] = { { "nogc", _fs_nogc_1300 }, - { "emummc", _fs_emummc }, { NULL, NULL } }; @@ -683,7 +659,6 @@ static kip1_patch_t _fs_nogc_1310[] = { static kip1_patchset_t _fs_patches_1310[] = { { "nogc", _fs_nogc_1310 }, - { "emummc", _fs_emummc }, { NULL, NULL } }; @@ -695,7 +670,6 @@ static kip1_patch_t _fs_nogc_1400[] = { static kip1_patchset_t _fs_patches_1400[] = { { "nogc", _fs_nogc_1400 }, - { "emummc", _fs_emummc }, { NULL, NULL } }; @@ -707,7 +681,6 @@ static kip1_patch_t _fs_nogc_1400_exfat[] = { static kip1_patchset_t _fs_patches_1400_exfat[] = { { "nogc", _fs_nogc_1400_exfat }, - { "emummc", _fs_emummc }, { NULL, NULL } }; @@ -719,7 +692,6 @@ static kip1_patch_t _fs_nogc_1500[] = { static kip1_patchset_t _fs_patches_1500[] = { { "nogc", _fs_nogc_1500 }, - { "emummc", _fs_emummc }, { NULL, NULL } }; @@ -731,7 +703,6 @@ static kip1_patch_t _fs_nogc_1500_exfat[] = { static kip1_patchset_t _fs_patches_1500_exfat[] = { { "nogc", _fs_nogc_1500_exfat }, - { "emummc", _fs_emummc }, { NULL, NULL } }; @@ -743,7 +714,6 @@ static kip1_patch_t _fs_nogc_1600[] = { static kip1_patchset_t _fs_patches_1600[] = { { "nogc", _fs_nogc_1600 }, - { "emummc", _fs_emummc }, { NULL, NULL } }; @@ -755,7 +725,6 @@ static kip1_patch_t _fs_nogc_1600_exfat[] = { static kip1_patchset_t _fs_patches_1600_exfat[] = { { "nogc", _fs_nogc_1600_exfat }, - { "emummc", _fs_emummc }, { NULL, NULL } }; @@ -767,7 +736,6 @@ static kip1_patch_t _fs_nogc_1603[] = { static kip1_patchset_t _fs_patches_1603[] = { { "nogc", _fs_nogc_1603 }, - { "emummc", _fs_emummc }, { NULL, NULL } }; @@ -779,7 +747,6 @@ static kip1_patch_t _fs_nogc_1603_exfat[] = { static kip1_patchset_t _fs_patches_1603_exfat[] = { { "nogc", _fs_nogc_1603_exfat }, - { "emummc", _fs_emummc }, { NULL, NULL } }; @@ -791,7 +758,6 @@ static kip1_patch_t _fs_nogc_1700[] = { static kip1_patchset_t _fs_patches_1700[] = { { "nogc", _fs_nogc_1700 }, - { "emummc", _fs_emummc }, { NULL, NULL } }; @@ -803,7 +769,6 @@ static kip1_patch_t _fs_nogc_1700_exfat[] = { static kip1_patchset_t _fs_patches_1700_exfat[] = { { "nogc", _fs_nogc_1700_exfat }, - { "emummc", _fs_emummc }, { NULL, NULL } }; From d71903abf2d1bf2b7905aaad1ab0a53b2ca59952 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 27 Mar 2024 10:38:48 +0200 Subject: [PATCH 134/308] hos: simplify nogc patch --- bootloader/hos/pkg2.c | 3 +- bootloader/hos/pkg2.h | 2 + bootloader/hos/pkg2_patches.inl | 116 ++++++++++++++++---------------- 3 files changed, 62 insertions(+), 59 deletions(-) diff --git a/bootloader/hos/pkg2.c b/bootloader/hos/pkg2.c index 113bc16..b9272bf 100644 --- a/bootloader/hos/pkg2.c +++ b/bootloader/hos/pkg2.c @@ -633,7 +633,8 @@ const char *pkg2_patch_kips(link_t *info, char *patch_names) // If source does not match and is not already patched, throw an error. u32 patch_offset = GET_KIP_PATCH_OFFSET(patch->offset); - if ((memcmp(&kip_sect_data[patch_offset], patch->src_data, patch->length) != 0) && + if (patch->src_data != KIP1_PATCH_SRC_NO_CHECK && + (memcmp(&kip_sect_data[patch_offset], patch->src_data, patch->length) != 0) && (memcmp(&kip_sect_data[patch_offset], patch->dst_data, patch->length) != 0)) { gfx_con.mute = false; diff --git a/bootloader/hos/pkg2.h b/bootloader/hos/pkg2.h index 80e014a..a32355a 100644 --- a/bootloader/hos/pkg2.h +++ b/bootloader/hos/pkg2.h @@ -127,6 +127,8 @@ typedef struct _pkg2_kernel_id_t kernel_patch_t *kernel_patchset; } pkg2_kernel_id_t; +#define KIP1_PATCH_SRC_NO_CHECK (char *)(-1) + typedef struct _kip1_patch_t { u32 offset; // section+offset of patch to apply. diff --git a/bootloader/hos/pkg2_patches.inl b/bootloader/hos/pkg2_patches.inl index 7c3dc23..7867613 100644 --- a/bootloader/hos/pkg2_patches.inl +++ b/bootloader/hos/pkg2_patches.inl @@ -454,8 +454,8 @@ static kip1_patchset_t _fs_patches_100[] = { }; static kip1_patch_t _fs_nogc_40x[] = { - { KPS(KIP_TEXT) | 0xA3458, 4, "\x14\x40\x80\x72", "\x14\x80\x80\x72" }, - { KPS(KIP_TEXT) | 0xAAB44, 8, "\xF4\x4F\xBE\xA9\xFD\x7B\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0xA3458, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x72" }, + { KPS(KIP_TEXT) | 0xAAB44, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { 0, 0, NULL, NULL } }; @@ -465,8 +465,8 @@ static kip1_patchset_t _fs_patches_40x[] = { }; static kip1_patch_t _fs_nogc_410[] = { - { KPS(KIP_TEXT) | 0xA34BC, 4, "\x14\x40\x80\x72", "\x14\x80\x80\x72" }, - { KPS(KIP_TEXT) | 0xAABA8, 8, "\xF4\x4F\xBE\xA9\xFD\x7B\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0xA34BC, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x72" }, + { KPS(KIP_TEXT) | 0xAABA8, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { 0, 0, NULL, NULL } }; @@ -476,8 +476,8 @@ static kip1_patchset_t _fs_patches_410[] = { }; static kip1_patch_t _fs_nogc_50x[] = { - { KPS(KIP_TEXT) | 0xCF3C4, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" }, - { KPS(KIP_TEXT) | 0xD73A0, 8, "\xF4\x4F\xBE\xA9\xFD\x7B\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0xCF3C4, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, + { KPS(KIP_TEXT) | 0xD73A0, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { 0, 0, NULL, NULL } }; @@ -487,8 +487,8 @@ static kip1_patchset_t _fs_patches_50x[] = { }; static kip1_patch_t _fs_nogc_510[] = { - { KPS(KIP_TEXT) | 0xCF794, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" }, - { KPS(KIP_TEXT) | 0xD7770, 8, "\xF4\x4F\xBE\xA9\xFD\x7B\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0xCF794, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, + { KPS(KIP_TEXT) | 0xD7770, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { 0, 0, NULL, NULL } }; @@ -498,14 +498,14 @@ static kip1_patchset_t _fs_patches_510[] = { }; static kip1_patch_t _fs_nogc_600[] = { - { KPS(KIP_TEXT) | 0x12CC20, 8, "\xF4\x4F\xBE\xA9\xFD\x7B\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, - { KPS(KIP_TEXT) | 0x1538F4, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" }, + { KPS(KIP_TEXT) | 0x12CC20, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x1538F4, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; static kip1_patch_t _fs_nogc_600_exfat[] = { - { KPS(KIP_TEXT) | 0x138320, 8, "\xF4\x4F\xBE\xA9\xFD\x7B\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, - { KPS(KIP_TEXT) | 0x15EFF4, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" }, + { KPS(KIP_TEXT) | 0x138320, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x15EFF4, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; @@ -520,14 +520,14 @@ static kip1_patchset_t _fs_patches_600_exfat[] = { }; static kip1_patch_t _fs_nogc_700[] = { - { KPS(KIP_TEXT) | 0x134160, 8, "\xF4\x4F\xBE\xA9\xFD\x7B\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, - { KPS(KIP_TEXT) | 0x15BF04, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" }, + { KPS(KIP_TEXT) | 0x134160, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x15BF04, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; static kip1_patch_t _fs_nogc_700_exfat[] = { - { KPS(KIP_TEXT) | 0x13F710, 8, "\xF4\x4F\xBE\xA9\xFD\x7B\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, - { KPS(KIP_TEXT) | 0x1674B4, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" }, + { KPS(KIP_TEXT) | 0x13F710, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x1674B4, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; @@ -542,14 +542,14 @@ static kip1_patchset_t _fs_patches_700_exfat[] = { }; static kip1_patch_t _fs_nogc_800[] = { - { KPS(KIP_TEXT) | 0x136800, 8, "\xF4\x4F\xBE\xA9\xFD\x7B\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, - { KPS(KIP_TEXT) | 0x15EB94, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" }, + { KPS(KIP_TEXT) | 0x136800, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x15EB94, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; static kip1_patch_t _fs_nogc_800_exfat[] = { - { KPS(KIP_TEXT) | 0x141DB0, 8, "\xF4\x4F\xBE\xA9\xFD\x7B\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, - { KPS(KIP_TEXT) | 0x16A144, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" }, + { KPS(KIP_TEXT) | 0x141DB0, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x16A144, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; @@ -564,8 +564,8 @@ static kip1_patchset_t _fs_patches_800_exfat[] = { }; static kip1_patch_t _fs_nogc_900[] = { - { KPS(KIP_TEXT) | 0x129420, 8, "\xF4\x4F\xBE\xA9\xFD\x7B\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, - { KPS(KIP_TEXT) | 0x143268, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" }, + { KPS(KIP_TEXT) | 0x129420, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x143268, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; @@ -575,8 +575,8 @@ static kip1_patchset_t _fs_patches_900[] = { }; static kip1_patch_t _fs_nogc_910[] = { - { KPS(KIP_TEXT) | 0x129430, 8, "\xF4\x4F\xBE\xA9\xFD\x7B\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, - { KPS(KIP_TEXT) | 0x143278, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" }, + { KPS(KIP_TEXT) | 0x129430, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x143278, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; @@ -586,8 +586,8 @@ static kip1_patchset_t _fs_patches_910[] = { }; static kip1_patch_t _fs_nogc_1000[] = { - { KPS(KIP_TEXT) | 0x13BE90, 8, "\xF4\x4F\xBE\xA9\xFD\x7B\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, - { KPS(KIP_TEXT) | 0x14DE08, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" }, + { KPS(KIP_TEXT) | 0x13BE90, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x14DE08, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; @@ -597,8 +597,8 @@ static kip1_patchset_t _fs_patches_1000[] = { }; static kip1_patch_t _fs_nogc_1020[] = { - { KPS(KIP_TEXT) | 0x13C2F0, 8, "\xF4\x4F\xBE\xA9\xFD\x7B\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, - { KPS(KIP_TEXT) | 0x14E268, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" }, + { KPS(KIP_TEXT) | 0x13C2F0, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x14E268, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; @@ -608,8 +608,8 @@ static kip1_patchset_t _fs_patches_1020[] = { }; static kip1_patch_t _fs_nogc_1100[] = { - { KPS(KIP_TEXT) | 0x1398B4, 8, "\xF4\x4F\xBE\xA9\xFD\x7B\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, - { KPS(KIP_TEXT) | 0x156EB8, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" }, + { KPS(KIP_TEXT) | 0x1398B4, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x156EB8, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; @@ -619,8 +619,8 @@ static kip1_patchset_t _fs_patches_1100[] = { }; static kip1_patch_t _fs_nogc_1200[] = { - { KPS(KIP_TEXT) | 0x13EA24, 8, "\xFD\x7B\xBE\xA9\xF4\x4F\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, - { KPS(KIP_TEXT) | 0x155368, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" }, + { KPS(KIP_TEXT) | 0x13EA24, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x155368, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; @@ -630,8 +630,8 @@ static kip1_patchset_t _fs_patches_1200[] = { }; static kip1_patch_t _fs_nogc_1203[] = { - { KPS(KIP_TEXT) | 0x13EB34, 8, "\xFD\x7B\xBE\xA9\xF4\x4F\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, - { KPS(KIP_TEXT) | 0x155478, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" }, + { KPS(KIP_TEXT) | 0x13EB34, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x155478, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; @@ -641,8 +641,8 @@ static kip1_patchset_t _fs_patches_1203[] = { }; static kip1_patch_t _fs_nogc_1300[] = { - { KPS(KIP_TEXT) | 0x1425D0, 8, "\xFD\x7B\xBE\xA9\xF4\x4F\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, - { KPS(KIP_TEXT) | 0x159018, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" }, + { KPS(KIP_TEXT) | 0x1425D0, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x159018, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; @@ -652,8 +652,8 @@ static kip1_patchset_t _fs_patches_1300[] = { }; static kip1_patch_t _fs_nogc_1310[] = { - { KPS(KIP_TEXT) | 0x142570, 8, "\xFD\x7B\xBE\xA9\xF4\x4F\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, - { KPS(KIP_TEXT) | 0x158FB8, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" }, + { KPS(KIP_TEXT) | 0x142570, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x158FB8, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; @@ -663,8 +663,8 @@ static kip1_patchset_t _fs_patches_1310[] = { }; static kip1_patch_t _fs_nogc_1400[] = { - { KPS(KIP_TEXT) | 0x164230, 8, "\xFD\x7B\xBE\xA9\xF4\x4F\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, - { KPS(KIP_TEXT) | 0x18A2E8, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" }, + { KPS(KIP_TEXT) | 0x164230, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x18A2E8, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; @@ -674,8 +674,8 @@ static kip1_patchset_t _fs_patches_1400[] = { }; static kip1_patch_t _fs_nogc_1400_exfat[] = { - { KPS(KIP_TEXT) | 0x16F5B0, 8, "\xFD\x7B\xBE\xA9\xF4\x4F\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, - { KPS(KIP_TEXT) | 0x195668, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" }, + { KPS(KIP_TEXT) | 0x16F5B0, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x195668, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; @@ -685,8 +685,8 @@ static kip1_patchset_t _fs_patches_1400_exfat[] = { }; static kip1_patch_t _fs_nogc_1500[] = { - { KPS(KIP_TEXT) | 0x15ECE4, 8, "\xFD\x7B\xBE\xA9\xF4\x4F\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, - { KPS(KIP_TEXT) | 0x184158, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" }, + { KPS(KIP_TEXT) | 0x15ECE4, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x184158, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; @@ -696,8 +696,8 @@ static kip1_patchset_t _fs_patches_1500[] = { }; static kip1_patch_t _fs_nogc_1500_exfat[] = { - { KPS(KIP_TEXT) | 0x169C74, 8, "\xFD\x7B\xBE\xA9\xF4\x4F\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, - { KPS(KIP_TEXT) | 0x18F0E8, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" }, + { KPS(KIP_TEXT) | 0x169C74, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x18F0E8, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; @@ -707,8 +707,8 @@ static kip1_patchset_t _fs_patches_1500_exfat[] = { }; static kip1_patch_t _fs_nogc_1600[] = { - { KPS(KIP_TEXT) | 0x160B70, 8, "\xFD\x7B\xBE\xA9\xF4\x4F\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, - { KPS(KIP_TEXT) | 0x1865D8, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" }, + { KPS(KIP_TEXT) | 0x160B70, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x1865D8, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; @@ -718,8 +718,8 @@ static kip1_patchset_t _fs_patches_1600[] = { }; static kip1_patch_t _fs_nogc_1600_exfat[] = { - { KPS(KIP_TEXT) | 0x16B850, 8, "\xFD\x7B\xBE\xA9\xF4\x4F\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, - { KPS(KIP_TEXT) | 0x1912B8, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" }, + { KPS(KIP_TEXT) | 0x16B850, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x1912B8, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; @@ -729,8 +729,8 @@ static kip1_patchset_t _fs_patches_1600_exfat[] = { }; static kip1_patch_t _fs_nogc_1603[] = { - { KPS(KIP_TEXT) | 0x160BC0, 8, "\xFD\x7B\xBE\xA9\xF4\x4F\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, - { KPS(KIP_TEXT) | 0x186628, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" }, + { KPS(KIP_TEXT) | 0x160BC0, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x186628, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; @@ -740,8 +740,8 @@ static kip1_patchset_t _fs_patches_1603[] = { }; static kip1_patch_t _fs_nogc_1603_exfat[] = { - { KPS(KIP_TEXT) | 0x16B8A0, 8, "\xFD\x7B\xBE\xA9\xF4\x4F\x01\xA9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, - { KPS(KIP_TEXT) | 0x191308, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" }, + { KPS(KIP_TEXT) | 0x16B8A0, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x191308, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; @@ -751,8 +751,8 @@ static kip1_patchset_t _fs_patches_1603_exfat[] = { }; static kip1_patch_t _fs_nogc_1700[] = { - { KPS(KIP_TEXT) | 0x165100, 8, "\xFD\x7B\xBD\xA9\xF5\x0B\x00\xF9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, - { KPS(KIP_TEXT) | 0x18B048, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" }, + { KPS(KIP_TEXT) | 0x165100, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x18B048, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; @@ -762,8 +762,8 @@ static kip1_patchset_t _fs_patches_1700[] = { }; static kip1_patch_t _fs_nogc_1700_exfat[] = { - { KPS(KIP_TEXT) | 0x16FF60, 8, "\xFD\x7B\xBD\xA9\xF5\x0B\x00\xF9", "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, - { KPS(KIP_TEXT) | 0x195EA8, 4, "\x14\x40\x80\x52", "\x14\x80\x80\x52" }, + { KPS(KIP_TEXT) | 0x16FF60, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x195EA8, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; From 5607fd18ea2c3e32f60064d79067bc1bc1eaf16f Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 27 Mar 2024 10:44:07 +0200 Subject: [PATCH 135/308] hos: 18.0.0 support --- bootloader/hos/hos.c | 2 ++ bootloader/hos/hos.h | 3 ++- bootloader/hos/pkg1.c | 3 ++- bootloader/hos/pkg2_patches.inl | 24 ++++++++++++++++++++++++ bootloader/hos/secmon_exo.c | 2 +- nyx/nyx_gui/hos/hos.c | 6 +++++- nyx/nyx_gui/hos/hos.h | 3 ++- nyx/nyx_gui/hos/pkg1.c | 3 ++- nyx/nyx_gui/hos/pkg2.c | 2 ++ 9 files changed, 42 insertions(+), 6 deletions(-) diff --git a/bootloader/hos/hos.c b/bootloader/hos/hos.c index 9b426dd..1a6117e 100644 --- a/bootloader/hos/hos.c +++ b/bootloader/hos/hos.c @@ -122,6 +122,7 @@ static const u8 master_kekseed_t210_tsec_v4[HOS_KB_VERSION_MAX - HOS_KB_VERSION_ { 0x6E, 0x77, 0x86, 0xAC, 0x83, 0x0A, 0x8D, 0x3E, 0x7D, 0xB7, 0x66, 0xA0, 0x22, 0xB7, 0x6E, 0x67 }, // 15.0.0. { 0x99, 0x22, 0x09, 0x57, 0xA7, 0xF9, 0x5E, 0x94, 0xFE, 0x78, 0x7F, 0x41, 0xD6, 0xE7, 0x56, 0xE6 }, // 16.0.0. { 0x71, 0xB9, 0xA6, 0xC0, 0xFF, 0x97, 0x6B, 0x0C, 0xB4, 0x40, 0xB9, 0xD5, 0x81, 0x5D, 0x81, 0x90 }, // 17.0.0. + { 0x00, 0x04, 0x5D, 0xF0, 0x4D, 0xCD, 0x14, 0xA3, 0x1C, 0xBF, 0xDE, 0x48, 0x55, 0xBA, 0x35, 0xC1 }, // 18.0.0. }; //!TODO: Update on mkey changes. @@ -138,6 +139,7 @@ static const u8 master_kekseed_t210b01[HOS_KB_VERSION_MAX - HOS_KB_VERSION_600 + { 0xEC, 0x61, 0xBC, 0x82, 0x1E, 0x0F, 0x5A, 0xC3, 0x2B, 0x64, 0x3F, 0x9D, 0xD6, 0x19, 0x22, 0x2D }, // 15.0.0. { 0xA5, 0xEC, 0x16, 0x39, 0x1A, 0x30, 0x16, 0x08, 0x2E, 0xCF, 0x09, 0x6F, 0x5E, 0x7C, 0xEE, 0xA9 }, // 16.0.0. { 0x8D, 0xEE, 0x9E, 0x11, 0x36, 0x3A, 0x9B, 0x0A, 0x6A, 0xC7, 0xBB, 0xE9, 0xD1, 0x03, 0xF7, 0x80 }, // 17.0.0. + { 0x4F, 0x41, 0x3C, 0x3B, 0xFB, 0x6A, 0x01, 0x2A, 0x68, 0x9F, 0x83, 0xE9, 0x53, 0xBD, 0x16, 0xD2 }, // 18.0.0. }; static const u8 console_keyseed[SE_KEY_128_SIZE] = diff --git a/bootloader/hos/hos.h b/bootloader/hos/hos.h index f27728c..ba520ec 100644 --- a/bootloader/hos/hos.h +++ b/bootloader/hos/hos.h @@ -44,7 +44,8 @@ enum { HOS_KB_VERSION_1500 = 14, HOS_KB_VERSION_1600 = 15, HOS_KB_VERSION_1700 = 16, - HOS_KB_VERSION_MAX = HOS_KB_VERSION_1700 + HOS_KB_VERSION_1800 = 17, + HOS_KB_VERSION_MAX = HOS_KB_VERSION_1800 }; #define HOS_TSEC_VERSION 4 //! TODO: Update on TSEC Root Key changes. diff --git a/bootloader/hos/pkg1.c b/bootloader/hos/pkg1.c index c8a0b95..d96b0f7 100644 --- a/bootloader/hos/pkg1.c +++ b/bootloader/hos/pkg1.c @@ -169,7 +169,8 @@ static const pkg1_id_t _pkg1_ids[] = { { "20220209", 13, 16, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 14.0.0 - 14.1.2. { "20220801", 14, 17, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 15.0.0 - 15.0.1. { "20230111", 15, 18, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 16.0.0 - 16.1.0. - { "20230906", 16, 19, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 17.0.0+ + { "20230906", 16, 19, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 17.0.0 - 17.0.1. + { "20240207", 17, 19, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 18.0.0+ }; const pkg1_id_t *pkg1_get_latest() diff --git a/bootloader/hos/pkg2_patches.inl b/bootloader/hos/pkg2_patches.inl index 7867613..a7ed3c3 100644 --- a/bootloader/hos/pkg2_patches.inl +++ b/bootloader/hos/pkg2_patches.inl @@ -772,6 +772,28 @@ static kip1_patchset_t _fs_patches_1700_exfat[] = { { NULL, NULL } }; +static kip1_patch_t _fs_nogc_1800[] = { + { KPS(KIP_TEXT) | 0x164A50, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x18AE48, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, + { 0, 0, NULL, NULL } +}; + +static kip1_patchset_t _fs_patches_1800[] = { + { "nogc", _fs_nogc_1800 }, + { NULL, NULL } +}; + +static kip1_patch_t _fs_nogc_1800_exfat[] = { + { KPS(KIP_TEXT) | 0x16FAE0, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x195ED8, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, + { 0, 0, NULL, NULL } +}; + +static kip1_patchset_t _fs_patches_1800_exfat[] = { + { "nogc", _fs_nogc_1800_exfat }, + { NULL, NULL } +}; + // SHA256 hashes. static kip1_id_t _kip_ids[] = { @@ -831,4 +853,6 @@ static kip1_id_t _kip_ids[] = { "FS", "\x62\xC6\x5E\xFD\x9A\xBF\x7C\x43", _fs_patches_1603_exfat }, // FS 16.0.3 exFAT { "FS", "\x27\x07\x3B\xF0\xA1\xB8\xCE\x61", _fs_patches_1700 }, // FS 17.0.0 { "FS", "\xEE\x0F\x4B\xAC\x6D\x1F\xFC\x4B", _fs_patches_1700_exfat }, // FS 17.0.0 exFAT + { "FS", "\x79\x5F\x5A\x5E\xB0\xC6\x77\x9E", _fs_patches_1800 }, // FS 18.0.0 + { "FS", "\x1E\x2C\x64\xB1\xCC\xE2\x78\x24", _fs_patches_1800_exfat }, // FS 18.0.0 exFAT }; diff --git a/bootloader/hos/secmon_exo.c b/bootloader/hos/secmon_exo.c index 9fb95cb..f060f3a 100644 --- a/bootloader/hos/secmon_exo.c +++ b/bootloader/hos/secmon_exo.c @@ -199,7 +199,7 @@ void config_exosphere(launch_ctxt_t *ctxt, u32 warmboot_base) case 12: exo_fw_no = EXO_FW_VER(9, 1); break; - case 13 ... 20: //!TODO: Update on API changes. 20: 17.0.0. + case 13 ... 21: //!TODO: Update on API changes. 21: 18.0.0. exo_fw_no = EXO_FW_VER(exo_fw_no - 3, ctxt->exo_ctx.hos_revision); break; } diff --git a/nyx/nyx_gui/hos/hos.c b/nyx/nyx_gui/hos/hos.c index b8cc5fd..94dd00b 100644 --- a/nyx/nyx_gui/hos/hos.c +++ b/nyx/nyx_gui/hos/hos.c @@ -76,7 +76,7 @@ static const u8 master_kekseed_620[SE_KEY_128_SIZE] = //!TODO: Update on mkey changes. static const u8 master_kekseed_t210_max[SE_KEY_128_SIZE] = - { 0x71, 0xB9, 0xA6, 0xC0, 0xFF, 0x97, 0x6B, 0x0C, 0xB4, 0x40, 0xB9, 0xD5, 0x81, 0x5D, 0x81, 0x90 }; // 17.0.0. + { 0x00, 0x04, 0x5D, 0xF0, 0x4D, 0xCD, 0x14, 0xA3, 0x1C, 0xBF, 0xDE, 0x48, 0x55, 0xBA, 0x35, 0xC1 }; // 18.0.0. //!TODO: Update on mkey changes. static const u8 master_kekseed_t210b01[HOS_KB_VERSION_MAX - HOS_KB_VERSION_600 + 1][SE_KEY_128_SIZE] = { @@ -92,6 +92,7 @@ static const u8 master_kekseed_t210b01[HOS_KB_VERSION_MAX - HOS_KB_VERSION_600 + { 0xEC, 0x61, 0xBC, 0x82, 0x1E, 0x0F, 0x5A, 0xC3, 0x2B, 0x64, 0x3F, 0x9D, 0xD6, 0x19, 0x22, 0x2D }, // 15.0.0. { 0xA5, 0xEC, 0x16, 0x39, 0x1A, 0x30, 0x16, 0x08, 0x2E, 0xCF, 0x09, 0x6F, 0x5E, 0x7C, 0xEE, 0xA9 }, // 16.0.0. { 0x8D, 0xEE, 0x9E, 0x11, 0x36, 0x3A, 0x9B, 0x0A, 0x6A, 0xC7, 0xBB, 0xE9, 0xD1, 0x03, 0xF7, 0x80 }, // 17.0.0. + { 0x4F, 0x41, 0x3C, 0x3B, 0xFB, 0x6A, 0x01, 0x2A, 0x68, 0x9F, 0x83, 0xE9, 0x53, 0xBD, 0x16, 0xD2 }, // 18.0.0. }; static const u8 console_keyseed[SE_KEY_128_SIZE] = @@ -122,6 +123,7 @@ static const u8 mkey_vectors[HOS_KB_VERSION_MAX + 1][SE_KEY_128_SIZE] = { { 0xB1, 0x81, 0xA6, 0x0D, 0x72, 0xC7, 0xEE, 0x15, 0x21, 0xF3, 0xC0, 0xB5, 0x6B, 0x61, 0x6D, 0xE7 }, // Mkey 13 encrypted with mkey 14. { 0xAF, 0x11, 0x4C, 0x67, 0x17, 0x7A, 0x52, 0x43, 0xF7, 0x70, 0x2F, 0xC7, 0xEF, 0x81, 0x72, 0x16 }, // Mkey 14 encrypted with mkey 15. { 0x25, 0x12, 0x8B, 0xCB, 0xB5, 0x46, 0xA1, 0xF8, 0xE0, 0x52, 0x15, 0xB7, 0x0B, 0x57, 0x00, 0xBD }, // Mkey 15 encrypted with mkey 16. + { 0x58, 0x15, 0xD2, 0xF6, 0x8A, 0xE8, 0x19, 0xAB, 0xFB, 0x2D, 0x52, 0x9D, 0xE7, 0x55, 0xF3, 0x93 }, // Mkey 16 encrypted with mkey 17. }; //!TODO: Update on mkey changes. @@ -140,6 +142,7 @@ static const u8 new_console_keyseed[HOS_KB_VERSION_MAX - HOS_KB_VERSION_400 + 1] { 0x5E, 0xC9, 0xC5, 0x0A, 0xD0, 0x5F, 0x8B, 0x7B, 0xA7, 0x39, 0xEA, 0xBC, 0x60, 0x0F, 0x74, 0xE6 }, // 15.0.0 New Device Key Source. { 0xEA, 0x90, 0x6E, 0xA8, 0xAE, 0x92, 0x99, 0x64, 0x36, 0xC1, 0xF3, 0x1C, 0xC6, 0x32, 0x83, 0x8C }, // 16.0.0 New Device Key Source. { 0xDA, 0xB9, 0xD6, 0x77, 0x52, 0x2D, 0x1F, 0x78, 0x73, 0xC9, 0x98, 0x5B, 0x06, 0xFE, 0xA0, 0x52 }, // 17.0.0 New Device Key Source. + { 0x14, 0xF5, 0xA5, 0xD0, 0x73, 0x6D, 0x44, 0x80, 0x5F, 0x31, 0x5A, 0x8F, 0x1E, 0xD4, 0x0D, 0x63 }, // 18.0.0 New Device Key Source. }; //!TODO: Update on mkey changes. @@ -158,6 +161,7 @@ static const u8 new_console_kekseed[HOS_KB_VERSION_MAX - HOS_KB_VERSION_400 + 1] { 0x7C, 0x30, 0xED, 0x8B, 0x39, 0x25, 0x2C, 0x08, 0x8F, 0x48, 0xDC, 0x28, 0xE6, 0x1A, 0x6B, 0x49 }, // 15.0.0 New Device Keygen Source. { 0xF0, 0xF3, 0xFF, 0x52, 0x75, 0x2F, 0xBA, 0x4D, 0x09, 0x72, 0x30, 0x89, 0xA9, 0xDF, 0xFE, 0x1F }, // 16.0.0 New Device Keygen Source. { 0x21, 0xD6, 0x35, 0xF1, 0x0F, 0x7A, 0xF0, 0x5D, 0xDF, 0x79, 0x1C, 0x7A, 0xE4, 0x32, 0x82, 0x9E }, // 17.0.0 New Device Keygen Source. + { 0xE7, 0x85, 0x8C, 0xA2, 0xF4, 0x49, 0xCB, 0x07, 0xD1, 0x8E, 0x48, 0x1B, 0xE8, 0x1E, 0x28, 0x3B }, // 18.0.0 New Device Keygen Source. }; static const u8 gen_keyseed[SE_KEY_128_SIZE] = diff --git a/nyx/nyx_gui/hos/hos.h b/nyx/nyx_gui/hos/hos.h index 3fa830d..c702a32 100644 --- a/nyx/nyx_gui/hos/hos.h +++ b/nyx/nyx_gui/hos/hos.h @@ -44,7 +44,8 @@ enum { HOS_KB_VERSION_1500 = 14, HOS_KB_VERSION_1600 = 15, HOS_KB_VERSION_1700 = 16, - HOS_KB_VERSION_MAX = HOS_KB_VERSION_1700 + HOS_KB_VERSION_1800 = 17, + HOS_KB_VERSION_MAX = HOS_KB_VERSION_1800 }; #define HOS_TSEC_VERSION 4 //! TODO: Update on TSEC Root Key changes. diff --git a/nyx/nyx_gui/hos/pkg1.c b/nyx/nyx_gui/hos/pkg1.c index 54d81f3..e0c8137 100644 --- a/nyx/nyx_gui/hos/pkg1.c +++ b/nyx/nyx_gui/hos/pkg1.c @@ -65,7 +65,8 @@ static const pkg1_id_t _pkg1_ids[] = { { "20220209", 13, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 14.0.0 - 14.1.2. { "20220801", 14, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 15.0.0 - 15.0.1. { "20230111", 15, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 16.0.0 - 16.1.0. - { "20230906", 16, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 17.0.0+ + { "20230906", 16, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 17.0.0 - 17.0.1. + { "20240207", 17, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 18.0.0+ }; const pkg1_id_t *pkg1_identify(u8 *pkg1, char *build_date) diff --git a/nyx/nyx_gui/hos/pkg2.c b/nyx/nyx_gui/hos/pkg2.c index 496c100..4fb4c3e 100644 --- a/nyx/nyx_gui/hos/pkg2.c +++ b/nyx/nyx_gui/hos/pkg2.c @@ -111,6 +111,8 @@ static const u8 mkey_vector_7xx[HOS_KB_VERSION_MAX - HOS_KB_VERSION_810 + 1][SE_ { 0xAF, 0x11, 0x4C, 0x67, 0x17, 0x7A, 0x52, 0x43, 0xF7, 0x70, 0x2F, 0xC7, 0xEF, 0x81, 0x72, 0x16 }, // Master key 15 encrypted with 16. (16.0.0 with 17.0.0) { 0x25, 0x12, 0x8B, 0xCB, 0xB5, 0x46, 0xA1, 0xF8, 0xE0, 0x52, 0x15, 0xB7, 0x0B, 0x57, 0x00, 0xBD }, + // Master key 16 encrypted with 17. (17.0.0 with 18.0.0) + { 0x58, 0x15, 0xD2, 0xF6, 0x8A, 0xE8, 0x19, 0xAB, 0xFB, 0x2D, 0x52, 0x9D, 0xE7, 0x55, 0xF3, 0x93 }, }; static bool _pkg2_key_unwrap_validate(pkg2_hdr_t *tmp_test, pkg2_hdr_t *hdr, u8 src_slot, u8 *mkey, const u8 *key_seed) From cfbbafe72f938bf8bd181fca38b4057ada2cffb3 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 29 Mar 2024 13:42:41 +0200 Subject: [PATCH 136/308] nyx: change imu cal warning message --- nyx/nyx_gui/frontend/gui_options.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/nyx/nyx_gui/frontend/gui_options.c b/nyx/nyx_gui/frontend/gui_options.c index 18be76f..401704a 100644 --- a/nyx/nyx_gui/frontend/gui_options.c +++ b/nyx/nyx_gui/frontend/gui_options.c @@ -1081,7 +1081,7 @@ disabled_or_cal0_issue:; "#FFDD00 and that you paired them in HOS!#"); if (cal_error) - strcat(txt_buf, "\n\n#FF8000 Warning:# Failed to get full calibration data!"); + s_printf(txt_buf + strlen(txt_buf), "\n\n#FF8000 Warning: Failed (%d) to get IMU calibration!#", cal_error); } else { From 9cfe1d21625ced55f7eba88e37be217ce7f965cf Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 29 Mar 2024 16:32:20 +0200 Subject: [PATCH 137/308] nyx: add info about 6.2" oem panel clone --- nyx/nyx_gui/frontend/gui_info.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index 7d0e523..adb3acf 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -858,6 +858,9 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) case PANEL_SAM_AMS699VC01: strcat(txt_buf, "Samsung AMS699VC01"); break; + case PANEL_OEM_CLONE_6_2: + strcat(txt_buf, "#FFDD00 OEM Clone 6.2\"#"); + break; case PANEL_OEM_CLONE_5_5: strcat(txt_buf, "#FFDD00 OEM Clone 5.5\"#"); break; From 9e1b2ee5731194eb2fd778866ffc3bb76edae2ea Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 29 Mar 2024 13:43:02 +0200 Subject: [PATCH 138/308] Bump hekate to v6.1.1 and Nyx to v1.6.1 --- Versions.inc | 4 ++-- bootloader/main.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/Versions.inc b/Versions.inc index d2066ea..c81c592 100644 --- a/Versions.inc +++ b/Versions.inc @@ -1,11 +1,11 @@ # IPL Version. BLVERSION_MAJOR := 6 BLVERSION_MINOR := 1 -BLVERSION_HOTFX := 0 +BLVERSION_HOTFX := 1 BLVERSION_RSVD := 0 # Nyx Version. NYXVERSION_MAJOR := 1 NYXVERSION_MINOR := 6 -NYXVERSION_HOTFX := 0 +NYXVERSION_HOTFX := 1 NYXVERSION_RSVD := 0 diff --git a/bootloader/main.c b/bootloader/main.c index 933aac3..65e2714 100644 --- a/bootloader/main.c +++ b/bootloader/main.c @@ -1478,7 +1478,7 @@ ment_t ment_top[] = { MDEF_END() }; -menu_t menu_top = { ment_top, "hekate v6.1.0", 0, 0 }; +menu_t menu_top = { ment_top, "hekate v6.1.1", 0, 0 }; extern void pivot_stack(u32 stack_top); From 35ea35f6ad5bcfe94ccdf583c9bcfcb83e36f1d9 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 29 Mar 2024 15:12:53 +0200 Subject: [PATCH 139/308] hos: pkg2: do not exit loop when non nogc --- bootloader/hos/pkg2.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/bootloader/hos/pkg2.c b/bootloader/hos/pkg2.c index b9272bf..8be5439 100644 --- a/bootloader/hos/pkg2.c +++ b/bootloader/hos/pkg2.c @@ -511,10 +511,7 @@ const char *pkg2_patch_kips(link_t *info, char *patch_names) } if (strcmp(patches[i], "nogc")) - { parse_external_kip_patches(); - break; - } } u32 kip_hash[SE_SHA_256_SIZE / sizeof(u32)]; From a6727f6e32a811ee56bd0138930462ccedf9e762 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 25 Apr 2024 04:38:04 +0300 Subject: [PATCH 140/308] bdk: display: update active regs on vsync for WinD Doing that on hsync can cause issues on disable without actually syncing to it. --- bdk/display/di.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/bdk/display/di.c b/bdk/display/di.c index 0b3301f..b032db1 100644 --- a/bdk/display/di.c +++ b/bdk/display/di.c @@ -914,6 +914,9 @@ u32 *display_init_framebuffer_log() void display_activate_console() { + // Only update active registers on vsync. + DISPLAY_A(_DIREG(DC_CMD_REG_ACT_CONTROL)) = DISPLAY_A(_DIREG(DC_CMD_REG_ACT_CONTROL)) & ~WIN_D_ACT_HCNTR_SEL; + // Select window D. DISPLAY_A(_DIREG(DC_CMD_DISPLAY_WINDOW_HEADER)) = WINDOW_D_SELECT; From e8d6516f437e5fb78bc02f4d29cf08078c4001f9 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 25 Apr 2024 04:38:57 +0300 Subject: [PATCH 141/308] bdk: display: use basic profile for OLED That's the one with the accurate sRGB colors. Anything else is over saturated. --- bdk/display/di.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/bdk/display/di.c b/bdk/display/di.c index b032db1..bcdf153 100644 --- a/bdk/display/di.c +++ b/bdk/display/di.c @@ -59,7 +59,7 @@ void display_wait_interrupt(u32 intr) // Interrupts are masked. Poll status register for checking if fired. while (!(DISPLAY_A(_DIREG(DC_CMD_INT_STATUS)) & intr)) - ; + ; } static void _display_dsi_wait(u32 timeout, u32 off, u32 mask) @@ -505,9 +505,9 @@ void display_init() { case PANEL_SAM_AMS699VC01: _display_dsi_send_cmd(MIPI_DSI_DCS_SHORT_WRITE, MIPI_DCS_EXIT_SLEEP_MODE, 180000); - // Set color mode to natural. Stock is Saturated (0x00). (Reset value is 0x20). + // Set color mode to basic (natural). Stock is Saturated (0x00). (Reset value is 0x20). _display_dsi_send_cmd(MIPI_DSI_DCS_SHORT_WRITE_PARAM, - MIPI_DCS_PRIV_SM_SET_COLOR_MODE | (DCS_SM_COLOR_MODE_NATURAL << 8), 0); + MIPI_DCS_PRIV_SM_SET_COLOR_MODE | (DCS_SM_COLOR_MODE_BASIC << 8), 0); // Enable backlight and smooth PWM. _display_dsi_send_cmd(MIPI_DSI_DCS_SHORT_WRITE_PARAM, MIPI_DCS_SET_CONTROL_DISPLAY | ((DCS_CONTROL_DISPLAY_BRIGHTNESS_CTRL | DCS_CONTROL_DISPLAY_DIMMING_CTRL) << 8), 0); From d92906db5ed816a4eaadfb0cdcb82f0b955e5a5e Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 25 Apr 2024 04:44:08 +0300 Subject: [PATCH 142/308] bdk: display: correct some reg names and add more --- bdk/display/di.h | 32 +++++++++++++++++++++----------- bdk/display/di.inl | 32 ++++++++++++++++---------------- 2 files changed, 37 insertions(+), 27 deletions(-) diff --git a/bdk/display/di.h b/bdk/display/di.h index d2ea5db..9e4c3b1 100644 --- a/bdk/display/di.h +++ b/bdk/display/di.h @@ -269,17 +269,18 @@ #define DC_DISP_BLEND_BACKGROUND_COLOR 0x4E4 #define DC_WINC_COLOR_PALETTE 0x500 -#define DC_WINC_COLOR_PALETTE_IDX(off) (DC_WINC_COLOR_PALETTE + (off)) +#define COLOR_PALETTE_IDX(off) (DC_WINC_COLOR_PALETTE + (off)) +#define COLOR_PALETTE_RGB(rgb) (byte_swap_32(rgb) >> 8) #define DC_WINC_PALETTE_COLOR_EXT 0x600 -#define DC_WIN_CSC_YOF 0x611 -#define DC_WIN_CSC_KYRGB 0x612 -#define DC_WIN_CSC_KUR 0x613 -#define DC_WIN_CSC_KVR 0x614 -#define DC_WIN_CSC_KUG 0x615 -#define DC_WIN_CSC_KVG 0x616 -#define DC_WIN_CSC_KUB 0x617 -#define DC_WIN_CSC_KVB 0x618 +#define DC_WINC_CSC_YOF 0x611 +#define DC_WINC_CSC_KYRGB 0x612 +#define DC_WINC_CSC_KUR 0x613 +#define DC_WINC_CSC_KVR 0x614 +#define DC_WINC_CSC_KUG 0x615 +#define DC_WINC_CSC_KVG 0x616 +#define DC_WINC_CSC_KUB 0x617 +#define DC_WINC_CSC_KVB 0x618 #define DC_WIN_AD_WIN_OPTIONS 0xB80 #define DC_WIN_BD_WIN_OPTIONS 0xD80 #define DC_WIN_CD_WIN_OPTIONS 0xF80 @@ -292,13 +293,12 @@ #define COLOR_EXPAND BIT(6) #define COLOR_PALETTE_ENABLE BIT(16) #define CSC_ENABLE BIT(18) +#define DV_ENABLE BIT(20) #define WIN_ENABLE BIT(30) #define DC_WIN_BUFFER_CONTROL 0x702 #define BUFFER_CONTROL_HOST 0 #define BUFFER_CONTROL_VI 1 -#define BUFFER_CONTROL_EPP 2 -#define BUFFER_CONTROL_MPEGE 3 #define BUFFER_CONTROL_SB2D 4 #define DC_WIN_COLOR_DEPTH 0x703 @@ -324,6 +324,10 @@ #define WIN_COLOR_DEPTH_YUV422R 0x17 #define WIN_COLOR_DEPTH_YCbCr422RA 0x18 #define WIN_COLOR_DEPTH_YUV422RA 0x19 +#define WIN_COLOR_DEPTH_X1R5G5B5 0x1E +#define WIN_COLOR_DEPTH_R5G5B5X1 0x1F +#define WIN_COLOR_DEPTH_X1B5G5R5 0x20 +#define WIN_COLOR_DEPTH_B5G5R5X1 0x21 #define WIN_COLOR_DEPTH_YCbCr444P 0x29 #define WIN_COLOR_DEPTH_YCrCb420SP 0x2A #define WIN_COLOR_DEPTH_YCbCr420SP 0x2B @@ -359,7 +363,11 @@ #define DC_WIN_LINE_STRIDE 0x70A #define LINE_STRIDE(x) (x) #define UV_LINE_STRIDE(x) (((x) & 0xffff) << 16) + #define DC_WIN_DV_CONTROL 0x70E +#define DV_CTRL_R(r) (((r) & 7) << 16) +#define DV_CTRL_G(g) (((g) & 7) << 8) +#define DV_CTRL_B(b) (((b) & 7) << 0) #define DC_WINBUF_BLEND_LAYER_CONTROL 0x716 #define WIN_BLEND_DEPTH(x) (((x) & 0xff) << 0) @@ -408,6 +416,8 @@ #define BLOCK (2 << 0) #define BLOCK_HEIGHT(x) (((x) & 0x7) << 4) +#define DC_WINBUF_MEMFETCH_CONTROL 0x82B + /*! Display serial interface registers. */ #define _DSIREG(reg) ((reg) * 4) diff --git a/bdk/display/di.inl b/bdk/display/di.inl index 61569a7..56202a7 100644 --- a/bdk/display/di.inl +++ b/bdk/display/di.inl @@ -39,14 +39,14 @@ static const cfg_op_t _di_dc_setup_win_config[] = { {DC_WIN_WIN_OPTIONS, 0}, {DC_WIN_DV_CONTROL, 0}, /* Setup default YUV colorspace conversion coefficients */ - {DC_WIN_CSC_YOF, 0xF0}, - {DC_WIN_CSC_KYRGB, 0x12A}, - {DC_WIN_CSC_KUR, 0}, - {DC_WIN_CSC_KVR, 0x198}, - {DC_WIN_CSC_KUG, 0x39B}, - {DC_WIN_CSC_KVG, 0x32F}, - {DC_WIN_CSC_KUB, 0x204}, - {DC_WIN_CSC_KVB, 0}, + {DC_WINC_CSC_YOF, 0xF0}, + {DC_WINC_CSC_KYRGB, 0x12A}, + {DC_WINC_CSC_KUR, 0}, + {DC_WINC_CSC_KVR, 0x198}, + {DC_WINC_CSC_KUG, 0x39B}, + {DC_WINC_CSC_KVG, 0x32F}, + {DC_WINC_CSC_KUB, 0x204}, + {DC_WINC_CSC_KVB, 0}, /* End of color coefficients */ {DC_DISP_DISP_COLOR_CONTROL, BASE_COLOR_SIZE_888}, @@ -293,14 +293,14 @@ static const cfg_op_t _di_dc_video_enable_config[] = { {DC_WIN_WIN_OPTIONS, 0}, {DC_WIN_DV_CONTROL, 0}, /* Setup default YUV colorspace conversion coefficients */ - {DC_WIN_CSC_YOF, 0xF0}, - {DC_WIN_CSC_KYRGB, 0x12A}, - {DC_WIN_CSC_KUR, 0}, - {DC_WIN_CSC_KVR, 0x198}, - {DC_WIN_CSC_KUG, 0x39B}, - {DC_WIN_CSC_KVG, 0x32F}, - {DC_WIN_CSC_KUB, 0x204}, - {DC_WIN_CSC_KVB, 0}, + {DC_WINC_CSC_YOF, 0xF0}, + {DC_WINC_CSC_KYRGB, 0x12A}, + {DC_WINC_CSC_KUR, 0}, + {DC_WINC_CSC_KVR, 0x198}, + {DC_WINC_CSC_KUG, 0x39B}, + {DC_WINC_CSC_KVG, 0x32F}, + {DC_WINC_CSC_KUB, 0x204}, + {DC_WINC_CSC_KVB, 0}, /* End of color coefficients */ {DC_DISP_DISP_COLOR_CONTROL, BASE_COLOR_SIZE_888}, From 96efa7a002c13c8827baae022b21565cf882c2f6 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 25 Apr 2024 04:44:22 +0300 Subject: [PATCH 143/308] bdk: vic: add support for P8 and R5G5B5 --- bdk/display/vic.c | 3 +++ bdk/display/vic.h | 5 ++++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/bdk/display/vic.c b/bdk/display/vic.c index c9a0c59..145eb09 100644 --- a/bdk/display/vic.c +++ b/bdk/display/vic.c @@ -406,6 +406,9 @@ void vic_set_surface(vic_surface_t *sfc) // Get format alpha type. switch (sfc->pix_fmt) { + case VIC_PIX_FORMAT_L8: + case VIC_PIX_FORMAT_X1B5G5R5: + case VIC_PIX_FORMAT_B5G5R5X1: case VIC_PIX_FORMAT_X8B8G8R8: case VIC_PIX_FORMAT_X8R8G8B8: case VIC_PIX_FORMAT_B8G8R8X8: diff --git a/bdk/display/vic.h b/bdk/display/vic.h index 0014926..54a3007 100644 --- a/bdk/display/vic.h +++ b/bdk/display/vic.h @@ -33,6 +33,10 @@ typedef enum _vic_rotation_t typedef enum _vic_pix_format_t { + VIC_PIX_FORMAT_L8 = 1, // 8-bit LUT. + VIC_PIX_FORMAT_X1B5G5R5 = 21, // 16-bit XBGR. + VIC_PIX_FORMAT_B5G5R5X1 = 23, // 16-bit BGRX. + VIC_PIX_FORMAT_A8B8G8R8 = 31, // 32-bit ABGR. VIC_PIX_FORMAT_A8R8G8B8 = 32, // 32-bit ARGB. VIC_PIX_FORMAT_B8G8R8A8 = 33, // 32-bit BGRA. @@ -42,7 +46,6 @@ typedef enum _vic_pix_format_t VIC_PIX_FORMAT_X8R8G8B8 = 36, // 32-bit XRGB. VIC_PIX_FORMAT_B8G8R8X8 = 37, // 32-bit BGRX. VIC_PIX_FORMAT_R8G8B8X8 = 38, // 32-bit RGBX. - } vic_pix_format_t; typedef struct _vic_surface_t From 902ccede9a606d155cd7041cc29e53c7596ba257 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 25 Apr 2024 04:45:50 +0300 Subject: [PATCH 144/308] bdk: joycon: use proper bits for batt levels --- bdk/input/joycon.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/bdk/input/joycon.c b/bdk/input/joycon.c index efdcd75..21a668a 100644 --- a/bdk/input/joycon.c +++ b/bdk/input/joycon.c @@ -104,10 +104,10 @@ enum enum { JC_BATT_EMTPY = 0, - JC_BATT_CRIT = 2, - JC_BATT_LOW = 4, - JC_BATT_MID = 6, - JC_BATT_FULL = 8 + JC_BATT_CRIT = 1, + JC_BATT_LOW = 2, + JC_BATT_MID = 3, + JC_BATT_FULL = 4 }; static const u8 sio_init[] = { @@ -596,9 +596,9 @@ static void _jc_charging_decider(u8 batt, u8 uart) u32 system_batt_enough = max17050_get_cached_batt_volt() > 4000; // Power supply control based on battery levels and charging. - if ((batt >> 1 << 1) < JC_BATT_LOW) // Level without checking charging. + if ((batt >> 1) < JC_BATT_LOW) // Level without checking charging. _jc_power_supply(uart, true); - else if (batt > (system_batt_enough ? JC_BATT_FULL : JC_BATT_MID)) // Addresses the charging bit. + else if (batt > (system_batt_enough ? JC_BATT_FULL : JC_BATT_MID) << 1) // Addresses the charging bit. _jc_power_supply(uart, false); } From 28960728f95cbac8eca3e1f1ba48fd3ac0154028 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 25 Apr 2024 04:46:27 +0300 Subject: [PATCH 145/308] bdk: joycon: add bit numbers on the button struct --- bdk/input/joycon.h | 50 +++++++++++++++++++++++----------------------- 1 file changed, 25 insertions(+), 25 deletions(-) diff --git a/bdk/input/joycon.h b/bdk/input/joycon.h index af0a849..fbb789f 100644 --- a/bdk/input/joycon.h +++ b/bdk/input/joycon.h @@ -43,34 +43,34 @@ typedef struct _jc_gamepad_rpt_t struct { // Joy-Con (R). - u32 y:1; - u32 x:1; - u32 b:1; - u32 a:1; - u32 sr_r:1; - u32 sl_r:1; - u32 r:1; - u32 zr:1; +/*00*/ u32 y:1; +/*01*/ u32 x:1; +/*02*/ u32 b:1; +/*03*/ u32 a:1; +/*04*/ u32 sr_r:1; +/*05*/ u32 sl_r:1; +/*06*/ u32 r:1; +/*07*/ u32 zr:1; // Shared - u32 minus:1; - u32 plus:1; - u32 r3:1; - u32 l3:1; - u32 home:1; - u32 cap:1; - u32 pad:1; - u32 wired:1; +/*08*/ u32 minus:1; +/*09*/ u32 plus:1; +/*10*/ u32 r3:1; +/*11*/ u32 l3:1; +/*12*/ u32 home:1; +/*13*/ u32 cap:1; +/*14*/ u32 pad:1; +/*15*/ u32 wired:1; // Joy-Con (L). - u32 down:1; - u32 up:1; - u32 right:1; - u32 left:1; - u32 sr_l:1; - u32 sl_l:1; - u32 l:1; - u32 zl:1; +/*16*/ u32 down:1; +/*17*/ u32 up:1; +/*18*/ u32 right:1; +/*19*/ u32 left:1; +/*20*/ u32 sr_l:1; +/*21*/ u32 sl_l:1; +/*22*/ u32 l:1; +/*23*/ u32 zl:1; }; u32 buttons; }; @@ -105,4 +105,4 @@ void jc_deinit(); jc_gamepad_rpt_t *joycon_poll(); jc_gamepad_rpt_t *jc_get_bt_pairing_info(bool *is_l_hos, bool *is_r_hos); -#endif \ No newline at end of file +#endif From 62153fdfbb62227bcf6d75cbfa3d573b160c030f Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 25 Apr 2024 04:48:09 +0300 Subject: [PATCH 146/308] bdk: types: add likely/unlikely global macros --- bdk/libs/compr/lz4.c | 10 ---------- bdk/utils/types.h | 2 ++ 2 files changed, 2 insertions(+), 10 deletions(-) diff --git a/bdk/libs/compr/lz4.c b/bdk/libs/compr/lz4.c index 689c4d1..d6c22c6 100644 --- a/bdk/libs/compr/lz4.c +++ b/bdk/libs/compr/lz4.c @@ -92,16 +92,6 @@ # define LZ4_FORCE_O2_INLINE_GCC_PPC64LE static #endif -#if (defined(__GNUC__) && (__GNUC__ >= 3)) || (defined(__INTEL_COMPILER) && (__INTEL_COMPILER >= 800)) || defined(__clang__) -# define expect(expr,value) (__builtin_expect ((expr),(value)) ) -#else -# define expect(expr,value) (expr) -#endif - -#define likely(expr) expect((expr) != 0, 1) -#define unlikely(expr) expect((expr) != 0, 0) - - /*-************************************ * Memory routines **************************************/ diff --git a/bdk/utils/types.h b/bdk/utils/types.h index 02fd05c..0bed56b 100644 --- a/bdk/utils/types.h +++ b/bdk/utils/types.h @@ -102,6 +102,8 @@ typedef unsigned long uptr; #define byte_swap_32(num) ((((num) >> 24) & 0xff) | (((num) << 8) & 0xff0000) | \ (((num) >> 8 ) & 0xff00) | (((num) << 24) & 0xff000000)) +#define likely(x) (__builtin_expect((x) != 0, 1)) +#define unlikely(x) (__builtin_expect((x) != 0, 0)) /* Bootloader/Nyx */ #define BOOT_CFG_AUTOBOOT_EN BIT(0) From 2648a2655cf7c4f7cadb49dcf41fb76bfb401c6a Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 25 Apr 2024 04:50:07 +0300 Subject: [PATCH 147/308] bdk: sdram: add info about custom 8GB T210 config That's a suggestion on which 4GB modules are certainly fine to use. --- bdk/mem/sdram.h | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/bdk/mem/sdram.h b/bdk/mem/sdram.h index 5e885ab..d625ee2 100644 --- a/bdk/mem/sdram.h +++ b/bdk/mem/sdram.h @@ -48,7 +48,14 @@ enum sdram_ids_erista LPDDR4_ICOSA_6GB_SAMSUNG_K4FHE3D4HM_MGCH = 4, // Die-C. (2y-01). - // Custom hekate/L4T supported 8GB. 7 dram id can be easily applied in fuses. + /* + * Custom hekate/L4T supported 8GB. 7 dram id can be easily applied in fuses. + * + * 4GB modules: + * Samsung K4FBE3D4HM-MGCH/CJ/CL. MG/TF/GF/TH/GH: Package + Temperature. + * Hynix H9HCNNNCPUMLXR-NME/NEE/NEI. E/I: Temperature. + * Hynix H54G56BYYVX046/QX046/PX046. V/Q/P: Package + Temperature. + */ LPDDR4_ICOSA_8GB_SAMSUNG_K4FBE3D4HM_MGXX = 7, // XX: CH/CJ/CL. }; From ec2e62236a6fab45e83b836900f5cff6ad6c73ae Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 25 Apr 2024 04:52:13 +0300 Subject: [PATCH 148/308] bdk: pinmux: add i2s pin config --- bdk/soc/pinmux.c | 9 +++++++++ bdk/soc/pinmux.h | 10 ++++++++++ 2 files changed, 19 insertions(+) diff --git a/bdk/soc/pinmux.c b/bdk/soc/pinmux.c index 288a4f7..84969c6 100644 --- a/bdk/soc/pinmux.c +++ b/bdk/soc/pinmux.c @@ -1,5 +1,6 @@ /* * Copyright (c) 2018 naehrwert + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -30,3 +31,11 @@ void pinmux_config_i2c(u32 idx) PINMUX_AUX(PINMUX_AUX_X_I2C_SCL(idx)) = PINMUX_INPUT_ENABLE; PINMUX_AUX(PINMUX_AUX_X_I2C_SDA(idx)) = PINMUX_INPUT_ENABLE; } + +void pinmux_config_i2s(u32 idx) +{ + PINMUX_AUX(PINMUX_AUX_X_I2S_LRCK(idx)) = PINMUX_DRIVE_4X | PINMUX_PULL_DOWN; + PINMUX_AUX(PINMUX_AUX_X_I2C_DIN(idx)) = PINMUX_DRIVE_4X | PINMUX_INPUT_ENABLE | PINMUX_TRISTATE | PINMUX_PULL_DOWN; + PINMUX_AUX(PINMUX_AUX_X_I2C_DOUT(idx)) = PINMUX_DRIVE_4X | PINMUX_PULL_DOWN; + PINMUX_AUX(PINMUX_AUX_X_I2C_BCLK(idx)) = PINMUX_DRIVE_4X | PINMUX_PULL_DOWN; +} diff --git a/bdk/soc/pinmux.h b/bdk/soc/pinmux.h index 070ce1e..f9ad5af 100644 --- a/bdk/soc/pinmux.h +++ b/bdk/soc/pinmux.h @@ -1,5 +1,6 @@ /* * Copyright (c) 2018 naehrwert + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -50,6 +51,7 @@ #define PINMUX_AUX_DAP4_DOUT 0x14C #define PINMUX_AUX_DAP4_SCLK 0x150 #define PINMUX_AUX_CLK_32K_OUT 0x164 +#define PINMUX_AUX_AUD_MCLK 0x180 #define PINMUX_AUX_GPIO_X1_AUD 0x18C #define PINMUX_AUX_GPIO_X3_AUD 0x190 #define PINMUX_AUX_SPDIF_IN 0x1A4 @@ -69,6 +71,7 @@ #define PINMUX_AUX_LCD_RST 0x204 #define PINMUX_AUX_LCD_GPIO1 0x208 #define PINMUX_AUX_LCD_GPIO2 0x20C +#define PINMUX_AUX_TOUCH_RST 0x214 #define PINMUX_AUX_TOUCH_CLK 0x218 #define PINMUX_AUX_TOUCH_INT 0x220 #define PINMUX_AUX_MOTION_INT 0x224 @@ -81,6 +84,7 @@ #define PINMUX_AUX_GPIO_PK3 0x260 #define PINMUX_AUX_GPIO_PK7 0x270 #define PINMUX_AUX_GPIO_PZ1 0x280 +#define PINMUX_AUX_GPIO_PZ4 0x28C /* Only in T210B01 */ #define PINMUX_AUX_SDMMC2_DAT0 0x294 #define PINMUX_AUX_SDMMC2_DAT1 0x298 @@ -101,6 +105,11 @@ /*! 0:GEN1, 1:GEN2, 2:GEN3, 3:CAM, 4:PWR */ #define PINMUX_AUX_X_I2C_SCL(x) (0xBC + 8 * (x)) #define PINMUX_AUX_X_I2C_SDA(x) (0xC0 + 8 * (x)) +/*! 0:I2S1, 1:I2S2 */ +#define PINMUX_AUX_X_I2S_LRCK(x) (0x124 + 0x10 * (x)) +#define PINMUX_AUX_X_I2C_DIN(x) (0x128 + 0x10 * (x)) +#define PINMUX_AUX_X_I2C_DOUT(x) (0x12c + 0x10 * (x)) +#define PINMUX_AUX_X_I2C_BCLK(x) (0x130 + 0x10 * (x)) #define PINMUX_FUNC_MASK (3 << 0) @@ -130,5 +139,6 @@ void pinmux_config_uart(u32 idx); void pinmux_config_i2c(u32 idx); +void pinmux_config_i2s(u32 idx); #endif From 90b9f9f5899d96f6fc0bda2c589063ae729cc01e Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 25 Apr 2024 04:53:06 +0300 Subject: [PATCH 149/308] hos: add comments about autonogc --- bootloader/hos/hos.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/bootloader/hos/hos.c b/bootloader/hos/hos.c index 1a6117e..3ec0d24 100644 --- a/bootloader/hos/hos.c +++ b/bootloader/hos/hos.c @@ -839,7 +839,7 @@ int hos_launch(ini_sec_t *cfg) if (!ctxt.stock) { u32 fuses = fuse_read_odm(7); - if ((h_cfg.autonogc && + if ((h_cfg.autonogc && // Prevent GC fuse burning (sysMMC and emuMMC). ( (!(fuses & ~0xF) && (ctxt.pkg1_id->fuses >= 5)) || // LAFW v2, 4.0.0+ (!(fuses & ~0x3FF) && (ctxt.pkg1_id->fuses >= 11)) || // LAFW v3, 9.0.0+ @@ -848,12 +848,12 @@ int hos_launch(ini_sec_t *cfg) (!(fuses & ~0x3FFF) && (ctxt.pkg1_id->fuses >= 15)) // LAFW v5, 12.0.2+ ) ) - || ((emummc_enabled) && + || ((emummc_enabled) && // Force NOGC if already burnt (only emuMMC). ( - ((fuses & 0x400) && (ctxt.pkg1_id->fuses <= 10)) || // HOS 9.0.0+ fuses burnt. - ((fuses & 0x2000) && (ctxt.pkg1_id->fuses <= 13)) || // HOS 11.0.0+ fuses burnt. - // Detection broken! Use kip1patch=nogc // HOS 12.0.0+ - ((fuses & 0x4000) && (ctxt.pkg1_id->fuses <= 14)) // HOS 12.0.2+ fuses burnt. + ((fuses & BIT(10)) && (ctxt.pkg1_id->fuses <= 10)) || // HOS 9.0.0+ fuses burnt. + ((fuses & BIT(13)) && (ctxt.pkg1_id->fuses <= 13)) || // HOS 11.0.0+ fuses burnt. + // Detection broken! Use kip1patch=nogc // HOS 12.0.0+ + ((fuses & BIT(14)) && (ctxt.pkg1_id->fuses <= 14)) // HOS 12.0.2+ fuses burnt. ) )) config_kip1patch(&ctxt, "nogc"); From 38f4902e1d55198ca57bfd9782663956f8e5dda9 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 25 Apr 2024 04:54:58 +0300 Subject: [PATCH 150/308] nyx: info: change touch fw version format --- nyx/nyx_gui/frontend/gui_info.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index adb3acf..c6de815 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -917,7 +917,8 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) else strcat(txt_buf, "#FFDD00 Error!#"); - s_printf(txt_buf + strlen(txt_buf), "\n#FF8000 ID:# %08X (", touch_fw.fw_id); + s_printf(txt_buf + strlen(txt_buf), "\n#FF8000 ID:# %02X.%02X.%02X.%02X (", + (touch_fw.fw_id >> 24) & 0xFF, (touch_fw.fw_id >> 24) & 0xFF, (touch_fw.fw_id >> 24) & 0xFF, touch_fw.fw_id & 0xFF); // Check panel pair info. switch (touch_fw.fw_id) From 77782b974c3458e6ff28ac48a270001b8756d358 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 25 Apr 2024 04:55:17 +0300 Subject: [PATCH 151/308] nyx: info: report oem id for eMMC --- nyx/nyx_gui/frontend/gui_info.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index c6de815..b18aad7 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -1628,10 +1628,11 @@ static lv_res_t _create_window_emmc_info_status(lv_obj_t *btn) break; } - s_printf(txt_buf + strlen(txt_buf), "(%02X)\n%c%c%c%c%c%c\n%d.%d\n%04X\n%02d/%04d\n\n", + s_printf(txt_buf + strlen(txt_buf), "(%02X)\n%c%c%c%c%c%c (%02X)\n%d.%d\n%04X\n%02d/%04d\n\n", emmc_storage.cid.manfid, emmc_storage.cid.prod_name[0], emmc_storage.cid.prod_name[1], emmc_storage.cid.prod_name[2], emmc_storage.cid.prod_name[3], emmc_storage.cid.prod_name[4], emmc_storage.cid.prod_name[5], + emmc_storage.cid.oemid, emmc_storage.cid.prv & 0xF, emmc_storage.cid.prv >> 4, emmc_storage.cid.serial, emmc_storage.cid.month, emmc_storage.cid.year); From 856994e4f45fe4b3af3dd89eebc8b68778608dce Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 25 Apr 2024 04:56:38 +0300 Subject: [PATCH 152/308] bdk: sprintf: add right padding support --- bdk/utils/sprintf.c | 53 ++++++++++++++++++++++++++++++++++++++++----- bdk/utils/sprintf.h | 20 ++++++++++++++++- 2 files changed, 66 insertions(+), 7 deletions(-) diff --git a/bdk/utils/sprintf.c b/bdk/utils/sprintf.c index 0ba1466..d21c5be 100644 --- a/bdk/utils/sprintf.c +++ b/bdk/utils/sprintf.c @@ -28,10 +28,32 @@ static void _s_putc(char c) *sout_buf += 1; } -static void _s_puts(char *s) +static void _s_putspace(int fcnt) { + if (fcnt <= 0) + return; + + for (int i = 0; i < fcnt; i++) + _s_putc(' '); +} + +static void _s_puts(char *s, char fill, int fcnt) +{ + if (fcnt) + { + fcnt = fcnt - strlen(s); + + // Left padding. Check if padding is not space based (dot counts as such). + if (fill != '.') + _s_putspace(fcnt); + } + for (; *s; s++) _s_putc(*s); + + // Right padding. Check if padding is space based (dot counts as such). + if (fill == '.') + _s_putspace(fcnt); } static void _s_putn(u32 v, int base, char fill, int fcnt) @@ -75,9 +97,28 @@ static void _s_putn(u32 v, int base, char fill, int fcnt) } } - _s_puts(p); + _s_puts(p, 0, 0); } +/* + * Padding: + * Numbers: + * %3d: Fill: ' ', Count: 3. + * % 3d: Fill: ' ', Count: 3. + * %.3d: Fill: '.', Count: 3. + * %23d: Fill: '2', Count: 3. + * % 23d: Fill: ' ', Count: 23. + * %223d: Fill: '2', Count: 23. + * + * Strings, Fill: ' ': + * %3s: Count: 5, Left. + * %23s: Count: 5, Left. + * %223s: Count: 25, Left. + * %.3s: Count: 5, Right. + * %.23s: Count: 25, Right. + * %.223s: Count: 225, Right. + */ + void s_printf(char *out_buf, const char *fmt, ...) { va_list ap; @@ -94,8 +135,8 @@ void s_printf(char *out_buf, const char *fmt, ...) fill = 0; fcnt = 0; - // Check for padding. Number or space based. - if ((*fmt >= '0' && *fmt <= '9') || *fmt == ' ') + // Check for padding. Number or space based (dot count as space for string). + if ((*fmt >= '0' && *fmt <= '9') || *fmt == ' ' || *fmt == '.') { fcnt = *fmt; // Padding size or padding type. fmt++; @@ -132,7 +173,7 @@ parse_padding_dec: break; case 's': - _s_puts(va_arg(ap, char *)); + _s_puts(va_arg(ap, char *), fill, fcnt); break; case 'd': @@ -221,7 +262,7 @@ parse_padding_dec: break; case 's': - _s_puts(va_arg(ap, char *)); + _s_puts(va_arg(ap, char *), fill, fcnt); break; case 'd': diff --git a/bdk/utils/sprintf.h b/bdk/utils/sprintf.h index c523267..94ce468 100644 --- a/bdk/utils/sprintf.h +++ b/bdk/utils/sprintf.h @@ -21,7 +21,25 @@ #include +/* + * Padding: + * Numbers: + * %3d: Fill: ' ', Count: 3. + * % 3d: Fill: ' ', Count: 3. + * %23d: Fill: '2', Count: 3. + * % 23d: Fill: ' ', Count: 23. + * %223d: Fill: '2', Count: 23. + * + * Strings, Fill: ' ': + * %3s: Count: 5, Left. + * %23s: Count: 5, Left. + * %223s: Count: 25, Left. + * %.3s: Count: 5, Right. + * %.23s: Count: 25, Right. + * %.223s: Count: 225, Right. + */ + void s_printf(char *out_buf, const char *fmt, ...) __attribute__((format(printf, 2, 3))); void s_vprintf(char *out_buf, const char *fmt, va_list ap); -#endif \ No newline at end of file +#endif From ef1e328e110c2e14bdb773060d88ae1cf4f5eb01 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 25 Apr 2024 04:57:31 +0300 Subject: [PATCH 153/308] bdk: info: revamp eMMC partition table info Allow a max of 20 partitions to be shown --- nyx/nyx_gui/frontend/gui_info.c | 27 +++++++++++++++------------ 1 file changed, 15 insertions(+), 12 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index b18aad7..8371b8b 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -1743,10 +1743,10 @@ static lv_res_t _create_window_emmc_info_status(lv_obj_t *btn) u32 boot_size = emmc_storage.ext_csd.boot_mult << 17; u32 rpmb_size = emmc_storage.ext_csd.rpmb_mult << 17; strcpy(txt_buf, "#00DDFF eMMC Physical Partitions:#\n"); - s_printf(txt_buf + strlen(txt_buf), "1: #96FF00 BOOT0# Size: %6d KiB (Sect: 0x%08X)\n", boot_size / 1024, boot_size / EMMC_BLOCKSIZE); - s_printf(txt_buf + strlen(txt_buf), "2: #96FF00 BOOT1# Size: %6d KiB (Sect: 0x%08X)\n", boot_size / 1024, boot_size / EMMC_BLOCKSIZE); - s_printf(txt_buf + strlen(txt_buf), "3: #96FF00 RPMB# Size: %6d KiB (Sect: 0x%08X)\n", rpmb_size / 1024, rpmb_size / EMMC_BLOCKSIZE); - s_printf(txt_buf + strlen(txt_buf), "0: #96FF00 GPP# Size: %6d MiB (Sect: 0x%08X)\n", emmc_storage.sec_cnt >> SECTORS_TO_MIB_COEFF, emmc_storage.sec_cnt); + s_printf(txt_buf + strlen(txt_buf), "1: #96FF00 BOOT0# Size: %6d KiB Sectors: 0x%08X\n", boot_size / 1024, boot_size / EMMC_BLOCKSIZE); + s_printf(txt_buf + strlen(txt_buf), "2: #96FF00 BOOT1# Size: %6d KiB Sectors: 0x%08X\n", boot_size / 1024, boot_size / EMMC_BLOCKSIZE); + s_printf(txt_buf + strlen(txt_buf), "3: #96FF00 RPMB# Size: %6d KiB Sectors: 0x%08X\n", rpmb_size / 1024, rpmb_size / EMMC_BLOCKSIZE); + s_printf(txt_buf + strlen(txt_buf), "0: #96FF00 GPP# Size: %6d MiB Sectors: 0x%08X\n", emmc_storage.sec_cnt >> SECTORS_TO_MIB_COEFF, emmc_storage.sec_cnt); strcat(txt_buf, "\n#00DDFF GPP (eMMC USER) Partition Table:#\n"); emmc_set_partition(EMMC_GPP); @@ -1754,28 +1754,31 @@ static lv_res_t _create_window_emmc_info_status(lv_obj_t *btn) emmc_gpt_parse(&gpt); u32 idx = 0; + u32 lines_left = 20; + s_printf(txt_buf + strlen(txt_buf), "#FFBA00 Idx Name Size Offset Sectors#\n"); LIST_FOREACH_ENTRY(emmc_part_t, part, &gpt, link) { - if (idx > 10) + int lines = strlen(part->name) > 25 ? 2 : 1; + if ((lines_left - lines) <= 0) { strcat(txt_buf, "#FFDD00 Table does not fit on screen!#"); break; } - if (part->index < 2) + if (lines == 2) { - s_printf(txt_buf + strlen(txt_buf), "%02d: #96FF00 %s#%s Size: %d MiB (Sect: 0x%X), Start: %06X\n", - part->index, part->name, !part->name[8] ? " " : "", - (part->lba_end - part->lba_start + 1) >> SECTORS_TO_MIB_COEFF, - part->lba_end - part->lba_start + 1, part->lba_start); + s_printf(txt_buf + strlen(txt_buf), "%02d: #96FF00 %s#\n %6d MiB %8Xh %8Xh\n", + part->index, part->name, (part->lba_end - part->lba_start + 1) >> SECTORS_TO_MIB_COEFF, + part->lba_start, part->lba_end - part->lba_start + 1); } else { - s_printf(txt_buf + strlen(txt_buf), "%02d: #96FF00 %s#\n Size: %7d MiB (Sect: 0x%07X), Start: %07X\n", + s_printf(txt_buf + strlen(txt_buf), "%02d: #96FF00 %.25s# %6d MiB %8Xh %8Xh\n", part->index, part->name, (part->lba_end - part->lba_start + 1) >> SECTORS_TO_MIB_COEFF, - part->lba_end - part->lba_start + 1, part->lba_start); + part->lba_start, part->lba_end - part->lba_start + 1); } + lines_left -= lines; idx++; } if (!idx) From 16eb6a3c4493557cc12c13d3dfeab950ccc124fa Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 25 Apr 2024 16:57:43 +0300 Subject: [PATCH 154/308] bdk: types: do not overflow on byte swaps Addresses warning message. --- bdk/utils/types.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/bdk/utils/types.h b/bdk/utils/types.h index 0bed56b..66c5d60 100644 --- a/bdk/utils/types.h +++ b/bdk/utils/types.h @@ -98,9 +98,9 @@ typedef unsigned long uptr; #define OFFSET_OF(t, m) ((uptr)&((t *)NULL)->m) #define CONTAINER_OF(mp, t, mn) ((t *)((uptr)mp - OFFSET_OF(t, mn))) -#define byte_swap_16(num) ((((num) >> 8) & 0xff) | (((num) << 8) & 0xff00)) -#define byte_swap_32(num) ((((num) >> 24) & 0xff) | (((num) << 8) & 0xff0000) | \ - (((num) >> 8 ) & 0xff00) | (((num) << 24) & 0xff000000)) +#define byte_swap_16(num) ((((num) >> 8) & 0xFF) | (((num) & 0xFF) << 8)) +#define byte_swap_32(num) ((((num) >> 24) & 0xFF) | (((num) & 0xFF00) << 8 ) | \ + (((num) >> 8 ) & 0xFF00) | (((num) & 0xFF) << 24)) #define likely(x) (__builtin_expect((x) != 0, 1)) #define unlikely(x) (__builtin_expect((x) != 0, 0)) From 985c513770f5f535ec5a756850168b636cd28585 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 19 May 2024 10:07:06 +0300 Subject: [PATCH 155/308] bdk: hwinit: add arbiter config --- bdk/soc/hw_init.c | 26 +++++++++++++++++++++++++- bdk/soc/hw_init.h | 3 ++- 2 files changed, 27 insertions(+), 2 deletions(-) diff --git a/bdk/soc/hw_init.c b/bdk/soc/hw_init.c index 62a4446..af7746c 100644 --- a/bdk/soc/hw_init.c +++ b/bdk/soc/hw_init.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2023 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -93,6 +93,24 @@ static void _config_oscillators() CLOCK(CLK_RST_CONTROLLER_CLK_SYSTEM_RATE) = 2; // Set HCLK div to 1 and PCLK div to 3. } +void hw_config_arbiter(bool reset) +{ + if (reset) + { + ARB_PRI(ARB_PRIO_CPU_PRIORITY) = 0x0040090; + ARB_PRI(ARB_PRIO_COP_PRIORITY) = 0x12024C2; + ARB_PRI(ARB_PRIO_VCP_PRIORITY) = 0x2201209; + ARB_PRI(ARB_PRIO_DMA_PRIORITY) = 0x320365B; + } + else + { + ARB_PRI(ARB_PRIO_CPU_PRIORITY) = 0x12412D1; + ARB_PRI(ARB_PRIO_COP_PRIORITY) = 0x0000000; + ARB_PRI(ARB_PRIO_VCP_PRIORITY) = 0x220244A; + ARB_PRI(ARB_PRIO_DMA_PRIORITY) = 0x320369B; + } +} + // The uart is skipped for Copper, Hoag and Calcio. Used in Icosa, Iowa and Aula. static void _config_gpios(bool nx_hoag) { @@ -406,6 +424,9 @@ void hw_init() PMC(APBDEV_PMC_TZRAM_SEC_DISABLE) = PMC_TZRAM_DISABLE_REG_WRITE | PMC_TZRAM_DISABLE_REG_READ; } + // Set arbiter. + hw_config_arbiter(false); + // Initialize External memory controller and configure DRAM parameters. sdram_init(); @@ -439,6 +460,9 @@ void hw_reinit_workaround(bool coreboot, u32 bl_magic) // Flush/disable MMU cache. bpmp_mmu_disable(); + // Reset arbiter. + hw_config_arbiter(true); + // Re-enable clocks to Audio Processing Engine as a workaround to hanging. if (tegra_t210) { diff --git a/bdk/soc/hw_init.h b/bdk/soc/hw_init.h index aebb021..fe6f6af 100644 --- a/bdk/soc/hw_init.h +++ b/bdk/soc/hw_init.h @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2021 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -28,6 +28,7 @@ extern u32 hw_rst_reason; void hw_init(); void hw_reinit_workaround(bool coreboot, u32 magic); +void hw_config_arbiter(bool reset); u32 hw_get_chip_id(); #endif From 1214ab0e02578e0a51fa4288646305bd7e0b006f Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 19 May 2024 10:12:18 +0300 Subject: [PATCH 156/308] ldr/bl: manage arbiter --- bootloader/hos/hos.c | 3 +++ loader/loader.c | 8 +++++++- 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/bootloader/hos/hos.c b/bootloader/hos/hos.c index 3ec0d24..b60dd2c 100644 --- a/bootloader/hos/hos.c +++ b/bootloader/hos/hos.c @@ -1173,6 +1173,9 @@ int hos_launch(ini_sec_t *cfg) CLOCK(CLK_RST_CONTROLLER_RST_DEV_L_SET) = BIT(CLK_L_USBD); CLOCK(CLK_RST_CONTROLLER_RST_DEV_H_SET) = BIT(CLK_H_AHBDMA) | BIT(CLK_H_APBDMA) | BIT(CLK_H_USB2); + // Reset arbiter. + hw_config_arbiter(true); + // Scale down RAM OC if enabled. minerva_prep_boot_freq(); diff --git a/loader/loader.c b/loader/loader.c index 7cff34e..322a13d 100644 --- a/loader/loader.c +++ b/loader/loader.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019 CTCaer + * Copyright (c) 2019-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -67,6 +67,12 @@ void loader_main() CLOCK(CLK_RST_CONTROLLER_CLK_SYSTEM_RATE) = 2; // Set HCLK div to 1 and PCLK div to 3. CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) = 0x20003333; // Set SCLK to PLLP_OUT (408MHz). + // Set arbiter. + ARB_PRI(ARB_PRIO_CPU_PRIORITY) = 0x12412D1; + ARB_PRI(ARB_PRIO_COP_PRIORITY) = 0x0000000; + ARB_PRI(ARB_PRIO_VCP_PRIORITY) = 0x220244A; + ARB_PRI(ARB_PRIO_DMA_PRIORITY) = 0x320369B; + // Get Payload size. u32 payload_size = sizeof(payload_00) + sizeof(payload_01); // Actual payload size. payload_size += (u32)payload_01 - (u32)payload_00 - sizeof(payload_00); // Add compiler alignment. From 4bc0a0591c7e3be8288ec9191e2ddbe1e3bc6948 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 19 May 2024 10:15:52 +0300 Subject: [PATCH 157/308] bdk: display: wait 2us for bl pwm config to take Fixes the tiny blink showing up while pwm is still at max. --- bdk/display/di.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/bdk/display/di.c b/bdk/display/di.c index bcdf153..ca51ba3 100644 --- a/bdk/display/di.c +++ b/bdk/display/di.c @@ -630,6 +630,8 @@ void display_backlight_pwm_init() PWM(PWM_CONTROLLER_PWM_CSR_0) = PWM_CSR_EN; PINMUX_AUX(PINMUX_AUX_LCD_BL_PWM) = (PINMUX_AUX(PINMUX_AUX_LCD_BL_PWM) & ~PINMUX_FUNC_MASK) | 1; // Set PWM0 mode. + usleep(2); + gpio_config(GPIO_PORT_V, GPIO_PIN_0, GPIO_MODE_SPIO); // Backlight power mode. } From 547a3542ee7c3918ec363ed7906ccc7392f74e71 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 19 May 2024 10:16:52 +0300 Subject: [PATCH 158/308] bdk: display: add more defines --- bdk/display/di.h | 48 ++++++++++++++++++++++++++++++++++++++++++------ 1 file changed, 42 insertions(+), 6 deletions(-) diff --git a/bdk/display/di.h b/bdk/display/di.h index 9e4c3b1..03f0c72 100644 --- a/bdk/display/di.h +++ b/bdk/display/di.h @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2023 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -77,6 +77,7 @@ #define DC_CMD_INT_ENABLE 0x39 #define DC_CMD_INT_FRAME_END_INT BIT(1) #define DC_CMD_INT_V_BLANK_INT BIT(2) +#define DC_CMD_INT_POLARITY 0x3B #define DC_CMD_STATE_ACCESS 0x40 #define READ_MUX BIT(0) @@ -137,6 +138,31 @@ #define DC_COM_PIN_OUTPUT_POLARITY(x) (0x306 + (x)) #define LSC0_OUTPUT_POLARITY_LOW BIT(24) +// CMU registers. +#define DC_COM_CMU_CSC_KRR 0x32A +#define DC_COM_CMU_CSC_KGR 0x32B +#define DC_COM_CMU_CSC_KBR 0x32C +#define DC_COM_CMU_CSC_KRG 0x32D +#define DC_COM_CMU_CSC_KGG 0x32E +#define DC_COM_CMU_CSC_KBG 0x32F +#define DC_COM_CMU_CSC_KRB 0x330 +#define DC_COM_CMU_CSC_KGB 0x331 +#define DC_COM_CMU_CSC_KBB 0x332 +#define DC_COM_CMU_LUT1 0x336 +#define LUT1_ADDR(x) ((x) & 0xFF) +#define LUT1_DATA(x) (((x) & 0xFFF) << 16) +#define LUT1_READ_DATA(x) (((x) >> 16) & 0xFFF) +#define DC_COM_CMU_LUT2 0x337 +#define LUT2_ADDR(x) ((x) & 0x3FF) +#define LUT2_DATA(x) (((x) & 0xFF) << 16) +#define LUT2_READ_DATA(x) (((x) >> 16) & 0xFF) +#define DC_COM_CMU_LUT1_READ 0x338 +#define LUT1_READ_ADDR(x) (((x) & 0xFF) << 8) +#define LUT1_READ_EN BIT(0) +#define DC_COM_CMU_LUT2_READ 0x339 +#define LUT2_READ_ADDR(x) (((x) & 0x3FF) << 8) +#define LUT2_READ_EN BIT(0) + #define DC_COM_DSC_TOP_CTL 0x33E // DC_DISP shadowed registers. @@ -207,11 +233,7 @@ #define DISP_ORDER_BLUE_RED (1 << 9) #define DC_DISP_DISP_COLOR_CONTROL 0x430 -#define DITHER_CONTROL_MASK (3 << 8) -#define DITHER_CONTROL_DISABLE (0 << 8) -#define DITHER_CONTROL_ORDERED (2 << 8) -#define DITHER_CONTROL_ERRDIFF (3 << 8) -#define BASE_COLOR_SIZE_MASK (0xf << 0) +#define BASE_COLOR_SIZE_MASK (0xF << 0) #define BASE_COLOR_SIZE_666 (0 << 0) #define BASE_COLOR_SIZE_111 (1 << 0) #define BASE_COLOR_SIZE_222 (2 << 0) @@ -221,6 +243,13 @@ #define BASE_COLOR_SIZE_565 (6 << 0) #define BASE_COLOR_SIZE_332 (7 << 0) #define BASE_COLOR_SIZE_888 (8 << 0) +#define DITHER_CONTROL_MASK (3 << 8) +#define DITHER_CONTROL_DISABLE (0 << 8) +#define DITHER_CONTROL_ORDERED (2 << 8) +#define DITHER_CONTROL_ERRDIFF (3 << 8) +#define DISP_COLOR_SWAP BIT(16) +#define BLANK_COLOR_WHITE BIT(17) +#define CMU_ENABLE BIT(20) #define DC_DISP_SHIFT_CLOCK_OPTIONS 0x431 #define SC0_H_QUALIFIER_NONE BIT(0) @@ -273,6 +302,10 @@ #define COLOR_PALETTE_RGB(rgb) (byte_swap_32(rgb) >> 8) #define DC_WINC_PALETTE_COLOR_EXT 0x600 +#define DC_WINC_H_FILTER_P(p) (0x601 + (p)) +#define DC_WINC_V_FILTER_P(p) (0x619 + (p)) +#define DC_WINC_H_FILTER_HI_P(p) (0x629 + (p)) + #define DC_WINC_CSC_YOF 0x611 #define DC_WINC_CSC_KYRGB 0x612 #define DC_WINC_CSC_KUR 0x613 @@ -291,10 +324,13 @@ #define V_DIRECTION BIT(2) #define SCAN_COLUMN BIT(4) #define COLOR_EXPAND BIT(6) +#define H_FILTER_ENABLE BIT(8) +#define V_FILTER_ENABLE BIT(10) #define COLOR_PALETTE_ENABLE BIT(16) #define CSC_ENABLE BIT(18) #define DV_ENABLE BIT(20) #define WIN_ENABLE BIT(30) +#define H_FILTER_EXPAND BIT(31) #define DC_WIN_BUFFER_CONTROL 0x702 #define BUFFER_CONTROL_HOST 0 From 7af343dd6cb4fdcb19a5cecaa8d1a082133e1e4e Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 19 May 2024 10:19:25 +0300 Subject: [PATCH 159/308] bdk: input: make joycon detection more robust There's a hw bug on the gpio controller that can latch the last value on reads. Mitigate that by reading once to unlatch the input value. Also actually allow sio to be polled every 8ms. --- bdk/input/joycon.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/bdk/input/joycon.c b/bdk/input/joycon.c index 21a668a..a4e67a6 100644 --- a/bdk/input/joycon.c +++ b/bdk/input/joycon.c @@ -1,7 +1,7 @@ /* * Joy-Con UART driver for Nintendo Switch * - * Copyright (c) 2019-2023 CTCaer + * Copyright (c) 2019-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -407,12 +407,16 @@ static void _jc_detect() if (!jc_gamepad.sio_mode) { // Turn on Joy-Con detect. (UARTB/C TX). UART CTS also if HW flow control and irq is enabled. - PINMUX_AUX(PINMUX_AUX_UART2_TX) = PINMUX_INPUT_ENABLE | PINMUX_TRISTATE; - PINMUX_AUX(PINMUX_AUX_UART3_TX) = PINMUX_INPUT_ENABLE | PINMUX_TRISTATE; + PINMUX_AUX(PINMUX_AUX_UART2_TX) = PINMUX_INPUT_ENABLE; + PINMUX_AUX(PINMUX_AUX_UART3_TX) = PINMUX_INPUT_ENABLE; gpio_direction_input(GPIO_PORT_G, GPIO_PIN_0); gpio_direction_input(GPIO_PORT_D, GPIO_PIN_1); usleep(20); + //! HW BUG: Unlatch gpio buffer. + (void)gpio_read(GPIO_PORT_H, GPIO_PIN_6); + (void)gpio_read(GPIO_PORT_E, GPIO_PIN_6); + // Read H6/E6 which are shared with UART TX pins. jc_r.detected = !gpio_read(GPIO_PORT_H, GPIO_PIN_6); jc_l.detected = !gpio_read(GPIO_PORT_E, GPIO_PIN_6); @@ -842,7 +846,7 @@ static void _jc_req_nx_pad_status(joycon_ctxt_t *jc) else _joycon_send_raw(jc->uart, hori_pad_status, sizeof(hori_pad_status)); - jc->last_status_req_time = get_tmr_ms() + 15; + jc->last_status_req_time = get_tmr_ms() + (!jc->sio_mode ? 15 : 7); } static bool _jc_validate_pairing_info(u8 *buf, bool *is_hos) From ae29f359ee21b138909e60553565bdffa06cf8e7 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 19 May 2024 10:49:25 +0300 Subject: [PATCH 160/308] bdk: hwinit: rename reinit_workaround to deinit --- bdk/soc/hw_init.c | 2 +- bdk/soc/hw_init.h | 2 +- bdk/utils/util.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/bdk/soc/hw_init.c b/bdk/soc/hw_init.c index af7746c..b263c57 100644 --- a/bdk/soc/hw_init.c +++ b/bdk/soc/hw_init.c @@ -436,7 +436,7 @@ void hw_init() clock_enable_host1x(); } -void hw_reinit_workaround(bool coreboot, u32 bl_magic) +void hw_deinit(bool coreboot, u32 bl_magic) { bool tegra_t210 = hw_get_chip_id() == GP_HIDREV_MAJOR_T210; diff --git a/bdk/soc/hw_init.h b/bdk/soc/hw_init.h index fe6f6af..fcd8d10 100644 --- a/bdk/soc/hw_init.h +++ b/bdk/soc/hw_init.h @@ -27,7 +27,7 @@ extern u32 hw_rst_status; extern u32 hw_rst_reason; void hw_init(); -void hw_reinit_workaround(bool coreboot, u32 magic); +void hw_deinit(bool coreboot, u32 magic); void hw_config_arbiter(bool reset); u32 hw_get_chip_id(); diff --git a/bdk/utils/util.c b/bdk/utils/util.c index 0f97971..2e9c01d 100644 --- a/bdk/utils/util.c +++ b/bdk/utils/util.c @@ -262,7 +262,7 @@ void power_set_state(power_state_t state) sd_end(); // De-initialize and power down various hardware. - hw_reinit_workaround(false, 0); + hw_deinit(false, 0); // Set power state. switch (state) From 5453c593a36a88a3c95c5dfdb7c07ae602b0b80f Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 19 May 2024 10:49:46 +0300 Subject: [PATCH 161/308] hekate/nyx: adhere to hw_deinit change --- bootloader/l4t/l4t.c | 2 +- bootloader/main.c | 6 +++--- nyx/nyx_gui/frontend/gui.c | 7 ++----- nyx/nyx_gui/frontend/gui_tools_partition_manager.c | 2 +- nyx/nyx_gui/nyx.c | 4 ++-- 5 files changed, 9 insertions(+), 12 deletions(-) diff --git a/bootloader/l4t/l4t.c b/bootloader/l4t/l4t.c index 813b4be..0a6fa73 100644 --- a/bootloader/l4t/l4t.c +++ b/bootloader/l4t/l4t.c @@ -1151,7 +1151,7 @@ void launch_l4t(const ini_sec_t *ini_sec, int entry_idx, int is_list, bool t210b _l4t_mc_config_carveout(t210b01); // Deinit any unneeded HW. - hw_reinit_workaround(false, BL_MAGIC_L4TLDR_SLD); + hw_deinit(false, BL_MAGIC_L4TLDR_SLD); // Do late hardware config. _l4t_late_hw_config(t210b01); diff --git a/bootloader/main.c b/bootloader/main.c index 65e2714..aebf302 100644 --- a/bootloader/main.c +++ b/bootloader/main.c @@ -252,7 +252,7 @@ static void _launch_payload(char *path, bool update, bool clear_screen) else _reloc_patcher(PATCHED_RELOC_ENTRY, EXT_PAYLOAD_ADDR, ALIGN(size, 0x10)); - hw_reinit_workaround(false, byte_swap_32(*(u32 *)(buf + size - sizeof(u32)))); + hw_deinit(false, byte_swap_32(*(u32 *)(buf + size - sizeof(u32)))); } else { @@ -262,7 +262,7 @@ static void _launch_payload(char *path, bool update, bool clear_screen) u32 magic = 0; char *magic_ptr = buf + COREBOOT_VER_OFF; memcpy(&magic, magic_ptr + strlen(magic_ptr) - 4, 4); - hw_reinit_workaround(true, magic); + hw_deinit(true, magic); } // Some cards (Sandisk U1), do not like a fast power cycle. Wait min 100ms. @@ -1372,7 +1372,7 @@ static void _r2p_get_config_t210b01() static void _ipl_reload() { - hw_reinit_workaround(false, 0); + hw_deinit(false, 0); // Reload hekate. void (*ipl_ptr)() = (void *)IPL_LOAD_ADDR; diff --git a/nyx/nyx_gui/frontend/gui.c b/nyx/nyx_gui/frontend/gui.c index 370d24c..f1e6d45 100644 --- a/nyx/nyx_gui/frontend/gui.c +++ b/nyx/nyx_gui/frontend/gui.c @@ -923,7 +923,7 @@ static void _launch_hos(u8 autoboot, u8 autoboot_list) sd_end(); - hw_reinit_workaround(false, 0); + hw_deinit(false, 0); (*main_ptr)(); } @@ -939,10 +939,7 @@ void reload_nyx() sd_end(); - hw_reinit_workaround(false, 0); - - // Some cards (Sandisk U1), do not like a fast power cycle. Wait min 100ms. - sdmmc_storage_init_wait_sd(); + hw_deinit(false, 0); (*main_ptr)(); } diff --git a/nyx/nyx_gui/frontend/gui_tools_partition_manager.c b/nyx/nyx_gui/frontend/gui_tools_partition_manager.c index 0038eea..33fa0fa 100644 --- a/nyx/nyx_gui/frontend/gui_tools_partition_manager.c +++ b/nyx/nyx_gui/frontend/gui_tools_partition_manager.c @@ -985,7 +985,7 @@ static lv_res_t _action_reboot_recovery(lv_obj_t * btns, const char * txt) // Deinit hardware. sd_end(); - hw_reinit_workaround(false, 0); + hw_deinit(false, 0); // Chainload to hekate main. (*main_ptr)(); diff --git a/nyx/nyx_gui/nyx.c b/nyx/nyx_gui/nyx.c index e53d315..e28f967 100644 --- a/nyx/nyx_gui/nyx.c +++ b/nyx/nyx_gui/nyx.c @@ -179,12 +179,12 @@ lv_res_t launch_payload(lv_obj_t *list) if (size < 0x30000) { reloc_patcher(PATCHED_RELOC_ENTRY, EXT_PAYLOAD_ADDR, ALIGN(size, 0x10)); - hw_reinit_workaround(false, byte_swap_32(*(u32 *)(buf + size - sizeof(u32)))); + hw_deinit(false, byte_swap_32(*(u32 *)(buf + size - sizeof(u32)))); } else { reloc_patcher(PATCHED_RELOC_ENTRY, EXT_PAYLOAD_ADDR, 0x7000); - hw_reinit_workaround(true, 0); + hw_deinit(true, 0); } void (*ext_payload_ptr)() = (void *)EXT_PAYLOAD_ADDR; From 927489d2da0dd62983ce729b6f27dfa0bc9ecbb3 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 19 May 2024 10:50:25 +0300 Subject: [PATCH 162/308] bdk: add missed defines --- bdk/soc/t210.h | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/bdk/soc/t210.h b/bdk/soc/t210.h index 37bebae..be31b8a 100644 --- a/bdk/soc/t210.h +++ b/bdk/soc/t210.h @@ -40,7 +40,7 @@ #define GPU_USER_BASE 0x58000000 #define RES_SEMAPH_BASE 0x60001000 #define ARB_SEMAPH_BASE 0x60002000 -#define ARBPRI_BASE 0x60003000 +#define ARB_PRI_BASE 0x60003000 #define ICTLR_BASE 0x60004000 #define TMR_BASE 0x60005000 #define CLOCK_BASE 0x60006000 @@ -112,6 +112,7 @@ #define SOR1(off) MMIO_REG32(SOR1_BASE, off) #define GPU(off) MMIO_REG32(GPU_BASE, off) #define GPU_USER(off) MMIO_REG32(GPU_USER_BASE, off) +#define ARB_PRI(off) MMIO_REG32(ARB_PRI_BASE, off) #define ICTLR(cidx, off) MMIO_REG32(ICTLR_BASE + (0x100 * (cidx)), off) #define TMR(off) MMIO_REG32(TMR_BASE, off) #define CLOCK(off) MMIO_REG32(CLOCK_BASE, off) @@ -174,6 +175,7 @@ #define EVP_COP_IRQ_STS 0x220 /*! Primary Interrupt Controller registers. */ +#define PRI_ICTLR_ISR 0x10 #define PRI_ICTLR_FIR 0x14 #define PRI_ICTLR_FIR_SET 0x18 #define PRI_ICTLR_FIR_CLR 0x1C @@ -186,6 +188,13 @@ #define PRI_ICTLR_COP_IER_CLR 0x38 #define PRI_ICTLR_COP_IEP_CLASS 0x3C +/* Arbiter registers */ +#define ARB_PRIO_CPU_PRIORITY 0x0 +#define ARB_PRIO_COP_PRIORITY 0x4 +#define ARB_PRIO_VCP_PRIORITY 0x8 +#define ARB_PRIO_DMA_PRIORITY 0xC +#define ARB_PRIO_UCQ_PRIORITY 0x10 + /*! AHB Gizmo registers. */ #define AHB_ARBITRATION_PRIORITY_CTRL 0x8 #define PRIORITY_CTRL_WEIGHT(x) (((x) & 7) << 29) From a070d2e394a05d107eb03f94a9445fddb2b91577 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 19 May 2024 10:57:20 +0300 Subject: [PATCH 163/308] bdk: ums: allow real sizes for boot partitions Since that's eMMC, do not clamp the size to 4MB. That doesn't affect anything other than allowing the host to see the whole physical partition . --- bdk/usb/usb_gadget_ums.c | 23 ++++++++++++++--------- 1 file changed, 14 insertions(+), 9 deletions(-) diff --git a/bdk/usb/usb_gadget_ums.c b/bdk/usb/usb_gadget_ums.c index 14dddbb..bb0c973 100644 --- a/bdk/usb/usb_gadget_ums.c +++ b/bdk/usb/usb_gadget_ums.c @@ -4,7 +4,7 @@ * Copyright (c) 2003-2008 Alan Stern * Copyright (c) 2009 Samsung Electronics * Author: Michal Nazarewicz - * Copyright (c) 2019-2023 CTCaer + * Copyright (c) 2019-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -1842,10 +1842,11 @@ int usb_device_gadget_ums(usb_ctxt_t *usbs) ums.bulk_ctxt.bulk_out_buf = (u8 *)USB_EP_BULK_OUT_BUF_ADDR; // Set LUN parameters. - ums.lun.ro = usbs->ro; - ums.lun.type = usbs->type; - ums.lun.partition = usbs->partition; - ums.lun.offset = usbs->offset; + ums.lun.ro = usbs->ro; + ums.lun.type = usbs->type; + ums.lun.partition = usbs->partition; + ums.lun.num_sectors = usbs->sectors; + ums.lun.offset = usbs->offset; ums.lun.removable = 1; // Always removable to force OSes to use prevent media removal. ums.lun.unit_attention_data = SS_RESET_OCCURRED; @@ -1898,10 +1899,14 @@ int usb_device_gadget_ums(usb_ctxt_t *usbs) ums.set_text(ums.label, "#C7EA46 Status:# Started UMS"); - if (usbs->sectors) - ums.lun.num_sectors = usbs->sectors; - else - ums.lun.num_sectors = ums.lun.storage->sec_cnt; + // If partition sectors are not set get them from hardware. + if (!ums.lun.num_sectors) + { + if (usbs->type == MMC_EMMC && (ums.lun.partition - 1)) // eMMC BOOT0/1. + ums.lun.num_sectors = emmc_storage.ext_csd.boot_mult << 8; + else + ums.lun.num_sectors = ums.lun.storage->sec_cnt; // eMMC GPP or SD. + } do { From 0544f9143feee4b665947f6b5587b2279f636b2e Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 19 May 2024 10:58:53 +0300 Subject: [PATCH 164/308] nyx: tools: allow dynamic size for boot partitions Let UMS driver set the size in case the partition is bigger. That doesn't affect anything other than allowing the host to see the whole physical partition. --- nyx/nyx_gui/frontend/gui_tools.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_tools.c b/nyx/nyx_gui/frontend/gui_tools.c index 9d97696..0b33331 100644 --- a/nyx/nyx_gui/frontend/gui_tools.c +++ b/nyx/nyx_gui/frontend/gui_tools.c @@ -431,7 +431,7 @@ static lv_res_t _action_ums_emmc_boot0(lv_obj_t *btn) usbs.type = MMC_EMMC; usbs.partition = EMMC_BOOT0 + 1; usbs.offset = 0; - usbs.sectors = 0x2000; + usbs.sectors = 0; usbs.ro = usb_msc_emmc_read_only; usbs.system_maintenance = &manual_system_maintenance; usbs.set_text = &usb_gadget_set_text; @@ -450,7 +450,7 @@ static lv_res_t _action_ums_emmc_boot1(lv_obj_t *btn) usbs.type = MMC_EMMC; usbs.partition = EMMC_BOOT1 + 1; usbs.offset = 0; - usbs.sectors = 0x2000; + usbs.sectors = 0; usbs.ro = usb_msc_emmc_read_only; usbs.system_maintenance = &manual_system_maintenance; usbs.set_text = &usb_gadget_set_text; @@ -516,7 +516,7 @@ static lv_res_t _action_ums_emuemmc_boot0(lv_obj_t *btn) { usbs.type = MMC_SD; usbs.partition = EMMC_BOOT0 + 1; - usbs.sectors = 0x2000; + usbs.sectors = 0x2000; // Forced 4MB. usbs.ro = usb_msc_emmc_read_only; usbs.system_maintenance = &manual_system_maintenance; usbs.set_text = &usb_gadget_set_text; @@ -563,7 +563,7 @@ static lv_res_t _action_ums_emuemmc_boot1(lv_obj_t *btn) { usbs.type = MMC_SD; usbs.partition = EMMC_BOOT1 + 1; - usbs.sectors = 0x2000; + usbs.sectors = 0x2000; // Forced 4MB. usbs.ro = usb_msc_emmc_read_only; usbs.system_maintenance = &manual_system_maintenance; usbs.set_text = &usb_gadget_set_text; From c4567ab2b52ddfdd36d223052f6e8ecbb1a47d1b Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 19 May 2024 12:08:47 +0300 Subject: [PATCH 165/308] nyx: set touch indev also and name them Just keep it around for any reference. --- nyx/nyx_gui/frontend/gui.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui.c b/nyx/nyx_gui/frontend/gui.c index f1e6d45..2e6c8ec 100644 --- a/nyx/nyx_gui/frontend/gui.c +++ b/nyx/nyx_gui/frontend/gui.c @@ -64,7 +64,8 @@ char *text_color; typedef struct _jc_lv_driver_t { - lv_indev_t *indev; + lv_indev_t *indev_jc; + lv_indev_t *indev_touch; // LV_INDEV_READ_PERIOD * JC_CAL_MAX_STEPS = 264 ms. #define JC_CAL_MAX_STEPS 8 u32 calibration_step; @@ -585,7 +586,7 @@ static bool _jc_virt_mouse_read(lv_indev_data_t *data) jc_drv_ctx.cursor_hidden = false; jc_drv_ctx.cursor_timeout = get_tmr_ms(); - lv_indev_set_cursor(jc_drv_ctx.indev, jc_drv_ctx.cursor); + lv_indev_set_cursor(jc_drv_ctx.indev_jc, jc_drv_ctx.cursor); // Un hide cursor. lv_obj_set_opa_scale_enable(jc_drv_ctx.cursor, false); @@ -597,7 +598,7 @@ static bool _jc_virt_mouse_read(lv_indev_data_t *data) if (((u32)get_tmr_ms() - jc_drv_ctx.cursor_timeout) > 3000) { // Remove cursor and hide it. - lv_indev_set_cursor(jc_drv_ctx.indev, NULL); + lv_indev_set_cursor(jc_drv_ctx.indev_jc, NULL); lv_obj_set_opa_scale_enable(jc_drv_ctx.cursor, true); lv_obj_set_opa_scale(jc_drv_ctx.cursor, LV_OPA_TRANSP); @@ -2428,7 +2429,7 @@ void nyx_load_and_run() indev_drv_jc.type = LV_INDEV_TYPE_POINTER; indev_drv_jc.read = _jc_virt_mouse_read; memset(&jc_drv_ctx, 0, sizeof(jc_lv_driver_t)); - jc_drv_ctx.indev = lv_indev_drv_register(&indev_drv_jc); + jc_drv_ctx.indev_jc = lv_indev_drv_register(&indev_drv_jc); close_btn = NULL; // Initialize touch. @@ -2437,7 +2438,7 @@ void nyx_load_and_run() lv_indev_drv_init(&indev_drv_touch); indev_drv_touch.type = LV_INDEV_TYPE_POINTER; indev_drv_touch.read = _fts_touch_read; - lv_indev_drv_register(&indev_drv_touch); + jc_drv_ctx.indev_touch = lv_indev_drv_register(&indev_drv_touch); touchpad.touch = false; // Initialize temperature sensor. From b744f82942ad666e6210ecb4c0666b6f74575b16 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 19 May 2024 12:19:26 +0300 Subject: [PATCH 166/308] nyx: report right stick coordinates in debug - Add right stick x/y - Remove calibration x/y min/max --- nyx/nyx_gui/frontend/gui.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui.c b/nyx/nyx_gui/frontend/gui.c index 2e6c8ec..9f18ca0 100644 --- a/nyx/nyx_gui/frontend/gui.c +++ b/nyx/nyx_gui/frontend/gui.c @@ -490,10 +490,9 @@ static bool _jc_virt_mouse_read(lv_indev_data_t *data) gfx_con_getpos(&gfx_con.savedx, &gfx_con.savedy, &gfx_con.savedcol); gfx_con_setpos(32, 630, GFX_COL_AUTO); gfx_con.fntsz = 8; - gfx_printf("x: %4X, y: %4X | b: %06X | bt: %d %d | cx: %03X - %03X, cy: %03X - %03X", - jc_pad->lstick_x, jc_pad->lstick_y, jc_pad->buttons, - jc_pad->batt_info_l, jc_pad->batt_info_r, - jc_drv_ctx.cx_min, jc_drv_ctx.cx_max, jc_drv_ctx.cy_min, jc_drv_ctx.cy_max); + gfx_printf("x: %4X, y: %4X | rx: %4X, ry: %4X | b: %06X | bt: %d %d", + jc_pad->lstick_x, jc_pad->lstick_y, jc_pad->rstick_x, jc_pad->rstick_y, + jc_pad->buttons, jc_pad->batt_info_l, jc_pad->batt_info_r); gfx_con_setpos(gfx_con.savedx, gfx_con.savedy, gfx_con.savedcol); gfx_con.fntsz = 16; From 93296c2c38e6191668887be2ffb66e3198235f19 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 19 May 2024 17:42:10 +0300 Subject: [PATCH 167/308] bdk: joycon: add packet size checks Pass the real received data size and do the proper checks for minimum info. --- bdk/input/joycon.c | 35 +++++++++++++++++++++++++---------- 1 file changed, 25 insertions(+), 10 deletions(-) diff --git a/bdk/input/joycon.c b/bdk/input/joycon.c index a4e67a6..ed38cbd 100644 --- a/bdk/input/joycon.c +++ b/bdk/input/joycon.c @@ -234,7 +234,7 @@ typedef struct _jc_hid_in_rpt_t u8 stick_h_right; u8 stick_m_right; u8 stick_v_right; - u8 vib_decider; // right:8, left:8. (bit3 en, bit2-0 buffer avail). + u8 vib_decider; // right:4, left:4 (bit3 en, bit2-0 buffer avail). u8 submcd_ack; u8 subcmd; u8 subcmd_data[]; @@ -606,7 +606,7 @@ static void _jc_charging_decider(u8 batt, u8 uart) _jc_power_supply(uart, false); } -static void _jc_parse_wired_hid(joycon_ctxt_t *jc, const u8* packet, u32 size) +static void _jc_parse_wired_hid(joycon_ctxt_t *jc, const u8 *packet, int size) { u32 btn_tmp; jc_hid_in_rpt_t *hid_pkt = (jc_hid_in_rpt_t *)packet; @@ -614,7 +614,14 @@ static void _jc_parse_wired_hid(joycon_ctxt_t *jc, const u8* packet, u32 size) switch (hid_pkt->cmd) { case JC_HORI_INPUT_RPT: + if (!(jc->type & JC_ID_HORI)) + return; + case JC_HID_INPUT_RPT: + // Discard incomplete hid packets. + if (size < 12) + break; + btn_tmp = hid_pkt->btn_right | hid_pkt->btn_shared << 8 | hid_pkt->btn_left << 16; if (jc->type & JC_ID_L) @@ -674,8 +681,12 @@ static void _jc_parse_wired_hid(joycon_ctxt_t *jc, const u8* packet, u32 size) } } -static void _jc_parse_wired_init(joycon_ctxt_t *jc, const u8* data, u32 size) +static void _jc_parse_wired_init(joycon_ctxt_t *jc, const u8 *data, int size) { + // Discard empty packets. + if (size <= 0) + return; + switch (data[0]) { case JC_WIRED_CMD_GET_INFO: @@ -698,13 +709,13 @@ static void _jc_parse_wired_init(joycon_ctxt_t *jc, const u8* data, u32 size) } } -static void _jc_uart_pkt_parse(joycon_ctxt_t *jc, const jc_wired_hdr_t *pkt, size_t size) +static void _jc_uart_pkt_parse(joycon_ctxt_t *jc, const jc_wired_hdr_t *pkt, int size) { switch (pkt->cmd) { case JC_HORI_INPUT_RPT_CMD: case JC_WIRED_HID: - _jc_parse_wired_hid(jc, pkt->payload, (pkt->data[0] << 8) | pkt->data[1]); + _jc_parse_wired_hid(jc, pkt->payload, size - sizeof(jc_wired_hdr_t)); break; case JC_WIRED_INIT_REPLY: _jc_parse_wired_init(jc, pkt->data, size - sizeof(jc_uart_hdr_t) - 1); @@ -719,11 +730,15 @@ static void _jc_uart_pkt_parse(joycon_ctxt_t *jc, const jc_wired_hdr_t *pkt, siz jc->last_received_time = get_tmr_ms(); } -static void _jc_sio_parse_payload(joycon_ctxt_t *jc, u8 cmd, const u8* payload, u32 size) +static void _jc_sio_parse_payload(joycon_ctxt_t *jc, u8 cmd, const u8 *payload, int size) { switch (cmd) { case JC_SIO_CMD_STATUS: + // Discard incomplete packets. + if (size < 12) + break; + jc_sio_hid_in_rpt_t *hid_pkt = (jc_sio_hid_in_rpt_t *)payload; jc_gamepad.buttons = hid_pkt->btn_right | hid_pkt->btn_shared << 8 | hid_pkt->btn_left << 16; jc_gamepad.home = !gpio_read(GPIO_PORT_V, GPIO_PIN_3); @@ -744,7 +759,7 @@ static void _jc_sio_parse_payload(joycon_ctxt_t *jc, u8 cmd, const u8* payload, } } -static void _jc_sio_uart_pkt_parse(joycon_ctxt_t *jc, const jc_sio_in_rpt_t *pkt, u32 size) +static void _jc_sio_uart_pkt_parse(joycon_ctxt_t *jc, const jc_sio_in_rpt_t *pkt, int size) { if (pkt->crc_hdr != _jc_crc((u8 *)pkt, sizeof(jc_sio_in_rpt_t) - 1, 0)) return; @@ -761,7 +776,7 @@ static void _jc_sio_uart_pkt_parse(joycon_ctxt_t *jc, const jc_sio_in_rpt_t *pkt break; case JC_SIO_CMD_IAP_VER: case JC_SIO_CMD_STATUS: - _jc_sio_parse_payload(jc, cmd, pkt->payload, pkt->payload_size); + _jc_sio_parse_payload(jc, cmd, pkt->payload, size - sizeof(jc_sio_in_rpt_t)); break; case JC_SIO_CMD_UNK02: case JC_SIO_CMD_UNK20: @@ -788,7 +803,7 @@ static void _jc_rcv_pkt(joycon_ctxt_t *jc) jc_wired_hdr_t *jc_pkt = (jc_wired_hdr_t *)jc->buf; if (!jc->sio_mode && !memcmp(jc_pkt->uart_hdr.magic, "\x19\x81\x03", 3)) { - _jc_uart_pkt_parse(jc, jc_pkt, jc_pkt->uart_hdr.total_size_lsb + sizeof(jc_uart_hdr_t)); + _jc_uart_pkt_parse(jc, jc_pkt, len); return; } @@ -797,7 +812,7 @@ static void _jc_rcv_pkt(joycon_ctxt_t *jc) jc_sio_in_rpt_t *sio_pkt = (jc_sio_in_rpt_t *)(jc->buf); if (jc->sio_mode && sio_pkt->cmd == JC_SIO_INPUT_RPT && (sio_pkt->ack & JC_SIO_CMD_ACK) == JC_SIO_CMD_ACK) { - _jc_sio_uart_pkt_parse(jc, sio_pkt, sio_pkt->payload_size + sizeof(jc_sio_in_rpt_t)); + _jc_sio_uart_pkt_parse(jc, sio_pkt, len); return; } From 14706cef4e25ee9eafd79f6c885a25d04c060416 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 2 Jun 2024 06:46:28 +0300 Subject: [PATCH 168/308] bdk: minerva: add emc src div disable --- bdk/mem/emc.h | 3 ++- bdk/mem/sdram.c | 35 +++++++++++++++++++++++++++++++++++ bdk/mem/sdram.h | 1 + 3 files changed, 38 insertions(+), 1 deletion(-) diff --git a/bdk/mem/emc.h b/bdk/mem/emc.h index 24266e2..a1b4c3a 100644 --- a/bdk/mem/emc.h +++ b/bdk/mem/emc.h @@ -2,7 +2,7 @@ * arch/arm/mach-tegra/tegra21_emc.h * * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved. - * Copyright (c) 2019-2020, CTCaer. + * Copyright (c) 2019-2024, CTCaer. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -23,6 +23,7 @@ #ifndef _EMC_H_ #define _EMC_H_ +#define EMC_INTSTATUS 0x0 #define EMC_DBG 0x8 #define EMC_CFG 0xC #define EMC_CONFIG_SAMPLE_DELAY 0x5f0 diff --git a/bdk/mem/sdram.c b/bdk/mem/sdram.c index 868387a..49fb48e 100644 --- a/bdk/mem/sdram.c +++ b/bdk/mem/sdram.c @@ -184,6 +184,41 @@ emc_mr_data_t sdram_read_mrx(emc_mr_t mrx) return data; } +void sdram_div_disable(bool enable) +{ + static bool enabled = false; + + if (hw_get_chip_id() == GP_HIDREV_MAJOR_T210 && enable == enabled) + return; + + enabled = enable; + + // Clear CC interrupt. + EMC(EMC_INTSTATUS) = BIT(4); + (void)EMC(EMC_INTSTATUS); + + u32 clk_src_emc = _dram_cfg_08_10_12_14_samsung_hynix_4gb.emc_clock_source; + + if (enable) + { + // Check if clock source is not the expected one. + if (CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_EMC) != clk_src_emc) + return; + + // Clear div. + CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_EMC) = clk_src_emc & ~0xF; + } + else + { + // Restore MC/EMC clock. + CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_EMC) = clk_src_emc; + } + + // Wait for CC interrupt. + while (!(EMC(EMC_INTSTATUS) & BIT(4))) + ; +} + static void _sdram_config_t210(const sdram_params_t210_t *params) { // Program DPD3/DPD4 regs (coldboot path). diff --git a/bdk/mem/sdram.h b/bdk/mem/sdram.h index d625ee2..6a3fdac 100644 --- a/bdk/mem/sdram.h +++ b/bdk/mem/sdram.h @@ -135,6 +135,7 @@ void sdram_init(); void *sdram_get_params_patched(); void *sdram_get_params_t210b01(); void sdram_lp0_save_params(const void *params); +void sdram_div_disable(bool enable); emc_mr_data_t sdram_read_mrx(emc_mr_t mrx); #endif From 7a74761da98d92933c5c0045bc78d7adb9a9268a Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 2 Jun 2024 06:51:06 +0300 Subject: [PATCH 169/308] bdk: bpmp: add and use bpmp_clk_rate_relaxed --- bdk/display/vic.c | 8 +----- bdk/input/joycon.c | 6 ---- bdk/sec/tsec.c | 4 +-- bdk/soc/bpmp.c | 72 ++++++++++++++++++++++++++++++---------------- bdk/soc/bpmp.h | 5 ++-- bdk/soc/clock.c | 23 +++++++++++++-- bdk/thermal/fan.c | 10 +------ 7 files changed, 75 insertions(+), 53 deletions(-) diff --git a/bdk/display/vic.c b/bdk/display/vic.c index 145eb09..4611eb4 100644 --- a/bdk/display/vic.c +++ b/bdk/display/vic.c @@ -1,7 +1,7 @@ /* * VIC driver for Tegra X1 * - * Copyright (c) 2018-2023 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -539,14 +539,8 @@ int vic_compose() int vic_init() { - // Ease the stress to APB. - bpmp_freq_t prev_fid = bpmp_clk_rate_set(BPMP_CLK_NORMAL); - clock_enable_vic(); - // Restore sys clock. - bpmp_clk_rate_set(prev_fid); - // Load Fetch Control Engine microcode. for (u32 i = 0; i < sizeof(vic_fce_ucode) / sizeof(u32); i++) { diff --git a/bdk/input/joycon.c b/bdk/input/joycon.c index ed38cbd..c34eff0 100644 --- a/bdk/input/joycon.c +++ b/bdk/input/joycon.c @@ -1215,17 +1215,11 @@ void jc_init_hw() pinmux_config_uart(UART_B); pinmux_config_uart(UART_C); - // Ease the stress to APB. - bpmp_freq_t prev_fid = bpmp_clk_rate_set(BPMP_CLK_NORMAL); - // Enable UART B and C clocks. if (!jc_gamepad.sio_mode) clock_enable_uart(UART_B); clock_enable_uart(UART_C); - // Restore OC. - bpmp_clk_rate_set(prev_fid); - jc_init_done = true; #endif } diff --git a/bdk/sec/tsec.c b/bdk/sec/tsec.c index 687af40..de2dbbb 100644 --- a/bdk/sec/tsec.c +++ b/bdk/sec/tsec.c @@ -75,7 +75,7 @@ int tsec_query(void *tsec_keys, tsec_ctxt_t *tsec_ctxt) void *ptb; bpmp_mmu_disable(); - bpmp_freq_t prev_fid = bpmp_clk_rate_set(BPMP_CLK_NORMAL); + bpmp_clk_rate_relaxed(true); // Enable clocks. clock_enable_tsec(); @@ -305,7 +305,7 @@ out: clock_disable_sor_safe(); clock_disable_tsec(); bpmp_mmu_enable(); - bpmp_clk_rate_set(prev_fid); + bpmp_clk_rate_relaxed(false); #ifdef BDK_MC_ENABLE_AHB_REDIRECT // Re-enable AHB aperture. diff --git a/bdk/soc/bpmp.c b/bdk/soc/bpmp.c index 669dcc2..b35e737 100644 --- a/bdk/soc/bpmp.c +++ b/bdk/soc/bpmp.c @@ -1,7 +1,7 @@ /* * BPMP-Lite Cache/MMU and Frequency driver for Tegra X1 * - * Copyright (c) 2019-2023 CTCaer + * Copyright (c) 2019-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -200,10 +200,44 @@ void bpmp_mmu_disable() BPMP_CACHE_CTRL(BPMP_CACHE_CONFIG) = 0; } + +/* + * CLK_RST_CONTROLLER_SCLK_BURST_POLICY: + * 0 = CLKM + * 1 = PLLC_OUT1 + * 2 = PLLC4_OUT3 + * 3 = PLLP_OUT0 + * 4 = PLLP_OUT2 + * 5 = PLLC4_OUT1 + * 6 = CLK_S + * 7 = PLLC4_OUT2 + */ + +bpmp_freq_t bpmp_fid_current = BPMP_CLK_NORMAL; + +void bpmp_clk_rate_relaxed(bool enable) +{ + // This is a glitch-free way to reduce the SCLK timings. + if (enable) + { + // Restore to PLLP source during PLLC configuration. + CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) = 0x20003330; // PLLP_OUT. + usleep(100); // Wait a bit for clock source change. + CLOCK(CLK_RST_CONTROLLER_CLK_SYSTEM_RATE) = 2; // PCLK = HCLK / (2 + 1). HCLK == SCLK. + } + else if (bpmp_fid_current) + { + // Restore to PLLC_OUT1. + CLOCK(CLK_RST_CONTROLLER_CLK_SYSTEM_RATE) = 3; // PCLK = HCLK / (3 + 1). HCLK == SCLK. + CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) = 0x20003310; // PLLC_OUT1 and CLKM for idle. + usleep(100); // Wait a bit for clock source change. + } +} + // APB clock affects RTC, PWM, MEMFETCH, APE, USB, SOR PWM, // I2C host, DC/DSI/DISP. UART gives extra stress. // 92: 100% success ratio. 93-94: 595-602MHz has 99% success ratio. 95: 608MHz less. -const u8 pll_divn[] = { +static const u8 pll_divn[] = { 0, // BPMP_CLK_NORMAL: 408MHz 0% - 136MHz APB. 85, // BPMP_CLK_HIGH_BOOST: 544MHz 33% - 136MHz APB. 88, // BPMP_CLK_HIGH2_BOOST: 563MHz 38% - 141MHz APB. @@ -213,8 +247,6 @@ const u8 pll_divn[] = { //95 // BPMP_CLK_DEV_BOOST: 608MHz 49% - 152MHz APB. }; -bpmp_freq_t bpmp_fid_current = BPMP_CLK_NORMAL; - void bpmp_clk_rate_get() { bool clk_src_is_pllp = ((CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) >> 4) & 7) == 3; @@ -237,45 +269,35 @@ void bpmp_clk_rate_get() } } -bpmp_freq_t bpmp_clk_rate_set(bpmp_freq_t fid) +void bpmp_clk_rate_set(bpmp_freq_t fid) { - bpmp_freq_t prev_fid = bpmp_fid_current; - if (fid > (BPMP_CLK_MAX - 1)) fid = BPMP_CLK_MAX - 1; - if (prev_fid == fid) - return prev_fid; + if (bpmp_fid_current == fid) + return; + + bpmp_fid_current = fid; if (fid) { - if (prev_fid) - { - // Restore to PLLP source during PLLC configuration. - CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) = 0x20003333; // PLLP_OUT. - msleep(1); // Wait a bit for clock source change. - } + // Use default SCLK / HCLK / PCLK clocks. + bpmp_clk_rate_relaxed(true); // Configure and enable PLLC. clock_enable_pllc(pll_divn[fid]); - // Set SCLK / HCLK / PCLK. - CLOCK(CLK_RST_CONTROLLER_CLK_SYSTEM_RATE) = 3; // PCLK = HCLK / (3 + 1). HCLK == SCLK. - CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) = 0x20003310; // PLLC_OUT1 for active and CLKM for idle. + // Set new source and SCLK / HCLK / PCLK dividers. + bpmp_clk_rate_relaxed(false); } else { - CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) = 0x20003330; // PLLP_OUT for active and CLKM for idle. - msleep(1); // Wait a bit for clock source change. - CLOCK(CLK_RST_CONTROLLER_CLK_SYSTEM_RATE) = 2; // PCLK = HCLK / (2 + 1). HCLK == SCLK. + // Use default SCLK / HCLK / PCLK clocks. + bpmp_clk_rate_relaxed(true); // Disable PLLC to save power. clock_disable_pllc(); } - bpmp_fid_current = fid; - - // Return old fid in case of temporary swap. - return prev_fid; } // The following functions halt BPMP to reduce power while sleeping. diff --git a/bdk/soc/bpmp.h b/bdk/soc/bpmp.h index 0c55147..77dfd5a 100644 --- a/bdk/soc/bpmp.h +++ b/bdk/soc/bpmp.h @@ -1,7 +1,7 @@ /* * BPMP-Lite Cache/MMU and Frequency driver for Tegra X1 * - * Copyright (c) 2019-2023 CTCaer + * Copyright (c) 2019-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -62,8 +62,9 @@ void bpmp_mmu_maintenance(u32 op, bool force); void bpmp_mmu_set_entry(int idx, bpmp_mmu_entry_t *entry, bool apply); void bpmp_mmu_enable(); void bpmp_mmu_disable(); +void bpmp_clk_rate_relaxed(bool enable); void bpmp_clk_rate_get(); -bpmp_freq_t bpmp_clk_rate_set(bpmp_freq_t fid); +void bpmp_clk_rate_set(bpmp_freq_t fid); void bpmp_usleep(u32 us); void bpmp_msleep(u32 ms); void bpmp_halt(); diff --git a/bdk/soc/clock.c b/bdk/soc/clock.c index 083a0ed..90538cb 100644 --- a/bdk/soc/clock.c +++ b/bdk/soc/clock.c @@ -15,6 +15,7 @@ * along with this program. If not, see . */ +#include #include #include #include @@ -153,7 +154,13 @@ void clock_enable_fuse(bool enable) void clock_enable_uart(u32 idx) { + // Ease the stress to APB. + bpmp_clk_rate_relaxed(true); + clock_enable(&_clock_uart[idx]); + + // Restore OC. + bpmp_clk_rate_relaxed(false); } void clock_disable_uart(u32 idx) @@ -247,7 +254,13 @@ void clock_disable_nvjpg() void clock_enable_vic() { + // Ease the stress to APB. + bpmp_clk_rate_relaxed(true); + clock_enable(&_clock_vic); + + // Restore sys clock. + bpmp_clk_rate_relaxed(false); } void clock_disable_vic() @@ -323,7 +336,13 @@ void clock_disable_coresight() void clock_enable_pwm() { + // Ease the stress to APB. + bpmp_clk_rate_relaxed(true); + clock_enable(&_clock_pwm); + + // Restore OC. + bpmp_clk_rate_relaxed(false); } void clock_disable_pwm() @@ -464,10 +483,10 @@ void clock_enable_pllc(u32 divn) ; // Disable PLLC_OUT1, enable reset and set div to 1.5. - CLOCK(CLK_RST_CONTROLLER_PLLC_OUT) = BIT(8); + CLOCK(CLK_RST_CONTROLLER_PLLC_OUT) = 1 << 8; // Enable PLLC_OUT1 and bring it out of reset. - CLOCK(CLK_RST_CONTROLLER_PLLC_OUT) |= (PLLC_OUT1_CLKEN | PLLC_OUT1_RSTN_CLR); + CLOCK(CLK_RST_CONTROLLER_PLLC_OUT) |= PLLC_OUT1_CLKEN | PLLC_OUT1_RSTN_CLR; msleep(1); // Wait a bit for PLL to stabilize. } diff --git a/bdk/thermal/fan.c b/bdk/thermal/fan.c index 6927fe4..5f52118 100644 --- a/bdk/thermal/fan.c +++ b/bdk/thermal/fan.c @@ -1,7 +1,7 @@ /* * Fan driver for Nintendo Switch * - * Copyright (c) 2018-2023 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -49,16 +49,8 @@ void set_fan_duty(u32 duty) // Enable PWM if disabled. if (fuse_read_hw_type() == FUSE_NX_HW_TYPE_AULA) - { - // Ease the stress to APB. - bpmp_freq_t prev_fid = bpmp_clk_rate_set(BPMP_CLK_NORMAL); - clock_enable_pwm(); - // Restore OC. - bpmp_clk_rate_set(prev_fid); - } - PWM(PWM_CONTROLLER_PWM_CSR_1) = PWM_CSR_EN | (0x100 << 16); // Max PWM to disable fan. PINMUX_AUX(PINMUX_AUX_LCD_GPIO2) = 1; // Set source to PWM1. From 8c44969afb0ea5c6fd6af2a6d0c7a0ca068172ac Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 2 Jun 2024 06:51:47 +0300 Subject: [PATCH 170/308] bdk: blz: refactor style --- bdk/libs/compr/blz.c | 55 +++++++++++++++++++++++--------------------- bdk/libs/compr/blz.h | 8 +++---- 2 files changed, 33 insertions(+), 30 deletions(-) diff --git a/bdk/libs/compr/blz.c b/bdk/libs/compr/blz.c index 685ef4a..5bc9e49 100644 --- a/bdk/libs/compr/blz.c +++ b/bdk/libs/compr/blz.c @@ -20,33 +20,33 @@ #include "blz.h" -const blz_footer *blz_get_footer(const unsigned char *compData, unsigned int compDataLen, blz_footer *outFooter) +const blz_footer *blz_get_footer(const u8 *comp_data, u32 comp_data_size, blz_footer *out_footer) { - if (compDataLen < sizeof(blz_footer)) + if (comp_data_size < sizeof(blz_footer)) return NULL; - const blz_footer *srcFooter = (const blz_footer*)&compData[compDataLen - sizeof(blz_footer)]; - if (outFooter != NULL) - memcpy(outFooter, srcFooter, sizeof(blz_footer)); // Must be a memcpy because no umaligned accesses on ARMv4. + const blz_footer *src_footer = (const blz_footer *)&comp_data[comp_data_size - sizeof(blz_footer)]; + if (out_footer) + memcpy(out_footer, src_footer, sizeof(blz_footer)); // Must be a memcpy because no unaligned accesses on ARMv4. - return srcFooter; + return src_footer; } // From https://github.com/SciresM/hactool/blob/master/kip.c which is exactly how kernel does it, thanks SciresM! -int blz_uncompress_inplace(unsigned char *dataBuf, unsigned int compSize, const blz_footer *footer) +int blz_uncompress_inplace(u8 *data, u32 comp_size, const blz_footer *footer) { u32 addl_size = footer->addl_size; u32 header_size = footer->header_size; u32 cmp_and_hdr_size = footer->cmp_and_hdr_size; - unsigned char* cmp_start = &dataBuf[compSize] - cmp_and_hdr_size; + u8 *cmp_start = &data[comp_size] - cmp_and_hdr_size; u32 cmp_ofs = cmp_and_hdr_size - header_size; u32 out_ofs = cmp_and_hdr_size + addl_size; while (out_ofs) { - unsigned char control = cmp_start[--cmp_ofs]; - for (unsigned int i=0; i<8; i++) + u8 control = cmp_start[--cmp_ofs]; + for (u32 i = 0; i < 8; i++) { if (control & 0x80) { @@ -54,45 +54,48 @@ int blz_uncompress_inplace(unsigned char *dataBuf, unsigned int compSize, const return 0; // Out of bounds. cmp_ofs -= 2; - u16 seg_val = ((unsigned int)(cmp_start[cmp_ofs + 1]) << 8) | cmp_start[cmp_ofs]; + u16 seg_val = ((u32)(cmp_start[cmp_ofs + 1]) << 8) | cmp_start[cmp_ofs]; u32 seg_size = ((seg_val >> 12) & 0xF) + 3; u32 seg_ofs = (seg_val & 0x0FFF) + 3; - if (out_ofs < seg_size) // Kernel restricts segment copy to stay in bounds. + + // Kernel restricts segment copy to stay in bounds. + if (out_ofs < seg_size) seg_size = out_ofs; out_ofs -= seg_size; - for (unsigned int j = 0; j < seg_size; j++) + for (u32 j = 0; j < seg_size; j++) cmp_start[out_ofs + j] = cmp_start[out_ofs + j + seg_ofs]; } - else + else // Copy directly. { - // Copy directly. if (cmp_ofs < 1) - return 0; //out of bounds + return 0; // Out of bounds. cmp_start[--out_ofs] = cmp_start[--cmp_ofs]; } + control <<= 1; - if (out_ofs == 0) // Blz works backwards, so if it reaches byte 0, it's done. + + if (!out_ofs) // Blz works backwards, so if it reaches byte 0, it's done. return 1; - } } + } return 1; } -int blz_uncompress_srcdest(const unsigned char *compData, unsigned int compDataLen, unsigned char *dstData, unsigned int dstSize) +int blz_uncompress_srcdest(const u8 *comp_data, u32 comp_data_size, u8 *dst_data, u32 dst_size) { blz_footer footer; - const blz_footer *compFooterPtr = blz_get_footer(compData, compDataLen, &footer); - if (compFooterPtr == NULL) + const blz_footer *comp_footer = blz_get_footer(comp_data, comp_data_size, &footer); + if (!comp_footer) return 0; - // Decompression must be done in-place, so need to copy the relevant compressed data first. - unsigned int numCompBytes = (const unsigned char*)(compFooterPtr)-compData; - memcpy(dstData, compData, numCompBytes); - memset(&dstData[numCompBytes], 0, dstSize - numCompBytes); + // Decompression happens in-place, so need to copy the relevant compressed data first. + u32 comp_bytes = (const u8 *)comp_footer - comp_data; + memcpy(dst_data, comp_data, comp_bytes); + memset(&dst_data[comp_bytes], 0, dst_size - comp_bytes); - return blz_uncompress_inplace(dstData, compDataLen, &footer); + return blz_uncompress_inplace(dst_data, comp_data_size, &footer); } diff --git a/bdk/libs/compr/blz.h b/bdk/libs/compr/blz.h index a1cce37..bb058d8 100644 --- a/bdk/libs/compr/blz.h +++ b/bdk/libs/compr/blz.h @@ -26,11 +26,11 @@ typedef struct _blz_footer u32 addl_size; } blz_footer; -// Returns pointer to footer in compData if present, additionally copies it to outFooter if not NULL. -const blz_footer *blz_get_footer(const unsigned char *compData, unsigned int compDataLen, blz_footer *outFooter); +// Returns pointer to footer in comp_data if present, additionally copies it to out_footer if not NULL. +const blz_footer *blz_get_footer(const u8 *comp_data, u32 comp_data_size, blz_footer *out_footer); // Returns 0 on failure. -int blz_uncompress_inplace(unsigned char *dataBuf, unsigned int compSize, const blz_footer *footer); +int blz_uncompress_inplace(u8 *data, u32 comp_size, const blz_footer *footer); // Returns 0 on failure. -int blz_uncompress_srcdest(const unsigned char *compData, unsigned int compDataLen, unsigned char *dstData, unsigned int dstSize); +int blz_uncompress_srcdest(const u8 *comp_data, u32 comp_data_size, u8 *dst_data, u32 dst_size); #endif From 78cdb5575dbafc1a466bc7ba26ecb34afdeaa308 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 2 Jun 2024 06:53:40 +0300 Subject: [PATCH 171/308] hos: use new func --- bootloader/hos/hos.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/bootloader/hos/hos.c b/bootloader/hos/hos.c index b60dd2c..b3fa251 100644 --- a/bootloader/hos/hos.c +++ b/bootloader/hos/hos.c @@ -759,6 +759,7 @@ int hos_launch(ini_sec_t *cfg) volatile secmon_mailbox_t *secmon_mailbox; minerva_change_freq(FREQ_1600); + sdram_div_disable(true); list_init(&ctxt.kip1_list); ctxt.cfg = cfg; @@ -1178,6 +1179,7 @@ int hos_launch(ini_sec_t *cfg) // Scale down RAM OC if enabled. minerva_prep_boot_freq(); + sdram_div_disable(false); // Flush cache and disable MMU. bpmp_mmu_disable(); @@ -1192,6 +1194,7 @@ int hos_launch(ini_sec_t *cfg) error: _free_launch_components(&ctxt); + sdram_div_disable(false); emmc_end(); EPRINTF("\nFailed to launch HOS!"); From ddd19661bd9c328767e3bfac6edf99a4b8f4bdf7 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 2 Jun 2024 06:55:25 +0300 Subject: [PATCH 172/308] nyx: use bpmp relaxed func --- nyx/nyx_gui/frontend/gui_tools.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_tools.c b/nyx/nyx_gui/frontend/gui_tools.c index 0b33331..3229814 100644 --- a/nyx/nyx_gui/frontend/gui_tools.c +++ b/nyx/nyx_gui/frontend/gui_tools.c @@ -362,7 +362,7 @@ static lv_res_t _action_hid_jc(lv_obj_t *btn) // Reduce BPMP, RAM and backlight and power off SDMMC1 to conserve power. sd_end(); minerva_change_freq(FREQ_800); - bpmp_freq_t prev_fid = bpmp_clk_rate_set(BPMP_CLK_NORMAL); + bpmp_clk_rate_relaxed(true); display_backlight_brightness(10, 1000); usb_ctxt_t usbs; @@ -374,7 +374,7 @@ static lv_res_t _action_hid_jc(lv_obj_t *btn) // Restore BPMP, RAM and backlight. minerva_change_freq(FREQ_1600); - bpmp_clk_rate_set(prev_fid); + bpmp_clk_rate_relaxed(false); display_backlight_brightness(h_cfg.backlight - 20, 1000); return LV_RES_OK; @@ -386,7 +386,7 @@ static lv_res_t _action_hid_touch(lv_obj_t *btn) // Reduce BPMP, RAM and backlight and power off SDMMC1 to conserve power. sd_end(); minerva_change_freq(FREQ_800); - bpmp_freq_t prev_fid = bpmp_clk_rate_set(BPMP_CLK_NORMAL); + bpmp_clk_rate_relaxed(true); display_backlight_brightness(10, 1000); usb_ctxt_t usbs; @@ -398,7 +398,7 @@ static lv_res_t _action_hid_touch(lv_obj_t *btn) // Restore BPMP, RAM and backlight. minerva_change_freq(FREQ_1600); - bpmp_clk_rate_set(prev_fid); + bpmp_clk_rate_relaxed(false); display_backlight_brightness(h_cfg.backlight - 20, 1000); return LV_RES_OK; From 84c5439c703a56c58eb2d5635ea565a5a2eae885 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 2 Jun 2024 07:01:31 +0300 Subject: [PATCH 173/308] bdk: usb: utilize apb relaxed clocks for init --- bdk/usb/usbd.c | 8 +++++++- bdk/usb/xusbd.c | 8 +++++++- 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/bdk/usb/usbd.c b/bdk/usb/usbd.c index 83f9ce7..2a7fe97 100644 --- a/bdk/usb/usbd.c +++ b/bdk/usb/usbd.c @@ -1,7 +1,7 @@ /* * Enhanced USB Device (EDCI) driver for Tegra X1 * - * Copyright (c) 2019-2023 CTCaer + * Copyright (c) 2019-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -355,9 +355,15 @@ int usb_device_init() if (usb_init_done) return USB_RES_OK; + // Ease the stress to APB. + bpmp_clk_rate_relaxed(true); + // Initialize USB2 controller PHY. _usb_init_phy(); + // Restore OC. + bpmp_clk_rate_relaxed(false); + // AHB USB performance cfg. AHB_GIZMO(AHB_GIZMO_AHB_MEM) |= AHB_MEM_DONT_SPLIT_AHB_WR | AHB_MEM_ENB_FAST_REARBITRATE; AHB_GIZMO(AHB_GIZMO_USB) |= AHB_GIZMO_IMMEDIATE; diff --git a/bdk/usb/xusbd.c b/bdk/usb/xusbd.c index c14816d..38578e7 100644 --- a/bdk/usb/xusbd.c +++ b/bdk/usb/xusbd.c @@ -1,7 +1,7 @@ /* * eXtensible USB Device driver (XDCI) for Tegra X1 * - * Copyright (c) 2020-2022 CTCaer + * Copyright (c) 2020-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -883,6 +883,9 @@ static void _xusbd_init_device_clocks() int xusb_device_init() { + // Ease the stress to APB. + bpmp_clk_rate_relaxed(true); + // Disable USB2 device controller clocks. CLOCK(CLK_RST_CONTROLLER_RST_DEV_L_SET) = BIT(CLK_L_USBD); CLOCK(CLK_RST_CONTROLLER_CLK_ENB_L_CLR) = BIT(CLK_L_USBD); @@ -920,6 +923,9 @@ int xusb_device_init() // Initialize device clocks. _xusbd_init_device_clocks(); + // Restore OC. + bpmp_clk_rate_relaxed(false); + // Enable AHB redirect for access to IRAM for Event/EP ring buffers. mc_enable_ahb_redirect(); From d933aa80f792d21bf9673f2e0bd6154408ac6fd9 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 2 Jun 2024 07:04:17 +0300 Subject: [PATCH 174/308] hekate: use IRAM for stack --- bootloader/main.c | 6 +++--- bootloader/start.S | 3 ++- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/bootloader/main.c b/bootloader/main.c index aebf302..840c22e 100644 --- a/bootloader/main.c +++ b/bootloader/main.c @@ -1487,10 +1487,10 @@ void ipl_main() // Do initial HW configuration. This is compatible with consecutive reruns without a reset. hw_init(); - // Pivot the stack so we have enough space. - pivot_stack(IPL_STACK_TOP); + // Pivot the stack under IPL. (Only max 4KB is needed). + pivot_stack(IPL_LOAD_ADDR); - // Tegra/Horizon configuration goes to 0x80000000+, package2 goes to 0xA9800000, we place our heap in between. + // Place heap at a place outside of L4T/HOS configuration and binaries. heap_init((void *)IPL_HEAP_START); #ifdef DEBUG_UART_PORT diff --git a/bootloader/start.S b/bootloader/start.S index 269f2c7..d1def0a 100644 --- a/bootloader/start.S +++ b/bootloader/start.S @@ -60,7 +60,8 @@ _reloc_ipl: BX R3 _real_start: - /* Initially, we place our stack in IRAM but will move it to SDRAM later. */ + /* Initially, we place our stack under relocator but will move it to under the payload. */ + /* This depends on application scope. */ LDR SP, =0x4003FF00 LDR R0, =__bss_start EOR R1, R1, R1 From 9d79af231e0cea5531ab492938decae5c0f37e16 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 2 Jun 2024 07:09:34 +0300 Subject: [PATCH 175/308] bdk: use static where it should --- bdk/input/als.c | 6 +++--- bdk/input/joycon.c | 4 ++-- bdk/soc/bpmp.c | 4 ++-- bdk/soc/bpmp.h | 2 +- bdk/soc/t210.h | 1 + bdk/storage/sdmmc.c | 2 +- bdk/storage/sdmmc_driver.c | 10 +++++----- 7 files changed, 15 insertions(+), 14 deletions(-) diff --git a/bdk/input/als.c b/bdk/input/als.c index 54e4464..acb0ac2 100644 --- a/bdk/input/als.c +++ b/bdk/input/als.c @@ -45,7 +45,7 @@ typedef struct _opt_win_cal_t } opt_win_cal_t; // Nintendo Switch Icosa/Iowa Optical Window calibration. -const opt_win_cal_t opt_win_cal_default[] = { +static const opt_win_cal_t opt_win_cal_default[] = { { 500, 5002, 7502 }, { 754, 2250, 2000 }, { 1029, 1999, 1667 }, @@ -54,14 +54,14 @@ const opt_win_cal_t opt_win_cal_default[] = { }; // Nintendo Switch Aula Optical Window calibration. -const opt_win_cal_t opt_win_cal_aula[] = { +static const opt_win_cal_t opt_win_cal_aula[] = { { 231, 9697, 30300 }, { 993, 3333, 2778 }, { 1478, 1621, 1053 }, { 7500, 81, 10 } }; -const u32 als_gain_idx_tbl[4] = { 1, 2, 64, 128 }; +static const u32 als_gain_idx_tbl[4] = { 1, 2, 64, 128 }; void set_als_cfg(als_ctxt_t *als_ctxt, u8 gain, u8 cycle) { diff --git a/bdk/input/joycon.c b/bdk/input/joycon.c index c34eff0..37d3086 100644 --- a/bdk/input/joycon.c +++ b/bdk/input/joycon.c @@ -536,8 +536,8 @@ static u8 _jc_hid_pkt_id_incr() static void _jc_send_hid_cmd(u8 uart, u8 subcmd, u8 *data, u16 size) { - const u8 rumble_neutral[8] = { 0x00, 0x01, 0x40, 0x40, 0x00, 0x01, 0x40, 0x40 }; - const u8 rumble_init[8] = { 0xc2, 0xc8, 0x03, 0x72, 0xc2, 0xc8, 0x03, 0x72 }; + static const u8 rumble_neutral[8] = { 0x00, 0x01, 0x40, 0x40, 0x00, 0x01, 0x40, 0x40 }; + static const u8 rumble_init[8] = { 0xc2, 0xc8, 0x03, 0x72, 0xc2, 0xc8, 0x03, 0x72 }; u8 temp[0x30] = {0}; diff --git a/bdk/soc/bpmp.c b/bdk/soc/bpmp.c index b35e737..e563d45 100644 --- a/bdk/soc/bpmp.c +++ b/bdk/soc/bpmp.c @@ -118,7 +118,7 @@ #define MMU_EN_READ BIT(2) #define MMU_EN_WRITE BIT(3) -bpmp_mmu_entry_t mmu_entries[] = +static const bpmp_mmu_entry_t mmu_entries[] = { { DRAM_START, 0xFFFFFFFF, MMU_EN_READ | MMU_EN_WRITE | MMU_EN_EXEC | MMU_EN_CACHED, true }, { IRAM_BASE, 0x4003FFFF, MMU_EN_READ | MMU_EN_WRITE | MMU_EN_EXEC | MMU_EN_CACHED, true } @@ -140,7 +140,7 @@ void bpmp_mmu_maintenance(u32 op, bool force) BPMP_CACHE_CTRL(BPMP_CACHE_INT_CLEAR) = BPMP_CACHE_CTRL(BPMP_CACHE_INT_RAW_EVENT); } -void bpmp_mmu_set_entry(int idx, bpmp_mmu_entry_t *entry, bool apply) +void bpmp_mmu_set_entry(int idx, const bpmp_mmu_entry_t *entry, bool apply) { if (idx > 31) return; diff --git a/bdk/soc/bpmp.h b/bdk/soc/bpmp.h index 77dfd5a..129ea57 100644 --- a/bdk/soc/bpmp.h +++ b/bdk/soc/bpmp.h @@ -59,7 +59,7 @@ typedef enum #define BPMP_CLK_DEFAULT_BOOST BPMP_CLK_HYPER_BOOST void bpmp_mmu_maintenance(u32 op, bool force); -void bpmp_mmu_set_entry(int idx, bpmp_mmu_entry_t *entry, bool apply); +void bpmp_mmu_set_entry(int idx, const bpmp_mmu_entry_t *entry, bool apply); void bpmp_mmu_enable(); void bpmp_mmu_disable(); void bpmp_clk_rate_relaxed(bool enable); diff --git a/bdk/soc/t210.h b/bdk/soc/t210.h index be31b8a..6690114 100644 --- a/bdk/soc/t210.h +++ b/bdk/soc/t210.h @@ -81,6 +81,7 @@ #define CL_DVFS_BASE 0x70110000 #define APE_BASE 0x702C0000 #define AHUB_BASE 0x702D0000 +#define ADMAIF_BASE 0x702D0000 #define AXBAR_BASE 0x702D0800 #define I2S_BASE 0x702D1000 #define ADMA_BASE 0x702E2000 diff --git a/bdk/storage/sdmmc.c b/bdk/storage/sdmmc.c index 0fd8427..57eba39 100644 --- a/bdk/storage/sdmmc.c +++ b/bdk/storage/sdmmc.c @@ -275,7 +275,7 @@ reinit_try: // Disk IO failure! Reinit SD/EMMC to a lower speed. if (storage->sdmmc->id == SDMMC_1 || storage->sdmmc->id == SDMMC_4) { - int res; + int res = 0; if (storage->sdmmc->id == SDMMC_1) { diff --git a/bdk/storage/sdmmc_driver.c b/bdk/storage/sdmmc_driver.c index 7243e2a..96cd7ba 100644 --- a/bdk/storage/sdmmc_driver.c +++ b/bdk/storage/sdmmc_driver.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2023 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -109,8 +109,8 @@ void sdmmc_save_tap_value(sdmmc_t *sdmmc) static int _sdmmc_config_tap_val(sdmmc_t *sdmmc, u32 type) { - const u32 dqs_trim_val = 40; // 24 if HS533/HS667. - const u8 tap_values_t210[4] = { 4, 0, 3, 0 }; + static const u32 dqs_trim_val = 40; // 24 if HS533/HS667. + static const u8 tap_values_t210[4] = { 4, 0, 3, 0 }; u32 tap_val = 0; @@ -1366,8 +1366,8 @@ int sdmmc_init(sdmmc_t *sdmmc, u32 id, u32 power, u32 bus_width, u32 type) u16 divisor; u8 vref_sel = 7; - const u8 trim_values_t210[4] = { 2, 8, 3, 8 }; - const u8 trim_values_t210b01[4] = { 14, 13, 15, 13 }; + static const u8 trim_values_t210[4] = { 2, 8, 3, 8 }; + static const u8 trim_values_t210b01[4] = { 14, 13, 15, 13 }; const u8 *trim_values; if (id > SDMMC_4 || id == SDMMC_3) From e46f54d4e684b61552d9bc8c7e2ada559f8da838 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 2 Jun 2024 07:38:07 +0300 Subject: [PATCH 176/308] hekate/nyx: use static/const where it should --- bootloader/hos/hos.c | 4 +- bootloader/hos/pkg1.c | 6 +- bootloader/hos/pkg1.h | 6 +- bootloader/hos/pkg2.c | 4 +- bootloader/hos/pkg2.h | 12 +- bootloader/hos/pkg2_patches.inl | 174 +++++++++--------- loader/loader.c | 2 +- nyx/nyx_gui/frontend/fe_emmc_tools.c | 8 +- nyx/nyx_gui/frontend/gui_options.c | 6 +- .../frontend/gui_tools_partition_manager.c | 4 +- nyx/nyx_gui/gfx/logos-gui.h | 24 ++- 11 files changed, 133 insertions(+), 117 deletions(-) diff --git a/bootloader/hos/hos.c b/bootloader/hos/hos.c index b3fa251..cb92f4a 100644 --- a/bootloader/hos/hos.c +++ b/bootloader/hos/hos.c @@ -672,7 +672,7 @@ DPRINTF("Parsed GPT\n"); goto out; // Read in package2 header and get package2 real size. - const u32 BCT_SIZE = SZ_16K; + static const u32 BCT_SIZE = SZ_16K; bctBuf = (u8 *)malloc(BCT_SIZE); emmc_part_read(pkg2_part, BCT_SIZE / EMMC_BLOCKSIZE, 1, bctBuf); u32 *hdr = (u32 *)(bctBuf + 0x100); @@ -1017,7 +1017,7 @@ int hos_launch(ini_sec_t *cfg) } // In case a kernel patch option is set; allows to disable SVC verification or/and enable debug mode. - kernel_patch_t *kernel_patchset = ctxt.pkg2_kernel_id->kernel_patchset; + const kernel_patch_t *kernel_patchset = ctxt.pkg2_kernel_id->kernel_patchset; if (kernel_patchset != NULL) { gfx_printf("%kPatching kernel%k\n", TXT_CLR_ORANGE, TXT_CLR_DEFAULT); diff --git a/bootloader/hos/pkg1.c b/bootloader/hos/pkg1.c index d96b0f7..89b92a1 100644 --- a/bootloader/hos/pkg1.c +++ b/bootloader/hos/pkg1.c @@ -1,7 +1,7 @@ /* * Copyright (c) 2018 naehrwert * Copyright (c) 2018 st4rk - * Copyright (c) 2018-2023 CTCaer + * Copyright (c) 2018-2024 CTCaer * Copyright (c) 2018 balika011 * * This program is free software; you can redistribute it and/or modify it @@ -267,7 +267,7 @@ const u8 *pkg1_unpack(void *wm_dst, u32 *wb_sz, void *sm_dst, void *ldr_dst, con void pkg1_secmon_patch(void *hos_ctxt, u32 secmon_base, bool t210b01) { - patch_t *secmon_patchset; + const patch_t *secmon_patchset; launch_ctxt_t *ctxt = (launch_ctxt_t *)hos_ctxt; // Patch Secmon to allow for an unsigned package2 and patched kernel. @@ -320,7 +320,7 @@ void pkg1_secmon_patch(void *hos_ctxt, u32 secmon_base, bool t210b01) void pkg1_warmboot_patch(void *hos_ctxt) { launch_ctxt_t *ctxt = (launch_ctxt_t *)hos_ctxt; - patch_t *warmboot_patchset; + const patch_t *warmboot_patchset; // Patch warmboot on T210 to allow downgrading. switch (ctxt->pkg1_id->kb) diff --git a/bootloader/hos/pkg1.h b/bootloader/hos/pkg1.h index c70ffa5..c0dab9a 100644 --- a/bootloader/hos/pkg1.h +++ b/bootloader/hos/pkg1.h @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2022-2023 CTCaer + * Copyright (c) 2022-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -41,7 +41,7 @@ typedef struct _patch_t } patch_t; #define PATCHSET_DEF(name, ...) \ - patch_t name[] = { \ + const patch_t name[] = { \ __VA_ARGS__, \ { 0xFFFFFFFF, 0xFFFFFFFF } \ } @@ -79,7 +79,7 @@ typedef struct _pkg1_id_t u16 pkg11_off; u32 secmon_base; u32 warmboot_base; - patch_t *secmon_patchset; + const patch_t *secmon_patchset; } pkg1_id_t; typedef struct _pk11_hdr_t diff --git a/bootloader/hos/pkg2.c b/bootloader/hos/pkg2.c index 8be5439..290b6b6 100644 --- a/bootloader/hos/pkg2.c +++ b/bootloader/hos/pkg2.c @@ -57,7 +57,7 @@ enum kip_offset_section #include "pkg2_patches.inl" -static kip1_id_t *_kip_id_sets = _kip_ids; +static kip1_id_t *_kip_id_sets = (kip1_id_t *)_kip_ids; static u32 _kip_id_sets_cnt = ARRAY_SIZE(_kip_ids); void pkg2_get_ids(kip1_id_t **ids, u32 *entries) @@ -531,7 +531,7 @@ const char *pkg2_patch_kips(link_t *info, char *patch_names) // Check if there are patches to apply. bool patches_found = false; - kip1_patchset_t *patchset = _kip_id_sets[kip_id_idx].patchset; + const kip1_patchset_t *patchset = _kip_id_sets[kip_id_idx].patchset; while (patchset != NULL && patchset->name != NULL && !patches_found) { for (u32 i = 0; i < patches_num; i++) diff --git a/bootloader/hos/pkg2.h b/bootloader/hos/pkg2.h index a32355a..7bd2449 100644 --- a/bootloader/hos/pkg2.h +++ b/bootloader/hos/pkg2.h @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2023 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -43,11 +43,11 @@ typedef struct _kernel_patch_t u32 id; u32 off; u32 val; - u32 *ptr; + const u32 *ptr; } kernel_patch_t; #define KERNEL_PATCHSET_DEF(name, ...) \ - kernel_patch_t name[] = { \ + static const kernel_patch_t name[] = { \ __VA_ARGS__, \ {0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, (u32 *)0xFFFFFFFF} \ } @@ -124,7 +124,7 @@ typedef struct _pkg2_kip1_info_t typedef struct _pkg2_kernel_id_t { u8 hash[8]; - kernel_patch_t *kernel_patchset; + const kernel_patch_t *kernel_patchset; } pkg2_kernel_id_t; #define KIP1_PATCH_SRC_NO_CHECK (char *)(-1) @@ -140,14 +140,14 @@ typedef struct _kip1_patch_t typedef struct _kip1_patchset_t { char *name; // NULL means end. - kip1_patch_t *patches; // NULL means not necessary. + const kip1_patch_t *patches; // NULL means not necessary. } kip1_patchset_t; typedef struct _kip1_id_t { const char *name; u8 hash[8]; - kip1_patchset_t *patchset; + const kip1_patchset_t *patchset; } kip1_id_t; void pkg2_get_newkern_info(u8 *kern_data); diff --git a/bootloader/hos/pkg2_patches.inl b/bootloader/hos/pkg2_patches.inl index a7ed3c3..8637051 100644 --- a/bootloader/hos/pkg2_patches.inl +++ b/bootloader/hos/pkg2_patches.inl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2023 CTCaer + * Copyright (c) 2018-2024 CTCaer * Copyright (c) 2018 Atmosphère-NX * * This program is free software; you can redistribute it and/or modify it @@ -63,37 +63,37 @@ #define ID_RCV_OFF_1101 0x22B28 #define ID_RCV_OFF_1200 0x23424 -static u32 PRC_ID_SND_100[] = +static const u32 PRC_ID_SND_100[] = { 0xA9BF2FEA, 0x2A0E03EB, 0xD37EF56B, 0xF86B6B8B, 0x92FFFFE9, 0x8A090168, 0xD2FFFFE9, 0x8A09016B, 0xD2FFFFC9, 0xEB09017F, 0x54000040, 0xF9412948, 0xA8C12FEA }; #define CODE_OFF_2ND_100 (CODE_OFF_1ST_100 + sizeof(PRC_ID_SND_100) + sizeof(u32)) -static u32 PRC_ID_RCV_100[] = +static const u32 PRC_ID_RCV_100[] = { 0xA9BF2FEA, 0x2A1C03EA, 0xD37EF54A, 0xF86A69AA, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000040, 0xF9412968, 0xA8C12FEA }; -static u32 PRC_ID_SND_200[] = +static const u32 PRC_ID_SND_200[] = { 0xA9BF2FEA, 0x2A1803EB, 0xD37EF56B, 0xF86B6B8B, 0x92FFFFE9, 0x8A090168, 0xD2FFFFE9, 0x8A09016B, 0xD2FFFFC9, 0xEB09017F, 0x54000040, 0xF9413148, 0xA8C12FEA }; #define CODE_OFF_2ND_200 (CODE_OFF_1ST_200 + sizeof(PRC_ID_SND_200) + sizeof(u32)) -static u32 PRC_ID_RCV_200[] = +static const u32 PRC_ID_RCV_200[] = { 0xA9BF2FEA, 0x2A0F03EA, 0xD37EF54A, 0xF9405FEB, 0xF86A696A, 0xF9407BEB, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000040, 0xF9413168, 0xA8C12FEA }; -static u32 PRC_ID_SND_300[] = +static const u32 PRC_ID_SND_300[] = { 0xA9BF2FEA, 0x2A1803EB, 0xD37EF56B, 0xF86B6B8B, 0x92FFFFE9, 0x8A090168, 0xD2FFFFE9, 0x8A09016B, 0xD2FFFFC9, 0xEB09017F, 0x54000040, 0xF9415548, 0xA8C12FEA }; #define CODE_OFF_2ND_300 (CODE_OFF_1ST_300 + sizeof(PRC_ID_SND_300) + sizeof(u32)) -static u32 PRC_ID_RCV_300[] = +static const u32 PRC_ID_RCV_300[] = { 0xA9BF2FEA, 0x2A0F03EA, 0xD37EF54A, 0xF9405FEB, 0xF86A696A, 0xF9407BEB, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000040, 0xF9415568, 0xA8C12FEA @@ -101,52 +101,52 @@ static u32 PRC_ID_RCV_300[] = #define CODE_OFF_2ND_302 (CODE_OFF_1ST_302 + sizeof(PRC_ID_SND_300) + sizeof(u32)) -static u32 PRC_ID_SND_400[] = +static const u32 PRC_ID_SND_400[] = { 0x2A1703EA, 0xD37EF54A, 0xF86A6B8A, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000060, 0xF94053EA, 0xF9415948, 0xF94053EA }; #define CODE_OFF_2ND_400 (CODE_OFF_1ST_400 + sizeof(PRC_ID_SND_400) + sizeof(u32)) -static u32 PRC_ID_RCV_400[] = +static const u32 PRC_ID_RCV_400[] = { 0xF9403BED, 0x2A0E03EA, 0xD37EF54A, 0xF86A69AA, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000040, 0xF9415B28, 0xD503201F }; -static u32 PRC_ID_SND_500[] = +static const u32 PRC_ID_SND_500[] = { 0x2A1703EA, 0xD37EF54A, 0xF86A6B6A, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000060, 0xF94043EA, 0xF9415948, 0xF94043EA }; #define CODE_OFF_2ND_500 (CODE_OFF_1ST_500 + sizeof(PRC_ID_SND_500) + sizeof(u32)) -static u32 PRC_ID_RCV_500[] = +static const u32 PRC_ID_RCV_500[] = { 0xF9403BED, 0x2A1503EA, 0xD37EF54A, 0xF86A69AA, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000040, 0xF9415B08, 0xF9406FEA }; -static u32 PRC_ID_SND_600[] = +static const u32 PRC_ID_SND_600[] = { 0xA9BF2FEA, 0xF94037EB, 0x2A1503EA, 0xD37EF54A, 0xF86A696A, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000100, 0xA9BF27E8, 0xF9400308, 0xF9401D08, 0xAA1803E0, 0xD63F0100, 0xA8C127E8, 0xAA0003E8, 0xA8C12FEA, 0xAA0803E0 }; #define CODE_OFF_2ND_600 (CODE_OFF_1ST_600 + sizeof(PRC_ID_SND_600) + sizeof(u32)) -static u32 PRC_ID_RCV_600[] = +static const u32 PRC_ID_RCV_600[] = { 0xA9BF2FEA, 0xF94043EB, 0x2A1503EA, 0xD37EF54A, 0xF86A696A, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000100, 0xA9BF27E8, 0xF9400308, 0xF9401D08, 0xAA1803E0, 0xD63F0100, 0xA8C127E8, 0xAA0003E8, 0xA8C12FEA, 0xAA0803E0 }; -static u32 PRC_ID_SND_700[] = +static const u32 PRC_ID_SND_700[] = { 0xA9BF2FEA, 0xF9403BEB, 0x2A1903EA, 0xD37EF54A, 0xF86A696A, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000100, 0xA9BF27E8, 0xF94002A8, 0xF9401D08, 0xAA1503E0, 0xD63F0100, 0xA8C127E8, 0xAA0003E8, 0xA8C12FEA, 0xAA0803E0 }; #define CODE_OFF_2ND_700 (CODE_OFF_1ST_700 + sizeof(PRC_ID_SND_700) + sizeof(u32)) -static u32 PRC_ID_RCV_700[] = +static const u32 PRC_ID_RCV_700[] = { 0xA9BF2FEA, 0xF9404FEB, 0x2A1603EA, 0xD37EF54A, 0xF86A696A, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000100, 0xA9BF27E8, 0xF9400368, 0xF9401D08, 0xAA1B03E0, @@ -155,56 +155,56 @@ static u32 PRC_ID_RCV_700[] = #define CODE_OFF_2ND_800 (CODE_OFF_1ST_800 + sizeof(PRC_ID_SND_700) + sizeof(u32)) -static u32 PRC_ID_SND_900[] = +static const u32 PRC_ID_SND_900[] = { 0xA9BF2FEA, 0xF94037EB, 0x2A1603EA, 0xD37EF54A, 0xF86A696A, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000100, 0xA9BF27E8, 0xF94002E8, 0xF9401D08, 0xAA1703E0, 0xD63F0100, 0xA8C127E8, 0xAA0003E8, 0xA8C12FEA, 0xAA0803E0 }; #define CODE_OFF_2ND_900 (CODE_OFF_1ST_900 + sizeof(PRC_ID_SND_900) + sizeof(u32)) -static u32 PRC_ID_RCV_900[] = +static const u32 PRC_ID_RCV_900[] = { 0xA9BF2FEA, 0xF9404BEB, 0x2A1703EA, 0xD37EF54A, 0xF86A696A, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000100, 0xA9BF27E8, 0xF9400368, 0xF9401D08, 0xAA1B03E0, 0xD63F0100, 0xA8C127E8, 0xAA0003E8, 0xA8C12FEA, 0xAA0803E0 }; -static u32 PRC_ID_SND_1000[] = +static const u32 PRC_ID_SND_1000[] = { 0xA9BF2FEA, 0xF94063EB, 0x2A1603EA, 0xD37EF54A, 0xF86A696A, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000100, 0xA9BF27E8, 0xF94002E8, 0xF9401D08, 0xAA1703E0, 0xD63F0100, 0xA8C127E8, 0xAA0003E8, 0xA8C12FEA, 0xAA0803E0 }; #define CODE_OFF_2ND_1000 (CODE_OFF_1ST_1000 + sizeof(PRC_ID_SND_1000) + sizeof(u32)) -static u32 PRC_ID_RCV_1000[] = +static const u32 PRC_ID_RCV_1000[] = { 0xA9BF2FEA, 0xF94067EB, 0x2A1A03EA, 0xD37EF54A, 0xF86A696A, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000100, 0xA9BF27E8, 0xF9400388, 0xF9401D08, 0xAA1C03E0, 0xD63F0100, 0xA8C127E8, 0xAA0003E8, 0xA8C12FEA, 0xAA0803E0 }; -static u32 PRC_ID_SND_1100[] = +static const u32 PRC_ID_SND_1100[] = { 0xA9BF2FEA, 0xF94043EB, 0x5280006A, 0xD37EF54A, 0xF86A696A, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000100, 0xA9BF27E8, 0xF94002A8, 0xF9401D08, 0xAA1503E0, 0xD63F0100, 0xA8C127E8, 0xAA0003E8, 0xA8C12FEA, 0xAA0803E0 }; #define CODE_OFF_2ND_1100 (CODE_OFF_1ST_1100 + sizeof(PRC_ID_SND_1100) + sizeof(u32)) -static u32 PRC_ID_RCV_1100[] = +static const u32 PRC_ID_RCV_1100[] = { 0xA9BF2FEA, 0xF94073EB, 0x5280006A, 0xD37EF54A, 0xF86A696A, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000100, 0xA9BF27E8, 0xF9400308, 0xF9401D08, 0xAA1803E0, 0xD63F0100, 0xA8C127E8, 0xAA0003E8, 0xA8C12FEA, 0xAA0803E0 }; -static u32 PRC_ID_SND_1200[] = +static const u32 PRC_ID_SND_1200[] = { 0xA9BF2FEA, 0xF9404FEB, 0x5280006A, 0xD37EF54A, 0xF86A696A, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000100, 0xA9BF27E8, 0xF94002C8, 0xF9401D08, 0xAA1603E0, 0xD63F0100, 0xA8C127E8, 0xAA0003E8, 0xA8C12FEA, 0xAA0803E0 }; #define CODE_OFF_2ND_1200 (CODE_OFF_1ST_1200 + sizeof(PRC_ID_SND_1200) + sizeof(u32)) -static u32 PRC_ID_RCV_1200[] = +static const u32 PRC_ID_RCV_1200[] = { 0xA9BF2FEA, 0xF94073EB, 0x5280006A, 0xD37EF54A, 0xF86A696A, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000100, 0xA9BF27E8, 0xF9400388, 0xF9401D08, 0xAA1C03E0, @@ -448,354 +448,354 @@ static const pkg2_kernel_id_t _pkg2_kernel_ids[] = }; // All kip patch offsets are without the 0x100-sized header. -static kip1_patchset_t _fs_patches_100[] = { +static const kip1_patchset_t _fs_patches_100[] = { { "nogc", NULL }, { NULL, NULL } }; -static kip1_patch_t _fs_nogc_40x[] = { +static const kip1_patch_t _fs_nogc_40x[] = { { KPS(KIP_TEXT) | 0xA3458, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x72" }, { KPS(KIP_TEXT) | 0xAAB44, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { 0, 0, NULL, NULL } }; -static kip1_patchset_t _fs_patches_40x[] = { +static const kip1_patchset_t _fs_patches_40x[] = { { "nogc", _fs_nogc_40x }, { NULL, NULL } }; -static kip1_patch_t _fs_nogc_410[] = { +static const kip1_patch_t _fs_nogc_410[] = { { KPS(KIP_TEXT) | 0xA34BC, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x72" }, { KPS(KIP_TEXT) | 0xAABA8, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { 0, 0, NULL, NULL } }; -static kip1_patchset_t _fs_patches_410[] = { +static const kip1_patchset_t _fs_patches_410[] = { { "nogc", _fs_nogc_410 }, { NULL, NULL } }; -static kip1_patch_t _fs_nogc_50x[] = { +static const kip1_patch_t _fs_nogc_50x[] = { { KPS(KIP_TEXT) | 0xCF3C4, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { KPS(KIP_TEXT) | 0xD73A0, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { 0, 0, NULL, NULL } }; -static kip1_patchset_t _fs_patches_50x[] = { +static const kip1_patchset_t _fs_patches_50x[] = { { "nogc", _fs_nogc_50x }, { NULL, NULL } }; -static kip1_patch_t _fs_nogc_510[] = { +static const kip1_patch_t _fs_nogc_510[] = { { KPS(KIP_TEXT) | 0xCF794, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { KPS(KIP_TEXT) | 0xD7770, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { 0, 0, NULL, NULL } }; -static kip1_patchset_t _fs_patches_510[] = { +static const kip1_patchset_t _fs_patches_510[] = { { "nogc", _fs_nogc_510 }, { NULL, NULL } }; -static kip1_patch_t _fs_nogc_600[] = { +static const kip1_patch_t _fs_nogc_600[] = { { KPS(KIP_TEXT) | 0x12CC20, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { KPS(KIP_TEXT) | 0x1538F4, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; -static kip1_patch_t _fs_nogc_600_exfat[] = { +static const kip1_patch_t _fs_nogc_600_exfat[] = { { KPS(KIP_TEXT) | 0x138320, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { KPS(KIP_TEXT) | 0x15EFF4, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; -static kip1_patchset_t _fs_patches_600[] = { +static const kip1_patchset_t _fs_patches_600[] = { { "nogc", _fs_nogc_600 }, { NULL, NULL } }; -static kip1_patchset_t _fs_patches_600_exfat[] = { +static const kip1_patchset_t _fs_patches_600_exfat[] = { { "nogc", _fs_nogc_600_exfat }, { NULL, NULL } }; -static kip1_patch_t _fs_nogc_700[] = { +static const kip1_patch_t _fs_nogc_700[] = { { KPS(KIP_TEXT) | 0x134160, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { KPS(KIP_TEXT) | 0x15BF04, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; -static kip1_patch_t _fs_nogc_700_exfat[] = { +static const kip1_patch_t _fs_nogc_700_exfat[] = { { KPS(KIP_TEXT) | 0x13F710, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { KPS(KIP_TEXT) | 0x1674B4, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; -static kip1_patchset_t _fs_patches_700[] = { +static const kip1_patchset_t _fs_patches_700[] = { { "nogc", _fs_nogc_700 }, { NULL, NULL } }; -static kip1_patchset_t _fs_patches_700_exfat[] = { +static const kip1_patchset_t _fs_patches_700_exfat[] = { { "nogc", _fs_nogc_700_exfat }, { NULL, NULL } }; -static kip1_patch_t _fs_nogc_800[] = { +static const kip1_patch_t _fs_nogc_800[] = { { KPS(KIP_TEXT) | 0x136800, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { KPS(KIP_TEXT) | 0x15EB94, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; -static kip1_patch_t _fs_nogc_800_exfat[] = { +static const kip1_patch_t _fs_nogc_800_exfat[] = { { KPS(KIP_TEXT) | 0x141DB0, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { KPS(KIP_TEXT) | 0x16A144, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; -static kip1_patchset_t _fs_patches_800[] = { +static const kip1_patchset_t _fs_patches_800[] = { { "nogc", _fs_nogc_800 }, { NULL, NULL } }; -static kip1_patchset_t _fs_patches_800_exfat[] = { +static const kip1_patchset_t _fs_patches_800_exfat[] = { { "nogc", _fs_nogc_800_exfat }, { NULL, NULL } }; -static kip1_patch_t _fs_nogc_900[] = { +static const kip1_patch_t _fs_nogc_900[] = { { KPS(KIP_TEXT) | 0x129420, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { KPS(KIP_TEXT) | 0x143268, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; -static kip1_patchset_t _fs_patches_900[] = { +static const kip1_patchset_t _fs_patches_900[] = { { "nogc", _fs_nogc_900 }, { NULL, NULL } }; -static kip1_patch_t _fs_nogc_910[] = { +static const kip1_patch_t _fs_nogc_910[] = { { KPS(KIP_TEXT) | 0x129430, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { KPS(KIP_TEXT) | 0x143278, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; -static kip1_patchset_t _fs_patches_910[] = { +static const kip1_patchset_t _fs_patches_910[] = { { "nogc", _fs_nogc_910 }, { NULL, NULL } }; -static kip1_patch_t _fs_nogc_1000[] = { +static const kip1_patch_t _fs_nogc_1000[] = { { KPS(KIP_TEXT) | 0x13BE90, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { KPS(KIP_TEXT) | 0x14DE08, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; -static kip1_patchset_t _fs_patches_1000[] = { +static const kip1_patchset_t _fs_patches_1000[] = { { "nogc", _fs_nogc_1000 }, { NULL, NULL } }; -static kip1_patch_t _fs_nogc_1020[] = { +static const kip1_patch_t _fs_nogc_1020[] = { { KPS(KIP_TEXT) | 0x13C2F0, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { KPS(KIP_TEXT) | 0x14E268, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; -static kip1_patchset_t _fs_patches_1020[] = { +static const kip1_patchset_t _fs_patches_1020[] = { { "nogc", _fs_nogc_1020 }, { NULL, NULL } }; -static kip1_patch_t _fs_nogc_1100[] = { +static const kip1_patch_t _fs_nogc_1100[] = { { KPS(KIP_TEXT) | 0x1398B4, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { KPS(KIP_TEXT) | 0x156EB8, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; -static kip1_patchset_t _fs_patches_1100[] = { +static const kip1_patchset_t _fs_patches_1100[] = { { "nogc", _fs_nogc_1100 }, { NULL, NULL } }; -static kip1_patch_t _fs_nogc_1200[] = { +static const kip1_patch_t _fs_nogc_1200[] = { { KPS(KIP_TEXT) | 0x13EA24, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { KPS(KIP_TEXT) | 0x155368, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; -static kip1_patchset_t _fs_patches_1200[] = { +static const kip1_patchset_t _fs_patches_1200[] = { { "nogc", _fs_nogc_1200 }, { NULL, NULL } }; -static kip1_patch_t _fs_nogc_1203[] = { +static const kip1_patch_t _fs_nogc_1203[] = { { KPS(KIP_TEXT) | 0x13EB34, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { KPS(KIP_TEXT) | 0x155478, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; -static kip1_patchset_t _fs_patches_1203[] = { +static const kip1_patchset_t _fs_patches_1203[] = { { "nogc", _fs_nogc_1203 }, { NULL, NULL } }; -static kip1_patch_t _fs_nogc_1300[] = { +static const kip1_patch_t _fs_nogc_1300[] = { { KPS(KIP_TEXT) | 0x1425D0, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { KPS(KIP_TEXT) | 0x159018, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; -static kip1_patchset_t _fs_patches_1300[] = { +static const kip1_patchset_t _fs_patches_1300[] = { { "nogc", _fs_nogc_1300 }, { NULL, NULL } }; -static kip1_patch_t _fs_nogc_1310[] = { +static const kip1_patch_t _fs_nogc_1310[] = { { KPS(KIP_TEXT) | 0x142570, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { KPS(KIP_TEXT) | 0x158FB8, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; -static kip1_patchset_t _fs_patches_1310[] = { +static const kip1_patchset_t _fs_patches_1310[] = { { "nogc", _fs_nogc_1310 }, { NULL, NULL } }; -static kip1_patch_t _fs_nogc_1400[] = { +static const kip1_patch_t _fs_nogc_1400[] = { { KPS(KIP_TEXT) | 0x164230, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { KPS(KIP_TEXT) | 0x18A2E8, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; -static kip1_patchset_t _fs_patches_1400[] = { +static const kip1_patchset_t _fs_patches_1400[] = { { "nogc", _fs_nogc_1400 }, { NULL, NULL } }; -static kip1_patch_t _fs_nogc_1400_exfat[] = { +static const kip1_patch_t _fs_nogc_1400_exfat[] = { { KPS(KIP_TEXT) | 0x16F5B0, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { KPS(KIP_TEXT) | 0x195668, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; -static kip1_patchset_t _fs_patches_1400_exfat[] = { +static const kip1_patchset_t _fs_patches_1400_exfat[] = { { "nogc", _fs_nogc_1400_exfat }, { NULL, NULL } }; -static kip1_patch_t _fs_nogc_1500[] = { +static const kip1_patch_t _fs_nogc_1500[] = { { KPS(KIP_TEXT) | 0x15ECE4, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { KPS(KIP_TEXT) | 0x184158, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; -static kip1_patchset_t _fs_patches_1500[] = { +static const kip1_patchset_t _fs_patches_1500[] = { { "nogc", _fs_nogc_1500 }, { NULL, NULL } }; -static kip1_patch_t _fs_nogc_1500_exfat[] = { +static const kip1_patch_t _fs_nogc_1500_exfat[] = { { KPS(KIP_TEXT) | 0x169C74, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { KPS(KIP_TEXT) | 0x18F0E8, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; -static kip1_patchset_t _fs_patches_1500_exfat[] = { +static const kip1_patchset_t _fs_patches_1500_exfat[] = { { "nogc", _fs_nogc_1500_exfat }, { NULL, NULL } }; -static kip1_patch_t _fs_nogc_1600[] = { +static const kip1_patch_t _fs_nogc_1600[] = { { KPS(KIP_TEXT) | 0x160B70, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { KPS(KIP_TEXT) | 0x1865D8, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; -static kip1_patchset_t _fs_patches_1600[] = { +static const kip1_patchset_t _fs_patches_1600[] = { { "nogc", _fs_nogc_1600 }, { NULL, NULL } }; -static kip1_patch_t _fs_nogc_1600_exfat[] = { +static const kip1_patch_t _fs_nogc_1600_exfat[] = { { KPS(KIP_TEXT) | 0x16B850, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { KPS(KIP_TEXT) | 0x1912B8, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; -static kip1_patchset_t _fs_patches_1600_exfat[] = { +static const kip1_patchset_t _fs_patches_1600_exfat[] = { { "nogc", _fs_nogc_1600_exfat }, { NULL, NULL } }; -static kip1_patch_t _fs_nogc_1603[] = { +static const kip1_patch_t _fs_nogc_1603[] = { { KPS(KIP_TEXT) | 0x160BC0, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { KPS(KIP_TEXT) | 0x186628, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; -static kip1_patchset_t _fs_patches_1603[] = { +static const kip1_patchset_t _fs_patches_1603[] = { { "nogc", _fs_nogc_1603 }, { NULL, NULL } }; -static kip1_patch_t _fs_nogc_1603_exfat[] = { +static const kip1_patch_t _fs_nogc_1603_exfat[] = { { KPS(KIP_TEXT) | 0x16B8A0, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { KPS(KIP_TEXT) | 0x191308, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; -static kip1_patchset_t _fs_patches_1603_exfat[] = { +static const kip1_patchset_t _fs_patches_1603_exfat[] = { { "nogc", _fs_nogc_1603_exfat }, { NULL, NULL } }; -static kip1_patch_t _fs_nogc_1700[] = { +static const kip1_patch_t _fs_nogc_1700[] = { { KPS(KIP_TEXT) | 0x165100, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { KPS(KIP_TEXT) | 0x18B048, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; -static kip1_patchset_t _fs_patches_1700[] = { +static const kip1_patchset_t _fs_patches_1700[] = { { "nogc", _fs_nogc_1700 }, { NULL, NULL } }; -static kip1_patch_t _fs_nogc_1700_exfat[] = { +static const kip1_patch_t _fs_nogc_1700_exfat[] = { { KPS(KIP_TEXT) | 0x16FF60, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { KPS(KIP_TEXT) | 0x195EA8, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; -static kip1_patchset_t _fs_patches_1700_exfat[] = { +static const kip1_patchset_t _fs_patches_1700_exfat[] = { { "nogc", _fs_nogc_1700_exfat }, { NULL, NULL } }; -static kip1_patch_t _fs_nogc_1800[] = { +static const kip1_patch_t _fs_nogc_1800[] = { { KPS(KIP_TEXT) | 0x164A50, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { KPS(KIP_TEXT) | 0x18AE48, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; -static kip1_patchset_t _fs_patches_1800[] = { +static const kip1_patchset_t _fs_patches_1800[] = { { "nogc", _fs_nogc_1800 }, { NULL, NULL } }; -static kip1_patch_t _fs_nogc_1800_exfat[] = { +static const kip1_patch_t _fs_nogc_1800_exfat[] = { { KPS(KIP_TEXT) | 0x16FAE0, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, { KPS(KIP_TEXT) | 0x195ED8, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, { 0, 0, NULL, NULL } }; -static kip1_patchset_t _fs_patches_1800_exfat[] = { +static const kip1_patchset_t _fs_patches_1800_exfat[] = { { "nogc", _fs_nogc_1800_exfat }, { NULL, NULL } }; // SHA256 hashes. -static kip1_id_t _kip_ids[] = +static const kip1_id_t _kip_ids[] = { { "FS", "\xde\x9f\xdd\xa4\x08\x5d\xd5\xfe", _fs_patches_100 }, // FS 1.0.0 { "FS", "\xfc\x3e\x80\x99\x1d\xca\x17\x96", _fs_patches_100 }, // FS 1.0.0 exFAT diff --git a/loader/loader.c b/loader/loader.c index 322a13d..2f8a148 100644 --- a/loader/loader.c +++ b/loader/loader.c @@ -37,7 +37,7 @@ const volatile ipl_ver_meta_t __attribute__((section ("._ipl_version"))) ipl_ver .rsvd1 = 0 }; -const volatile char __attribute__((section ("._octopus"))) octopus[] = +const char __attribute__((section ("._octopus"))) octopus[] = "\n" " ___\n" " .-' `'.\n" diff --git a/nyx/nyx_gui/frontend/fe_emmc_tools.c b/nyx/nyx_gui/frontend/fe_emmc_tools.c index c38d147..3562594 100644 --- a/nyx/nyx_gui/frontend/fe_emmc_tools.c +++ b/nyx/nyx_gui/frontend/fe_emmc_tools.c @@ -145,7 +145,7 @@ static int _dump_emmc_verify(emmc_tool_gui_t *gui, sdmmc_storage_t *storage, u32 u32 prevPct = 200; u32 sdFileSector = 0; int res = 0; - const char hexa[] = "0123456789abcdef"; + static const char hexa[] = "0123456789abcdef"; DWORD *clmt = NULL; u8 hashEm[SE_SHA_256_SIZE]; @@ -340,8 +340,8 @@ bool partial_sd_full_unmount = false; static int _dump_emmc_part(emmc_tool_gui_t *gui, char *sd_path, int active_part, sdmmc_storage_t *storage, emmc_part_t *part) { - const u32 FAT32_FILESIZE_LIMIT = 0xFFFFFFFF; - const u32 SECTORS_TO_MIB_COEFF = 11; + static const u32 FAT32_FILESIZE_LIMIT = 0xFFFFFFFF; + static const u32 SECTORS_TO_MIB_COEFF = 11; partial_sd_full_unmount = false; @@ -942,7 +942,7 @@ out: static int _restore_emmc_part(emmc_tool_gui_t *gui, char *sd_path, int active_part, sdmmc_storage_t *storage, emmc_part_t *part, bool allow_multi_part) { - const u32 SECTORS_TO_MIB_COEFF = 11; + static const u32 SECTORS_TO_MIB_COEFF = 11; u32 lba_end = part->lba_end; u32 totalSectors = part->lba_end - part->lba_start + 1; diff --git a/nyx/nyx_gui/frontend/gui_options.c b/nyx/nyx_gui/frontend/gui_options.c index 401704a..3d78007 100644 --- a/nyx/nyx_gui/frontend/gui_options.c +++ b/nyx/nyx_gui/frontend/gui_options.c @@ -545,7 +545,7 @@ static lv_res_t _preset_hue_action(lv_obj_t *btn) return LV_RES_OK; } -const u16 theme_colors[17] = { +static const u16 theme_colors[17] = { 4, 13, 23, 33, 43, 54, 66, 89, 124, 167, 187, 200, 208, 231, 261, 291, 341 }; @@ -740,7 +740,7 @@ static lv_res_t _create_mbox_clock_edit(lv_obj_t *btn) lv_obj_set_style(dark_bg, &mbox_darken); lv_obj_set_size(dark_bg, LV_HOR_RES, LV_VER_RES); - static const char * mbox_btn_map[] = { "\251", "\222Done", "\222Cancel", "\251", "" }; + static const char *mbox_btn_map[] = { "\251", "\222Done", "\222Cancel", "\251", "" }; lv_obj_t *mbox = lv_mbox_create(dark_bg, NULL); lv_mbox_set_recolor_text(mbox, true); lv_obj_set_width(mbox, LV_HOR_RES / 9 * 6); @@ -1032,7 +1032,7 @@ disabled_or_cal0_issue:; lv_obj_set_style(dark_bg, &mbox_darken); lv_obj_set_size(dark_bg, LV_HOR_RES, LV_VER_RES); - static const char * mbox_btn_map[] = { "\251", "\222OK", "\251", "" }; + static const char *mbox_btn_map[] = { "\251", "\222OK", "\251", "" }; lv_obj_t * mbox = lv_mbox_create(dark_bg, NULL); lv_mbox_set_recolor_text(mbox, true); lv_obj_set_width(mbox, LV_HOR_RES / 9 * 5); diff --git a/nyx/nyx_gui/frontend/gui_tools_partition_manager.c b/nyx/nyx_gui/frontend/gui_tools_partition_manager.c index 33fa0fa..2f8a05c 100644 --- a/nyx/nyx_gui/frontend/gui_tools_partition_manager.c +++ b/nyx/nyx_gui/frontend/gui_tools_partition_manager.c @@ -267,7 +267,7 @@ out: static void _create_gpt_partition(gpt_t *gpt, u8 *gpt_idx, u32 *curr_part_lba, u32 size_lba, char *name, int name_size) { - const u8 linux_part_guid[] = { 0xAF, 0x3D, 0xC6, 0x0F, 0x83, 0x84, 0x72, 0x47, 0x8E, 0x79, 0x3D, 0x69, 0xD8, 0x47, 0x7D, 0xE4 }; + static const u8 linux_part_guid[] = { 0xAF, 0x3D, 0xC6, 0x0F, 0x83, 0x84, 0x72, 0x47, 0x8E, 0x79, 0x3D, 0x69, 0xD8, 0x47, 0x7D, 0xE4 }; u8 random_number[16]; // Create GPT partition. @@ -1844,7 +1844,7 @@ static lv_res_t _action_slider_emu(lv_obj_t *slider) #define EMUMMC_32GB_FULL 29856 #define EMUMMC_64GB_FULL (59664 + 1) // 1MB extra for backup GPT. - const u32 rsvd_mb = 4 + 4 + 16 + 8; // BOOT0 + BOOT1 + 16MB offset + 8MB alignment. + static const u32 rsvd_mb = 4 + 4 + 16 + 8; // BOOT0 + BOOT1 + 16MB offset + 8MB alignment. u32 size; char lbl_text[64]; bool prev_emu_double = part_info.emu_double; diff --git a/nyx/nyx_gui/gfx/logos-gui.h b/nyx/nyx_gui/gfx/logos-gui.h index 00de294..de65974 100644 --- a/nyx/nyx_gui/gfx/logos-gui.h +++ b/nyx/nyx_gui/gfx/logos-gui.h @@ -1,3 +1,19 @@ +/* + * Copyright (c) 2018-2024 CTCaer + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + #ifndef _LOGOS_GUI_H_ #define _LOGOS_GUI_H_ @@ -374,7 +390,7 @@ const u8 touch_cursor_map[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; -lv_img_dsc_t touch_cursor = { +const lv_img_dsc_t touch_cursor = { .header.always_zero = 0, .header.w = 33, .header.h = 33, @@ -385,7 +401,7 @@ lv_img_dsc_t touch_cursor = { #ifdef HEKATE_LOGO -lv_img_dsc_t hekate_logo = { +const lv_img_dsc_t hekate_logo = { .header.always_zero = 0, .header.w = 193, .header.h = 76, @@ -394,7 +410,7 @@ lv_img_dsc_t hekate_logo = { .data = (const uint8_t *)(NYX_RES_ADDR + 0x1D900), }; -lv_img_dsc_t ctcaer_logo = { +const lv_img_dsc_t ctcaer_logo = { .header.always_zero = 0, .header.w = 147, .header.h = 76, @@ -405,4 +421,4 @@ lv_img_dsc_t ctcaer_logo = { #endif -#endif \ No newline at end of file +#endif From 6b54c4a4774f15cdfac0c3857636a8e473a82075 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 2 Jun 2024 07:40:11 +0300 Subject: [PATCH 177/308] bdk: usb: hid: don't send a packet if no new data Reduce the interrupt caused at the host side --- bdk/usb/usb_gadget_hid.c | 31 +++++++++++++++++++++++-------- 1 file changed, 23 insertions(+), 8 deletions(-) diff --git a/bdk/usb/usb_gadget_hid.c b/bdk/usb/usb_gadget_hid.c index 3e12dfa..591649a 100644 --- a/bdk/usb/usb_gadget_hid.c +++ b/bdk/usb/usb_gadget_hid.c @@ -71,6 +71,12 @@ typedef struct _jc_cal_t u16 cry_min; } jc_cal_t; +enum { + INPUT_POLL_HAS_PACKET, + INPUT_POLL_NO_PACKET, + INPUT_POLL_EXIT, +}; + static jc_cal_t jc_cal_ctx; static usb_ops_t usb_ops; @@ -119,22 +125,24 @@ static bool _jc_calibration(jc_gamepad_rpt_t *jc_pad) return true; } -static bool _jc_poll(gamepad_report_t *rpt) +static int _jc_poll(gamepad_report_t *rpt) { + static gamepad_report_t prev_rpt = {0}; + // Poll Joy-Con. jc_gamepad_rpt_t *jc_pad = joycon_poll(); if (!jc_pad) - return false; + return INPUT_POLL_NO_PACKET; // Exit emulation if Left stick and Home are pressed. if (jc_pad->l3 && jc_pad->home) - return true; + return INPUT_POLL_EXIT; if (jc_cal_ctx.cl_step != JC_CAL_MAX_STEPS || jc_cal_ctx.cr_step != JC_CAL_MAX_STEPS) { if (!_jc_calibration(jc_pad)) - return false; + return INPUT_POLL_NO_PACKET; } // Re-calibrate on disconnection. @@ -282,7 +290,12 @@ static bool _jc_poll(gamepad_report_t *rpt) //rpt->btn13 = jc_pad->cap; //rpt->btn14 = jc_pad->home; - return false; + if (!memcmp(rpt, &prev_rpt, sizeof(gamepad_report_t))) + return INPUT_POLL_NO_PACKET; + + memcpy(&prev_rpt, rpt, sizeof(gamepad_report_t)); + + return INPUT_POLL_HAS_PACKET; } typedef struct _touchpad_report_t @@ -351,12 +364,14 @@ static u8 _hid_transfer_start(usb_ctxt_t *usbs, u32 len) static bool _hid_poll_jc(usb_ctxt_t *usbs) { - if (_jc_poll((gamepad_report_t *)USB_EP_BULK_IN_BUF_ADDR)) + int res = _jc_poll((gamepad_report_t *)USB_EP_BULK_IN_BUF_ADDR); + if (res == INPUT_POLL_EXIT) return true; // Send HID report. - if (_hid_transfer_start(usbs, sizeof(gamepad_report_t))) - return true; // EP Error. + if (res == INPUT_POLL_HAS_PACKET) + if (_hid_transfer_start(usbs, sizeof(gamepad_report_t))) + return true; // EP Error. return false; } From 0a6521ec26d4319cf2c9a41e7fd99bc8666ea99b Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 2 Jun 2024 07:41:18 +0300 Subject: [PATCH 178/308] Update "about" copyrights --- README.md | 22 ++++++++++++++-------- bootloader/main.c | 9 +++++---- nyx/nyx_gui/frontend/gui.c | 21 +++++++++++---------- 3 files changed, 30 insertions(+), 22 deletions(-) diff --git a/README.md b/README.md index 98a8527..f8f5a29 100644 --- a/README.md +++ b/README.md @@ -188,20 +188,26 @@ hekate has a boot storage in the binary that helps it configure it outside of BP ``` hekate (c) 2018, naehrwert, st4rk. - (c) 2018-2023, CTCaer. + (c) 2018-2024, CTCaer. -Nyx GUI (c) 2019-2023, CTCaer. +Nyx GUI (c) 2019-2024, CTCaer. Thanks to: derrek, nedwill, plutoo, shuffle2, smea, thexyz, yellows8. Greetings to: fincs, hexkyz, SciresM, Shiny Quagsire, WinterMute. Open source and free packages used: - - FatFs R0.13a, Copyright (c) 2017, ChaN - - bcl-1.2.0, Copyright (c) 2003-2006, Marcus Geelnard - - Atmosphère (Exosphere types/panic, prc id kernel patches), - Copyright (c) 2018-2019, Atmosphère-NX - - elfload, Copyright (c) 2014 Owen Shepherd, Copyright (c) 2018 M4xw - - Littlev Graphics Library, Copyright (c) 2016 Gabor Kiss-Vamosi + - Littlev Graphics Library, + Copyright (c) 2016-2018 Gabor Kiss-Vamosi + - FatFs R0.13c, + Copyright (c) 2006-2018, ChaN + Copyright (c) 2018-2022, CTCaer + - bcl-1.2.0, + Copyright (c) 2003-2006, Marcus Geelnard + - blz, + Copyright (c) 2018, SciresM + - elfload, + Copyright (c) 2014 Owen Shepherd, + Copyright (c) 2018 M4xw ___ .-' `'. diff --git a/bootloader/main.c b/bootloader/main.c index 840c22e..4434459 100644 --- a/bootloader/main.c +++ b/bootloader/main.c @@ -1383,7 +1383,7 @@ static void _about() { static const char credits[] = "\nhekate (c) 2018, naehrwert, st4rk\n\n" - " (c) 2018-2023, CTCaer\n\n" + " (c) 2018-2024, CTCaer\n\n" " ___________________________________________\n\n" "Thanks to: %kderrek, nedwill, plutoo,\n" " shuffle2, smea, thexyz, yellows8%k\n" @@ -1393,11 +1393,12 @@ static void _about() " ___________________________________________\n\n" "Open source and free packages used:\n\n" " - FatFs R0.13c\n" - " (c) 2018, ChaN\n\n" + " (c) 2006-2018, ChaN\n" + " (c) 2018-2022, CTCaer\n\n" " - bcl-1.2.0\n" " (c) 2003-2006, Marcus Geelnard\n\n" - " - Atmosphere (Exo st/types, prc id patches)\n" - " (c) 2018-2019, Atmosphere-NX\n\n" + " - blz\n" + " (c) 2018, SciresM\n\n" " - elfload\n" " (c) 2014, Owen Shepherd\n" " (c) 2018, M4xw\n" diff --git a/nyx/nyx_gui/frontend/gui.c b/nyx/nyx_gui/frontend/gui.c index 9f18ca0..19886d8 100644 --- a/nyx/nyx_gui/frontend/gui.c +++ b/nyx/nyx_gui/frontend/gui.c @@ -1231,10 +1231,10 @@ static void _create_tab_about(lv_theme_t * th, lv_obj_t * parent) lv_label_set_style(lbl_credits, &monospace_text); lv_label_set_recolor(lbl_credits, true); lv_label_set_static_text(lbl_credits, - "#C7EA46 hekate# (c) 2018, #C7EA46 naehrwert#, #C7EA46 st4rk#\n" - " (c) 2018-2023, #C7EA46 CTCaer#\n" + "#C7EA46 hekate# (c) 2018, #C7EA46 naehrwert#, #C7EA46 st4rk#\n" + " (c) 2018-2024, #C7EA46 CTCaer#\n" "\n" - "#C7EA46 Nyx GUI# (c) 2019-2023, #C7EA46 CTCaer#\n" + "#C7EA46 Nyx# (c) 2019-2024, #C7EA46 CTCaer#\n" "\n" "Thanks to: #00CCFF derrek, nedwill, plutoo, #\n" " #00CCFF shuffle2, smea, thexyz, yellows8 #\n" @@ -1242,18 +1242,19 @@ static void _create_tab_about(lv_theme_t * th, lv_obj_t * parent) "Greetings to: fincs, hexkyz, SciresM,\n" " Shiny Quagsire, WinterMute\n" "\n" - "Open source and free packages used:\n\n" + "Open source and free packages used: \n" // Label width alignment padding. + " - Littlev Graphics Library,\n" + " Copyright (c) 2016-2018, Gabor Kiss-Vamosi\n\n" " - FatFs R0.13c,\n" - " Copyright (c) 2018, ChaN\n\n" + " Copyright (c) 2006-2018, ChaN\n" + " Copyright (c) 2018-2022, CTCaer\n\n" " - bcl-1.2.0,\n" " Copyright (c) 2003-2006, Marcus Geelnard\n\n" - " - Atmosphere (Exosphere types/panic, proc id patches),\n" - " Copyright (c) 2018-2019, Atmosphere-NX\n\n" + " - blz,\n" + " Copyright (c) 2018, SciresM\n\n" " - elfload,\n" " Copyright (c) 2014, Owen Shepherd\n" - " Copyright (c) 2018, M4xw\n\n" - " - Littlev Graphics Library,\n" - " Copyright (c) 2016 Gabor Kiss-Vamosi" + " Copyright (c) 2018, M4xw" ); lv_obj_t * lbl_octopus = lv_label_create(parent, NULL); From 859811a154cbb76dc57bc2f79ffb6ed2a70ca188 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 2 Jun 2024 07:42:35 +0300 Subject: [PATCH 179/308] bdk: fatfs: update copyright Last edit was in 2022. --- bdk/libs/fatfs/ff.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bdk/libs/fatfs/ff.c b/bdk/libs/fatfs/ff.c index b61fa7d..4cae990 100644 --- a/bdk/libs/fatfs/ff.c +++ b/bdk/libs/fatfs/ff.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2021 CTCaer + * Copyright (c) 2018-2022 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, From 05db43a97cb92ff8811fdde899aea95112208990 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 2 Jun 2024 07:44:22 +0300 Subject: [PATCH 180/308] bdk: hwinit: move down debug uart init --- bdk/soc/hw_init.c | 25 +++++++++++++------------ 1 file changed, 13 insertions(+), 12 deletions(-) diff --git a/bdk/soc/hw_init.c b/bdk/soc/hw_init.c index b263c57..0fb62a7 100644 --- a/bdk/soc/hw_init.c +++ b/bdk/soc/hw_init.c @@ -373,18 +373,6 @@ void hw_init() // Initialize pin configuration. _config_gpios(nx_hoag); -#ifdef DEBUG_UART_PORT - #if (DEBUG_UART_PORT == UART_B) - gpio_config(GPIO_PORT_G, GPIO_PIN_0, GPIO_MODE_SPIO); - #elif (DEBUG_UART_PORT == UART_C) - gpio_config(GPIO_PORT_D, GPIO_PIN_1, GPIO_MODE_SPIO); - #endif - pinmux_config_uart(DEBUG_UART_PORT); - clock_enable_uart(DEBUG_UART_PORT); - uart_init(DEBUG_UART_PORT, DEBUG_UART_BAUDRATE, UART_AO_TX_AO_RX); - uart_invert(DEBUG_UART_PORT, DEBUG_UART_INVERT, UART_INVERT_TXD); -#endif - // Enable CL-DVFS clock unconditionally to avoid issues with I2C5 sharing. clock_enable_cl_dvfs(); @@ -434,6 +422,19 @@ void hw_init() // Enable HOST1X used by every display module (DC, VIC, NVDEC, NVENC, TSEC, etc). clock_enable_host1x(); + +#ifdef DEBUG_UART_PORT + // Setup debug uart port. + #if (DEBUG_UART_PORT == UART_B) + gpio_config(GPIO_PORT_G, GPIO_PIN_0, GPIO_MODE_SPIO); + #elif (DEBUG_UART_PORT == UART_C) + gpio_config(GPIO_PORT_D, GPIO_PIN_1, GPIO_MODE_SPIO); + #endif + pinmux_config_uart(DEBUG_UART_PORT); + clock_enable_uart(DEBUG_UART_PORT); + uart_init(DEBUG_UART_PORT, DEBUG_UART_BAUDRATE, UART_AO_TX_AO_RX); + uart_invert(DEBUG_UART_PORT, DEBUG_UART_INVERT, UART_INVERT_TXD); +#endif } void hw_deinit(bool coreboot, u32 bl_magic) From b01cc2432f81a05c41de2ec4aa167c0c58a05f55 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 2 Jun 2024 07:46:18 +0300 Subject: [PATCH 181/308] bdk: irq: remove ack source HW interrupts can't be managed by FIR. Only actual hw can clear the interrupt. --- bdk/soc/irq.c | 15 +-------------- 1 file changed, 1 insertion(+), 14 deletions(-) diff --git a/bdk/soc/irq.c b/bdk/soc/irq.c index 5ecfb58..f100dba 100644 --- a/bdk/soc/irq.c +++ b/bdk/soc/irq.c @@ -1,7 +1,7 @@ /* * BPMP-Lite IRQ driver for Tegra X1 * - * Copyright (c) 2019 CTCaer + * Copyright (c) 2019-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -71,19 +71,9 @@ static void _irq_disable_and_ack_all() { u32 enabled_irqs = ICTLR(ctrl_idx, PRI_ICTLR_COP_IER); ICTLR(ctrl_idx, PRI_ICTLR_COP_IER_CLR) = enabled_irqs; - ICTLR(ctrl_idx, PRI_ICTLR_FIR_CLR) = enabled_irqs; } } -static void _irq_ack_source(u32 irq) -{ - u32 ctrl_idx = irq >> 5; - u32 bit = irq % 32; - - // Force stop the interrupt as it's serviced here. - ICTLR(ctrl_idx, PRI_ICTLR_FIR_CLR) = BIT(bit); -} - void irq_free(u32 irq) { for (u32 idx = 0; idx < IRQ_MAX_HANDLERS; idx++) @@ -121,7 +111,6 @@ static irq_status_t _irq_handle_source(u32 irq) int status = IRQ_NONE; _irq_disable_source(irq); - _irq_ack_source(irq); u32 idx; for (idx = 0; idx < IRQ_MAX_HANDLERS; idx++) @@ -155,7 +144,6 @@ void irq_handler() if (!irq_init_done) { _irq_disable_source(irq); - _irq_ack_source(irq); return; } @@ -197,7 +185,6 @@ void irq_wait_event(u32 irq) FLOW_CTLR(FLOW_CTLR_HALT_COP_EVENTS) = HALT_MODE_STOP_UNTIL_IRQ; _irq_disable_source(irq); - _irq_ack_source(irq); irq_enable_cpu_irq_exceptions(); } From a96cac59647b5b656ba3824b78734983302846fe Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 2 Jun 2024 07:56:07 +0300 Subject: [PATCH 182/308] hekate: adjust payload sd wait hekate always waits at init, so not need to do that 2 times. --- bootloader/main.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/bootloader/main.c b/bootloader/main.c index 4434459..ef2efda 100644 --- a/bootloader/main.c +++ b/bootloader/main.c @@ -265,15 +265,17 @@ static void _launch_payload(char *path, bool update, bool clear_screen) hw_deinit(true, magic); } - // Some cards (Sandisk U1), do not like a fast power cycle. Wait min 100ms. - sdmmc_storage_init_wait_sd(); - void (*update_ptr)() = (void *)RCM_PAYLOAD_ADDR; void (*ext_payload_ptr)() = (void *)EXT_PAYLOAD_ADDR; // Launch our payload. if (!update) + { + // Some cards (Sandisk U1), do not like a fast power cycle. Wait min 100ms. + sdmmc_storage_init_wait_sd(); + (*ext_payload_ptr)(); + } else { // Set updated flag to skip check on launch. From 146ff53a310d922c7f7cd2dae527a9c82c9abcc4 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 2 Jun 2024 07:57:22 +0300 Subject: [PATCH 183/308] hekate: set bpmp high clock earlier --- bootloader/main.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/bootloader/main.c b/bootloader/main.c index ef2efda..4046c4c 100644 --- a/bootloader/main.c +++ b/bootloader/main.c @@ -1513,6 +1513,9 @@ void ipl_main() // Initialize display. display_init(); + // Overclock BPMP. + bpmp_clk_rate_set(h_cfg.t210b01 ? BPMP_CLK_DEFAULT_BOOST : BPMP_CLK_LOWER_BOOST); + // Mount SD Card. h_cfg.errors |= !sd_mount() ? ERR_SD_BOOT_EN : 0; @@ -1541,12 +1544,10 @@ skip_lp0_minerva_config: gfx_init_ctxt(fb, 720, 1280, 720); gfx_con_init(); + // Initialize backlight PWM. display_backlight_pwm_init(); //display_backlight_brightness(h_cfg.backlight, 1000); - // Overclock BPMP. - bpmp_clk_rate_set(h_cfg.t210b01 ? BPMP_CLK_DEFAULT_BOOST : BPMP_CLK_LOWER_BOOST); - // Get R2P config from RTC. if (h_cfg.t210b01) _r2p_get_config_t210b01(); From bd55a3e756893b7206996c148898530b889b7fa0 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 2 Jun 2024 08:00:42 +0300 Subject: [PATCH 184/308] bdk: clock: always set DISPA source No need to distinguish between LP or HS. Setting the same value doesn't glitch. --- bdk/soc/clock.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/bdk/soc/clock.c b/bdk/soc/clock.c index 90538cb..6b2870c 100644 --- a/bdk/soc/clock.c +++ b/bdk/soc/clock.c @@ -417,10 +417,8 @@ void clock_enable_plld(u32 divp, u32 divn, bool lowpower, bool tegra_t210) if (lowpower && tegra_t210) misc = 0x2D0000 | 0x0AAA; // Clock enable and PLLD_SDM_DIN: 2730 -> DIVN + 0.833. - - // Set DISP1 clock source and parent clock. - if (lowpower) - CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_DISP1) = (2 << 29u) | CLK_SRC_DIV(1); // PLLD_OUT0. + // Set DISP1 clock source. + CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_DISP1) = 2 << 29u; // PLLD_OUT0. // Set dividers and enable PLLD. CLOCK(CLK_RST_CONTROLLER_PLLD_BASE) = PLLCX_BASE_ENABLE | PLLCX_BASE_LOCK | plld_div; From 28eb3f4bcd936ca3d12c061270f594ee4364da4d Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 2 Jun 2024 08:02:44 +0300 Subject: [PATCH 185/308] bdk: display: deduplicate array size macro --- bdk/display/di.c | 56 ++++++++++++++++++++++++------------------------ bdk/utils/util.h | 2 -- 2 files changed, 28 insertions(+), 30 deletions(-) diff --git a/bdk/display/di.c b/bdk/display/di.c index ca51ba3..13157e7 100644 --- a/bdk/display/di.c +++ b/bdk/display/di.c @@ -448,26 +448,26 @@ void display_init() clock_enable_plld(3, 20, true, tegra_t210); // Setup Display Interface initial window configuration. - exec_cfg((u32 *)DISPLAY_A_BASE, _di_dc_setup_win_config, CFG_SIZE(_di_dc_setup_win_config)); + exec_cfg((u32 *)DISPLAY_A_BASE, _di_dc_setup_win_config, ARRAY_SIZE(_di_dc_setup_win_config)); // Setup dsi init sequence packets. - exec_cfg((u32 *)DSI_BASE, _di_dsi_init_irq_pkt_config0, CFG_SIZE(_di_dsi_init_irq_pkt_config0)); + exec_cfg((u32 *)DSI_BASE, _di_dsi_init_irq_pkt_config0, ARRAY_SIZE(_di_dsi_init_irq_pkt_config0)); if (tegra_t210) DSI(_DSIREG(DSI_INIT_SEQ_DATA_15)) = 0; else DSI(_DSIREG(DSI_INIT_SEQ_DATA_15_B01)) = 0; - exec_cfg((u32 *)DSI_BASE, _di_dsi_init_irq_pkt_config1, CFG_SIZE(_di_dsi_init_irq_pkt_config1)); + exec_cfg((u32 *)DSI_BASE, _di_dsi_init_irq_pkt_config1, ARRAY_SIZE(_di_dsi_init_irq_pkt_config1)); // Reset pad trimmers for T210B01. if (!tegra_t210) - exec_cfg((u32 *)DSI_BASE, _di_dsi_init_pads_t210b01, CFG_SIZE(_di_dsi_init_pads_t210b01)); + exec_cfg((u32 *)DSI_BASE, _di_dsi_init_pads_t210b01, ARRAY_SIZE(_di_dsi_init_pads_t210b01)); // Setup init sequence packets and timings. - exec_cfg((u32 *)DSI_BASE, _di_dsi_init_timing_pkt_config2, CFG_SIZE(_di_dsi_init_timing_pkt_config2)); + exec_cfg((u32 *)DSI_BASE, _di_dsi_init_timing_pkt_config2, ARRAY_SIZE(_di_dsi_init_timing_pkt_config2)); DSI(_DSIREG(DSI_PHY_TIMING_0)) = tegra_t210 ? 0x6070601 : 0x6070603; // DSI_THSPREPR: 1 : 3. - exec_cfg((u32 *)DSI_BASE, _di_dsi_init_timing_pwrctrl_config, CFG_SIZE(_di_dsi_init_timing_pwrctrl_config)); + exec_cfg((u32 *)DSI_BASE, _di_dsi_init_timing_pwrctrl_config, ARRAY_SIZE(_di_dsi_init_timing_pwrctrl_config)); DSI(_DSIREG(DSI_PHY_TIMING_0)) = tegra_t210 ? 0x6070601 : 0x6070603; // DSI_THSPREPR: 1 : 3. - exec_cfg((u32 *)DSI_BASE, _di_dsi_init_timing_pkt_config3, CFG_SIZE(_di_dsi_init_timing_pkt_config3)); + exec_cfg((u32 *)DSI_BASE, _di_dsi_init_timing_pkt_config3, ARRAY_SIZE(_di_dsi_init_timing_pkt_config3)); usleep(10000); // Enable LCD Reset. @@ -537,7 +537,7 @@ void display_init() break; case PANEL_JDI_XXX062M: - exec_cfg((u32 *)DSI_BASE, _di_dsi_panel_init_config_jdi, CFG_SIZE(_di_dsi_panel_init_config_jdi)); + exec_cfg((u32 *)DSI_BASE, _di_dsi_panel_init_config_jdi, ARRAY_SIZE(_di_dsi_panel_init_config_jdi)); _display_dsi_send_cmd(MIPI_DSI_DCS_SHORT_WRITE, MIPI_DCS_EXIT_SLEEP_MODE, 180000); break; @@ -580,18 +580,18 @@ void display_init() // Finalize DSI init packet sequence configuration. DSI(_DSIREG(DSI_PAD_CONTROL_1)) = 0; DSI(_DSIREG(DSI_PHY_TIMING_0)) = tegra_t210 ? 0x6070601 : 0x6070603; - exec_cfg((u32 *)DSI_BASE, _di_dsi_init_seq_pkt_final_config, CFG_SIZE(_di_dsi_init_seq_pkt_final_config)); + exec_cfg((u32 *)DSI_BASE, _di_dsi_init_seq_pkt_final_config, ARRAY_SIZE(_di_dsi_init_seq_pkt_final_config)); // Set 1-by-1 pixel/clock and pixel clock to 234 / 3 = 78 MHz. For 60 Hz refresh rate. DISPLAY_A(_DIREG(DC_DISP_DISP_CLOCK_CONTROL)) = PIXEL_CLK_DIVIDER_PCD1 | SHIFT_CLK_DIVIDER(4); // 4: div3. // Set DSI mode. - exec_cfg((u32 *)DSI_BASE, _di_dsi_mode_config, CFG_SIZE(_di_dsi_mode_config)); + exec_cfg((u32 *)DSI_BASE, _di_dsi_mode_config, ARRAY_SIZE(_di_dsi_mode_config)); usleep(10000); // Calibrate display communication pads. u32 loops = tegra_t210 ? 1 : 2; // Calibrate pads 2 times on T210B01. - exec_cfg((u32 *)MIPI_CAL_BASE, _di_mipi_pad_cal_config, CFG_SIZE(_di_mipi_pad_cal_config)); + exec_cfg((u32 *)MIPI_CAL_BASE, _di_mipi_pad_cal_config, ARRAY_SIZE(_di_mipi_pad_cal_config)); for (u32 i = 0; i < loops; i++) { // Set MIPI bias pad config. @@ -601,22 +601,22 @@ void display_init() // Set pad trimmers and set MIPI DSI cal offsets. if (tegra_t210) { - exec_cfg((u32 *)DSI_BASE, _di_dsi_pad_cal_config_t210, CFG_SIZE(_di_dsi_pad_cal_config_t210)); - exec_cfg((u32 *)MIPI_CAL_BASE, _di_mipi_dsi_cal_offsets_config_t210, CFG_SIZE(_di_mipi_dsi_cal_offsets_config_t210)); + exec_cfg((u32 *)DSI_BASE, _di_dsi_pad_cal_config_t210, ARRAY_SIZE(_di_dsi_pad_cal_config_t210)); + exec_cfg((u32 *)MIPI_CAL_BASE, _di_mipi_dsi_cal_offsets_config_t210, ARRAY_SIZE(_di_mipi_dsi_cal_offsets_config_t210)); } else { - exec_cfg((u32 *)DSI_BASE, _di_dsi_pad_cal_config_t210b01, CFG_SIZE(_di_dsi_pad_cal_config_t210b01)); - exec_cfg((u32 *)MIPI_CAL_BASE, _di_mipi_dsi_cal_offsets_config_t210b01, CFG_SIZE(_di_mipi_dsi_cal_offsets_config_t210b01)); + exec_cfg((u32 *)DSI_BASE, _di_dsi_pad_cal_config_t210b01, ARRAY_SIZE(_di_dsi_pad_cal_config_t210b01)); + exec_cfg((u32 *)MIPI_CAL_BASE, _di_mipi_dsi_cal_offsets_config_t210b01, ARRAY_SIZE(_di_mipi_dsi_cal_offsets_config_t210b01)); } // Reset all MIPI cal offsets and start calibration. - exec_cfg((u32 *)MIPI_CAL_BASE, _di_mipi_start_dsi_cal_config, CFG_SIZE(_di_mipi_start_dsi_cal_config)); + exec_cfg((u32 *)MIPI_CAL_BASE, _di_mipi_start_dsi_cal_config, ARRAY_SIZE(_di_mipi_start_dsi_cal_config)); } usleep(10000); // Enable video display controller. - exec_cfg((u32 *)DISPLAY_A_BASE, _di_dc_video_enable_config, CFG_SIZE(_di_dc_video_enable_config)); + exec_cfg((u32 *)DISPLAY_A_BASE, _di_dc_video_enable_config, ARRAY_SIZE(_di_dc_video_enable_config)); } void display_backlight_pwm_init() @@ -722,7 +722,7 @@ static void _display_panel_and_hw_end(bool no_panel_deinit) DSI(_DSIREG(DSI_VIDEO_MODE_CONTROL)) = 0; // De-initialize video controller. - exec_cfg((u32 *)DISPLAY_A_BASE, _di_dc_video_disable_config, CFG_SIZE(_di_dc_video_disable_config)); + exec_cfg((u32 *)DISPLAY_A_BASE, _di_dc_video_disable_config, ARRAY_SIZE(_di_dc_video_disable_config)); // Set DISP1 clock source, parent clock and DSI/PCLK to low power mode. // T210: DIVM: 1, DIVN: 20, DIVP: 3. PLLD_OUT: 100.0 MHz, PLLD_OUT0 (DSI-PCLK): 50.0 MHz. (PCLK: 16.66 MHz) @@ -730,7 +730,7 @@ static void _display_panel_and_hw_end(bool no_panel_deinit) clock_enable_plld(3, 20, true, hw_get_chip_id() == GP_HIDREV_MAJOR_T210); // Set timings for lowpower clocks. - exec_cfg((u32 *)DSI_BASE, _di_dsi_timing_deinit_config, CFG_SIZE(_di_dsi_timing_deinit_config)); + exec_cfg((u32 *)DSI_BASE, _di_dsi_timing_deinit_config, ARRAY_SIZE(_di_dsi_timing_deinit_config)); if (_display_id != PANEL_SAM_AMS699VC01) usleep(10000); @@ -739,11 +739,11 @@ static void _display_panel_and_hw_end(bool no_panel_deinit) switch (_display_id) { case PANEL_JDI_XXX062M: - exec_cfg((u32 *)DSI_BASE, _di_dsi_panel_deinit_config_jdi, CFG_SIZE(_di_dsi_panel_deinit_config_jdi)); + exec_cfg((u32 *)DSI_BASE, _di_dsi_panel_deinit_config_jdi, ARRAY_SIZE(_di_dsi_panel_deinit_config_jdi)); break; case PANEL_AUO_A062TAN01: - exec_cfg((u32 *)DSI_BASE, _di_dsi_panel_deinit_config_auo, CFG_SIZE(_di_dsi_panel_deinit_config_auo)); + exec_cfg((u32 *)DSI_BASE, _di_dsi_panel_deinit_config_auo, ARRAY_SIZE(_di_dsi_panel_deinit_config_auo)); break; case PANEL_INL_2J055IA_27A: @@ -848,7 +848,7 @@ void display_set_decoded_panel_id(u32 id) void display_color_screen(u32 color) { - exec_cfg((u32 *)DISPLAY_A_BASE, _di_win_one_color, CFG_SIZE(_di_win_one_color)); + exec_cfg((u32 *)DISPLAY_A_BASE, _di_win_one_color, ARRAY_SIZE(_di_win_one_color)); // Configure display to show single color. DISPLAY_A(_DIREG(DC_WIN_AD_WIN_OPTIONS)) = 0; @@ -870,7 +870,7 @@ u32 *display_init_framebuffer_pitch() memset((u32 *)IPL_FB_ADDRESS, 0, IPL_FB_SZ); // This configures the framebuffer @ IPL_FB_ADDRESS with a resolution of 720x1280 (line stride 720). - exec_cfg((u32 *)DISPLAY_A_BASE, _di_win_framebuffer_pitch, CFG_SIZE(_di_win_framebuffer_pitch)); + exec_cfg((u32 *)DISPLAY_A_BASE, _di_win_framebuffer_pitch, ARRAY_SIZE(_di_win_framebuffer_pitch)); //usleep(35000); // Wait 2 frames. No need on Aula. return (u32 *)DISPLAY_A(_DIREG(DC_WINBUF_START_ADDR)); @@ -881,7 +881,7 @@ u32 *display_init_framebuffer_pitch_vic() // This configures the framebuffer @ NYX_FB_ADDRESS with a resolution of 720x1280 (line stride 720). if (_display_id != PANEL_SAM_AMS699VC01) usleep(8000); // Wait half frame for PWM to apply. - exec_cfg((u32 *)DISPLAY_A_BASE, _di_win_framebuffer_pitch_vic, CFG_SIZE(_di_win_framebuffer_pitch_vic)); + exec_cfg((u32 *)DISPLAY_A_BASE, _di_win_framebuffer_pitch_vic, ARRAY_SIZE(_di_win_framebuffer_pitch_vic)); if (_display_id != PANEL_SAM_AMS699VC01) usleep(35000); // Wait 2 frames. @@ -891,7 +891,7 @@ u32 *display_init_framebuffer_pitch_vic() u32 *display_init_framebuffer_pitch_inv() { // This configures the framebuffer @ NYX_FB_ADDRESS with a resolution of 720x1280 (line stride 720). - exec_cfg((u32 *)DISPLAY_A_BASE, _di_win_framebuffer_pitch_inv, CFG_SIZE(_di_win_framebuffer_pitch_inv)); + exec_cfg((u32 *)DISPLAY_A_BASE, _di_win_framebuffer_pitch_inv, ARRAY_SIZE(_di_win_framebuffer_pitch_inv)); usleep(35000); // Wait 2 frames. No need on Aula. return (u32 *)DISPLAY_A(_DIREG(DC_WINBUF_START_ADDR)); @@ -900,7 +900,7 @@ u32 *display_init_framebuffer_pitch_inv() u32 *display_init_framebuffer_block() { // This configures the framebuffer @ NYX_FB_ADDRESS with a resolution of 720x1280. - exec_cfg((u32 *)DISPLAY_A_BASE, _di_win_framebuffer_block, CFG_SIZE(_di_win_framebuffer_block)); + exec_cfg((u32 *)DISPLAY_A_BASE, _di_win_framebuffer_block, ARRAY_SIZE(_di_win_framebuffer_block)); usleep(35000); // Wait 2 frames. No need on Aula. return (u32 *)DISPLAY_A(_DIREG(DC_WINBUF_START_ADDR)); @@ -909,7 +909,7 @@ u32 *display_init_framebuffer_block() u32 *display_init_framebuffer_log() { // This configures the framebuffer @ LOG_FB_ADDRESS with a resolution of 1280x720 (line stride 720). - exec_cfg((u32 *)DISPLAY_A_BASE, _di_win_framebuffer_log, CFG_SIZE(_di_win_framebuffer_log)); + exec_cfg((u32 *)DISPLAY_A_BASE, _di_win_framebuffer_log, ARRAY_SIZE(_di_win_framebuffer_log)); return (u32 *)DISPLAY_A(_DIREG(DC_WINBUF_START_ADDR)); } @@ -970,7 +970,7 @@ void display_deactivate_console() } // Disable window D. - DISPLAY_A(_DIREG(DC_WIN_POSITION)) = 0; + DISPLAY_A(_DIREG(DC_WIN_POSITION)) = 0; DISPLAY_A(_DIREG(DC_WIN_WIN_OPTIONS)) = 0; // Arm and activate changes. diff --git a/bdk/utils/util.h b/bdk/utils/util.h index 2ba268a..fffa516 100644 --- a/bdk/utils/util.h +++ b/bdk/utils/util.h @@ -21,8 +21,6 @@ #include #include -#define CFG_SIZE(array) (sizeof(array) / sizeof(cfg_op_t)) - #define NYX_NEW_INFO 0x3058594E typedef enum From 26c6c6372db0e59cb7906ad774b0dcbe90f354ae Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 2 Jun 2024 08:05:50 +0300 Subject: [PATCH 186/308] bdk: display: rename window setup arrays Add window number info and remove the fb naming --- bdk/display/di.c | 10 +++++----- bdk/display/di.inl | 12 ++++++------ 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/bdk/display/di.c b/bdk/display/di.c index 13157e7..89f022c 100644 --- a/bdk/display/di.c +++ b/bdk/display/di.c @@ -870,7 +870,7 @@ u32 *display_init_framebuffer_pitch() memset((u32 *)IPL_FB_ADDRESS, 0, IPL_FB_SZ); // This configures the framebuffer @ IPL_FB_ADDRESS with a resolution of 720x1280 (line stride 720). - exec_cfg((u32 *)DISPLAY_A_BASE, _di_win_framebuffer_pitch, ARRAY_SIZE(_di_win_framebuffer_pitch)); + exec_cfg((u32 *)DISPLAY_A_BASE, _di_winA_pitch, ARRAY_SIZE(_di_winA_pitch)); //usleep(35000); // Wait 2 frames. No need on Aula. return (u32 *)DISPLAY_A(_DIREG(DC_WINBUF_START_ADDR)); @@ -881,7 +881,7 @@ u32 *display_init_framebuffer_pitch_vic() // This configures the framebuffer @ NYX_FB_ADDRESS with a resolution of 720x1280 (line stride 720). if (_display_id != PANEL_SAM_AMS699VC01) usleep(8000); // Wait half frame for PWM to apply. - exec_cfg((u32 *)DISPLAY_A_BASE, _di_win_framebuffer_pitch_vic, ARRAY_SIZE(_di_win_framebuffer_pitch_vic)); + exec_cfg((u32 *)DISPLAY_A_BASE, _di_winA_pitch_vic, ARRAY_SIZE(_di_winA_pitch_vic)); if (_display_id != PANEL_SAM_AMS699VC01) usleep(35000); // Wait 2 frames. @@ -891,7 +891,7 @@ u32 *display_init_framebuffer_pitch_vic() u32 *display_init_framebuffer_pitch_inv() { // This configures the framebuffer @ NYX_FB_ADDRESS with a resolution of 720x1280 (line stride 720). - exec_cfg((u32 *)DISPLAY_A_BASE, _di_win_framebuffer_pitch_inv, ARRAY_SIZE(_di_win_framebuffer_pitch_inv)); + exec_cfg((u32 *)DISPLAY_A_BASE, _di_winA_pitch_inv, ARRAY_SIZE(_di_winA_pitch_inv)); usleep(35000); // Wait 2 frames. No need on Aula. return (u32 *)DISPLAY_A(_DIREG(DC_WINBUF_START_ADDR)); @@ -900,7 +900,7 @@ u32 *display_init_framebuffer_pitch_inv() u32 *display_init_framebuffer_block() { // This configures the framebuffer @ NYX_FB_ADDRESS with a resolution of 720x1280. - exec_cfg((u32 *)DISPLAY_A_BASE, _di_win_framebuffer_block, ARRAY_SIZE(_di_win_framebuffer_block)); + exec_cfg((u32 *)DISPLAY_A_BASE, _di_winA_block, ARRAY_SIZE(_di_winA_block)); usleep(35000); // Wait 2 frames. No need on Aula. return (u32 *)DISPLAY_A(_DIREG(DC_WINBUF_START_ADDR)); @@ -909,7 +909,7 @@ u32 *display_init_framebuffer_block() u32 *display_init_framebuffer_log() { // This configures the framebuffer @ LOG_FB_ADDRESS with a resolution of 1280x720 (line stride 720). - exec_cfg((u32 *)DISPLAY_A_BASE, _di_win_framebuffer_log, ARRAY_SIZE(_di_win_framebuffer_log)); + exec_cfg((u32 *)DISPLAY_A_BASE, _di_winD_log, ARRAY_SIZE(_di_winD_log)); return (u32 *)DISPLAY_A(_DIREG(DC_WINBUF_START_ADDR)); } diff --git a/bdk/display/di.inl b/bdk/display/di.inl index 56202a7..99d558b 100644 --- a/bdk/display/di.inl +++ b/bdk/display/di.inl @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert -* Copyright (c) 2018-2022 CTCaer +* Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -479,7 +479,7 @@ static const cfg_op_t _di_win_one_color[] = { }; // Display A Window A linear pitch config. -static const cfg_op_t _di_win_framebuffer_pitch[] = { +static const cfg_op_t _di_winA_pitch[] = { {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT | WINDOW_B_SELECT}, {DC_WIN_WIN_OPTIONS, 0}, {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, @@ -505,7 +505,7 @@ static const cfg_op_t _di_win_framebuffer_pitch[] = { }; // Display A Window A linear pitch + Win D support config. -static const cfg_op_t _di_win_framebuffer_pitch_vic[] = { +static const cfg_op_t _di_winA_pitch_vic[] = { {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_D_SELECT | WINDOW_C_SELECT | WINDOW_B_SELECT}, {DC_WIN_WIN_OPTIONS, 0}, {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, @@ -531,7 +531,7 @@ static const cfg_op_t _di_win_framebuffer_pitch_vic[] = { }; // Display A Window A linear pitch inverse + Win D support config. -static const cfg_op_t _di_win_framebuffer_pitch_inv[] = { +static const cfg_op_t _di_winA_pitch_inv[] = { {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_D_SELECT | WINDOW_C_SELECT | WINDOW_B_SELECT}, {DC_WIN_WIN_OPTIONS, 0}, {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, @@ -557,7 +557,7 @@ static const cfg_op_t _di_win_framebuffer_pitch_inv[] = { }; // Display A Window A block linear config. -static const cfg_op_t _di_win_framebuffer_block[] = { +static const cfg_op_t _di_winA_block[] = { {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_D_SELECT | WINDOW_C_SELECT | WINDOW_B_SELECT}, {DC_WIN_WIN_OPTIONS, 0}, {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, @@ -583,7 +583,7 @@ static const cfg_op_t _di_win_framebuffer_block[] = { }; // Display A Window D config. -static const cfg_op_t _di_win_framebuffer_log[] = { +static const cfg_op_t _di_winD_log[] = { {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_D_SELECT}, {DC_WIN_WIN_OPTIONS, 0}, {DC_WIN_COLOR_DEPTH, WIN_COLOR_DEPTH_B8G8R8A8}, From b3be7e7a4191c07af783903c1bbb94ce657ed8b0 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 2 Jun 2024 08:11:22 +0300 Subject: [PATCH 187/308] bdk: display: use the same HS exit threshold No need to use minimum on T210. Use the same byte clocks as T210B01 to simplify init. --- bdk/display/di.c | 22 +++++++--------------- bdk/display/di.inl | 22 +++++++++++----------- 2 files changed, 18 insertions(+), 26 deletions(-) diff --git a/bdk/display/di.c b/bdk/display/di.c index 89f022c..d7310d7 100644 --- a/bdk/display/di.c +++ b/bdk/display/di.c @@ -451,23 +451,16 @@ void display_init() exec_cfg((u32 *)DISPLAY_A_BASE, _di_dc_setup_win_config, ARRAY_SIZE(_di_dc_setup_win_config)); // Setup dsi init sequence packets. - exec_cfg((u32 *)DSI_BASE, _di_dsi_init_irq_pkt_config0, ARRAY_SIZE(_di_dsi_init_irq_pkt_config0)); - if (tegra_t210) - DSI(_DSIREG(DSI_INIT_SEQ_DATA_15)) = 0; - else - DSI(_DSIREG(DSI_INIT_SEQ_DATA_15_B01)) = 0; - exec_cfg((u32 *)DSI_BASE, _di_dsi_init_irq_pkt_config1, ARRAY_SIZE(_di_dsi_init_irq_pkt_config1)); + exec_cfg((u32 *)DSI_BASE, _di_dsi_init_config0, ARRAY_SIZE(_di_dsi_init_config0)); + DSI(_DSIREG(tegra_t210 ? DSI_INIT_SEQ_DATA_15 : DSI_INIT_SEQ_DATA_15_B01)) = 0; + exec_cfg((u32 *)DSI_BASE, _di_dsi_init_config1, ARRAY_SIZE(_di_dsi_init_config1)); // Reset pad trimmers for T210B01. if (!tegra_t210) exec_cfg((u32 *)DSI_BASE, _di_dsi_init_pads_t210b01, ARRAY_SIZE(_di_dsi_init_pads_t210b01)); - // Setup init sequence packets and timings. - exec_cfg((u32 *)DSI_BASE, _di_dsi_init_timing_pkt_config2, ARRAY_SIZE(_di_dsi_init_timing_pkt_config2)); - DSI(_DSIREG(DSI_PHY_TIMING_0)) = tegra_t210 ? 0x6070601 : 0x6070603; // DSI_THSPREPR: 1 : 3. - exec_cfg((u32 *)DSI_BASE, _di_dsi_init_timing_pwrctrl_config, ARRAY_SIZE(_di_dsi_init_timing_pwrctrl_config)); - DSI(_DSIREG(DSI_PHY_TIMING_0)) = tegra_t210 ? 0x6070601 : 0x6070603; // DSI_THSPREPR: 1 : 3. - exec_cfg((u32 *)DSI_BASE, _di_dsi_init_timing_pkt_config3, ARRAY_SIZE(_di_dsi_init_timing_pkt_config3)); + // Setup init sequence packets, timings and power on DSI. + exec_cfg((u32 *)DSI_BASE, _di_dsi_init_config2, ARRAY_SIZE(_di_dsi_init_config2)); usleep(10000); // Enable LCD Reset. @@ -578,8 +571,6 @@ void display_init() clock_enable_plld(1, 24, false, tegra_t210); // Finalize DSI init packet sequence configuration. - DSI(_DSIREG(DSI_PAD_CONTROL_1)) = 0; - DSI(_DSIREG(DSI_PHY_TIMING_0)) = tegra_t210 ? 0x6070601 : 0x6070603; exec_cfg((u32 *)DSI_BASE, _di_dsi_init_seq_pkt_final_config, ARRAY_SIZE(_di_dsi_init_seq_pkt_final_config)); // Set 1-by-1 pixel/clock and pixel clock to 234 / 3 = 78 MHz. For 60 Hz refresh rate. @@ -590,7 +581,7 @@ void display_init() usleep(10000); // Calibrate display communication pads. - u32 loops = tegra_t210 ? 1 : 2; // Calibrate pads 2 times on T210B01. + const u32 loops = tegra_t210 ? 1 : 2; // Calibrate pads 2 times on T210B01. exec_cfg((u32 *)MIPI_CAL_BASE, _di_mipi_pad_cal_config, ARRAY_SIZE(_di_mipi_pad_cal_config)); for (u32 i = 0; i < loops; i++) { @@ -624,6 +615,7 @@ void display_backlight_pwm_init() if (_display_id == PANEL_SAM_AMS699VC01) return; + // Enable PWM clock. clock_enable_pwm(); // Enable PWM and set it to 25KHz PFM. 29.5KHz is stock. diff --git a/bdk/display/di.inl b/bdk/display/di.inl index 99d558b..bcb0edb 100644 --- a/bdk/display/di.inl +++ b/bdk/display/di.inl @@ -69,7 +69,7 @@ static const cfg_op_t _di_dc_setup_win_config[] = { }; // DSI Init config. -static const cfg_op_t _di_dsi_init_irq_pkt_config0[] = { +static const cfg_op_t _di_dsi_init_config0[] = { {DSI_WR_DATA, 0}, {DSI_INT_ENABLE, 0}, {DSI_INT_STATUS, 0}, @@ -79,7 +79,7 @@ static const cfg_op_t _di_dsi_init_irq_pkt_config0[] = { {DSI_INIT_SEQ_DATA_2, 0}, {DSI_INIT_SEQ_DATA_3, 0} }; -static const cfg_op_t _di_dsi_init_irq_pkt_config1[] = { +static const cfg_op_t _di_dsi_init_config1[] = { {DSI_DCS_CMDS, 0}, {DSI_PKT_SEQ_0_LO, 0}, {DSI_PKT_SEQ_1_LO, 0}, @@ -104,7 +104,7 @@ static const cfg_op_t _di_dsi_init_pads_t210b01[] = { {DSI_PAD_CONTROL_6_B01, 0}, {DSI_PAD_CONTROL_7_B01, 0} }; -static const cfg_op_t _di_dsi_init_timing_pkt_config2[] = { +static const cfg_op_t _di_dsi_init_config2[] = { {DSI_PAD_CONTROL_CD, 0}, {DSI_SOL_DELAY, 24}, {DSI_MAX_THRESHOLD, 480}, @@ -114,23 +114,21 @@ static const cfg_op_t _di_dsi_init_timing_pkt_config2[] = { {DSI_PKT_LEN_2_3, 0}, {DSI_PKT_LEN_4_5, 0}, {DSI_PKT_LEN_6_7, 0}, - {DSI_PAD_CONTROL_1, 0} -}; -static const cfg_op_t _di_dsi_init_timing_pwrctrl_config[] = { + {DSI_PAD_CONTROL_1, 0}, + {DSI_PHY_TIMING_0, 0x6070603}, {DSI_PHY_TIMING_1, 0x40A0E05}, {DSI_PHY_TIMING_2, 0x30109}, {DSI_BTA_TIMING, 0x190A14}, {DSI_TIMEOUT_0, DSI_TIMEOUT_LRX(0x2000) | DSI_TIMEOUT_HTX(0xFFFF)}, {DSI_TIMEOUT_1, DSI_TIMEOUT_PR(0x765) | DSI_TIMEOUT_TA(0x2000)}, {DSI_TO_TALLY, 0}, - {DSI_PAD_CONTROL_0, DSI_PAD_CONTROL_VS1_PULLDN(0) | DSI_PAD_CONTROL_VS1_PDIO(0)}, // Enable + {DSI_PAD_CONTROL_0, DSI_PAD_CONTROL_VS1_PULLDN(0) | DSI_PAD_CONTROL_VS1_PDIO(0)}, // Power up. {DSI_POWER_CONTROL, DSI_POWER_CONTROL_ENABLE}, {DSI_POWER_CONTROL, DSI_POWER_CONTROL_ENABLE}, {DSI_POWER_CONTROL, 0}, {DSI_POWER_CONTROL, 0}, - {DSI_PAD_CONTROL_1, 0} -}; -static const cfg_op_t _di_dsi_init_timing_pkt_config3[] = { + {DSI_PAD_CONTROL_1, 0}, + {DSI_PHY_TIMING_0, 0x6070603}, {DSI_PHY_TIMING_1, 0x40A0E05}, {DSI_PHY_TIMING_2, 0x30118}, {DSI_BTA_TIMING, 0x190A14}, @@ -196,6 +194,8 @@ static const cfg_op_t _di_dsi_panel_init_config_jdi[] = { // DSI packet config. static const cfg_op_t _di_dsi_init_seq_pkt_final_config[] = { + {DSI_PAD_CONTROL_1, 0}, + {DSI_PHY_TIMING_0, 0x6070603}, {DSI_PHY_TIMING_1, 0x40A0E05}, {DSI_PHY_TIMING_2, 0x30172}, {DSI_BTA_TIMING, 0x190A14}, @@ -380,7 +380,7 @@ static const cfg_op_t _di_dc_video_disable_config[] = { static const cfg_op_t _di_dsi_timing_deinit_config[] = { {DSI_POWER_CONTROL, 0}, {DSI_PAD_CONTROL_1, 0}, - {DSI_PHY_TIMING_0, 0x6070601}, //mariko changes + {DSI_PHY_TIMING_0, 0x6070603}, {DSI_PHY_TIMING_1, 0x40A0E05}, {DSI_PHY_TIMING_2, 0x30118}, {DSI_BTA_TIMING, 0x190A14}, From 72f980d0f4700aa2773c5913e4dcf06e020eb599 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 2 Jun 2024 08:22:20 +0300 Subject: [PATCH 188/308] bdk: display: fully streamline dc/win setup As explained before, Nvidia just grabbed the whole dynamic init and made arrays of it, without actually optimizing it. The second part of the streamline aims to fully de-duplicate that. - Completely remove all already set registers for DC/DISP/WIN. - Do not touch other windows when a specific window is setup. - Init Window D also together with A/B/C since code is made for DISPA. - Add missing increase for syncpt 1. --- bdk/display/di.c | 11 ++--- bdk/display/di.h | 82 ++++++++++++++++++----------------- bdk/display/di.inl | 106 ++++++++++++--------------------------------- 3 files changed, 77 insertions(+), 122 deletions(-) diff --git a/bdk/display/di.c b/bdk/display/di.c index d7310d7..2db4898 100644 --- a/bdk/display/di.c +++ b/bdk/display/di.c @@ -710,7 +710,7 @@ static void _display_panel_and_hw_end(bool no_panel_deinit) // Not here. // Propagate changes to all register buffers and disable host cmd packets during video. - DISPLAY_A(_DIREG(DC_CMD_STATE_ACCESS)) = READ_MUX | WRITE_MUX; + DISPLAY_A(_DIREG(DC_CMD_STATE_ACCESS)) = READ_MUX_ACTIVE | WRITE_MUX_ACTIVE; DSI(_DSIREG(DSI_VIDEO_MODE_CONTROL)) = 0; // De-initialize video controller. @@ -840,14 +840,15 @@ void display_set_decoded_panel_id(u32 id) void display_color_screen(u32 color) { + // Disable all windows. exec_cfg((u32 *)DISPLAY_A_BASE, _di_win_one_color, ARRAY_SIZE(_di_win_one_color)); // Configure display to show single color. - DISPLAY_A(_DIREG(DC_WIN_AD_WIN_OPTIONS)) = 0; - DISPLAY_A(_DIREG(DC_WIN_BD_WIN_OPTIONS)) = 0; - DISPLAY_A(_DIREG(DC_WIN_CD_WIN_OPTIONS)) = 0; DISPLAY_A(_DIREG(DC_DISP_BLEND_BACKGROUND_COLOR)) = color; - DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = (DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) & 0xFFFFFFFE) | GENERAL_ACT_REQ; + + // Arm and activate changes. + DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_UPDATE | WIN_A_UPDATE | WIN_B_UPDATE | WIN_C_UPDATE | WIN_D_UPDATE; + DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_ACT_REQ | WIN_A_ACT_REQ | WIN_B_ACT_REQ | WIN_C_ACT_REQ | WIN_D_ACT_REQ; usleep(35000); // Wait 2 frames. No need on Aula. if (_display_id != PANEL_SAM_AMS699VC01) diff --git a/bdk/display/di.h b/bdk/display/di.h index 03f0c72..8bb700a 100644 --- a/bdk/display/di.h +++ b/bdk/display/di.h @@ -43,8 +43,8 @@ // DC_CMD non-shadowed command/sync registers. #define DC_CMD_GENERAL_INCR_SYNCPT 0x00 -#define SYNCPT_GENERAL_INDX(x) (((x) & 0xff) << 0) -#define SYNCPT_GENERAL_COND(x) (((x) & 0xff) << 8) +#define SYNCPT_GENERAL_INDX(x) (((x) & 0xFF) << 0) +#define SYNCPT_GENERAL_COND(x) (((x) & 0xFF) << 8) #define COND_REG_WR_SAFE 3 #define DC_CMD_GENERAL_INCR_SYNCPT_CNTRL 0x01 @@ -52,7 +52,7 @@ #define SYNCPT_CNTRL_NO_STALL BIT(8) #define DC_CMD_CONT_SYNCPT_VSYNC 0x28 -#define SYNCPT_VSYNC_INDX(x) (((x) & 0xff) << 0) +#define SYNCPT_VSYNC_INDX(x) (((x) & 0xFF) << 0) #define SYNCPT_VSYNC_ENABLE BIT(8) #define DC_CMD_DISPLAY_COMMAND_OPTION0 0x031 @@ -80,8 +80,10 @@ #define DC_CMD_INT_POLARITY 0x3B #define DC_CMD_STATE_ACCESS 0x40 -#define READ_MUX BIT(0) -#define WRITE_MUX BIT(2) +#define READ_MUX_ASSEMBLY 0x0 +#define WRITE_MUX_ASSEMBLY 0x0 +#define READ_MUX_ACTIVE BIT(0) +#define WRITE_MUX_ACTIVE BIT(2) #define DC_CMD_STATE_CONTROL 0x41 #define GENERAL_ACT_REQ BIT(0) @@ -179,30 +181,30 @@ #define DC_DISP_DISP_MEM_HIGH_PRIORITY_TIMER 0x404 #define DC_DISP_DISP_TIMING_OPTIONS 0x405 -#define VSYNC_H_POSITION(x) (((x) & 0x1fff) << 0) +#define VSYNC_H_POSITION(x) (((x) & 0x1FFF) << 0) #define DC_DISP_REF_TO_SYNC 0x406 -#define H_REF_TO_SYNC(x) (((x) & 0x1fff) << 0) // Min 0 pixel clock. -#define V_REF_TO_SYNC(x) (((x) & 0x1fff) << 16) // Min 1 line clock. +#define H_REF_TO_SYNC(x) (((x) & 0x1FFF) << 0) // Min 0 pixel clock. +#define V_REF_TO_SYNC(x) (((x) & 0x1FFF) << 16) // Min 1 line clock. #define DC_DISP_SYNC_WIDTH 0x407 -#define H_SYNC_WIDTH(x) (((x) & 0x1fff) << 0) // Min 1 pixel clock. -#define V_SYNC_WIDTH(x) (((x) & 0x1fff) << 16) // Min 1 line clock. +#define H_SYNC_WIDTH(x) (((x) & 0x1FFF) << 0) // Min 1 pixel clock. +#define V_SYNC_WIDTH(x) (((x) & 0x1FFF) << 16) // Min 1 line clock. #define DC_DISP_BACK_PORCH 0x408 -#define H_BACK_PORCH(x) (((x) & 0x1fff) << 0) -#define V_BACK_PORCH(x) (((x) & 0x1fff) << 16) +#define H_BACK_PORCH(x) (((x) & 0x1FFF) << 0) +#define V_BACK_PORCH(x) (((x) & 0x1FFF) << 16) #define DC_DISP_ACTIVE 0x409 -#define H_DISP_ACTIVE(x) (((x) & 0x1fff) << 0) // Min 16 pixel clock. -#define V_DISP_ACTIVE(x) (((x) & 0x1fff) << 16) // Min 16 line clock. +#define H_DISP_ACTIVE(x) (((x) & 0x1FFF) << 0) // Min 16 pixel clock. +#define V_DISP_ACTIVE(x) (((x) & 0x1FFF) << 16) // Min 16 line clock. #define DC_DISP_FRONT_PORCH 0x40A -#define H_FRONT_PORCH(x) (((x) & 0x1fff) << 0) // Min -=PS_=-H_REF_TO_SYNC + 1 -#define V_FRONT_PORCH(x) (((x) & 0x1fff) << 16) // Min -=PS_=-V_REF_TO_SYNC + 1 +#define H_FRONT_PORCH(x) (((x) & 0x1FFF) << 0) // Min -=PS_=-H_REF_TO_SYNC + 1 +#define V_FRONT_PORCH(x) (((x) & 0x1FFF) << 16) // Min -=PS_=-V_REF_TO_SYNC + 1 #define DC_DISP_DISP_CLOCK_CONTROL 0x42E -#define SHIFT_CLK_DIVIDER(x) ((x) & 0xff) +#define SHIFT_CLK_DIVIDER(x) ((x) & 0xFF) #define PIXEL_CLK_DIVIDER_PCD1 (0 << 8) #define PIXEL_CLK_DIVIDER_PCD1H (1 << 8) #define PIXEL_CLK_DIVIDER_PCD2 (2 << 8) @@ -271,6 +273,7 @@ #define CURSOR_COLOR(r,g,b) (((r) & 0xFF) | (((g) & 0xFF) << 8) | (((b) & 0xFF) << 16)) #define DC_DISP_CURSOR_START_ADDR 0x43E +#define DC_DISP_CURSOR_START_ADDR_NS 0x43F #define CURSOR_CLIPPING(w) ((w) << 28) #define CURSOR_CLIP_WIN_A 1 #define CURSOR_CLIP_WIN_B 2 @@ -282,6 +285,7 @@ #define DC_DISP_CURSOR_POSITION 0x440 #define DC_DISP_BLEND_BACKGROUND_COLOR 0x4E4 #define DC_DISP_CURSOR_START_ADDR_HI 0x4EC +#define DC_DISP_CURSOR_START_ADDR_HI_NS 0x4ED #define DC_DISP_BLEND_CURSOR_CONTROL 0x4F1 #define CURSOR_BLEND_2BIT (0 << 24) #define CURSOR_BLEND_R8G8B8A8 (1 << 24) @@ -378,27 +382,27 @@ #define WIN_COLOR_DEPTH_YUV444SP 0x3C #define DC_WIN_POSITION 0x704 -#define H_POSITION(x) (((x) & 0xffff) << 0) // Support negative. -#define V_POSITION(x) (((x) & 0xffff) << 16) // Support negative. +#define H_POSITION(x) (((x) & 0xFFFF) << 0) // Support negative. +#define V_POSITION(x) (((x) & 0xFFFF) << 16) // Support negative. #define DC_WIN_SIZE 0x705 -#define H_SIZE(x) (((x) & 0x1fff) << 0) -#define V_SIZE(x) (((x) & 0x1fff) << 16) +#define H_SIZE(x) (((x) & 0x1FFF) << 0) +#define V_SIZE(x) (((x) & 0x1FFF) << 16) #define DC_WIN_PRESCALED_SIZE 0x706 -#define H_PRESCALED_SIZE(x) (((x) & 0x7fff) << 0) -#define V_PRESCALED_SIZE(x) (((x) & 0x1fff) << 16) +#define H_PRESCALED_SIZE(x) (((x) & 0x7FFF) << 0) +#define V_PRESCALED_SIZE(x) (((x) & 0x1FFF) << 16) #define DC_WIN_H_INITIAL_DDA 0x707 #define DC_WIN_V_INITIAL_DDA 0x708 #define DC_WIN_DDA_INC 0x709 -#define H_DDA_INC(x) (((x) & 0xffff) << 0) -#define V_DDA_INC(x) (((x) & 0xffff) << 16) +#define H_DDA_INC(x) (((x) & 0xFFFF) << 0) +#define V_DDA_INC(x) (((x) & 0xFFFF) << 16) #define DC_WIN_LINE_STRIDE 0x70A #define LINE_STRIDE(x) (x) -#define UV_LINE_STRIDE(x) (((x) & 0xffff) << 16) +#define UV_LINE_STRIDE(x) (((x) & 0xFFFF) << 16) #define DC_WIN_DV_CONTROL 0x70E #define DV_CTRL_R(r) (((r) & 7) << 16) @@ -406,9 +410,9 @@ #define DV_CTRL_B(b) (((b) & 7) << 0) #define DC_WINBUF_BLEND_LAYER_CONTROL 0x716 -#define WIN_BLEND_DEPTH(x) (((x) & 0xff) << 0) -#define WIN_K1(x) (((x) & 0xff) << 8) -#define WIN_K2(x) (((x) & 0xff) << 16) +#define WIN_BLEND_DEPTH(x) (((x) & 0xFF) << 0) +#define WIN_K1(x) (((x) & 0xFF) << 8) +#define WIN_K2(x) (((x) & 0xFF) << 16) #define WIN_BLEND_ENABLE (0 << 24) #define WIN_BLEND_BYPASS (1 << 24) @@ -439,8 +443,8 @@ #define WIN_BLEND_FACT_DST_ALPHA_MATCH_SEL_K2 (3 << 12) #define DC_WINBUF_BLEND_ALPHA_1BIT 0x719 -#define WIN_ALPHA_1BIT_WEIGHT0(x) (((x) & 0xff) << 0) -#define WIN_ALPHA_1BIT_WEIGHT1(x) (((x) & 0xff) << 8) +#define WIN_ALPHA_1BIT_WEIGHT0(x) (((x) & 0xFF) << 0) +#define WIN_ALPHA_1BIT_WEIGHT1(x) (((x) & 0xFF) << 8) /*! The following registers are A/B/C shadows of the 0xBC0/0xDC0/0xFC0 registers (see DISPLAY_WINDOW_HEADER). */ #define DC_WINBUF_START_ADDR 0x800 @@ -532,8 +536,8 @@ #define DSI_PKT_LEN_2_3 0x35 #define DSI_PKT_LEN_4_5 0x36 #define DSI_PKT_LEN_6_7 0x37 -#define PKT0_LEN(x) (((x) & 0xffff) << 0) -#define PKT1_LEN(x) (((x) & 0xffff) << 16) +#define PKT0_LEN(x) (((x) & 0xFFFF) << 0) +#define PKT1_LEN(x) (((x) & 0xFFFF) << 16) #define DSI_PHY_TIMING_0 0x3C #define DSI_PHY_TIMING_1 0x3D @@ -541,20 +545,20 @@ #define DSI_BTA_TIMING 0x3F #define DSI_TIMEOUT_0 0x44 -#define DSI_TIMEOUT_HTX(x) (((x) & 0xffff) << 0) -#define DSI_TIMEOUT_LRX(x) (((x) & 0xffff) << 16) +#define DSI_TIMEOUT_HTX(x) (((x) & 0xFFFF) << 0) +#define DSI_TIMEOUT_LRX(x) (((x) & 0xFFFF) << 16) #define DSI_TIMEOUT_1 0x45 -#define DSI_TIMEOUT_TA(x) (((x) & 0xffff) << 0) -#define DSI_TIMEOUT_PR(x) (((x) & 0xffff) << 16) +#define DSI_TIMEOUT_TA(x) (((x) & 0xFFFF) << 0) +#define DSI_TIMEOUT_PR(x) (((x) & 0xFFFF) << 16) #define DSI_TO_TALLY 0x46 #define DSI_PAD_CONTROL_0 0x4B #define DSI_PAD_CONTROL_VS1_PDIO_CLK BIT(8) -#define DSI_PAD_CONTROL_VS1_PDIO(x) (((x) & 0xf) << 0) +#define DSI_PAD_CONTROL_VS1_PDIO(x) (((x) & 0xF) << 0) #define DSI_PAD_CONTROL_VS1_PULLDN_CLK BIT(24) -#define DSI_PAD_CONTROL_VS1_PULLDN(x) (((x) & 0xf) << 16) +#define DSI_PAD_CONTROL_VS1_PULLDN(x) (((x) & 0xF) << 16) #define DSI_PAD_CONTROL_CD 0x4C #define DSI_VIDEO_MODE_CONTROL 0x4E diff --git a/bdk/display/di.inl b/bdk/display/di.inl index bcb0edb..0a0cff5 100644 --- a/bdk/display/di.inl +++ b/bdk/display/di.inl @@ -17,25 +17,23 @@ // Display A config. static const cfg_op_t _di_dc_setup_win_config[] = { - {DC_CMD_STATE_ACCESS, 0}, + {DC_CMD_STATE_ACCESS, READ_MUX_ASSEMBLY | WRITE_MUX_ASSEMBLY}, {DC_CMD_STATE_CONTROL, GENERAL_UPDATE}, {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ}, {DC_CMD_REG_ACT_CONTROL, WIN_A_ACT_HCNTR_SEL | WIN_B_ACT_HCNTR_SEL | WIN_C_ACT_HCNTR_SEL}, {DC_CMD_STATE_CONTROL, GENERAL_UPDATE}, {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ}, - {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT | WINDOW_B_SELECT | WINDOW_C_SELECT}, {DC_DISP_DC_MCCIF_FIFOCTRL, 0}, {DC_DISP_DISP_MEM_HIGH_PRIORITY, 0}, {DC_DISP_DISP_MEM_HIGH_PRIORITY_TIMER, 0}, {DC_CMD_DISPLAY_POWER_CONTROL, PW0_ENABLE | PW1_ENABLE | PW2_ENABLE | PW3_ENABLE | PW4_ENABLE | PM0_ENABLE | PM1_ENABLE}, {DC_CMD_GENERAL_INCR_SYNCPT_CNTRL, SYNCPT_CNTRL_NO_STALL}, {DC_CMD_CONT_SYNCPT_VSYNC, SYNCPT_VSYNC_ENABLE | SYNCPT_VSYNC_INDX(9)}, - {DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE | WIN_B_UPDATE | WIN_C_UPDATE}, - {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ | WIN_B_ACT_REQ | WIN_C_ACT_REQ}, - {DC_CMD_STATE_ACCESS, 0}, + {DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE | WIN_B_UPDATE | WIN_C_UPDATE | WIN_D_UPDATE}, + {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ | WIN_B_ACT_REQ | WIN_C_ACT_REQ | WIN_D_ACT_REQ}, /* Setup Windows A/B/C */ - {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT | WINDOW_B_SELECT | WINDOW_C_SELECT}, + {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT | WINDOW_B_SELECT | WINDOW_C_SELECT | WINDOW_D_SELECT}, {DC_WIN_WIN_OPTIONS, 0}, {DC_WIN_DV_CONTROL, 0}, /* Setup default YUV colorspace conversion coefficients */ @@ -55,17 +53,14 @@ static const cfg_op_t _di_dc_setup_win_config[] = { {DC_COM_PIN_OUTPUT_POLARITY(3), 0}, {DC_DISP_BLEND_BACKGROUND_COLOR, 0}, {DC_COM_CRC_CONTROL, 0}, - {DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE | WIN_B_UPDATE | WIN_C_UPDATE}, - {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ | WIN_B_ACT_REQ | WIN_C_ACT_REQ}, - {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT | WINDOW_B_SELECT | WINDOW_C_SELECT}, + {DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE | WIN_B_UPDATE | WIN_C_UPDATE | WIN_D_UPDATE}, + {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ | WIN_B_ACT_REQ | WIN_C_ACT_REQ | WIN_D_ACT_REQ}, {DC_WINBUF_BLEND_LAYER_CONTROL, WIN_BLEND_BYPASS | WIN_BLEND_DEPTH(255)}, {DC_CMD_DISPLAY_COMMAND_OPTION0, 0}, - {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT | WINDOW_B_SELECT | WINDOW_C_SELECT}, - {DC_WIN_WIN_OPTIONS, 0}, {DC_DISP_DISP_WIN_OPTIONS, 0}, {DC_CMD_DISPLAY_COMMAND, DISP_CTRL_MODE_STOP}, - {DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE | WIN_B_UPDATE | WIN_C_UPDATE}, - {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ | WIN_B_ACT_REQ | WIN_C_ACT_REQ} + {DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE | WIN_B_UPDATE | WIN_C_UPDATE | WIN_D_UPDATE}, + {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ | WIN_B_ACT_REQ | WIN_C_ACT_REQ | WIN_D_ACT_REQ} }; // DSI Init config. @@ -286,42 +281,6 @@ static const cfg_op_t _di_mipi_start_dsi_cal_config[] = { // Display A enable config. static const cfg_op_t _di_dc_video_enable_config[] = { - {DC_CMD_STATE_ACCESS, 0}, - - /* Setup Windows A/B/C */ - {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT | WINDOW_B_SELECT | WINDOW_C_SELECT}, - {DC_WIN_WIN_OPTIONS, 0}, - {DC_WIN_DV_CONTROL, 0}, - /* Setup default YUV colorspace conversion coefficients */ - {DC_WINC_CSC_YOF, 0xF0}, - {DC_WINC_CSC_KYRGB, 0x12A}, - {DC_WINC_CSC_KUR, 0}, - {DC_WINC_CSC_KVR, 0x198}, - {DC_WINC_CSC_KUG, 0x39B}, - {DC_WINC_CSC_KVG, 0x32F}, - {DC_WINC_CSC_KUB, 0x204}, - {DC_WINC_CSC_KVB, 0}, - /* End of color coefficients */ - - {DC_DISP_DISP_COLOR_CONTROL, BASE_COLOR_SIZE_888}, - {DC_DISP_DISP_INTERFACE_CONTROL, DISP_DATA_FORMAT_DF1P1C}, - {DC_COM_PIN_OUTPUT_POLARITY(1), LSC0_OUTPUT_POLARITY_LOW}, - {DC_COM_PIN_OUTPUT_POLARITY(3), 0}, - {DC_DISP_BLEND_BACKGROUND_COLOR, 0}, - {DC_COM_CRC_CONTROL, 0}, - {DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE | WIN_B_UPDATE | WIN_C_UPDATE}, - {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ | WIN_B_ACT_REQ | WIN_C_ACT_REQ}, - {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT | WINDOW_B_SELECT | WINDOW_C_SELECT}, - {DC_WINBUF_BLEND_LAYER_CONTROL, WIN_BLEND_BYPASS | WIN_BLEND_DEPTH(255)}, - {DC_CMD_DISPLAY_COMMAND_OPTION0, 0}, - {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT | WINDOW_B_SELECT | WINDOW_C_SELECT}, - {DC_WIN_WIN_OPTIONS, 0}, - {DC_DISP_DISP_WIN_OPTIONS, 0}, - {DC_CMD_DISPLAY_COMMAND, DISP_CTRL_MODE_STOP}, - {DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE | WIN_B_UPDATE | WIN_C_UPDATE}, - {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ | WIN_B_ACT_REQ | WIN_C_ACT_REQ}, - {DC_CMD_STATE_ACCESS, 0}, - /* Set panel timings */ {DC_DISP_DISP_TIMING_OPTIONS, VSYNC_H_POSITION(0)}, {DC_DISP_REF_TO_SYNC, V_REF_TO_SYNC(1) | H_REF_TO_SYNC(0)}, @@ -334,43 +293,39 @@ static const cfg_op_t _di_dc_video_enable_config[] = { {DC_DISP_SHIFT_CLOCK_OPTIONS, SC1_H_QUALIFIER_NONE | SC0_H_QUALIFIER_NONE}, {DC_COM_PIN_OUTPUT_ENABLE(1), 0}, {DC_DISP_DATA_ENABLE_OPTIONS, DE_SELECT_ACTIVE | DE_CONTROL_NORMAL}, - {DC_DISP_DISP_INTERFACE_CONTROL, DISP_DATA_FORMAT_DF1P1C}, {DC_DISP_DISP_CLOCK_CONTROL, 0}, - {DC_CMD_DISPLAY_COMMAND_OPTION0, 0}, - {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT | WINDOW_B_SELECT | WINDOW_C_SELECT}, - {DC_WIN_WIN_OPTIONS, 0}, - {DC_DISP_DISP_WIN_OPTIONS, 0}, + + /* Start continuous display. */ {DC_CMD_DISPLAY_COMMAND, DISP_CTRL_MODE_C_DISPLAY}, {DC_CMD_STATE_CONTROL, GENERAL_UPDATE}, {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ}, - {DC_CMD_STATE_ACCESS, READ_MUX | WRITE_MUX}, - {DC_DISP_FRONT_PORCH, V_FRONT_PORCH(10) | H_FRONT_PORCH(136)}, - {DC_CMD_STATE_ACCESS, 0}, {DC_CMD_STATE_CONTROL, GENERAL_UPDATE}, {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ}, {DC_CMD_GENERAL_INCR_SYNCPT, SYNCPT_GENERAL_COND(COND_REG_WR_SAFE) | SYNCPT_GENERAL_INDX(1)}, + {DC_CMD_GENERAL_INCR_SYNCPT, SYNCPT_GENERAL_COND(COND_REG_WR_SAFE) | SYNCPT_GENERAL_INDX(1)}, {DC_CMD_STATE_CONTROL, GENERAL_UPDATE}, {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ}, - {DC_CMD_STATE_ACCESS, 0}, {DC_DISP_DISP_CLOCK_CONTROL, PIXEL_CLK_DIVIDER_PCD1 | SHIFT_CLK_DIVIDER(4)}, - {DC_DISP_DISP_COLOR_CONTROL, BASE_COLOR_SIZE_888}, - {DC_CMD_DISPLAY_COMMAND_OPTION0, 0} }; // Display A disable config. static const cfg_op_t _di_dc_video_disable_config[] = { - {DC_DISP_FRONT_PORCH, V_FRONT_PORCH(10) | H_FRONT_PORCH(136)}, {DC_CMD_INT_MASK, 0}, - {DC_CMD_STATE_ACCESS, 0}, + {DC_CMD_STATE_ACCESS, READ_MUX_ASSEMBLY | WRITE_MUX_ASSEMBLY}, {DC_CMD_INT_ENABLE, 0}, {DC_CMD_CONT_SYNCPT_VSYNC, 0}, + + /* Stop display. */ {DC_CMD_DISPLAY_COMMAND, DISP_CTRL_MODE_STOP}, {DC_CMD_STATE_CONTROL, GENERAL_UPDATE}, {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ}, + {DC_CMD_STATE_CONTROL, GENERAL_UPDATE}, + {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ}, + {DC_CMD_GENERAL_INCR_SYNCPT, SYNCPT_GENERAL_COND(COND_REG_WR_SAFE) | SYNCPT_GENERAL_INDX(1)}, {DC_CMD_GENERAL_INCR_SYNCPT, SYNCPT_GENERAL_COND(COND_REG_WR_SAFE) | SYNCPT_GENERAL_INDX(1)}, {DC_CMD_STATE_CONTROL, GENERAL_UPDATE}, {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ}, - // LCD panels should sleep for 40ms here. + // TODO: LCD panels should sleep for 40ms here. {DC_CMD_DISPLAY_POWER_CONTROL, 0}, {DC_CMD_STATE_CONTROL, GENERAL_UPDATE}, {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ}, @@ -464,15 +419,17 @@ static const cfg_op_t _di_dsi_panel_deinit_config_auo[] = { {DSI_TRIGGER, DSI_TRIGGER_HOST} }; +/* static const cfg_op_t _di_init_config_invert[] = { {DSI_WR_DATA, 0x239}, {DSI_WR_DATA, 0x02C1}, // INV_EN. {DSI_TRIGGER, DSI_TRIGGER_HOST}, }; +*/ // Display A Window A one color config. static const cfg_op_t _di_win_one_color[] = { - {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT | WINDOW_B_SELECT | WINDOW_C_SELECT}, + {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT | WINDOW_B_SELECT | WINDOW_C_SELECT | WINDOW_D_SELECT}, {DC_WIN_WIN_OPTIONS, 0}, {DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE}, {DC_CMD_DISPLAY_COMMAND, DISP_CTRL_MODE_C_DISPLAY} // Continuous display. @@ -480,8 +437,6 @@ static const cfg_op_t _di_win_one_color[] = { // Display A Window A linear pitch config. static const cfg_op_t _di_winA_pitch[] = { - {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT | WINDOW_B_SELECT}, - {DC_WIN_WIN_OPTIONS, 0}, {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, {DC_WIN_WIN_OPTIONS, 0}, {DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE}, @@ -500,14 +455,12 @@ static const cfg_op_t _di_winA_pitch[] = { {DC_WINBUF_ADDR_V_OFFSET, 0}, {DC_WIN_WIN_OPTIONS, WIN_ENABLE}, // Enable window AD. {DC_CMD_DISPLAY_COMMAND, DISP_CTRL_MODE_C_DISPLAY}, // Continuous display. - {DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE}, + {DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE}, {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ} }; // Display A Window A linear pitch + Win D support config. static const cfg_op_t _di_winA_pitch_vic[] = { - {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_D_SELECT | WINDOW_C_SELECT | WINDOW_B_SELECT}, - {DC_WIN_WIN_OPTIONS, 0}, {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, {DC_WIN_WIN_OPTIONS, 0}, {DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE}, @@ -526,14 +479,12 @@ static const cfg_op_t _di_winA_pitch_vic[] = { {DC_WINBUF_ADDR_V_OFFSET, 0}, {DC_WIN_WIN_OPTIONS, WIN_ENABLE}, // Enable window AD. {DC_CMD_DISPLAY_COMMAND, DISP_CTRL_MODE_C_DISPLAY}, // Continuous display. - {DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE}, + {DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE}, {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ} }; // Display A Window A linear pitch inverse + Win D support config. static const cfg_op_t _di_winA_pitch_inv[] = { - {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_D_SELECT | WINDOW_C_SELECT | WINDOW_B_SELECT}, - {DC_WIN_WIN_OPTIONS, 0}, {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, {DC_WIN_WIN_OPTIONS, 0}, {DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE}, @@ -552,14 +503,12 @@ static const cfg_op_t _di_winA_pitch_inv[] = { {DC_WINBUF_ADDR_V_OFFSET, 1279}, // Linear: 1279, Block: 0. {DC_WIN_WIN_OPTIONS, WIN_ENABLE | V_DIRECTION}, // Enable window AD. {DC_CMD_DISPLAY_COMMAND, DISP_CTRL_MODE_C_DISPLAY}, // Continuous display. - {DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE}, + {DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE}, {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ} }; // Display A Window A block linear config. static const cfg_op_t _di_winA_block[] = { - {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_D_SELECT | WINDOW_C_SELECT | WINDOW_B_SELECT}, - {DC_WIN_WIN_OPTIONS, 0}, {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, {DC_WIN_WIN_OPTIONS, 0}, {DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE}, @@ -578,7 +527,7 @@ static const cfg_op_t _di_winA_block[] = { {DC_WINBUF_ADDR_V_OFFSET, 0}, // Linear: 1279, Block: 0. {DC_WIN_WIN_OPTIONS, WIN_ENABLE | SCAN_COLUMN | H_DIRECTION}, // Enable window AD. | SCAN_COLUMN | H_DIRECTION. {DC_CMD_DISPLAY_COMMAND, DISP_CTRL_MODE_C_DISPLAY}, // Continuous display. - {DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE}, + {DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE}, {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ} }; @@ -601,6 +550,7 @@ static const cfg_op_t _di_winD_log[] = { {DC_WINBUF_ADDR_V_OFFSET, 0}, {DC_WINBUF_BLEND_LAYER_CONTROL, WIN_BLEND_ENABLE | WIN_K1(200) | WIN_BLEND_DEPTH(0)}, {DC_WINBUF_BLEND_MATCH_SELECT, WIN_BLEND_FACT_SRC_COLOR_MATCH_SEL_K1 | WIN_BLEND_FACT_DST_COLOR_MATCH_SEL_NEG_K1}, - {DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_D_UPDATE}, - {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_D_ACT_REQ} + {DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_D_UPDATE}, + {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_D_ACT_REQ}, + {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, }; From c5f6837c35d20d2dbd2b83c8b651b6dae6be2a96 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 2 Jun 2024 08:23:13 +0300 Subject: [PATCH 189/308] bdk: display: wait 1 frame after display off cmd --- bdk/display/di.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/bdk/display/di.c b/bdk/display/di.c index 2db4898..83922d8 100644 --- a/bdk/display/di.c +++ b/bdk/display/di.c @@ -644,9 +644,9 @@ static void _display_dsi_backlight_brightness(u32 duty) u16 bl_ctrl = byte_swap_16((u16)candela); display_dsi_vblank_write(MIPI_DCS_SET_BRIGHTNESS, 2, &bl_ctrl); - // Wait for backlight to completely turn off. 6+1 frames. + // Wait for backlight to completely turn off. 6 frames. if (!duty) - usleep(120000); + usleep(100000); _dsi_bl = duty; } @@ -707,7 +707,8 @@ static void _display_panel_and_hw_end(bool no_panel_deinit) DSI(_DSIREG(DSI_WR_DATA)) = (MIPI_DCS_SET_DISPLAY_OFF << 8) | MIPI_DSI_DCS_SHORT_WRITE; // Wait for 5 frames (HOST1X_CH0_SYNC_SYNCPT_9). - // Not here. + // Not here. Wait for 1 frame manually. + usleep(20000); // Propagate changes to all register buffers and disable host cmd packets during video. DISPLAY_A(_DIREG(DC_CMD_STATE_ACCESS)) = READ_MUX_ACTIVE | WRITE_MUX_ACTIVE; From 320b91a767445ff412bdc30b9ab3665b6d45f4be Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 2 Jun 2024 08:23:58 +0300 Subject: [PATCH 190/308] bdk: display: return duty for oled panel properly For display_get_backlight_brightness. --- bdk/display/di.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/bdk/display/di.c b/bdk/display/di.c index 83922d8..cf40bfa 100644 --- a/bdk/display/di.c +++ b/bdk/display/di.c @@ -690,7 +690,10 @@ void display_backlight_brightness(u32 brightness, u32 step_delay) u32 display_get_backlight_brightness() { - return ((PWM(PWM_CONTROLLER_PWM_CSR_0) >> 16) & 0xFF); + if (_display_id != PANEL_SAM_AMS699VC01) + return ((PWM(PWM_CONTROLLER_PWM_CSR_0) >> 16) & 0xFF); + else + return _dsi_bl; } static void _display_panel_and_hw_end(bool no_panel_deinit) From 4fef1890aa8ae338cfa3bd981f27dc4a9263746f Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 5 Jun 2024 00:49:15 +0300 Subject: [PATCH 191/308] bdk: rename exec_cfg to reg_write_array And cfg_op_t to reg_cfg_t. --- bdk/display/di.c | 50 ++++++++++++++++++++++---------------------- bdk/display/di.inl | 52 +++++++++++++++++++++++----------------------- bdk/utils/util.c | 7 ++++--- bdk/utils/util.h | 10 ++++----- 4 files changed, 60 insertions(+), 59 deletions(-) diff --git a/bdk/display/di.c b/bdk/display/di.c index cf40bfa..d3ead83 100644 --- a/bdk/display/di.c +++ b/bdk/display/di.c @@ -448,19 +448,19 @@ void display_init() clock_enable_plld(3, 20, true, tegra_t210); // Setup Display Interface initial window configuration. - exec_cfg((u32 *)DISPLAY_A_BASE, _di_dc_setup_win_config, ARRAY_SIZE(_di_dc_setup_win_config)); + reg_write_array((u32 *)DISPLAY_A_BASE, _di_dc_setup_win_config, ARRAY_SIZE(_di_dc_setup_win_config)); // Setup dsi init sequence packets. - exec_cfg((u32 *)DSI_BASE, _di_dsi_init_config0, ARRAY_SIZE(_di_dsi_init_config0)); + reg_write_array((u32 *)DSI_BASE, _di_dsi_init_config0, ARRAY_SIZE(_di_dsi_init_config0)); DSI(_DSIREG(tegra_t210 ? DSI_INIT_SEQ_DATA_15 : DSI_INIT_SEQ_DATA_15_B01)) = 0; - exec_cfg((u32 *)DSI_BASE, _di_dsi_init_config1, ARRAY_SIZE(_di_dsi_init_config1)); + reg_write_array((u32 *)DSI_BASE, _di_dsi_init_config1, ARRAY_SIZE(_di_dsi_init_config1)); // Reset pad trimmers for T210B01. if (!tegra_t210) - exec_cfg((u32 *)DSI_BASE, _di_dsi_init_pads_t210b01, ARRAY_SIZE(_di_dsi_init_pads_t210b01)); + reg_write_array((u32 *)DSI_BASE, _di_dsi_init_pads_t210b01, ARRAY_SIZE(_di_dsi_init_pads_t210b01)); // Setup init sequence packets, timings and power on DSI. - exec_cfg((u32 *)DSI_BASE, _di_dsi_init_config2, ARRAY_SIZE(_di_dsi_init_config2)); + reg_write_array((u32 *)DSI_BASE, _di_dsi_init_config2, ARRAY_SIZE(_di_dsi_init_config2)); usleep(10000); // Enable LCD Reset. @@ -530,7 +530,7 @@ void display_init() break; case PANEL_JDI_XXX062M: - exec_cfg((u32 *)DSI_BASE, _di_dsi_panel_init_config_jdi, ARRAY_SIZE(_di_dsi_panel_init_config_jdi)); + reg_write_array((u32 *)DSI_BASE, _di_dsi_panel_init_config_jdi, ARRAY_SIZE(_di_dsi_panel_init_config_jdi)); _display_dsi_send_cmd(MIPI_DSI_DCS_SHORT_WRITE, MIPI_DCS_EXIT_SLEEP_MODE, 180000); break; @@ -571,18 +571,18 @@ void display_init() clock_enable_plld(1, 24, false, tegra_t210); // Finalize DSI init packet sequence configuration. - exec_cfg((u32 *)DSI_BASE, _di_dsi_init_seq_pkt_final_config, ARRAY_SIZE(_di_dsi_init_seq_pkt_final_config)); + reg_write_array((u32 *)DSI_BASE, _di_dsi_init_seq_pkt_final_config, ARRAY_SIZE(_di_dsi_init_seq_pkt_final_config)); // Set 1-by-1 pixel/clock and pixel clock to 234 / 3 = 78 MHz. For 60 Hz refresh rate. DISPLAY_A(_DIREG(DC_DISP_DISP_CLOCK_CONTROL)) = PIXEL_CLK_DIVIDER_PCD1 | SHIFT_CLK_DIVIDER(4); // 4: div3. // Set DSI mode. - exec_cfg((u32 *)DSI_BASE, _di_dsi_mode_config, ARRAY_SIZE(_di_dsi_mode_config)); + reg_write_array((u32 *)DSI_BASE, _di_dsi_mode_config, ARRAY_SIZE(_di_dsi_mode_config)); usleep(10000); // Calibrate display communication pads. const u32 loops = tegra_t210 ? 1 : 2; // Calibrate pads 2 times on T210B01. - exec_cfg((u32 *)MIPI_CAL_BASE, _di_mipi_pad_cal_config, ARRAY_SIZE(_di_mipi_pad_cal_config)); + reg_write_array((u32 *)MIPI_CAL_BASE, _di_mipi_pad_cal_config, ARRAY_SIZE(_di_mipi_pad_cal_config)); for (u32 i = 0; i < loops; i++) { // Set MIPI bias pad config. @@ -592,22 +592,22 @@ void display_init() // Set pad trimmers and set MIPI DSI cal offsets. if (tegra_t210) { - exec_cfg((u32 *)DSI_BASE, _di_dsi_pad_cal_config_t210, ARRAY_SIZE(_di_dsi_pad_cal_config_t210)); - exec_cfg((u32 *)MIPI_CAL_BASE, _di_mipi_dsi_cal_offsets_config_t210, ARRAY_SIZE(_di_mipi_dsi_cal_offsets_config_t210)); + reg_write_array((u32 *)DSI_BASE, _di_dsi_pad_cal_config_t210, ARRAY_SIZE(_di_dsi_pad_cal_config_t210)); + reg_write_array((u32 *)MIPI_CAL_BASE, _di_mipi_dsi_cal_offsets_config_t210, ARRAY_SIZE(_di_mipi_dsi_cal_offsets_config_t210)); } else { - exec_cfg((u32 *)DSI_BASE, _di_dsi_pad_cal_config_t210b01, ARRAY_SIZE(_di_dsi_pad_cal_config_t210b01)); - exec_cfg((u32 *)MIPI_CAL_BASE, _di_mipi_dsi_cal_offsets_config_t210b01, ARRAY_SIZE(_di_mipi_dsi_cal_offsets_config_t210b01)); + reg_write_array((u32 *)DSI_BASE, _di_dsi_pad_cal_config_t210b01, ARRAY_SIZE(_di_dsi_pad_cal_config_t210b01)); + reg_write_array((u32 *)MIPI_CAL_BASE, _di_mipi_dsi_cal_offsets_config_t210b01, ARRAY_SIZE(_di_mipi_dsi_cal_offsets_config_t210b01)); } // Reset all MIPI cal offsets and start calibration. - exec_cfg((u32 *)MIPI_CAL_BASE, _di_mipi_start_dsi_cal_config, ARRAY_SIZE(_di_mipi_start_dsi_cal_config)); + reg_write_array((u32 *)MIPI_CAL_BASE, _di_mipi_start_dsi_cal_config, ARRAY_SIZE(_di_mipi_start_dsi_cal_config)); } usleep(10000); // Enable video display controller. - exec_cfg((u32 *)DISPLAY_A_BASE, _di_dc_video_enable_config, ARRAY_SIZE(_di_dc_video_enable_config)); + reg_write_array((u32 *)DISPLAY_A_BASE, _di_dc_video_enable_config, ARRAY_SIZE(_di_dc_video_enable_config)); } void display_backlight_pwm_init() @@ -718,7 +718,7 @@ static void _display_panel_and_hw_end(bool no_panel_deinit) DSI(_DSIREG(DSI_VIDEO_MODE_CONTROL)) = 0; // De-initialize video controller. - exec_cfg((u32 *)DISPLAY_A_BASE, _di_dc_video_disable_config, ARRAY_SIZE(_di_dc_video_disable_config)); + reg_write_array((u32 *)DISPLAY_A_BASE, _di_dc_video_disable_config, ARRAY_SIZE(_di_dc_video_disable_config)); // Set DISP1 clock source, parent clock and DSI/PCLK to low power mode. // T210: DIVM: 1, DIVN: 20, DIVP: 3. PLLD_OUT: 100.0 MHz, PLLD_OUT0 (DSI-PCLK): 50.0 MHz. (PCLK: 16.66 MHz) @@ -726,7 +726,7 @@ static void _display_panel_and_hw_end(bool no_panel_deinit) clock_enable_plld(3, 20, true, hw_get_chip_id() == GP_HIDREV_MAJOR_T210); // Set timings for lowpower clocks. - exec_cfg((u32 *)DSI_BASE, _di_dsi_timing_deinit_config, ARRAY_SIZE(_di_dsi_timing_deinit_config)); + reg_write_array((u32 *)DSI_BASE, _di_dsi_timing_deinit_config, ARRAY_SIZE(_di_dsi_timing_deinit_config)); if (_display_id != PANEL_SAM_AMS699VC01) usleep(10000); @@ -735,11 +735,11 @@ static void _display_panel_and_hw_end(bool no_panel_deinit) switch (_display_id) { case PANEL_JDI_XXX062M: - exec_cfg((u32 *)DSI_BASE, _di_dsi_panel_deinit_config_jdi, ARRAY_SIZE(_di_dsi_panel_deinit_config_jdi)); + reg_write_array((u32 *)DSI_BASE, _di_dsi_panel_deinit_config_jdi, ARRAY_SIZE(_di_dsi_panel_deinit_config_jdi)); break; case PANEL_AUO_A062TAN01: - exec_cfg((u32 *)DSI_BASE, _di_dsi_panel_deinit_config_auo, ARRAY_SIZE(_di_dsi_panel_deinit_config_auo)); + reg_write_array((u32 *)DSI_BASE, _di_dsi_panel_deinit_config_auo, ARRAY_SIZE(_di_dsi_panel_deinit_config_auo)); break; case PANEL_INL_2J055IA_27A: @@ -845,7 +845,7 @@ void display_set_decoded_panel_id(u32 id) void display_color_screen(u32 color) { // Disable all windows. - exec_cfg((u32 *)DISPLAY_A_BASE, _di_win_one_color, ARRAY_SIZE(_di_win_one_color)); + reg_write_array((u32 *)DISPLAY_A_BASE, _di_win_one_color, ARRAY_SIZE(_di_win_one_color)); // Configure display to show single color. DISPLAY_A(_DIREG(DC_DISP_BLEND_BACKGROUND_COLOR)) = color; @@ -867,7 +867,7 @@ u32 *display_init_framebuffer_pitch() memset((u32 *)IPL_FB_ADDRESS, 0, IPL_FB_SZ); // This configures the framebuffer @ IPL_FB_ADDRESS with a resolution of 720x1280 (line stride 720). - exec_cfg((u32 *)DISPLAY_A_BASE, _di_winA_pitch, ARRAY_SIZE(_di_winA_pitch)); + reg_write_array((u32 *)DISPLAY_A_BASE, _di_winA_pitch, ARRAY_SIZE(_di_winA_pitch)); //usleep(35000); // Wait 2 frames. No need on Aula. return (u32 *)DISPLAY_A(_DIREG(DC_WINBUF_START_ADDR)); @@ -878,7 +878,7 @@ u32 *display_init_framebuffer_pitch_vic() // This configures the framebuffer @ NYX_FB_ADDRESS with a resolution of 720x1280 (line stride 720). if (_display_id != PANEL_SAM_AMS699VC01) usleep(8000); // Wait half frame for PWM to apply. - exec_cfg((u32 *)DISPLAY_A_BASE, _di_winA_pitch_vic, ARRAY_SIZE(_di_winA_pitch_vic)); + reg_write_array((u32 *)DISPLAY_A_BASE, _di_winA_pitch_vic, ARRAY_SIZE(_di_winA_pitch_vic)); if (_display_id != PANEL_SAM_AMS699VC01) usleep(35000); // Wait 2 frames. @@ -888,7 +888,7 @@ u32 *display_init_framebuffer_pitch_vic() u32 *display_init_framebuffer_pitch_inv() { // This configures the framebuffer @ NYX_FB_ADDRESS with a resolution of 720x1280 (line stride 720). - exec_cfg((u32 *)DISPLAY_A_BASE, _di_winA_pitch_inv, ARRAY_SIZE(_di_winA_pitch_inv)); + reg_write_array((u32 *)DISPLAY_A_BASE, _di_winA_pitch_inv, ARRAY_SIZE(_di_winA_pitch_inv)); usleep(35000); // Wait 2 frames. No need on Aula. return (u32 *)DISPLAY_A(_DIREG(DC_WINBUF_START_ADDR)); @@ -897,7 +897,7 @@ u32 *display_init_framebuffer_pitch_inv() u32 *display_init_framebuffer_block() { // This configures the framebuffer @ NYX_FB_ADDRESS with a resolution of 720x1280. - exec_cfg((u32 *)DISPLAY_A_BASE, _di_winA_block, ARRAY_SIZE(_di_winA_block)); + reg_write_array((u32 *)DISPLAY_A_BASE, _di_winA_block, ARRAY_SIZE(_di_winA_block)); usleep(35000); // Wait 2 frames. No need on Aula. return (u32 *)DISPLAY_A(_DIREG(DC_WINBUF_START_ADDR)); @@ -906,7 +906,7 @@ u32 *display_init_framebuffer_block() u32 *display_init_framebuffer_log() { // This configures the framebuffer @ LOG_FB_ADDRESS with a resolution of 1280x720 (line stride 720). - exec_cfg((u32 *)DISPLAY_A_BASE, _di_winD_log, ARRAY_SIZE(_di_winD_log)); + reg_write_array((u32 *)DISPLAY_A_BASE, _di_winD_log, ARRAY_SIZE(_di_winD_log)); return (u32 *)DISPLAY_A(_DIREG(DC_WINBUF_START_ADDR)); } diff --git a/bdk/display/di.inl b/bdk/display/di.inl index 0a0cff5..aa2e920 100644 --- a/bdk/display/di.inl +++ b/bdk/display/di.inl @@ -16,7 +16,7 @@ */ // Display A config. -static const cfg_op_t _di_dc_setup_win_config[] = { +static const reg_cfg_t _di_dc_setup_win_config[] = { {DC_CMD_STATE_ACCESS, READ_MUX_ASSEMBLY | WRITE_MUX_ASSEMBLY}, {DC_CMD_STATE_CONTROL, GENERAL_UPDATE}, {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ}, @@ -64,7 +64,7 @@ static const cfg_op_t _di_dc_setup_win_config[] = { }; // DSI Init config. -static const cfg_op_t _di_dsi_init_config0[] = { +static const reg_cfg_t _di_dsi_init_config0[] = { {DSI_WR_DATA, 0}, {DSI_INT_ENABLE, 0}, {DSI_INT_STATUS, 0}, @@ -74,7 +74,7 @@ static const cfg_op_t _di_dsi_init_config0[] = { {DSI_INIT_SEQ_DATA_2, 0}, {DSI_INIT_SEQ_DATA_3, 0} }; -static const cfg_op_t _di_dsi_init_config1[] = { +static const reg_cfg_t _di_dsi_init_config1[] = { {DSI_DCS_CMDS, 0}, {DSI_PKT_SEQ_0_LO, 0}, {DSI_PKT_SEQ_1_LO, 0}, @@ -90,7 +90,7 @@ static const cfg_op_t _di_dsi_init_config1[] = { {DSI_PKT_SEQ_5_HI, 0}, {DSI_CONTROL, 0} }; -static const cfg_op_t _di_dsi_init_pads_t210b01[] = { +static const reg_cfg_t _di_dsi_init_pads_t210b01[] = { {DSI_PAD_CONTROL_1, 0}, {DSI_PAD_CONTROL_2, 0}, {DSI_PAD_CONTROL_3, 0}, @@ -99,7 +99,7 @@ static const cfg_op_t _di_dsi_init_pads_t210b01[] = { {DSI_PAD_CONTROL_6_B01, 0}, {DSI_PAD_CONTROL_7_B01, 0} }; -static const cfg_op_t _di_dsi_init_config2[] = { +static const reg_cfg_t _di_dsi_init_config2[] = { {DSI_PAD_CONTROL_CD, 0}, {DSI_SOL_DELAY, 24}, {DSI_MAX_THRESHOLD, 480}, @@ -141,7 +141,7 @@ static const cfg_op_t _di_dsi_init_config2[] = { }; // DSI panel JDI config. -static const cfg_op_t _di_dsi_panel_init_config_jdi[] = { +static const reg_cfg_t _di_dsi_panel_init_config_jdi[] = { {DSI_WR_DATA, 0x0439}, // MIPI_DSI_DCS_LONG_WRITE: 4 bytes. {DSI_WR_DATA, 0x9483FFB9}, // MIPI_DCS_PRIV_SET_EXTC. (Pass: FF 83 94). {DSI_TRIGGER, DSI_TRIGGER_HOST}, @@ -188,7 +188,7 @@ static const cfg_op_t _di_dsi_panel_init_config_jdi[] = { }; // DSI packet config. -static const cfg_op_t _di_dsi_init_seq_pkt_final_config[] = { +static const reg_cfg_t _di_dsi_init_seq_pkt_final_config[] = { {DSI_PAD_CONTROL_1, 0}, {DSI_PHY_TIMING_0, 0x6070603}, {DSI_PHY_TIMING_1, 0x40A0E05}, @@ -213,7 +213,7 @@ static const cfg_op_t _di_dsi_init_seq_pkt_final_config[] = { }; // DSI mode config. -static const cfg_op_t _di_dsi_mode_config[] = { +static const reg_cfg_t _di_dsi_mode_config[] = { {DSI_TRIGGER, 0}, {DSI_CONTROL, 0}, {DSI_SOL_DELAY, 6}, @@ -227,7 +227,7 @@ static const cfg_op_t _di_dsi_mode_config[] = { }; // MIPI CAL config. -static const cfg_op_t _di_mipi_pad_cal_config[] = { +static const reg_cfg_t _di_mipi_pad_cal_config[] = { {MIPI_CAL_MIPI_BIAS_PAD_CFG2, 0}, {MIPI_CAL_CIL_MIPI_CAL_STATUS, 0xF3F10000}, {MIPI_CAL_MIPI_BIAS_PAD_CFG0, 0}, @@ -235,13 +235,13 @@ static const cfg_op_t _di_mipi_pad_cal_config[] = { }; // DSI pad config. -static const cfg_op_t _di_dsi_pad_cal_config_t210[] = { +static const reg_cfg_t _di_dsi_pad_cal_config_t210[] = { {DSI_PAD_CONTROL_1, 0}, {DSI_PAD_CONTROL_2, 0}, {DSI_PAD_CONTROL_3, DSI_PAD_PREEMP_PD_CLK(0x3) | DSI_PAD_PREEMP_PU_CLK(0x3) | DSI_PAD_PREEMP_PD(0x03) | DSI_PAD_PREEMP_PU(0x3)}, {DSI_PAD_CONTROL_4, 0} }; -static const cfg_op_t _di_dsi_pad_cal_config_t210b01[] = { +static const reg_cfg_t _di_dsi_pad_cal_config_t210b01[] = { {DSI_PAD_CONTROL_1, 0}, {DSI_PAD_CONTROL_2, 0}, {DSI_PAD_CONTROL_3, 0}, @@ -252,19 +252,19 @@ static const cfg_op_t _di_dsi_pad_cal_config_t210b01[] = { }; // MIPI CAL config. -static const cfg_op_t _di_mipi_dsi_cal_offsets_config_t210[] = { +static const reg_cfg_t _di_mipi_dsi_cal_offsets_config_t210[] = { {MIPI_CAL_DSIA_MIPI_CAL_CONFIG, 0x200200}, {MIPI_CAL_DSIB_MIPI_CAL_CONFIG, 0x200200}, {MIPI_CAL_DSIA_MIPI_CAL_CONFIG_2, 0x200002}, {MIPI_CAL_DSIB_MIPI_CAL_CONFIG_2, 0x200002} }; -static const cfg_op_t _di_mipi_dsi_cal_offsets_config_t210b01[] = { +static const reg_cfg_t _di_mipi_dsi_cal_offsets_config_t210b01[] = { {MIPI_CAL_DSIA_MIPI_CAL_CONFIG, 0x200006}, {MIPI_CAL_DSIB_MIPI_CAL_CONFIG, 0x200006}, {MIPI_CAL_DSIA_MIPI_CAL_CONFIG_2, 0x260000}, {MIPI_CAL_DSIB_MIPI_CAL_CONFIG_2, 0x260000} }; -static const cfg_op_t _di_mipi_start_dsi_cal_config[] = { +static const reg_cfg_t _di_mipi_start_dsi_cal_config[] = { {MIPI_CAL_CILA_MIPI_CAL_CONFIG, 0}, {MIPI_CAL_CILB_MIPI_CAL_CONFIG, 0}, {MIPI_CAL_CILC_MIPI_CAL_CONFIG, 0}, @@ -280,7 +280,7 @@ static const cfg_op_t _di_mipi_start_dsi_cal_config[] = { }; // Display A enable config. -static const cfg_op_t _di_dc_video_enable_config[] = { +static const reg_cfg_t _di_dc_video_enable_config[] = { /* Set panel timings */ {DC_DISP_DISP_TIMING_OPTIONS, VSYNC_H_POSITION(0)}, {DC_DISP_REF_TO_SYNC, V_REF_TO_SYNC(1) | H_REF_TO_SYNC(0)}, @@ -309,7 +309,7 @@ static const cfg_op_t _di_dc_video_enable_config[] = { }; // Display A disable config. -static const cfg_op_t _di_dc_video_disable_config[] = { +static const reg_cfg_t _di_dc_video_disable_config[] = { {DC_CMD_INT_MASK, 0}, {DC_CMD_STATE_ACCESS, READ_MUX_ASSEMBLY | WRITE_MUX_ASSEMBLY}, {DC_CMD_INT_ENABLE, 0}, @@ -332,7 +332,7 @@ static const cfg_op_t _di_dc_video_disable_config[] = { }; // DSI deinit config. -static const cfg_op_t _di_dsi_timing_deinit_config[] = { +static const reg_cfg_t _di_dsi_timing_deinit_config[] = { {DSI_POWER_CONTROL, 0}, {DSI_PAD_CONTROL_1, 0}, {DSI_PHY_TIMING_0, 0x6070603}, @@ -352,7 +352,7 @@ static const cfg_op_t _di_dsi_timing_deinit_config[] = { }; // DSI panel JDI deinit config. -static const cfg_op_t _di_dsi_panel_deinit_config_jdi[] = { +static const reg_cfg_t _di_dsi_panel_deinit_config_jdi[] = { {DSI_WR_DATA, 0x439}, // MIPI_DSI_DCS_LONG_WRITE: 4 bytes. {DSI_WR_DATA, 0x9483FFB9}, // MIPI_DCS_PRIV_SET_EXTC. (Pass: FF 83 94). {DSI_TRIGGER, DSI_TRIGGER_HOST}, @@ -378,7 +378,7 @@ static const cfg_op_t _di_dsi_panel_deinit_config_jdi[] = { }; // DSI panel AUO deinit config. -static const cfg_op_t _di_dsi_panel_deinit_config_auo[] = { +static const reg_cfg_t _di_dsi_panel_deinit_config_auo[] = { {DSI_WR_DATA, 0x439}, // MIPI_DSI_DCS_LONG_WRITE: 4 bytes. {DSI_WR_DATA, 0x9483FFB9}, // MIPI_DCS_PRIV_SET_EXTC. (Pass: FF 83 94). {DSI_TRIGGER, DSI_TRIGGER_HOST}, @@ -420,7 +420,7 @@ static const cfg_op_t _di_dsi_panel_deinit_config_auo[] = { }; /* -static const cfg_op_t _di_init_config_invert[] = { +static const reg_cfg_t _di_init_config_invert[] = { {DSI_WR_DATA, 0x239}, {DSI_WR_DATA, 0x02C1}, // INV_EN. {DSI_TRIGGER, DSI_TRIGGER_HOST}, @@ -428,7 +428,7 @@ static const cfg_op_t _di_init_config_invert[] = { */ // Display A Window A one color config. -static const cfg_op_t _di_win_one_color[] = { +static const reg_cfg_t _di_win_one_color[] = { {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT | WINDOW_B_SELECT | WINDOW_C_SELECT | WINDOW_D_SELECT}, {DC_WIN_WIN_OPTIONS, 0}, {DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE}, @@ -436,7 +436,7 @@ static const cfg_op_t _di_win_one_color[] = { }; // Display A Window A linear pitch config. -static const cfg_op_t _di_winA_pitch[] = { +static const reg_cfg_t _di_winA_pitch[] = { {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, {DC_WIN_WIN_OPTIONS, 0}, {DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE}, @@ -460,7 +460,7 @@ static const cfg_op_t _di_winA_pitch[] = { }; // Display A Window A linear pitch + Win D support config. -static const cfg_op_t _di_winA_pitch_vic[] = { +static const reg_cfg_t _di_winA_pitch_vic[] = { {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, {DC_WIN_WIN_OPTIONS, 0}, {DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE}, @@ -484,7 +484,7 @@ static const cfg_op_t _di_winA_pitch_vic[] = { }; // Display A Window A linear pitch inverse + Win D support config. -static const cfg_op_t _di_winA_pitch_inv[] = { +static const reg_cfg_t _di_winA_pitch_inv[] = { {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, {DC_WIN_WIN_OPTIONS, 0}, {DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE}, @@ -508,7 +508,7 @@ static const cfg_op_t _di_winA_pitch_inv[] = { }; // Display A Window A block linear config. -static const cfg_op_t _di_winA_block[] = { +static const reg_cfg_t _di_winA_block[] = { {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, {DC_WIN_WIN_OPTIONS, 0}, {DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE}, @@ -532,7 +532,7 @@ static const cfg_op_t _di_winA_block[] = { }; // Display A Window D config. -static const cfg_op_t _di_winD_log[] = { +static const reg_cfg_t _di_winD_log[] = { {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_D_SELECT}, {DC_WIN_WIN_OPTIONS, 0}, {DC_WIN_COLOR_DEPTH, WIN_COLOR_DEPTH_B8G8R8A8}, diff --git a/bdk/utils/util.c b/bdk/utils/util.c index 2e9c01d..878214f 100644 --- a/bdk/utils/util.c +++ b/bdk/utils/util.c @@ -197,10 +197,11 @@ int atoi(const char *nptr) return (int)strtol(nptr, (char **)NULL, 10); } -void exec_cfg(u32 *base, const cfg_op_t *ops, u32 num_ops) +void reg_write_array(u32 *base, const reg_cfg_t *cfg, u32 num_cfg) { - for (u32 i = 0; i < num_ops; i++) - base[ops[i].off] = ops[i].val; + // Expected register offset is a u32 array index. + for (u32 i = 0; i < num_cfg; i++) + base[cfg[i].idx] = cfg[i].val; } u32 crc32_calc(u32 crc, const u8 *buf, u32 len) diff --git a/bdk/utils/util.h b/bdk/utils/util.h index fffa516..2372b8c 100644 --- a/bdk/utils/util.h +++ b/bdk/utils/util.h @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2022 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -51,11 +51,11 @@ typedef enum ERR_EXCEPTION = BIT(31), } hekate_errors_t; -typedef struct _cfg_op_t +typedef struct _reg_cfg_t { - u32 off; + u32 idx; u32 val; -} cfg_op_t; +} reg_cfg_t; typedef struct _nyx_info_t { @@ -86,7 +86,7 @@ u64 sqrt64(u64 num); long strtol(const char *nptr, char **endptr, register int base); int atoi(const char *nptr); -void exec_cfg(u32 *base, const cfg_op_t *ops, u32 num_ops); +void reg_write_array(u32 *base, const reg_cfg_t *cfg, u32 num_cfg); u32 crc32_calc(u32 crc, const u8 *buf, u32 len); void panic(u32 val); From 48ef1826e9c7f697428f92d18ccc3796c7a72e75 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 5 Jun 2024 01:00:58 +0300 Subject: [PATCH 192/308] bdk: display: rename functions display_init_framebuffer_pitch -> display_init_window_a_pitch display_init_framebuffer_pitch_vic -> display_init_window_a_pitch_vic display_init_framebuffer_pitch_inv -> display_init_window_a_pitch_inv display_init_framebuffer_block -> display_init_window_a_block display_init_framebuffer_log -> display_init_window_d_console display_activate_console -> display_window_d_console_enable display_deactivate_console -> display_window_d_console_disable display_init_cursor -> display_cursor_init display_set_pos_cursor -> display_cursor_set_pos display_deinit_cursor -> display_cursor_deinit --- bdk/display/di.c | 20 ++++++++++---------- bdk/display/di.h | 23 ++++++++++++----------- 2 files changed, 22 insertions(+), 21 deletions(-) diff --git a/bdk/display/di.c b/bdk/display/di.c index d3ead83..8b60fc7 100644 --- a/bdk/display/di.c +++ b/bdk/display/di.c @@ -861,7 +861,7 @@ void display_color_screen(u32 color) display_backlight_brightness(150, 0); } -u32 *display_init_framebuffer_pitch() +u32 *display_init_window_a_pitch() { // Sanitize framebuffer area. memset((u32 *)IPL_FB_ADDRESS, 0, IPL_FB_SZ); @@ -873,7 +873,7 @@ u32 *display_init_framebuffer_pitch() return (u32 *)DISPLAY_A(_DIREG(DC_WINBUF_START_ADDR)); } -u32 *display_init_framebuffer_pitch_vic() +u32 *display_init_window_a_pitch_vic() { // This configures the framebuffer @ NYX_FB_ADDRESS with a resolution of 720x1280 (line stride 720). if (_display_id != PANEL_SAM_AMS699VC01) @@ -885,7 +885,7 @@ u32 *display_init_framebuffer_pitch_vic() return (u32 *)DISPLAY_A(_DIREG(DC_WINBUF_START_ADDR)); } -u32 *display_init_framebuffer_pitch_inv() +u32 *display_init_window_a_pitch_inv() { // This configures the framebuffer @ NYX_FB_ADDRESS with a resolution of 720x1280 (line stride 720). reg_write_array((u32 *)DISPLAY_A_BASE, _di_winA_pitch_inv, ARRAY_SIZE(_di_winA_pitch_inv)); @@ -894,7 +894,7 @@ u32 *display_init_framebuffer_pitch_inv() return (u32 *)DISPLAY_A(_DIREG(DC_WINBUF_START_ADDR)); } -u32 *display_init_framebuffer_block() +u32 *display_init_window_a_block() { // This configures the framebuffer @ NYX_FB_ADDRESS with a resolution of 720x1280. reg_write_array((u32 *)DISPLAY_A_BASE, _di_winA_block, ARRAY_SIZE(_di_winA_block)); @@ -903,7 +903,7 @@ u32 *display_init_framebuffer_block() return (u32 *)DISPLAY_A(_DIREG(DC_WINBUF_START_ADDR)); } -u32 *display_init_framebuffer_log() +u32 *display_init_window_d_console() { // This configures the framebuffer @ LOG_FB_ADDRESS with a resolution of 1280x720 (line stride 720). reg_write_array((u32 *)DISPLAY_A_BASE, _di_winD_log, ARRAY_SIZE(_di_winD_log)); @@ -911,7 +911,7 @@ u32 *display_init_framebuffer_log() return (u32 *)DISPLAY_A(_DIREG(DC_WINBUF_START_ADDR)); } -void display_activate_console() +void display_window_d_console_enable() { // Only update active registers on vsync. DISPLAY_A(_DIREG(DC_CMD_REG_ACT_CONTROL)) = DISPLAY_A(_DIREG(DC_CMD_REG_ACT_CONTROL)) & ~WIN_D_ACT_HCNTR_SEL; @@ -949,7 +949,7 @@ void display_activate_console() DISPLAY_A(_DIREG(DC_CMD_DISPLAY_WINDOW_HEADER)) = WINDOW_A_SELECT; } -void display_deactivate_console() +void display_window_d_console_disable() { // Select window D. DISPLAY_A(_DIREG(DC_CMD_DISPLAY_WINDOW_HEADER)) = WINDOW_D_SELECT; @@ -978,7 +978,7 @@ void display_deactivate_console() DISPLAY_A(_DIREG(DC_CMD_DISPLAY_WINDOW_HEADER)) = WINDOW_A_SELECT; } -void display_init_cursor(void *crs_fb, u32 size) +void display_cursor_init(void *crs_fb, u32 size) { // Setup cursor. DISPLAY_A(_DIREG(DC_DISP_CURSOR_START_ADDR)) = CURSOR_CLIPPING(CURSOR_CLIP_WIN_A) | size | ((u32)crs_fb >> 10); @@ -994,7 +994,7 @@ void display_init_cursor(void *crs_fb, u32 size) DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_ACT_REQ | CURSOR_ACT_REQ; } -void display_set_pos_cursor(u32 x, u32 y) +void display_cursor_set_pos(u32 x, u32 y) { // Set cursor position. DISPLAY_A(_DIREG(DC_DISP_CURSOR_POSITION)) = x | (y << 16); @@ -1004,7 +1004,7 @@ void display_set_pos_cursor(u32 x, u32 y) DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_ACT_REQ | CURSOR_ACT_REQ; } -void display_deinit_cursor() +void display_cursor_deinit() { DISPLAY_A(_DIREG(DC_DISP_BLEND_CURSOR_CONTROL)) = 0; DISPLAY_A(_DIREG(DC_DISP_DISP_WIN_OPTIONS)) &= ~CURSOR_ENABLE; diff --git a/bdk/display/di.h b/bdk/display/di.h index 8bb700a..fc77650 100644 --- a/bdk/display/di.h +++ b/bdk/display/di.h @@ -868,17 +868,18 @@ void display_backlight(bool enable); void display_backlight_brightness(u32 brightness, u32 step_delay); u32 display_get_backlight_brightness(); -/*! Init display in full 720x1280 resolution (B8G8R8A8, line stride 720, framebuffer size = 720*1280*4 bytes). */ -u32 *display_init_framebuffer_pitch(); -u32 *display_init_framebuffer_pitch_vic(); -u32 *display_init_framebuffer_pitch_inv(); -u32 *display_init_framebuffer_block(); -u32 *display_init_framebuffer_log(); -void display_activate_console(); -void display_deactivate_console(); -void display_init_cursor(void *crs_fb, u32 size); -void display_set_pos_cursor(u32 x, u32 y); -void display_deinit_cursor(); +u32 *display_init_window_a_pitch(); +u32 *display_init_window_a_pitch_vic(); +u32 *display_init_window_a_pitch_inv(); +u32 *display_init_window_a_block(); +u32 *display_init_window_d_console(); + +void display_window_d_console_enable(); +void display_window_d_console_disable(); + +void display_cursor_init(void *crs_fb, u32 size); +void display_cursor_set_pos(u32 x, u32 y); +void display_cursor_deinit(); int display_dsi_read(u8 cmd, u32 len, void *data); int display_dsi_vblank_read(u8 cmd, u32 len, void *data); From 21d782587fa0ab97559a46281b13f70562660f57 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 5 Jun 2024 01:03:46 +0300 Subject: [PATCH 193/308] hekate/nyx: adhere to display function renames --- bootloader/main.c | 4 ++-- nyx/nyx_gui/frontend/gui.c | 8 ++++---- nyx/nyx_gui/nyx.c | 4 ++-- 3 files changed, 8 insertions(+), 8 deletions(-) diff --git a/bootloader/main.c b/bootloader/main.c index 4046c4c..ddf4cbe 100644 --- a/bootloader/main.c +++ b/bootloader/main.c @@ -1297,7 +1297,7 @@ static void _check_low_battery() if (!screen_on) { display_init(); - u32 *fb = display_init_framebuffer_pitch(); + u32 *fb = display_init_window_a_pitch(); gfx_init_ctxt(fb, 720, 1280, 720); gfx_set_rect_rgb(battery_icon, BATTERY_EMPTY_WIDTH, BATTERY_EMPTY_BATT_HEIGHT, 16, battery_icon_y_pos); @@ -1540,7 +1540,7 @@ void ipl_main() skip_lp0_minerva_config: // Initialize display window, backlight and gfx console. - u32 *fb = display_init_framebuffer_pitch(); + u32 *fb = display_init_window_a_pitch(); gfx_init_ctxt(fb, 720, 1280, 720); gfx_con_init(); diff --git a/nyx/nyx_gui/frontend/gui.c b/nyx/nyx_gui/frontend/gui.c index 19886d8..4ded279 100644 --- a/nyx/nyx_gui/frontend/gui.c +++ b/nyx/nyx_gui/frontend/gui.c @@ -108,10 +108,10 @@ static void _nyx_disp_init() vic_compose(); // Switch to new window configuration. - display_init_framebuffer_pitch_vic(); + display_init_window_a_pitch_vic(); // Enable logging on window D. - display_init_framebuffer_log(); + display_init_window_d_console(); // Switch back the backlight. display_backlight_brightness(h_cfg.backlight - 20, 1000); } @@ -464,7 +464,7 @@ static bool _jc_virt_mouse_read(lv_indev_data_t *data) { if (!console_enabled) { - display_activate_console(); + display_window_d_console_enable(); console_enabled = true; gfx_con_getpos(&gfx_con.savedx, &gfx_con.savedy, &gfx_con.savedcol); gfx_con_setpos(964, 630, GFX_COL_AUTO); @@ -473,7 +473,7 @@ static bool _jc_virt_mouse_read(lv_indev_data_t *data) } else { - display_deactivate_console(); + display_window_d_console_disable(); console_enabled = false; } diff --git a/nyx/nyx_gui/nyx.c b/nyx/nyx_gui/nyx.c index e28f967..6d3d79e 100644 --- a/nyx/nyx_gui/nyx.c +++ b/nyx/nyx_gui/nyx.c @@ -354,8 +354,8 @@ static void _show_errors(int sd_error) gfx_clear_grey(0); gfx_con_setpos(0, 0, 0); display_backlight_brightness(150, 1000); - display_init_framebuffer_log(); - display_activate_console(); + display_init_window_d_console(); + display_window_d_console_enable(); } switch (sd_error) From 7652d9cdb1f75529292a978937d44ab7c5c5fa97 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 5 Jun 2024 01:11:04 +0300 Subject: [PATCH 194/308] bdk: display: use mipi cal sw war on T210 also As per Nvidia, the pad brick separates clock and data terminations. This necessitates doing the calibration twice. Nvidia/Nintendo probably never updated that part on T210 since it's from around 2015/2016. T210B01 is based on 2017 codebase so it has it. HOS (nvservices, not boot) is probably updated to also do that. If not, then they should fix it. There are 0 known issue reports with that on T210, but well. --- bdk/display/di.c | 26 +++++++++++++++++--------- bdk/display/di.inl | 9 ++++----- 2 files changed, 21 insertions(+), 14 deletions(-) diff --git a/bdk/display/di.c b/bdk/display/di.c index 8b60fc7..c1f1e0e 100644 --- a/bdk/display/di.c +++ b/bdk/display/di.c @@ -580,10 +580,15 @@ void display_init() reg_write_array((u32 *)DSI_BASE, _di_dsi_mode_config, ARRAY_SIZE(_di_dsi_mode_config)); usleep(10000); - // Calibrate display communication pads. - const u32 loops = tegra_t210 ? 1 : 2; // Calibrate pads 2 times on T210B01. + /* + * Calibrate display communication pads. + * When switching to the 16ff pad brick, the clock lane termination control + * is separated from data lane termination. This change of the mipi cal + * brings in a bug that the DSI pad clock termination code can't be loaded + * in one time calibration. Trigger calibration twice. + */ reg_write_array((u32 *)MIPI_CAL_BASE, _di_mipi_pad_cal_config, ARRAY_SIZE(_di_mipi_pad_cal_config)); - for (u32 i = 0; i < loops; i++) + for (u32 i = 0; i < 2; i++) { // Set MIPI bias pad config. MIPI_CAL(_DSIREG(MIPI_CAL_MIPI_BIAS_PAD_CFG2)) = 0x10010; @@ -592,17 +597,20 @@ void display_init() // Set pad trimmers and set MIPI DSI cal offsets. if (tegra_t210) { - reg_write_array((u32 *)DSI_BASE, _di_dsi_pad_cal_config_t210, ARRAY_SIZE(_di_dsi_pad_cal_config_t210)); - reg_write_array((u32 *)MIPI_CAL_BASE, _di_mipi_dsi_cal_offsets_config_t210, ARRAY_SIZE(_di_mipi_dsi_cal_offsets_config_t210)); + reg_write_array((u32 *)DSI_BASE, _di_dsi_pad_cal_config_t210, ARRAY_SIZE(_di_dsi_pad_cal_config_t210)); + reg_write_array((u32 *)MIPI_CAL_BASE, _di_mipi_dsi_cal_prod_config_t210, ARRAY_SIZE(_di_mipi_dsi_cal_prod_config_t210)); } else { - reg_write_array((u32 *)DSI_BASE, _di_dsi_pad_cal_config_t210b01, ARRAY_SIZE(_di_dsi_pad_cal_config_t210b01)); - reg_write_array((u32 *)MIPI_CAL_BASE, _di_mipi_dsi_cal_offsets_config_t210b01, ARRAY_SIZE(_di_mipi_dsi_cal_offsets_config_t210b01)); + reg_write_array((u32 *)DSI_BASE, _di_dsi_pad_cal_config_t210b01, ARRAY_SIZE(_di_dsi_pad_cal_config_t210b01)); + reg_write_array((u32 *)MIPI_CAL_BASE, _di_mipi_dsi_cal_prod_config_t210b01, ARRAY_SIZE(_di_mipi_dsi_cal_prod_config_t210b01)); } - // Reset all MIPI cal offsets and start calibration. - reg_write_array((u32 *)MIPI_CAL_BASE, _di_mipi_start_dsi_cal_config, ARRAY_SIZE(_di_mipi_start_dsi_cal_config)); + // Reset all unused MIPI cal offsets. + reg_write_array((u32 *)MIPI_CAL_BASE, _di_mipi_dsi_cal_unused_config, ARRAY_SIZE(_di_mipi_dsi_cal_unused_config)); + + // Set Prescale/filter and start calibration. + MIPI_CAL(_DSIREG(MIPI_CAL_MIPI_CAL_CTRL)) = 0x2A000001; } usleep(10000); diff --git a/bdk/display/di.inl b/bdk/display/di.inl index aa2e920..415b0d7 100644 --- a/bdk/display/di.inl +++ b/bdk/display/di.inl @@ -252,19 +252,19 @@ static const reg_cfg_t _di_dsi_pad_cal_config_t210b01[] = { }; // MIPI CAL config. -static const reg_cfg_t _di_mipi_dsi_cal_offsets_config_t210[] = { +static const reg_cfg_t _di_mipi_dsi_cal_prod_config_t210[] = { {MIPI_CAL_DSIA_MIPI_CAL_CONFIG, 0x200200}, {MIPI_CAL_DSIB_MIPI_CAL_CONFIG, 0x200200}, {MIPI_CAL_DSIA_MIPI_CAL_CONFIG_2, 0x200002}, {MIPI_CAL_DSIB_MIPI_CAL_CONFIG_2, 0x200002} }; -static const reg_cfg_t _di_mipi_dsi_cal_offsets_config_t210b01[] = { +static const reg_cfg_t _di_mipi_dsi_cal_prod_config_t210b01[] = { {MIPI_CAL_DSIA_MIPI_CAL_CONFIG, 0x200006}, {MIPI_CAL_DSIB_MIPI_CAL_CONFIG, 0x200006}, {MIPI_CAL_DSIA_MIPI_CAL_CONFIG_2, 0x260000}, {MIPI_CAL_DSIB_MIPI_CAL_CONFIG_2, 0x260000} }; -static const reg_cfg_t _di_mipi_start_dsi_cal_config[] = { +static const reg_cfg_t _di_mipi_dsi_cal_unused_config[] = { {MIPI_CAL_CILA_MIPI_CAL_CONFIG, 0}, {MIPI_CAL_CILB_MIPI_CAL_CONFIG, 0}, {MIPI_CAL_CILC_MIPI_CAL_CONFIG, 0}, @@ -275,8 +275,7 @@ static const reg_cfg_t _di_mipi_start_dsi_cal_config[] = { {MIPI_CAL_DSID_MIPI_CAL_CONFIG, 0}, {MIPI_CAL_DSIB_MIPI_CAL_CONFIG_2, 0}, {MIPI_CAL_DSIC_MIPI_CAL_CONFIG_2, 0}, - {MIPI_CAL_DSID_MIPI_CAL_CONFIG_2, 0}, - {MIPI_CAL_MIPI_CAL_CTRL, 0x2A000001} // Set Prescale and filter and start calibration. + {MIPI_CAL_DSID_MIPI_CAL_CONFIG_2, 0} }; // Display A enable config. From 39c614a3ab67005c8c71f7b62b9a6398d3dcd928 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 5 Jun 2024 01:33:15 +0300 Subject: [PATCH 195/308] bdk: hwinit: move sd2 to hw init SD2 powers LDO0/1/8 on T210B01 so there's no need to be in display init. Also there's not need to power it down first so configure it in one go. --- bdk/display/di.c | 11 ----------- bdk/soc/hw_init.c | 13 ++++++++++++- 2 files changed, 12 insertions(+), 12 deletions(-) diff --git a/bdk/display/di.c b/bdk/display/di.c index c1f1e0e..4de7e7a 100644 --- a/bdk/display/di.c +++ b/bdk/display/di.c @@ -373,17 +373,6 @@ void display_init() // Get Chip ID. bool tegra_t210 = hw_get_chip_id() == GP_HIDREV_MAJOR_T210; - // T210B01: Power on SD2 regulator for supplying LDO0. - if (!tegra_t210) - { - // Set SD2 regulator voltage. - max7762x_regulator_set_voltage(REGULATOR_SD2, 1325000); - - // Set slew rate and enable SD2 regulator. - i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_SD2_CFG, (1 << MAX77620_SD_SR_SHIFT) | MAX77620_SD_CFG1_FSRADE_SD_ENABLE); - max7762x_regulator_enable(REGULATOR_SD2, true); - } - // Enable LCD DVDD. max7762x_regulator_set_voltage(REGULATOR_LDO0, 1200000); max7762x_regulator_enable(REGULATOR_LDO0, true); diff --git a/bdk/soc/hw_init.c b/bdk/soc/hw_init.c index 0fb62a7..ef3060e 100644 --- a/bdk/soc/hw_init.c +++ b/bdk/soc/hw_init.c @@ -333,8 +333,19 @@ static void _config_regulators(bool tegra_t210) max77621_config_default(REGULATOR_CPU0, MAX77621_CTRL_POR_CFG); max77621_config_default(REGULATOR_GPU0, MAX77621_CTRL_POR_CFG); } - else // Tegra X1+ set vdd_core voltage to 1.05V. + else + { + // Tegra X1+ set vdd_core voltage to 1.05V. max7762x_regulator_set_voltage(REGULATOR_SD0, 1050000); + + // Power on SD2 regulator for supplying LDO0/1/8. + max7762x_regulator_set_voltage(REGULATOR_SD2, 1325000); + + // Set slew rate and enable SD2 regulator. + i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_SD2_CFG, (1 << MAX77620_SD_SR_SHIFT) | + (MAX77620_POWER_MODE_NORMAL << MAX77620_SD_POWER_MODE_SHIFT) | + MAX77620_SD_CFG1_FSRADE_SD_ENABLE); + } } void hw_init() From 8d49bc3c33889e2fb1d27a01bc285312daf75488 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 5 Jun 2024 01:35:05 +0300 Subject: [PATCH 196/308] bdk: hwinit: move LDO8 init in regulators init And also reorder it above I2C1 init (because of HOAG). --- bdk/soc/hw_init.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/bdk/soc/hw_init.c b/bdk/soc/hw_init.c index ef3060e..f3caa61 100644 --- a/bdk/soc/hw_init.c +++ b/bdk/soc/hw_init.c @@ -286,7 +286,7 @@ static void _config_se_brom() APB_MISC(APB_MISC_PP_STRAPPING_OPT_A) = (APB_MISC(APB_MISC_PP_STRAPPING_OPT_A) & 0xF0) | (7 << 10); } -static void _config_regulators(bool tegra_t210) +static void _config_regulators(bool tegra_t210, bool nx_hoag) { // Set RTC/AO domain to POR voltage. if (tegra_t210) @@ -345,6 +345,13 @@ static void _config_regulators(bool tegra_t210) i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_SD2_CFG, (1 << MAX77620_SD_SR_SHIFT) | (MAX77620_POWER_MODE_NORMAL << MAX77620_SD_POWER_MODE_SHIFT) | MAX77620_SD_CFG1_FSRADE_SD_ENABLE); + + // Enable LDO8 on HOAG as it also powers I2C1 IO pads. + if (nx_hoag) + { + max7762x_regulator_set_voltage(REGULATOR_LDO8, 2800000); + max7762x_regulator_enable(REGULATOR_LDO8, true); + } } } @@ -397,19 +404,12 @@ void hw_init() // Initialize I2C5, mandatory for PMIC. i2c_init(I2C_5); - // Enable LDO8 on HOAG as it also powers I2C1 IO pads. - if (nx_hoag) - { - max7762x_regulator_set_voltage(REGULATOR_LDO8, 2800000); - max7762x_regulator_enable(REGULATOR_LDO8, true); - } + // Initialize various regulators based on Erista/Mariko platform. + _config_regulators(tegra_t210, nx_hoag); // Initialize I2C1 for various power related devices. i2c_init(I2C_1); - // Initialize various regulators based on Erista/Mariko platform. - _config_regulators(tegra_t210); - _config_pmc_scratch(); // Missing from 4.x+ // Set BPMP/SCLK to PLLP_OUT (408MHz). From 14c482ddcea91bbacf95aaabdbb6f2e664fb80e7 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 5 Jun 2024 15:20:27 +0300 Subject: [PATCH 197/308] bdk: display: remove max77620 gpio 7 enable It is actually not used at all. So do not configure it to save power. --- bdk/display/di.c | 18 ++++++------------ bdk/soc/hw_init.c | 2 +- 2 files changed, 7 insertions(+), 13 deletions(-) diff --git a/bdk/display/di.c b/bdk/display/di.c index 4de7e7a..6965343 100644 --- a/bdk/display/di.c +++ b/bdk/display/di.c @@ -373,13 +373,10 @@ void display_init() // Get Chip ID. bool tegra_t210 = hw_get_chip_id() == GP_HIDREV_MAJOR_T210; - // Enable LCD DVDD. + // Enable DSI AVDD. max7762x_regulator_set_voltage(REGULATOR_LDO0, 1200000); max7762x_regulator_enable(REGULATOR_LDO0, true); - if (tegra_t210) - max77620_config_gpio(7, MAX77620_GPIO_OUTPUT_ENABLE); // T210: LD0 -> GPIO7 -> LCD. - // Enable Display Interface specific clocks. CLOCK(CLK_RST_CONTROLLER_RST_DEV_H_CLR) = BIT(CLK_H_MIPI_CAL) | BIT(CLK_H_DSI); CLOCK(CLK_RST_CONTROLLER_CLK_ENB_H_SET) = BIT(CLK_H_MIPI_CAL) | BIT(CLK_H_DSI); @@ -791,6 +788,10 @@ skip_panel_deinit: { gpio_write(GPIO_PORT_I, GPIO_PIN_1, GPIO_LOW); // LCD AVDD -5.4V disable. gpio_write(GPIO_PORT_I, GPIO_PIN_0, GPIO_LOW); // LCD AVDD +5.4V disable. + + // Make sure LCD PWM backlight pin is in PWM0 mode. + gpio_config(GPIO_PORT_V, GPIO_PIN_0, GPIO_MODE_SPIO); // Backlight PWM. + PINMUX_AUX(PINMUX_AUX_LCD_BL_PWM) = PINMUX_TRISTATE | PINMUX_PULL_DOWN | 1; // Set PWM0 mode. } usleep(10000); @@ -805,14 +806,7 @@ skip_panel_deinit: DSI_PAD_CONTROL_VS1_PDIO_CLK | DSI_PAD_CONTROL_VS1_PDIO(0xF); DSI(_DSIREG(DSI_POWER_CONTROL)) = 0; - // Switch LCD PWM backlight pin to special function mode and enable PWM0 mode. - if (!_nx_aula) - { - gpio_config(GPIO_PORT_V, GPIO_PIN_0, GPIO_MODE_SPIO); // Backlight PWM. - PINMUX_AUX(PINMUX_AUX_LCD_BL_PWM) = PINMUX_TRISTATE | PINMUX_PULL_DOWN | 1; // Set PWM0 mode. - } - - // Disable LCD DVDD. + // Disable DSI AVDD. max7762x_regulator_enable(REGULATOR_LDO0, false); } diff --git a/bdk/soc/hw_init.c b/bdk/soc/hw_init.c index f3caa61..7135d6a 100644 --- a/bdk/soc/hw_init.c +++ b/bdk/soc/hw_init.c @@ -300,7 +300,7 @@ static void _config_regulators(bool tegra_t210, bool nx_hoag) gpio_write(GPIO_PORT_E, GPIO_PIN_4, GPIO_LOW); sd_power_cycle_time_start = get_tmr_ms(); - // Disable LCD DVDD to make sure it's in a reset state. + // Disable DSI AVDD to make sure it's in a reset state. max7762x_regulator_enable(REGULATOR_LDO0, false); i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_CNFGBBC, MAX77620_CNFGBBC_RESISTOR_1K); From 4a24fe0b355f3feb531404e46d9563e092e08556 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 6 Jun 2024 06:27:30 +0300 Subject: [PATCH 198/308] bdk: display: add useful functions - Window disable - Window framebuffer address set - Window framebuffer move to new address --- bdk/display/di.c | 53 ++++++++++++++++++++++++++++++++++++++++------ bdk/display/di.h | 24 ++++++++++++++++----- bdk/display/di.inl | 5 ++--- 3 files changed, 68 insertions(+), 14 deletions(-) diff --git a/bdk/display/di.c b/bdk/display/di.c index 6965343..98192c6 100644 --- a/bdk/display/di.c +++ b/bdk/display/di.c @@ -902,6 +902,53 @@ u32 *display_init_window_d_console() return (u32 *)DISPLAY_A(_DIREG(DC_WINBUF_START_ADDR)); } +void display_window_disable(u32 window) +{ + // Select window C. + DISPLAY_A(_DIREG(DC_CMD_DISPLAY_WINDOW_HEADER)) = BIT(WINDOW_SELECT + window); + + // Disable window C. + DISPLAY_A(_DIREG(DC_WIN_WIN_OPTIONS)) = 0; + + // Arm and activate changes. + DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_UPDATE | BIT(WIN_UPDATE + window); + DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_ACT_REQ | BIT(WIN_ACT_REQ + window); +} + +void display_set_framebuffer(u32 window, void *fb) +{ + // Select window. + DISPLAY_A(_DIREG(DC_CMD_DISPLAY_WINDOW_HEADER)) = BIT(WINDOW_SELECT + window); + + // Set new fb address. + DISPLAY_A(_DIREG(DC_WINBUF_START_ADDR)) = (u32)fb; + + // Arm and activate changes. + DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_UPDATE | BIT(WIN_UPDATE + window); + DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_ACT_REQ | BIT(WIN_ACT_REQ + window); +} + +void display_move_framebuffer(u32 window, void *fb) +{ + // Select window. + DISPLAY_A(_DIREG(DC_CMD_DISPLAY_WINDOW_HEADER)) = BIT(WINDOW_SELECT + window); + + // Get current framebuffer address. + void *fb_curr = (void *)DISPLAY_A(_DIREG(DC_WINBUF_START_ADDR)); + u32 win_size = DISPLAY_A(_DIREG(DC_WIN_PRESCALED_SIZE)); + win_size = (win_size & 0x7FFF) * ((win_size >> 16) & 0x1FFF); + + // Copy fb over. + memcpy(fb, fb_curr, win_size); + + // Set new fb address. + DISPLAY_A(_DIREG(DC_WINBUF_START_ADDR)) = (u32)fb; + + // Arm and activate changes. + DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_UPDATE | BIT(WIN_UPDATE + window); + DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_ACT_REQ | BIT(WIN_ACT_REQ + window); +} + void display_window_d_console_enable() { // Only update active registers on vsync. @@ -935,9 +982,6 @@ void display_window_d_console_enable() // Arm and activate changes. DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_UPDATE | WIN_D_UPDATE; DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_ACT_REQ | WIN_D_ACT_REQ; - - // Re-select window A. - DISPLAY_A(_DIREG(DC_CMD_DISPLAY_WINDOW_HEADER)) = WINDOW_A_SELECT; } void display_window_d_console_disable() @@ -964,9 +1008,6 @@ void display_window_d_console_disable() // Arm and activate changes. DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_UPDATE | WIN_D_UPDATE; DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_ACT_REQ | WIN_D_ACT_REQ; - - // Re-select window A. - DISPLAY_A(_DIREG(DC_CMD_DISPLAY_WINDOW_HEADER)) = WINDOW_A_SELECT; } void display_cursor_init(void *crs_fb, u32 size) diff --git a/bdk/display/di.h b/bdk/display/di.h index fc77650..a44e730 100644 --- a/bdk/display/di.h +++ b/bdk/display/di.h @@ -24,6 +24,11 @@ #define DSI_VIDEO_DISABLED 0 #define DSI_VIDEO_ENABLED 1 +#define WINDOW_A 0 +#define WINDOW_B 1 +#define WINDOW_C 2 +#define WINDOW_D 3 + /*! Display registers. */ #define _DIREG(reg) ((reg) * 4) @@ -87,12 +92,14 @@ #define DC_CMD_STATE_CONTROL 0x41 #define GENERAL_ACT_REQ BIT(0) +#define WIN_ACT_REQ 1 #define WIN_A_ACT_REQ BIT(1) #define WIN_B_ACT_REQ BIT(2) #define WIN_C_ACT_REQ BIT(3) #define WIN_D_ACT_REQ BIT(4) #define CURSOR_ACT_REQ BIT(7) #define GENERAL_UPDATE BIT(8) +#define WIN_UPDATE 9 #define WIN_A_UPDATE BIT(9) #define WIN_B_UPDATE BIT(10) #define WIN_C_UPDATE BIT(11) @@ -101,6 +108,7 @@ #define NC_HOST_TRIG BIT(24) #define DC_CMD_DISPLAY_WINDOW_HEADER 0x42 +#define WINDOW_SELECT 4 #define WINDOW_A_SELECT BIT(4) #define WINDOW_B_SELECT BIT(5) #define WINDOW_C_SELECT BIT(6) @@ -860,6 +868,12 @@ void display_wait_interrupt(u32 intr); u16 display_get_decoded_panel_id(); void display_set_decoded_panel_id(u32 id); +/*! MIPI DCS register management */ +int display_dsi_read(u8 cmd, u32 len, void *data); +int display_dsi_vblank_read(u8 cmd, u32 len, void *data); +void display_dsi_write(u8 cmd, u32 len, void *data); +void display_dsi_vblank_write(u8 cmd, u32 len, void *data); + /*! Show one single color on the display. */ void display_color_screen(u32 color); @@ -874,6 +888,11 @@ u32 *display_init_window_a_pitch_inv(); u32 *display_init_window_a_block(); u32 *display_init_window_d_console(); +void display_window_disable(u32 window); + +void display_set_framebuffer(u32 window, void *fb); +void display_move_framebuffer(u32 window, void *fb); + void display_window_d_console_enable(); void display_window_d_console_disable(); @@ -881,9 +900,4 @@ void display_cursor_init(void *crs_fb, u32 size); void display_cursor_set_pos(u32 x, u32 y); void display_cursor_deinit(); -int display_dsi_read(u8 cmd, u32 len, void *data); -int display_dsi_vblank_read(u8 cmd, u32 len, void *data); -void display_dsi_write(u8 cmd, u32 len, void *data); -void display_dsi_vblank_write(u8 cmd, u32 len, void *data); - #endif diff --git a/bdk/display/di.inl b/bdk/display/di.inl index 415b0d7..a19a622 100644 --- a/bdk/display/di.inl +++ b/bdk/display/di.inl @@ -304,7 +304,7 @@ static const reg_cfg_t _di_dc_video_enable_config[] = { {DC_CMD_GENERAL_INCR_SYNCPT, SYNCPT_GENERAL_COND(COND_REG_WR_SAFE) | SYNCPT_GENERAL_INDX(1)}, {DC_CMD_STATE_CONTROL, GENERAL_UPDATE}, {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ}, - {DC_DISP_DISP_CLOCK_CONTROL, PIXEL_CLK_DIVIDER_PCD1 | SHIFT_CLK_DIVIDER(4)}, + {DC_DISP_DISP_CLOCK_CONTROL, PIXEL_CLK_DIVIDER_PCD1 | SHIFT_CLK_DIVIDER(4)}, // 4: div3. }; // Display A disable config. @@ -338,7 +338,7 @@ static const reg_cfg_t _di_dsi_timing_deinit_config[] = { {DSI_PHY_TIMING_1, 0x40A0E05}, {DSI_PHY_TIMING_2, 0x30118}, {DSI_BTA_TIMING, 0x190A14}, - {DSI_TIMEOUT_0, DSI_TIMEOUT_LRX(0x2000) | DSI_TIMEOUT_HTX(0xFFFF) }, + {DSI_TIMEOUT_0, DSI_TIMEOUT_LRX(0x2000) | DSI_TIMEOUT_HTX(0xFFFF)}, {DSI_TIMEOUT_1, DSI_TIMEOUT_PR(0x1343) | DSI_TIMEOUT_TA(0x2000)}, {DSI_TO_TALLY, 0}, {DSI_HOST_CONTROL, DSI_HOST_CONTROL_CRC_RESET | DSI_HOST_CONTROL_TX_TRIG_HOST | DSI_HOST_CONTROL_CS | DSI_HOST_CONTROL_ECC}, @@ -551,5 +551,4 @@ static const reg_cfg_t _di_winD_log[] = { {DC_WINBUF_BLEND_MATCH_SELECT, WIN_BLEND_FACT_SRC_COLOR_MATCH_SEL_K1 | WIN_BLEND_FACT_DST_COLOR_MATCH_SEL_NEG_K1}, {DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_D_UPDATE}, {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_D_ACT_REQ}, - {DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, }; From a34206df5b3f130d4786dd386f06eadac72b2951 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 7 Jun 2024 17:09:30 +0300 Subject: [PATCH 199/308] bdk: sdmmc: small changes - Log warning for comp pad calibration timeout - Rename some func/defines - Increase SDMMC1 power disable wait to 10ms No real perceived functionality change. --- bdk/storage/sd_def.h | 2 +- bdk/storage/sdmmc.c | 2 +- bdk/storage/sdmmc_driver.c | 17 ++++++++++------- 3 files changed, 12 insertions(+), 9 deletions(-) diff --git a/bdk/storage/sd_def.h b/bdk/storage/sd_def.h index 1316b50..14782bf 100644 --- a/bdk/storage/sd_def.h +++ b/bdk/storage/sd_def.h @@ -46,7 +46,7 @@ /* OCR bit definitions */ #define SD_OCR_VDD_18 (1U << 7) /* VDD voltage 1.8 */ -#define SD_VHD_27_36 (1U << 8) /* VDD voltage 2.7 ~ 3.6 */ +#define SD_VHS_27_36 (1U << 8) /* VDD voltage 2.7 ~ 3.6 */ #define SD_OCR_VDD_32_33 (1U << 20) /* VDD voltage 3.2 ~ 3.3 */ #define SD_OCR_S18R (1U << 24) /* 1.8V switching request */ #define SD_ROCR_S18A SD_OCR_S18R /* 1.8V switching accepted by card */ diff --git a/bdk/storage/sdmmc.c b/bdk/storage/sdmmc.c index 57eba39..9403a33 100644 --- a/bdk/storage/sdmmc.c +++ b/bdk/storage/sdmmc.c @@ -910,7 +910,7 @@ void _sd_storage_debug_print_ssr(u8 *raw_ssr) static int _sd_storage_send_if_cond(sdmmc_storage_t *storage, bool *is_sdsc) { sdmmc_cmd_t cmdbuf; - u16 vhd_pattern = SD_VHD_27_36 | 0xAA; + u16 vhd_pattern = SD_VHS_27_36 | 0xAA; sdmmc_init_cmd(&cmdbuf, SD_SEND_IF_COND, vhd_pattern, SDMMC_RSP_TYPE_5, 0); if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, NULL, NULL)) { diff --git a/bdk/storage/sdmmc_driver.c b/bdk/storage/sdmmc_driver.c index 96cd7ba..b2461df 100644 --- a/bdk/storage/sdmmc_driver.c +++ b/bdk/storage/sdmmc_driver.c @@ -222,6 +222,9 @@ static void _sdmmc_autocal_execute(sdmmc_t *sdmmc, u32 power) { sdmmc->regs->autocalcfg &= ~SDHCI_TEGRA_AUTOCAL_ENABLE; _sdmmc_pad_config_fallback(sdmmc, power); +#ifdef ERROR_EXTRA_PRINTING + EPRINTFARGS("SDMMC%d: Comp Pad cal timeout!", sdmmc->id + 1); +#endif } // Disable E_INPUT (SD) or enable E_PWRD (eMMC) to conserve power. @@ -403,7 +406,7 @@ static void _sdmmc_card_clock_enable(sdmmc_t *sdmmc) sdmmc->card_clock_enabled = 1; } -static void _sdmmc_sd_clock_disable(sdmmc_t *sdmmc) +static void _sdmmc_card_clock_disable(sdmmc_t *sdmmc) { sdmmc->card_clock_enabled = 0; sdmmc->regs->clkcon &= ~SDHCI_CLOCK_CARD_EN; @@ -934,7 +937,7 @@ static u32 _sdmmc_check_mask_interrupt(sdmmc_t *sdmmc, u16 *pout, u16 mask) if (norintsts & SDHCI_INT_ERROR) { #ifdef ERROR_EXTRA_PRINTING - EPRINTFARGS("SDMMC%d: norintsts %08X, errintsts %08X\n", sdmmc->id + 1, norintsts, errintsts); + EPRINTFARGS("SDMMC%d: norintsts %08X, errintsts %08X", sdmmc->id + 1, norintsts, errintsts); #endif sdmmc->regs->errintsts = errintsts; return SDMMC_MASKINT_ERROR; @@ -1403,7 +1406,7 @@ int sdmmc_init(sdmmc_t *sdmmc, u32 id, u32 power, u32 bus_width, u32 type) // Disable clock if enabled. if (clock_sdmmc_is_not_reset_and_enabled(id)) { - _sdmmc_sd_clock_disable(sdmmc); + _sdmmc_card_clock_disable(sdmmc); _sdmmc_commit_changes(sdmmc); } @@ -1456,16 +1459,16 @@ void sdmmc1_disable_power() // T210B01 WAR: Set pads to discharge state. _sdmmc_config_sdmmc1_pads(true); - // Disable SD card IO power regulator. + // Disable SD card IO power. max7762x_regulator_enable(REGULATOR_LDO2, false); usleep(4000); - // Disable SD card IO power pin. + // Disable SD card power. gpio_write(GPIO_PORT_E, GPIO_PIN_4, GPIO_LOW); // T210/T210B01 WAR: Set start timer for IO and Controller power discharge. sd_power_cycle_time_start = get_tmr_ms(); - usleep(1000); // To power cycle, min 1ms without power is needed. + usleep(10000); // To power cycle, min 1ms without power is needed. // Disable SDMMC1 controller power. PMC(APBDEV_PMC_NO_IOPOWER) |= PMC_NO_IOPOWER_SDMMC1_IO_EN; @@ -1486,7 +1489,7 @@ void sdmmc_end(sdmmc_t *sdmmc) { if (!sdmmc->clock_stopped) { - _sdmmc_sd_clock_disable(sdmmc); + _sdmmc_card_clock_disable(sdmmc); // Disable SDMMC power. _sdmmc_set_io_power(sdmmc, SDMMC_POWER_OFF); _sdmmc_commit_changes(sdmmc); From 8b4f776c9dbad15dc5b6849216611db74cd663c9 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 7 Jun 2024 17:14:05 +0300 Subject: [PATCH 200/308] bdk: fan: rename functions and add set from temp - Rename functions to proper style (drivername_) - Add fan_set_from_temp for managing the fan with passed SoC temperature. --- bdk/soc/hw_init.c | 2 +- bdk/thermal/fan.c | 16 ++++++++++++++-- bdk/thermal/fan.h | 10 ++++++---- 3 files changed, 21 insertions(+), 7 deletions(-) diff --git a/bdk/soc/hw_init.c b/bdk/soc/hw_init.c index 7135d6a..3cdd90f 100644 --- a/bdk/soc/hw_init.c +++ b/bdk/soc/hw_init.c @@ -459,7 +459,7 @@ void hw_deinit(bool coreboot, u32 bl_magic) // Disable temperature sensor, touchscreen, 5V regulators, Joy-Con and VIC. vic_end(); tmp451_end(); - set_fan_duty(0); + fan_set_duty(0); touch_power_off(); jc_deinit(); regulator_5v_disable(REGULATOR_5V_ALL); diff --git a/bdk/thermal/fan.c b/bdk/thermal/fan.c index 5f52118..22bddcc 100644 --- a/bdk/thermal/fan.c +++ b/bdk/thermal/fan.c @@ -27,7 +27,7 @@ #include #include -void set_fan_duty(u32 duty) +void fan_set_duty(u32 duty) { static bool fan_init = false; static u16 curr_duty = -1; @@ -83,7 +83,7 @@ void set_fan_duty(u32 duty) } } -void get_fan_speed(u32 *duty, u32 *rpm) +void fan_get_speed(u32 *duty, u32 *rpm) { if (rpm) { @@ -114,3 +114,15 @@ void get_fan_speed(u32 *duty, u32 *rpm) if (duty) *duty = 236 - ((PWM(PWM_CONTROLLER_PWM_CSR_1) >> 16) & 0xFF); } + +void fan_set_from_temp(u32 temp) +{ + if (temp >= 52) + fan_set_duty(102); + else if (temp >= 47) + fan_set_duty(76); + else if (temp >= 42) + fan_set_duty(51); + else if (temp <= 39) + fan_set_duty(0); +} diff --git a/bdk/thermal/fan.h b/bdk/thermal/fan.h index e827975..3c70b30 100644 --- a/bdk/thermal/fan.h +++ b/bdk/thermal/fan.h @@ -1,7 +1,7 @@ /* * Fan driver for Nintendo Switch * - * Copyright (c) 2018 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -22,8 +22,10 @@ #include // Disable: 0 (0 RPM), min duty: 1 (960 RPM), max duty 235 (11000 RPM). -void set_fan_duty(u32 duty); -// Passing NULL ptr on either of the two, disables parsing of it. -void get_fan_speed(u32 *duty, u32 *rpm); +void fan_set_duty(u32 duty); +// Passing NULL ptr on either of the two, disables results. +void fan_get_speed(u32 *duty, u32 *rpm); + +void fan_set_from_temp(u32 temp); #endif /* __FAN_H_ */ From 11262c2112946b22ce6f1b10d9313c26eb1214b2 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 7 Jun 2024 17:15:27 +0300 Subject: [PATCH 201/308] nyx: adhere to fan driver changes --- nyx/nyx_gui/frontend/gui.c | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui.c b/nyx/nyx_gui/frontend/gui.c index 4ded279..9eb4dd5 100644 --- a/nyx/nyx_gui/frontend/gui.c +++ b/nyx/nyx_gui/frontend/gui.c @@ -1319,15 +1319,8 @@ static void _update_status_bar(void *params) max17050_get_property(MAX17050_Current, &batt_curr); // Enable fan if more than 41 oC. - u32 soc_temp_dec = (soc_temp >> 8); - if (soc_temp_dec > 51) - set_fan_duty(102); - else if (soc_temp_dec > 46) - set_fan_duty(76); - else if (soc_temp_dec > 41) - set_fan_duty(51); - else if (soc_temp_dec < 40) - set_fan_duty(0); + u32 soc_temp_dec = soc_temp >> 8; + fan_set_from_temp(soc_temp_dec); if (!label) label = (char *)malloc(512); From 85eb5489fe1626a3a11f54857c9aad3b011bf9af Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sat, 8 Jun 2024 12:16:07 +0300 Subject: [PATCH 202/308] bdk: pmc: rename io/det power defines --- bdk/power/regulator_5v.c | 10 +++++----- bdk/soc/hw_init.c | 2 +- bdk/soc/pmc.h | 16 +++++++++------- bdk/storage/sdmmc_driver.c | 25 ++++++++----------------- 4 files changed, 23 insertions(+), 30 deletions(-) diff --git a/bdk/power/regulator_5v.c b/bdk/power/regulator_5v.c index 557dae9..55f81f7 100644 --- a/bdk/power/regulator_5v.c +++ b/bdk/power/regulator_5v.c @@ -32,24 +32,24 @@ void regulator_5v_enable(u8 dev) // The power supply selection from battery or USB is automatic. if (!reg_5v_dev) { - // Fan and Rail power from battery 5V regulator. + // Fan and Rail power from battery 5V regulator EN. PINMUX_AUX(PINMUX_AUX_SATA_LED_ACTIVE) = 1; gpio_direction_output(GPIO_PORT_A, GPIO_PIN_5, GPIO_HIGH); // Only Icosa has USB 5V VBUS rails. if (tegra_t210) { - // Fan and Rail power from USB 5V VBUS. + // Fan and Rail power from USB 5V VBUS EN. PINMUX_AUX(PINMUX_AUX_USB_VBUS_EN0) = PINMUX_LPDR | 1; gpio_direction_output(GPIO_PORT_CC, GPIO_PIN_4, GPIO_LOW); } // Make sure GPIO IO power is enabled. - PMC(APBDEV_PMC_NO_IOPOWER) &= ~PMC_NO_IOPOWER_GPIO_IO_EN; + PMC(APBDEV_PMC_NO_IOPOWER) &= ~PMC_NO_IOPOWER_GPIO; (void)PMC(APBDEV_PMC_NO_IOPOWER); // Commit write. - // Override power detect for GPIO AO IO rails. - PMC(APBDEV_PMC_PWR_DET_VAL) &= ~PMC_PWR_DET_GPIO_IO_EN; + // Inform GPIO IO pads that we switched to 1.8V. + PMC(APBDEV_PMC_PWR_DET_VAL) &= ~PMC_PWR_DET_33V_GPIO; (void)PMC(APBDEV_PMC_PWR_DET_VAL); // Commit write. usb_src = false; diff --git a/bdk/soc/hw_init.c b/bdk/soc/hw_init.c index 3cdd90f..cd2ece9 100644 --- a/bdk/soc/hw_init.c +++ b/bdk/soc/hw_init.c @@ -494,7 +494,7 @@ void hw_deinit(bool coreboot, u32 bl_magic) gpio_config(GPIO_PORT_D, GPIO_PIN_1, GPIO_MODE_SPIO); // Reinstate SD controller power. - PMC(APBDEV_PMC_NO_IOPOWER) &= ~(PMC_NO_IOPOWER_SDMMC1_IO_EN); + PMC(APBDEV_PMC_NO_IOPOWER) &= ~PMC_NO_IOPOWER_SDMMC1; } // Seamless display or display power off. diff --git a/bdk/soc/pmc.h b/bdk/soc/pmc.h index 2bbc598..07d7a52 100644 --- a/bdk/soc/pmc.h +++ b/bdk/soc/pmc.h @@ -1,7 +1,7 @@ /* * Copyright (c) 2018 naehrwert * Copyright (c) 2018 st4rk - * Copyright (c) 2018-2022 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -39,10 +39,12 @@ #define APBDEV_PMC_PWRGATE_TOGGLE 0x30 #define APBDEV_PMC_PWRGATE_STATUS 0x38 #define APBDEV_PMC_NO_IOPOWER 0x44 -#define PMC_NO_IOPOWER_SDMMC1_IO_EN BIT(12) -#define PMC_NO_IOPOWER_SDMMC4_IO_EN BIT(14) +#define PMC_NO_IOPOWER_MEM BIT(7) +#define PMC_NO_IOPOWER_SDMMC1 BIT(12) +#define PMC_NO_IOPOWER_SDMMC4 BIT(14) +#define PMC_NO_IOPOWER_MEM_COMP BIT(16) #define PMC_NO_IOPOWER_AUDIO_HV BIT(18) -#define PMC_NO_IOPOWER_GPIO_IO_EN BIT(21) +#define PMC_NO_IOPOWER_GPIO BIT(21) #define APBDEV_PMC_SCRATCH0 0x50 #define PMC_SCRATCH0_MODE_WARMBOOT BIT(0) #define PMC_SCRATCH0_MODE_RCM BIT(1) @@ -61,9 +63,9 @@ #define APBDEV_PMC_SECURE_SCRATCH4 0xC0 #define APBDEV_PMC_SECURE_SCRATCH5 0xC4 #define APBDEV_PMC_PWR_DET_VAL 0xE4 -#define PMC_PWR_DET_SDMMC1_IO_EN BIT(12) -#define PMC_PWR_DET_AUDIO_HV BIT(18) -#define PMC_PWR_DET_GPIO_IO_EN BIT(21) +#define PMC_PWR_DET_33V_SDMMC1 BIT(12) +#define PMC_PWR_DET_33V_AUDIO_HV BIT(18) +#define PMC_PWR_DET_33V_GPIO BIT(21) #define APBDEV_PMC_DDR_PWR 0xE8 #define APBDEV_PMC_USB_AO 0xF0 #define APBDEV_PMC_CRYPTO_OP 0xF4 diff --git a/bdk/storage/sdmmc_driver.c b/bdk/storage/sdmmc_driver.c index b2461df..ea35ab6 100644 --- a/bdk/storage/sdmmc_driver.c +++ b/bdk/storage/sdmmc_driver.c @@ -1276,16 +1276,7 @@ static int _sdmmc_config_sdmmc1(bool t210b01) if (!sdmmc_get_sd_inserted()) return 0; - /* - * Pinmux config: - * DRV_TYPE = DRIVE_2X (for 33 Ohm driver) - * E_SCHMT = ENABLE (for 1.8V), DISABLE (for 3.3V) - * E_INPUT = ENABLE - * TRISTATE = PASSTHROUGH - * APB_MISC_GP_SDMMCx_CLK_LPBK_CONTROL = SDMMCx_CLK_PAD_E_LPBK for CLK - */ - - // Enable deep loopback for SDMMC1 CLK pad. + // Enable deep loopback for SDMMC1 CLK pad so reads work. APB_MISC(APB_MISC_GP_SDMMC1_CLK_LPBK_CONTROL) = 1; // Configure SDMMC1 CLK pinmux, based on state and SoC type. @@ -1305,18 +1296,18 @@ static int _sdmmc_config_sdmmc1(bool t210b01) _sdmmc_config_sdmmc1_schmitt(); // Make sure the SDMMC1 controller is powered. - PMC(APBDEV_PMC_NO_IOPOWER) |= PMC_NO_IOPOWER_SDMMC1_IO_EN; + PMC(APBDEV_PMC_NO_IOPOWER) |= PMC_NO_IOPOWER_SDMMC1; usleep(1000); - PMC(APBDEV_PMC_NO_IOPOWER) &= ~(PMC_NO_IOPOWER_SDMMC1_IO_EN); + PMC(APBDEV_PMC_NO_IOPOWER) &= ~PMC_NO_IOPOWER_SDMMC1; (void)PMC(APBDEV_PMC_NO_IOPOWER); // Commit write. - // Set enable SD card power. + // Enable SD card power. Powers LDO2 also. PINMUX_AUX(PINMUX_AUX_DMIC3_CLK) = PINMUX_PULL_DOWN | 2; gpio_direction_output(GPIO_PORT_E, GPIO_PIN_4, GPIO_HIGH); usleep(10000); // Inform IO pads that voltage is gonna be 3.3V. - PMC(APBDEV_PMC_PWR_DET_VAL) |= PMC_PWR_DET_SDMMC1_IO_EN; + PMC(APBDEV_PMC_PWR_DET_VAL) |= PMC_PWR_DET_33V_SDMMC1; (void)PMC(APBDEV_PMC_PWR_DET_VAL); // Commit write. // Enable SD card IO power. @@ -1471,11 +1462,11 @@ void sdmmc1_disable_power() usleep(10000); // To power cycle, min 1ms without power is needed. // Disable SDMMC1 controller power. - PMC(APBDEV_PMC_NO_IOPOWER) |= PMC_NO_IOPOWER_SDMMC1_IO_EN; + PMC(APBDEV_PMC_NO_IOPOWER) |= PMC_NO_IOPOWER_SDMMC1; (void)PMC(APBDEV_PMC_NO_IOPOWER); // Commit write. // Inform IO pads that next voltage might be 3.3V. - PMC(APBDEV_PMC_PWR_DET_VAL) |= PMC_PWR_DET_SDMMC1_IO_EN; + PMC(APBDEV_PMC_PWR_DET_VAL) |= PMC_PWR_DET_33V_SDMMC1; (void)PMC(APBDEV_PMC_PWR_DET_VAL); // Commit write. // T210B01 WAR: Restore pads to reset state. @@ -1550,7 +1541,7 @@ int sdmmc_enable_low_voltage(sdmmc_t *sdmmc) usleep(150); // Inform IO pads that we switched to 1.8V. - PMC(APBDEV_PMC_PWR_DET_VAL) &= ~(PMC_PWR_DET_SDMMC1_IO_EN); + PMC(APBDEV_PMC_PWR_DET_VAL) &= ~PMC_PWR_DET_33V_SDMMC1; (void)PMC(APBDEV_PMC_PWR_DET_VAL); // Commit write. // Enable schmitt trigger for better duty cycle and low jitter clock. From 655209bedc26ec30b65889bc1b0bc48e0ba89809 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sat, 8 Jun 2024 12:19:24 +0300 Subject: [PATCH 203/308] bdk: sdram: keep sdmmc1 no iopower state --- bdk/mem/sdram.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/bdk/mem/sdram.c b/bdk/mem/sdram.c index 49fb48e..44d18e7 100644 --- a/bdk/mem/sdram.c +++ b/bdk/mem/sdram.c @@ -1504,10 +1504,10 @@ static void _sdram_init_t210() PMC(APBDEV_PMC_DDR_PWR) = PMC(APBDEV_PMC_DDR_PWR); // Normally params->pmc_ddr_pwr. // Turn on MEM IO Power. - PMC(APBDEV_PMC_NO_IOPOWER) = params->pmc_no_io_power; - PMC(APBDEV_PMC_REG_SHORT) = params->pmc_reg_short; + PMC(APBDEV_PMC_NO_IOPOWER) &= PMC_NO_IOPOWER_SDMMC1; // Only keep SDMMC1 state. (Was params->pmc_no_io_power). + PMC(APBDEV_PMC_REG_SHORT) = params->pmc_reg_short; - PMC(APBDEV_PMC_DDR_CNTRL) = params->pmc_ddr_ctrl; + PMC(APBDEV_PMC_DDR_CNTRL) = params->pmc_ddr_ctrl; // Patch 1 using BCT spare variables if (params->emc_bct_spare0) @@ -1527,10 +1527,10 @@ static void _sdram_init_t210b01() usleep(params->pmc_vddp_sel_wait); // Turn on MEM IO Power. - PMC(APBDEV_PMC_NO_IOPOWER) = params->pmc_no_io_power; - PMC(APBDEV_PMC_REG_SHORT) = params->pmc_reg_short; + PMC(APBDEV_PMC_NO_IOPOWER) &= PMC_NO_IOPOWER_SDMMC1; // Only keep SDMMC1 state. (Was params->pmc_no_io_power). + PMC(APBDEV_PMC_REG_SHORT) = params->pmc_reg_short; - PMC(APBDEV_PMC_DDR_CNTRL) = params->pmc_ddr_ctrl; + PMC(APBDEV_PMC_DDR_CNTRL) = params->pmc_ddr_ctrl; // Patch 1 using BCT spare variables if (params->emc_bct_spare0) From 054c68f251ef2630647fdf0771bfe8e6123f5c35 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sat, 8 Jun 2024 12:21:15 +0300 Subject: [PATCH 204/308] bdk: hwinit: power on all relevant rails Since that doesn't happen via sdram init anymore, do it in hwinit. It only matters if we came out of warmboot. --- bdk/soc/hw_init.c | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/bdk/soc/hw_init.c b/bdk/soc/hw_init.c index cd2ece9..6142b13 100644 --- a/bdk/soc/hw_init.c +++ b/bdk/soc/hw_init.c @@ -295,22 +295,27 @@ static void _config_regulators(bool tegra_t210, bool nx_hoag) // Disable low battery shutdown monitor. max77620_low_battery_monitor_config(false); - // Disable SDMMC1 IO/Core power. + // Make sure SDMMC1 IO/Core are powered off. max7762x_regulator_enable(REGULATOR_LDO2, false); gpio_write(GPIO_PORT_E, GPIO_PIN_4, GPIO_LOW); sd_power_cycle_time_start = get_tmr_ms(); + // Power on all relevant rails in case we came out of warmboot. Only keep MEM/MEM_COMP and SDMMC1 states. + PMC(APBDEV_PMC_NO_IOPOWER) &= PMC_NO_IOPOWER_MEM_COMP | PMC_NO_IOPOWER_SDMMC1 | PMC_NO_IOPOWER_MEM; + // Disable DSI AVDD to make sure it's in a reset state. max7762x_regulator_enable(REGULATOR_LDO0, false); + // Disable backup battery charger. i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_CNFGBBC, MAX77620_CNFGBBC_RESISTOR_1K); - i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_ONOFFCNFG1, - MAX77620_ONOFFCNFG1_RSVD | (3 << MAX77620_ONOFFCNFG1_MRT_SHIFT)); // PWR delay for forced shutdown off. + + // Set PWR delay for forced shutdown off to 6s. + i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_ONOFFCNFG1, MAX77620_ONOFFCNFG1_RSVD | (3 << MAX77620_ONOFFCNFG1_MRT_SHIFT)); if (tegra_t210) { // Configure all Flexible Power Sequencers for MAX77620. - i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_FPS_CFG0, (7 << MAX77620_FPS_TIME_PERIOD_SHIFT)); + i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_FPS_CFG0, (7 << MAX77620_FPS_TIME_PERIOD_SHIFT) | (0 << MAX77620_FPS_EN_SRC_SHIFT)); i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_FPS_CFG1, (7 << MAX77620_FPS_TIME_PERIOD_SHIFT) | (1 << MAX77620_FPS_EN_SRC_SHIFT)); i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_FPS_CFG2, (7 << MAX77620_FPS_TIME_PERIOD_SHIFT)); max77620_regulator_config_fps(REGULATOR_LDO4); @@ -319,13 +324,13 @@ static void _config_regulators(bool tegra_t210, bool nx_hoag) max77620_regulator_config_fps(REGULATOR_SD1); max77620_regulator_config_fps(REGULATOR_SD3); - i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_FPS_GPIO3, - (4 << MAX77620_FPS_TIME_PERIOD_SHIFT) | (2 << MAX77620_FPS_PD_PERIOD_SHIFT)); // 3.x+ + // Set GPIO3 to FPS0 for SYS 3V3 EN. Enabled when FPS0 is enabled. + i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_FPS_GPIO3, (4 << MAX77620_FPS_PU_PERIOD_SHIFT) | (2 << MAX77620_FPS_PD_PERIOD_SHIFT)); // Set vdd_core voltage to 1.125V. max7762x_regulator_set_voltage(REGULATOR_SD0, 1125000); - // Fix CPU/GPU after L4T warmboot. + // Power down CPU/GPU regulators after L4T warmboot. max77620_config_gpio(5, MAX77620_GPIO_OUTPUT_DISABLE); max77620_config_gpio(6, MAX77620_GPIO_OUTPUT_DISABLE); From 48334779a5ec5a40db96346275ca2382ffe8be22 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sat, 8 Jun 2024 17:41:11 +0300 Subject: [PATCH 205/308] bdk: sdmmc: error reporting changes - Correct transfer error message - Add debug print for deinit --- bdk/storage/sdmmc.c | 2 ++ bdk/storage/sdmmc_driver.c | 5 ++--- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/bdk/storage/sdmmc.c b/bdk/storage/sdmmc.c index 9403a33..f538bcc 100644 --- a/bdk/storage/sdmmc.c +++ b/bdk/storage/sdmmc.c @@ -233,6 +233,8 @@ static int _sdmmc_storage_readwrite_ex(sdmmc_storage_t *storage, u32 *blkcnt_out int sdmmc_storage_end(sdmmc_storage_t *storage) { + DPRINTF("[SDMMC%d] end\n", storage->sdmmc->id); + if (!_sdmmc_storage_go_idle_state(storage)) return 0; diff --git a/bdk/storage/sdmmc_driver.c b/bdk/storage/sdmmc_driver.c index ea35ab6..3697692 100644 --- a/bdk/storage/sdmmc_driver.c +++ b/bdk/storage/sdmmc_driver.c @@ -1155,7 +1155,7 @@ static int _sdmmc_execute_cmd_inner(sdmmc_t *sdmmc, sdmmc_cmd_t *cmd, sdmmc_req_ int result = _sdmmc_wait_response(sdmmc); #ifdef ERROR_EXTRA_PRINTING if (!result) - EPRINTFARGS("SDMMC%d: Transfer timeout!", sdmmc->id + 1); + EPRINTFARGS("SDMMC%d: Transfer error!", sdmmc->id + 1); #endif DPRINTF("rsp(%d): %08X, %08X, %08X, %08X\n", result, sdmmc->regs->rspreg0, sdmmc->regs->rspreg1, sdmmc->regs->rspreg2, sdmmc->regs->rspreg3); @@ -1404,12 +1404,11 @@ int sdmmc_init(sdmmc_t *sdmmc, u32 id, u32 power, u32 bus_width, u32 type) // Configure and enable selected clock. clock_sdmmc_get_card_clock_div(&clock, &divisor, type); clock_sdmmc_enable(id, clock); + sdmmc->clock_stopped = 0; // Make sure all sdmmc registers are reset. _sdmmc_reset_all(sdmmc); - sdmmc->clock_stopped = 0; - // Set default pad IO trimming configuration. sdmmc->regs->iospare |= BIT(19); // Enable 1 cycle delayed cmd_oen. sdmmc->regs->veniotrimctl &= ~BIT(2); // Set Band Gap VREG to supply DLL. From a37b5c7841c446fe640942ef0708589fce8deb68 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Mon, 10 Jun 2024 13:24:07 +0300 Subject: [PATCH 206/308] bdk: sdmmc: no need to raise power limit for HS25 --- bdk/storage/sdmmc.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/bdk/storage/sdmmc.c b/bdk/storage/sdmmc.c index f538bcc..7ae4159 100644 --- a/bdk/storage/sdmmc.c +++ b/bdk/storage/sdmmc.c @@ -1398,7 +1398,7 @@ static int _sd_storage_enable_uhs_low_volt(sdmmc_storage_t *storage, u32 type, u } // Try to raise the power limit to let the card perform better. - if (hs_type != UHS_SDR25_BUS_SPEED) + if (hs_type != UHS_SDR25_BUS_SPEED) // Not applicable for SDR12/SDR25. _sd_storage_set_power_limit(storage, fmodes.power_limit, buf); // Setup and set selected card and bus speed. @@ -1426,9 +1426,6 @@ static int _sd_storage_enable_hs_high_volt(sdmmc_storage_t *storage, u8 *buf) DPRINTF("[SD] access: %02X, power: %02X\n", fmodes.access_mode, fmodes.power_limit); - // Try to raise the power limit to let the card perform better. - _sd_storage_set_power_limit(storage, fmodes.power_limit, buf); - if (!(fmodes.access_mode & SD_MODE_HIGH_SPEED)) return 1; From 75a4a8ba1d1ff4cf72b6299224403db704c53db0 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Mon, 10 Jun 2024 13:37:28 +0300 Subject: [PATCH 207/308] bdk: sdmmc: remove higher power limits UHS-I Cards force a max of 1.44W even if higher modes are selected. This does not change functionality, so remove them as unused. --- bdk/storage/sdmmc.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/bdk/storage/sdmmc.c b/bdk/storage/sdmmc.c index 7ae4159..6fcdd5e 100644 --- a/bdk/storage/sdmmc.c +++ b/bdk/storage/sdmmc.c @@ -1134,17 +1134,20 @@ static void _sd_storage_set_power_limit(sdmmc_storage_t *storage, u16 power_limi u32 pwr = SD_SET_POWER_LIMIT_0_72; // If UHS-I only, anything above 1.44W defaults to 1.44W. + /* if (power_limit & SD_MAX_POWER_2_88) pwr = SD_SET_POWER_LIMIT_2_88; else if (power_limit & SD_MAX_POWER_2_16) pwr = SD_SET_POWER_LIMIT_2_16; - else if (power_limit & SD_MAX_POWER_1_44) + */ + if (power_limit & SD_MAX_POWER_1_44) pwr = SD_SET_POWER_LIMIT_1_44; _sd_storage_switch(storage, buf, SD_SWITCH_SET, SD_SWITCH_GRP_PWRLIM, pwr); switch ((buf[15] >> 4) & 0x0F) { + /* case SD_SET_POWER_LIMIT_2_88: DPRINTF("[SD] power limit raised to 2880 mW\n"); break; @@ -1152,7 +1155,7 @@ static void _sd_storage_set_power_limit(sdmmc_storage_t *storage, u16 power_limi case SD_SET_POWER_LIMIT_2_16: DPRINTF("[SD] power limit raised to 2160 mW\n"); break; - + */ case SD_SET_POWER_LIMIT_1_44: DPRINTF("[SD] power limit raised to 1440 mW\n"); break; From cf954b451c5b3ed824a127a8b85b179a9c97b8d3 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Mon, 10 Jun 2024 16:25:50 +0300 Subject: [PATCH 208/308] hekate: refactor of main - Remove unused function - Rename some functions and make them static - Reorder freeing of menu entries --- bootloader/main.c | 77 ++++++++++++----------------------------------- 1 file changed, 20 insertions(+), 57 deletions(-) diff --git a/bootloader/main.c b/bootloader/main.c index ddf4cbe..242ce44 100644 --- a/bootloader/main.c +++ b/bootloader/main.c @@ -46,44 +46,7 @@ const volatile ipl_ver_meta_t __attribute__((section ("._ipl_version"))) ipl_ver volatile nyx_storage_t *nyx_str = (nyx_storage_t *)NYX_STORAGE_ADDR; -void emmcsn_path_impl(char *path, char *sub_dir, char *filename, sdmmc_storage_t *storage) -{ - static char emmc_sn[9] = {0}; - - // Check if not valid S/N and get actual eMMC S/N. - if (!storage && !emmc_sn[0]) - { - if (!emmc_initialize(false)) - strcpy(emmc_sn, "00000000"); - else - { - itoa(emmc_storage.cid.serial, emmc_sn, 16); - emmc_end(); - } - } - else - itoa(storage->cid.serial, emmc_sn, 16); - - // Create main folder. - strcpy(path, "backup"); - f_mkdir(path); - - // Create eMMC S/N folder. - strcat(path, "/"); - strcat(path, emmc_sn); - f_mkdir(path); - - // Create sub folder if defined. Dir slash must be included. - strcat(path, sub_dir); // Can be a null-terminator. - if (strlen(sub_dir)) - f_mkdir(path); - - // Add filename. - strcat(path, "/"); - strcat(path, filename); // Can be a null-terminator. -} - -void check_power_off_from_hos() +static void _check_power_off_from_hos() { // Power off on alarm wakeup from HOS shutdown. For modchips/dongles. u8 hos_wakeup = i2c_recv_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_IRQTOP); @@ -294,20 +257,18 @@ out: static void _launch_payloads() { u8 max_entries = 61; + ment_t *ments = NULL; char *filelist = NULL; char *file_sec = NULL; char *dir = NULL; - ment_t *ments = (ment_t *)malloc(sizeof(ment_t) * (max_entries + 3)); - gfx_clear_grey(0x1B); gfx_con_setpos(0, 0); if (!sd_mount()) - { - free(ments); goto failed_sd_mount; - } + + ments = (ment_t *)malloc(sizeof(ment_t) * (max_entries + 3)); dir = (char *)malloc(256); memcpy(dir, "bootloader/payloads", 20); @@ -356,9 +317,6 @@ static void _launch_payloads() else EPRINTF("No payloads found."); - free(ments); - free(filelist); - if (file_sec) { memcpy(dir + strlen(dir), "/", 2); @@ -368,8 +326,10 @@ static void _launch_payloads() } failed_sd_mount: - sd_end(); free(dir); + free(ments); + free(filelist); + sd_end(); btn_wait(); } @@ -379,6 +339,7 @@ static void _launch_ini_list() u8 max_entries = 61; char *special_path = NULL; char *emummc_path = NULL; + ment_t *ments = NULL; ini_sec_t *cfg_sec = NULL; LIST_INIT(ini_list_sections); @@ -397,7 +358,7 @@ static void _launch_ini_list() } // Build configuration menu. - ment_t *ments = (ment_t *)malloc(sizeof(ment_t) * (max_entries + 3)); + ments = (ment_t *)malloc(sizeof(ment_t) * (max_entries + 3)); ments[0].type = MENT_BACK; ments[0].caption = "Back"; @@ -460,7 +421,6 @@ static void _launch_ini_list() } else EPRINTF("No extra configs found."); - free(ments); parse_failed: if (!cfg_sec) @@ -496,6 +456,7 @@ wrong_emupath: } out: + free(ments); btn_wait(); } @@ -504,9 +465,11 @@ static void _launch_config() { u8 max_entries = 61; char *special_path = NULL; - char *emummc_path = NULL; + char *emummc_path = NULL; + ment_t *ments = NULL; ini_sec_t *cfg_sec = NULL; + LIST_INIT(ini_sections); gfx_clear_grey(0x1B); @@ -522,7 +485,7 @@ static void _launch_config() ini_parse(&ini_sections, "bootloader/hekate_ipl.ini", false); // Build configuration menu. - ment_t *ments = (ment_t *)malloc(sizeof(ment_t) * (max_entries + 6)); + ments = (ment_t *)malloc(sizeof(ment_t) * (max_entries + 6)); ments[0].type = MENT_BACK; ments[0].caption = "Back"; @@ -599,8 +562,6 @@ static void _launch_config() return; } - free(ments); - parse_failed: if (!cfg_sec) { @@ -640,6 +601,8 @@ wrong_emupath: out: sd_end(); + free(ments); + h_cfg.emummc_force_disable = false; btn_wait(); @@ -887,7 +850,7 @@ static void _auto_launch() } if (h_cfg.autohosoff && !(b_cfg.boot_cfg & BOOT_CFG_AUTOBOOT_EN)) - check_power_off_from_hos(); + _check_power_off_from_hos(); if (h_cfg.autoboot_list || (boot_from_id && !cfg_sec)) { @@ -1334,7 +1297,7 @@ out: max77620_low_battery_monitor_config(true); } -static void _r2p_get_config_t210b01() +static void _r2c_get_config_t210b01() { rtc_reboot_reason_t rr; if (!max77620_rtc_get_reboot_reason(&rr)) @@ -1548,9 +1511,9 @@ skip_lp0_minerva_config: display_backlight_pwm_init(); //display_backlight_brightness(h_cfg.backlight, 1000); - // Get R2P config from RTC. + // Get R2C config from RTC. if (h_cfg.t210b01) - _r2p_get_config_t210b01(); + _r2c_get_config_t210b01(); // Show exceptions, HOS errors, library errors and L4T kernel panics. _show_errors(); From 68408bbb798c8cf478365cbdf5f2df6703d776e2 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Tue, 11 Jun 2024 08:59:45 +0300 Subject: [PATCH 209/308] hos: add 18.1.0 support --- bootloader/hos/pkg2_patches.inl | 2 ++ 1 file changed, 2 insertions(+) diff --git a/bootloader/hos/pkg2_patches.inl b/bootloader/hos/pkg2_patches.inl index 8637051..a44b9aa 100644 --- a/bootloader/hos/pkg2_patches.inl +++ b/bootloader/hos/pkg2_patches.inl @@ -855,4 +855,6 @@ static const kip1_id_t _kip_ids[] = { "FS", "\xEE\x0F\x4B\xAC\x6D\x1F\xFC\x4B", _fs_patches_1700_exfat }, // FS 17.0.0 exFAT { "FS", "\x79\x5F\x5A\x5E\xB0\xC6\x77\x9E", _fs_patches_1800 }, // FS 18.0.0 { "FS", "\x1E\x2C\x64\xB1\xCC\xE2\x78\x24", _fs_patches_1800_exfat }, // FS 18.0.0 exFAT + { "FS", "\xA3\x39\xF0\x1C\x95\xBF\xA7\x68", _fs_patches_1800 }, // FS 18.1.0 + { "FS", "\x20\x4C\xBA\x86\xDE\x08\x44\x6A", _fs_patches_1800_exfat }, // FS 18.1.0 exFAT }; From 242debfe3e9e67735391d4015c1ec2141e151c31 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Tue, 11 Jun 2024 09:04:21 +0300 Subject: [PATCH 210/308] modules: use echo -e for newline prints --- modules/hekate_libsys_lp0/Makefile | 2 +- modules/hekate_libsys_lp0/sdram_lp0_param_t210b01.h | 1 + modules/hekate_libsys_minerva/Makefile | 2 +- modules/simple_sample/Makefile | 2 +- 4 files changed, 4 insertions(+), 3 deletions(-) diff --git a/modules/hekate_libsys_lp0/Makefile b/modules/hekate_libsys_lp0/Makefile index 2c6f036..90efa07 100644 --- a/modules/hekate_libsys_lp0/Makefile +++ b/modules/hekate_libsys_lp0/Makefile @@ -28,7 +28,7 @@ $(BUILD)/%.o: ./%.c $(TARGET).bso: $(OBJS) @$(CC) $(LDFLAGS) -e _modInit $^ -o $(OUTPUT)/$(TARGET).bso @$(STRIP) -g $(OUTPUT)/$(TARGET).bso - @echo "-------------\nBuilt module: "$(TARGET)".bso\n-------------" + @echo -e "-------------\nBuilt module: "$(TARGET)".bso\n-------------" clean: @rm -rf $(OUTPUT)/$(TARGET).bso diff --git a/modules/hekate_libsys_lp0/sdram_lp0_param_t210b01.h b/modules/hekate_libsys_lp0/sdram_lp0_param_t210b01.h index 8510688..924c766 100644 --- a/modules/hekate_libsys_lp0/sdram_lp0_param_t210b01.h +++ b/modules/hekate_libsys_lp0/sdram_lp0_param_t210b01.h @@ -981,6 +981,7 @@ struct sdram_params_t210b01 /* Specifies the value for MC_MTS_CARVEOUT_REG_CTRL */ u32 mc_mts_carveout_reg_ctrl; + /* Specifies the clients that are allowed to access untranslated memory */ u32 mc_untranslated_region_check; /* Just a place holder for special usage when there is no BCT for certain registers */ diff --git a/modules/hekate_libsys_minerva/Makefile b/modules/hekate_libsys_minerva/Makefile index 46970b6..5e3f086 100644 --- a/modules/hekate_libsys_minerva/Makefile +++ b/modules/hekate_libsys_minerva/Makefile @@ -28,7 +28,7 @@ $(BUILD)/%.o: ./%.c $(TARGET).bso: $(OBJS) @$(CC) $(LDFLAGS) -e _minerva_init $^ -o $(OUTPUT)/$(TARGET).bso @$(STRIP) -g $(OUTPUT)/$(TARGET).bso - @echo "-------------\nBuilt module: "$(TARGET)".bso\n-------------" + @echo -e "-------------\nBuilt module: "$(TARGET)".bso\n-------------" clean: @rm -rf $(OUTPUT)/$(TARGET).bso diff --git a/modules/simple_sample/Makefile b/modules/simple_sample/Makefile index da65320..2c0d7d7 100644 --- a/modules/simple_sample/Makefile +++ b/modules/simple_sample/Makefile @@ -35,7 +35,7 @@ $(BUILD)/%.o: ./%.c $(TARGET).bso: $(OBJS) @$(CC) $(LDFLAGS) -e _modInit $^ -o $(OUTPUT)/$(TARGET).bso @$(STRIP) -g $(OUTPUT)/$(TARGET).bso - @echo "-------------\nBuilt module: "$(TARGET)".bso\n-------------" + @echo -e "-------------\nBuilt module: "$(TARGET)".bso\n-------------" clean: @rm -rf $(OUTPUT)/$(TARGET).bso From 80b3651d0a17a3fc7fa7a5b7e2f7e9de0d476948 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Tue, 11 Jun 2024 09:08:33 +0300 Subject: [PATCH 211/308] nyx: correct touch fw id display --- nyx/nyx_gui/frontend/gui_info.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index 8371b8b..93595e7 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -918,7 +918,7 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) strcat(txt_buf, "#FFDD00 Error!#"); s_printf(txt_buf + strlen(txt_buf), "\n#FF8000 ID:# %02X.%02X.%02X.%02X (", - (touch_fw.fw_id >> 24) & 0xFF, (touch_fw.fw_id >> 24) & 0xFF, (touch_fw.fw_id >> 24) & 0xFF, touch_fw.fw_id & 0xFF); + (touch_fw.fw_id >> 24) & 0xFF, (touch_fw.fw_id >> 16) & 0xFF, (touch_fw.fw_id >> 8) & 0xFF, touch_fw.fw_id & 0xFF); // Check panel pair info. switch (touch_fw.fw_id) From 66303d0d471897be66272ac78347c1c62123c74e Mon Sep 17 00:00:00 2001 From: CTCaer Date: Tue, 11 Jun 2024 12:41:13 +0300 Subject: [PATCH 212/308] hos: reinstate host1x disable --- bootloader/hos/hos.c | 1 + 1 file changed, 1 insertion(+) diff --git a/bootloader/hos/hos.c b/bootloader/hos/hos.c index cb92f4a..765b2d9 100644 --- a/bootloader/hos/hos.c +++ b/bootloader/hos/hos.c @@ -1166,6 +1166,7 @@ int hos_launch(ini_sec_t *cfg) // Disable display. This must be executed before secmon to provide support for all fw versions. display_end(); + clock_disable_host1x(); // Override uCID if set. EMC(EMC_SCRATCH0) = ctxt.ucid; From c321d3508cc757cf4d6a0800e6bc90838cc05830 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Tue, 11 Jun 2024 12:41:19 +0300 Subject: [PATCH 213/308] Bump hekate to v6.2.0 and Nyx to v1.6.2 --- Versions.inc | 6 +++--- bootloader/frontend/fe_info.c | 1 - bootloader/main.c | 4 ++-- 3 files changed, 5 insertions(+), 6 deletions(-) diff --git a/Versions.inc b/Versions.inc index c81c592..2775f51 100644 --- a/Versions.inc +++ b/Versions.inc @@ -1,11 +1,11 @@ # IPL Version. BLVERSION_MAJOR := 6 -BLVERSION_MINOR := 1 -BLVERSION_HOTFX := 1 +BLVERSION_MINOR := 2 +BLVERSION_HOTFX := 0 BLVERSION_RSVD := 0 # Nyx Version. NYXVERSION_MAJOR := 1 NYXVERSION_MINOR := 6 -NYXVERSION_HOTFX := 1 +NYXVERSION_HOTFX := 2 NYXVERSION_RSVD := 0 diff --git a/bootloader/frontend/fe_info.c b/bootloader/frontend/fe_info.c index c24fd7c..d1beaba 100644 --- a/bootloader/frontend/fe_info.c +++ b/bootloader/frontend/fe_info.c @@ -26,7 +26,6 @@ #include extern hekate_config h_cfg; -extern void emmcsn_path_impl(char *path, char *sub_dir, char *filename, sdmmc_storage_t *storage); #pragma GCC push_options #pragma GCC optimize ("Os") diff --git a/bootloader/main.c b/bootloader/main.c index 242ce44..bf34824 100644 --- a/bootloader/main.c +++ b/bootloader/main.c @@ -1444,7 +1444,7 @@ ment_t ment_top[] = { MDEF_END() }; -menu_t menu_top = { ment_top, "hekate v6.1.1", 0, 0 }; +menu_t menu_top = { ment_top, "hekate v6.2.0", 0, 0 }; extern void pivot_stack(u32 stack_top); @@ -1470,7 +1470,7 @@ void ipl_main() // Set bootloader's default configuration. set_default_configuration(); - // Prep RTC regs for read. Needed for T210B01 R2P. + // Prep RTC regs for read. Needed for T210B01 R2C. max77620_rtc_prep_read(); // Initialize display. From 4c5cc6d567db7083f9f63950d7371f84d9a07d39 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Tue, 2 Jul 2024 17:52:12 +0300 Subject: [PATCH 214/308] bdk: display: small refactor --- bdk/display/di.c | 17 +++++++++-------- bdk/display/di.inl | 29 ++++++++++++++++++++++++----- 2 files changed, 33 insertions(+), 13 deletions(-) diff --git a/bdk/display/di.c b/bdk/display/di.c index 98192c6..33e0aed 100644 --- a/bdk/display/di.c +++ b/bdk/display/di.c @@ -384,7 +384,7 @@ void display_init() CLOCK(CLK_RST_CONTROLLER_CLK_ENB_L_SET) = BIT(CLK_L_DISP1); CLOCK(CLK_RST_CONTROLLER_CLK_ENB_X_SET) = BIT(CLK_X_UART_FST_MIPI_CAL); - CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_UART_FST_MIPI_CAL) = CLK_SRC_DIV(6); // Set PLLP_OUT3 and div 6 (17MHz). + CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_UART_FST_MIPI_CAL) = CLK_SRC_DIV(6); // Set PLLP_OUT3 and div 6 (68MHz). CLOCK(CLK_RST_CONTROLLER_CLK_ENB_W_SET) = BIT(CLK_W_DSIA_LP); CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_DSIA_LP) = CLK_SRC_DIV(6); // Set PLLP_OUT and div 6 (68MHz). @@ -437,16 +437,16 @@ void display_init() reg_write_array((u32 *)DISPLAY_A_BASE, _di_dc_setup_win_config, ARRAY_SIZE(_di_dc_setup_win_config)); // Setup dsi init sequence packets. - reg_write_array((u32 *)DSI_BASE, _di_dsi_init_config0, ARRAY_SIZE(_di_dsi_init_config0)); + reg_write_array((u32 *)DSI_BASE, _di_dsi_seq_pkt_reset_config0, ARRAY_SIZE(_di_dsi_seq_pkt_reset_config0)); DSI(_DSIREG(tegra_t210 ? DSI_INIT_SEQ_DATA_15 : DSI_INIT_SEQ_DATA_15_B01)) = 0; - reg_write_array((u32 *)DSI_BASE, _di_dsi_init_config1, ARRAY_SIZE(_di_dsi_init_config1)); + reg_write_array((u32 *)DSI_BASE, _di_dsi_seq_pkt_reset_config1, ARRAY_SIZE(_di_dsi_seq_pkt_reset_config1)); // Reset pad trimmers for T210B01. if (!tegra_t210) reg_write_array((u32 *)DSI_BASE, _di_dsi_init_pads_t210b01, ARRAY_SIZE(_di_dsi_init_pads_t210b01)); - // Setup init sequence packets, timings and power on DSI. - reg_write_array((u32 *)DSI_BASE, _di_dsi_init_config2, ARRAY_SIZE(_di_dsi_init_config2)); + // Setup init seq packet lengths, timings and power on DSI. + reg_write_array((u32 *)DSI_BASE, _di_dsi_init_config, ARRAY_SIZE(_di_dsi_init_config)); usleep(10000); // Enable LCD Reset. @@ -557,13 +557,13 @@ void display_init() clock_enable_plld(1, 24, false, tegra_t210); // Finalize DSI init packet sequence configuration. - reg_write_array((u32 *)DSI_BASE, _di_dsi_init_seq_pkt_final_config, ARRAY_SIZE(_di_dsi_init_seq_pkt_final_config)); + reg_write_array((u32 *)DSI_BASE, _di_dsi_seq_pkt_video_non_burst_no_eot_config, ARRAY_SIZE(_di_dsi_seq_pkt_video_non_burst_no_eot_config)); // Set 1-by-1 pixel/clock and pixel clock to 234 / 3 = 78 MHz. For 60 Hz refresh rate. DISPLAY_A(_DIREG(DC_DISP_DISP_CLOCK_CONTROL)) = PIXEL_CLK_DIVIDER_PCD1 | SHIFT_CLK_DIVIDER(4); // 4: div3. - // Set DSI mode. - reg_write_array((u32 *)DSI_BASE, _di_dsi_mode_config, ARRAY_SIZE(_di_dsi_mode_config)); + // Set DSI mode to HOST. + reg_write_array((u32 *)DSI_BASE, _di_dsi_host_mode_config, ARRAY_SIZE(_di_dsi_host_mode_config)); usleep(10000); /* @@ -734,6 +734,7 @@ static void _display_panel_and_hw_end(bool no_panel_deinit) case PANEL_AUO_A062TAN01: reg_write_array((u32 *)DSI_BASE, _di_dsi_panel_deinit_config_auo, ARRAY_SIZE(_di_dsi_panel_deinit_config_auo)); + usleep(5000); break; case PANEL_INL_2J055IA_27A: diff --git a/bdk/display/di.inl b/bdk/display/di.inl index a19a622..d74130e 100644 --- a/bdk/display/di.inl +++ b/bdk/display/di.inl @@ -64,7 +64,7 @@ static const reg_cfg_t _di_dc_setup_win_config[] = { }; // DSI Init config. -static const reg_cfg_t _di_dsi_init_config0[] = { +static const reg_cfg_t _di_dsi_seq_pkt_reset_config0[] = { {DSI_WR_DATA, 0}, {DSI_INT_ENABLE, 0}, {DSI_INT_STATUS, 0}, @@ -74,7 +74,7 @@ static const reg_cfg_t _di_dsi_init_config0[] = { {DSI_INIT_SEQ_DATA_2, 0}, {DSI_INIT_SEQ_DATA_3, 0} }; -static const reg_cfg_t _di_dsi_init_config1[] = { +static const reg_cfg_t _di_dsi_seq_pkt_reset_config1[] = { {DSI_DCS_CMDS, 0}, {DSI_PKT_SEQ_0_LO, 0}, {DSI_PKT_SEQ_1_LO, 0}, @@ -99,37 +99,47 @@ static const reg_cfg_t _di_dsi_init_pads_t210b01[] = { {DSI_PAD_CONTROL_6_B01, 0}, {DSI_PAD_CONTROL_7_B01, 0} }; -static const reg_cfg_t _di_dsi_init_config2[] = { +static const reg_cfg_t _di_dsi_init_config[] = { {DSI_PAD_CONTROL_CD, 0}, {DSI_SOL_DELAY, 24}, {DSI_MAX_THRESHOLD, 480}, {DSI_TRIGGER, 0}, {DSI_INIT_SEQ_CONTROL, 0}, + {DSI_PKT_LEN_0_1, 0}, {DSI_PKT_LEN_2_3, 0}, {DSI_PKT_LEN_4_5, 0}, {DSI_PKT_LEN_6_7, 0}, + {DSI_PAD_CONTROL_1, 0}, + + /* DSI PHY timings */ {DSI_PHY_TIMING_0, 0x6070603}, {DSI_PHY_TIMING_1, 0x40A0E05}, {DSI_PHY_TIMING_2, 0x30109}, {DSI_BTA_TIMING, 0x190A14}, + /* DSI timeout */ {DSI_TIMEOUT_0, DSI_TIMEOUT_LRX(0x2000) | DSI_TIMEOUT_HTX(0xFFFF)}, {DSI_TIMEOUT_1, DSI_TIMEOUT_PR(0x765) | DSI_TIMEOUT_TA(0x2000)}, {DSI_TO_TALLY, 0}, + {DSI_PAD_CONTROL_0, DSI_PAD_CONTROL_VS1_PULLDN(0) | DSI_PAD_CONTROL_VS1_PDIO(0)}, // Power up. {DSI_POWER_CONTROL, DSI_POWER_CONTROL_ENABLE}, {DSI_POWER_CONTROL, DSI_POWER_CONTROL_ENABLE}, {DSI_POWER_CONTROL, 0}, {DSI_POWER_CONTROL, 0}, {DSI_PAD_CONTROL_1, 0}, + + /* DSI PHY timings */ {DSI_PHY_TIMING_0, 0x6070603}, {DSI_PHY_TIMING_1, 0x40A0E05}, {DSI_PHY_TIMING_2, 0x30118}, {DSI_BTA_TIMING, 0x190A14}, + /* DSI timeout */ {DSI_TIMEOUT_0, DSI_TIMEOUT_LRX(0x2000) | DSI_TIMEOUT_HTX(0xFFFF)}, {DSI_TIMEOUT_1, DSI_TIMEOUT_PR(0x1343) | DSI_TIMEOUT_TA(0x2000)}, {DSI_TO_TALLY, 0}, + {DSI_HOST_CONTROL, DSI_HOST_CONTROL_CRC_RESET | DSI_HOST_CONTROL_TX_TRIG_HOST | DSI_HOST_CONTROL_CS | DSI_HOST_CONTROL_ECC}, {DSI_CONTROL, DSI_CONTROL_LANES(3) | DSI_CONTROL_HOST_ENABLE}, {DSI_POWER_CONTROL, DSI_POWER_CONTROL_ENABLE}, @@ -188,15 +198,19 @@ static const reg_cfg_t _di_dsi_panel_init_config_jdi[] = { }; // DSI packet config. -static const reg_cfg_t _di_dsi_init_seq_pkt_final_config[] = { +static const reg_cfg_t _di_dsi_seq_pkt_video_non_burst_no_eot_config[] = { {DSI_PAD_CONTROL_1, 0}, + + /* DSI PHY timings */ {DSI_PHY_TIMING_0, 0x6070603}, {DSI_PHY_TIMING_1, 0x40A0E05}, {DSI_PHY_TIMING_2, 0x30172}, {DSI_BTA_TIMING, 0x190A14}, + /* DSI timeout */ {DSI_TIMEOUT_0, DSI_TIMEOUT_LRX(0x2000) | DSI_TIMEOUT_HTX(0xA40)}, {DSI_TIMEOUT_1, DSI_TIMEOUT_PR(0x5A2F) | DSI_TIMEOUT_TA(0x2000)}, {DSI_TO_TALLY, 0}, + {DSI_PKT_SEQ_0_LO, 0x40000208}, {DSI_PKT_SEQ_2_LO, 0x40000308}, {DSI_PKT_SEQ_4_LO, 0x40000308}, @@ -213,7 +227,7 @@ static const reg_cfg_t _di_dsi_init_seq_pkt_final_config[] = { }; // DSI mode config. -static const reg_cfg_t _di_dsi_mode_config[] = { +static const reg_cfg_t _di_dsi_host_mode_config[] = { {DSI_TRIGGER, 0}, {DSI_CONTROL, 0}, {DSI_SOL_DELAY, 6}, @@ -304,6 +318,7 @@ static const reg_cfg_t _di_dc_video_enable_config[] = { {DC_CMD_GENERAL_INCR_SYNCPT, SYNCPT_GENERAL_COND(COND_REG_WR_SAFE) | SYNCPT_GENERAL_INDX(1)}, {DC_CMD_STATE_CONTROL, GENERAL_UPDATE}, {DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ}, + {DC_DISP_DISP_CLOCK_CONTROL, PIXEL_CLK_DIVIDER_PCD1 | SHIFT_CLK_DIVIDER(4)}, // 4: div3. }; @@ -334,13 +349,17 @@ static const reg_cfg_t _di_dc_video_disable_config[] = { static const reg_cfg_t _di_dsi_timing_deinit_config[] = { {DSI_POWER_CONTROL, 0}, {DSI_PAD_CONTROL_1, 0}, + + /* DSI PHY timings */ {DSI_PHY_TIMING_0, 0x6070603}, {DSI_PHY_TIMING_1, 0x40A0E05}, {DSI_PHY_TIMING_2, 0x30118}, {DSI_BTA_TIMING, 0x190A14}, + /* DSI timeout */ {DSI_TIMEOUT_0, DSI_TIMEOUT_LRX(0x2000) | DSI_TIMEOUT_HTX(0xFFFF)}, {DSI_TIMEOUT_1, DSI_TIMEOUT_PR(0x1343) | DSI_TIMEOUT_TA(0x2000)}, {DSI_TO_TALLY, 0}, + {DSI_HOST_CONTROL, DSI_HOST_CONTROL_CRC_RESET | DSI_HOST_CONTROL_TX_TRIG_HOST | DSI_HOST_CONTROL_CS | DSI_HOST_CONTROL_ECC}, {DSI_CONTROL, DSI_CONTROL_LANES(3) | DSI_CONTROL_HOST_ENABLE}, {DSI_POWER_CONTROL, DSI_POWER_CONTROL_ENABLE}, From acb3997a7d84c3ee42938f5f9f32e73ee3037b8a Mon Sep 17 00:00:00 2001 From: CTCaer Date: Tue, 2 Jul 2024 17:56:20 +0300 Subject: [PATCH 215/308] bdk: hwinit: reorder no io power And make sure sdmmc iopower is not enabled after vdd disable. --- bdk/soc/hw_init.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/bdk/soc/hw_init.c b/bdk/soc/hw_init.c index 6142b13..367b704 100644 --- a/bdk/soc/hw_init.c +++ b/bdk/soc/hw_init.c @@ -295,14 +295,16 @@ static void _config_regulators(bool tegra_t210, bool nx_hoag) // Disable low battery shutdown monitor. max77620_low_battery_monitor_config(false); + // Power on all relevant rails in case we came out of warmboot. Only keep MEM/MEM_COMP and SDMMC1 states. + PMC(APBDEV_PMC_NO_IOPOWER) &= PMC_NO_IOPOWER_MEM_COMP | PMC_NO_IOPOWER_SDMMC1 | PMC_NO_IOPOWER_MEM; + // Make sure SDMMC1 IO/Core are powered off. max7762x_regulator_enable(REGULATOR_LDO2, false); gpio_write(GPIO_PORT_E, GPIO_PIN_4, GPIO_LOW); + PMC(APBDEV_PMC_NO_IOPOWER) |= PMC_NO_IOPOWER_SDMMC1; + (void)PMC(APBDEV_PMC_NO_IOPOWER); sd_power_cycle_time_start = get_tmr_ms(); - // Power on all relevant rails in case we came out of warmboot. Only keep MEM/MEM_COMP and SDMMC1 states. - PMC(APBDEV_PMC_NO_IOPOWER) &= PMC_NO_IOPOWER_MEM_COMP | PMC_NO_IOPOWER_SDMMC1 | PMC_NO_IOPOWER_MEM; - // Disable DSI AVDD to make sure it's in a reset state. max7762x_regulator_enable(REGULATOR_LDO0, false); From e47b6ec19b8151a64cc2238e32f3d332455c3367 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Tue, 2 Jul 2024 17:59:14 +0300 Subject: [PATCH 216/308] bdk: hwinit: display changes Do not display ldo0 if enabled here as it's not needed. Make sure PLLP_OUTB is properly reset in case of coming out of warmboot. --- bdk/soc/clock.h | 1 + bdk/soc/hw_init.c | 6 +++--- bdk/soc/pmc.h | 4 +++- 3 files changed, 7 insertions(+), 4 deletions(-) diff --git a/bdk/soc/clock.h b/bdk/soc/clock.h index 0e91836..4bceb24 100644 --- a/bdk/soc/clock.h +++ b/bdk/soc/clock.h @@ -47,6 +47,7 @@ #define CLK_RST_CONTROLLER_PLLM_MISC1 0x98 #define CLK_RST_CONTROLLER_PLLM_MISC2 0x9C #define CLK_RST_CONTROLLER_PLLP_BASE 0xA0 +#define CLK_RST_CONTROLLER_PLLP_OUTB 0xA8 #define CLK_RST_CONTROLLER_PLLA_BASE 0xB0 #define CLK_RST_CONTROLLER_PLLA_OUT 0xB4 #define CLK_RST_CONTROLLER_PLLA_MISC1 0xB8 diff --git a/bdk/soc/hw_init.c b/bdk/soc/hw_init.c index 367b704..7bfa599 100644 --- a/bdk/soc/hw_init.c +++ b/bdk/soc/hw_init.c @@ -305,9 +305,6 @@ static void _config_regulators(bool tegra_t210, bool nx_hoag) (void)PMC(APBDEV_PMC_NO_IOPOWER); sd_power_cycle_time_start = get_tmr_ms(); - // Disable DSI AVDD to make sure it's in a reset state. - max7762x_regulator_enable(REGULATOR_LDO0, false); - // Disable backup battery charger. i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_CNFGBBC, MAX77620_CNFGBBC_RESISTOR_1K); @@ -380,6 +377,9 @@ void hw_init() if (tegra_t210) _mbist_workaround(); + // Make sure PLLP_OUT3/4 is set to 408 MHz and enabled. + CLOCK(CLK_RST_CONTROLLER_PLLP_OUTB) = 0x30003; + // Enable Security Engine clock. clock_enable_se(); diff --git a/bdk/soc/pmc.h b/bdk/soc/pmc.h index 07d7a52..5721895 100644 --- a/bdk/soc/pmc.h +++ b/bdk/soc/pmc.h @@ -101,7 +101,9 @@ #define PMC_RST_STATUS_LP0 4 #define PMC_RST_STATUS_AOTAG 5 #define APBDEV_PMC_IO_DPD_REQ 0x1B8 -#define PMC_IO_DPD_REQ_DPD_OFF BIT(30) +#define PMC_IO_DPD_REQ_DPD_IDLE (0 << 30u) +#define PMC_IO_DPD_REQ_DPD_OFF (1 << 30u) +#define PMC_IO_DPD_REQ_DPD_ON (2 << 30u) #define APBDEV_PMC_IO_DPD2_REQ 0x1C0 #define APBDEV_PMC_VDDP_SEL 0x1CC #define APBDEV_PMC_DDR_CFG 0x1D0 From 716cfbfbaf60e896e59f7f97049825600bb2bf06 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Tue, 2 Jul 2024 18:02:05 +0300 Subject: [PATCH 217/308] bdk: sdram: refactor init --- bdk/mem/sdram.c | 229 +++++++++++++++++++++++++++--------------------- bdk/mem/sdram.h | 2 +- 2 files changed, 131 insertions(+), 100 deletions(-) diff --git a/bdk/mem/sdram.c b/bdk/mem/sdram.c index 44d18e7..4aa98fa 100644 --- a/bdk/mem/sdram.c +++ b/bdk/mem/sdram.c @@ -34,8 +34,6 @@ #include #include -#define CONFIG_SDRAM_KEEP_ALIVE - #define DRAM_ID(x) BIT(x) #define DRAM_CC(x) BIT(x) @@ -184,11 +182,11 @@ emc_mr_data_t sdram_read_mrx(emc_mr_t mrx) return data; } -void sdram_div_disable(bool enable) +void sdram_src_pllc(bool enable) { static bool enabled = false; - if (hw_get_chip_id() == GP_HIDREV_MAJOR_T210 && enable == enabled) + if (hw_get_chip_id() == GP_HIDREV_MAJOR_T210 || enable == enabled) return; enabled = enable; @@ -205,8 +203,8 @@ void sdram_div_disable(bool enable) if (CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_EMC) != clk_src_emc) return; - // Clear div. - CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_EMC) = clk_src_emc & ~0xF; + // Set source as PLLC_OUT0. + CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_EMC) = 0x20188004; } else { @@ -216,19 +214,36 @@ void sdram_div_disable(bool enable) // Wait for CC interrupt. while (!(EMC(EMC_INTSTATUS) & BIT(4))) - ; + usleep(1); } static void _sdram_config_t210(const sdram_params_t210_t *params) { + // VDDP Select. + PMC(APBDEV_PMC_VDDP_SEL) = params->pmc_vddp_sel; + usleep(params->pmc_vddp_sel_wait); + + // Set DDR pad voltage. + PMC(APBDEV_PMC_DDR_PWR) = PMC(APBDEV_PMC_DDR_PWR); // Normally params->pmc_ddr_pwr. + + // Turn on MEM IO Power. + PMC(APBDEV_PMC_NO_IOPOWER) &= PMC_NO_IOPOWER_SDMMC1; // Only keep SDMMC1 state. (Was params->pmc_no_io_power). + PMC(APBDEV_PMC_REG_SHORT) = params->pmc_reg_short; + + PMC(APBDEV_PMC_DDR_CNTRL) = params->pmc_ddr_ctrl; + + // Patch 1 using BCT spare variables + if (params->emc_bct_spare0) + *(vu32 *)params->emc_bct_spare0 = params->emc_bct_spare1; + // Program DPD3/DPD4 regs (coldboot path). // Enable sel_dpd on unused pins. - u32 dpd_req = (params->emc_pmc_scratch1 & 0x3FFFFFFF) | (2 << 30u); + u32 dpd_req = (params->emc_pmc_scratch1 & 0x3FFFFFFF) | PMC_IO_DPD_REQ_DPD_ON; PMC(APBDEV_PMC_IO_DPD3_REQ) = (dpd_req ^ 0xFFFF) & 0xC000FFFF; usleep(params->pmc_io_dpd3_req_wait); // Disable e_dpd_vttgen. - dpd_req = (params->emc_pmc_scratch2 & 0x3FFFFFFF) | (2 << 30u); + dpd_req = (params->emc_pmc_scratch2 & 0x3FFFFFFF) | PMC_IO_DPD_REQ_DPD_ON; PMC(APBDEV_PMC_IO_DPD4_REQ) = (dpd_req & 0xFFFF0000) ^ 0x3FFF0000; usleep(params->pmc_io_dpd4_req_wait); @@ -239,28 +254,24 @@ static void _sdram_config_t210(const sdram_params_t210_t *params) PMC(APBDEV_PMC_WEAK_BIAS) = 0; usleep(1); - // Start clocks. + // Start PLLM. CLOCK(CLK_RST_CONTROLLER_PLLM_MISC1) = params->pllm_setup_control; CLOCK(CLK_RST_CONTROLLER_PLLM_MISC2) = 0; -#ifdef CONFIG_SDRAM_KEEP_ALIVE - CLOCK(CLK_RST_CONTROLLER_PLLM_BASE) = - (params->pllm_feedback_divider << 8) | params->pllm_input_divider | ((params->pllm_post_divider & 0xFFFF) << 20) | PLLCX_BASE_ENABLE; -#else u32 pllm_div = (params->pllm_feedback_divider << 8) | params->pllm_input_divider | ((params->pllm_post_divider & 0xFFFF) << 20); CLOCK(CLK_RST_CONTROLLER_PLLM_BASE) = pllm_div; CLOCK(CLK_RST_CONTROLLER_PLLM_BASE) = pllm_div | PLLCX_BASE_ENABLE; -#endif u32 wait_end = get_tmr_us() + 300; - while (!(CLOCK(CLK_RST_CONTROLLER_PLLM_BASE) & 0x8000000)) + while (!(CLOCK(CLK_RST_CONTROLLER_PLLM_BASE) & BIT(27))) { if (get_tmr_us() >= wait_end) - goto break_nosleep; + goto lock_timeout; } usleep(10); -break_nosleep: +lock_timeout: + // Set clock sources. CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_EMC) = ((params->mc_emem_arb_misc0 >> 11) & 0x10000) | (params->emc_clock_source & 0xFFFEFFFF); if (params->emc_clock_source_dll) CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_EMC_DLL) = params->emc_clock_source_dll; @@ -272,12 +283,13 @@ break_nosleep: CLOCK(CLK_RST_CONTROLLER_CLK_ENB_X_SET) = BIT(CLK_X_EMC_DLL); CLOCK(CLK_RST_CONTROLLER_RST_DEV_H_CLR) = BIT(CLK_H_EMC) | BIT(CLK_H_MEM); - // Set pad macros. + // Set pad vtt levels. EMC(EMC_PMACRO_VTTGEN_CTRL_0) = params->emc_pmacro_vttgen_ctrl0; EMC(EMC_PMACRO_VTTGEN_CTRL_1) = params->emc_pmacro_vttgen_ctrl1; EMC(EMC_PMACRO_VTTGEN_CTRL_2) = params->emc_pmacro_vttgen_ctrl2; - EMC(EMC_TIMING_CONTROL) = 1; // Trigger timing update so above writes take place. + // Trigger timing update so above writes take place. + EMC(EMC_TIMING_CONTROL) = 1; usleep(10); // Ensure the regulators settle. // Select EMC write mux. @@ -314,6 +326,7 @@ break_nosleep: // This is required to do any reads from the pad macros. EMC(EMC_CONFIG_SAMPLE_DELAY) = params->emc_config_sample_delay; + // Set data pipes mode. EMC(EMC_FBIO_CFG8) = params->emc_fbio_cfg8; // Set swizzle for Rank 0. @@ -331,12 +344,12 @@ break_nosleep: if (params->emc_bct_spare6) *(vu32 *)params->emc_bct_spare6 = params->emc_bct_spare7; - // Set pad controls. + // Program calibration impedance. EMC(EMC_XM2COMPPADCTRL) = params->emc_xm2_comp_pad_ctrl; EMC(EMC_XM2COMPPADCTRL2) = params->emc_xm2_comp_pad_ctrl2; EMC(EMC_XM2COMPPADCTRL3) = params->emc_xm2_comp_pad_ctrl3; - // Program Autocal controls with shadowed register fields. + // Program Autocal controls. EMC(EMC_AUTO_CAL_CONFIG2) = params->emc_auto_cal_config2; EMC(EMC_AUTO_CAL_CONFIG3) = params->emc_auto_cal_config3; EMC(EMC_AUTO_CAL_CONFIG4) = params->emc_auto_cal_config4; @@ -345,6 +358,7 @@ break_nosleep: EMC(EMC_AUTO_CAL_CONFIG7) = params->emc_auto_cal_config7; EMC(EMC_AUTO_CAL_CONFIG8) = params->emc_auto_cal_config8; + // Program termination and drive strength EMC(EMC_PMACRO_RX_TERM) = params->emc_pmacro_rx_term; EMC(EMC_PMACRO_DQ_TX_DRV) = params->emc_pmacro_dq_tx_drive; EMC(EMC_PMACRO_CA_TX_DRV) = params->emc_pmacro_ca_tx_drive; @@ -353,10 +367,12 @@ break_nosleep: EMC(EMC_AUTO_CAL_CHANNEL) = params->emc_auto_cal_channel; EMC(EMC_PMACRO_ZCTRL) = params->emc_pmacro_zcrtl; + // Program dll config. EMC(EMC_DLL_CFG_0) = params->emc_dll_cfg0; EMC(EMC_DLL_CFG_1) = params->emc_dll_cfg1; EMC(EMC_CFG_DIG_DLL_1) = params->emc_cfg_dig_dll_1; + // Program barrelshift. EMC(EMC_DATA_BRLSHFT_0) = params->emc_data_brlshft0; EMC(EMC_DATA_BRLSHFT_1) = params->emc_data_brlshft1; EMC(EMC_DQS_BRLSHFT_0) = params->emc_dqs_brlshft0; @@ -370,6 +386,7 @@ break_nosleep: EMC(EMC_QUSE_BRLSHFT_2) = params->emc_quse_brlshft2; EMC(EMC_QUSE_BRLSHFT_3) = params->emc_quse_brlshft3; + // Program pad macros controls and termination. EMC(EMC_PMACRO_BRICK_CTRL_RFU1) = (params->emc_pmacro_brick_ctrl_rfu1 & 0x1BF01BF) | 0x1E401E40; EMC(EMC_PMACRO_PAD_CFG_CTRL) = params->emc_pmacro_pad_cfg_ctrl; @@ -384,6 +401,7 @@ break_nosleep: EMC(EMC_PMACRO_CMD_RX_TERM_MODE) = params->emc_pmacro_cmd_rx_term_mode; EMC(EMC_PMACRO_CMD_PAD_TX_CTRL) = params->emc_pmacro_cmd_pad_tx_ctrl; + // Program pad macro pins/bytes. EMC(EMC_CFG_3) = params->emc_cfg3; EMC(EMC_PMACRO_TX_PWRD_0) = params->emc_pmacro_tx_pwrd0; EMC(EMC_PMACRO_TX_PWRD_1) = params->emc_pmacro_tx_pwrd1; @@ -404,12 +422,15 @@ break_nosleep: EMC(EMC_PMACRO_CMD_CTRL_0) = params->emc_pmacro_cmd_ctrl0; EMC(EMC_PMACRO_CMD_CTRL_1) = params->emc_pmacro_cmd_ctrl1; EMC(EMC_PMACRO_CMD_CTRL_2) = params->emc_pmacro_cmd_ctrl2; + + // Program inbound vref setting. EMC(EMC_PMACRO_IB_VREF_DQ_0) = params->emc_pmacro_ib_vref_dq_0; EMC(EMC_PMACRO_IB_VREF_DQ_1) = params->emc_pmacro_ib_vref_dq_1; EMC(EMC_PMACRO_IB_VREF_DQS_0) = params->emc_pmacro_ib_vref_dqs_0; EMC(EMC_PMACRO_IB_VREF_DQS_1) = params->emc_pmacro_ib_vref_dqs_1; EMC(EMC_PMACRO_IB_RXRT) = params->emc_pmacro_ib_rxrt; + // Program quse trimmers. EMC(EMC_PMACRO_QUSE_DDLL_RANK0_0) = params->emc_pmacro_quse_ddll_rank0_0; EMC(EMC_PMACRO_QUSE_DDLL_RANK0_1) = params->emc_pmacro_quse_ddll_rank0_1; EMC(EMC_PMACRO_QUSE_DDLL_RANK0_2) = params->emc_pmacro_quse_ddll_rank0_2; @@ -424,6 +445,7 @@ break_nosleep: EMC(EMC_PMACRO_QUSE_DDLL_RANK1_5) = params->emc_pmacro_quse_ddll_rank1_5; EMC(EMC_PMACRO_BRICK_CTRL_RFU1) = params->emc_pmacro_brick_ctrl_rfu1; + // Program outbound trimmers. EMC(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0) = params->emc_pmacro_ob_ddll_long_dq_rank0_0; EMC(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1) = params->emc_pmacro_ob_ddll_long_dq_rank0_1; EMC(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2) = params->emc_pmacro_ob_ddll_long_dq_rank0_2; @@ -458,6 +480,7 @@ break_nosleep: EMC(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_2) = params->emc_pmacro_ib_ddll_long_dqs_rank1_2; EMC(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_3) = params->emc_pmacro_ib_ddll_long_dqs_rank1_3; + // Program clock trimmers. EMC(EMC_PMACRO_DDLL_LONG_CMD_0) = params->emc_pmacro_ddll_long_cmd_0; EMC(EMC_PMACRO_DDLL_LONG_CMD_1) = params->emc_pmacro_ddll_long_cmd_1; EMC(EMC_PMACRO_DDLL_LONG_CMD_2) = params->emc_pmacro_ddll_long_cmd_2; @@ -474,7 +497,8 @@ break_nosleep: if (params->emc_bct_spare4) *(vu32 *)params->emc_bct_spare4 = params->emc_bct_spare5; - EMC(EMC_TIMING_CONTROL) = 1; // Trigger timing update so above writes take place. + // Trigger timing update so above writes take place. + EMC(EMC_TIMING_CONTROL) = 1; // Initialize MC VPR settings. MC(MC_VIDEO_PROTECT_BOM) = params->mc_video_protect_bom; @@ -539,7 +563,8 @@ break_nosleep: MC(MC_EMEM_ARB_RSV) = params->mc_emem_arb_rsv; MC(MC_DA_CONFIG0) = params->mc_da_cfg0; - MC(MC_TIMING_CONTROL) = 1; // Trigger MC timing update. + // Trigger MC timing update. + MC(MC_TIMING_CONTROL) = 1; // Program second-level clock enable overrides. MC(MC_CLKEN_OVERRIDE) = params->mc_clken_override; @@ -561,6 +586,7 @@ break_nosleep: EMC(EMC_AUTO_CAL_VREF_SEL_0) = params->emc_auto_cal_vref_sel0; EMC(EMC_AUTO_CAL_VREF_SEL_1) = params->emc_auto_cal_vref_sel1; + // Program/Start auto calibration. EMC(EMC_AUTO_CAL_INTERVAL) = params->emc_auto_cal_interval; EMC(EMC_AUTO_CAL_CONFIG) = params->emc_auto_cal_config; usleep(params->emc_auto_cal_wait); @@ -618,10 +644,12 @@ break_nosleep: EMC(EMC_PMACRO_COMMON_PAD_TX_CTRL) = params->emc_pmacro_common_pad_tx_ctrl; EMC(EMC_DBG) = params->emc_dbg; + // Clear read fifo. EMC(EMC_QRST) = params->emc_qrst; EMC(EMC_ISSUE_QRST) = 1; EMC(EMC_ISSUE_QRST) = 0; + // Program the rest of EMC timing configuration. EMC(EMC_QSAFE) = params->emc_qsafe; EMC(EMC_RDV) = params->emc_rdv; EMC(EMC_RDV_MASK) = params->emc_rdv_mask; @@ -670,14 +698,16 @@ break_nosleep: if (params->boot_rom_patch_control & BIT(31)) { *(vu32 *)(APB_MISC_BASE + params->boot_rom_patch_control * 4) = params->boot_rom_patch_data; - MC(MC_TIMING_CONTROL) = 1; // Trigger MC timing update. + + // Trigger MC timing update. + MC(MC_TIMING_CONTROL) = 1; } // Release SEL_DPD_CMD. - PMC(APBDEV_PMC_IO_DPD3_REQ) = (params->emc_pmc_scratch1 & 0xFFF0000) | (1 << 30u); + PMC(APBDEV_PMC_IO_DPD3_REQ) = (params->emc_pmc_scratch1 & 0xFFF0000) | PMC_IO_DPD_REQ_DPD_OFF; usleep(params->pmc_io_dpd3_req_wait); - // Set autocal interval if not configured. + // Stall auto call measurements if periodic calibration is disabled. if (!params->emc_auto_cal_interval) EMC(EMC_AUTO_CAL_CONFIG) = params->emc_auto_cal_config | 0x200; @@ -690,7 +720,8 @@ break_nosleep: EMC(EMC_ZCAL_MRW_CMD) = params->emc_zcal_mrw_cmd; } - EMC(EMC_TIMING_CONTROL) = 1; // Trigger timing update so above writes take place. + // Trigger timing update so above writes take place. + EMC(EMC_TIMING_CONTROL) = 1; usleep(params->emc_timing_control_wait); // Deassert HOLD_CKE_LOW. @@ -759,7 +790,8 @@ break_nosleep: if (params->emc_bct_spare12) *(vu32 *)params->emc_bct_spare12 = params->emc_bct_spare13; - EMC(EMC_TIMING_CONTROL) = 1; // Trigger timing update so above writes take place. + // Trigger timing update so above writes take place. + EMC(EMC_TIMING_CONTROL) = 1; if (params->emc_extra_refresh_num) EMC(EMC_REF) = (((1 << params->emc_extra_refresh_num) - 1) << 8) | (params->emc_dev_select << 30) | 3; @@ -777,7 +809,8 @@ break_nosleep: // Write addr swizzle lock bit. EMC(EMC_FBIO_SPARE) = params->emc_fbio_spare | BIT(1); - EMC(EMC_TIMING_CONTROL) = 1; // Re-trigger timing to latch power saving functions. + // Re-trigger timing to latch power saving functions. + EMC(EMC_TIMING_CONTROL) = 1; // Enable EMC pipe clock gating. EMC(EMC_CFG_PIPE_CLK) = params->emc_cfg_pipe_clk; @@ -799,8 +832,19 @@ break_nosleep: static void _sdram_config_t210b01(const sdram_params_t210b01_t *params) { - u32 pmc_scratch1 = ~params->emc_pmc_scratch1; - u32 pmc_scratch2 = ~params->emc_pmc_scratch2; + // VDDP Select. + PMC(APBDEV_PMC_VDDP_SEL) = params->pmc_vddp_sel; + usleep(params->pmc_vddp_sel_wait); + + // Turn on MEM IO Power. + PMC(APBDEV_PMC_NO_IOPOWER) &= PMC_NO_IOPOWER_SDMMC1; // Only keep SDMMC1 state. (Was params->pmc_no_io_power). + PMC(APBDEV_PMC_REG_SHORT) = params->pmc_reg_short; + + PMC(APBDEV_PMC_DDR_CNTRL) = params->pmc_ddr_ctrl; + + // Patch 1 using BCT spare variables + if (params->emc_bct_spare0) + *(vu32 *)params->emc_bct_spare0 = params->emc_bct_spare1; // Override HW FSM if needed. if (params->clk_rst_pllm_misc20_override_enable) @@ -808,16 +852,18 @@ static void _sdram_config_t210b01(const sdram_params_t210b01_t *params) // Program DPD3/DPD4 regs (coldboot path). // Enable sel_dpd on unused pins. + u32 pmc_scratch1 = ~params->emc_pmc_scratch1; PMC(APBDEV_PMC_WEAK_BIAS) = (pmc_scratch1 & 0x1000) << 19 | (pmc_scratch1 & 0xFFF) << 18 | (pmc_scratch1 & 0x8000) << 15; - PMC(APBDEV_PMC_IO_DPD3_REQ) = (pmc_scratch1 & 0x9FFF) | (2 << 30u); + PMC(APBDEV_PMC_IO_DPD3_REQ) = (pmc_scratch1 & 0x9FFF) | PMC_IO_DPD_REQ_DPD_ON; usleep(params->pmc_io_dpd3_req_wait); // Disable e_dpd_vttgen. - PMC(APBDEV_PMC_IO_DPD4_REQ) = (pmc_scratch2 & 0x3FFF0000) | (2 << 30u); + u32 pmc_scratch2 = ~params->emc_pmc_scratch2; + PMC(APBDEV_PMC_IO_DPD4_REQ) = (pmc_scratch2 & 0x3FFF0000) | PMC_IO_DPD_REQ_DPD_ON; usleep(params->pmc_io_dpd4_req_wait); // Disable e_dpd_bg. - PMC(APBDEV_PMC_IO_DPD4_REQ) = (pmc_scratch2 & 0x1FFF) | (2 << 30u); + PMC(APBDEV_PMC_IO_DPD4_REQ) = (pmc_scratch2 & 0x1FFF) | PMC_IO_DPD_REQ_DPD_ON; usleep(1); // Program CMD mapping. Required before brick mapping, else @@ -858,7 +904,8 @@ static void _sdram_config_t210b01(const sdram_params_t210b01_t *params) if (params->emc_bct_spare_secure4) *(vu32 *)params->emc_bct_spare_secure4 = params->emc_bct_spare_secure5; - EMC(EMC_TIMING_CONTROL) = 1; // Trigger timing update so above writes take place. + // Trigger timing update so above writes take place. + EMC(EMC_TIMING_CONTROL) = 1; usleep(params->pmc_vddp_sel_wait + 2); // Ensure the regulators settle. // Set clock sources. @@ -875,6 +922,7 @@ static void _sdram_config_t210b01(const sdram_params_t210b01_t *params) // This is required to do any reads from the pad macros. EMC(EMC_CONFIG_SAMPLE_DELAY) = params->emc_config_sample_delay; + // Set data pipes mode. EMC(EMC_FBIO_CFG8) = params->emc_fbio_cfg8; // Set swizzle for Rank 0. @@ -892,12 +940,12 @@ static void _sdram_config_t210b01(const sdram_params_t210b01_t *params) if (params->emc_bct_spare6) *(vu32 *)params->emc_bct_spare6 = params->emc_bct_spare7; - // Set pad controls. + // Program calibration impedance. EMC(EMC_XM2COMPPADCTRL) = params->emc_xm2_comp_pad_ctrl; EMC(EMC_XM2COMPPADCTRL2) = params->emc_xm2_comp_pad_ctrl2; EMC(EMC_XM2COMPPADCTRL3) = params->emc_xm2_comp_pad_ctrl3; - // Program Autocal controls with shadowed register fields. + // Program Autocal controls. EMC(EMC_AUTO_CAL_CONFIG2) = params->emc_auto_cal_config2; EMC(EMC_AUTO_CAL_CONFIG3) = params->emc_auto_cal_config3; EMC(EMC_AUTO_CAL_CONFIG4) = params->emc_auto_cal_config4; @@ -906,6 +954,7 @@ static void _sdram_config_t210b01(const sdram_params_t210b01_t *params) EMC(EMC_AUTO_CAL_CONFIG7) = params->emc_auto_cal_config7; EMC(EMC_AUTO_CAL_CONFIG8) = params->emc_auto_cal_config8; + // Program termination and drive strength EMC(EMC_PMACRO_RX_TERM) = params->emc_pmacro_rx_term; EMC(EMC_PMACRO_DQ_TX_DRV) = params->emc_pmacro_dq_tx_drive; EMC(EMC_PMACRO_CA_TX_DRV) = params->emc_pmacro_ca_tx_drive; @@ -914,10 +963,12 @@ static void _sdram_config_t210b01(const sdram_params_t210b01_t *params) EMC(EMC_AUTO_CAL_CHANNEL) = params->emc_auto_cal_channel; EMC(EMC_PMACRO_ZCTRL) = params->emc_pmacro_zcrtl; + // Program dll config. EMC(EMC_DLL_CFG_0) = params->emc_dll_cfg0; EMC(EMC_DLL_CFG_1) = params->emc_dll_cfg1; EMC(EMC_CFG_DIG_DLL_1) = params->emc_cfg_dig_dll_1; + // Program barrelshift. EMC(EMC_DATA_BRLSHFT_0) = params->emc_data_brlshft0; EMC(EMC_DATA_BRLSHFT_1) = params->emc_data_brlshft1; EMC(EMC_DQS_BRLSHFT_0) = params->emc_dqs_brlshft0; @@ -931,6 +982,7 @@ static void _sdram_config_t210b01(const sdram_params_t210b01_t *params) EMC(EMC_QUSE_BRLSHFT_2) = params->emc_quse_brlshft2; EMC(EMC_QUSE_BRLSHFT_3) = params->emc_quse_brlshft3; + // Program pad macros controls and termination. EMC(EMC_PMACRO_BRICK_CTRL_RFU1) = params->emc_pmacro_brick_ctrl_rfu1; EMC(EMC_PMACRO_PAD_CFG_CTRL) = params->emc_pmacro_pad_cfg_ctrl; @@ -944,6 +996,7 @@ static void _sdram_config_t210b01(const sdram_params_t210b01_t *params) EMC(EMC_PMACRO_CMD_RX_TERM_MODE) = params->emc_pmacro_cmd_rx_term_mode; EMC(EMC_PMACRO_CMD_PAD_TX_CTRL) = params->emc_pmacro_cmd_pad_tx_ctrl & 0xEFFFFFFF; + // Program pad macro pins/bytes. EMC(EMC_CFG_3) = params->emc_cfg3; EMC(EMC_PMACRO_TX_PWRD_0) = params->emc_pmacro_tx_pwrd0; EMC(EMC_PMACRO_TX_PWRD_1) = params->emc_pmacro_tx_pwrd1; @@ -987,12 +1040,15 @@ static void _sdram_config_t210b01(const sdram_params_t210b01_t *params) EMC(EMC_PMACRO_CMD_CTRL_0) = params->emc_pmacro_cmd_ctrl0; EMC(EMC_PMACRO_CMD_CTRL_1) = params->emc_pmacro_cmd_ctrl1; EMC(EMC_PMACRO_CMD_CTRL_2) = params->emc_pmacro_cmd_ctrl2; + + // Program inbound vref setting. EMC(EMC_PMACRO_IB_VREF_DQ_0) = params->emc_pmacro_ib_vref_dq_0; EMC(EMC_PMACRO_IB_VREF_DQ_1) = params->emc_pmacro_ib_vref_dq_1; EMC(EMC_PMACRO_IB_VREF_DQS_0) = params->emc_pmacro_ib_vref_dqs_0; EMC(EMC_PMACRO_IB_VREF_DQS_1) = params->emc_pmacro_ib_vref_dqs_1; EMC(EMC_PMACRO_IB_RXRT) = params->emc_pmacro_ib_rxrt; + // Program quse trimmers. EMC(EMC_PMACRO_QUSE_DDLL_RANK0_0) = params->emc_pmacro_quse_ddll_rank0_0; EMC(EMC_PMACRO_QUSE_DDLL_RANK0_1) = params->emc_pmacro_quse_ddll_rank0_1; EMC(EMC_PMACRO_QUSE_DDLL_RANK0_2) = params->emc_pmacro_quse_ddll_rank0_2; @@ -1006,6 +1062,7 @@ static void _sdram_config_t210b01(const sdram_params_t210b01_t *params) EMC(EMC_PMACRO_QUSE_DDLL_RANK1_4) = params->emc_pmacro_quse_ddll_rank1_4; EMC(EMC_PMACRO_QUSE_DDLL_RANK1_5) = params->emc_pmacro_quse_ddll_rank1_5; + // Program outbound trimmers. EMC(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0) = params->emc_pmacro_ob_ddll_long_dq_rank0_0; EMC(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1) = params->emc_pmacro_ob_ddll_long_dq_rank0_1; EMC(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2) = params->emc_pmacro_ob_ddll_long_dq_rank0_2; @@ -1040,6 +1097,7 @@ static void _sdram_config_t210b01(const sdram_params_t210b01_t *params) EMC(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_2) = params->emc_pmacro_ib_ddll_long_dqs_rank1_2; EMC(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_3) = params->emc_pmacro_ib_ddll_long_dqs_rank1_3; + // Program clock trimmers. EMC(EMC_PMACRO_DDLL_LONG_CMD_0) = params->emc_pmacro_ddll_long_cmd_0; EMC(EMC_PMACRO_DDLL_LONG_CMD_1) = params->emc_pmacro_ddll_long_cmd_1; EMC(EMC_PMACRO_DDLL_LONG_CMD_2) = params->emc_pmacro_ddll_long_cmd_2; @@ -1064,7 +1122,8 @@ static void _sdram_config_t210b01(const sdram_params_t210b01_t *params) if (params->emc_bct_spare_secure10) *(vu32 *)params->emc_bct_spare_secure10 = params->emc_bct_spare_secure11; - EMC(EMC_TIMING_CONTROL) = 1; // Trigger timing update so above writes take place. + // Trigger timing update so above writes take place. + EMC(EMC_TIMING_CONTROL) = 1; // Initialize MC VPR settings. MC(MC_VIDEO_PROTECT_BOM) = params->mc_video_protect_bom; @@ -1129,7 +1188,8 @@ static void _sdram_config_t210b01(const sdram_params_t210b01_t *params) MC(MC_EMEM_ARB_RSV) = params->mc_emem_arb_rsv; MC(MC_DA_CONFIG0) = params->mc_da_cfg0; - MC(MC_TIMING_CONTROL) = 1; // Trigger MC timing update. + // Trigger MC timing update. + MC(MC_TIMING_CONTROL) = 1; // Program second-level clock enable overrides. MC(MC_CLKEN_OVERRIDE) = params->mc_clken_override; @@ -1151,6 +1211,7 @@ static void _sdram_config_t210b01(const sdram_params_t210b01_t *params) EMC(EMC_AUTO_CAL_VREF_SEL_0) = params->emc_auto_cal_vref_sel0; EMC(EMC_AUTO_CAL_VREF_SEL_1) = params->emc_auto_cal_vref_sel1; + // Program/Start auto calibration. EMC(EMC_AUTO_CAL_INTERVAL) = params->emc_auto_cal_interval; EMC(EMC_AUTO_CAL_CONFIG) = params->emc_auto_cal_config; usleep(params->emc_auto_cal_wait); @@ -1214,10 +1275,12 @@ static void _sdram_config_t210b01(const sdram_params_t210b01_t *params) EMC(EMC_DBG) = params->emc_dbg; + // Clear read fifo. EMC(EMC_QRST) = params->emc_qrst; EMC(EMC_ISSUE_QRST) = 1; EMC(EMC_ISSUE_QRST) = 0; + // Program the rest of EMC timing configuration. EMC(EMC_QSAFE) = params->emc_qsafe; EMC(EMC_RDV) = params->emc_rdv; EMC(EMC_RDV_MASK) = params->emc_rdv_mask; @@ -1267,7 +1330,9 @@ static void _sdram_config_t210b01(const sdram_params_t210b01_t *params) if (params->boot_rom_patch_control) { *(vu32 *)params->boot_rom_patch_control = params->boot_rom_patch_data; - MC(MC_TIMING_CONTROL) = 1; // Trigger MC timing update. + + // Trigger MC timing update. + MC(MC_TIMING_CONTROL) = 1; } // Patch 7 to 9 using BCT spare secure variables. @@ -1279,7 +1344,7 @@ static void _sdram_config_t210b01(const sdram_params_t210b01_t *params) *(vu32 *)params->emc_bct_spare_secure16 = params->emc_bct_spare_secure17; // Release SEL_DPD_CMD. - PMC(APBDEV_PMC_IO_DPD3_REQ) = (params->emc_pmc_scratch1 & 0xFFF0000) | (1 << 30u); + PMC(APBDEV_PMC_IO_DPD3_REQ) = (params->emc_pmc_scratch1 & 0xFFF0000) | PMC_IO_DPD_REQ_DPD_OFF; usleep(params->pmc_io_dpd3_req_wait); // Set transmission pad control parameters. @@ -1292,7 +1357,8 @@ static void _sdram_config_t210b01(const sdram_params_t210b01_t *params) EMC(EMC_ZCAL_MRW_CMD) = params->emc_zcal_mrw_cmd; } - EMC(EMC_TIMING_CONTROL) = 1; // Trigger timing update so above writes take place. + // Trigger timing update so above writes take place. + EMC(EMC_TIMING_CONTROL) = 1; usleep(params->emc_timing_control_wait); // Deassert HOLD_CKE_LOW. @@ -1369,7 +1435,8 @@ static void _sdram_config_t210b01(const sdram_params_t210b01_t *params) if (params->emc_bct_spare12) *(vu32 *)params->emc_bct_spare12 = params->emc_bct_spare13; - EMC(EMC_TIMING_CONTROL) = 1; // Trigger timing update so above writes take place. + // Trigger timing update so above writes take place. + EMC(EMC_TIMING_CONTROL) = 1; if (params->emc_extra_refresh_num) EMC(EMC_REF) = ((1 << params->emc_extra_refresh_num << 8) - 253) | (params->emc_dev_select << 30); @@ -1386,7 +1453,8 @@ static void _sdram_config_t210b01(const sdram_params_t210b01_t *params) // Write addr swizzle lock bit. EMC(EMC_FBIO_SPARE) = params->emc_fbio_spare | BIT(1); - EMC(EMC_TIMING_CONTROL) = 1; // Re-trigger timing to latch power saving functions. + // Re-trigger timing to latch power saving functions. + EMC(EMC_TIMING_CONTROL) = 1; EMC(EMC_CFG_UPDATE) = params->emc_cfg_update; @@ -1487,65 +1555,28 @@ void *sdram_get_params_patched() return (void *)sdram_params; } -static void _sdram_init_t210() -{ - const sdram_params_t210_t *params = (const sdram_params_t210_t *)_sdram_get_params_t210(); - if (params->memory_type != MEMORY_TYPE_LPDDR4) - return; - - // Set DRAM voltage. - max7762x_regulator_set_voltage(REGULATOR_SD1, 1125000); // HOS: 1.125V. Bootloader: 1.1V. - - // VDDP Select. - PMC(APBDEV_PMC_VDDP_SEL) = params->pmc_vddp_sel; - usleep(params->pmc_vddp_sel_wait); - - // Set DDR pad voltage. - PMC(APBDEV_PMC_DDR_PWR) = PMC(APBDEV_PMC_DDR_PWR); // Normally params->pmc_ddr_pwr. - - // Turn on MEM IO Power. - PMC(APBDEV_PMC_NO_IOPOWER) &= PMC_NO_IOPOWER_SDMMC1; // Only keep SDMMC1 state. (Was params->pmc_no_io_power). - PMC(APBDEV_PMC_REG_SHORT) = params->pmc_reg_short; - - PMC(APBDEV_PMC_DDR_CNTRL) = params->pmc_ddr_ctrl; - - // Patch 1 using BCT spare variables - if (params->emc_bct_spare0) - *(vu32 *)params->emc_bct_spare0 = params->emc_bct_spare1; - - _sdram_config_t210(params); -} - -static void _sdram_init_t210b01() -{ - const sdram_params_t210b01_t *params = (const sdram_params_t210b01_t *)sdram_get_params_t210b01(); - if (params->memory_type != MEMORY_TYPE_LPDDR4) - return; - - // VDDP Select. - PMC(APBDEV_PMC_VDDP_SEL) = params->pmc_vddp_sel; - usleep(params->pmc_vddp_sel_wait); - - // Turn on MEM IO Power. - PMC(APBDEV_PMC_NO_IOPOWER) &= PMC_NO_IOPOWER_SDMMC1; // Only keep SDMMC1 state. (Was params->pmc_no_io_power). - PMC(APBDEV_PMC_REG_SHORT) = params->pmc_reg_short; - - PMC(APBDEV_PMC_DDR_CNTRL) = params->pmc_ddr_ctrl; - - // Patch 1 using BCT spare variables - if (params->emc_bct_spare0) - *(vu32 *)params->emc_bct_spare0 = params->emc_bct_spare1; - - _sdram_config_t210b01(params); -} - void sdram_init() { // Disable remote sense for SD1. i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_SD_CFG2, MAX77620_SD_CNF2_ROVS_EN_SD0 | MAX77620_SD_CNF2_RSVD); if (hw_get_chip_id() == GP_HIDREV_MAJOR_T210) - _sdram_init_t210(); + { + const sdram_params_t210_t *params = (const sdram_params_t210_t *)_sdram_get_params_t210(); + if (params->memory_type != MEMORY_TYPE_LPDDR4) + return; + + // Set DRAM voltage. + max7762x_regulator_set_voltage(REGULATOR_SD1, 1125000); // HOS: 1.125V. Bootloader: 1.1V. + + _sdram_config_t210(params); + } else - _sdram_init_t210b01(); + { + const sdram_params_t210b01_t *params = (const sdram_params_t210b01_t *)sdram_get_params_t210b01(); + if (params->memory_type != MEMORY_TYPE_LPDDR4) + return; + + _sdram_config_t210b01(params); + } } diff --git a/bdk/mem/sdram.h b/bdk/mem/sdram.h index 6a3fdac..10fb705 100644 --- a/bdk/mem/sdram.h +++ b/bdk/mem/sdram.h @@ -135,7 +135,7 @@ void sdram_init(); void *sdram_get_params_patched(); void *sdram_get_params_t210b01(); void sdram_lp0_save_params(const void *params); -void sdram_div_disable(bool enable); +void sdram_src_pllc(bool enable); emc_mr_data_t sdram_read_mrx(emc_mr_t mrx); #endif From aacae78420314bd9133e0a160c5decd1198136b3 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Tue, 2 Jul 2024 18:04:09 +0300 Subject: [PATCH 218/308] nyx: partition manager error message improvement Inform user that there's an issue with bootloader folder when a partial backup is done during partitioning. --- nyx/nyx_gui/frontend/gui_tools_partition_manager.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/nyx/nyx_gui/frontend/gui_tools_partition_manager.c b/nyx/nyx_gui/frontend/gui_tools_partition_manager.c index 2f8a05c..114035c 100644 --- a/nyx/nyx_gui/frontend/gui_tools_partition_manager.c +++ b/nyx/nyx_gui/frontend/gui_tools_partition_manager.c @@ -1508,7 +1508,11 @@ static lv_res_t _create_mbox_start_partitioning(lv_obj_t *btn) // Do full or hekate/Nyx backup. if (_backup_and_restore_files(true, lbl_paths)) { - lv_label_set_text(lbl_status, "#FFDD00 Error:# Failed to back up files!"); + if (part_info.backup_possible) + lv_label_set_text(lbl_status, "#FFDD00 Error:# Failed to back up files!"); + else + lv_label_set_text(lbl_status, "#FFDD00 Error:# Failed to back up files!\nBootloader folder exceeds 1GB or corrupt!"); + goto error; } From 106a08f19c943c6fdf04fca6a293972667dce95a Mon Sep 17 00:00:00 2001 From: CTCaer Date: Tue, 2 Jul 2024 18:04:52 +0300 Subject: [PATCH 219/308] hos: rename function --- bootloader/hos/hos.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/bootloader/hos/hos.c b/bootloader/hos/hos.c index 765b2d9..3c6c2d9 100644 --- a/bootloader/hos/hos.c +++ b/bootloader/hos/hos.c @@ -759,7 +759,7 @@ int hos_launch(ini_sec_t *cfg) volatile secmon_mailbox_t *secmon_mailbox; minerva_change_freq(FREQ_1600); - sdram_div_disable(true); + sdram_src_pllc(true); list_init(&ctxt.kip1_list); ctxt.cfg = cfg; @@ -1179,8 +1179,8 @@ int hos_launch(ini_sec_t *cfg) hw_config_arbiter(true); // Scale down RAM OC if enabled. + sdram_src_pllc(false); minerva_prep_boot_freq(); - sdram_div_disable(false); // Flush cache and disable MMU. bpmp_mmu_disable(); @@ -1195,7 +1195,7 @@ int hos_launch(ini_sec_t *cfg) error: _free_launch_components(&ctxt); - sdram_div_disable(false); + sdram_src_pllc(false); emmc_end(); EPRINTF("\nFailed to launch HOS!"); From 280ebcc1e61fc0deab6f8d83606c78d3f454c584 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Tue, 2 Jul 2024 18:06:32 +0300 Subject: [PATCH 220/308] nyx: refactor hw info to provide more SKU data --- nyx/nyx_gui/frontend/gui_info.c | 28 +++++++++++++++------------- 1 file changed, 15 insertions(+), 13 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index 93595e7..b464bfe 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -366,8 +366,9 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) lv_label_set_style(lb_desc, &monospace_text); lv_label_set_static_text(lb_desc, - "SKU:\n" - "DRAM ID:\n" + "#FF8000 SoC:#\n" + "#FF8000 SKU:#\n" + "#FF8000 DRAM ID:#\n" "#FF8000 Burnt Fuses (ODM 7/6):#\n" "ODM Fields (4, 6, 7):\n" "Secure Boot Key (SBK):\n" @@ -391,8 +392,7 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) "LOT Code 0:\n" "Wafer ID:\n" "X Coordinate:\n" - "Y Coordinate:\n" - "#FF8000 Chip ID Revision:#" + "Y Coordinate:" ); lv_obj_set_width(lb_desc, lv_obj_get_width(desc)); @@ -412,16 +412,16 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) switch (fuse_read_hw_type()) { case FUSE_NX_HW_TYPE_ICOSA: - sku = "Icosa (Erista)"; + sku = "Icosa - Odin"; break; case FUSE_NX_HW_TYPE_IOWA: - sku = "Iowa (Mariko)"; + sku = "Iowa - Modin"; break; case FUSE_NX_HW_TYPE_HOAG: - sku = "Hoag (Mariko)"; + sku = "Hoag - Vali"; break; case FUSE_NX_HW_TYPE_AULA: - sku = "Aula (Mariko)"; + sku = "Aula - Fric"; break; default: sku = "#FF8000 Unknown#"; @@ -611,10 +611,13 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) u32 chip_id = APB_MISC(APB_MISC_GP_HIDREV); // Parse fuses and display them. s_printf(txt_buf, - "%X - %s - %s\n%02d: %s\n%d - %d (HOS: %s)\n%08X %08X %08X\n%08X%08X%08X%08X\n%08X\n%08X%08X%08X%08X\n%08X%08X%08X%08X\n%d\n" + "%02X - %s - M%d A%02d\n" + "%X - %s - %s\n%02d - %s\n%d | %d - HOS: %s\n%08X %08X %08X\n%08X%08X%08X%08X\n%08X\n%08X%08X%08X%08X\n%08X%08X%08X%08X\n%d\n" "%s\n%d.%02d (0x%X)\n%d.%02d (0x%X)\n%d\n%d\n%d\n%d\n0x%X\n%d\n%d (%d)\n%d (%d)\n%d (%d)\n" - "%d\n%d\n%d (0x%X)\n%d\n%d\n%d\n" - "ID: %02X, Major: %d, Minor: A%02d", + "%d\n%d\n%d (0x%X)\n%d\n%d\n%d", + (chip_id >> 8) & 0xFF, + hw_get_chip_id() == GP_HIDREV_MAJOR_T210 ? "T210 (Erista)" : "T210B01 (Mariko)", + (chip_id >> 4) & 0xF, (chip_id >> 16) & 0xF, FUSE(FUSE_SKU_INFO), sku, fuse_read_hw_state() ? "Dev" : "Retail", dram_id, dram_man, burnt_fuses_7, burnt_fuses_6, fuses_hos_version, fuse_read_odm(4), fuse_read_odm(6), fuse_read_odm(7), @@ -635,8 +638,7 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) FUSE(FUSE_SOC_IDDQ_CALIB), FUSE(FUSE_SOC_IDDQ_CALIB) * 4, FUSE(FUSE_GPU_IDDQ_CALIB), FUSE(FUSE_GPU_IDDQ_CALIB) * 5, FUSE(FUSE_OPT_VENDOR_CODE), FUSE(FUSE_OPT_FAB_CODE), lot_bin, FUSE(FUSE_OPT_LOT_CODE_0), - FUSE(FUSE_OPT_WAFER_ID), FUSE(FUSE_OPT_X_COORDINATE), FUSE(FUSE_OPT_Y_COORDINATE), - (chip_id >> 8) & 0xFF, (chip_id >> 4) & 0xF, (chip_id >> 16) & 0xF); + FUSE(FUSE_OPT_WAFER_ID), FUSE(FUSE_OPT_X_COORDINATE), FUSE(FUSE_OPT_Y_COORDINATE)); lv_label_set_text(lb_val, txt_buf); From 0aea402632ce7ba24ac825467f9ce17a40b8206f Mon Sep 17 00:00:00 2001 From: CTCaer Date: Tue, 2 Jul 2024 18:29:39 +0300 Subject: [PATCH 221/308] Add rel versioning and adjust accordingly --- Makefile | 4 ++-- Versions.inc | 4 ++-- bootloader/main.c | 4 ++-- loader/Makefile | 2 +- loader/loader.c | 2 +- nyx/Makefile | 2 +- nyx/nyx_gui/frontend/gui.c | 6 ++++-- nyx/nyx_gui/nyx.c | 2 +- 8 files changed, 14 insertions(+), 12 deletions(-) diff --git a/Makefile b/Makefile index 58f0134..f2ba8bb 100755 --- a/Makefile +++ b/Makefile @@ -64,8 +64,8 @@ FFCFG_INC := '"../$(SOURCEDIR)/libs/fatfs/ffconf.h"' ################################################################################ CUSTOMDEFINES := -DIPL_LOAD_ADDR=$(IPL_LOAD_ADDR) -DBL_MAGIC=$(IPL_MAGIC) -CUSTOMDEFINES += -DBL_VER_MJ=$(BLVERSION_MAJOR) -DBL_VER_MN=$(BLVERSION_MINOR) -DBL_VER_HF=$(BLVERSION_HOTFX) -DBL_RESERVED=$(BLVERSION_RSVD) -CUSTOMDEFINES += -DNYX_VER_MJ=$(NYXVERSION_MAJOR) -DNYX_VER_MN=$(NYXVERSION_MINOR) -DNYX_VER_HF=$(NYXVERSION_HOTFX) -DNYX_RESERVED=$(NYXVERSION_RSVD) +CUSTOMDEFINES += -DBL_VER_MJ=$(BLVERSION_MAJOR) -DBL_VER_MN=$(BLVERSION_MINOR) -DBL_VER_HF=$(BLVERSION_HOTFX) -DBL_VER_RL=$(BLVERSION_REL) +CUSTOMDEFINES += -DNYX_VER_MJ=$(NYXVERSION_MAJOR) -DNYX_VER_MN=$(NYXVERSION_MINOR) -DNYX_VER_HF=$(NYXVERSION_HOTFX) -DNYX_VER_RL=$(NYXVERSION_REL) # BDK defines. CUSTOMDEFINES += -DBDK_MALLOC_NO_DEFRAG -DBDK_MC_ENABLE_AHB_REDIRECT -DBDK_EMUMMC_ENABLE diff --git a/Versions.inc b/Versions.inc index 2775f51..a549224 100644 --- a/Versions.inc +++ b/Versions.inc @@ -2,10 +2,10 @@ BLVERSION_MAJOR := 6 BLVERSION_MINOR := 2 BLVERSION_HOTFX := 0 -BLVERSION_RSVD := 0 +BLVERSION_REL := 0 # Nyx Version. NYXVERSION_MAJOR := 1 NYXVERSION_MINOR := 6 NYXVERSION_HOTFX := 2 -NYXVERSION_RSVD := 0 +NYXVERSION_REL := 0 diff --git a/bootloader/main.c b/bootloader/main.c index bf34824..963561b 100644 --- a/bootloader/main.c +++ b/bootloader/main.c @@ -39,7 +39,7 @@ hekate_config h_cfg; boot_cfg_t __attribute__((section ("._boot_cfg"))) b_cfg; const volatile ipl_ver_meta_t __attribute__((section ("._ipl_version"))) ipl_ver = { .magic = BL_MAGIC, - .version = (BL_VER_MJ + '0') | ((BL_VER_MN + '0') << 8) | ((BL_VER_HF + '0') << 16), + .version = (BL_VER_MJ + '0') | ((BL_VER_MN + '0') << 8) | ((BL_VER_HF + '0') << 16) | ((BL_VER_RL) << 24), .rsvd0 = 0, .rsvd1 = 0 }; @@ -623,7 +623,7 @@ static void _nyx_load_run() // Check if Nyx version is old. u32 expected_nyx_ver = ((NYX_VER_MJ + '0') << 24) | ((NYX_VER_MN + '0') << 16) | ((NYX_VER_HF + '0') << 8); - u32 nyx_ver = byte_swap_32(*(u32 *)(nyx + NYX_VER_OFF)); + u32 nyx_ver = byte_swap_32(*(u32 *)(nyx + NYX_VER_OFF)) & 0xFFFFFF00; if (nyx_ver < expected_nyx_ver) { h_cfg.errors |= ERR_SYSOLD_NYX; diff --git a/loader/Makefile b/loader/Makefile index 522ddee..f66a0e0 100644 --- a/loader/Makefile +++ b/loader/Makefile @@ -27,7 +27,7 @@ OBJS = $(addprefix $(BUILDDIR)/$(TARGET)/, \ ################################################################################ CUSTOMDEFINES := -DBL_MAGIC=$(IPL_MAGIC) -CUSTOMDEFINES += -DBL_VER_MJ=$(BLVERSION_MAJOR) -DBL_VER_MN=$(BLVERSION_MINOR) -DBL_VER_HF=$(BLVERSION_HOTFX) -DBL_RESERVED=$(BLVERSION_RSVD) +CUSTOMDEFINES += -DBL_VER_MJ=$(BLVERSION_MAJOR) -DBL_VER_MN=$(BLVERSION_MINOR) -DBL_VER_HF=$(BLVERSION_HOTFX) -DBL_VER_RL=$(BLVERSION_REL) #TODO: Considering reinstating some of these when pointer warnings have been fixed. WARNINGS := -Wall -Wsign-compare -Wno-array-bounds -Wno-stringop-overflow diff --git a/loader/loader.c b/loader/loader.c index 2f8a148..03bc63e 100644 --- a/loader/loader.c +++ b/loader/loader.c @@ -32,7 +32,7 @@ boot_cfg_t __attribute__((section ("._boot_cfg"))) b_cfg; const volatile ipl_ver_meta_t __attribute__((section ("._ipl_version"))) ipl_ver = { .magic = BL_MAGIC, - .version = (BL_VER_MJ + '0') | ((BL_VER_MN + '0') << 8) | ((BL_VER_HF + '0') << 16), + .version = (BL_VER_MJ + '0') | ((BL_VER_MN + '0') << 8) | ((BL_VER_HF + '0') << 16) | ((BL_VER_RL) << 24), .rsvd0 = 0, .rsvd1 = 0 }; diff --git a/nyx/Makefile b/nyx/Makefile index fc54205..af7ab34 100644 --- a/nyx/Makefile +++ b/nyx/Makefile @@ -77,7 +77,7 @@ FFCFG_INC := '"../nyx/$(SOURCEDIR)/libs/fatfs/ffconf.h"' ################################################################################ CUSTOMDEFINES := -DNYX_LOAD_ADDR=$(NYX_LOAD_ADDR) -DNYX_MAGIC=$(NYX_MAGIC) -CUSTOMDEFINES += -DNYX_VER_MJ=$(NYXVERSION_MAJOR) -DNYX_VER_MN=$(NYXVERSION_MINOR) -DNYX_VER_HF=$(NYXVERSION_HOTFX) -DNYX_RESERVED=$(NYXVERSION_RSVD) +CUSTOMDEFINES += -DNYX_VER_MJ=$(NYXVERSION_MAJOR) -DNYX_VER_MN=$(NYXVERSION_MINOR) -DNYX_VER_HF=$(NYXVERSION_HOTFX) -DNYX_VER_RL=$(NYXVERSION_REL) # BDK defines. CUSTOMDEFINES += -DBDK_MC_ENABLE_AHB_REDIRECT -DBDK_MINERVA_CFG_FROM_RAM -DBDK_HW_EXTRA_DEINIT -DBDK_SDMMC_EXTRA_PRINT diff --git a/nyx/nyx_gui/frontend/gui.c b/nyx/nyx_gui/frontend/gui.c index 9eb4dd5..9ba72fe 100644 --- a/nyx/nyx_gui/frontend/gui.c +++ b/nyx/nyx_gui/frontend/gui.c @@ -1292,7 +1292,7 @@ static void _create_tab_about(lv_theme_t * th, lv_obj_t * parent) lv_obj_align(ctcaer_img, lbl_octopus, LV_ALIGN_OUT_BOTTOM_RIGHT, 0, LV_DPI * 2 / 3); char version[32]; - s_printf(version, "Nyx v%d.%d.%d", NYX_VER_MJ, NYX_VER_MN, NYX_VER_HF); + s_printf(version, "Nyx %s%d.%d.%d%c", NYX_VER_RL ? "v" : "", NYX_VER_MJ, NYX_VER_MN, NYX_VER_HF, NYX_VER_RL > 'A' ? NYX_VER_RL : 0); lv_obj_t * lbl_ver = lv_label_create(parent, NULL); lv_obj_align(lbl_ver, ctcaer_img, LV_ALIGN_OUT_BOTTOM_RIGHT, -LV_DPI / 20, LV_DPI / 4); lv_label_set_style(lbl_ver, &monospace_text); @@ -2317,7 +2317,9 @@ static void _nyx_main_menu(lv_theme_t * th) // Add all tabs content. char version[32]; - s_printf(version, "hekate v%d.%d.%d", nyx_str->version & 0xFF, (nyx_str->version >> 8) & 0xFF, (nyx_str->version >> 16) & 0xFF); + char rel = (nyx_str->version >> 24) & 0xFF; + s_printf(version, "hekate %s%d.%d.%d%c", + rel ? "v" : "", nyx_str->version & 0xFF, (nyx_str->version >> 8) & 0xFF, (nyx_str->version >> 16) & 0xFF, rel > 'A' ? rel : 0); lv_obj_t *tab_about = lv_tabview_add_tab(tv, version); lv_obj_t *tab_home = lv_tabview_add_tab(tv, SYMBOL_HOME" Home"); diff --git a/nyx/nyx_gui/nyx.c b/nyx/nyx_gui/nyx.c index 6d3d79e..86d90cd 100644 --- a/nyx/nyx_gui/nyx.c +++ b/nyx/nyx_gui/nyx.c @@ -35,7 +35,7 @@ hekate_config h_cfg; const volatile ipl_ver_meta_t __attribute__((section ("._ipl_version"))) ipl_ver = { .magic = NYX_MAGIC, - .version = (NYX_VER_MJ + '0') | ((NYX_VER_MN + '0') << 8) | ((NYX_VER_HF + '0') << 16), + .version = (NYX_VER_MJ + '0') | ((NYX_VER_MN + '0') << 8) | ((NYX_VER_HF + '0') << 16) | ((NYX_VER_RL) << 24), .rsvd0 = 0, .rsvd1 = 0 }; From 6c601ccaa55ac84cb4d962d9800202104c921a8d Mon Sep 17 00:00:00 2001 From: CTCaer Date: Tue, 2 Jul 2024 18:32:16 +0300 Subject: [PATCH 222/308] hekate: reinstate charger enable Add back charger enable on boot, inside low battery check. It will be kept as is since there's the following case that addresses: OTG mode and shut off will not restore charger mode. --- bootloader/main.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/bootloader/main.c b/bootloader/main.c index 963561b..2cd876d 100644 --- a/bootloader/main.c +++ b/bootloader/main.c @@ -138,8 +138,7 @@ bool is_ipl_updated(void *buf, char *path, bool force) { FIL fp; reloc_meta_t *reloc = (reloc_meta_t *)(IPL_LOAD_ADDR + RELOC_META_OFF); - boot_cfg_t *tmp_cfg = malloc(sizeof(boot_cfg_t)); - memset(tmp_cfg, 0, sizeof(boot_cfg_t)); + boot_cfg_t *tmp_cfg = zalloc(sizeof(boot_cfg_t)); f_open(&fp, path, FA_WRITE | FA_CREATE_ALWAYS); f_write(&fp, (u8 *)reloc->start, reloc->end - reloc->start, NULL); @@ -1139,7 +1138,7 @@ static void _show_errors() if (h_cfg.errors & ERR_L4T_KERNEL) { - WPRINTF("Kernel panic occurred!\n"); + WPRINTF("L4T Kernel panic occurred!\n"); if (!(h_cfg.errors & ERR_SD_BOOT_EN)) { if (!sd_save_to_file((void *)PSTORE_ADDR, PSTORE_SZ, "L4T_panic.bin")) @@ -1186,6 +1185,9 @@ static void _check_low_battery() int batt_volt = 0; int charge_status = 0; + // Enable charger in case it's disabled. + bq24193_enable_charger(); + bq24193_get_property(BQ24193_ChargeStatus, &charge_status); max17050_get_property(MAX17050_AvgVCELL, &batt_volt); From 85cd26e30549280000657b2b85cde9bc149385d1 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Tue, 2 Jul 2024 18:37:15 +0300 Subject: [PATCH 223/308] l4t: update loader to v6 - Move TZ parameters to a static address inside TZDRAM - Update fw rev for new ARC - Refactor context and parameters into a single struct --- bootloader/l4t/l4t.c | 131 ++++++++++++++++++++++++------------------- 1 file changed, 72 insertions(+), 59 deletions(-) diff --git a/bootloader/l4t/l4t.c b/bootloader/l4t/l4t.c index 0a6fa73..bcc025c 100644 --- a/bootloader/l4t/l4t.c +++ b/bootloader/l4t/l4t.c @@ -35,10 +35,11 @@ * 3: Arachne Register Cell v2. PTSA Rework support. * 4: Arachne Register Cell v3. DRAM OPT and DDR200 changes. * 5: Arachne Register Cell v4. DRAM FREQ and DDR200 changes. + * 6: Arachne Register Cell v5. Signal quality and performance changes. TZ param changes. */ -#define L4T_LOADER_API_REV 5 -#define L4T_FIRMWARE_REV 0x35524556 // REV5. +#define L4T_LOADER_API_REV 6 +#define L4T_FIRMWARE_REV 0x36524556 // REV6. #ifdef DEBUG_UART_PORT #include @@ -52,16 +53,18 @@ #endif #if CARVEOUT_NVDEC_TSEC_ENABLE - #define TZ_SIZE SZ_8M + #define TZDRAM_SIZE_CFG SZ_8M #else - #define TZ_SIZE SZ_1M + #define TZDRAM_SIZE_CFG SZ_1M #endif // TZDRAM addresses and sizes. -#define TZDRAM_SIZE TZ_SIZE // Secure Element. -#define TZDRAM_BASE (0xFFFFFFFF - TZDRAM_SIZE + 1) // 0xFFF00000 or 0xFF800000. +#define TZDRAM_SIZE TZDRAM_SIZE_CFG // Secure Element. +#define TZDRAM_BASE (0xFFFFFFFF - TZDRAM_SIZE + 1) // 0xFFF00000 or 0xFF800000. #define TZDRAM_COLD_ENTRY (TZDRAM_BASE) #define TZDRAM_WARM_ENTRY (TZDRAM_BASE + 0x200) +#define TZ_PARAM_SIZE SZ_4K +#define TZ_PARAM_BASE (0xFFFFFFFF - TZ_PARAM_SIZE + 1) // 0xFFFFF000. // Carveout sizes. #define CARVEOUT_NVDEC_SIZE SZ_1M @@ -76,8 +79,14 @@ #define SC7ENTRY_HDR_SIZE 0x400 +// Always start 1MB below TZDRAM for Secure Firmware or NVDEC. +#define GEN_CARVEOUT_TOP (TZDRAM_BASE - SZ_1M) + +// NVDEC and SECFW bases. +#define NVDFW_BASE GEN_CARVEOUT_TOP // 0xFF700000. +#define SECFW_BASE GEN_CARVEOUT_TOP // 0xFFE00000. + // Secure Elements addresses for T210. -#define SECFW_BASE (TZDRAM_BASE - SZ_1M) // 0xFFE00000 or 0xFF700000. #define SC7ENTRY_HDR_BASE (SECFW_BASE + 0) #define SC7ENTRY_BASE (SECFW_BASE + SC7ENTRY_HDR_SIZE) // After header. #define SC7EXIT_BASE (SECFW_BASE + SZ_64K) // 64KB after SECFW_BASE. @@ -214,7 +223,7 @@ typedef struct _bl_v1_params { u64 bl32_image_info; u64 bl33_ep_info; u64 bl33_image_info; -} bl_v1_params_t; +} bl31_v1_params_t; typedef struct _plat_params_from_bl2 { // TZDRAM. @@ -243,7 +252,7 @@ typedef struct _plat_params_from_bl2 { u64 r2p_payload_base; u64 flags; // Platform flags. -} plat_params_from_bl2_t; +} bl31_plat_params_from_bl2_t; typedef struct _l4t_fw_t { @@ -265,6 +274,10 @@ typedef struct _l4t_ctxt_t u32 sc7entry_size; emc_table_t *mtc_table; + + bl31_v1_params_t bl31_v1_params; + bl31_plat_params_from_bl2_t bl31_plat_params; + entry_point_info_t bl33_ep_info; } l4t_ctxt_t; #define DRAM_VDD2_OC_MIN_VOLTAGE 1050 @@ -483,7 +496,7 @@ static void _l4t_mc_config_carveout(bool t210b01) UPRINTF("TZD: TZDRAM Carveout: %08X - %08X\n", TZDRAM_BASE, TZDRAM_BASE - 1 + TZDRAM_SIZE); // Configure generalized security carveouts. - u32 carveout_base = TZDRAM_BASE - SZ_1M; // Always leave space for Secure Firmware. + u32 carveout_base = GEN_CARVEOUT_TOP; #if CARVEOUT_NVDEC_TSEC_ENABLE @@ -549,8 +562,10 @@ static void _l4t_mc_config_carveout(bool t210b01) MC(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS2) = 0; MC(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS3) = 0; MC(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS4) = 0; - MC(MC_SECURITY_CARVEOUT1_CFG0) = SEC_CARVEOUT_CFG_RD_NS | - SEC_CARVEOUT_CFG_WR_NS | + MC(MC_SECURITY_CARVEOUT1_CFG0) = SEC_CARVEOUT_CFG_RD_NS | + SEC_CARVEOUT_CFG_RD_SEC | + SEC_CARVEOUT_CFG_WR_NS | + SEC_CARVEOUT_CFG_WR_SEC | SEC_CARVEOUT_CFG_LOCKED; UPRINTF("GSC1: SECFW Carveout: %08X - %08X\n", MC(MC_SECURITY_CARVEOUT1_BOM), MC(MC_SECURITY_CARVEOUT1_BOM) + MC(MC_SECURITY_CARVEOUT1_SIZE_128KB) * SZ_128K); @@ -910,7 +925,7 @@ static void _l4t_set_config(l4t_ctxt_t *ctxt, const ini_sec_t *ini_sec, int entr _l4t_bl33_cfg_set_key(bl33_env, "autoboot_list", val); val[0] = '0' + L4T_LOADER_API_REV; - _l4t_bl33_cfg_set_key(bl33_env, "loader_rev", val); + _l4t_bl33_cfg_set_key(bl33_env, "loader_rev", val); // Enable BL33 memory env import. *(u32 *)(BL33_ENV_MAGIC_OFFSET) = BL33_ENV_MAGIC; @@ -923,25 +938,23 @@ static void _l4t_set_config(l4t_ctxt_t *ctxt, const ini_sec_t *ini_sec, int entr void launch_l4t(const ini_sec_t *ini_sec, int entry_idx, int is_list, bool t210b01) { - l4t_ctxt_t ctxt = {0}; - bl_v1_params_t bl_v1_params = {0}; - plat_params_from_bl2_t plat_params = {0}; - entry_point_info_t bl33_ep_info = {0}; + l4t_ctxt_t *ctxt = (l4t_ctxt_t *)TZ_PARAM_BASE; + memset(ctxt, 0, TZ_PARAM_SIZE); gfx_con_setpos(0, 0); // Parse config. - _l4t_set_config(&ctxt, ini_sec, entry_idx, is_list, t210b01); + _l4t_set_config(ctxt, ini_sec, entry_idx, is_list, t210b01); - if (!ctxt.path) + if (!ctxt->path) { _l4t_crit_error("Path missing", false); return; } // Get MTC table. - ctxt.mtc_table = minerva_get_mtc_table(); - if (!t210b01 && !ctxt.mtc_table) + ctxt->mtc_table = minerva_get_mtc_table(); + if (!t210b01 && !ctxt->mtc_table) { _l4t_crit_error("Minerva missing", true); return; @@ -968,8 +981,8 @@ void launch_l4t(const ini_sec_t *ini_sec, int entry_idx, int is_list, bool t210b if (!t210b01) { // Load SC7-Entry firmware. - ctxt.sc7entry_size = _l4t_sd_load(SC7ENTRY_FW); - if (!ctxt.sc7entry_size) + ctxt->sc7entry_size = _l4t_sd_load(SC7ENTRY_FW); + if (!ctxt->sc7entry_size) { _l4t_crit_error("loading SC7-Entry", true); return; @@ -1017,10 +1030,10 @@ void launch_l4t(const ini_sec_t *ini_sec, int entry_idx, int is_list, bool t210b mc_disable_ahb_redirect(); // Enable debug port. - if (ctxt.serial_port) + if (ctxt->serial_port) { - pinmux_config_uart(ctxt.serial_port - 1); - clock_enable_uart(ctxt.serial_port - 1); + pinmux_config_uart(ctxt->serial_port - 1); + clock_enable_uart(ctxt->serial_port - 1); } // Restore UARTB/C TX pins to SPIO. @@ -1032,7 +1045,7 @@ void launch_l4t(const ini_sec_t *ini_sec, int entry_idx, int is_list, bool t210b { // Defaults are for UARTA. char *bl33_serial_port = NULL; - switch (ctxt.serial_port) + switch (ctxt->serial_port) { case 0: // Disable. break; @@ -1051,41 +1064,41 @@ void launch_l4t(const ini_sec_t *ini_sec, int entry_idx, int is_list, bool t210b { BL33_DTB_SET_STDOUT_PATH(bl33_serial_port); BL33_DTB_SET_STDERR_PATH(bl33_serial_port); - BL33_DTB_SET_UART_STATUS(ctxt.serial_port); + BL33_DTB_SET_UART_STATUS(ctxt->serial_port); } } // Set BL31 params. - bl_v1_params.hdr.type = PARAM_BL31; - bl_v1_params.hdr.version = VERSION_1; - bl_v1_params.hdr.size = sizeof(bl_v1_params_t); - bl_v1_params.hdr.attr = PARAM_EP_SECURE; - bl_v1_params.bl33_ep_info = (u64)(u32)&bl33_ep_info; + ctxt->bl31_v1_params.hdr.type = PARAM_BL31; + ctxt->bl31_v1_params.hdr.version = VERSION_1; + ctxt->bl31_v1_params.hdr.size = sizeof(bl31_v1_params_t); + ctxt->bl31_v1_params.hdr.attr = PARAM_EP_SECURE; + ctxt->bl31_v1_params.bl33_ep_info = (u64)(u32)&ctxt->bl33_ep_info; // Set BL33 params. - bl33_ep_info.hdr.type = PARAM_EP; - bl33_ep_info.hdr.version = VERSION_1; - bl33_ep_info.hdr.size = sizeof(entry_point_info_t); - bl33_ep_info.hdr.attr = PARAM_EP_NON_SECURE; - bl33_ep_info.pc = BL33_LOAD_BASE; - bl33_ep_info.spsr = SPSR_EL2T; + ctxt->bl33_ep_info.hdr.type = PARAM_EP; + ctxt->bl33_ep_info.hdr.version = VERSION_1; + ctxt->bl33_ep_info.hdr.size = sizeof(entry_point_info_t); + ctxt->bl33_ep_info.hdr.attr = PARAM_EP_NON_SECURE; + ctxt->bl33_ep_info.pc = BL33_LOAD_BASE; + ctxt->bl33_ep_info.spsr = SPSR_EL2T; // Set Platform parameters. - plat_params.tzdram_base = TZDRAM_BASE; - plat_params.tzdram_size = TZDRAM_SIZE; + ctxt->bl31_plat_params.tzdram_base = TZDRAM_BASE; + ctxt->bl31_plat_params.tzdram_size = TZDRAM_SIZE; #if DEBUG_LOG_ATF - plat_params.uart_id = ctxt.serial_port; + ctxt->bl31_plat_params.uart_id = ctxt->serial_port; #endif if (!t210b01) { // Set SC7-Entry fw parameters. For now BPMP-FW is not used on T210. - plat_params.sc7entry_fw_base = SC7ENTRY_HDR_BASE; - plat_params.sc7entry_fw_size = ALIGN(ctxt.sc7entry_size + SC7ENTRY_HDR_SIZE, SZ_PAGE); + ctxt->bl31_plat_params.sc7entry_fw_base = SC7ENTRY_HDR_BASE; + ctxt->bl31_plat_params.sc7entry_fw_size = ALIGN(ctxt->sc7entry_size + SC7ENTRY_HDR_SIZE, SZ_PAGE); } // Enable below features. - plat_params.enable_extra_features = BL31_EXTRA_FEATURES_ENABLE; + ctxt->bl31_plat_params.enable_extra_features = BL31_EXTRA_FEATURES_ENABLE; if (!t210b01) { @@ -1095,37 +1108,37 @@ void launch_l4t(const ini_sec_t *ini_sec, int entry_idx, int is_list, bool t210b memset((u8 *)R2P_PAYLOAD_BASE + 0x94, 0, sizeof(boot_cfg_t)); // Clear Boot Config Storage. // Set R2P payload fw parameters. - plat_params.r2p_payload_base = R2P_PAYLOAD_BASE; - plat_params.r2p_payload_size = ALIGN(reloc->end - reloc->start, SZ_PAGE); + ctxt->bl31_plat_params.r2p_payload_base = R2P_PAYLOAD_BASE; + ctxt->bl31_plat_params.r2p_payload_size = ALIGN(reloc->end - reloc->start, SZ_PAGE); } // Set PMC access security. NS is mandatory for T210B01. - plat_params.flags = FLAGS_PMC_NON_SECURE; // Unsecure it unconditionally to reduce SMC calls to a minimum. + ctxt->bl31_plat_params.flags = FLAGS_PMC_NON_SECURE; // Unsecure it unconditionally to reduce SMC calls to a minimum. // Lift SC7 placement restrictions. Disables TZDRAM increased carveout too. - plat_params.flags |= FLAGS_SC7_NO_BASE_RESTRICTION; + ctxt->bl31_plat_params.flags |= FLAGS_SC7_NO_BASE_RESTRICTION; // Prepare EMC table. - if (ctxt.mtc_table) + if (ctxt->mtc_table) { // Set DRAM voltage. - if (ctxt.ram_oc_vdd2) - max7762x_regulator_set_voltage(REGULATOR_SD1, ctxt.ram_oc_vdd2 * 1000); + if (ctxt->ram_oc_vdd2) + max7762x_regulator_set_voltage(REGULATOR_SD1, ctxt->ram_oc_vdd2 * 1000); // Train the rest of the table, apply FSP WAR, set RAM to 800 MHz. - minerva_prep_boot_l4t(ctxt.ram_oc_freq, ctxt.ram_oc_opt); + minerva_prep_boot_l4t(ctxt->ram_oc_freq, ctxt->ram_oc_opt); // Set emc table parameters and copy it. int table_entries = minerva_get_mtc_table_entries(); - plat_params.emc_table_base = MTCTABLE_BASE; - plat_params.emc_table_size = sizeof(emc_table_t) * table_entries; - memcpy((u32 *)MTCTABLE_BASE, ctxt.mtc_table, sizeof(emc_table_t) * table_entries); + ctxt->bl31_plat_params.emc_table_base = MTCTABLE_BASE; + ctxt->bl31_plat_params.emc_table_size = sizeof(emc_table_t) * table_entries; + memcpy((u32 *)MTCTABLE_BASE, ctxt->mtc_table, sizeof(emc_table_t) * table_entries); } // Set and enable IRAM based BL31 config. PMC(APBDEV_PMC_SECURE_SCRATCH112) = PMC(APBDEV_PMC_SECURE_SCRATCH108); PMC(APBDEV_PMC_SECURE_SCRATCH114) = PMC(APBDEV_PMC_SECURE_SCRATCH109); - PMC(APBDEV_PMC_SECURE_SCRATCH108) = (u32)&bl_v1_params; - PMC(APBDEV_PMC_SECURE_SCRATCH109) = (u32)&plat_params; + PMC(APBDEV_PMC_SECURE_SCRATCH108) = (u32)&ctxt->bl31_v1_params; + PMC(APBDEV_PMC_SECURE_SCRATCH109) = (u32)&ctxt->bl31_plat_params; PMC(APBDEV_PMC_SECURE_SCRATCH110) = BL31_IRAM_PARAMS; // Set panel model. @@ -1145,7 +1158,7 @@ void launch_l4t(const ini_sec_t *ini_sec, int entry_idx, int is_list, bool t210b // Set BPMP-FW parameters. if (t210b01) - _l4t_bpmpfw_b01_config(&ctxt); + _l4t_bpmpfw_b01_config(ctxt); // Set carveouts and save them to PMC for SC7 Exit. _l4t_mc_config_carveout(t210b01); From 5c39d04ca284d28b5590c23ac82c171b4fbf1c92 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Tue, 2 Jul 2024 19:02:46 +0300 Subject: [PATCH 224/308] Bump hekate to v6.2.1 and Nyx to v1.6.3 --- Versions.inc | 4 ++-- bootloader/main.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/Versions.inc b/Versions.inc index a549224..8788f68 100644 --- a/Versions.inc +++ b/Versions.inc @@ -1,11 +1,11 @@ # IPL Version. BLVERSION_MAJOR := 6 BLVERSION_MINOR := 2 -BLVERSION_HOTFX := 0 +BLVERSION_HOTFX := 1 BLVERSION_REL := 0 # Nyx Version. NYXVERSION_MAJOR := 1 NYXVERSION_MINOR := 6 -NYXVERSION_HOTFX := 2 +NYXVERSION_HOTFX := 3 NYXVERSION_REL := 0 diff --git a/bootloader/main.c b/bootloader/main.c index 2cd876d..d3e0cf9 100644 --- a/bootloader/main.c +++ b/bootloader/main.c @@ -1446,7 +1446,7 @@ ment_t ment_top[] = { MDEF_END() }; -menu_t menu_top = { ment_top, "hekate v6.2.0", 0, 0 }; +menu_t menu_top = { ment_top, "hekate v6.2.1", 0, 0 }; extern void pivot_stack(u32 stack_top); From b1bc6ebdd8b6942d8972914ba8386822a2553be7 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 4 Oct 2024 21:39:35 +0300 Subject: [PATCH 225/308] bdk: joycon: utilize packet id per joycon Also fix a possible infinite loop --- bdk/input/joycon.c | 69 ++++++++++++++++++++-------------------------- 1 file changed, 30 insertions(+), 39 deletions(-) diff --git a/bdk/input/joycon.c b/bdk/input/joycon.c index 37d3086..5e3243e 100644 --- a/bdk/input/joycon.c +++ b/bdk/input/joycon.c @@ -22,7 +22,6 @@ #include #include #include -#include #include #include #include @@ -223,8 +222,8 @@ typedef struct _jc_hid_in_rpt_t { u8 cmd; u8 pkt_id; - u8 conn_info:4; - u8 batt_info:4; + u8 conn_info:4; // Connection detect. + u8 batt_info:4; // Power info. u8 btn_right; u8 btn_shared; u8 btn_left; @@ -317,9 +316,10 @@ typedef struct _joycon_ctxt_t u8 uart; u8 type; u8 state; - u8 mac[6]; u32 last_received_time; u32 last_status_req_time; + u8 mac[6]; + u8 pkt_id; u8 rumble_sent; u8 connected; u8 detected; @@ -330,11 +330,10 @@ static joycon_ctxt_t jc_l = {0}; static joycon_ctxt_t jc_r = {0}; static bool jc_init_done = false; -static u32 hid_pkt_inc = 0; static jc_gamepad_rpt_t jc_gamepad; -static u8 _jc_crc(u8 *data, u16 len, u8 init) +static u8 _jc_crc(const u8 *data, u16 len, u8 init) { u8 crc = init; for (u16 i = 0; i < len; i++) @@ -448,7 +447,7 @@ static void _jc_conn_check() if (jc_l.connected) _jc_power_supply(UART_C, false); - hid_pkt_inc = 0; + jc_l.pkt_id = 0; jc_l.connected = false; jc_l.rumble_sent = false; @@ -465,7 +464,7 @@ static void _jc_conn_check() if (jc_r.connected) _jc_power_supply(UART_B, false); - hid_pkt_inc = 0; + jc_r.pkt_id = 0; jc_r.connected = false; jc_r.rumble_sent = false; @@ -484,7 +483,7 @@ static void _joycon_send_raw(u8 uart_port, const u8 *buf, u16 size) uart_wait_xfer(uart_port, UART_TX_IDLE); } -static u16 _jc_packet_add_uart_hdr(jc_wired_hdr_t *out, u8 wired_cmd, u8 *data, u16 size, bool crc) +static u16 _jc_packet_add_uart_hdr(jc_wired_hdr_t *out, u8 wired_cmd, const u8 *data, u16 size, bool crc) { out->uart_hdr.magic[0] = 0x19; out->uart_hdr.magic[1] = 0x01; @@ -504,7 +503,7 @@ static u16 _jc_packet_add_uart_hdr(jc_wired_hdr_t *out, u8 wired_cmd, u8 *data, return sizeof(jc_wired_hdr_t); } -static u16 _jc_hid_output_rpt_craft(jc_wired_hdr_t *rpt, u8 *payload, u16 size, bool crc) +static u16 _jc_hid_output_rpt_craft(jc_wired_hdr_t *rpt, const u8 *payload, u16 size, bool crc) { u16 pkt_size = _jc_packet_add_uart_hdr(rpt, JC_WIRED_HID, NULL, 0, crc); pkt_size += size; @@ -519,22 +518,18 @@ static u16 _jc_hid_output_rpt_craft(jc_wired_hdr_t *rpt, u8 *payload, u16 size, return pkt_size; } -static void _jc_send_hid_output_rpt(u8 uart, u8 *payload, u16 size, bool crc) +static void _jc_send_hid_output_rpt(joycon_ctxt_t *jc, jc_hid_out_rpt_t *hid_pkt, u16 size, bool crc) { u8 rpt[0x50]; memset(rpt, 0, sizeof(rpt)); - u32 rpt_size = _jc_hid_output_rpt_craft((jc_wired_hdr_t *)rpt, payload, size, crc); + hid_pkt->pkt_id = (jc->pkt_id++ & 0xF); + u32 rpt_size = _jc_hid_output_rpt_craft((jc_wired_hdr_t *)rpt, (u8 *)hid_pkt, size, crc); - _joycon_send_raw(uart, rpt, rpt_size); + _joycon_send_raw(jc->uart, rpt, rpt_size); } -static u8 _jc_hid_pkt_id_incr() -{ - return (hid_pkt_inc++ & 0xF); -} - -static void _jc_send_hid_cmd(u8 uart, u8 subcmd, u8 *data, u16 size) +static void _jc_send_hid_cmd(joycon_ctxt_t *jc, u8 subcmd, const u8 *data, u16 size) { static const u8 rumble_neutral[8] = { 0x00, 0x01, 0x40, 0x40, 0x00, 0x01, 0x40, 0x40 }; static const u8 rumble_init[8] = { 0xc2, 0xc8, 0x03, 0x72, 0xc2, 0xc8, 0x03, 0x72 }; @@ -551,47 +546,43 @@ static void _jc_send_hid_cmd(u8 uart, u8 subcmd, u8 *data, u16 size) // Enable rumble. hid_pkt->cmd = JC_HID_OUTPUT_RPT; - hid_pkt->pkt_id = _jc_hid_pkt_id_incr(); hid_pkt->subcmd = JC_HID_SUBCMD_RUMBLE_CTL; hid_pkt->subcmd_data[0] = 1; if (send_r_rumble) - _jc_send_hid_output_rpt(UART_B, (u8 *)hid_pkt, 0x10, false); + _jc_send_hid_output_rpt(&jc_r, hid_pkt, 0x10, false); if (send_l_rumble) - _jc_send_hid_output_rpt(UART_C, (u8 *)hid_pkt, 0x10, false); + _jc_send_hid_output_rpt(&jc_l, hid_pkt, 0x10, false); // Send rumble. - hid_pkt->cmd = JC_HID_RUMBLE_RPT; - hid_pkt->pkt_id = _jc_hid_pkt_id_incr(); + hid_pkt->cmd = JC_HID_RUMBLE_RPT; memcpy(hid_pkt->rumble, rumble_init, sizeof(rumble_init)); if (send_r_rumble) - _jc_send_hid_output_rpt(UART_B, (u8 *)hid_pkt, 10, false); + _jc_send_hid_output_rpt(&jc_r, hid_pkt, 10, false); if (send_l_rumble) - _jc_send_hid_output_rpt(UART_C, (u8 *)hid_pkt, 10, false); + _jc_send_hid_output_rpt(&jc_l, hid_pkt, 10, false); msleep(15); // Disable rumble. hid_pkt->cmd = JC_HID_OUTPUT_RPT; - hid_pkt->pkt_id = _jc_hid_pkt_id_incr(); hid_pkt->subcmd = JC_HID_SUBCMD_RUMBLE_CTL; hid_pkt->subcmd_data[0] = 0; memcpy(hid_pkt->rumble, rumble_neutral, sizeof(rumble_neutral)); if (send_r_rumble) - _jc_send_hid_output_rpt(UART_B, (u8 *)hid_pkt, 0x10, false); + _jc_send_hid_output_rpt(&jc_r, hid_pkt, 0x10, false); if (send_l_rumble) - _jc_send_hid_output_rpt(UART_C, (u8 *)hid_pkt, 0x10, false); + _jc_send_hid_output_rpt(&jc_l, hid_pkt, 0x10, false); } else { - bool crc_needed = (jc_l.uart == uart) ? (jc_l.type & JC_ID_HORI) : (jc_r.type & JC_ID_HORI); + bool crc_needed = jc->type & JC_ID_HORI; hid_pkt->cmd = JC_HID_OUTPUT_RPT; - hid_pkt->pkt_id = _jc_hid_pkt_id_incr(); hid_pkt->subcmd = subcmd; if (data) memcpy(hid_pkt->subcmd_data, data, size); - _jc_send_hid_output_rpt(uart, (u8 *)hid_pkt, sizeof(jc_hid_out_rpt_t) + size, crc_needed); + _jc_send_hid_output_rpt(jc, hid_pkt, sizeof(jc_hid_out_rpt_t) + size, crc_needed); } } @@ -823,7 +814,7 @@ static bool _jc_send_init_rumble(joycon_ctxt_t *jc) // Send init rumble or request nx pad status report. if ((jc_r.connected && !jc_r.rumble_sent) || (jc_l.connected && !jc_l.rumble_sent)) { - _jc_send_hid_cmd(jc->uart, JC_HID_SUBCMD_SND_RUMBLE, NULL, 0); + _jc_send_hid_cmd(jc, JC_HID_SUBCMD_SND_RUMBLE, NULL, 0); if (jc_l.connected) jc_l.rumble_sent = true; @@ -864,7 +855,7 @@ static void _jc_req_nx_pad_status(joycon_ctxt_t *jc) jc->last_status_req_time = get_tmr_ms() + (!jc->sio_mode ? 15 : 7); } -static bool _jc_validate_pairing_info(u8 *buf, bool *is_hos) +static bool _jc_validate_pairing_info(const u8 *buf, bool *is_hos) { u8 crc = 0; for (u32 i = 0; i < 0x22; i++) @@ -933,13 +924,13 @@ retry: { if (!jc_l_found) { - _jc_send_hid_cmd(jc_l.uart, JC_HID_SUBCMD_SPI_READ, (u8 *)&subcmd_data_l, 5); + _jc_send_hid_cmd(&jc_l, JC_HID_SUBCMD_SPI_READ, (u8 *)&subcmd_data_l, 5); jc_l.last_status_req_time = get_tmr_ms() + 15; } if (!jc_r_found) { - _jc_send_hid_cmd(jc_r.uart, JC_HID_SUBCMD_SPI_READ, (u8 *)&subcmd_data_r, 5); + _jc_send_hid_cmd(&jc_r, JC_HID_SUBCMD_SPI_READ, (u8 *)&subcmd_data_r, 5); jc_r.last_status_req_time = get_tmr_ms() + 15; } @@ -1130,7 +1121,7 @@ static void _jc_init_conn(joycon_ctxt_t *jc) // Initialize the controller. u32 retries = 10; - while (!jc->connected) + while (!jc->connected && retries) { _joycon_send_raw(jc->uart, sio_init, sizeof(sio_init)); msleep(5); @@ -1239,12 +1230,12 @@ void jc_deinit() u8 data = HCI_STATE_SLEEP; if (jc_r.connected && !(jc_r.type & JC_ID_HORI)) { - _jc_send_hid_cmd(UART_B, JC_HID_SUBCMD_HCI_STATE, &data, 1); + _jc_send_hid_cmd(&jc_r, JC_HID_SUBCMD_HCI_STATE, &data, 1); _jc_rcv_pkt(&jc_r); } if (jc_l.connected && !(jc_l.type & JC_ID_HORI)) { - _jc_send_hid_cmd(UART_C, JC_HID_SUBCMD_HCI_STATE, &data, 1); + _jc_send_hid_cmd(&jc_l, JC_HID_SUBCMD_HCI_STATE, &data, 1); _jc_rcv_pkt(&jc_l); } } From 9e239df39e66ab722dd6ce6158308e49811ffdbe Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 4 Oct 2024 21:45:57 +0300 Subject: [PATCH 226/308] bdk: constify various args --- bdk/display/di.c | 2 +- bdk/display/vic.c | 2 +- bdk/display/vic.h | 2 +- bdk/mem/minerva.h | 2 +- bdk/power/bm92t36.c | 2 +- bdk/sec/se.c | 6 +++--- bdk/sec/se.h | 4 ++-- bdk/soc/clock.c | 2 +- bdk/soc/clock.h | 1 + bdk/soc/fuse.c | 6 +++--- bdk/soc/i2c.c | 4 ++-- bdk/soc/i2c.h | 2 +- bdk/storage/sd.c | 2 +- bdk/storage/sd.h | 2 +- bdk/storage/sdmmc.c | 10 +++++----- bdk/storage/sdmmc_driver.c | 4 ++-- bdk/usb/usb_gadget_hid.c | 2 +- bdk/usb/xusbd.c | 12 ++++++------ bdk/utils/ini.c | 2 +- bdk/utils/ini.h | 2 +- 20 files changed, 36 insertions(+), 35 deletions(-) diff --git a/bdk/display/di.c b/bdk/display/di.c index 33e0aed..80c4d12 100644 --- a/bdk/display/di.c +++ b/bdk/display/di.c @@ -935,7 +935,7 @@ void display_move_framebuffer(u32 window, void *fb) DISPLAY_A(_DIREG(DC_CMD_DISPLAY_WINDOW_HEADER)) = BIT(WINDOW_SELECT + window); // Get current framebuffer address. - void *fb_curr = (void *)DISPLAY_A(_DIREG(DC_WINBUF_START_ADDR)); + const void *fb_curr = (void *)DISPLAY_A(_DIREG(DC_WINBUF_START_ADDR)); u32 win_size = DISPLAY_A(_DIREG(DC_WIN_PRESCALED_SIZE)); win_size = (win_size & 0x7FFF) * ((win_size >> 16) & 0x1FFF); diff --git a/bdk/display/vic.c b/bdk/display/vic.c index 4611eb4..1044448 100644 --- a/bdk/display/vic.c +++ b/bdk/display/vic.c @@ -390,7 +390,7 @@ static int _vic_wait_idle() return 0; } -void vic_set_surface(vic_surface_t *sfc) +void vic_set_surface(const vic_surface_t *sfc) { u32 flip_x = 0; u32 flip_y = 0; diff --git a/bdk/display/vic.h b/bdk/display/vic.h index 54a3007..20fbe6c 100644 --- a/bdk/display/vic.h +++ b/bdk/display/vic.h @@ -58,7 +58,7 @@ typedef struct _vic_surface_t u32 rotation; } vic_surface_t; -void vic_set_surface(vic_surface_t *sfc); +void vic_set_surface(const vic_surface_t *sfc); int vic_compose(); int vic_init(); void vic_end(); diff --git a/bdk/mem/minerva.h b/bdk/mem/minerva.h index de32c78..e78bb41 100644 --- a/bdk/mem/minerva.h +++ b/bdk/mem/minerva.h @@ -38,7 +38,7 @@ typedef struct bool emc_2X_clk_src_is_pllmb; bool fsp_for_src_freq; bool train_ram_patterns; - bool init_done; + u32 init_done; } mtc_config_t; enum train_mode_t diff --git a/bdk/power/bm92t36.c b/bdk/power/bm92t36.c index faa1db5..371ed04 100644 --- a/bdk/power/bm92t36.c +++ b/bdk/power/bm92t36.c @@ -75,7 +75,7 @@ void bm92t36_get_sink_info(bool *inserted, usb_pd_objects_t *usb_pd) { memset(buf, 0, sizeof(buf)); _bm92t36_read_reg(buf, 2, STATUS1_REG); - *inserted = buf[0] & STATUS1_INSERT ? true : false; + *inserted = (buf[0] & STATUS1_INSERT) ? true : false; } if (usb_pd) diff --git a/bdk/sec/se.c b/bdk/sec/se.c index b6a2841..e89d13b 100644 --- a/bdk/sec/se.c +++ b/bdk/sec/se.c @@ -194,7 +194,7 @@ static int _se_execute_one_block(u32 op, void *dst, u32 dst_size, const void *sr return res; } -static void _se_aes_ctr_set(void *ctr) +static void _se_aes_ctr_set(const void *ctr) { u32 data[SE_AES_IV_SIZE / 4]; memcpy(data, ctr, SE_AES_IV_SIZE); @@ -226,7 +226,7 @@ u32 se_key_acc_ctrl_get(u32 ks) return SE(SE_CRYPTO_KEYTABLE_ACCESS_REG + 4 * ks); } -void se_aes_key_set(u32 ks, void *key, u32 size) +void se_aes_key_set(u32 ks, const void *key, u32 size) { u32 data[SE_AES_MAX_KEY_SIZE / 4]; memcpy(data, key, size); @@ -238,7 +238,7 @@ void se_aes_key_set(u32 ks, void *key, u32 size) } } -void se_aes_iv_set(u32 ks, void *iv) +void se_aes_iv_set(u32 ks, const void *iv) { u32 data[SE_AES_IV_SIZE / 4]; memcpy(data, iv, SE_AES_IV_SIZE); diff --git a/bdk/sec/se.h b/bdk/sec/se.h index 7c8c38b..36b057b 100644 --- a/bdk/sec/se.h +++ b/bdk/sec/se.h @@ -25,8 +25,8 @@ void se_rsa_acc_ctrl(u32 rs, u32 flags); void se_key_acc_ctrl(u32 ks, u32 flags); u32 se_key_acc_ctrl_get(u32 ks); void se_get_aes_keys(u8 *buf, u8 *keys, u32 keysize); -void se_aes_key_set(u32 ks, void *key, u32 size); -void se_aes_iv_set(u32 ks, void *iv); +void se_aes_key_set(u32 ks, const void *key, u32 size); +void se_aes_iv_set(u32 ks, const void *iv); void se_aes_key_get(u32 ks, void *key, u32 size); void se_aes_key_clear(u32 ks); void se_aes_iv_clear(u32 ks); diff --git a/bdk/soc/clock.c b/bdk/soc/clock.c index 6b2870c..b3a48fa 100644 --- a/bdk/soc/clock.c +++ b/bdk/soc/clock.c @@ -701,7 +701,7 @@ static void _clock_sdmmc_clear_enable(u32 id) static void _clock_sdmmc_config_legacy_tm() { - clk_rst_t *clk = &_clock_sdmmc_legacy_tm; + const clk_rst_t *clk = &_clock_sdmmc_legacy_tm; if (!(CLOCK(clk->enable) & BIT(clk->index))) clock_enable(clk); } diff --git a/bdk/soc/clock.h b/bdk/soc/clock.h index 4bceb24..14d1df7 100644 --- a/bdk/soc/clock.h +++ b/bdk/soc/clock.h @@ -150,6 +150,7 @@ #define CLK_RST_CONTROLLER_PLLC_MISC_2 0x5D0 #define CLK_RST_CONTROLLER_PLLC4_OUT 0x5E4 #define CLK_RST_CONTROLLER_PLLMB_BASE 0x5E8 +#define CLK_RST_CONTROLLER_PLLMB_MISC1 0x5EC #define CLK_RST_CONTROLLER_CLK_SOURCE_XUSB_FS 0x608 #define CLK_RST_CONTROLLER_CLK_SOURCE_XUSB_CORE_DEV 0x60C #define CLK_RST_CONTROLLER_CLK_SOURCE_XUSB_SS 0x610 diff --git a/bdk/soc/fuse.c b/bdk/soc/fuse.c index 60e2fe7..e0a6dc8 100644 --- a/bdk/soc/fuse.c +++ b/bdk/soc/fuse.c @@ -189,7 +189,7 @@ void fuse_read_array(u32 *words) words[i] = fuse_read(i); } -static u32 _parity32_even(u32 *words, u32 count) +static u32 _parity32_even(const u32 *words, u32 count) { u32 acc = words[0]; for (u32 i = 1; i < count; i++) @@ -303,7 +303,7 @@ int fuse_read_ipatch(void (*ipatch)(u32 offset, u32 value)) u32 words[80]; u32 word_count; u32 word_addr; - u32 word0 = 0; + u32 word0; u32 total_read = 0; word_count = FUSE(FUSE_FIRST_BOOTROM_PATCH_SIZE); @@ -363,7 +363,7 @@ int fuse_read_evp_thunk(u32 *iram_evp_thunks, u32 *iram_evp_thunks_len) u32 words[80]; u32 word_count; u32 word_addr; - u32 word0 = 0; + u32 word0; u32 total_read = 0; int evp_thunk_written = 0; void *evp_thunk_dst_addr = 0; diff --git a/bdk/soc/i2c.c b/bdk/soc/i2c.c index 81f783c..c38e952 100644 --- a/bdk/soc/i2c.c +++ b/bdk/soc/i2c.c @@ -96,7 +96,7 @@ static void _i2c_load_cfg_wait(vu32 *base) } } -static int _i2c_send_single(u32 i2c_idx, u32 dev_addr, u8 *buf, u32 size) +static int _i2c_send_single(u32 i2c_idx, u32 dev_addr, const u8 *buf, u32 size) { if (size > 8) return 0; @@ -384,7 +384,7 @@ int i2c_recv_buf_big(u8 *buf, u32 size, u32 i2c_idx, u32 dev_addr, u32 reg) return _i2c_recv_pkt(i2c_idx, buf, size, dev_addr, reg); } -int i2c_send_buf_small(u32 i2c_idx, u32 dev_addr, u32 reg, u8 *buf, u32 size) +int i2c_send_buf_small(u32 i2c_idx, u32 dev_addr, u32 reg, const u8 *buf, u32 size) { u8 tmp[8]; diff --git a/bdk/soc/i2c.h b/bdk/soc/i2c.h index a04eec1..ab3078e 100644 --- a/bdk/soc/i2c.h +++ b/bdk/soc/i2c.h @@ -31,7 +31,7 @@ void i2c_init(u32 i2c_idx); int i2c_recv_buf(u8 *buf, u32 size, u32 i2c_idx, u32 dev_addr); int i2c_send_buf_big(u32 i2c_idx, u32 dev_addr, u8 *buf, u32 size); int i2c_recv_buf_big(u8 *buf, u32 size, u32 i2c_idx, u32 dev_addr, u32 reg); -int i2c_send_buf_small(u32 i2c_idx, u32 dev_addr, u32 reg, u8 *buf, u32 size); +int i2c_send_buf_small(u32 i2c_idx, u32 dev_addr, u32 reg, const u8 *buf, u32 size); int i2c_recv_buf_small(u8 *buf, u32 size, u32 i2c_idx, u32 dev_addr, u32 reg); int i2c_send_byte(u32 i2c_idx, u32 dev_addr, u32 reg, u8 val); u8 i2c_recv_byte(u32 i2c_idx, u32 dev_addr, u32 reg); diff --git a/bdk/storage/sd.c b/bdk/storage/sd.c index f2a22ed..3ad31fa 100644 --- a/bdk/storage/sd.c +++ b/bdk/storage/sd.c @@ -274,7 +274,7 @@ void *sd_file_read(const char *path, u32 *fsize) return buf; } -int sd_save_to_file(void *buf, u32 size, const char *filename) +int sd_save_to_file(const void *buf, u32 size, const char *filename) { FIL fp; u32 res = 0; diff --git a/bdk/storage/sd.h b/bdk/storage/sd.h index 1008b65..1153996 100644 --- a/bdk/storage/sd.h +++ b/bdk/storage/sd.h @@ -61,6 +61,6 @@ void sd_unmount(); void sd_end(); bool sd_is_gpt(); void *sd_file_read(const char *path, u32 *fsize); -int sd_save_to_file(void *buf, u32 size, const char *filename); +int sd_save_to_file(const void *buf, u32 size, const char *filename); #endif \ No newline at end of file diff --git a/bdk/storage/sdmmc.c b/bdk/storage/sdmmc.c index 6fcdd5e..6458b44 100644 --- a/bdk/storage/sdmmc.c +++ b/bdk/storage/sdmmc.c @@ -33,7 +33,7 @@ u32 sd_power_cycle_time_start; -static inline u32 unstuff_bits(u32 *resp, u32 start, u32 size) +static inline u32 unstuff_bits(const u32 *resp, u32 start, u32 size) { const u32 mask = (size < 32 ? 1 << size : 0) - 1; const u32 off = 3 - ((start) / 32); @@ -783,7 +783,7 @@ static int _sd_storage_execute_app_cmd_type1(sdmmc_storage_t *storage, u32 *resp } #ifdef SDMMC_DEBUG_PRINT_SD_REGS -void _sd_storage_debug_print_cid(u32 *raw_cid) +void _sd_storage_debug_print_cid(const u32 *raw_cid) { gfx_printf("Card Identification\n"); @@ -799,7 +799,7 @@ void _sd_storage_debug_print_cid(u32 *raw_cid) gfx_printf("--RSVD-- %X\n", unstuff_bits(raw_cid, 20, 4)); } -void _sd_storage_debug_print_csd(u32 *raw_csd) +void _sd_storage_debug_print_csd(const u32 *raw_csd) { gfx_printf("\n"); @@ -836,7 +836,7 @@ void _sd_storage_debug_print_csd(u32 *raw_csd) unstuff_bits(raw_csd, 16, 5), unstuff_bits(raw_csd, 8, 2)); } -void _sd_storage_debug_print_scr(u32 *raw_scr) +void _sd_storage_debug_print_scr(const u32 *raw_scr) { u32 resp[4]; memcpy(&resp[2], raw_scr, 8); @@ -857,7 +857,7 @@ void _sd_storage_debug_print_scr(u32 *raw_scr) gfx_printf("--RSVD-- %X\n", unstuff_bits(resp, 36, 2)); } -void _sd_storage_debug_print_ssr(u8 *raw_ssr) +void _sd_storage_debug_print_ssr(const u8 *raw_ssr) { u32 raw_ssr0[4]; // 511:384. u32 raw_ssr1[4]; // 383:256. diff --git a/bdk/storage/sdmmc_driver.c b/bdk/storage/sdmmc_driver.c index 3697692..95336e2 100644 --- a/bdk/storage/sdmmc_driver.c +++ b/bdk/storage/sdmmc_driver.c @@ -575,7 +575,7 @@ static int _sdmmc_setup_read_small_block(sdmmc_t *sdmmc) return 1; } -static int _sdmmc_send_cmd(sdmmc_t *sdmmc, sdmmc_cmd_t *cmd, bool is_data_present) +static int _sdmmc_send_cmd(sdmmc_t *sdmmc, const sdmmc_cmd_t *cmd, bool is_data_present) { u16 cmdflags = 0; @@ -1025,7 +1025,7 @@ int sdmmc_stop_transmission(sdmmc_t *sdmmc, u32 *rsp) return result; } -static int _sdmmc_config_sdma(sdmmc_t *sdmmc, u32 *blkcnt_out, sdmmc_req_t *req) +static int _sdmmc_config_sdma(sdmmc_t *sdmmc, u32 *blkcnt_out, const sdmmc_req_t *req) { if (!req->blksize || !req->num_sectors) return 0; diff --git a/bdk/usb/usb_gadget_hid.c b/bdk/usb/usb_gadget_hid.c index 591649a..dc7681a 100644 --- a/bdk/usb/usb_gadget_hid.c +++ b/bdk/usb/usb_gadget_hid.c @@ -80,7 +80,7 @@ enum { static jc_cal_t jc_cal_ctx; static usb_ops_t usb_ops; -static bool _jc_calibration(jc_gamepad_rpt_t *jc_pad) +static bool _jc_calibration(const jc_gamepad_rpt_t *jc_pad) { // Calibrate left stick. if (jc_cal_ctx.cl_step != JC_CAL_MAX_STEPS) diff --git a/bdk/usb/xusbd.c b/bdk/usb/xusbd.c index 38578e7..87df551 100644 --- a/bdk/usb/xusbd.c +++ b/bdk/usb/xusbd.c @@ -1011,7 +1011,7 @@ static void _xusb_device_power_down() CLOCK(CLK_RST_CONTROLLER_CLK_ENB_W_CLR) = BIT(CLK_W_XUSB); } -static int _xusb_queue_trb(u32 ep_idx, void *trb, bool ring_doorbell) +static int _xusb_queue_trb(u32 ep_idx, const void *trb, bool ring_doorbell) { int res = USB_RES_OK; data_trb_t *next_trb; @@ -1226,7 +1226,7 @@ static int _xusb_wait_ep_stopped(u32 endpoint) return USB_RES_OK; } -static int _xusb_handle_transfer_event(transfer_event_trb_t *trb) +static int _xusb_handle_transfer_event(const transfer_event_trb_t *trb) { // Advance dequeue list. data_trb_t *next_trb; @@ -1461,7 +1461,7 @@ static int _xusb_handle_get_ep_status(u32 ep_idx) return _xusb_issue_data_trb(xusb_ep_status_descriptor, 2, USB_DIR_IN); } -static int _xusb_handle_get_class_request(usb_ctrl_setup_t *ctrl_setup) +static int _xusb_handle_get_class_request(const usb_ctrl_setup_t *ctrl_setup) { u8 _bRequest = ctrl_setup->bRequest; u16 _wIndex = ctrl_setup->wIndex; @@ -1492,7 +1492,7 @@ stall: return USB_RES_OK; } -static int _xusb_handle_get_descriptor(usb_ctrl_setup_t *ctrl_setup) +static int _xusb_handle_get_descriptor(const usb_ctrl_setup_t *ctrl_setup) { u32 size; void *descriptor; @@ -1621,7 +1621,7 @@ static int _xusb_handle_get_descriptor(usb_ctrl_setup_t *ctrl_setup) return _xusb_issue_data_trb(descriptor, size, USB_DIR_IN); } -static void _xusb_handle_set_request_dev_address(usb_ctrl_setup_t *ctrl_setup) +static void _xusb_handle_set_request_dev_address(const usb_ctrl_setup_t *ctrl_setup) { u32 addr = ctrl_setup->wValue & 0xFF; @@ -1633,7 +1633,7 @@ static void _xusb_handle_set_request_dev_address(usb_ctrl_setup_t *ctrl_setup) usbd_xotg->device_state = XUSB_ADDRESSED_STS_WAIT; } -static void _xusb_handle_set_request_configuration(usb_ctrl_setup_t *ctrl_setup) +static void _xusb_handle_set_request_configuration(const usb_ctrl_setup_t *ctrl_setup) { usbd_xotg->config_num = ctrl_setup->wValue; diff --git a/bdk/utils/ini.c b/bdk/utils/ini.c index 104b261..27a4387 100644 --- a/bdk/utils/ini.c +++ b/bdk/utils/ini.c @@ -53,7 +53,7 @@ ini_sec_t *_ini_create_section(link_t *dst, ini_sec_t *csec, char *name, u8 type return csec; } -int ini_parse(link_t *dst, char *ini_path, bool is_dir) +int ini_parse(link_t *dst, const char *ini_path, bool is_dir) { FIL fp; u32 lblen; diff --git a/bdk/utils/ini.h b/bdk/utils/ini.h index 929a850..35c13c8 100644 --- a/bdk/utils/ini.h +++ b/bdk/utils/ini.h @@ -43,7 +43,7 @@ typedef struct _ini_sec_t u32 color; } ini_sec_t; -int ini_parse(link_t *dst, char *ini_path, bool is_dir); +int ini_parse(link_t *dst, const char *ini_path, bool is_dir); char *ini_check_special_section(ini_sec_t *cfg); void ini_free(link_t *src); From 5c77601f7a83b181129bd6f89a4d5ef7455be95d Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 4 Oct 2024 21:47:26 +0300 Subject: [PATCH 227/308] bdk: ums: always allow finish reply Parse scsi cmd failures are handled internally. --- bdk/usb/usb_gadget_ums.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/bdk/usb/usb_gadget_ums.c b/bdk/usb/usb_gadget_ums.c index bb0c973..1655bd5 100644 --- a/bdk/usb/usb_gadget_ums.c +++ b/bdk/usb/usb_gadget_ums.c @@ -1936,7 +1936,9 @@ int usb_device_gadget_ums(usb_ctxt_t *usbs) _handle_ep0_ctrl(&ums); - if (_parse_scsi_cmd(&ums, &ums.bulk_ctxt) || (ums.state > UMS_STATE_NORMAL)) + _parse_scsi_cmd(&ums, &ums.bulk_ctxt); + + if (ums.state > UMS_STATE_NORMAL) continue; _handle_ep0_ctrl(&ums); From f2be59888bece0487572df137fe71af0d067fc9e Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 4 Oct 2024 21:48:44 +0300 Subject: [PATCH 228/308] bdk: add irq header to bdk header --- bdk/bdk.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/bdk/bdk.h b/bdk/bdk.h index 1cb315c..1d8a05e 100644 --- a/bdk/bdk.h +++ b/bdk/bdk.h @@ -49,6 +49,7 @@ #include #include #include +#include #include #include #include @@ -76,4 +77,4 @@ #include -#endif \ No newline at end of file +#endif From 8bf3bee08b5cbb9872c2f0cc2a932633068316c7 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 4 Oct 2024 21:52:24 +0300 Subject: [PATCH 229/308] bdk: uart: fix fifo clear - Do not clear fifo for everything if not needed - Correct fifo clear checks --- bdk/soc/uart.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/bdk/soc/uart.c b/bdk/soc/uart.c index a2efaab..c76c66e 100644 --- a/bdk/soc/uart.c +++ b/bdk/soc/uart.c @@ -174,14 +174,14 @@ void uart_empty_fifo(u32 idx, u32 which) (void)uart->UART_SPR; usleep(96); - uart->UART_IIR_FCR = UART_IIR_FCR_EN_FIFO | UART_IIR_FCR_TX_CLR | UART_IIR_FCR_RX_CLR; + uart->UART_IIR_FCR = UART_IIR_FCR_EN_FIFO | which; (void)uart->UART_SPR; usleep(18); u32 tries = 0; if (UART_IIR_FCR_TX_CLR & which) { - while (tries < 10 && uart->UART_LSR & UART_LSR_TMTY) + while (tries < 10 && !(uart->UART_LSR & UART_LSR_TMTY)) { tries++; usleep(100); @@ -191,7 +191,7 @@ void uart_empty_fifo(u32 idx, u32 which) if (UART_IIR_FCR_RX_CLR & which) { - while (tries < 10 && !uart->UART_LSR & UART_LSR_RDR) + while (tries < 10 && (uart->UART_LSR & UART_LSR_RDR)) { tries++; usleep(100); From 1a98e3a702dbe60a716ebeebadb07498055c81fb Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 4 Oct 2024 21:53:17 +0300 Subject: [PATCH 230/308] bdk: irq: disable irq if handler error --- bdk/soc/irq.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/bdk/soc/irq.c b/bdk/soc/irq.c index f100dba..f39774e 100644 --- a/bdk/soc/irq.c +++ b/bdk/soc/irq.c @@ -124,8 +124,8 @@ static irq_status_t _irq_handle_source(u32 irq) } } - // Do not re-enable if not handled. - if (status == IRQ_NONE) + // Do not re-enable if not handled or error. + if (status != IRQ_HANDLED) return status; if (irqs[idx].flags & IRQ_FLAG_ONE_OFF) From edf00d8e5190369d5c703ee056d615221a58ba70 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 4 Oct 2024 21:54:58 +0300 Subject: [PATCH 231/308] bdk: bpmp: add state set function Some states are controlled via software. So add a function for that. --- bdk/soc/bpmp.c | 8 ++++++++ bdk/soc/bpmp.h | 11 +++++++++++ 2 files changed, 19 insertions(+) diff --git a/bdk/soc/bpmp.c b/bdk/soc/bpmp.c index e563d45..3979c2a 100644 --- a/bdk/soc/bpmp.c +++ b/bdk/soc/bpmp.c @@ -237,6 +237,7 @@ void bpmp_clk_rate_relaxed(bool enable) // APB clock affects RTC, PWM, MEMFETCH, APE, USB, SOR PWM, // I2C host, DC/DSI/DISP. UART gives extra stress. // 92: 100% success ratio. 93-94: 595-602MHz has 99% success ratio. 95: 608MHz less. +// APB clock max is supposed to be 204 MHz though. static const u8 pll_divn[] = { 0, // BPMP_CLK_NORMAL: 408MHz 0% - 136MHz APB. 85, // BPMP_CLK_HIGH_BOOST: 544MHz 33% - 136MHz APB. @@ -300,6 +301,13 @@ void bpmp_clk_rate_set(bpmp_freq_t fid) } } +// State is reset to RUN on any clock or source set via SW. +void bpmp_state_set(bpmp_state_t state) +{ + u32 cfg = CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) & ~0xF0000000u; + CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) = cfg | (state << 28u); +} + // The following functions halt BPMP to reduce power while sleeping. // They are not as accurate as RTC at big values but they guarantee time+ delay. void bpmp_usleep(u32 us) diff --git a/bdk/soc/bpmp.h b/bdk/soc/bpmp.h index 129ea57..ace1290 100644 --- a/bdk/soc/bpmp.h +++ b/bdk/soc/bpmp.h @@ -54,6 +54,16 @@ typedef enum BPMP_CLK_MAX } bpmp_freq_t; +typedef enum +{ + BPMP_STATE_STANDBY = 0, // 32KHz. + BPMP_STATE_IDLE = 1, + BPMP_STATE_RUN = 2, + + BPMP_STATE_IRQ = BIT(2), + BPMP_STATE_FIQ = BIT(3), +} bpmp_state_t; + #define BPMP_CLK_LOWEST_BOOST BPMP_CLK_HIGH2_BOOST #define BPMP_CLK_LOWER_BOOST BPMP_CLK_SUPER_BOOST #define BPMP_CLK_DEFAULT_BOOST BPMP_CLK_HYPER_BOOST @@ -65,6 +75,7 @@ void bpmp_mmu_disable(); void bpmp_clk_rate_relaxed(bool enable); void bpmp_clk_rate_get(); void bpmp_clk_rate_set(bpmp_freq_t fid); +void bpmp_state_set(bpmp_state_t state); void bpmp_usleep(u32 us); void bpmp_msleep(u32 ms); void bpmp_halt(); From 0acdefb32a62d07cd8f4c50a21ff7bcf5911414e Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 4 Oct 2024 22:02:34 +0300 Subject: [PATCH 232/308] hekate: info: remove input voltage limit It's a useless metric and in HOS it's used incorrectly. --- bootloader/frontend/fe_info.c | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) diff --git a/bootloader/frontend/fe_info.c b/bootloader/frontend/fe_info.c index d1beaba..67bcfba 100644 --- a/bootloader/frontend/fe_info.c +++ b/bootloader/frontend/fe_info.c @@ -313,23 +313,20 @@ void print_battery_charger_info() gfx_printf("%k\n\nBattery Charger Info:\n%k", TXT_CLR_CYAN_L, TXT_CLR_DEFAULT); - bq24193_get_property(BQ24193_InputVoltageLimit, &value); - gfx_printf("Input voltage limit: %4d mV\n", value); - bq24193_get_property(BQ24193_InputCurrentLimit, &value); - gfx_printf("Input current limit: %4d mA\n", value); + gfx_printf("Input current limit: %4d mA\n", value); bq24193_get_property(BQ24193_SystemMinimumVoltage, &value); - gfx_printf("Min voltage limit: %4d mV\n", value); + gfx_printf("System voltage limit: %4d mV\n", value); bq24193_get_property(BQ24193_FastChargeCurrentLimit, &value); - gfx_printf("Fast charge current limit: %4d mA\n", value); + gfx_printf("Charge current limit: %4d mA\n", value); bq24193_get_property(BQ24193_ChargeVoltageLimit, &value); - gfx_printf("Charge voltage limit: %4d mV\n", value); + gfx_printf("Charge voltage limit: %4d mV\n", value); bq24193_get_property(BQ24193_ChargeStatus, &value); - gfx_printf("Charge status: "); + gfx_printf("Charge status: "); switch (value) { case 0: @@ -349,7 +346,7 @@ void print_battery_charger_info() break; } bq24193_get_property(BQ24193_TempStatus, &value); - gfx_printf("Temperature status: "); + gfx_printf("Temperature status: "); switch (value) { case 0: From c422d63b649d27967a0e16fb1b049bd09b114874 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 4 Oct 2024 22:04:56 +0300 Subject: [PATCH 233/308] hekate: tools: fix menu memleak --- bootloader/frontend/fe_tools.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/bootloader/frontend/fe_tools.c b/bootloader/frontend/fe_tools.c index 61b6174..eb47fb0 100644 --- a/bootloader/frontend/fe_tools.c +++ b/bootloader/frontend/fe_tools.c @@ -155,6 +155,8 @@ void menu_autorcm() tui_do_menu(&menu); emmc_end(); + + free(ments); } #pragma GCC pop_options From 7b60c3d1620b9cda93ee2cbf54b935b24b8abd5a Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 4 Oct 2024 22:09:06 +0300 Subject: [PATCH 234/308] hekate/nyx: constify more args --- bootloader/hos/fss.c | 2 +- bootloader/hos/pkg2.c | 2 +- bootloader/hos/pkg2.h | 2 +- bootloader/hos/pkg2_ini_kippatch.c | 8 ++++---- bootloader/hos/pkg2_ini_kippatch.h | 2 +- bootloader/l4t/l4t.c | 2 +- bootloader/main.c | 2 +- nyx/nyx_gui/frontend/fe_emmc_tools.c | 4 ++-- nyx/nyx_gui/frontend/fe_emummc_tools.c | 2 +- nyx/nyx_gui/frontend/gui_tools_partition_manager.c | 4 ++-- 10 files changed, 15 insertions(+), 15 deletions(-) diff --git a/bootloader/hos/fss.c b/bootloader/hos/fss.c index 6bb66f0..42e6312 100644 --- a/bootloader/hos/fss.c +++ b/bootloader/hos/fss.c @@ -31,7 +31,7 @@ extern hekate_config h_cfg; -extern bool is_ipl_updated(void *buf, char *path, bool force); +extern bool is_ipl_updated(void *buf, const char *path, bool force); // FSS0 Magic and Meta header offset. #define FSS0_MAGIC 0x30535346 diff --git a/bootloader/hos/pkg2.c b/bootloader/hos/pkg2.c index 290b6b6..5158f6e 100644 --- a/bootloader/hos/pkg2.c +++ b/bootloader/hos/pkg2.c @@ -170,7 +170,7 @@ static void parse_external_kip_patches() ext_patches_parsed = true; } -const pkg2_kernel_id_t *pkg2_identify(u8 *hash) +const pkg2_kernel_id_t *pkg2_identify(const u8 *hash) { for (u32 i = 0; i < ARRAY_SIZE(_pkg2_kernel_ids); i++) { diff --git a/bootloader/hos/pkg2.h b/bootloader/hos/pkg2.h index 7bd2449..e99b20e 100644 --- a/bootloader/hos/pkg2.h +++ b/bootloader/hos/pkg2.h @@ -159,7 +159,7 @@ void pkg2_merge_kip(link_t *info, pkg2_kip1_t *kip1); void pkg2_get_ids(kip1_id_t **ids, u32 *entries); const char *pkg2_patch_kips(link_t *info, char *patch_names); -const pkg2_kernel_id_t *pkg2_identify(u8 *hash); +const pkg2_kernel_id_t *pkg2_identify(const u8 *hash); pkg2_hdr_t *pkg2_decrypt(void *data, u8 kb, bool is_exo); void pkg2_build_encrypt(void *dst, void *hos_ctxt, link_t *kips_info, bool is_exo); diff --git a/bootloader/hos/pkg2_ini_kippatch.c b/bootloader/hos/pkg2_ini_kippatch.c index 08aa5ad..9567eef 100644 --- a/bootloader/hos/pkg2_ini_kippatch.c +++ b/bootloader/hos/pkg2_ini_kippatch.c @@ -95,7 +95,7 @@ static ini_kip_sec_t *_ini_create_kip_section(link_t *dst, ini_kip_sec_t *ksec, return ksec; } -int ini_patch_parse(link_t *dst, char *ini_path) +int ini_patch_parse(link_t *dst, const char *ini_path) { FIL fp; u32 lblen; @@ -154,15 +154,15 @@ int ini_patch_parse(link_t *dst, char *ini_path) pt->length = strtol(&lbuf[pos], NULL, 16); pos += str_start + 1; - u8 *buf = malloc(pt->length * 2); + u8 *data = malloc(pt->length * 2); // Set patch source data. str_start = _find_patch_section_name(&lbuf[pos], lblen - pos, ','); - pt->src_data = _htoa(NULL, &lbuf[pos], pt->length, buf); + pt->src_data = _htoa(NULL, &lbuf[pos], pt->length, data); pos += str_start + 1; // Set patch destination data. - pt->dst_data = _htoa(NULL, &lbuf[pos], pt->length, buf + pt->length); + pt->dst_data = _htoa(NULL, &lbuf[pos], pt->length, data + pt->length); } list_append(&ksec->pts, &pt->link); diff --git a/bootloader/hos/pkg2_ini_kippatch.h b/bootloader/hos/pkg2_ini_kippatch.h index e32f040..07881c1 100644 --- a/bootloader/hos/pkg2_ini_kippatch.h +++ b/bootloader/hos/pkg2_ini_kippatch.h @@ -37,6 +37,6 @@ typedef struct _ini_kip_sec_t link_t link; } ini_kip_sec_t; -int ini_patch_parse(link_t *dst, char *ini_path); +int ini_patch_parse(link_t *dst, const char *ini_path); #endif diff --git a/bootloader/l4t/l4t.c b/bootloader/l4t/l4t.c index bcc025c..c731017 100644 --- a/bootloader/l4t/l4t.c +++ b/bootloader/l4t/l4t.c @@ -851,7 +851,7 @@ static int _l4t_sc7_exit_config(bool t210b01) return 1; } -static void _l4t_bl33_cfg_set_key(char *env, char *key, char *val) +static void _l4t_bl33_cfg_set_key(char *env, const char *key, const char *val) { strcat(env, key); strcat(env, "="); diff --git a/bootloader/main.c b/bootloader/main.c index d3e0cf9..6867474 100644 --- a/bootloader/main.c +++ b/bootloader/main.c @@ -120,7 +120,7 @@ static void _reloc_patcher(u32 payload_dst, u32 payload_src, u32 payload_size) } } -bool is_ipl_updated(void *buf, char *path, bool force) +bool is_ipl_updated(void *buf, const char *path, bool force) { ipl_ver_meta_t *update_ft = (ipl_ver_meta_t *)(buf + PATCHED_RELOC_SZ + sizeof(boot_cfg_t)); diff --git a/nyx/nyx_gui/frontend/fe_emmc_tools.c b/nyx/nyx_gui/frontend/fe_emmc_tools.c index 3562594..b49929c 100644 --- a/nyx/nyx_gui/frontend/fe_emmc_tools.c +++ b/nyx/nyx_gui/frontend/fe_emmc_tools.c @@ -105,7 +105,7 @@ static void _get_valid_partition(u32 *sector_start, u32 *sector_size, u32 *part_ *sector_start = *sector_start + 0x8000; } -static lv_obj_t *create_mbox_text(char *text, bool button_ok) +static lv_obj_t *create_mbox_text(const char *text, bool button_ok) { lv_obj_t *dark_bg = lv_obj_create(lv_scr_act(), NULL); lv_obj_set_style(dark_bg, &mbox_darken); @@ -137,7 +137,7 @@ static void _update_filename(char *outFilename, u32 sdPathLen, u32 currPartIdx) itoa(currPartIdx, &outFilename[sdPathLen], 10); } -static int _dump_emmc_verify(emmc_tool_gui_t *gui, sdmmc_storage_t *storage, u32 lba_curr, char *outFilename, emmc_part_t *part) +static int _dump_emmc_verify(emmc_tool_gui_t *gui, sdmmc_storage_t *storage, u32 lba_curr, const char *outFilename, const emmc_part_t *part) { FIL fp; FIL hashFp; diff --git a/nyx/nyx_gui/frontend/fe_emummc_tools.c b/nyx/nyx_gui/frontend/fe_emummc_tools.c index 929a936..d4a1a96 100644 --- a/nyx/nyx_gui/frontend/fe_emummc_tools.c +++ b/nyx/nyx_gui/frontend/fe_emummc_tools.c @@ -143,7 +143,7 @@ void update_emummc_base_folder(char *outFilename, u32 sdPathLen, u32 currPartIdx itoa(currPartIdx, &outFilename[sdPathLen], 10); } -static int _dump_emummc_file_part(emmc_tool_gui_t *gui, char *sd_path, sdmmc_storage_t *storage, emmc_part_t *part) +static int _dump_emummc_file_part(emmc_tool_gui_t *gui, char *sd_path, sdmmc_storage_t *storage, const emmc_part_t *part) { static const u32 FAT32_FILESIZE_LIMIT = 0xFFFFFFFF; static const u32 SECTORS_TO_MIB_COEFF = 11; diff --git a/nyx/nyx_gui/frontend/gui_tools_partition_manager.c b/nyx/nyx_gui/frontend/gui_tools_partition_manager.c index 114035c..c46feda 100644 --- a/nyx/nyx_gui/frontend/gui_tools_partition_manager.c +++ b/nyx/nyx_gui/frontend/gui_tools_partition_manager.c @@ -85,7 +85,7 @@ l4t_flasher_ctxt_t l4t_flash_ctxt; lv_obj_t *btn_flash_l4t; lv_obj_t *btn_flash_android; -int _copy_file(const char *src, const char *dst, char *path) +int _copy_file(const char *src, const char *dst, const char *path) { FIL fp_src; FIL fp_dst; @@ -265,7 +265,7 @@ out: return res; } -static void _create_gpt_partition(gpt_t *gpt, u8 *gpt_idx, u32 *curr_part_lba, u32 size_lba, char *name, int name_size) +static void _create_gpt_partition(gpt_t *gpt, u8 *gpt_idx, u32 *curr_part_lba, u32 size_lba, const char *name, int name_size) { static const u8 linux_part_guid[] = { 0xAF, 0x3D, 0xC6, 0x0F, 0x83, 0x84, 0x72, 0x47, 0x8E, 0x79, 0x3D, 0x69, 0xD8, 0x47, 0x7D, 0xE4 }; u8 random_number[16]; From 66454b934c939c2f432cbbf8cf10a4a3bd7f14a0 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 4 Oct 2024 22:09:54 +0300 Subject: [PATCH 235/308] hos: no need to double check allocated eks --- bootloader/hos/hos.c | 2 +- nyx/nyx_gui/hos/hos.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/bootloader/hos/hos.c b/bootloader/hos/hos.c index 3c6c2d9..a4c8a06 100644 --- a/bootloader/hos/hos.c +++ b/bootloader/hos/hos.c @@ -381,7 +381,7 @@ int hos_keygen(void *keyblob, u32 kb, tsec_ctxt_t *tsec_ctxt, bool stock, bool i _hos_eks_get(); // Use tsec keygen for old firmware or if EKS keys does not exist for newer. - if (kb <= HOS_KB_VERSION_620 || !h_cfg.eks || (h_cfg.eks && h_cfg.eks->enabled != HOS_EKS_TSEC_VER)) + if (kb <= HOS_KB_VERSION_620 || !h_cfg.eks || (h_cfg.eks->enabled != HOS_EKS_TSEC_VER)) use_tsec = true; if (kb <= HOS_KB_VERSION_600) diff --git a/nyx/nyx_gui/hos/hos.c b/nyx/nyx_gui/hos/hos.c index 94dd00b..be39306 100644 --- a/nyx/nyx_gui/hos/hos.c +++ b/nyx/nyx_gui/hos/hos.c @@ -363,7 +363,7 @@ int hos_keygen(void *keyblob, u32 kb, tsec_ctxt_t *tsec_ctxt) _hos_eks_get(); // Use tsec keygen for old firmware or if EKS keys does not exist for newer. - if (kb <= HOS_KB_VERSION_620 || !h_cfg.eks || (h_cfg.eks && h_cfg.eks->enabled != HOS_EKS_TSEC_VER)) + if (kb <= HOS_KB_VERSION_620 || !h_cfg.eks || (h_cfg.eks->enabled != HOS_EKS_TSEC_VER)) use_tsec = true; if (kb <= HOS_KB_VERSION_600) From 75676a78ffefc920420c1544f90055e99596bd94 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 4 Oct 2024 22:10:50 +0300 Subject: [PATCH 236/308] hos: secmon name ini lists properly --- bootloader/hos/secmon_exo.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/bootloader/hos/secmon_exo.c b/bootloader/hos/secmon_exo.c index f060f3a..a1dc7c3 100644 --- a/bootloader/hos/secmon_exo.c +++ b/bootloader/hos/secmon_exo.c @@ -207,10 +207,10 @@ void config_exosphere(launch_ctxt_t *ctxt, u32 warmboot_base) // Parse exosphere.ini. if (!ctxt->stock) { - LIST_INIT(ini_sections); - if (ini_parse(&ini_sections, "exosphere.ini", false)) + LIST_INIT(ini_exo_sections); + if (ini_parse(&ini_exo_sections, "exosphere.ini", false)) { - LIST_FOREACH_ENTRY(ini_sec_t, ini_sec, &ini_sections, link) + LIST_FOREACH_ENTRY(ini_sec_t, ini_sec, &ini_exo_sections, link) { // Only parse exosphere section. if (!(ini_sec->type == INI_CHOICE) || strcmp(ini_sec->name, "exosphere")) @@ -245,10 +245,10 @@ void config_exosphere(launch_ctxt_t *ctxt, u32 warmboot_base) // Parse usb mtim settings. Avoid parsing if it's overridden. if (!ctxt->exo_ctx.usb3_force) { - LIST_INIT(ini_sections); - if (ini_parse(&ini_sections, "atmosphere/config/system_settings.ini", false)) + LIST_INIT(ini_sys_sections); + if (ini_parse(&ini_sys_sections, "atmosphere/config/system_settings.ini", false)) { - LIST_FOREACH_ENTRY(ini_sec_t, ini_sec, &ini_sections, link) + LIST_FOREACH_ENTRY(ini_sec_t, ini_sec, &ini_sys_sections, link) { // Only parse usb section. if (!(ini_sec->type == INI_CHOICE) || strcmp(ini_sec->name, "usb")) From 9da514939415e16b26a7b5f75e085c30155c677e Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 4 Oct 2024 22:11:41 +0300 Subject: [PATCH 237/308] minerva: correct init done type --- modules/hekate_libsys_minerva/mtc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/modules/hekate_libsys_minerva/mtc.h b/modules/hekate_libsys_minerva/mtc.h index 3a80e2c..860c7d7 100644 --- a/modules/hekate_libsys_minerva/mtc.h +++ b/modules/hekate_libsys_minerva/mtc.h @@ -85,7 +85,7 @@ typedef struct bool emc_2X_clk_src_is_pllmb; bool fsp_for_src_freq; bool train_ram_patterns; - bool init_done; + u32 init_done; } mtc_config_t; enum train_mode_t From 34f8692f5cc7260d57cc92d6bff0f1e31dddf2ae Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 4 Oct 2024 22:12:53 +0300 Subject: [PATCH 238/308] nyx: do not use global cal0 buf name --- nyx/nyx_gui/frontend/fe_emummc_tools.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/nyx/nyx_gui/frontend/fe_emummc_tools.c b/nyx/nyx_gui/frontend/fe_emummc_tools.c index d4a1a96..2fd7006 100644 --- a/nyx/nyx_gui/frontend/fe_emummc_tools.c +++ b/nyx/nyx_gui/frontend/fe_emummc_tools.c @@ -779,7 +779,7 @@ static int _emummc_raw_derive_bis_keys(emmc_tool_gui_t *gui, u32 resized_count) // Generate BIS keys. hos_bis_keygen(); - u8 *cal0_buf = malloc(SZ_64K); + u8 *cal0_buff = malloc(SZ_64K); // Read and decrypt CAL0 for validation of working BIS keys. emmc_set_partition(EMMC_GPP); @@ -787,11 +787,11 @@ static int _emummc_raw_derive_bis_keys(emmc_tool_gui_t *gui, u32 resized_count) emmc_gpt_parse(&gpt); emmc_part_t *cal0_part = emmc_part_find(&gpt, "PRODINFO"); // check if null nx_emmc_bis_init(cal0_part, false, 0); - nx_emmc_bis_read(0, 0x40, cal0_buf); + nx_emmc_bis_read(0, 0x40, cal0_buff); nx_emmc_bis_end(); emmc_gpt_free(&gpt); - nx_emmc_cal0_t *cal0 = (nx_emmc_cal0_t *)cal0_buf; + nx_emmc_cal0_t *cal0 = (nx_emmc_cal0_t *)cal0_buff; // Check keys validity. if (memcmp(&cal0->magic, "CAL0", 4)) @@ -803,7 +803,7 @@ static int _emummc_raw_derive_bis_keys(emmc_tool_gui_t *gui, u32 resized_count) error = true; } - free(cal0_buf); + free(cal0_buff); if (error) { From 9463f8aa7da7e14fae0996e8f46413f0cebaff8c Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 4 Oct 2024 22:14:23 +0300 Subject: [PATCH 239/308] nyx: fix memleak when 10 launcher items are shown --- nyx/nyx_gui/frontend/gui.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui.c b/nyx/nyx_gui/frontend/gui.c index 9ba72fe..7ed7954 100644 --- a/nyx/nyx_gui/frontend/gui.c +++ b/nyx/nyx_gui/frontend/gui.c @@ -1440,15 +1440,15 @@ static lv_res_t _launch_more_cfg_action(lv_obj_t *btn) static lv_res_t _win_launch_close_action(lv_obj_t * btn) { // Cleanup icons. - for (u32 i = 0; i < 8; i++) + for (u32 i = 0; i < (n_cfg.entries_5_col ? 10 : 8); i++) { - lv_obj_t *btn = launch_ctxt.btn[i]; - lv_btn_ext_t *ext = lv_obj_get_ext_attr(btn); + lv_obj_t *btns = launch_ctxt.btn[i]; + lv_btn_ext_t *ext = lv_obj_get_ext_attr(btns); if (ext->idx) { // This gets latest object, which is the button overlay. So iterate 2 times. - lv_obj_t * img = lv_obj_get_child(btn, NULL); - img = lv_obj_get_child(btn, img); + lv_obj_t * img = lv_obj_get_child(btns, NULL); + img = lv_obj_get_child(btns, img); lv_img_dsc_t *src = (lv_img_dsc_t *)lv_img_get_src(img); From 0e23d0e0fdc0cf1b0a91bce43ca9b64532d4d804 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 4 Oct 2024 22:14:51 +0300 Subject: [PATCH 240/308] nyx: name button list object appropriately --- nyx/nyx_gui/frontend/gui.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui.c b/nyx/nyx_gui/frontend/gui.c index 7ed7954..ca7bfa3 100644 --- a/nyx/nyx_gui/frontend/gui.c +++ b/nyx/nyx_gui/frontend/gui.c @@ -1832,7 +1832,7 @@ ini_parsing: } // Add button mask/radius and align icon. - lv_obj_t *btn = lv_btn_create(launch_ctxt.btn[curr_btn_idx], NULL); + lv_obj_t *btns = lv_btn_create(launch_ctxt.btn[curr_btn_idx], NULL); u32 btn_width = 200; u32 btn_height = 200; if (img_noborder) @@ -1848,25 +1848,25 @@ ini_parsing: lv_btn_set_style(launch_ctxt.btn[curr_btn_idx], LV_BTN_STYLE_REL, &btn_home_noborder_rel); lv_btn_set_style(launch_ctxt.btn[curr_btn_idx], LV_BTN_STYLE_PR, &btn_home_noborder_rel); } - lv_obj_set_size(btn, btn_width, btn_height); - lv_btn_set_style(btn, LV_BTN_STYLE_REL, img_noborder ? &btn_home_noborder_rel : &btn_home_transp_rel); - lv_btn_set_style(btn, LV_BTN_STYLE_PR, &btn_home_transp_pr); + lv_obj_set_size(btns, btn_width, btn_height); + lv_btn_set_style(btns, LV_BTN_STYLE_REL, img_noborder ? &btn_home_noborder_rel : &btn_home_transp_rel); + lv_btn_set_style(btns, LV_BTN_STYLE_PR, &btn_home_transp_pr); if (img) lv_obj_align(img, NULL, LV_ALIGN_CENTER, 0, 0); if (img_noborder) - lv_obj_align(btn, NULL, LV_ALIGN_CENTER, 0, 0); + lv_obj_align(btns, NULL, LV_ALIGN_CENTER, 0, 0); // Set autoboot index. - ext = lv_obj_get_ext_attr(btn); + ext = lv_obj_get_ext_attr(btns); ext->idx = entry_idx; ext = lv_obj_get_ext_attr(launch_ctxt.btn[curr_btn_idx]); // Redundancy. ext->idx = entry_idx; // Set action. if (!more_cfg) - lv_btn_set_action(btn, LV_BTN_ACTION_CLICK, _launch_action); + lv_btn_set_action(btns, LV_BTN_ACTION_CLICK, _launch_action); else - lv_btn_set_action(btn, LV_BTN_ACTION_CLICK, _launch_more_cfg_action); + lv_btn_set_action(btns, LV_BTN_ACTION_CLICK, _launch_more_cfg_action); // Set button's label text. lv_label_set_text(launch_ctxt.label[curr_btn_idx], ini_sec->name); From 63c4bdd7d9051c87eabbb94b1e3a1f242c509d60 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 4 Oct 2024 22:16:36 +0300 Subject: [PATCH 241/308] nyx: no need to double check for errors --- nyx/nyx_gui/frontend/gui_options.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_options.c b/nyx/nyx_gui/frontend/gui_options.c index 3d78007..66e4014 100644 --- a/nyx/nyx_gui/frontend/gui_options.c +++ b/nyx/nyx_gui/frontend/gui_options.c @@ -954,8 +954,8 @@ save_data: cal0->gyro_offset[0], cal0->gyro_offset[1], cal0->gyro_offset[2], cal0->gyro_scale[0], cal0->gyro_scale[1], cal0->gyro_scale[2], cal0->bd_mac[0], cal0->bd_mac[1], cal0->bd_mac[2], cal0->bd_mac[3], cal0->bd_mac[4], cal0->bd_mac[5]); - if (!error) - error = f_open(&fp, "switchroot/switch.cal", FA_WRITE | FA_CREATE_ALWAYS) ? 4 : 0; + + error = f_open(&fp, "switchroot/switch.cal", FA_WRITE | FA_CREATE_ALWAYS) ? 4 : 0; if (!error) { f_puts(data, &fp); From cdc1012f500e6e7d6bd1ce8ab0c6f3352920cf4c Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 4 Oct 2024 22:18:20 +0300 Subject: [PATCH 242/308] nyx: part manager: add version on android button Check partition scheme for android and add the version on the flash button --- .../frontend/gui_tools_partition_manager.c | 38 +++++++++++++------ 1 file changed, 26 insertions(+), 12 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_tools_partition_manager.c b/nyx/nyx_gui/frontend/gui_tools_partition_manager.c index c46feda..c6a9cbd 100644 --- a/nyx/nyx_gui/frontend/gui_tools_partition_manager.c +++ b/nyx/nyx_gui/frontend/gui_tools_partition_manager.c @@ -813,7 +813,7 @@ static u32 _get_available_l4t_partition() return size_sct; } -static bool _get_available_android_partition() +static int _get_available_android_partition() { gpt_t *gpt = zalloc(sizeof(gpt_t)); @@ -827,11 +827,17 @@ static bool _get_available_android_partition() // Find kernel partition. for (u32 i = 0; i < gpt->header.num_part_ents; i++) { - if (gpt->entries[i].lba_start && (!memcmp(gpt->entries[i].name, (char[]) { 'L', 0, 'N', 0, 'X', 0 }, 6) || !memcmp(gpt->entries[i].name, (char[]) { 'b', 0, 'o', 0, 'o', 0, 't', 0 }, 8))) + if (gpt->entries[i].lba_start) { - free(gpt); + int found = !memcmp(gpt->entries[i].name, (char[]) { 'b', 0, 'o', 0, 'o', 0, 't', 0 }, 8) ? 2 : 0; + found |= !memcmp(gpt->entries[i].name, (char[]) { 'L', 0, 'N', 0, 'X', 0 }, 6) ? 1 : 0; - return true; + if (found) + { + free(gpt); + + return found; + } } if (i > 126) @@ -882,7 +888,7 @@ static lv_res_t _action_check_flash_linux(lv_obj_t *btn) // Find an applicable partition for L4T. u32 size_sct = _get_available_l4t_partition(); - if (!l4t_flash_ctxt.offset_sct || !size_sct || size_sct < 0x800000) + if (!l4t_flash_ctxt.offset_sct || size_sct < 0x800000) { lv_label_set_text(lbl_status, "#FFDD00 Error:# No partition found!"); goto error; @@ -2748,26 +2754,34 @@ lv_res_t create_window_partition_manager(lv_obj_t *btn) // Disable Flash Linux button if partition not found. u32 size_sct = _get_available_l4t_partition(); - if (!l4t_flash_ctxt.offset_sct || !size_sct || size_sct < 0x800000) + if (!l4t_flash_ctxt.offset_sct || size_sct < 0x800000) { lv_obj_set_click(btn_flash_l4t, false); lv_btn_set_state(btn_flash_l4t, LV_BTN_STATE_INA); } + int part_type_and = _get_available_android_partition(); + // Create Flash Android button. btn_flash_android = lv_btn_create(h1, NULL); label_btn = lv_label_create(btn_flash_android, NULL); lv_btn_set_fit(btn_flash_android, true, true); - lv_label_set_static_text(label_btn, SYMBOL_DOWNLOAD" Flash Android"); - lv_obj_align(btn_flash_android, btn_flash_l4t, LV_ALIGN_OUT_RIGHT_MID, LV_DPI / 3, 0); - lv_btn_set_action(btn_flash_android, LV_BTN_ACTION_CLICK, _action_flash_android); - - // Disable Flash Android button if partition not found. - if (!_get_available_android_partition()) + switch (part_type_and) { + case 0: // Disable Flash Android button if partition not found. + lv_label_set_static_text(label_btn, SYMBOL_DOWNLOAD" Flash Android"); lv_obj_set_click(btn_flash_android, false); lv_btn_set_state(btn_flash_android, LV_BTN_STATE_INA); + break; + case 1: // Android 10/11. + lv_label_set_static_text(label_btn, SYMBOL_DOWNLOAD" Flash Android 10/11"); + break; + case 2: // Android 13+ + lv_label_set_static_text(label_btn, SYMBOL_DOWNLOAD" Flash Android 13+"); + break; } + lv_obj_align(btn_flash_android, btn_flash_l4t, LV_ALIGN_OUT_RIGHT_MID, LV_DPI / 3, 0); + lv_btn_set_action(btn_flash_android, LV_BTN_ACTION_CLICK, _action_flash_android); // Create next step button. btn1 = lv_btn_create(h1, NULL); From 69acef4db3227f769c94ca6990bde28c9c697468 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 4 Oct 2024 22:19:01 +0300 Subject: [PATCH 243/308] nyx: part manager: change GPT partition colour Since many confuse that on MBR --- nyx/nyx_gui/frontend/gui_tools_partition_manager.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_tools_partition_manager.c b/nyx/nyx_gui/frontend/gui_tools_partition_manager.c index c6a9cbd..fc1572d 100644 --- a/nyx/nyx_gui/frontend/gui_tools_partition_manager.c +++ b/nyx/nyx_gui/frontend/gui_tools_partition_manager.c @@ -2057,9 +2057,9 @@ static void _create_mbox_check_files_total_size() bar_l4t_ind.body.main_color = LV_COLOR_HEX(0x00DDFF); bar_l4t_ind.body.grad_color = bar_l4t_ind.body.main_color; - // Set Android bar style. + // Set GPT bar style. lv_style_copy(&bar_and_ind, lv_theme_get_current()->bar.indic); - bar_and_ind.body.main_color = LV_COLOR_HEX(0xFF8000); + bar_and_ind.body.main_color = LV_COLOR_HEX(0xC000FF); bar_and_ind.body.grad_color = bar_and_ind.body.main_color; // Set separator styles. @@ -2071,7 +2071,7 @@ static void _create_mbox_check_files_total_size() sep_l4t_bg.body.main_color = LV_COLOR_HEX(0x00DDFF); sep_l4t_bg.body.grad_color = sep_l4t_bg.body.main_color; lv_style_copy(&sep_and_bg, &sep_emu_bg); - sep_and_bg.body.main_color = LV_COLOR_HEX(0xFF8000); + sep_and_bg.body.main_color = LV_COLOR_HEX(0xC000FF); sep_and_bg.body.grad_color = sep_and_bg.body.main_color; char *txt_buf = malloc(SZ_8K); From f15af0172716d50a6318a184281533ba052debdd Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 9 Oct 2024 15:10:23 +0300 Subject: [PATCH 244/308] readme: explain what stock basically is even more --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index f8f5a29..3405834 100644 --- a/README.md +++ b/README.md @@ -106,7 +106,7 @@ There are four possible type of entries. "**[ ]**": Boot entry, "**{ }**": Capti | emupath={FOLDER path} | Forces emuMMC to use the selected one. (=emuMMC/RAW1, =emuMMC/SD00, etc). emuMMC must be created by hekate because it uses the raw_based/file_based files. | | emummcforce=1 | Forces the use of emuMMC. If emummc.ini is disabled or not found, then it causes an error. | | emummc_force_disable=1 | Disables emuMMC, if it's enabled. | -| stock=1 | Disables unneeded kernel patching and CFW kips when running stock or semi-stock. `If emuMMC is enabled, emummc_force_disable=1` is required. emuMMC is not supported on stock. If additional KIPs are needed other than OFW's, you can define them with `kip1` key. No kip should be used that relies on Atmosphère patching, because it will hang. If `NOGC` is needed, use `kip1patch=nogc`. | +| stock=1 | OFW via hekate bootloader. Disables unneeded kernel patching and CFW kips when running stock. `If emuMMC is enabled, emummc_force_disable=1` is required. emuMMC is not supported on stock. If additional KIPs are needed other than OFW's, you can define them with `kip1` key. No kip should be used that relies on Atmosphère patching, because it will hang. If `NOGC` is needed, use `kip1patch=nogc`. | | fullsvcperm=1 | Disables SVC verification (full services permission). Doesn't work with Mesosphere as kernel. | | debugmode=1 | Enables Debug mode. Obsolete when used with exosphere as secmon. | | atmosphere=1 | Enables Atmosphère patching. Not needed when `fss0` is used. | From d2fc6379c6d040fb1e8fb2523876c99356a28703 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 9 Oct 2024 15:14:44 +0300 Subject: [PATCH 245/308] bdk: utils: improve dirlist Stop doing unnecessary copies during reordering and use pointers for that. --- bdk/utils/dirlist.c | 42 +++++++++++++++++++++--------------------- bdk/utils/dirlist.h | 12 ++++++++++-- bdk/utils/ini.c | 6 +++--- 3 files changed, 34 insertions(+), 26 deletions(-) diff --git a/bdk/utils/dirlist.c b/bdk/utils/dirlist.c index 5197c01..77174aa 100644 --- a/bdk/utils/dirlist.c +++ b/bdk/utils/dirlist.c @@ -17,21 +17,23 @@ #include #include +#include "dirlist.h" #include #include #include -#define MAX_ENTRIES 64 - -char *dirlist(const char *directory, const char *pattern, bool includeHiddenFiles, bool parse_dirs) +dirlist_t *dirlist(const char *directory, const char *pattern, bool includeHiddenFiles, bool parse_dirs) { int res = 0; - u32 i = 0, j = 0, k = 0; + u32 k = 0; DIR dir; FILINFO fno; - char *dir_entries = (char *)zalloc(MAX_ENTRIES * 256); - char *temp = (char *)zalloc(256); + dirlist_t *dir_entries = (dirlist_t *)malloc(sizeof(dirlist_t)); + + // Setup pointer tree. + for (u32 i = 0; i < DIR_MAX_ENTRIES; i++) + dir_entries->name[i] = &dir_entries->data[i * 256]; if (!pattern && !f_opendir(&dir, directory)) { @@ -47,9 +49,8 @@ char *dirlist(const char *directory, const char *pattern, bool includeHiddenFile { if ((fno.fname[0] != '.') && (includeHiddenFiles || !(fno.fattrib & AM_HID))) { - strcpy(dir_entries + (k * 256), fno.fname); - k++; - if (k > (MAX_ENTRIES - 1)) + strcpy(&dir_entries->data[k * 256], fno.fname); + if (++k >= DIR_MAX_ENTRIES) break; } } @@ -62,9 +63,8 @@ char *dirlist(const char *directory, const char *pattern, bool includeHiddenFile { if (!(fno.fattrib & AM_DIR) && (fno.fname[0] != '.') && (includeHiddenFiles || !(fno.fattrib & AM_HID))) { - strcpy(dir_entries + (k * 256), fno.fname); - k++; - if (k > (MAX_ENTRIES - 1)) + strcpy(&dir_entries->data[k * 256], fno.fname); + if (++k >= DIR_MAX_ENTRIES) break; } res = f_findnext(&dir, &fno); @@ -74,27 +74,27 @@ char *dirlist(const char *directory, const char *pattern, bool includeHiddenFile if (!k) { - free(temp); free(dir_entries); return NULL; } + // Terminate name list. + dir_entries->name[k] = NULL; + // Reorder ini files by ASCII ordering. - for (i = 0; i < k - 1 ; i++) + for (u32 i = 0; i < k - 1 ; i++) { - for (j = i + 1; j < k; j++) + for (u32 j = i + 1; j < k; j++) { - if (strcmp(&dir_entries[i * 256], &dir_entries[j * 256]) > 0) + if (strcmp(dir_entries->name[i], dir_entries->name[j]) > 0) { - strcpy(temp, &dir_entries[i * 256]); - strcpy(&dir_entries[i * 256], &dir_entries[j * 256]); - strcpy(&dir_entries[j * 256], temp); + char *tmp = dir_entries->name[i]; + dir_entries->name[i] = dir_entries->name[j]; + dir_entries->name[j] = tmp; } } } - free(temp); - return dir_entries; } diff --git a/bdk/utils/dirlist.h b/bdk/utils/dirlist.h index 32197f3..cb250c3 100644 --- a/bdk/utils/dirlist.h +++ b/bdk/utils/dirlist.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -16,4 +16,12 @@ #include -char *dirlist(const char *directory, const char *pattern, bool includeHiddenFiles, bool parse_dirs); +#define DIR_MAX_ENTRIES 64 + +typedef struct _dirlist_t +{ + char *name[DIR_MAX_ENTRIES]; + char data[DIR_MAX_ENTRIES * 256]; +} dirlist_t; + +dirlist_t *dirlist(const char *directory, const char *pattern, bool includeHiddenFiles, bool parse_dirs); diff --git a/bdk/utils/ini.c b/bdk/utils/ini.c index 27a4387..6832bdc 100644 --- a/bdk/utils/ini.c +++ b/bdk/utils/ini.c @@ -62,7 +62,7 @@ int ini_parse(link_t *dst, const char *ini_path, bool is_dir) ini_sec_t *csec = NULL; char *lbuf = NULL; - char *filelist = NULL; + dirlist_t *filelist = NULL; char *filename = (char *)malloc(256); strcpy(filename, ini_path); @@ -85,9 +85,9 @@ int ini_parse(link_t *dst, const char *ini_path, bool is_dir) // Copy ini filename in path string. if (is_dir) { - if (filelist[k * 256]) + if (filelist->name[k]) { - strcpy(filename + pathlen, &filelist[k * 256]); + strcpy(filename + pathlen, filelist->name[k]); k++; } else From 6fa844b031ce1275f8817c0c4d3f76b80282ea82 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 9 Oct 2024 15:22:16 +0300 Subject: [PATCH 246/308] hekate/nyx: use updated dirlist --- bootloader/hos/hos_config.c | 6 +++--- bootloader/main.c | 8 +++---- nyx/nyx_gui/frontend/gui.c | 6 +++--- nyx/nyx_gui/frontend/gui_emummc_tools.c | 28 ++++++++++++------------- 4 files changed, 24 insertions(+), 24 deletions(-) diff --git a/bootloader/hos/hos_config.c b/bootloader/hos/hos_config.c index f272f33..9d85e42 100644 --- a/bootloader/hos/hos_config.c +++ b/bootloader/hos/hos_config.c @@ -65,7 +65,7 @@ static int _config_kip1(launch_ctxt_t *ctxt, const char *value) u32 dirlen = 0; dir[strlen(dir) - 2] = 0; - char *filelist = dirlist(dir, "*.kip*", false, false); + dirlist_t *filelist = dirlist(dir, "*.kip*", false, false); strcat(dir, "/"); dirlen = strlen(dir); @@ -75,10 +75,10 @@ static int _config_kip1(launch_ctxt_t *ctxt, const char *value) { while (true) { - if (!filelist[i * 256]) + if (!filelist->name[i]) break; - strcpy(dir + dirlen, &filelist[i * 256]); + strcpy(dir + dirlen, filelist->name[i]); merge_kip_t *mkip1 = (merge_kip_t *)malloc(sizeof(merge_kip_t)); mkip1->kip1 = sd_file_read(dir, &size); diff --git a/bootloader/main.c b/bootloader/main.c index 6867474..4ce7b43 100644 --- a/bootloader/main.c +++ b/bootloader/main.c @@ -257,9 +257,9 @@ static void _launch_payloads() { u8 max_entries = 61; ment_t *ments = NULL; - char *filelist = NULL; char *file_sec = NULL; char *dir = NULL; + dirlist_t *filelist = NULL; gfx_clear_grey(0x1B); gfx_con_setpos(0, 0); @@ -286,11 +286,11 @@ static void _launch_payloads() while (true) { - if (i > max_entries || !filelist[i * 256]) + if (i > max_entries || !filelist->name[i]) break; ments[i + 2].type = INI_CHOICE; - ments[i + 2].caption = &filelist[i * 256]; - ments[i + 2].data = &filelist[i * 256]; + ments[i + 2].caption = filelist->name[i]; + ments[i + 2].data = filelist->name[i]; i++; } diff --git a/nyx/nyx_gui/frontend/gui.c b/nyx/nyx_gui/frontend/gui.c index ca7bfa3..0ef3926 100644 --- a/nyx/nyx_gui/frontend/gui.c +++ b/nyx/nyx_gui/frontend/gui.c @@ -1394,7 +1394,7 @@ static lv_res_t _create_mbox_payloads(lv_obj_t *btn) goto out_end; } - char *filelist = dirlist("bootloader/payloads", NULL, false, false); + dirlist_t *filelist = dirlist("bootloader/payloads", NULL, false, false); sd_unmount(); u32 i = 0; @@ -1402,9 +1402,9 @@ static lv_res_t _create_mbox_payloads(lv_obj_t *btn) { while (true) { - if (!filelist[i * 256]) + if (!filelist->name[i]) break; - lv_list_add(list, NULL, &filelist[i * 256], launch_payload); + lv_list_add(list, NULL, filelist->name[i], launch_payload); i++; } free(filelist); diff --git a/nyx/nyx_gui/frontend/gui_emummc_tools.c b/nyx/nyx_gui/frontend/gui_emummc_tools.c index 62a5947..dfc5f55 100644 --- a/nyx/nyx_gui/frontend/gui_emummc_tools.c +++ b/nyx/nyx_gui/frontend/gui_emummc_tools.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022 CTCaer + * Copyright (c) 2019-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -749,7 +749,7 @@ static lv_res_t _create_emummc_migrate_action(lv_obj_t * btns, const char * txt) typedef struct _emummc_images_t { - char *dirlist; + dirlist_t *dirlist; u32 part_sector[3]; u32 part_type[3]; u32 part_end[3]; @@ -1009,9 +1009,9 @@ static lv_res_t _create_change_emummc_window(lv_obj_t *btn_caller) FIL fp; // Check for sd raw partitions, based on the folders in /emuMMC. - while (emummc_img->dirlist[emummc_idx * 256]) + while (emummc_img->dirlist->name[emummc_idx]) { - s_printf(path, "emuMMC/%s/raw_based", &emummc_img->dirlist[emummc_idx * 256]); + s_printf(path, "emuMMC/%s/raw_based", emummc_img->dirlist->name[emummc_idx]); if (!f_stat(path, NULL)) { @@ -1024,21 +1024,21 @@ static lv_res_t _create_change_emummc_window(lv_obj_t *btn_caller) if ((curr_list_sector == 2) || (emummc_img->part_sector[0] && curr_list_sector >= emummc_img->part_sector[0] && curr_list_sector < emummc_img->part_end[0] && emummc_img->part_type[0] != 0x83)) { - s_printf(&emummc_img->part_path[0], "emuMMC/%s", &emummc_img->dirlist[emummc_idx * 256]); + s_printf(&emummc_img->part_path[0], "emuMMC/%s", emummc_img->dirlist->name[emummc_idx]); emummc_img->part_sector[0] = curr_list_sector; emummc_img->part_end[0] = 0; } else if (emummc_img->part_sector[1] && curr_list_sector >= emummc_img->part_sector[1] && curr_list_sector < emummc_img->part_end[1] && emummc_img->part_type[1] != 0x83) { - s_printf(&emummc_img->part_path[1 * 128], "emuMMC/%s", &emummc_img->dirlist[emummc_idx * 256]); + s_printf(&emummc_img->part_path[1 * 128], "emuMMC/%s", emummc_img->dirlist->name[emummc_idx]); emummc_img->part_sector[1] = curr_list_sector; emummc_img->part_end[1] = 0; } else if (emummc_img->part_sector[2] && curr_list_sector >= emummc_img->part_sector[2] && curr_list_sector < emummc_img->part_end[2] && emummc_img->part_type[2] != 0x83) { - s_printf(&emummc_img->part_path[2 * 128], "emuMMC/%s", &emummc_img->dirlist[emummc_idx * 256]); + s_printf(&emummc_img->part_path[2 * 128], "emuMMC/%s", emummc_img->dirlist->name[emummc_idx]); emummc_img->part_sector[2] = curr_list_sector; emummc_img->part_end[2] = 0; } @@ -1050,19 +1050,19 @@ static lv_res_t _create_change_emummc_window(lv_obj_t *btn_caller) u32 file_based_idx = 0; // Sanitize the directory list with sd file based ones. - while (emummc_img->dirlist[emummc_idx * 256]) + while (emummc_img->dirlist->name[emummc_idx]) { - s_printf(path, "emuMMC/%s/file_based", &emummc_img->dirlist[emummc_idx * 256]); + s_printf(path, "emuMMC/%s/file_based", emummc_img->dirlist->name[emummc_idx]); if (!f_stat(path, NULL)) { - char *tmp = &emummc_img->dirlist[emummc_idx * 256]; - memcpy(&emummc_img->dirlist[file_based_idx * 256], tmp, strlen(tmp) + 1); + char *tmp = emummc_img->dirlist->name[emummc_idx]; + memcpy(emummc_img->dirlist->name[file_based_idx], tmp, strlen(tmp) + 1); file_based_idx++; } emummc_idx++; } - emummc_img->dirlist[file_based_idx * 256] = 0; + emummc_img->dirlist->name[file_based_idx] = NULL; out0:; static lv_style_t h_style; @@ -1179,9 +1179,9 @@ out0:; emummc_idx = 0; // Add file based to the list. - while (emummc_img->dirlist[emummc_idx * 256]) + while (emummc_img->dirlist->name[emummc_idx]) { - s_printf(path, "emuMMC/%s", &emummc_img->dirlist[emummc_idx * 256]); + s_printf(path, "emuMMC/%s", emummc_img->dirlist->name[emummc_idx]); lv_list_add(list_sd_based, NULL, path, _save_file_emummc_cfg_action); From 1bec721bafd29f543a97a4357888f62617b89d04 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 9 Oct 2024 17:59:57 +0300 Subject: [PATCH 247/308] hos: add missing deinit --- bootloader/hos/hos.c | 1 + 1 file changed, 1 insertion(+) diff --git a/bootloader/hos/hos.c b/bootloader/hos/hos.c index a4c8a06..eb7eeb4 100644 --- a/bootloader/hos/hos.c +++ b/bootloader/hos/hos.c @@ -802,6 +802,7 @@ int hos_launch(ini_sec_t *cfg) // Check if stock is enabled and device can boot in OFW. if (ctxt.stock && (h_cfg.t210b01 || !tools_autorcm_enabled())) { + sdram_src_pllc(false); emmc_end(); WPRINTF("\nRebooting to OFW in 5s..."); From 1849ac66672ff998f72c16d58e27e35b78818d23 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 9 Oct 2024 18:02:28 +0300 Subject: [PATCH 248/308] nyx: optimize battery info - Remove input voltage limit - Add an extra PD profile --- nyx/nyx_gui/frontend/gui_info.c | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index b464bfe..06215b3 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -1756,7 +1756,7 @@ static lv_res_t _create_window_emmc_info_status(lv_obj_t *btn) emmc_gpt_parse(&gpt); u32 idx = 0; - u32 lines_left = 20; + int lines_left = 20; s_printf(txt_buf + strlen(txt_buf), "#FFBA00 Idx Name Size Offset Sectors#\n"); LIST_FOREACH_ENTRY(emmc_part_t, part, &gpt, link) { @@ -2304,10 +2304,9 @@ static lv_res_t _create_window_battery_status(lv_obj_t *btn) lv_label_set_static_text(lb_desc2, "#00DDFF Battery Charger IC Info:#\n" - "Input voltage limit:\n" "Input current limit:\n" - "Min voltage limit:\n" - "Fast charge current limit:\n" + "System voltage limit:\n" + "Charge current limit:\n" "Charge voltage limit:\n" "Charge status:\n" "Temperature status:\n\n" @@ -2325,12 +2324,9 @@ static lv_res_t _create_window_battery_status(lv_obj_t *btn) lv_obj_t * lb_val2 = lv_label_create(val2, lb_desc); // Charger IC info. - bq24193_get_property(BQ24193_InputVoltageLimit, &value); - s_printf(txt_buf, "\n%d mV\n", value); - int iinlim = 0; bq24193_get_property(BQ24193_InputCurrentLimit, &iinlim); - s_printf(txt_buf + strlen(txt_buf), "%d mA\n", iinlim); + s_printf(txt_buf, "\n%d mA\n", iinlim); bq24193_get_property(BQ24193_SystemMinimumVoltage, &value); s_printf(txt_buf + strlen(txt_buf), "%d mV\n", value); @@ -2400,8 +2396,8 @@ static lv_res_t _create_window_battery_status(lv_obj_t *btn) if (!usb_pd.pdo_no) strcat(txt_buf, "\nNon PD"); - // Limit to 5 profiles so it can fit. - usb_pd.pdo_no = MIN(usb_pd.pdo_no, 5); + // Limit to 6 profiles so it can fit. + usb_pd.pdo_no = MIN(usb_pd.pdo_no, 6); for (u32 i = 0; i < usb_pd.pdo_no; i++) { From 14413ae6bd271b36a1fe227096c5e1c706140336 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 10 Oct 2024 18:22:03 +0300 Subject: [PATCH 249/308] bdk: timer: restore rtc timer spinlock --- bdk/soc/timer.c | 4 +++- bdk/utils/util.c | 2 -- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/bdk/soc/timer.c b/bdk/soc/timer.c index c6c5b83..786f123 100644 --- a/bdk/soc/timer.c +++ b/bdk/soc/timer.c @@ -25,6 +25,8 @@ #define EXCP_TYPE_ADDR 0x4003FFF8 #define EXCP_TYPE_WDT 0x544457 // "WDT". +#define USE_RTC_TIMER + u32 get_tmr_s() { (void)RTC(APBDEV_RTC_MILLI_SECONDS); @@ -118,4 +120,4 @@ bool watchdog_fired() { // Return if watchdog got fired. User handles clearing. return (*(u32 *)EXCP_TYPE_ADDR == EXCP_TYPE_WDT); -} \ No newline at end of file +} diff --git a/bdk/utils/util.c b/bdk/utils/util.c index 878214f..d09fc70 100644 --- a/bdk/utils/util.c +++ b/bdk/utils/util.c @@ -29,8 +29,6 @@ #include #include -#define USE_RTC_TIMER - u8 bit_count(u32 val) { u8 cnt = 0; From 788ecb60a3712f9f236ba821e073db3138fb809c Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 10 Oct 2024 18:26:19 +0300 Subject: [PATCH 250/308] l4t: bump api to 7 --- bootloader/l4t/l4t.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/bootloader/l4t/l4t.c b/bootloader/l4t/l4t.c index c731017..bce3fa1 100644 --- a/bootloader/l4t/l4t.c +++ b/bootloader/l4t/l4t.c @@ -36,10 +36,11 @@ * 4: Arachne Register Cell v3. DRAM OPT and DDR200 changes. * 5: Arachne Register Cell v4. DRAM FREQ and DDR200 changes. * 6: Arachne Register Cell v5. Signal quality and performance changes. TZ param changes. + * 7: Arachne Register Cell v6. Decouple of rd/wr latencies. */ -#define L4T_LOADER_API_REV 6 -#define L4T_FIRMWARE_REV 0x36524556 // REV6. +#define L4T_LOADER_API_REV 7 +#define L4T_FIRMWARE_REV 0x37524556 // REV7. #ifdef DEBUG_UART_PORT #include From 84f3f7d92a8feb0de82c7a0cd94f30f618d638e9 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Thu, 10 Oct 2024 18:28:29 +0300 Subject: [PATCH 251/308] nyx: add 400us sleep in lv task loop Tiny power save. --- nyx/nyx_gui/frontend/gui.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui.c b/nyx/nyx_gui/frontend/gui.c index 0ef3926..e5cbdd2 100644 --- a/nyx/nyx_gui/frontend/gui.c +++ b/nyx/nyx_gui/frontend/gui.c @@ -694,7 +694,7 @@ lv_img_dsc_t *bmp_to_lvimg_obj(const char *path) img_desc->header.always_zero = 0; img_desc->header.w = bmpData.size_x; img_desc->header.h = bmpData.size_y; - img_desc->header.cf = (bitmap[28] == 32) ? LV_IMG_CF_TRUE_COLOR_ALPHA : LV_IMG_CF_TRUE_COLOR; + img_desc->header.cf = (bitmap[28] == 32) ? LV_IMG_CF_TRUE_COLOR_ALPHA : LV_IMG_CF_TRUE_COLOR; // Only LV_IMG_CF_TRUE_COLOR_ALPHA is actually allowed. img_desc->data_size = bmpData.size - bmpData.offset; img_desc->data = (u8 *)offset_copy; @@ -2461,9 +2461,12 @@ void nyx_load_and_run() // Gui loop. if (h_cfg.t210b01) { - // Minerva not supported on T210B01 yet. No power saving. + // Minerva not supported on T210B01 yet. Slight power saving via spinlock. while (true) + { lv_task_handler(); + usleep(400); + } } else { From 81fb318f6beecb76784fc7d4f64a9ae61fd24513 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 11 Oct 2024 13:04:16 +0300 Subject: [PATCH 252/308] hos: add 19.0.0 support --- bootloader/hos/hos.c | 2 ++ bootloader/hos/hos.h | 3 ++- bootloader/hos/pkg1.c | 3 ++- bootloader/hos/pkg2_patches.inl | 26 ++++++++++++++++++++++++++ bootloader/hos/secmon_exo.c | 2 +- nyx/nyx_gui/frontend/gui_info.c | 5 ++++- nyx/nyx_gui/hos/hos.c | 6 +++++- nyx/nyx_gui/hos/hos.h | 5 +++-- nyx/nyx_gui/hos/pkg1.c | 5 +++-- nyx/nyx_gui/hos/pkg2.c | 4 +++- 10 files changed, 51 insertions(+), 10 deletions(-) diff --git a/bootloader/hos/hos.c b/bootloader/hos/hos.c index eb7eeb4..a0bbed6 100644 --- a/bootloader/hos/hos.c +++ b/bootloader/hos/hos.c @@ -123,6 +123,7 @@ static const u8 master_kekseed_t210_tsec_v4[HOS_KB_VERSION_MAX - HOS_KB_VERSION_ { 0x99, 0x22, 0x09, 0x57, 0xA7, 0xF9, 0x5E, 0x94, 0xFE, 0x78, 0x7F, 0x41, 0xD6, 0xE7, 0x56, 0xE6 }, // 16.0.0. { 0x71, 0xB9, 0xA6, 0xC0, 0xFF, 0x97, 0x6B, 0x0C, 0xB4, 0x40, 0xB9, 0xD5, 0x81, 0x5D, 0x81, 0x90 }, // 17.0.0. { 0x00, 0x04, 0x5D, 0xF0, 0x4D, 0xCD, 0x14, 0xA3, 0x1C, 0xBF, 0xDE, 0x48, 0x55, 0xBA, 0x35, 0xC1 }, // 18.0.0. + { 0xD7, 0x63, 0x74, 0x46, 0x4E, 0xBA, 0x78, 0x0A, 0x7C, 0x9D, 0xB3, 0xE8, 0x7A, 0x3D, 0x71, 0xE3 }, // 19.0.0. }; //!TODO: Update on mkey changes. @@ -140,6 +141,7 @@ static const u8 master_kekseed_t210b01[HOS_KB_VERSION_MAX - HOS_KB_VERSION_600 + { 0xA5, 0xEC, 0x16, 0x39, 0x1A, 0x30, 0x16, 0x08, 0x2E, 0xCF, 0x09, 0x6F, 0x5E, 0x7C, 0xEE, 0xA9 }, // 16.0.0. { 0x8D, 0xEE, 0x9E, 0x11, 0x36, 0x3A, 0x9B, 0x0A, 0x6A, 0xC7, 0xBB, 0xE9, 0xD1, 0x03, 0xF7, 0x80 }, // 17.0.0. { 0x4F, 0x41, 0x3C, 0x3B, 0xFB, 0x6A, 0x01, 0x2A, 0x68, 0x9F, 0x83, 0xE9, 0x53, 0xBD, 0x16, 0xD2 }, // 18.0.0. + { 0x31, 0xBE, 0x25, 0xFB, 0xDB, 0xB4, 0xEE, 0x49, 0x5C, 0x77, 0x05, 0xC2, 0x36, 0x9F, 0x34, 0x80 }, // 19.0.0. }; static const u8 console_keyseed[SE_KEY_128_SIZE] = diff --git a/bootloader/hos/hos.h b/bootloader/hos/hos.h index ba520ec..8645e62 100644 --- a/bootloader/hos/hos.h +++ b/bootloader/hos/hos.h @@ -45,7 +45,8 @@ enum { HOS_KB_VERSION_1600 = 15, HOS_KB_VERSION_1700 = 16, HOS_KB_VERSION_1800 = 17, - HOS_KB_VERSION_MAX = HOS_KB_VERSION_1800 + HOS_KB_VERSION_1900 = 18, + HOS_KB_VERSION_MAX = HOS_KB_VERSION_1900 }; #define HOS_TSEC_VERSION 4 //! TODO: Update on TSEC Root Key changes. diff --git a/bootloader/hos/pkg1.c b/bootloader/hos/pkg1.c index 89b92a1..f4ac124 100644 --- a/bootloader/hos/pkg1.c +++ b/bootloader/hos/pkg1.c @@ -170,7 +170,8 @@ static const pkg1_id_t _pkg1_ids[] = { { "20220801", 14, 17, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 15.0.0 - 15.0.1. { "20230111", 15, 18, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 16.0.0 - 16.1.0. { "20230906", 16, 19, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 17.0.0 - 17.0.1. - { "20240207", 17, 19, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 18.0.0+ + { "20240207", 17, 19, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 18.0.0 - 18.1.0. + { "20240808", 18, 20, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 19.0.0+ }; const pkg1_id_t *pkg1_get_latest() diff --git a/bootloader/hos/pkg2_patches.inl b/bootloader/hos/pkg2_patches.inl index a44b9aa..23d3c54 100644 --- a/bootloader/hos/pkg2_patches.inl +++ b/bootloader/hos/pkg2_patches.inl @@ -794,6 +794,30 @@ static const kip1_patchset_t _fs_patches_1800_exfat[] = { { NULL, NULL } }; +static const kip1_patch_t _fs_nogc_1900[] = { + { KPS(KIP_TEXT) | 0x16F070, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x195B74, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, + { KPS(KIP_TEXT) | 0x195D74, 4, KIP1_PATCH_SRC_NO_CHECK, "\x16\x80\x80\x52" }, + { 0, 0, NULL, NULL } +}; + +static const kip1_patchset_t _fs_patches_1900[] = { + { "nogc", _fs_nogc_1900 }, + { NULL, NULL } +}; + +static const kip1_patch_t _fs_nogc_1900_exfat[] = { + { KPS(KIP_TEXT) | 0x17A8A0, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x1A13A4, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, + { KPS(KIP_TEXT) | 0x1A15A4, 4, KIP1_PATCH_SRC_NO_CHECK, "\x16\x80\x80\x52" }, + { 0, 0, NULL, NULL } +}; + +static const kip1_patchset_t _fs_patches_1900_exfat[] = { + { "nogc", _fs_nogc_1900_exfat }, + { NULL, NULL } +}; + // SHA256 hashes. static const kip1_id_t _kip_ids[] = { @@ -857,4 +881,6 @@ static const kip1_id_t _kip_ids[] = { "FS", "\x1E\x2C\x64\xB1\xCC\xE2\x78\x24", _fs_patches_1800_exfat }, // FS 18.0.0 exFAT { "FS", "\xA3\x39\xF0\x1C\x95\xBF\xA7\x68", _fs_patches_1800 }, // FS 18.1.0 { "FS", "\x20\x4C\xBA\x86\xDE\x08\x44\x6A", _fs_patches_1800_exfat }, // FS 18.1.0 exFAT + { "FS", "\xD9\x4C\x68\x15\xF8\xF5\x0A\x20", _fs_patches_1900 }, // FS 19.0.0 + { "FS", "\xED\xA8\x78\x68\xA4\x49\x07\x50", _fs_patches_1900_exfat }, // FS 19.0.0 exFAT }; diff --git a/bootloader/hos/secmon_exo.c b/bootloader/hos/secmon_exo.c index a1dc7c3..f0b04ee 100644 --- a/bootloader/hos/secmon_exo.c +++ b/bootloader/hos/secmon_exo.c @@ -199,7 +199,7 @@ void config_exosphere(launch_ctxt_t *ctxt, u32 warmboot_base) case 12: exo_fw_no = EXO_FW_VER(9, 1); break; - case 13 ... 21: //!TODO: Update on API changes. 21: 18.0.0. + case 13 ... 22: //!TODO: Update on API changes. 22: 19.0.0. exo_fw_no = EXO_FW_VER(exo_fw_no - 3, ctxt->exo_ctx.hos_revision); break; } diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index 06215b3..5d5ec2a 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -587,7 +587,10 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) strcpy(fuses_hos_version, "16.0.0 - 16.1.0"); break; case 19: - strcpy(fuses_hos_version, "17.0.0+"); + strcpy(fuses_hos_version, "17.0.0 - 18.1.0"); + break; + case 20: + strcpy(fuses_hos_version, "19.0.0+"); break; case 255: strcpy(fuses_hos_version, "#FFD000 Overburnt#"); diff --git a/nyx/nyx_gui/hos/hos.c b/nyx/nyx_gui/hos/hos.c index be39306..284f092 100644 --- a/nyx/nyx_gui/hos/hos.c +++ b/nyx/nyx_gui/hos/hos.c @@ -76,7 +76,7 @@ static const u8 master_kekseed_620[SE_KEY_128_SIZE] = //!TODO: Update on mkey changes. static const u8 master_kekseed_t210_max[SE_KEY_128_SIZE] = - { 0x00, 0x04, 0x5D, 0xF0, 0x4D, 0xCD, 0x14, 0xA3, 0x1C, 0xBF, 0xDE, 0x48, 0x55, 0xBA, 0x35, 0xC1 }; // 18.0.0. + { 0xD7, 0x63, 0x74, 0x46, 0x4E, 0xBA, 0x78, 0x0A, 0x7C, 0x9D, 0xB3, 0xE8, 0x7A, 0x3D, 0x71, 0xE3 }; // 19.0.0. //!TODO: Update on mkey changes. static const u8 master_kekseed_t210b01[HOS_KB_VERSION_MAX - HOS_KB_VERSION_600 + 1][SE_KEY_128_SIZE] = { @@ -93,6 +93,7 @@ static const u8 master_kekseed_t210b01[HOS_KB_VERSION_MAX - HOS_KB_VERSION_600 + { 0xA5, 0xEC, 0x16, 0x39, 0x1A, 0x30, 0x16, 0x08, 0x2E, 0xCF, 0x09, 0x6F, 0x5E, 0x7C, 0xEE, 0xA9 }, // 16.0.0. { 0x8D, 0xEE, 0x9E, 0x11, 0x36, 0x3A, 0x9B, 0x0A, 0x6A, 0xC7, 0xBB, 0xE9, 0xD1, 0x03, 0xF7, 0x80 }, // 17.0.0. { 0x4F, 0x41, 0x3C, 0x3B, 0xFB, 0x6A, 0x01, 0x2A, 0x68, 0x9F, 0x83, 0xE9, 0x53, 0xBD, 0x16, 0xD2 }, // 18.0.0. + { 0x31, 0xBE, 0x25, 0xFB, 0xDB, 0xB4, 0xEE, 0x49, 0x5C, 0x77, 0x05, 0xC2, 0x36, 0x9F, 0x34, 0x80 }, // 19.0.0. }; static const u8 console_keyseed[SE_KEY_128_SIZE] = @@ -124,6 +125,7 @@ static const u8 mkey_vectors[HOS_KB_VERSION_MAX + 1][SE_KEY_128_SIZE] = { { 0xAF, 0x11, 0x4C, 0x67, 0x17, 0x7A, 0x52, 0x43, 0xF7, 0x70, 0x2F, 0xC7, 0xEF, 0x81, 0x72, 0x16 }, // Mkey 14 encrypted with mkey 15. { 0x25, 0x12, 0x8B, 0xCB, 0xB5, 0x46, 0xA1, 0xF8, 0xE0, 0x52, 0x15, 0xB7, 0x0B, 0x57, 0x00, 0xBD }, // Mkey 15 encrypted with mkey 16. { 0x58, 0x15, 0xD2, 0xF6, 0x8A, 0xE8, 0x19, 0xAB, 0xFB, 0x2D, 0x52, 0x9D, 0xE7, 0x55, 0xF3, 0x93 }, // Mkey 16 encrypted with mkey 17. + { 0x4A, 0x01, 0x3B, 0xC7, 0x44, 0x6E, 0x45, 0xBD, 0xE6, 0x5E, 0x2B, 0xEC, 0x07, 0x37, 0x52, 0x86 }, // Mkey 17 encrypted with mkey 18. }; //!TODO: Update on mkey changes. @@ -143,6 +145,7 @@ static const u8 new_console_keyseed[HOS_KB_VERSION_MAX - HOS_KB_VERSION_400 + 1] { 0xEA, 0x90, 0x6E, 0xA8, 0xAE, 0x92, 0x99, 0x64, 0x36, 0xC1, 0xF3, 0x1C, 0xC6, 0x32, 0x83, 0x8C }, // 16.0.0 New Device Key Source. { 0xDA, 0xB9, 0xD6, 0x77, 0x52, 0x2D, 0x1F, 0x78, 0x73, 0xC9, 0x98, 0x5B, 0x06, 0xFE, 0xA0, 0x52 }, // 17.0.0 New Device Key Source. { 0x14, 0xF5, 0xA5, 0xD0, 0x73, 0x6D, 0x44, 0x80, 0x5F, 0x31, 0x5A, 0x8F, 0x1E, 0xD4, 0x0D, 0x63 }, // 18.0.0 New Device Key Source. + { 0x07, 0x38, 0x9A, 0xEC, 0x9C, 0xBD, 0x50, 0x4A, 0x4C, 0x1F, 0x04, 0xDA, 0x40, 0x68, 0x29, 0xE3 }, // 19.0.0 New Device Key Source. }; //!TODO: Update on mkey changes. @@ -162,6 +165,7 @@ static const u8 new_console_kekseed[HOS_KB_VERSION_MAX - HOS_KB_VERSION_400 + 1] { 0xF0, 0xF3, 0xFF, 0x52, 0x75, 0x2F, 0xBA, 0x4D, 0x09, 0x72, 0x30, 0x89, 0xA9, 0xDF, 0xFE, 0x1F }, // 16.0.0 New Device Keygen Source. { 0x21, 0xD6, 0x35, 0xF1, 0x0F, 0x7A, 0xF0, 0x5D, 0xDF, 0x79, 0x1C, 0x7A, 0xE4, 0x32, 0x82, 0x9E }, // 17.0.0 New Device Keygen Source. { 0xE7, 0x85, 0x8C, 0xA2, 0xF4, 0x49, 0xCB, 0x07, 0xD1, 0x8E, 0x48, 0x1B, 0xE8, 0x1E, 0x28, 0x3B }, // 18.0.0 New Device Keygen Source. + { 0x9B, 0xA5, 0xFD, 0x74, 0x7F, 0xCD, 0x23, 0xD1, 0xD9, 0xBD, 0x6C, 0x51, 0x72, 0x5F, 0x3D, 0x1F }, // 19.0.0 New Device Keygen Source. }; static const u8 gen_keyseed[SE_KEY_128_SIZE] = diff --git a/nyx/nyx_gui/hos/hos.h b/nyx/nyx_gui/hos/hos.h index c702a32..55b4c9b 100644 --- a/nyx/nyx_gui/hos/hos.h +++ b/nyx/nyx_gui/hos/hos.h @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2023 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -45,7 +45,8 @@ enum { HOS_KB_VERSION_1600 = 15, HOS_KB_VERSION_1700 = 16, HOS_KB_VERSION_1800 = 17, - HOS_KB_VERSION_MAX = HOS_KB_VERSION_1800 + HOS_KB_VERSION_1900 = 18, + HOS_KB_VERSION_MAX = HOS_KB_VERSION_1900 }; #define HOS_TSEC_VERSION 4 //! TODO: Update on TSEC Root Key changes. diff --git a/nyx/nyx_gui/hos/pkg1.c b/nyx/nyx_gui/hos/pkg1.c index e0c8137..6d253e4 100644 --- a/nyx/nyx_gui/hos/pkg1.c +++ b/nyx/nyx_gui/hos/pkg1.c @@ -1,7 +1,7 @@ /* * Copyright (c) 2018 naehrwert * Copyright (c) 2018 st4rk - * Copyright (c) 2018-2023 CTCaer + * Copyright (c) 2018-2024 CTCaer * Copyright (c) 2018 balika011 * * This program is free software; you can redistribute it and/or modify it @@ -66,7 +66,8 @@ static const pkg1_id_t _pkg1_ids[] = { { "20220801", 14, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 15.0.0 - 15.0.1. { "20230111", 15, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 16.0.0 - 16.1.0. { "20230906", 16, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 17.0.0 - 17.0.1. - { "20240207", 17, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 18.0.0+ + { "20240207", 17, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 18.0.0 - 18.1.0. + { "20240808", 18, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 19.0.0+ }; const pkg1_id_t *pkg1_identify(u8 *pkg1, char *build_date) diff --git a/nyx/nyx_gui/hos/pkg2.c b/nyx/nyx_gui/hos/pkg2.c index 4fb4c3e..c0d2c6f 100644 --- a/nyx/nyx_gui/hos/pkg2.c +++ b/nyx/nyx_gui/hos/pkg2.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2023 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -113,6 +113,8 @@ static const u8 mkey_vector_7xx[HOS_KB_VERSION_MAX - HOS_KB_VERSION_810 + 1][SE_ { 0x25, 0x12, 0x8B, 0xCB, 0xB5, 0x46, 0xA1, 0xF8, 0xE0, 0x52, 0x15, 0xB7, 0x0B, 0x57, 0x00, 0xBD }, // Master key 16 encrypted with 17. (17.0.0 with 18.0.0) { 0x58, 0x15, 0xD2, 0xF6, 0x8A, 0xE8, 0x19, 0xAB, 0xFB, 0x2D, 0x52, 0x9D, 0xE7, 0x55, 0xF3, 0x93 }, + // Master key 17 encrypted with 18. (18.0.0 with 19.0.0) + { 0x4A, 0x01, 0x3B, 0xC7, 0x44, 0x6E, 0x45, 0xBD, 0xE6, 0x5E, 0x2B, 0xEC, 0x07, 0x37, 0x52, 0x86 }, }; static bool _pkg2_key_unwrap_validate(pkg2_hdr_t *tmp_test, pkg2_hdr_t *hdr, u8 src_slot, u8 *mkey, const u8 *key_seed) From e3eee7331862ca349a39d232eb843f3caf547a37 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sat, 12 Oct 2024 17:50:54 +0300 Subject: [PATCH 253/308] nyx: do not spam log on partition restore --- nyx/nyx_gui/frontend/fe_emmc_tools.c | 23 ++++++++++++++++------- 1 file changed, 16 insertions(+), 7 deletions(-) diff --git a/nyx/nyx_gui/frontend/fe_emmc_tools.c b/nyx/nyx_gui/frontend/fe_emmc_tools.c index b49929c..06048aa 100644 --- a/nyx/nyx_gui/frontend/fe_emmc_tools.c +++ b/nyx/nyx_gui/frontend/fe_emmc_tools.c @@ -1118,7 +1118,7 @@ multipart_not_allowed: manual_system_maintenance(true); } - return 0; + return -1; } else if (!use_multipart && (((u32)((u64)f_size(&fp) >> (u64)9)) != totalSectors)) // Check total restore size vs emmc size. { @@ -1475,10 +1475,13 @@ void restore_emmc_selected(emmcPartType_t restoreType, emmc_tool_gui_t *gui) if (!res) s_printf(txt_buf, "#FFDD00 Failed!#\n"); - else + else if (res > 0) s_printf(txt_buf, "Done!\n"); - lv_label_ins_text(gui->label_log, LV_LABEL_POS_LAST, txt_buf); + if (res >= 0) + lv_label_ins_text(gui->label_log, LV_LABEL_POS_LAST, txt_buf); + else + res = 0; manual_system_maintenance(true); } } @@ -1508,10 +1511,13 @@ void restore_emmc_selected(emmcPartType_t restoreType, emmc_tool_gui_t *gui) if (!res) s_printf(txt_buf, "#FFDD00 Failed!#\n"); - else + else if (res > 0) s_printf(txt_buf, "Done!\n"); - lv_label_ins_text(gui->label_log, LV_LABEL_POS_LAST, txt_buf); + if (res >= 0) + lv_label_ins_text(gui->label_log, LV_LABEL_POS_LAST, txt_buf); + else + res = 0; manual_system_maintenance(true); } emmc_gpt_free(&gpt); @@ -1544,10 +1550,13 @@ void restore_emmc_selected(emmcPartType_t restoreType, emmc_tool_gui_t *gui) if (!res) s_printf(txt_buf, "#FFDD00 Failed!#\n"); - else + else if (res > 0) s_printf(txt_buf, "Done!\n"); - lv_label_ins_text(gui->label_log, LV_LABEL_POS_LAST, txt_buf); + if (res >= 0) + lv_label_ins_text(gui->label_log, LV_LABEL_POS_LAST, txt_buf); + else + res = 0; manual_system_maintenance(true); } } From 3250b2e32a4203bfdcce8b04f621eeb94f93a878 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sat, 12 Oct 2024 17:51:00 +0300 Subject: [PATCH 254/308] Bump hekate to v6.2.2 and Nyx to v1.6.4 --- Versions.inc | 4 ++-- bootloader/main.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/Versions.inc b/Versions.inc index 8788f68..f4d3be6 100644 --- a/Versions.inc +++ b/Versions.inc @@ -1,11 +1,11 @@ # IPL Version. BLVERSION_MAJOR := 6 BLVERSION_MINOR := 2 -BLVERSION_HOTFX := 1 +BLVERSION_HOTFX := 2 BLVERSION_REL := 0 # Nyx Version. NYXVERSION_MAJOR := 1 NYXVERSION_MINOR := 6 -NYXVERSION_HOTFX := 3 +NYXVERSION_HOTFX := 4 NYXVERSION_REL := 0 diff --git a/bootloader/main.c b/bootloader/main.c index 4ce7b43..861b757 100644 --- a/bootloader/main.c +++ b/bootloader/main.c @@ -1446,7 +1446,7 @@ ment_t ment_top[] = { MDEF_END() }; -menu_t menu_top = { ment_top, "hekate v6.2.1", 0, 0 }; +menu_t menu_top = { ment_top, "hekate v6.2.2", 0, 0 }; extern void pivot_stack(u32 stack_top); From a47a6d32c6f98d8b744d64ff3e7d7bd47d28d1c4 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 24 Jan 2025 15:13:28 +0200 Subject: [PATCH 255/308] bdk: display: remove malloc usage --- bdk/display/di.c | 30 ++++++++---------------------- bdk/display/di.h | 1 + 2 files changed, 9 insertions(+), 22 deletions(-) diff --git a/bdk/display/di.c b/bdk/display/di.c index 80c4d12..3eaf922 100644 --- a/bdk/display/di.c +++ b/bdk/display/di.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2024 CTCaer + * Copyright (c) 2018-2025 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -37,8 +37,8 @@ extern volatile nyx_storage_t *nyx_str; static u32 _display_id = 0; -static u32 _dsi_bl = -1; -static bool _nx_aula = false; +static u32 _dsi_bl = -1; +static bool _nx_aula = false; static void _display_panel_and_hw_end(bool no_panel_deinit); @@ -265,16 +265,9 @@ int display_dsi_vblank_read(u8 cmd, u32 len, void *data) void display_dsi_write(u8 cmd, u32 len, void *data) { - static u8 *fifo8 = NULL; - static u32 *fifo32 = NULL; u32 host_control; - - // Allocate fifo buffer. - if (!fifo32) - { - fifo32 = malloc(DSI_STATUS_RX_FIFO_SIZE * 8 * sizeof(u32)); - fifo8 = (u8 *)fifo32; - } + u32 fifo32[DSI_STATUS_TX_FIFO_SIZE] = {0}; + u8 *fifo8 = (u8 *)fifo32; // Prepare data for long write. if (len >= 2) @@ -319,15 +312,8 @@ void display_dsi_write(u8 cmd, u32 len, void *data) void display_dsi_vblank_write(u8 cmd, u32 len, void *data) { - static u8 *fifo8 = NULL; - static u32 *fifo32 = NULL; - - // Allocate fifo buffer. - if (!fifo32) - { - fifo32 = malloc(DSI_STATUS_RX_FIFO_SIZE * 8 * sizeof(u32)); - fifo8 = (u8 *)fifo32; - } + u32 fifo32[DSI_STATUS_TX_FIFO_SIZE] = {0}; + u8 *fifo8 = (u8 *)fifo32; // Prepare data for long write. if (len >= 2) @@ -571,7 +557,7 @@ void display_init() * When switching to the 16ff pad brick, the clock lane termination control * is separated from data lane termination. This change of the mipi cal * brings in a bug that the DSI pad clock termination code can't be loaded - * in one time calibration. Trigger calibration twice. + * in one time calibration on T210B01. Trigger calibration twice. */ reg_write_array((u32 *)MIPI_CAL_BASE, _di_mipi_pad_cal_config, ARRAY_SIZE(_di_mipi_pad_cal_config)); for (u32 i = 0; i < 2; i++) diff --git a/bdk/display/di.h b/bdk/display/di.h index a44e730..a7dda47 100644 --- a/bdk/display/di.h +++ b/bdk/display/di.h @@ -520,6 +520,7 @@ #define DSI_STATUS 0x15 #define DSI_STATUS_RX_FIFO_SIZE 0x1F +#define DSI_STATUS_TX_FIFO_SIZE 0x20 // Actual depth is 64. #define DSI_INIT_SEQ_CONTROL 0x1A #define DSI_INIT_SEQ_DATA_0 0x1B From 9ba94bae2d67d79c6fc7857ef9afe769407180cb Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 24 Jan 2025 15:15:03 +0200 Subject: [PATCH 256/308] bdk: se: remove malloc usage --- bdk/sec/se.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/bdk/sec/se.c b/bdk/sec/se.c index e89d13b..7dfb187 100644 --- a/bdk/sec/se.c +++ b/bdk/sec/se.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2024 CTCaer + * Copyright (c) 2018-2025 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -182,7 +182,7 @@ static int _se_execute_one_block(u32 op, void *dst, u32 dst_size, const void *sr if (!src || !dst) return 0; - u8 *block = (u8 *)zalloc(SE_AES_BLOCK_SIZE); + u32 block[SE_AES_BLOCK_SIZE / sizeof(u32)] = {0}; SE(SE_CRYPTO_BLOCK_COUNT_REG) = 1 - 1; @@ -190,7 +190,6 @@ static int _se_execute_one_block(u32 op, void *dst, u32 dst_size, const void *sr int res = _se_execute_oneshot(op, block, SE_AES_BLOCK_SIZE, block, SE_AES_BLOCK_SIZE); memcpy(dst, block, dst_size); - free(block); return res; } @@ -389,7 +388,8 @@ int se_aes_crypt_ctr(u32 ks, void *dst, u32 dst_size, const void *src, u32 src_s int se_aes_xts_crypt_sec(u32 tweak_ks, u32 crypt_ks, u32 enc, u64 sec, void *dst, void *src, u32 secsize) { int res = 0; - u8 *tweak = (u8 *)malloc(SE_AES_BLOCK_SIZE); + u32 tmp[SE_AES_BLOCK_SIZE / sizeof(u32)]; + u8 *tweak = (u8 *)tmp; u8 *pdst = (u8 *)dst; u8 *psrc = (u8 *)src; @@ -418,8 +418,7 @@ int se_aes_xts_crypt_sec(u32 tweak_ks, u32 crypt_ks, u32 enc, u64 sec, void *dst res = 1; -out:; - free(tweak); +out: return res; } @@ -657,8 +656,11 @@ void se_get_aes_keys(u8 *buf, u8 *keys, u32 keysize) int se_aes_cmac_128(u32 ks, void *dst, const void *src, u32 src_size) { int res = 0; - u8 *key = (u8 *)zalloc(SE_KEY_128_SIZE); - u8 *last_block = (u8 *)zalloc(SE_AES_BLOCK_SIZE); + + u32 tmp1[SE_KEY_128_SIZE / sizeof(u32)] = {0}; + u32 tmp2[SE_AES_BLOCK_SIZE / sizeof(u32)] = {0}; + u8 *key = (u8 *)tmp1; + u8 *last_block = (u8 *)tmp2; se_aes_iv_clear(ks); se_aes_iv_updated_clear(ks); @@ -707,8 +709,6 @@ int se_aes_cmac_128(u32 ks, void *dst, const void *src, u32 src_size) for (u32 i = 0; i < (SE_KEY_128_SIZE / 4); i++) dst32[i] = SE(SE_HASH_RESULT_REG + (i * 4)); -out:; - free(key); - free(last_block); +out: return res; } From 6c958f16b8acbdff4d759b2018787f3757db6cf9 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 24 Jan 2025 15:18:35 +0200 Subject: [PATCH 257/308] bdk: ff: check for cltbl malloc success --- bdk/libs/fatfs/ff.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/bdk/libs/fatfs/ff.c b/bdk/libs/fatfs/ff.c index 4cae990..109e87b 100644 --- a/bdk/libs/fatfs/ff.c +++ b/bdk/libs/fatfs/ff.c @@ -4698,13 +4698,20 @@ FRESULT f_lseek ( DWORD *f_expand_cltbl ( FIL* fp, /* Pointer to the file object */ - UINT tblsz, /* Size of table */ + UINT tblsz, /* Size of table (2 DWORDs + 2 DWORDs per fragment) */ FSIZE_t ofs /* File pointer from top of file */ ) { + /* + * Cluster table structure: + * Size (DWORD) + * Padding (DWORD) + * (Cluster Offset (DWORD) + Sequential clusters (DWORD)) * Fragments + */ if (fp->flag & FA_WRITE) f_lseek(fp, ofs); /* Expand file if write is enabled */ if (!fp->cltbl) { /* Allocate memory for cluster link table */ fp->cltbl = (DWORD *)ff_memalloc(tblsz); + if (!fp->cltbl) return (void *)0; fp->cltbl[0] = tblsz; } if (f_lseek(fp, CREATE_LINKMAP)) { /* Create cluster link table */ From 5ce22a67dc3f1bc76323bb375a849ebdffd50899 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 24 Jan 2025 15:21:20 +0200 Subject: [PATCH 258/308] bdk: sdmmc: check for out bounds access --- bdk/storage/sdmmc.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/bdk/storage/sdmmc.c b/bdk/storage/sdmmc.c index 6458b44..995fefa 100644 --- a/bdk/storage/sdmmc.c +++ b/bdk/storage/sdmmc.c @@ -27,10 +27,13 @@ #include #include -//#define SDMMC_DEBUG_PRINT_SD_REGS //#define DPRINTF(...) gfx_printf(__VA_ARGS__) #define DPRINTF(...) +#ifdef BDK_SDMMC_EXTRA_PRINT +#define ERROR_EXTRA_PRINTING +#endif + u32 sd_power_cycle_time_start; static inline u32 unstuff_bits(const u32 *resp, u32 start, u32 size) @@ -256,6 +259,15 @@ static int _sdmmc_storage_readwrite(sdmmc_storage_t *storage, u32 sector, u32 nu if (!storage->initialized) return 0; + // Check if out of bounds. + if (((u64)sector + num_sectors) > storage->sec_cnt) + { +#ifdef ERROR_EXTRA_PRINTING + EPRINTFARGS("SDMMC%d: Out of bounds!", storage->sdmmc->id + 1); +#endif + return 0; + } + while (sct_total) { u32 blkcnt = 0; From e030a4ad6d60faab5b2310fcb2f654b8c7cf744d Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 24 Jan 2025 15:30:10 +0200 Subject: [PATCH 259/308] bdk: sdmmc: small refactor --- bdk/storage/sdmmc.c | 54 ++++++++++++------------- bdk/storage/sdmmc.h | 12 +++--- bdk/storage/sdmmc_driver.c | 83 ++++++++++++++------------------------ bdk/storage/sdmmc_driver.h | 22 +++++----- bdk/storage/sdmmc_t210.h | 7 +--- 5 files changed, 78 insertions(+), 100 deletions(-) diff --git a/bdk/storage/sdmmc.c b/bdk/storage/sdmmc.c index 995fefa..d715c28 100644 --- a/bdk/storage/sdmmc.c +++ b/bdk/storage/sdmmc.c @@ -55,7 +55,7 @@ static inline u32 unstuff_bits(const u32 *resp, u32 start, u32 size) static int _sdmmc_storage_check_card_status(u32 res) { //Error mask: - //TODO: R1_SWITCH_ERROR can be skipped for certain card types. + //!WARN: R1_SWITCH_ERROR is reserved on SD. The card isn't supposed to use it. if (res & (R1_OUT_OF_RANGE | R1_ADDRESS_ERROR | R1_BLOCK_LEN_ERROR | R1_ERASE_SEQ_ERROR | R1_ERASE_PARAM | R1_WP_VIOLATION | @@ -76,7 +76,7 @@ static int _sdmmc_storage_execute_cmd_type1_ex(sdmmc_storage_t *storage, u32 *re if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, NULL, NULL)) return 0; - sdmmc_get_rsp(storage->sdmmc, resp, 4, SDMMC_RSP_TYPE_1); + sdmmc_get_cached_rsp(storage->sdmmc, resp, SDMMC_RSP_TYPE_1); if (mask) *resp &= ~mask; @@ -108,7 +108,7 @@ static int _sdmmc_storage_get_cid(sdmmc_storage_t *storage) if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, NULL, NULL)) return 0; - sdmmc_get_rsp(storage->sdmmc, (u32 *)storage->raw_cid, 16, SDMMC_RSP_TYPE_2); + sdmmc_get_cached_rsp(storage->sdmmc, (u32 *)storage->raw_cid, SDMMC_RSP_TYPE_2); return 1; } @@ -125,7 +125,7 @@ static int _sdmmc_storage_get_csd(sdmmc_storage_t *storage) if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, NULL, NULL)) return 0; - sdmmc_get_rsp(storage->sdmmc, (u32 *)storage->raw_csd, 16, SDMMC_RSP_TYPE_2); + sdmmc_get_cached_rsp(storage->sdmmc, (u32 *)storage->raw_csd, SDMMC_RSP_TYPE_2); return 1; } @@ -154,7 +154,7 @@ int sdmmc_storage_execute_vendor_cmd(sdmmc_storage_t *storage, u32 arg) return 0; u32 resp; - sdmmc_get_rsp(storage->sdmmc, &resp, 4, SDMMC_RSP_TYPE_1); + sdmmc_get_cached_rsp(storage->sdmmc, &resp, SDMMC_RSP_TYPE_1); resp = -1; u32 timeout = get_tmr_ms() + 1500; @@ -405,7 +405,7 @@ static int _mmc_storage_get_op_cond_inner(sdmmc_storage_t *storage, u32 *pout, u if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, NULL, NULL)) return 0; - return sdmmc_get_rsp(storage->sdmmc, pout, 4, SDMMC_RSP_TYPE_3); + return sdmmc_get_cached_rsp(storage->sdmmc, pout, SDMMC_RSP_TYPE_3); } static int _mmc_storage_get_op_cond(sdmmc_storage_t *storage, u32 power) @@ -489,12 +489,12 @@ static void _mmc_storage_parse_csd(sdmmc_storage_t *storage) { u32 *raw_csd = (u32 *)storage->raw_csd; - storage->csd.mmca_vsn = unstuff_bits(raw_csd, 122, 4); - storage->csd.structure = unstuff_bits(raw_csd, 126, 2); - storage->csd.cmdclass = unstuff_bits(raw_csd, 84, 12); + storage->csd.mmca_vsn = unstuff_bits(raw_csd, 122, 4); + storage->csd.structure = unstuff_bits(raw_csd, 126, 2); + storage->csd.cmdclass = unstuff_bits(raw_csd, 84, 12); storage->csd.read_blkbits = unstuff_bits(raw_csd, 80, 4); - storage->csd.capacity = (1 + unstuff_bits(raw_csd, 62, 12)) << (unstuff_bits(raw_csd, 47, 3) + 2); - storage->sec_cnt = storage->csd.capacity; + storage->csd.capacity = (1 + unstuff_bits(raw_csd, 62, 12)) << (unstuff_bits(raw_csd, 47, 3) + 2); + storage->sec_cnt = storage->csd.capacity; } static void _mmc_storage_parse_ext_csd(sdmmc_storage_t *storage, u8 *buf) @@ -543,7 +543,7 @@ int mmc_storage_get_ext_csd(sdmmc_storage_t *storage, void *buf) return 0; u32 tmp = 0; - sdmmc_get_rsp(storage->sdmmc, &tmp, 4, SDMMC_RSP_TYPE_1); + sdmmc_get_cached_rsp(storage->sdmmc, &tmp, SDMMC_RSP_TYPE_1); _mmc_storage_parse_ext_csd(storage, buf); return _sdmmc_storage_check_card_status(tmp); @@ -934,7 +934,7 @@ static int _sd_storage_send_if_cond(sdmmc_storage_t *storage, bool *is_sdsc) // For Card version >= 2.0, parse results. u32 resp = 0; - sdmmc_get_rsp(storage->sdmmc, &resp, 4, SDMMC_RSP_TYPE_5); + sdmmc_get_cached_rsp(storage->sdmmc, &resp, SDMMC_RSP_TYPE_5); // Check if VHD was accepted and pattern was properly returned. if ((resp & 0xFFF) == vhd_pattern) @@ -960,7 +960,7 @@ static int _sd_storage_get_op_cond_once(sdmmc_storage_t *storage, u32 *cond, boo if (!_sd_storage_execute_app_cmd(storage, R1_SKIP_STATE_CHECK, is_sdsc ? R1_ILLEGAL_COMMAND : 0, &cmdbuf, NULL, NULL)) return 0; - return sdmmc_get_rsp(storage->sdmmc, cond, 4, SDMMC_RSP_TYPE_3); + return sdmmc_get_cached_rsp(storage->sdmmc, cond, SDMMC_RSP_TYPE_3); } static int _sd_storage_get_op_cond(sdmmc_storage_t *storage, bool is_sdsc, int bus_uhs_support) @@ -983,7 +983,7 @@ static int _sd_storage_get_op_cond(sdmmc_storage_t *storage, bool is_sdsc, int b storage->has_sector_access = 1; // Check if card supports 1.8V signaling. - if (cond & SD_ROCR_S18A && bus_uhs_support) + if (cond & SD_ROCR_S18A && bus_uhs_support && !storage->is_low_voltage) { // Switch to 1.8V signaling. if (_sdmmc_storage_execute_cmd_type1(storage, SD_SWITCH_VOLTAGE, 0, 0, R1_STATE_READY)) @@ -1027,7 +1027,7 @@ static int _sd_storage_get_rca(sdmmc_storage_t *storage) break; u32 resp = 0; - if (!sdmmc_get_rsp(storage->sdmmc, &resp, 4, SDMMC_RSP_TYPE_4)) + if (!sdmmc_get_cached_rsp(storage->sdmmc, &resp, SDMMC_RSP_TYPE_4)) break; if (resp >> 16) @@ -1058,7 +1058,7 @@ static void _sd_storage_parse_scr(sdmmc_storage_t *storage) storage->scr.sda_vsn = unstuff_bits(resp, 56, 4); storage->scr.bus_widths = unstuff_bits(resp, 48, 4); - /* If v2.0 is supported, check if Physical Layer Spec v3.0 is supported */ + // If v2.0 is supported, check if Physical Layer Spec v3.0 is supported. if (storage->scr.sda_vsn == SCR_SPEC_VER_2) storage->scr.sda_spec3 = unstuff_bits(resp, 47, 1); if (storage->scr.sda_spec3) @@ -1082,9 +1082,9 @@ int sd_storage_get_scr(sdmmc_storage_t *storage, u8 *buf) return 0; u32 tmp = 0; - sdmmc_get_rsp(storage->sdmmc, &tmp, 4, SDMMC_RSP_TYPE_1); + sdmmc_get_cached_rsp(storage->sdmmc, &tmp, SDMMC_RSP_TYPE_1); //Prepare buffer for unstuff_bits - for (int i = 0; i < 8; i+=4) + for (u32 i = 0; i < 8; i+=4) { storage->raw_scr[i + 3] = buf[i]; storage->raw_scr[i + 2] = buf[i + 1]; @@ -1113,7 +1113,7 @@ static int _sd_storage_switch_get(sdmmc_storage_t *storage, void *buf) return 0; u32 tmp = 0; - sdmmc_get_rsp(storage->sdmmc, &tmp, 4, SDMMC_RSP_TYPE_1); + sdmmc_get_cached_rsp(storage->sdmmc, &tmp, SDMMC_RSP_TYPE_1); return _sdmmc_storage_check_card_status(tmp); } @@ -1137,7 +1137,7 @@ static int _sd_storage_switch(sdmmc_storage_t *storage, void *buf, int mode, int return 0; u32 tmp = 0; - sdmmc_get_rsp(storage->sdmmc, &tmp, 4, SDMMC_RSP_TYPE_1); + sdmmc_get_cached_rsp(storage->sdmmc, &tmp, SDMMC_RSP_TYPE_1); return _sdmmc_storage_check_card_status(tmp); } @@ -1253,7 +1253,7 @@ static int _sd_storage_enable_DDR200(sdmmc_storage_t *storage, u8 *buf) u16 total_pwr_consumption = ((u16)buf[0] << 8) | buf[1]; DPRINTF("[SD] max power: %d mW\n", total_pwr_consumption * 3600 / 1000); - storage->card_power_limit = total_pwr_consumption; + storage->max_power = total_pwr_consumption; if (total_pwr_consumption <= 800) { @@ -1292,7 +1292,7 @@ static int _sd_storage_set_card_bus_speed(sdmmc_storage_t *storage, u32 hs_type, u16 total_pwr_consumption = ((u16)buf[0] << 8) | buf[1]; DPRINTF("[SD] max power: %d mW\n", total_pwr_consumption * 3600 / 1000); - storage->card_power_limit = total_pwr_consumption; + storage->max_power = total_pwr_consumption; if (total_pwr_consumption <= 800) { @@ -1556,10 +1556,10 @@ int sd_storage_get_ssr(sdmmc_storage_t *storage, u8 *buf) return 0; u32 tmp = 0; - sdmmc_get_rsp(storage->sdmmc, &tmp, 4, SDMMC_RSP_TYPE_1); + sdmmc_get_cached_rsp(storage->sdmmc, &tmp, SDMMC_RSP_TYPE_1); // Convert buffer to LE. - for (int i = 0; i < SDMMC_CMD_BLOCKSIZE; i += 4) + for (u32 i = 0; i < SDMMC_CMD_BLOCKSIZE; i += 4) { storage->raw_ssr[i + 3] = buf[i]; storage->raw_ssr[i + 2] = buf[i + 1]; @@ -1656,7 +1656,7 @@ void sdmmc_storage_init_wait_sd() int sdmmc_storage_init_sd(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 bus_width, u32 type) { u32 tmp = 0; - int is_sdsc = 0; + bool is_sdsc = 0; u8 *buf = (u8 *)SDMMC_UPPER_BUFFER; bool bus_uhs_support = _sdmmc_storage_get_bus_uhs_support(bus_width, type); @@ -1801,7 +1801,7 @@ int _gc_storage_custom_cmd(sdmmc_storage_t *storage, void *buf) return 0; } - if (!sdmmc_get_rsp(storage->sdmmc, &resp, 4, SDMMC_RSP_TYPE_1)) + if (!sdmmc_get_cached_rsp(storage->sdmmc, &resp, SDMMC_RSP_TYPE_1)) return 0; if (!_sdmmc_storage_check_card_status(resp)) return 0; diff --git a/bdk/storage/sdmmc.h b/bdk/storage/sdmmc.h index 8a98dc3..9447ef7 100644 --- a/bdk/storage/sdmmc.h +++ b/bdk/storage/sdmmc.h @@ -181,13 +181,13 @@ typedef struct _sd_ssr typedef struct _sdmmc_storage_t { sdmmc_t *sdmmc; - u32 rca; - int has_sector_access; - u32 sec_cnt; - int is_low_voltage; - u32 partition; int initialized; - u32 card_power_limit; + int is_low_voltage; + int has_sector_access; + u32 rca; + u32 sec_cnt; + u32 partition; + u32 max_power; u8 raw_cid[0x10]; u8 raw_csd[0x10]; u8 raw_scr[8]; diff --git a/bdk/storage/sdmmc_driver.c b/bdk/storage/sdmmc_driver.c index 95336e2..b6e3c8e 100644 --- a/bdk/storage/sdmmc_driver.c +++ b/bdk/storage/sdmmc_driver.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2024 CTCaer + * Copyright (c) 2018-2025 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -212,7 +212,7 @@ static void _sdmmc_autocal_execute(sdmmc_t *sdmmc, u32 power) // Use 0x1F mask for all. u8 autocal_pu_status = sdmmc->regs->autocalsts & 0x1F; if (!autocal_pu_status) - EPRINTFARGS("SDMMC%d: Comp Pad open!", sdmmc->id + 1); + EPRINTFARGS("SDMMC%d: Comp Pad open!", sdmmc->id + 1); // Or resistance is extreme. else if (autocal_pu_status == 0x1F) EPRINTFARGS("SDMMC%d: Comp Pad short to gnd!", sdmmc->id + 1); #endif @@ -394,8 +394,8 @@ int sdmmc_setup_clock(sdmmc_t *sdmmc, u32 type) static void _sdmmc_card_clock_enable(sdmmc_t *sdmmc) { - // Recalibrate conditionally. - if (sdmmc->manual_cal && !sdmmc->powersave_enabled) + // Recalibrate periodically if needed. + if (sdmmc->periodic_calibration && !sdmmc->powersave_enabled) _sdmmc_autocal_execute(sdmmc, sdmmc_get_io_power(sdmmc)); if (!sdmmc->powersave_enabled) @@ -414,8 +414,8 @@ static void _sdmmc_card_clock_disable(sdmmc_t *sdmmc) void sdmmc_card_clock_powersave(sdmmc_t *sdmmc, int powersave_enable) { - // Recalibrate periodically for SDMMC1. - if (sdmmc->manual_cal && !powersave_enable && sdmmc->card_clock_enabled) + // Recalibrate periodically if needed. + if (sdmmc->periodic_calibration && !powersave_enable && sdmmc->card_clock_enabled) _sdmmc_autocal_execute(sdmmc, sdmmc_get_io_power(sdmmc)); sdmmc->powersave_enabled = powersave_enable; @@ -431,7 +431,7 @@ void sdmmc_card_clock_powersave(sdmmc_t *sdmmc, int powersave_enable) sdmmc->regs->clkcon |= SDHCI_CLOCK_CARD_EN; } -static int _sdmmc_cache_rsp(sdmmc_t *sdmmc, u32 *rsp, u32 size, u32 type) +static int _sdmmc_cache_rsp(sdmmc_t *sdmmc, u32 *rsp, u32 type) { switch (type) { @@ -439,33 +439,14 @@ static int _sdmmc_cache_rsp(sdmmc_t *sdmmc, u32 *rsp, u32 size, u32 type) case SDMMC_RSP_TYPE_3: case SDMMC_RSP_TYPE_4: case SDMMC_RSP_TYPE_5: - if (size < 4) - return 0; - rsp[0] = sdmmc->regs->rspreg0; + rsp[0] = sdmmc->regs->rspreg[0]; break; case SDMMC_RSP_TYPE_2: - if (size < 0x10) - return 0; // CRC is stripped, so shifting is needed. - u32 tempreg; - for (int i = 0; i < 4; i++) + for (u32 i = 0; i < 4; i++) { - switch(i) - { - case 0: - tempreg = sdmmc->regs->rspreg3; - break; - case 1: - tempreg = sdmmc->regs->rspreg2; - break; - case 2: - tempreg = sdmmc->regs->rspreg1; - break; - case 3: - tempreg = sdmmc->regs->rspreg0; - break; - } + u32 tempreg = sdmmc->regs->rspreg[3 - i]; rsp[i] = tempreg << 8; if (i != 0) @@ -480,7 +461,7 @@ static int _sdmmc_cache_rsp(sdmmc_t *sdmmc, u32 *rsp, u32 size, u32 type) return 1; } -int sdmmc_get_rsp(sdmmc_t *sdmmc, u32 *rsp, u32 size, u32 type) +int sdmmc_get_cached_rsp(sdmmc_t *sdmmc, u32 *rsp, u32 type) { if (!rsp || sdmmc->expected_rsp_type != type) return 0; @@ -491,18 +472,12 @@ int sdmmc_get_rsp(sdmmc_t *sdmmc, u32 *rsp, u32 size, u32 type) case SDMMC_RSP_TYPE_3: case SDMMC_RSP_TYPE_4: case SDMMC_RSP_TYPE_5: - if (size < 4) - return 0; rsp[0] = sdmmc->rsp[0]; break; case SDMMC_RSP_TYPE_2: - if (size < 16) - return 0; - rsp[0] = sdmmc->rsp[0]; - rsp[1] = sdmmc->rsp[1]; - rsp[2] = sdmmc->rsp[2]; - rsp[3] = sdmmc->rsp[3]; + for (u32 i = 0; i < 4; i++) + rsp[i] = sdmmc->rsp[i]; break; default: @@ -915,6 +890,7 @@ static void _sdmmc_enable_interrupts(sdmmc_t *sdmmc) sdmmc->regs->errintstsen |= SDHCI_ERR_INT_ALL_EXCEPT_ADMA_BUSPWR; sdmmc->regs->norintsts = sdmmc->regs->norintsts; sdmmc->regs->errintsts = sdmmc->regs->errintsts; + sdmmc->error_sts = 0; } static void _sdmmc_mask_interrupts(sdmmc_t *sdmmc) @@ -937,8 +913,9 @@ static u32 _sdmmc_check_mask_interrupt(sdmmc_t *sdmmc, u16 *pout, u16 mask) if (norintsts & SDHCI_INT_ERROR) { #ifdef ERROR_EXTRA_PRINTING - EPRINTFARGS("SDMMC%d: norintsts %08X, errintsts %08X", sdmmc->id + 1, norintsts, errintsts); + EPRINTFARGS("SDMMC%d: intsts %08X, errintsts %08X", sdmmc->id + 1, norintsts, errintsts); #endif + sdmmc->error_sts = errintsts; sdmmc->regs->errintsts = errintsts; return SDMMC_MASKINT_ERROR; } @@ -993,7 +970,7 @@ static int _sdmmc_stop_transmission_inner(sdmmc_t *sdmmc, u32 *rsp) if (!result) return 0; - _sdmmc_cache_rsp(sdmmc, rsp, 4, SDMMC_RSP_TYPE_1); + _sdmmc_cache_rsp(sdmmc, rsp, SDMMC_RSP_TYPE_1); return _sdmmc_wait_card_busy(sdmmc); } @@ -1003,8 +980,8 @@ int sdmmc_stop_transmission(sdmmc_t *sdmmc, u32 *rsp) if (!sdmmc->card_clock_enabled) return 0; - // Recalibrate periodically for SDMMC1. - if (sdmmc->manual_cal && sdmmc->powersave_enabled) + // Recalibrate periodically if needed. + if (sdmmc->periodic_calibration && sdmmc->powersave_enabled) _sdmmc_autocal_execute(sdmmc, sdmmc_get_io_power(sdmmc)); bool should_disable_sd_clock = false; @@ -1120,7 +1097,7 @@ static int _sdmmc_update_sdma(sdmmc_t *sdmmc) static int _sdmmc_execute_cmd_inner(sdmmc_t *sdmmc, sdmmc_cmd_t *cmd, sdmmc_req_t *req, u32 *blkcnt_out) { - int has_req_or_check_busy = req || cmd->check_busy; + bool has_req_or_check_busy = req || cmd->check_busy; if (!_sdmmc_wait_cmd_data_inhibit(sdmmc, has_req_or_check_busy)) return 0; @@ -1158,13 +1135,13 @@ static int _sdmmc_execute_cmd_inner(sdmmc_t *sdmmc, sdmmc_cmd_t *cmd, sdmmc_req_ EPRINTFARGS("SDMMC%d: Transfer error!", sdmmc->id + 1); #endif DPRINTF("rsp(%d): %08X, %08X, %08X, %08X\n", result, - sdmmc->regs->rspreg0, sdmmc->regs->rspreg1, sdmmc->regs->rspreg2, sdmmc->regs->rspreg3); + sdmmc->regs->rspreg[0], sdmmc->regs->rspreg[1], sdmmc->regs->rspreg[2], sdmmc->regs->rspreg[3]); if (result) { if (cmd->rsp_type) { sdmmc->expected_rsp_type = cmd->rsp_type; - result = _sdmmc_cache_rsp(sdmmc, sdmmc->rsp, 0x10, cmd->rsp_type); + result = _sdmmc_cache_rsp(sdmmc, sdmmc->rsp, cmd->rsp_type); #ifdef ERROR_EXTRA_PRINTING if (!result) EPRINTFARGS("SDMMC%d: Unknown response type!", sdmmc->id + 1); @@ -1193,10 +1170,10 @@ static int _sdmmc_execute_cmd_inner(sdmmc_t *sdmmc, sdmmc_cmd_t *cmd, sdmmc_req_ *blkcnt_out = blkcnt; if (req->is_auto_stop_trn) - sdmmc->rsp3 = sdmmc->regs->rspreg3; + sdmmc->stop_trn_rsp = sdmmc->regs->rspreg[3]; } - if (cmd->check_busy || req) + if (has_req_or_check_busy) { result = _sdmmc_wait_card_busy(sdmmc); #ifdef ERROR_EXTRA_PRINTING @@ -1248,7 +1225,7 @@ static void _sdmmc_config_sdmmc1_pads(bool discharge) u32 level = GPIO_LOW; u32 output = GPIO_OUTPUT_DISABLE; - // Set values for dicharging. + // Set values for discharging. if (discharge) { function = GPIO_MODE_GPIO; @@ -1304,7 +1281,7 @@ static int _sdmmc_config_sdmmc1(bool t210b01) // Enable SD card power. Powers LDO2 also. PINMUX_AUX(PINMUX_AUX_DMIC3_CLK) = PINMUX_PULL_DOWN | 2; gpio_direction_output(GPIO_PORT_E, GPIO_PIN_4, GPIO_HIGH); - usleep(10000); + usleep(10000); // Minimum 3 to 10 ms. // Inform IO pads that voltage is gonna be 3.3V. PMC(APBDEV_PMC_PWR_DET_VAL) |= PMC_PWR_DET_33V_SDMMC1; @@ -1385,7 +1362,7 @@ int sdmmc_init(sdmmc_t *sdmmc, u32 id, u32 power, u32 bus_width, u32 type) if (sdmmc->t210b01) vref_sel = 0; else - sdmmc->manual_cal = 1; + sdmmc->periodic_calibration = 1; break; case SDMMC_2: @@ -1419,6 +1396,8 @@ int sdmmc_init(sdmmc_t *sdmmc, u32 id, u32 power, u32 bus_width, u32 type) if (!_sdmmc_autocal_config_offset(sdmmc, power)) return 0; + _sdmmc_commit_changes(sdmmc); + // Calibrate pads. _sdmmc_autocal_execute(sdmmc, power); @@ -1506,8 +1485,8 @@ int sdmmc_execute_cmd(sdmmc_t *sdmmc, sdmmc_cmd_t *cmd, sdmmc_req_t *req, u32 *b if (!sdmmc->card_clock_enabled) return 0; - // Recalibrate periodically for SDMMC1. - if (sdmmc->manual_cal && sdmmc->powersave_enabled) + // Recalibrate periodically if needed. + if (sdmmc->periodic_calibration && sdmmc->powersave_enabled) _sdmmc_autocal_execute(sdmmc, sdmmc_get_io_power(sdmmc)); int should_disable_sd_clock = 0; diff --git a/bdk/storage/sdmmc_driver.h b/bdk/storage/sdmmc_driver.h index ee62eaf..fe09c5a 100644 --- a/bdk/storage/sdmmc_driver.h +++ b/bdk/storage/sdmmc_driver.h @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2023 CTCaer + * Copyright (c) 2018-2025 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -101,6 +101,7 @@ #define SDHCI_CMD_TYPE_SUSPEND (1U << 6) #define SDHCI_CMD_TYPE_RESUME (2U << 6) #define SDHCI_CMD_TYPE_ABORT (3U << 6) +#define SDHCI_CMD_SPI_CS_LOW BIT(7) #define SDHCI_CMD_IDX(cmd) ((cmd) << 8) @@ -170,10 +171,10 @@ #define SDHCI_INT_ERROR BIT(15) /*! SDMMC error interrupt status and control. 0x32/0x36. */ -#define SDHCI_ERR_INT_TIMEOUT BIT(0) -#define SDHCI_ERR_INT_CRC BIT(1) -#define SDHCI_ERR_INT_END_BIT BIT(2) -#define SDHCI_ERR_INT_INDEX BIT(3) +#define SDHCI_ERR_INT_CMD_TIMEOUT BIT(0) +#define SDHCI_ERR_INT_CMD_CRC BIT(1) +#define SDHCI_ERR_INT_CMD_END_BIT BIT(2) +#define SDHCI_ERR_INT_CMD_INDEX BIT(3) #define SDHCI_ERR_INT_DATA_TIMEOUT BIT(4) #define SDHCI_ERR_INT_DATA_CRC BIT(5) #define SDHCI_ERR_INT_DATA_END_BIT BIT(6) @@ -190,8 +191,8 @@ #define SDHCI_ERR_INT_ALL_EXCEPT_ADMA_BUSPWR \ (SDHCI_ERR_INT_AUTO_CMD12 | SDHCI_ERR_INT_DATA_END_BIT | \ SDHCI_ERR_INT_DATA_CRC | SDHCI_ERR_INT_DATA_TIMEOUT | \ - SDHCI_ERR_INT_INDEX | SDHCI_ERR_INT_END_BIT | \ - SDHCI_ERR_INT_CRC | SDHCI_ERR_INT_TIMEOUT) + SDHCI_ERR_INT_CMD_INDEX | SDHCI_ERR_INT_CMD_END_BIT | \ + SDHCI_ERR_INT_CMD_CRC | SDHCI_ERR_INT_CMD_TIMEOUT) /*! Host Capability 1. 0x40. */ #define SDHCI_CAP_TM_CLK_FREQ_MASK 0x3F @@ -285,14 +286,15 @@ typedef struct _sdmmc_t u32 card_clock; u32 clock_stopped; int powersave_enabled; - int manual_cal; + int periodic_calibration; int card_clock_enabled; int venclkctl_set; u32 venclkctl_tap; u32 expected_rsp_type; u32 dma_addr_next; u32 rsp[4]; - u32 rsp3; + u32 stop_trn_rsp; + u32 error_sts; int t210b01; } sdmmc_t; @@ -323,7 +325,7 @@ void sdmmc_save_tap_value(sdmmc_t *sdmmc); void sdmmc_setup_drv_type(sdmmc_t *sdmmc, u32 type); int sdmmc_setup_clock(sdmmc_t *sdmmc, u32 type); void sdmmc_card_clock_powersave(sdmmc_t *sdmmc, int powersave_enable); -int sdmmc_get_rsp(sdmmc_t *sdmmc, u32 *rsp, u32 size, u32 type); +int sdmmc_get_cached_rsp(sdmmc_t *sdmmc, u32 *rsp, u32 type); int sdmmc_tuning_execute(sdmmc_t *sdmmc, u32 type, u32 cmd); int sdmmc_stop_transmission(sdmmc_t *sdmmc, u32 *rsp); bool sdmmc_get_sd_inserted(); diff --git a/bdk/storage/sdmmc_t210.h b/bdk/storage/sdmmc_t210.h index dfea7d5..26c1e49 100644 --- a/bdk/storage/sdmmc_t210.h +++ b/bdk/storage/sdmmc_t210.h @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2023 CTCaer + * Copyright (c) 2018-2025 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -39,10 +39,7 @@ typedef struct _t210_sdmmc_t /* 0x08 */ vu32 argument; /* 0x0C */ vu16 trnmod; /* 0x0E */ vu16 cmdreg; -/* 0x10 */ vu32 rspreg0; -/* 0x14 */ vu32 rspreg1; -/* 0x18 */ vu32 rspreg2; -/* 0x1C */ vu32 rspreg3; +/* 0x10 */ vu32 rspreg[4]; /* 0x20 */ vu32 bdata; // Buffer data port. /* 0x24 */ vu32 prnsts; /* 0x28 */ vu8 hostctl; From 0e01a5caa9e9fce32e67fa3a811f21565061877b Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 24 Jan 2025 15:31:15 +0200 Subject: [PATCH 260/308] nyx: info: use renamed sd storage member --- nyx/nyx_gui/frontend/gui_info.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index 5d5ec2a..09f86b0 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -1985,7 +1985,7 @@ static lv_res_t _create_window_sdcard_info_status(lv_obj_t *btn) } // UHS-I max power limit is 400mA, no matter what the card says. - u32 card_power_limit_nominal = sd_storage.card_power_limit > 400 ? 400 : sd_storage.card_power_limit; + u32 max_power_nominal = sd_storage.max_power > 400 ? 400 : sd_storage.max_power; s_printf(txt_buf + strlen(txt_buf), "(%02X)\n%c%c%c%c%c\n%c%c (%04X)\n%X\n%X\n%08x\n%02d/%04d\n\n%d mW (%d mA)\n", sd_storage.cid.manfid, @@ -1994,7 +1994,7 @@ static lv_res_t _create_window_sdcard_info_status(lv_obj_t *btn) (sd_storage.cid.oemid >> 8) & 0xFF, sd_storage.cid.oemid & 0xFF, sd_storage.cid.oemid, sd_storage.cid.hwrev, sd_storage.cid.fwrev, sd_storage.cid.serial, sd_storage.cid.month, sd_storage.cid.year, - card_power_limit_nominal * 3600 / 1000, sd_storage.card_power_limit); + max_power_nominal * 3600 / 1000, sd_storage.max_power); switch (nyx_str->info.sd_init) { From 018ed3f38a4facc950ee22f6a1bba197e67a36dd Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 24 Jan 2025 15:39:17 +0200 Subject: [PATCH 261/308] bdk: sdmmc: update unstuff_bits to use mod Since unstuff_bits only supports 128bits, instead of subtracting the correct amount of bits with the offset array, use % 128. --- bdk/storage/sd_def.h | 7 +++- bdk/storage/sdmmc.c | 88 ++++++++++++++++++++++++-------------------- bdk/storage/sdmmc.h | 3 +- 3 files changed, 57 insertions(+), 41 deletions(-) diff --git a/bdk/storage/sd_def.h b/bdk/storage/sd_def.h index 14782bf..898ac46 100644 --- a/bdk/storage/sd_def.h +++ b/bdk/storage/sd_def.h @@ -1,6 +1,6 @@ /* * Copyright (c) 2005-2007 Pierre Ossman, All Rights Reserved. - * Copyright (c) 2018-2023 CTCaer + * Copyright (c) 2018-2025 CTCaer * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -17,11 +17,16 @@ #define SD_SEND_RELATIVE_ADDR 3 /* bcr R6 */ #define SD_SEND_IF_COND 8 /* bcr [11:0] See below R7 */ #define SD_SWITCH_VOLTAGE 11 /* ac R1 */ +/* Class 2 */ +#define SD_ADDR_EXT 22 /* ac [5:0] R1 */ /* class 10 */ #define SD_SWITCH 6 /* adtc [31:0] See below R1 */ /* class 5 */ #define SD_ERASE_WR_BLK_START 32 /* ac [31:0] data addr R1 */ #define SD_ERASE_WR_BLK_END 33 /* ac [31:0] data addr R1 */ + /* class 11 */ +#define SD_READ_EXTR_SINGLE 48 /* adtc [31:0] R1 */ +#define SD_WRITE_EXTR_SINGLE 49 /* adtc [31:0] R1 */ /* Application commands */ #define SD_APP_SET_BUS_WIDTH 6 /* ac [1:0] bus width R1 */ diff --git a/bdk/storage/sdmmc.c b/bdk/storage/sdmmc.c index d715c28..bcff04a 100644 --- a/bdk/storage/sdmmc.c +++ b/bdk/storage/sdmmc.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2023 CTCaer + * Copyright (c) 2018-2025 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -38,6 +38,8 @@ u32 sd_power_cycle_time_start; static inline u32 unstuff_bits(const u32 *resp, u32 start, u32 size) { + start %= 128; + const u32 mask = (size < 32 ? 1 << size : 0) - 1; const u32 off = 3 - ((start) / 32); const u32 shft = (start) & 31; @@ -825,7 +827,7 @@ void _sd_storage_debug_print_csd(const u32 *raw_csd) gfx_printf("WRITE_BLK_MISALIGN: %X\n", unstuff_bits(raw_csd, 78, 1)); gfx_printf("READ_BLK_MISALIGN: %X\n", unstuff_bits(raw_csd, 77, 1)); gfx_printf("DSR_IMP: %X\n", unstuff_bits(raw_csd, 76, 1)); - gfx_printf("C_SIZE: %06X\n", unstuff_bits(raw_csd, 48, 22)); + gfx_printf("C_SIZE: %06X\n", unstuff_bits(raw_csd, 48, 28)); // CSD 3 (SDUC). gfx_printf("ERASE_BLK_LEN: %X\n", unstuff_bits(raw_csd, 46, 1)); gfx_printf("SECTOR_SIZE: %02X\n", unstuff_bits(raw_csd, 39, 6)); @@ -842,8 +844,8 @@ void _sd_storage_debug_print_csd(const u32 *raw_csd) gfx_printf("TMP_WRITE_PROTECT: %X\n", unstuff_bits(raw_csd, 12, 1)); gfx_printf("FILE_FORMAT: %X\n", unstuff_bits(raw_csd, 10, 2)); - gfx_printf("--RSVD-- %02X %02X %X %X %02X %X\n", - unstuff_bits(raw_csd, 120, 6), unstuff_bits(raw_csd, 70, 6), + gfx_printf("--RSVD-- %02X %X %X %02X %X\n", + unstuff_bits(raw_csd, 120, 6), unstuff_bits(raw_csd, 47, 1), unstuff_bits(raw_csd, 29, 2), unstuff_bits(raw_csd, 16, 5), unstuff_bits(raw_csd, 8, 2)); } @@ -882,39 +884,39 @@ void _sd_storage_debug_print_ssr(const u8 *raw_ssr) gfx_printf("\nSD Status:\n"); - gfx_printf("DAT_BUS_WIDTH: %X\n", unstuff_bits(raw_ssr0, 510 - 384, 2)); - gfx_printf("SECURED_MODE: %X\n", unstuff_bits(raw_ssr0, 509 - 384, 1)); - gfx_printf("SECURITY_FUNCTIONS: %02X\n", unstuff_bits(raw_ssr0, 502 - 384, 6)); - gfx_printf("SD_CARD_TYPE: %04X\n", unstuff_bits(raw_ssr0, 480 - 384, 16)); - gfx_printf("SZ_OF_PROTECTED_AREA: %08X\n", unstuff_bits(raw_ssr0, 448 - 384, 32)); - gfx_printf("SPEED_CLASS: %02X\n", unstuff_bits(raw_ssr0, 440 - 384, 8)); - gfx_printf("PERFORMANCE_MOVE: %02X\n", unstuff_bits(raw_ssr0, 432 - 384, 8)); - gfx_printf("AU_SIZE: %X\n", unstuff_bits(raw_ssr0, 428 - 384, 4)); - gfx_printf("ERAZE_SIZE: %04X\n", unstuff_bits(raw_ssr0, 408 - 384, 16)); - gfx_printf("ERASE_TIMEOUT: %02X\n", unstuff_bits(raw_ssr0, 402 - 384, 6)); - gfx_printf("ERASE_OFFSET: %X\n", unstuff_bits(raw_ssr0, 400 - 384, 2)); - gfx_printf("UHS_SPEED_GRADE: %X\n", unstuff_bits(raw_ssr0, 396 - 384, 4)); - gfx_printf("UHS_AU_SIZE: %X\n", unstuff_bits(raw_ssr0, 392 - 384, 4)); - gfx_printf("VIDEO_SPEED_CLASS: %02X\n", unstuff_bits(raw_ssr0, 384 - 384, 8)); + gfx_printf("DAT_BUS_WIDTH: %X\n", unstuff_bits(raw_ssr0, 510, 2)); + gfx_printf("SECURED_MODE: %X\n", unstuff_bits(raw_ssr0, 509, 1)); + gfx_printf("SECURITY_FUNCTIONS: %02X\n", unstuff_bits(raw_ssr0, 502, 6)); + gfx_printf("SD_CARD_TYPE: %04X\n", unstuff_bits(raw_ssr0, 480, 16)); + gfx_printf("SZ_OF_PROTECTED_AREA: %08X\n", unstuff_bits(raw_ssr0, 448, 32)); + gfx_printf("SPEED_CLASS: %02X\n", unstuff_bits(raw_ssr0, 440, 8)); + gfx_printf("PERFORMANCE_MOVE: %02X\n", unstuff_bits(raw_ssr0, 432, 8)); + gfx_printf("AU_SIZE: %X\n", unstuff_bits(raw_ssr0, 428, 4)); + gfx_printf("ERAZE_SIZE: %04X\n", unstuff_bits(raw_ssr0, 408, 16)); + gfx_printf("ERASE_TIMEOUT: %02X\n", unstuff_bits(raw_ssr0, 402, 6)); + gfx_printf("ERASE_OFFSET: %X\n", unstuff_bits(raw_ssr0, 400, 2)); + gfx_printf("UHS_SPEED_GRADE: %X\n", unstuff_bits(raw_ssr0, 396, 4)); + gfx_printf("UHS_AU_SIZE: %X\n", unstuff_bits(raw_ssr0, 392, 4)); + gfx_printf("VIDEO_SPEED_CLASS: %02X\n", unstuff_bits(raw_ssr0, 384, 8)); - gfx_printf("VSC_AU_SIZE: %03X\n", unstuff_bits(raw_ssr1, 368 - 256, 10)); - gfx_printf("SUS_ADDR: %06X\n", unstuff_bits(raw_ssr1, 346 - 256, 22)); - gfx_printf("APP_PERF_CLASS: %X\n", unstuff_bits(raw_ssr1, 336 - 256, 4)); - gfx_printf("PERFORMANCE_ENHANCE: %02X\n", unstuff_bits(raw_ssr1, 328 - 256, 8)); - gfx_printf("DISCARD_SUPPORT: %X\n", unstuff_bits(raw_ssr1, 313 - 256, 1)); - gfx_printf("FULE_SUPPORT: %X\n", unstuff_bits(raw_ssr1, 312 - 256, 1)); + gfx_printf("VSC_AU_SIZE: %03X\n", unstuff_bits(raw_ssr1, 368, 10)); + gfx_printf("SUS_ADDR: %06X\n", unstuff_bits(raw_ssr1, 346, 22)); + gfx_printf("APP_PERF_CLASS: %X\n", unstuff_bits(raw_ssr1, 336, 4)); + gfx_printf("PERFORMANCE_ENHANCE: %02X\n", unstuff_bits(raw_ssr1, 328, 8)); + gfx_printf("DISCARD_SUPPORT: %X\n", unstuff_bits(raw_ssr1, 313, 1)); + gfx_printf("FULE_SUPPORT: %X\n", unstuff_bits(raw_ssr1, 312, 1)); gfx_printf("--RSVD-- %02X %X %02X %02X %04X\n", - unstuff_bits(raw_ssr0, 496 - 384, 6), unstuff_bits(raw_ssr0, 424 - 384, 4), - unstuff_bits(raw_ssr1, 378 - 256, 6), unstuff_bits(raw_ssr1, 340 - 256, 6), - unstuff_bits(raw_ssr1, 314 - 256, 14)); + unstuff_bits(raw_ssr0, 496, 6), unstuff_bits(raw_ssr0, 424, 4), + unstuff_bits(raw_ssr1, 378, 6), unstuff_bits(raw_ssr1, 340, 6), + unstuff_bits(raw_ssr1, 314, 14)); gfx_printf("VENDOR_1: %06X %08X\n", - unstuff_bits(raw_ssr1, 288 - 256, 24), unstuff_bits(raw_ssr1, 256 - 256, 32)); + unstuff_bits(raw_ssr1, 288, 24), unstuff_bits(raw_ssr1, 256, 32)); gfx_printf("VENDOR_2: %08X %08X %08X %08X\n", - unstuff_bits(raw_ssr2, 224 - 128, 32), unstuff_bits(raw_ssr2, 192 - 128, 32), - unstuff_bits(raw_ssr2, 160 - 128, 32), unstuff_bits(raw_ssr2, 128 - 128, 32)); + unstuff_bits(raw_ssr2, 224, 32), unstuff_bits(raw_ssr2, 192, 32), + unstuff_bits(raw_ssr2, 160, 32), unstuff_bits(raw_ssr2, 128, 32)); gfx_printf("VENDOR_3: %08X %08X %08X %08X\n", unstuff_bits(raw_ssr3, 96 - 0, 32), unstuff_bits(raw_ssr3, 64, 32), unstuff_bits(raw_ssr3, 32 - 0, 32), unstuff_bits(raw_ssr3, 0, 32)); @@ -1062,7 +1064,13 @@ static void _sd_storage_parse_scr(sdmmc_storage_t *storage) if (storage->scr.sda_vsn == SCR_SPEC_VER_2) storage->scr.sda_spec3 = unstuff_bits(resp, 47, 1); if (storage->scr.sda_spec3) - storage->scr.cmds = unstuff_bits(resp, 32, 2); + { + u8 sda_spec4 = unstuff_bits(resp, 42, 1); + if (sda_spec4) + storage->scr.cmds = unstuff_bits(resp, 32, 4); + else + storage->scr.cmds = unstuff_bits(resp, 32, 2); + } } int sd_storage_get_scr(sdmmc_storage_t *storage, u8 *buf) @@ -1504,10 +1512,10 @@ static void _sd_storage_parse_ssr(sdmmc_storage_t *storage) _sd_storage_debug_print_ssr(storage->raw_ssr); #endif - storage->ssr.bus_width = (unstuff_bits(raw_ssr1, 510 - 384, 2) & SD_BUS_WIDTH_4) ? 4 : 1; - storage->ssr.protected_size = unstuff_bits(raw_ssr1, 448 - 384, 32); + storage->ssr.bus_width = (unstuff_bits(raw_ssr1, 510, 2) & SD_BUS_WIDTH_4) ? 4 : 1; + storage->ssr.protected_size = unstuff_bits(raw_ssr1, 448, 32); - u32 speed_class = unstuff_bits(raw_ssr1, 440 - 384, 8); + u32 speed_class = unstuff_bits(raw_ssr1, 440, 8); switch(speed_class) { case 0: @@ -1525,12 +1533,14 @@ static void _sd_storage_parse_ssr(sdmmc_storage_t *storage) storage->ssr.speed_class = speed_class; break; } - storage->ssr.uhs_grade = unstuff_bits(raw_ssr1, 396 - 384, 4); - storage->ssr.video_class = unstuff_bits(raw_ssr1, 384 - 384, 8); - storage->ssr.app_class = unstuff_bits(raw_ssr2, 336 - 256, 4); + storage->ssr.uhs_grade = unstuff_bits(raw_ssr1, 396, 4); + storage->ssr.video_class = unstuff_bits(raw_ssr1, 384, 8); + storage->ssr.app_class = unstuff_bits(raw_ssr2, 336, 4); - storage->ssr.au_size = unstuff_bits(raw_ssr1, 428 - 384, 4); - storage->ssr.uhs_au_size = unstuff_bits(raw_ssr1, 392 - 384, 4); + storage->ssr.au_size = unstuff_bits(raw_ssr1, 428, 4); + storage->ssr.uhs_au_size = unstuff_bits(raw_ssr1, 392, 4); + + storage->ssr.perf_enhance = unstuff_bits(raw_ssr2, 328, 8); } int sd_storage_get_ssr(sdmmc_storage_t *storage, u8 *buf) diff --git a/bdk/storage/sdmmc.h b/bdk/storage/sdmmc.h index 9447ef7..fde4d20 100644 --- a/bdk/storage/sdmmc.h +++ b/bdk/storage/sdmmc.h @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2022 CTCaer + * Copyright (c) 2018-2025 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -174,6 +174,7 @@ typedef struct _sd_ssr u8 app_class; u8 au_size; u8 uhs_au_size; + u8 perf_enhance; u32 protected_size; } sd_ssr_t; From dcd4e4c4ec109bc692702740ef40a8f168d33c39 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 24 Jan 2025 15:40:38 +0200 Subject: [PATCH 262/308] bdk: sdmmc: check that cmd timed out if SDSC Instead of assuming that, check it. This fix will make SDUC not to be assumed as SDSC. --- bdk/storage/sdmmc.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/bdk/storage/sdmmc.c b/bdk/storage/sdmmc.c index bcff04a..21df767 100644 --- a/bdk/storage/sdmmc.c +++ b/bdk/storage/sdmmc.c @@ -930,8 +930,14 @@ static int _sd_storage_send_if_cond(sdmmc_storage_t *storage, bool *is_sdsc) sdmmc_init_cmd(&cmdbuf, SD_SEND_IF_COND, vhd_pattern, SDMMC_RSP_TYPE_5, 0); if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, NULL, NULL)) { - *is_sdsc = 1; // The SD Card is version 1.X - return 1; + // The SD Card is version 1.X (SDSC) if there is no response. + if (storage->sdmmc->error_sts == SDHCI_ERR_INT_CMD_TIMEOUT) + { + *is_sdsc = 1; + return 1; + } + + return 0; } // For Card version >= 2.0, parse results. From 595ac2c11e493ce740a70185c50d51e85d78c006 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 24 Jan 2025 15:44:33 +0200 Subject: [PATCH 263/308] bdk: sdmmc: refactor error checking on rw And also check if card status is ok after a read/write. --- bdk/storage/sdmmc.c | 85 +++++++++++++++++++++++++-------------------- 1 file changed, 47 insertions(+), 38 deletions(-) diff --git a/bdk/storage/sdmmc.c b/bdk/storage/sdmmc.c index 21df767..e7460b1 100644 --- a/bdk/storage/sdmmc.c +++ b/bdk/storage/sdmmc.c @@ -30,6 +30,7 @@ //#define DPRINTF(...) gfx_printf(__VA_ARGS__) #define DPRINTF(...) +//#define SDMMC_DEBUG_PRINT_SD_REGS #ifdef BDK_SDMMC_EXTRA_PRINT #define ERROR_EXTRA_PRINTING #endif @@ -233,6 +234,10 @@ static int _sdmmc_storage_readwrite_ex(sdmmc_storage_t *storage, u32 *blkcnt_out return 0; } + sdmmc_get_cached_rsp(storage->sdmmc, &tmp, SDMMC_RSP_TYPE_1); + if (!_sdmmc_storage_check_card_status(tmp)) + return 0; + return 1; } @@ -250,6 +255,43 @@ int sdmmc_storage_end(sdmmc_storage_t *storage) return 1; } +static int _sdmmc_storage_handle_io_error(sdmmc_storage_t *storage, bool first_reinit) +{ + int res = 0; + + if (storage->sdmmc->id == SDMMC_1 || storage->sdmmc->id == SDMMC_4) + { + if (storage->sdmmc->id == SDMMC_1) + { + sd_error_count_increment(SD_ERROR_RW_FAIL); + + if (first_reinit) + res = sd_initialize(true); + else + { + res = sd_init_retry(true); + if (!res) + sd_error_count_increment(SD_ERROR_INIT_FAIL); + } + } + else if (storage->sdmmc->id == SDMMC_4) + { + emmc_error_count_increment(EMMC_ERROR_RW_FAIL); + + if (first_reinit) + res = emmc_initialize(true); + else + { + res = emmc_init_retry(true); + if (!res) + emmc_error_count_increment(EMMC_ERROR_INIT_FAIL); + } + } + } + + return res; +} + static int _sdmmc_storage_readwrite(sdmmc_storage_t *storage, u32 sector, u32 num_sectors, void *buf, u32 is_write) { u8 *bbuf = (u8 *)buf; @@ -289,51 +331,18 @@ reinit_try: } while (retries); // Disk IO failure! Reinit SD/EMMC to a lower speed. - if (storage->sdmmc->id == SDMMC_1 || storage->sdmmc->id == SDMMC_4) + if (_sdmmc_storage_handle_io_error(storage, first_reinit)) { - int res = 0; - - if (storage->sdmmc->id == SDMMC_1) - { - sd_error_count_increment(SD_ERROR_RW_FAIL); - - if (first_reinit) - res = sd_initialize(true); - else - { - res = sd_init_retry(true); - if (!res) - sd_error_count_increment(SD_ERROR_INIT_FAIL); - } - } - else if (storage->sdmmc->id == SDMMC_4) - { - emmc_error_count_increment(EMMC_ERROR_RW_FAIL); - - if (first_reinit) - res = emmc_initialize(true); - else - { - res = emmc_init_retry(true); - if (!res) - emmc_error_count_increment(EMMC_ERROR_INIT_FAIL); - } - } - // Reset values for a retry. blkcnt = 0; retries = 3; first_reinit = false; - // If successful reinit, restart xfer. - if (res) - { - bbuf = (u8 *)buf; - sct_off = sector; - sct_total = num_sectors; + bbuf = (u8 *)buf; + sct_off = sector; + sct_total = num_sectors; - goto reinit_try; - } + goto reinit_try; } // Failed. From 7ac47b9ffe634816372488ebed8e81d7f4ec4ce1 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 24 Jan 2025 15:46:27 +0200 Subject: [PATCH 264/308] bdk: dirlist: switch to alphabetical ordering --- bdk/utils/dirlist.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/bdk/utils/dirlist.c b/bdk/utils/dirlist.c index 77174aa..b1de140 100644 --- a/bdk/utils/dirlist.c +++ b/bdk/utils/dirlist.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2024 CTCaer + * Copyright (c) 2018-2025 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -82,12 +82,12 @@ dirlist_t *dirlist(const char *directory, const char *pattern, bool includeHidde // Terminate name list. dir_entries->name[k] = NULL; - // Reorder ini files by ASCII ordering. + // Reorder ini files Alphabetically. for (u32 i = 0; i < k - 1 ; i++) { for (u32 j = i + 1; j < k; j++) { - if (strcmp(dir_entries->name[i], dir_entries->name[j]) > 0) + if (strcasecmp(dir_entries->name[i], dir_entries->name[j]) > 0) { char *tmp = dir_entries->name[i]; dir_entries->name[i] = dir_entries->name[j]; From 29be5441672eb1b37046197171295a5be5ff6773 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 24 Jan 2025 15:53:52 +0200 Subject: [PATCH 265/308] hos: small refactor Also exiting hos_launch is considered always an error. --- bootloader/hos/hos.c | 83 ++++++++++++++++++++------------------------ bootloader/hos/hos.h | 8 ++--- bootloader/main.c | 8 +++-- 3 files changed, 47 insertions(+), 52 deletions(-) diff --git a/bootloader/hos/hos.c b/bootloader/hos/hos.c index a0bbed6..88d53da 100644 --- a/bootloader/hos/hos.c +++ b/bootloader/hos/hos.c @@ -2,7 +2,7 @@ * Copyright (c) 2018 naehrwert * Copyright (c) 2018 st4rk * Copyright (c) 2018 Ced2911 - * Copyright (c) 2018-2024 CTCaer + * Copyright (c) 2018-2025 CTCaer * Copyright (c) 2018 balika011 * * This program is free software; you can redistribute it and/or modify it @@ -194,7 +194,7 @@ static void _se_lock(bool lock_se) gfx_hexdump(SE_BASE, (void *)SE_BASE, 0x400);*/ } -bool hos_eks_rw_try(u8 *buf, bool write) +static bool _hos_eks_rw_try(u8 *buf, bool write) { for (u32 i = 0; i < 3; i++) { @@ -224,7 +224,7 @@ static void _hos_eks_get() { // Read EKS blob. u8 *mbr = zalloc(SD_BLOCKSIZE); - if (!hos_eks_rw_try(mbr, false)) + if (!_hos_eks_rw_try(mbr, false)) goto out; // Decrypt EKS blob. @@ -262,7 +262,7 @@ static void _hos_eks_save() { // Read EKS blob. u8 *mbr = zalloc(SD_BLOCKSIZE); - if (!hos_eks_rw_try(mbr, false)) + if (!_hos_eks_rw_try(mbr, false)) { if (new_eks) { @@ -294,7 +294,7 @@ static void _hos_eks_save() // Write EKS blob to SD. memcpy(mbr + 0x80, eks, sizeof(hos_eks_mbr_t)); - hos_eks_rw_try(mbr, true); + _hos_eks_rw_try(mbr, true); free(eks); free(keys); @@ -303,7 +303,7 @@ out: } } -void hos_eks_clear(u32 kb) +static void _hos_eks_clear(u32 kb) { // Check if Erista based unit. if (h_cfg.t210b01) @@ -316,7 +316,7 @@ void hos_eks_clear(u32 kb) { // Read EKS blob. u8 *mbr = zalloc(SD_BLOCKSIZE); - if (!hos_eks_rw_try(mbr, false)) + if (!_hos_eks_rw_try(mbr, false)) goto out; // Disable current Master key version. @@ -329,7 +329,7 @@ void hos_eks_clear(u32 kb) // Write EKS blob to SD. memcpy(mbr + 0x80, eks, sizeof(hos_eks_mbr_t)); - hos_eks_rw_try(mbr, true); + _hos_eks_rw_try(mbr, true); free(eks); out: @@ -338,24 +338,9 @@ out: } } -int hos_keygen_t210b01(u32 kb) +static int _hos_keygen(void *keyblob, u32 kb, tsec_ctxt_t *tsec_ctxt, bool stock, bool is_exo) { - // Use SBK as Device key 4x unsealer and KEK for mkey in T210B01 units. - se_aes_unwrap_key(10, 14, console_keyseed_4xx); - - // Derive master key. - se_aes_unwrap_key(7, 12, master_kekseed_t210b01[kb - HOS_KB_VERSION_600]); - se_aes_unwrap_key(7, 7, master_keyseed_retail); - - // Derive latest pkg2 key. - se_aes_unwrap_key(8, 7, package2_keyseed); - - return 1; -} - -int hos_keygen(void *keyblob, u32 kb, tsec_ctxt_t *tsec_ctxt, bool stock, bool is_exo) -{ - static bool sbk_wiped = false; + static bool sbk_is_set = true; u32 retries = 0; bool use_tsec = false; @@ -365,16 +350,29 @@ int hos_keygen(void *keyblob, u32 kb, tsec_ctxt_t *tsec_ctxt, bool stock, bool i if (kb > HOS_KB_VERSION_MAX) return 0; + // Do Mariko keygen. if (h_cfg.t210b01) - return hos_keygen_t210b01(kb); + { + // Use SBK as Device key 4x unsealer and KEK for mkey in T210B01 units. + se_aes_unwrap_key(10, 14, console_keyseed_4xx); + + // Derive master key. + se_aes_unwrap_key(7, 12, master_kekseed_t210b01[kb - HOS_KB_VERSION_600]); + se_aes_unwrap_key(7, 7, master_keyseed_retail); + + // Derive latest pkg2 key. + se_aes_unwrap_key(8, 7, package2_keyseed); + + return 1; + } // Do Erista keygen. - // SBK is wiped. Try to restore it from fuses. - if (sbk_wiped) + // Check if SBK is wiped and try to restore it from fuses. + if (!sbk_is_set) { if (fuse_set_sbk()) - sbk_wiped = false; + sbk_is_set = true; else return 1; // Continue with current SE keys. } @@ -412,7 +410,7 @@ int hos_keygen(void *keyblob, u32 kb, tsec_ctxt_t *tsec_ctxt, bool stock, bool i tsec_ctxt->fw = sd_file_read("bootloader/sys/thk.bin", NULL); if (!tsec_ctxt->fw) { - _hos_crit_error("\nFailed to load thk.bin"); + _hos_crit_error("Failed to load thk.bin"); return 0; } @@ -436,7 +434,7 @@ int hos_keygen(void *keyblob, u32 kb, tsec_ctxt_t *tsec_ctxt, bool stock, bool i // We rely on racing conditions, make sure we cover even the unluckiest cases. if (retries > 15) { - _hos_crit_error("\nFailed to get TSEC keys. Please try again."); + _hos_crit_error("Failed to get TSEC keys."); return 0; } } @@ -570,7 +568,7 @@ int hos_keygen(void *keyblob, u32 kb, tsec_ctxt_t *tsec_ctxt, bool stock, bool i se_aes_unwrap_key(15, 15, console_keyseed); se_aes_unwrap_key(14, 12, master_keyseed_4xx); se_aes_unwrap_key(12, 12, master_keyseed_retail); - sbk_wiped = true; + sbk_is_set = false; break; case HOS_KB_VERSION_500: case HOS_KB_VERSION_600: @@ -578,7 +576,7 @@ int hos_keygen(void *keyblob, u32 kb, tsec_ctxt_t *tsec_ctxt, bool stock, bool i se_aes_unwrap_key(15, 15, console_keyseed); se_aes_unwrap_key(14, 12, master_keyseed_4xx); se_aes_unwrap_key(12, 12, master_keyseed_retail); - sbk_wiped = true; + sbk_is_set = false; break; } } @@ -750,7 +748,7 @@ static bool _get_fs_exfat_compatible(link_t *info, u32 *hos_revision) return true; } -int hos_launch(ini_sec_t *cfg) +void hos_launch(ini_sec_t *cfg) { u8 kb; u32 secmon_base; @@ -758,7 +756,6 @@ int hos_launch(ini_sec_t *cfg) bool is_exo = false; launch_ctxt_t ctxt = {0}; tsec_ctxt_t tsec_ctxt = {0}; - volatile secmon_mailbox_t *secmon_mailbox; minerva_change_freq(FREQ_1600); sdram_src_pllc(true); @@ -776,10 +773,7 @@ int hos_launch(ini_sec_t *cfg) int res = emummc_storage_init_mmc(); if (res) { - if (res == 2) - _hos_crit_error("Failed to init eMMC."); - else - _hos_crit_error("Failed to init emuMMC."); + _hos_crit_error(res == 2 ? "Failed to init eMMC." : "Failed to init emuMMC."); goto error; } @@ -787,12 +781,12 @@ int hos_launch(ini_sec_t *cfg) // Check if SD Card is GPT. if (sd_is_gpt()) { - _hos_crit_error("SD has GPT only!"); + _hos_crit_error("SD has GPT only! Run Fix Hybrid MBR!"); goto error; } // Try to parse config if present. - if (ctxt.cfg && !parse_boot_config(&ctxt)) + if (!parse_boot_config(&ctxt)) { _hos_crit_error("Wrong ini cfg or missing/corrupt files!"); goto error; @@ -880,7 +874,7 @@ int hos_launch(ini_sec_t *cfg) tsec_ctxt.pkg11_off = ctxt.pkg1_id->pkg11_off; // Generate keys. - if (!hos_keygen(ctxt.keyblob, kb, &tsec_ctxt, ctxt.stock, is_exo)) + if (!_hos_keygen(ctxt.keyblob, kb, &tsec_ctxt, ctxt.stock, is_exo)) goto error; gfx_puts("Generated keys\n"); @@ -982,7 +976,7 @@ int hos_launch(ini_sec_t *cfg) _hos_crit_error("Pkg2 decryption failed!\npkg1/pkg2 mismatch or old hekate!"); // Clear EKS slot, in case something went wrong with tsec keygen. - hos_eks_clear(kb); + _hos_eks_clear(kb); goto error; } @@ -1151,6 +1145,7 @@ int hos_launch(ini_sec_t *cfg) //pmc_scratch_lock(PMC_SEC_LOCK_LP0_PARAMS); // Set secmon mailbox address and clear it. + volatile secmon_mailbox_t *secmon_mailbox; if (kb >= HOS_KB_VERSION_700 || is_exo) { memset((void *)SECMON7_MAILBOX_ADDR, 0, 0x200); @@ -1202,6 +1197,4 @@ error: emmc_end(); EPRINTF("\nFailed to launch HOS!"); - - return 0; } diff --git a/bootloader/hos/hos.h b/bootloader/hos/hos.h index 8645e62..44f2da5 100644 --- a/bootloader/hos/hos.h +++ b/bootloader/hos/hos.h @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2024 CTCaer + * Copyright (c) 2018-2025 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -104,7 +104,7 @@ typedef struct _launch_ctxt_t u32 kernel_size; link_t kip1_list; - char* kip1_patches; + char *kip1_patches; bool svcperm; bool debugmode; @@ -128,8 +128,6 @@ typedef struct _merge_kip_t link_t link; } merge_kip_t; -void hos_eks_clear(u32 kb); -int hos_launch(ini_sec_t *cfg); -int hos_keygen(void *keyblob, u32 kb, tsec_ctxt_t *tsec_ctxt, bool stock, bool is_exo); +void hos_launch(ini_sec_t *cfg); #endif diff --git a/bootloader/main.c b/bootloader/main.c index 861b757..14b1015 100644 --- a/bootloader/main.c +++ b/bootloader/main.c @@ -444,8 +444,10 @@ parse_failed: launch_l4t(cfg_sec, entry_idx, 1, h_cfg.t210b01); } } - else if (!hos_launch(cfg_sec)) + else { + hos_launch(cfg_sec); + wrong_emupath: if (emummc_path) { @@ -587,8 +589,10 @@ parse_failed: launch_l4t(cfg_sec, entry_idx, 0, h_cfg.t210b01); } } - else if (!hos_launch(cfg_sec)) + else { + hos_launch(cfg_sec); + wrong_emupath: if (emummc_path) { From 3f25cfba768866227b5d006b6436f98c3e449fe3 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 24 Jan 2025 16:00:14 +0200 Subject: [PATCH 266/308] hos: rename atmosphere key to kernelprocid So it reflects what it does. --- README.md | 2 +- bootloader/hos/fss.c | 2 +- bootloader/hos/hos.c | 10 +++++----- bootloader/hos/hos.h | 2 +- bootloader/hos/hos_config.c | 15 +++++++++------ 5 files changed, 17 insertions(+), 14 deletions(-) diff --git a/README.md b/README.md index 3405834..55536e0 100644 --- a/README.md +++ b/README.md @@ -109,7 +109,7 @@ There are four possible type of entries. "**[ ]**": Boot entry, "**{ }**": Capti | stock=1 | OFW via hekate bootloader. Disables unneeded kernel patching and CFW kips when running stock. `If emuMMC is enabled, emummc_force_disable=1` is required. emuMMC is not supported on stock. If additional KIPs are needed other than OFW's, you can define them with `kip1` key. No kip should be used that relies on Atmosphère patching, because it will hang. If `NOGC` is needed, use `kip1patch=nogc`. | | fullsvcperm=1 | Disables SVC verification (full services permission). Doesn't work with Mesosphere as kernel. | | debugmode=1 | Enables Debug mode. Obsolete when used with exosphere as secmon. | -| atmosphere=1 | Enables Atmosphère patching. Not needed when `fss0` is used. | +| kernelprocid=1 | Enables stock kernel process id send/recv patching. Not needed when `fss0` is used. | | ---------------------- | ---------------------------------------------------------- | | payload={FILE path} | Payload launching. Tools, Android/Linux, CFW bootloaders, etc. Any key above when used with that, doesn't get into account. | | ---------------------- | ---------------------------------------------------------- | diff --git a/bootloader/hos/fss.c b/bootloader/hos/fss.c index 42e6312..aa27982 100644 --- a/bootloader/hos/fss.c +++ b/bootloader/hos/fss.c @@ -143,7 +143,7 @@ int parse_fss(launch_ctxt_t *ctxt, const char *path) fss_meta->version >> 24, (fss_meta->version >> 16) & 0xFF, (fss_meta->version >> 8) & 0xFF, fss_meta->git_rev, fss_meta->hos_ver >> 24, (fss_meta->hos_ver >> 16) & 0xFF, (fss_meta->hos_ver >> 8) & 0xFF); - ctxt->atmosphere = true; + ctxt->patch_krn_proc_id = true; ctxt->fss0_hosver = fss_meta->hos_ver; // Parse FSS0 contents. diff --git a/bootloader/hos/hos.c b/bootloader/hos/hos.c index 88d53da..a5b06f0 100644 --- a/bootloader/hos/hos.c +++ b/bootloader/hos/hos.c @@ -822,7 +822,7 @@ void hos_launch(ini_sec_t *cfg) goto error; } - ctxt.atmosphere = true; // Set atmosphere patching in case of no fss0. + ctxt.patch_krn_proc_id = true; // Set kernel process id patching in case of no pkg3. config_kip1patch(&ctxt, "emummc"); } else if (!emu_cfg.enabled && ctxt.emummc_forced) @@ -995,7 +995,7 @@ void hos_launch(ini_sec_t *cfg) ctxt.kernel = pkg2_hdr->data; ctxt.kernel_size = pkg2_hdr->sec_size[PKG2_SEC_KERNEL]; - if (!ctxt.stock && (ctxt.svcperm || ctxt.debugmode || ctxt.atmosphere)) + if (!ctxt.stock && (ctxt.svcperm || ctxt.debugmode || ctxt.patch_krn_proc_id)) { // Hash only Kernel when it embeds INI1. u8 kernel_hash[0x20]; @@ -1022,10 +1022,10 @@ void hos_launch(ini_sec_t *cfg) for (u32 i = 0; kernel_patchset[i].id != 0xFFFFFFFF; i++) { if ((ctxt.svcperm && kernel_patchset[i].id == SVC_VERIFY_DS) - || (ctxt.debugmode && kernel_patchset[i].id == DEBUG_MODE_EN && !(ctxt.atmosphere && ctxt.secmon)) - || (ctxt.atmosphere && kernel_patchset[i].id == ATM_GEN_PATCH)) + || (ctxt.debugmode && kernel_patchset[i].id == DEBUG_MODE_EN && !(ctxt.patch_krn_proc_id && ctxt.secmon)) + || (ctxt.patch_krn_proc_id && kernel_patchset[i].id == ATM_GEN_PATCH)) *(vu32 *)(ctxt.kernel + kernel_patchset[i].off) = kernel_patchset[i].val; - else if (ctxt.atmosphere && kernel_patchset[i].id == ATM_ARR_PATCH) + else if (ctxt.patch_krn_proc_id && kernel_patchset[i].id == ATM_ARR_PATCH) { temp = (u32 *)kernel_patchset[i].ptr; for (u32 j = 0; j < kernel_patchset[i].val; j++) diff --git a/bootloader/hos/hos.h b/bootloader/hos/hos.h index 44f2da5..879ab0a 100644 --- a/bootloader/hos/hos.h +++ b/bootloader/hos/hos.h @@ -113,7 +113,7 @@ typedef struct _launch_ctxt_t void *fss0; u32 fss0_hosver; - bool atmosphere; + bool patch_krn_proc_id; int ucid; diff --git a/bootloader/hos/hos_config.c b/bootloader/hos/hos_config.c index 9d85e42..682ebd4 100644 --- a/bootloader/hos/hos_config.c +++ b/bootloader/hos/hos_config.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2024 CTCaer + * Copyright (c) 2018-2025 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -188,12 +188,12 @@ static int _config_emummc_forced(launch_ctxt_t *ctxt, const char *value) return 1; } -static int _config_atmosphere(launch_ctxt_t *ctxt, const char *value) +static int _config_kernel_proc_id(launch_ctxt_t *ctxt, const char *value) { if (*value == '1') { - DPRINTF("Enabled atmosphere patching\n"); - ctxt->atmosphere = true; + DPRINTF("Enabled kernel process id send/recv patching\n"); + ctxt->patch_krn_proc_id = true; } return 1; } @@ -287,6 +287,7 @@ typedef struct _cfg_handler_t } cfg_handler_t; static const cfg_handler_t _config_handlers[] = { + { "stock", _config_stock }, { "warmboot", _config_warmboot }, { "secmon", _config_secmon }, { "kernel", _config_kernel }, @@ -294,9 +295,11 @@ static const cfg_handler_t _config_handlers[] = { { "kip1patch", config_kip1patch }, { "fullsvcperm", _config_svcperm }, { "debugmode", _config_debugmode }, - { "stock", _config_stock }, - { "atmosphere", _config_atmosphere }, + { "kernelprocid", _config_kernel_proc_id }, + + // To override elements from PKG3, it should be set before others. { "fss0", _config_fss }, + { "exofatal", _config_exo_fatal_payload}, { "emummcforce", _config_emummc_forced }, { "nouserexceptions", _config_dis_exo_user_exceptions }, From 854df2c4e65792a044b29d2a24328c75dc084dfa Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 24 Jan 2025 16:02:31 +0200 Subject: [PATCH 267/308] hos: config: exit the loop after matching cfg key --- bootloader/hos/hos_config.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/bootloader/hos/hos_config.c b/bootloader/hos/hos_config.c index 682ebd4..67fbbd4 100644 --- a/bootloader/hos/hos_config.c +++ b/bootloader/hos/hos_config.c @@ -58,7 +58,7 @@ static int _config_kip1(launch_ctxt_t *ctxt, const char *value) { u32 size; - if (!memcmp(value + strlen(value) - 1, "*", 1)) + if (value[strlen(value) - 1] == '*') { char *dir = (char *)malloc(256); strcpy(dir, value); @@ -119,9 +119,6 @@ static int _config_kip1(launch_ctxt_t *ctxt, const char *value) int config_kip1patch(launch_ctxt_t *ctxt, const char *value) { - if (value == NULL) - return 0; - int len = strlen(value); if (!len) return 0; @@ -313,10 +310,15 @@ static const cfg_handler_t _config_handlers[] = { int parse_boot_config(launch_ctxt_t *ctxt) { + if (!ctxt->cfg) + return 1; + + // Check each config key. LIST_FOREACH_ENTRY(ini_kv_t, kv, &ctxt->cfg->kvs, link) { for (u32 i = 0; _config_handlers[i].key; i++) { + // If key matches, call its handler. if (!strcmp(_config_handlers[i].key, kv->key)) { if (!_config_handlers[i].handler(ctxt, kv->val)) @@ -326,6 +328,8 @@ int parse_boot_config(launch_ctxt_t *ctxt) return 0; } + + break; } } } From 3630c2a099599009a63fb4f26d1b62b316e7fce4 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 24 Jan 2025 16:11:36 +0200 Subject: [PATCH 268/308] pkg2: fix ini size when not using mesosphere Important in case the same ini1 space is used and stock kernel is new. Additionally, also set the hash for the 3rd section, even if empty. --- bootloader/hos/pkg2.c | 32 ++++++++++++++++++++------------ bootloader/hos/pkg2.h | 38 +++++++++++++++++++------------------- 2 files changed, 39 insertions(+), 31 deletions(-) diff --git a/bootloader/hos/pkg2.c b/bootloader/hos/pkg2.c index 5158f6e..2f2f6fc 100644 --- a/bootloader/hos/pkg2.c +++ b/bootloader/hos/pkg2.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2024 CTCaer + * Copyright (c) 2018-2025 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -37,6 +37,7 @@ extern const u8 package2_keyseed[]; u32 pkg2_newkern_ini1_info; u32 pkg2_newkern_ini1_start; u32 pkg2_newkern_ini1_end; +u32 pkg2_newkern_ini1_rela; enum kip_offset_section { @@ -188,11 +189,12 @@ static u32 _pkg2_calc_kip1_size(pkg2_kip1_t *kip1) return size; } -void pkg2_get_newkern_info(u8 *kern_data) +static void _pkg2_get_newkern_info(u8 *kern_data) { - u32 crt_start = 0; + u32 crt_start = 0; pkg2_newkern_ini1_info = 0; pkg2_newkern_ini1_start = 0; + pkg2_newkern_ini1_rela = 0; u32 first_op = *(u32 *)kern_data; if ((first_op & 0xFE000000) == 0x14000000) @@ -229,6 +231,7 @@ void pkg2_get_newkern_info(u8 *kern_data) // On v2 kernel with dynamic crt, values are relative to value address. if (crt_start) { + pkg2_newkern_ini1_rela = pkg2_newkern_ini1_info; pkg2_newkern_ini1_start += pkg2_newkern_ini1_info; pkg2_newkern_ini1_end += pkg2_newkern_ini1_info + 0x8; } @@ -240,7 +243,7 @@ bool pkg2_parse_kips(link_t *info, pkg2_hdr_t *pkg2, bool *new_pkg2) // Check for new pkg2 type. if (!pkg2->sec_size[PKG2_SEC_INI1]) { - pkg2_get_newkern_info(pkg2->data); + _pkg2_get_newkern_info(pkg2->data); if (!pkg2_newkern_ini1_start) return false; @@ -845,10 +848,15 @@ DPRINTF("%s @ %08X (%08X)\n", is_meso ? "Mesosphere": "kernel",(u32)ctxt->kernel // Set new INI1 offset to kernel. u32 meso_meta_offset = *(u32 *)(pdst + 8); - if (is_meso && (meso_magic & 0xF000000)) // MSS1. + if (is_meso && (meso_magic & 0x0F000000)) // MSS1. *(u32 *)(pdst + meso_meta_offset) = kernel_size - meso_meta_offset; else if (ini1_size) - *(u32 *)(pdst + (is_meso ? 8 : pkg2_newkern_ini1_info)) = kernel_size; + { + if (is_meso) // MSS0. + *(u32 *)(pdst + 8) = kernel_size; + else + *(u32 *)(pdst + pkg2_newkern_ini1_info) = kernel_size - pkg2_newkern_ini1_rela; + } kernel_size += ini1_size; } @@ -865,13 +873,13 @@ DPRINTF("INI1 encrypted\n"); if (!is_exo) // Not needed on Exosphere 1.0.0 and up. { - // Calculate SHA256 over encrypted Kernel and INI1. + // Calculate SHA256 over encrypted sections. Only 3 have valid hashes. u8 *pk2_hash_data = (u8 *)dst + 0x100 + sizeof(pkg2_hdr_t); - se_calc_sha256_oneshot(&hdr->sec_sha256[SE_SHA_256_SIZE * PKG2_SEC_KERNEL], - (void *)pk2_hash_data, hdr->sec_size[PKG2_SEC_KERNEL]); - pk2_hash_data += hdr->sec_size[PKG2_SEC_KERNEL]; - se_calc_sha256_oneshot(&hdr->sec_sha256[SE_SHA_256_SIZE * PKG2_SEC_INI1], - (void *)pk2_hash_data, hdr->sec_size[PKG2_SEC_INI1]); + for (u32 i = PKG2_SEC_KERNEL; i <= PKG2_SEC_UNUSED; i++) + { + se_calc_sha256_oneshot(&hdr->sec_sha256[SE_SHA_256_SIZE * i], (void *)pk2_hash_data, hdr->sec_size[i]); + pk2_hash_data += hdr->sec_size[i]; + } } // Encrypt header. diff --git a/bootloader/hos/pkg2.h b/bootloader/hos/pkg2.h index e99b20e..551e46e 100644 --- a/bootloader/hos/pkg2.h +++ b/bootloader/hos/pkg2.h @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2024 CTCaer + * Copyright (c) 2018-2025 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -20,16 +20,17 @@ #include -#define PKG2_MAGIC 0x31324B50 -#define PKG2_SEC_BASE 0x80000000 +#define PKG2_MAGIC 0x31324B50 +#define PKG2_SEC_BASE 0x80000000 #define PKG2_SEC_KERNEL 0 -#define PKG2_SEC_INI1 1 +#define PKG2_SEC_INI1 1 +#define PKG2_SEC_UNUSED 2 #define INI1_MAGIC 0x31494E49 //! TODO: Update on kernel change if needed. // Offset of OP + 12 is the INI1 offset. On v2 with dynamic crt0 it's + 16. -#define PKG2_NEWKERN_GET_INI1_HEURISTIC 0xD2800015 +#define PKG2_NEWKERN_GET_INI1_HEURISTIC 0xD2800015 // MOV X21, #0. #define PKG2_NEWKERN_START 0x800 #define ATM_MESOSPHERE 0x3053534D @@ -67,18 +68,18 @@ enum typedef struct _pkg2_hdr_t { - u8 ctr[0x10]; - u8 sec_ctr[0x40]; - u32 magic; - u32 base; - u32 pad0; - u8 pkg2_ver; - u8 bl_ver; - u16 pad1; - u32 sec_size[4]; - u32 sec_off[4]; - u8 sec_sha256[0x80]; - u8 data[]; +/* 0x000 */ u8 ctr[0x10]; +/* 0x010 */ u8 sec_ctr[0x40]; +/* 0x050 */ u32 magic; +/* 0x054 */ u32 base; +/* 0x058 */ u32 pad0; +/* 0x05C */ u8 pkg2_ver; +/* 0x05D */ u8 bl_ver; +/* 0x05E */ u16 pad1; +/* 0x060 */ u32 sec_size[4]; +/* 0x070 */ u32 sec_off[4]; +/* 0x080 */ u8 sec_sha256[0x80]; +/* 0x100 */ u8 data[]; } pkg2_hdr_t; typedef struct _pkg2_ini1_t @@ -102,7 +103,7 @@ typedef struct _pkg2_kip1_sec_t typedef struct _pkg2_kip1_t { /* 0x000 */ u32 magic; -/* 0x004*/ u8 name[12]; +/* 0x004 */ u8 name[12]; /* 0x010 */ u64 tid; /* 0x018 */ u32 proc_cat; /* 0x01C */ u8 main_thrd_prio; @@ -150,7 +151,6 @@ typedef struct _kip1_id_t const kip1_patchset_t *patchset; } kip1_id_t; -void pkg2_get_newkern_info(u8 *kern_data); bool pkg2_parse_kips(link_t *info, pkg2_hdr_t *pkg2, bool *new_pkg2); int pkg2_has_kip(link_t *info, u64 tid); void pkg2_replace_kip(link_t *info, u64 tid, pkg2_kip1_t *kip1); From 968528ebfdb66dc5d974f023b89b5c89724c7a08 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 24 Jan 2025 16:15:13 +0200 Subject: [PATCH 269/308] l4t: remove unchanged carveout config clear Also allow wrong dram types to be mapped for T210B01. The default table used is 0. --- bootloader/l4t/l4t.c | 36 ++++++++++-------------------------- 1 file changed, 10 insertions(+), 26 deletions(-) diff --git a/bootloader/l4t/l4t.c b/bootloader/l4t/l4t.c index bce3fa1..5475456 100644 --- a/bootloader/l4t/l4t.c +++ b/bootloader/l4t/l4t.c @@ -1,7 +1,7 @@ /* * L4T Loader for Tegra X1 * - * Copyright (c) 2020-2024 CTCaer + * Copyright (c) 2020-2025 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -288,18 +288,22 @@ typedef struct _l4t_ctxt_t #define DRAM_VDDQ_OC_MAX_VOLTAGE 650 #define DRAM_T210B01_TBL_MAX_FREQ 1600000 -//! TODO: Update on dram config changes. +#define NA 0 // Default to 0 for incorrect dram ids. + +//!TODO: Update on dram config changes. static const u8 mtc_table_idx_t210b01[] = { /* 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 */ - -1, -1, -1, 7, -1, 7, 7, -1, 0, 1, 2, 3, 0, 1, 2, 3, -1, 4, 5, 4, 8, 8, 8, 5, 4, 6, 6, 6, 5, 9, 9, 9, 10, 10, 10 + NA, NA, NA, 7, NA, 7, 7, NA, 0, 1, 2, 3, 0, 1, 2, 3, NA, 4, 5, 4, 8, 8, 8, 5, 4, 6, 6, 6, 5, 9, 9, 9, 10, 10, 10 }; +#undef NA + static const l4t_fw_t l4t_fw[] = { { TZDRAM_BASE, "bl31.bin" }, { BL33_LOAD_BASE, "bl33.bin" }, { SC7ENTRY_BASE, "sc7entry.bin" }, { SC7EXIT_BASE, "sc7exit.bin" }, - { SC7EXIT_B01_BASE, "sc7exit_b01.bin" }, + { SC7EXIT_B01_BASE, "sc7exit_b01.bin" }, //!TODO: Update on fuse burns. { BPMPFW_BASE, "bpmpfw.bin" }, { BPMPFW_B01_BASE, "bpmpfw_b01.bin" }, { BPMPFW_B01_MTC_TABLE_BASE, "mtc_tbl_b01.bin" }, @@ -380,7 +384,7 @@ static void _l4t_sdram_lp0_save_params(bool t210b01) s(MC_VIDEO_PROTECT_REG_CTRL, 1:0, secure_scratch14, 31:30); } - // TZD. + // TZDRAM. s(MC_SEC_CARVEOUT_BOM, 31:20, secure_scratch53, 23:12); s(MC_SEC_CARVEOUT_SIZE_MB, 11:0, secure_scratch54, 11:0); if (!t210b01) { @@ -522,11 +526,6 @@ static void _l4t_mc_config_carveout(bool t210b01) MC(MC_SECURITY_CARVEOUT1_CLIENT_ACCESS2) = SEC_CARVEOUT_CA2_R_TSEC | SEC_CARVEOUT_CA2_W_TSEC; MC(MC_SECURITY_CARVEOUT1_CLIENT_ACCESS3) = SEC_CARVEOUT_CA3_R_NVDEC | SEC_CARVEOUT_CA3_W_NVDEC; MC(MC_SECURITY_CARVEOUT1_CLIENT_ACCESS4) = 0; - MC(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS0) = 0; - MC(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS1) = 0; - MC(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS2) = 0; - MC(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS3) = 0; - MC(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS4) = 0; MC(MC_SECURITY_CARVEOUT1_CFG0) = SEC_CARVEOUT_CFG_LOCKED | SEC_CARVEOUT_CFG_UNTRANSLATED_ONLY | SEC_CARVEOUT_CFG_RD_SEC | @@ -558,11 +557,6 @@ static void _l4t_mc_config_carveout(bool t210b01) MC(MC_SECURITY_CARVEOUT1_CLIENT_ACCESS2) = 0; MC(MC_SECURITY_CARVEOUT1_CLIENT_ACCESS3) = 0; MC(MC_SECURITY_CARVEOUT1_CLIENT_ACCESS4) = 0; - MC(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS0) = 0; - MC(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS1) = 0; - MC(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS2) = 0; - MC(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS3) = 0; - MC(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS4) = 0; MC(MC_SECURITY_CARVEOUT1_CFG0) = SEC_CARVEOUT_CFG_RD_NS | SEC_CARVEOUT_CFG_RD_SEC | SEC_CARVEOUT_CFG_WR_NS | @@ -599,11 +593,6 @@ static void _l4t_mc_config_carveout(bool t210b01) MC(MC_SECURITY_CARVEOUT2_CLIENT_ACCESS2) = SEC_CARVEOUT_CA2_R_GPU | SEC_CARVEOUT_CA2_W_GPU | SEC_CARVEOUT_CA2_R_TSEC; MC(MC_SECURITY_CARVEOUT2_CLIENT_ACCESS3) = 0; MC(MC_SECURITY_CARVEOUT2_CLIENT_ACCESS4) = SEC_CARVEOUT_CA4_R_GPU2 | SEC_CARVEOUT_CA4_W_GPU2; - MC(MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS0) = 0; - MC(MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS1) = 0; - MC(MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS2) = 0; - MC(MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS3) = 0; - MC(MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS4) = 0; MC(MC_SECURITY_CARVEOUT2_CFG0) = SEC_CARVEOUT_CFG_LOCKED | SEC_CARVEOUT_CFG_UNTRANSLATED_ONLY | SEC_CARVEOUT_CFG_RD_NS | @@ -632,11 +621,6 @@ static void _l4t_mc_config_carveout(bool t210b01) MC(MC_SECURITY_CARVEOUT3_CLIENT_ACCESS2) = 0; // HOS: SEC_CARVEOUT_CA2_R_GPU | SEC_CARVEOUT_CA2_W_GPU MC(MC_SECURITY_CARVEOUT3_CLIENT_ACCESS3) = 0; MC(MC_SECURITY_CARVEOUT3_CLIENT_ACCESS4) = 0; // HOS: SEC_CARVEOUT_CA4_R_GPU2 | SEC_CARVEOUT_CA4_W_GPU2 - MC(MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS0) = 0; - MC(MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS1) = 0; - MC(MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS2) = 0; - MC(MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS3) = 0; - MC(MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS4) = 0; MC(MC_SECURITY_CARVEOUT3_CFG0) = SEC_CARVEOUT_CFG_LOCKED | SEC_CARVEOUT_CFG_UNTRANSLATED_ONLY | SEC_CARVEOUT_CFG_RD_NS | @@ -896,7 +880,7 @@ static void _l4t_set_config(l4t_ctxt_t *ctxt, const ini_sec_t *ini_sec, int entr ctxt->ram_oc_vddq = 0; } else if (!strcmp("ram_oc_opt", kv->key)) - ctxt->ram_oc_opt = atoi(kv->val); + ctxt->ram_oc_opt = atoi(kv->val); else if (!strcmp("uart_port", kv->key)) ctxt->serial_port = atoi(kv->val); From 96a2483aca10661d46da9f81b7bab619fa4256a0 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 24 Jan 2025 16:15:53 +0200 Subject: [PATCH 270/308] l4t: allow SLD type to be changed or disabled --- bootloader/l4t/l4t.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/bootloader/l4t/l4t.c b/bootloader/l4t/l4t.c index 5475456..899b824 100644 --- a/bootloader/l4t/l4t.c +++ b/bootloader/l4t/l4t.c @@ -272,6 +272,8 @@ typedef struct _l4t_ctxt_t int ram_oc_opt; u32 serial_port; + u32 sld_type; + u32 sc7entry_size; emc_table_t *mtc_table; @@ -850,6 +852,9 @@ static void _l4t_set_config(l4t_ctxt_t *ctxt, const ini_sec_t *ini_sec, int entr bl33_env[0] = '\0'; char val[4] = {0}; + // Set default SLD type. + ctxt->sld_type = BL_MAGIC_L4TLDR_SLD; + // Parse ini section and prepare BL33 env. LIST_FOREACH_ENTRY(ini_kv_t, kv, &ini_sec->kvs, link) { @@ -883,6 +888,8 @@ static void _l4t_set_config(l4t_ctxt_t *ctxt, const ini_sec_t *ini_sec, int entr ctxt->ram_oc_opt = atoi(kv->val); else if (!strcmp("uart_port", kv->key)) ctxt->serial_port = atoi(kv->val); + else if (!strcmp("sld_type", kv->key)) + ctxt->sld_type = atoi(kv->val); // Set key/val to BL33 env. _l4t_bl33_cfg_set_key(bl33_env, kv->key, kv->val); @@ -1149,7 +1156,7 @@ void launch_l4t(const ini_sec_t *ini_sec, int entry_idx, int is_list, bool t210b _l4t_mc_config_carveout(t210b01); // Deinit any unneeded HW. - hw_deinit(false, BL_MAGIC_L4TLDR_SLD); + hw_deinit(false, ctxt->sld_type); // Do late hardware config. _l4t_late_hw_config(t210b01); From 36d415461ef32737c6e6fc41763fe2d2e1941721 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 24 Jan 2025 16:17:05 +0200 Subject: [PATCH 271/308] fatfs: set default year to 2025 --- bootloader/libs/fatfs/ffconf.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bootloader/libs/fatfs/ffconf.h b/bootloader/libs/fatfs/ffconf.h index 33516fe..c6b94bc 100644 --- a/bootloader/libs/fatfs/ffconf.h +++ b/bootloader/libs/fatfs/ffconf.h @@ -256,7 +256,7 @@ #define FF_FS_NORTC 1 #define FF_NORTC_MON 1 #define FF_NORTC_MDAY 1 -#define FF_NORTC_YEAR 2024 +#define FF_NORTC_YEAR 2025 /* The option FF_FS_NORTC switches timestamp function. If the system does not have / any RTC function or valid timestamp is not needed, set FF_FS_NORTC = 1 to disable / the timestamp function. Every object modified by FatFs will have a fixed timestamp From d27ba04077b4256ee0b700c4d6550602f55b6c91 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 24 Jan 2025 16:22:19 +0200 Subject: [PATCH 272/308] nyx: info: use custom action for hw info window --- nyx/nyx_gui/frontend/gui.c | 13 +++++++------ nyx/nyx_gui/frontend/gui.h | 4 +++- nyx/nyx_gui/frontend/gui_info.c | 28 ++++++++++++++++++++++++---- 3 files changed, 34 insertions(+), 11 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui.c b/nyx/nyx_gui/frontend/gui.c index e5cbdd2..b7be9f3 100644 --- a/nyx/nyx_gui/frontend/gui.c +++ b/nyx/nyx_gui/frontend/gui.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2024 CTCaer + * Copyright (c) 2018-2025 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -866,7 +866,7 @@ void nyx_window_toggle_buttons(lv_obj_t *win, bool disable) } } -lv_res_t lv_win_close_action_custom(lv_obj_t * btn) +lv_res_t nyx_win_close_action_custom(lv_obj_t * btn) { close_btn = NULL; @@ -886,7 +886,7 @@ lv_obj_t *nyx_create_standard_window(const char *win_title) lv_win_set_style(win, LV_WIN_STYLE_BG, &win_bg_style); lv_obj_set_size(win, LV_HOR_RES, LV_VER_RES); - close_btn = lv_win_add_btn(win, NULL, SYMBOL_CLOSE" Close", lv_win_close_action_custom); + close_btn = lv_win_add_btn(win, NULL, SYMBOL_CLOSE" Close", nyx_win_close_action_custom); return win; } @@ -2079,6 +2079,7 @@ static void _create_status_bar(lv_theme_t * th) { static lv_obj_t *status_bar_bg; status_bar_bg = lv_cont_create(lv_layer_top(), NULL); + status_bar.bar_bg = status_bar_bg; static lv_style_t status_bar_style; lv_style_copy(&status_bar_style, &lv_style_plain_color); @@ -2131,9 +2132,9 @@ static void _create_status_bar(lv_theme_t * th) lv_obj_set_size(btn_mid, LV_DPI * 5 / 2, LV_DPI / 2); lv_obj_align(btn_mid, NULL, LV_ALIGN_CENTER, 0, 0); status_bar.mid = btn_mid; - lv_obj_set_opa_scale(status_bar.mid, LV_OPA_0); - lv_obj_set_opa_scale_enable(status_bar.mid, true); - lv_obj_set_click(status_bar.mid, false); + lv_obj_set_opa_scale(btn_mid, LV_OPA_0); + lv_obj_set_opa_scale_enable(btn_mid, true); + lv_obj_set_click(btn_mid, false); lv_btn_set_action(btn_mid, LV_BTN_ACTION_CLICK, _save_options_action); } diff --git a/nyx/nyx_gui/frontend/gui.h b/nyx/nyx_gui/frontend/gui.h index d2007b8..3f13444 100644 --- a/nyx/nyx_gui/frontend/gui.h +++ b/nyx/nyx_gui/frontend/gui.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2019 CTCaer + * Copyright (c) 2018-2025 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -36,6 +36,7 @@ typedef struct _emmc_tool_gui_t typedef struct _gui_status_bar_ctx { + lv_obj_t *bar_bg; lv_obj_t *mid; lv_obj_t *time_temp; lv_obj_t *temp_symbol; @@ -72,6 +73,7 @@ void reload_nyx(); lv_img_dsc_t *bmp_to_lvimg_obj(const char *path); lv_res_t mbox_action(lv_obj_t * btns, const char * txt); bool nyx_emmc_check_battery_enough(); +lv_res_t nyx_win_close_action_custom(lv_obj_t * btn); void nyx_window_toggle_buttons(lv_obj_t *win, bool disable); lv_obj_t *nyx_create_standard_window(const char *win_title); lv_obj_t *nyx_create_window_custom_close_btn(const char *win_title, lv_action_t rel_action); diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index 09f86b0..977cd84 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2024 CTCaer + * Copyright (c) 2018-2025 CTCaer * Copyright (c) 2018 balika011 * * This program is free software; you can redistribute it and/or modify it @@ -351,9 +351,21 @@ out: return LV_RES_OK; } -static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) +static lv_obj_t *hw_info_ver = NULL; +static lv_res_t _action_win_hw_info_status_close(lv_obj_t *btn) { - lv_obj_t *win = nyx_create_standard_window(SYMBOL_CHIP" HW & Fuses Info"); + if (hw_info_ver) + { + lv_obj_del(hw_info_ver); + hw_info_ver = NULL; + } + + return nyx_win_close_action_custom(btn); +} + +static lv_res_t _create_window_hw_info_status(lv_obj_t *btn) +{ + lv_obj_t *win = nyx_create_window_custom_close_btn(SYMBOL_CHIP" HW & Fuses Info", _action_win_hw_info_status_close); lv_win_add_btn(win, NULL, SYMBOL_DOWNLOAD" Dump fuses", _fuse_dump_window_action); lv_win_add_btn(win, NULL, SYMBOL_INFO" CAL0 Info", _create_mbox_cal0); @@ -365,6 +377,14 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn) lv_label_set_recolor(lb_desc, true); lv_label_set_style(lb_desc, &monospace_text); + char version[32]; + s_printf(version, "%s%d.%d.%d%c", NYX_VER_RL ? "v" : "", NYX_VER_MJ, NYX_VER_MN, NYX_VER_HF, NYX_VER_RL > 'A' ? NYX_VER_RL : 0); + lv_obj_t * lbl_ver = lv_label_create(lv_scr_act(), NULL); + lv_label_set_style(lbl_ver, &hint_small_style_white); + lv_label_set_text(lbl_ver, version); + lv_obj_align(lbl_ver, status_bar.bar_bg, LV_ALIGN_OUT_TOP_RIGHT, -LV_DPI * 9 / 23, -LV_DPI * 2 / 13); + hw_info_ver = lbl_ver; + lv_label_set_static_text(lb_desc, "#FF8000 SoC:#\n" "#FF8000 SKU:#\n" @@ -2551,7 +2571,7 @@ void create_tab_info(lv_theme_t *th, lv_obj_t *parent) lv_btn_set_fit(btn3, true, true); lv_label_set_static_text(label_btn, SYMBOL_CIRCUIT" HW & Fuses"); lv_obj_align(btn3, line_sep, LV_ALIGN_OUT_BOTTOM_LEFT, LV_DPI / 4, LV_DPI / 2); - lv_btn_set_action(btn3, LV_BTN_ACTION_CLICK, _create_window_fuses_info_status); + lv_btn_set_action(btn3, LV_BTN_ACTION_CLICK, _create_window_hw_info_status); // Create KFuses button. lv_obj_t *btn4 = lv_btn_create(h1, btn); From 855bf0ba0127eadcb507ca443a998bfed6f3b63d Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 24 Jan 2025 16:26:27 +0200 Subject: [PATCH 273/308] nyx: info: use a more advanced ram detection --- nyx/nyx_gui/frontend/gui_info.c | 64 ++++++++++++++++++++++----------- 1 file changed, 44 insertions(+), 20 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index 977cd84..ce0cc58 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -683,7 +683,7 @@ static lv_res_t _create_window_hw_info_status(lv_obj_t *btn) u32 ranks = EMC(EMC_ADR_CFG) + 1; u32 channels = (EMC(EMC_FBIO_CFG7) >> 1) & 3; channels = (channels & 1) + ((channels & 2) >> 1); - s_printf(txt_buf, "#00DDFF %s SDRAM ##FF8000 (Ch 0 | Ch 1):#\n#FF8000 Vendor:# ", h_cfg.t210b01 ? "LPDDR4X" : "LPDDR4"); + s_printf(txt_buf, "#00DDFF %s SDRAM ##FF8000 (Module 0 | 1):#\n#FF8000 Vendor:# ", h_cfg.t210b01 ? "LPDDR4X" : "LPDDR4"); switch (ram_vendor.chip0.rank0_ch0) { case 1: @@ -755,49 +755,76 @@ static lv_res_t _create_window_hw_info_status(lv_obj_t *btn) s_printf(txt_buf + strlen(txt_buf), "#FF8000 Unknown# (%d)", ram_vendor.chip1.rank0_ch0); break; } - s_printf(txt_buf + strlen(txt_buf), "\n#FF8000 Rev ID:# %X.%02X #FF8000 |# %X.%02X\n#FF8000 Density:# %d", - ram_rev0.chip0.rank0_ch0, ram_rev1.chip0.rank0_ch0, ram_rev0.chip1.rank0_ch0, ram_rev1.chip1.rank0_ch0, ranks * channels); + + s_printf(txt_buf + strlen(txt_buf), "\n#FF8000 Rev ID:# %X.%02X #FF8000 |# %X.%02X\n#FF8000 Density:# ", + ram_rev0.chip0.rank0_ch0, ram_rev1.chip0.rank0_ch0, ram_rev0.chip1.rank0_ch0, ram_rev1.chip1.rank0_ch0); + + u32 actual_ranks = (ram_vendor.chip0.rank0_ch0 == ram_vendor.chip0.rank1_ch0 && + ram_vendor.chip0.rank0_ch1 == ram_vendor.chip0.rank1_ch1 && + ram_rev0.chip0.rank0_ch0 == ram_rev0.chip0.rank1_ch0 && + ram_rev0.chip0.rank0_ch1 == ram_rev0.chip0.rank1_ch1 && + ram_rev1.chip0.rank0_ch0 == ram_rev1.chip0.rank1_ch0 && + ram_rev1.chip0.rank0_ch1 == ram_rev1.chip0.rank1_ch1 && + ram_density.chip0.rank0_ch0 == ram_density.chip0.rank1_ch0 && + ram_density.chip0.rank0_ch1 == ram_density.chip0.rank1_ch1) + ? 2 : 1; + bool rank_bad = ranks != actual_ranks; + s_printf(txt_buf + strlen(txt_buf), "%s %d x %s", rank_bad ? "#FFDD00" : "", actual_ranks * channels, rank_bad ? "#" : ""); + switch ((ram_density.chip0.rank0_ch0 & 0x3C) >> 2) { case 2: - strcat(txt_buf, " x 512MB"); + strcat(txt_buf, "512MB"); break; case 3: - strcat(txt_buf, " x 768MB"); + strcat(txt_buf, "768MB"); break; case 4: - strcat(txt_buf, " x 1GB"); + strcat(txt_buf, "1GB"); break; case 5: - strcat(txt_buf, " x 1.5GB"); + strcat(txt_buf, "1.5GB"); break; case 6: - strcat(txt_buf, " x 2GB"); + strcat(txt_buf, "2GB"); break; default: - s_printf(txt_buf + strlen(txt_buf), " x Unk (%d)", (ram_density.chip0.rank0_ch0 & 0x3C) >> 2); + s_printf(txt_buf + strlen(txt_buf), "Unk (%d)", (ram_density.chip0.rank0_ch0 & 0x3C) >> 2); break; } - s_printf(txt_buf + strlen(txt_buf), " #FF8000 |# %d", ranks * channels); + + actual_ranks = (ram_vendor.chip1.rank0_ch0 == ram_vendor.chip1.rank1_ch0 && + ram_vendor.chip1.rank0_ch1 == ram_vendor.chip1.rank1_ch1 && + ram_rev0.chip1.rank0_ch0 == ram_rev0.chip1.rank1_ch0 && + ram_rev0.chip1.rank0_ch1 == ram_rev0.chip1.rank1_ch1 && + ram_rev1.chip1.rank0_ch0 == ram_rev1.chip1.rank1_ch0 && + ram_rev1.chip1.rank0_ch1 == ram_rev1.chip1.rank1_ch1 && + ram_density.chip1.rank0_ch0 == ram_density.chip1.rank1_ch0 && + ram_density.chip1.rank0_ch1 == ram_density.chip1.rank1_ch1) + ? 2 : 1; + rank_bad = ranks != actual_ranks; + + s_printf(txt_buf + strlen(txt_buf), " #FF8000 |# %s %d x %s", rank_bad ? "#FFDD00" : "", actual_ranks * channels, rank_bad ? "#" : ""); + switch ((ram_density.chip1.rank0_ch0 & 0x3C) >> 2) { case 2: - strcat(txt_buf, " x 512MB"); + strcat(txt_buf, "512MB"); break; case 3: - strcat(txt_buf, " x 768MB"); + strcat(txt_buf, "768MB"); break; case 4: - strcat(txt_buf, " x 1GB"); + strcat(txt_buf, "1GB"); break; case 5: - strcat(txt_buf, " x 1.5GB"); + strcat(txt_buf, "1.5GB"); break; case 6: - strcat(txt_buf, " x 2GB"); + strcat(txt_buf, "2GB"); break; default: - s_printf(txt_buf + strlen(txt_buf), " x Unk (%d)", (ram_density.chip1.rank0_ch0 & 0x3C) >> 2); + s_printf(txt_buf + strlen(txt_buf), "Unk (%d)", (ram_density.chip1.rank0_ch0 & 0x3C) >> 2); break; } strcat(txt_buf, "\n\n"); @@ -994,7 +1021,7 @@ static lv_res_t _create_window_hw_info_status(lv_obj_t *btn) panel_ic_paired = touch_panel->idx == 4; // Samsung BH2109. break; default: - strcat(txt_buf, "#FF8000 Unknown#"); + strcat(txt_buf, "#FF8000 Contact me#"); break; } @@ -1019,9 +1046,6 @@ static lv_res_t _create_window_hw_info_status(lv_obj_t *btn) lv_obj_set_width(lb_desc2, lv_obj_get_width(desc2)); lv_obj_align(desc2, val, LV_ALIGN_OUT_RIGHT_MID, LV_DPI / 4, 0); - if (!btn) - _create_mbox_cal0(NULL); - return LV_RES_OK; } From 9fbdb39390b92777330b5c73825204c1de54ad28 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 24 Jan 2025 16:32:42 +0200 Subject: [PATCH 274/308] nyx: info: fully update sdmmc benchmark - Changed to relevant A2 spec testing sizes - Added 95th and 5th percentile IOPS for random test Standard numbers in the industry and also helps with pinpointing latency issues - Size of info and benchmark adjusted so important info underneath is still showing - Refactored --- nyx/nyx_gui/frontend/gui_info.c | 177 +++++++++++++++++++++----------- 1 file changed, 118 insertions(+), 59 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index ce0cc58..b0d1012 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -1343,12 +1343,11 @@ static lv_res_t _create_mbox_benchmark(bool sd_bench) static const char * mbox_btn_map[] = { "\251", "\222OK", "\251", "" }; lv_obj_t * mbox = lv_mbox_create(dark_bg, NULL); lv_mbox_set_recolor_text(mbox, true); - lv_obj_set_width(mbox, LV_HOR_RES / 7 * 4); + lv_obj_set_width(mbox, LV_HOR_RES * 3 / 7); char *txt_buf = (char *)malloc(SZ_16K); - s_printf(txt_buf, "#FF8000 %s Benchmark#\n[Raw Reads] Abort: VOL- & VOL+", - sd_bench ? "SD Card" : "eMMC"); + s_printf(txt_buf, "#FF8000 %s Benchmark#\n[Raw Reads] Abort: VOL- & VOL+", sd_bench ? "SD Card" : "eMMC"); lv_mbox_set_text(mbox, txt_buf); txt_buf[0] = 0; @@ -1397,30 +1396,60 @@ static lv_res_t _create_mbox_benchmark(bool sd_bench) goto out; } + // Set benchmark parameters. + const u32 sct_blk_seq = 0x8000; // 16MB. A2 spec denotes 4MB, but using older big AU. + const u32 sct_blk_4kb = 8; // 4KB. + const u32 sct_rem_seq = 0x200000; // 1GB. A2 spec. + const u32 sct_rem_4kb = 0x80000; // 256MB. A2 spec. + const u32 sct_num_1mb = 0x800; // 1MB. + const u32 size_bytes_seq = sct_rem_seq * SDMMC_DAT_BLOCKSIZE; + const u32 size_bytes_4kb = sct_rem_4kb * SDMMC_DAT_BLOCKSIZE; + + // Set calculation divider. 1000 or 1024. (Does not affect IOPS). + u32 mb_div = 1000; // Unfortunately most software uses fake MB. + + char *mbs_text; + switch (mb_div) + { + case 1000: + mbs_text = "MB/s"; + break; + case 1024: + mbs_text = "MiB/s"; + break; + } + + // Set actual div in MB/MiB. + mb_div *= mb_div; + int error = 0; u32 iters = 3; - u32 offset_chunk_start = ALIGN_DOWN(storage->sec_cnt / 3, 0x8000); // Align to 16MB. + u32 offset_chunk_start = ALIGN_DOWN(storage->sec_cnt / 3, sct_blk_seq); // Align to block. if (storage->sec_cnt < 0xC00000) iters -= 2; // 4GB card. + u32 rnd_off_cnt = sct_rem_4kb / sct_blk_4kb; + u32 *random_offsets = malloc(rnd_off_cnt * sizeof(u32)); + u32 *times_taken_4k = malloc(rnd_off_cnt * sizeof(u32)); + for (u32 iter_curr = 0; iter_curr < iters; iter_curr++) { u32 pct = 0; u32 prevPct = 200; u32 timer = 0; u32 lba_curr = 0; - u32 sector = offset_chunk_start * iter_curr; - u32 sector_num = 0x8000; // 16MB chunks. - u32 data_remaining = 0x200000; // 1GB. + u32 sector_off = offset_chunk_start * iter_curr; + u32 sector_num = sct_blk_seq; + u32 data_remaining = sct_rem_seq; - s_printf(txt_buf + strlen(txt_buf), "#C7EA46 %d/3# - Sector Offset #C7EA46 %08X#:\n", iter_curr + 1, sector); + s_printf(txt_buf + strlen(txt_buf), "#C7EA46 %d/3# - Sector Offset #C7EA46 %08X#:\n", iter_curr + 1, sector_off); u32 render_min_ms = 66; u32 render_timer = get_tmr_ms() + render_min_ms; while (data_remaining) { u32 time_taken = get_tmr_us(); - error = !sdmmc_storage_read(storage, sector + lba_curr, sector_num, (u8 *)MIXD_BUF_ALIGNED); + error = !sdmmc_storage_read(storage, sector_off + lba_curr, sector_num, (u8 *)MIXD_BUF_ALIGNED); time_taken = get_tmr_us() - time_taken; timer += time_taken; @@ -1428,7 +1457,7 @@ static lv_res_t _create_mbox_benchmark(bool sd_bench) data_remaining -= sector_num; lba_curr += sector_num; - pct = (lba_curr * 100) / 0x200000; + pct = (lba_curr * 100) / sct_rem_seq; if (pct != prevPct && render_timer < get_tmr_ms()) { lv_bar_set_value(bar, pct); @@ -1446,10 +1475,10 @@ static lv_res_t _create_mbox_benchmark(bool sd_bench) } lv_bar_set_value(bar, 100); - u32 rate_1k = ((u64)1024 * 1000 * 1000 * 1000) / timer; - s_printf(txt_buf + strlen(txt_buf), - " Sequential 16MiB - Rate: #C7EA46 %3d.%02d MiB/s#\n", - rate_1k / 1000, (rate_1k % 1000) / 10); + // Calculate rate for transfer. + u32 rate_1k = (u64)size_bytes_seq * 1000 * 1000 * 1000 / mb_div / timer; + s_printf(txt_buf + strlen(txt_buf), " SEQ 16MB - Rate: #C7EA46 %3d.%02d %s#", + rate_1k / 1000, (rate_1k % 1000) / 10, mbs_text); lv_label_set_text(lbl_status, txt_buf); lv_obj_align(lbl_status, NULL, LV_ALIGN_CENTER, 0, 0); lv_obj_align(mbox, NULL, LV_ALIGN_CENTER, 0, 0); @@ -1459,22 +1488,25 @@ static lv_res_t _create_mbox_benchmark(bool sd_bench) prevPct = 200; timer = 0; lba_curr = 0; - sector_num = 8; // 4KB chunks. - data_remaining = 0x100000; // 512MB. + sector_num = sct_blk_4kb; + data_remaining = sct_rem_4kb; + u32 loop_idx = 0; render_timer = get_tmr_ms() + render_min_ms; while (data_remaining) { u32 time_taken = get_tmr_us(); - error = !sdmmc_storage_read(storage, sector + lba_curr, sector_num, (u8 *)MIXD_BUF_ALIGNED); + error = !sdmmc_storage_read(storage, sector_off + lba_curr, sector_num, (u8 *)MIXD_BUF_ALIGNED); time_taken = get_tmr_us() - time_taken; + timer += time_taken; + times_taken_4k[loop_idx++] = time_taken; manual_system_maintenance(false); data_remaining -= sector_num; lba_curr += sector_num; - pct = (lba_curr * 100) / 0x100000; + pct = (lba_curr * 100) / sct_rem_4kb; if (pct != prevPct && render_timer < get_tmr_ms()) { lv_bar_set_value(bar, pct); @@ -1492,49 +1524,64 @@ static lv_res_t _create_mbox_benchmark(bool sd_bench) } lv_bar_set_value(bar, 100); - rate_1k = ((u64)512 * 1000 * 1000 * 1000) / timer; - u32 iops_1k = ((u64)512 * 1024 * 1000 * 1000 * 1000) / (4096 / 1024) / timer / 1000; - s_printf(txt_buf + strlen(txt_buf), - " Sequential 4KiB - Rate: #C7EA46 %3d.%02d MiB/s#, IOPS: #C7EA46 %4d#\n", - rate_1k / 1000, (rate_1k % 1000) / 10, iops_1k); + qsort(times_taken_4k, loop_idx, sizeof(u32), qsort_compare_int); // Use int for faster compare. Value can't exceed 2s. + + u32 pct95 = 0; + for (u32 i = 0; i < loop_idx * 95 / 100; i++) + pct95 += times_taken_4k[i]; + pct95 /= loop_idx * 95 / 100; + + u32 pct05 = 0; + for (u32 i = 0; i < loop_idx * 5 / 100; i++) + pct05 += times_taken_4k[loop_idx - 1 - i]; + pct05 /= loop_idx * 5 / 100; + + // Calculate rate and IOPS for transfer. + rate_1k = (u64)size_bytes_4kb * 1000 * 1000 * 1000 / mb_div / timer; + u32 iops = ((u64)(sct_rem_4kb / sct_num_1mb) * 1024 * 1000 * 1000 * 1000) / (4096 / 1024) / timer / 1000; + s_printf(txt_buf + strlen(txt_buf), " AVG #C7EA46 95th# #FF3C28 5th#\n"); + s_printf(txt_buf + strlen(txt_buf), " SEQ 4KB - Rate: #C7EA46 %3d.%02d %s# IOPS: #C7EA46 %4d# %4d %4d \n", + rate_1k / 1000, (rate_1k % 1000) / 10, mbs_text, iops, 1000000 / pct95, 1000000 / pct05); lv_label_set_text(lbl_status, txt_buf); lv_obj_align(lbl_status, NULL, LV_ALIGN_CENTER, 0, 0); lv_obj_align(mbox, NULL, LV_ALIGN_CENTER, 0, 0); manual_system_maintenance(true); u32 lba_idx = 0; - u32 *random_offsets = malloc(0x20000 * sizeof(u32)); - u32 random_numbers[4]; - for (u32 i = 0; i < 0x20000; i += 4) + u32 random_numbers[4]; + for (u32 i = 0; i < rnd_off_cnt; i += 4) { // Generate new random numbers. while (!se_gen_prng128(random_numbers)) ; - // Clamp offsets to 512MB range. - random_offsets[i + 0] = random_numbers[0] % 0x100000; - random_offsets[i + 1] = random_numbers[1] % 0x100000; - random_offsets[i + 2] = random_numbers[2] % 0x100000; - random_offsets[i + 3] = random_numbers[3] % 0x100000; + // Clamp offsets to 256MB range. + random_offsets[i + 0] = random_numbers[0] % sct_rem_4kb; + random_offsets[i + 1] = random_numbers[1] % sct_rem_4kb; + random_offsets[i + 2] = random_numbers[2] % sct_rem_4kb; + random_offsets[i + 3] = random_numbers[3] % sct_rem_4kb; } pct = 0; prevPct = 200; timer = 0; - data_remaining = 0x100000; // 512MB. + data_remaining = sct_rem_4kb; + loop_idx = 0; render_timer = get_tmr_ms() + render_min_ms; while (data_remaining) { u32 time_taken = get_tmr_us(); - error = !sdmmc_storage_read(storage, sector + random_offsets[lba_idx], sector_num, (u8 *)MIXD_BUF_ALIGNED); + error = !sdmmc_storage_read(storage, sector_off + random_offsets[lba_idx], sector_num, (u8 *)MIXD_BUF_ALIGNED); time_taken = get_tmr_us() - time_taken; + timer += time_taken; + times_taken_4k[loop_idx++] = time_taken; manual_system_maintenance(false); data_remaining -= sector_num; lba_idx++; - pct = (lba_idx * 100) / 0x20000; + pct = (lba_idx * 100) / rnd_off_cnt; if (pct != prevPct && render_timer < get_tmr_ms()) { lv_bar_set_value(bar, pct); @@ -1548,29 +1595,39 @@ static lv_res_t _create_mbox_benchmark(bool sd_bench) } if (error) - { - free(random_offsets); goto error; - } } lv_bar_set_value(bar, 100); - // Calculate rate and IOPS for 512MB transfer. - rate_1k = ((u64)512 * 1000 * 1000 * 1000) / timer; - iops_1k = ((u64)512 * 1024 * 1000 * 1000 * 1000) / (4096 / 1024) / timer / 1000; - s_printf(txt_buf + strlen(txt_buf), - " Random 4KiB - Rate: #C7EA46 %3d.%02d MiB/s#, IOPS: #C7EA46 %4d#\n", - rate_1k / 1000, (rate_1k % 1000) / 10, iops_1k); + qsort(times_taken_4k, loop_idx, sizeof(u32), qsort_compare_int); // Use int for faster compare. Value can't exceed 2s. + + pct95 = 0; + for (u32 i = 0; i < loop_idx * 95 / 100; i++) + pct95 += times_taken_4k[i]; + pct95 /= loop_idx * 95 / 100; + + pct05 = 0; + for (u32 i = 0; i < loop_idx * 5 / 100; i++) + pct05 += times_taken_4k[loop_idx - 1 - i]; + pct05 /= loop_idx * 5 / 100; + + // Calculate rate and IOPS for transfer. + rate_1k = (u64)size_bytes_4kb * 1000 * 1000 * 1000 / mb_div / timer; + iops = ((u64)(sct_rem_4kb / sct_num_1mb) * 1024 * 1000 * 1000 * 1000) / (4096 / 1024) / timer / 1000; + s_printf(txt_buf + strlen(txt_buf), " RND 4KB - Rate: #C7EA46 %3d.%02d %s# IOPS: #C7EA46 %4d# %4d %4d \n", + rate_1k / 1000, (rate_1k % 1000) / 10, mbs_text, iops, 1000000 / pct95, 1000000 / pct05); if (iter_curr == iters - 1) - txt_buf[strlen(txt_buf) - 1] = 0; // Cut off last line change. + txt_buf[strlen(txt_buf) - 1] = 0; // Cut off last new line. lv_label_set_text(lbl_status, txt_buf); lv_obj_align(lbl_status, NULL, LV_ALIGN_CENTER, 0, 0); lv_obj_align(mbox, NULL, LV_ALIGN_CENTER, 0, 0); manual_system_maintenance(true); - free(random_offsets); } error: + free(random_offsets); + free(times_taken_4k); + if (error) { if (error == -1) @@ -1597,6 +1654,8 @@ error: emmc_end(); out: + s_printf(txt_buf, "#FF8000 %s Benchmark#\n[Raw Reads]", sd_bench ? "SD Card" : "eMMC"); + lv_mbox_set_text(mbox, txt_buf); free(txt_buf); lv_mbox_add_btns(mbox, mbox_btn_map, mbox_action); // Important. After set_text. @@ -1888,7 +1947,7 @@ static lv_res_t _create_window_sdcard_info_status(lv_obj_t *btn) lv_win_add_btn(win, NULL, SYMBOL_SD" Benchmark", _create_mbox_sd_bench); lv_obj_t *desc = lv_cont_create(win, NULL); - lv_obj_set_size(desc, LV_HOR_RES / 2 / 5 * 2, LV_VER_RES - (LV_DPI * 11 / 8) * 5 / 2); + lv_obj_set_size(desc, LV_HOR_RES / 2 / 6 * 2, LV_VER_RES - (LV_DPI * 11 / 8) * 5 / 2); lv_obj_t * lb_desc = lv_label_create(desc, NULL); lv_label_set_long_mode(lb_desc, LV_LABEL_LONG_BREAK); @@ -1909,7 +1968,7 @@ static lv_res_t _create_window_sdcard_info_status(lv_obj_t *btn) } lv_label_set_text(lb_desc, - "#00DDFF Card IDentification:#\n" + "#00DDFF Card ID:#\n" "Vendor ID:\n" "Model:\n" "OEM ID:\n" @@ -1918,11 +1977,11 @@ static lv_res_t _create_window_sdcard_info_status(lv_obj_t *btn) "S/N:\n" "Month/Year:\n\n" "Max Power:\n" - "Bootloader bus:" + "Initial bus:" ); lv_obj_t *val = lv_cont_create(win, NULL); - lv_obj_set_size(val, LV_HOR_RES / 9 * 2, LV_VER_RES - (LV_DPI * 11 / 8) * 5 / 2); + lv_obj_set_size(val, LV_HOR_RES / 12 * 3, LV_VER_RES - (LV_DPI * 11 / 8) * 5 / 2); lv_obj_t * lb_val = lv_label_create(val, lb_desc); @@ -2064,7 +2123,7 @@ static lv_res_t _create_window_sdcard_info_status(lv_obj_t *btn) lv_obj_align(val, desc, LV_ALIGN_OUT_RIGHT_MID, 0, 0); lv_obj_t *desc2 = lv_cont_create(win, NULL); - lv_obj_set_size(desc2, LV_HOR_RES / 2 / 4 * 2, LV_VER_RES - (LV_DPI * 11 / 8) * 5 / 2); + lv_obj_set_size(desc2, LV_HOR_RES / 2 / 11 * 5, LV_VER_RES - (LV_DPI * 11 / 8) * 5 / 2); lv_obj_t * lb_desc2 = lv_label_create(desc2, lb_desc); @@ -2081,10 +2140,10 @@ static lv_res_t _create_window_sdcard_info_status(lv_obj_t *btn) "Write Protect:" ); lv_obj_set_width(lb_desc2, lv_obj_get_width(desc2)); - lv_obj_align(desc2, val, LV_ALIGN_OUT_RIGHT_MID, LV_DPI / 2, 0); + lv_obj_align(desc2, val, LV_ALIGN_OUT_RIGHT_MID, LV_DPI / 5 * 3, 0); lv_obj_t *val2 = lv_cont_create(win, NULL); - lv_obj_set_size(val2, LV_HOR_RES / 13 * 3, LV_VER_RES - (LV_DPI * 11 / 8) * 5 / 2); + lv_obj_set_size(val2, LV_HOR_RES / 4, LV_VER_RES - (LV_DPI * 11 / 8) * 5 / 2); lv_obj_t * lb_val2 = lv_label_create(val2, lb_desc); @@ -2163,17 +2222,17 @@ static lv_res_t _create_window_sdcard_info_status(lv_obj_t *btn) f_getfree("", &sd_fs.free_clst, NULL); lv_label_set_text(lb_desc3, - "#00DDFF Found FAT volume:#\n" + "#00DDFF Found FAT FS:#\n" "Filesystem:\n" "Cluster:\n" "Size free/total:" ); - lv_obj_set_size(desc3, LV_HOR_RES / 2 / 5 * 2, LV_VER_RES - (LV_DPI * 11 / 8) * 4); + lv_obj_set_size(desc3, LV_HOR_RES / 2 / 6 * 2, LV_VER_RES - (LV_DPI * 11 / 8) * 4); lv_obj_set_width(lb_desc3, lv_obj_get_width(desc3)); lv_obj_align(desc3, desc, LV_ALIGN_OUT_BOTTOM_LEFT, 0, LV_DPI / 2); lv_obj_t *val3 = lv_cont_create(win, NULL); - lv_obj_set_size(val3, LV_HOR_RES / 13 * 3, LV_VER_RES - (LV_DPI * 11 / 8) * 4); + lv_obj_set_size(val3, LV_HOR_RES / 12 * 3, LV_VER_RES - (LV_DPI * 11 / 8) * 4); lv_obj_t * lb_val3 = lv_label_create(val3, lb_desc); @@ -2202,12 +2261,12 @@ static lv_res_t _create_window_sdcard_info_status(lv_obj_t *btn) "Read/Write fails:\n" "Read/Write errors:" ); - lv_obj_set_size(desc4, LV_HOR_RES / 2 / 5 * 2, LV_VER_RES - (LV_DPI * 11 / 8) * 4); + lv_obj_set_size(desc4, LV_HOR_RES / 2 / 11 * 5, LV_VER_RES - (LV_DPI * 11 / 8) * 4); lv_obj_set_width(lb_desc4, lv_obj_get_width(desc4)); - lv_obj_align(desc4, val3, LV_ALIGN_OUT_RIGHT_MID, LV_DPI / 2, 0); + lv_obj_align(desc4, val3, LV_ALIGN_OUT_RIGHT_MID, LV_DPI / 5 * 3, 0); lv_obj_t *val4 = lv_cont_create(win, NULL); - lv_obj_set_size(val4, LV_HOR_RES / 13 * 3, LV_VER_RES - (LV_DPI * 11 / 8) * 4); + lv_obj_set_size(val4, LV_HOR_RES / 4, LV_VER_RES - (LV_DPI * 11 / 8) * 4); lv_obj_t * lb_val4 = lv_label_create(val4, lb_desc); @@ -2220,7 +2279,7 @@ static lv_res_t _create_window_sdcard_info_status(lv_obj_t *btn) lv_label_set_text(lb_val4, txt_buf); lv_obj_set_width(lb_val4, lv_obj_get_width(val4)); - lv_obj_align(val4, desc4, LV_ALIGN_OUT_RIGHT_MID, LV_DPI / 2, 0); + lv_obj_align(val4, desc4, LV_ALIGN_OUT_RIGHT_MID, 0, 0); free(txt_buf); sd_unmount(); From 94b36f658c0ff52ce30fb31a55966b7f13f3c2e3 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 24 Jan 2025 16:33:51 +0200 Subject: [PATCH 275/308] bdk: utils: added qsort compare functions int qsort_compare_int(const void *a, const void *b); int qsort_compare_char(const void *a, const void *b); int qsort_compare_char_case(const void *a, const void *b); --- bdk/utils/util.c | 47 +++++++++++++++++++++++++++++++---------------- bdk/utils/util.h | 6 +++++- 2 files changed, 36 insertions(+), 17 deletions(-) diff --git a/bdk/utils/util.c b/bdk/utils/util.c index d09fc70..69498ac 100644 --- a/bdk/utils/util.c +++ b/bdk/utils/util.c @@ -1,19 +1,19 @@ /* -* Copyright (c) 2018 naehrwert -* Copyright (c) 2018-2024 CTCaer -* -* This program is free software; you can redistribute it and/or modify it -* under the terms and conditions of the GNU General Public License, -* version 2, as published by the Free Software Foundation. -* -* This program is distributed in the hope it will be useful, but WITHOUT -* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -* more details. -* -* You should have received a copy of the GNU General Public License -* along with this program. If not, see . -*/ + * Copyright (c) 2018 naehrwert + * Copyright (c) 2018-2025 CTCaer + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ #include @@ -136,7 +136,7 @@ long strtol(const char *nptr, char **endptr, register int base) } else if (c == '+') c = *s++; if ((base == 0 || base == 16) && - c == '0' && (*s == 'x' || *s == 'X')) { + c == '0' && (*s == 'x' || *s == 'X')) { c = s[1]; s += 2; base = 16; @@ -239,6 +239,21 @@ u32 crc32_calc(u32 crc, const u8 *buf, u32 len) return ~crc; } +int qsort_compare_int(const void *a, const void *b) +{ + return (*(int *)a - *(int *)b); +} + +int qsort_compare_char(const void *a, const void *b) +{ + return strcmp(*(const char **)a, *(const char **)b); +} + +int qsort_compare_char_case(const void *a, const void *b) +{ + return strcasecmp(*(const char **)a, *(const char **)b); +} + void panic(u32 val) { // Set panic code. diff --git a/bdk/utils/util.h b/bdk/utils/util.h index 2372b8c..2d8d9bd 100644 --- a/bdk/utils/util.h +++ b/bdk/utils/util.h @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2024 CTCaer + * Copyright (c) 2018-2025 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -89,6 +89,10 @@ int atoi(const char *nptr); void reg_write_array(u32 *base, const reg_cfg_t *cfg, u32 num_cfg); u32 crc32_calc(u32 crc, const u8 *buf, u32 len); +int qsort_compare_int(const void *a, const void *b); +int qsort_compare_char(const void *a, const void *b); +int qsort_compare_char_case(const void *a, const void *b); + void panic(u32 val); void power_set_state(power_state_t state); void power_set_state_ex(void *param); From b9496f81b17d8b336cc815e4d401b6b38304b146 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 24 Jan 2025 16:42:14 +0200 Subject: [PATCH 276/308] bdk: sdmmc: add extention regs read/parse --- bdk/storage/sdmmc.c | 114 ++++++++++++++++++++++++++++++++++++++++++++ bdk/storage/sdmmc.h | 14 ++++++ 2 files changed, 128 insertions(+) diff --git a/bdk/storage/sdmmc.c b/bdk/storage/sdmmc.c index e7460b1..60053cc 100644 --- a/bdk/storage/sdmmc.c +++ b/bdk/storage/sdmmc.c @@ -31,6 +31,12 @@ #define DPRINTF(...) //#define SDMMC_DEBUG_PRINT_SD_REGS +#ifdef SDMMC_DEBUG_PRINT_SD_REGS +#define DREGPRINTF(...) gfx_printf(__VA_ARGS__) +#else +#define DREGPRINTF(...) +#endif + #ifdef BDK_SDMMC_EXTRA_PRINT #define ERROR_EXTRA_PRINTING #endif @@ -560,6 +566,34 @@ int mmc_storage_get_ext_csd(sdmmc_storage_t *storage, void *buf) return _sdmmc_storage_check_card_status(tmp); } +int sd_storage_get_ext_reg(sdmmc_storage_t *storage, u8 fno, u8 page, u16 address, u32 len, void *buf) +{ + if (!(storage->scr.cmds & BIT(2))) + return 0; + + sdmmc_cmd_t cmdbuf; + + u32 arg = fno << 27 | page << 18 | address << 9 | (len - 1); + + sdmmc_init_cmd(&cmdbuf, SD_READ_EXTR_SINGLE, arg, SDMMC_RSP_TYPE_1, 0); + + sdmmc_req_t reqbuf; + reqbuf.buf = buf; + reqbuf.blksize = SDMMC_DAT_BLOCKSIZE; + reqbuf.num_sectors = 1; + reqbuf.is_write = 0; + reqbuf.is_multi_block = 0; + reqbuf.is_auto_stop_trn = 0; + + if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, &reqbuf, NULL)) + return 0; + + u32 tmp = 0; + sdmmc_get_cached_rsp(storage->sdmmc, &tmp, SDMMC_RSP_TYPE_1); + + return _sdmmc_storage_check_card_status(tmp); +} + static int _mmc_storage_switch(sdmmc_storage_t *storage, u32 arg) { return _sdmmc_storage_execute_cmd_type1(storage, MMC_SWITCH, arg, 1, R1_SKIP_STATE_CHECK); @@ -1558,6 +1592,86 @@ static void _sd_storage_parse_ssr(sdmmc_storage_t *storage) storage->ssr.perf_enhance = unstuff_bits(raw_ssr2, 328, 8); } +int sd_storage_parse_perf_enhance(sdmmc_storage_t *storage, u8 fno, u8 page, u16 offset, u8 *buf) +{ + // Check status reg for support. + storage->ser.cache = (storage->ssr.perf_enhance >> 2) & BIT(0); + storage->ser.cmdq = (storage->ssr.perf_enhance >> 3) & 0x1F; + + if (!sd_storage_get_ext_reg(storage, fno, page, offset, 512, buf)) + { + storage->ser.cache_ext = 0; + storage->ser.cmdq_ext = 0; + + return 0; + } + + storage->ser.cache_ext = buf[4] & BIT(0); + storage->ser.cmdq_ext = buf[6] & 0x1F; + + return 1; +} + +static void _sd_storage_parse_ext_reg(sdmmc_storage_t *storage, u8 *buf, u16 *addr_next) +{ + u16 addr = *addr_next; + + // Address to the next extension. + *addr_next = (buf[addr + 41] << 8) | buf[addr + 40]; + + u16 sfc = (buf[addr + 1] << 8) | buf[addr]; + + u32 reg_sets = buf[addr + 42]; + +#ifdef SDMMC_DEBUG_PRINT_SD_REGS + for (u32 i = 0; i < reg_sets; i++) + { + u32 reg_set_addr; + memcpy(®_set_addr, &buf[addr + 44 + 4 * i], 4); + u16 off = reg_set_addr & 0x1FF; + u8 page = reg_set_addr >> 9 & 0xFF; + u8 fno = reg_set_addr >> 18 & 0xFF; + gfx_printf("Addr: %04X sfc:%02X - fno:%02X, page:%02X, off:%04X\n", addr, sfc, fno, page, off); + } +#endif + + // Parse Performance Enhance. + if (sfc == 2 && reg_sets == 1) + { + u32 reg_set0_addr; + memcpy(®_set0_addr, &buf[addr + 44], 4); + u16 off = reg_set0_addr & 0x1FF; + u8 page = reg_set0_addr >> 9 & 0xFF; + u8 fno = reg_set0_addr >> 18 & 0xFF; + + if (sd_storage_parse_perf_enhance(storage, fno, page, off, buf)) + storage->ser.valid = 1; + } +} + +void sd_storage_get_ext_regs(sdmmc_storage_t *storage, u8 *buf) +{ + DREGPRINTF("SD Extension Registers:\n\n"); + + if (!(storage->scr.cmds & BIT(2))) + { + DREGPRINTF("Not Supported!\n"); + return; + } + + if (!sd_storage_get_ext_reg(storage, 0, 0, 0, 512, buf)) + { + DREGPRINTF("Failed to get general info!\n"); + return; + } + + u16 size = (buf[3] << 8) | buf[2]; + u16 addr_next = 16; + u32 num_ext = buf[4]; + for (u32 i = 0; i < num_ext && addr_next < size; i++) + _sd_storage_parse_ext_reg(storage, buf, &addr_next); +} + int sd_storage_get_ssr(sdmmc_storage_t *storage, u8 *buf) { sdmmc_cmd_t cmdbuf; diff --git a/bdk/storage/sdmmc.h b/bdk/storage/sdmmc.h index fde4d20..6da130a 100644 --- a/bdk/storage/sdmmc.h +++ b/bdk/storage/sdmmc.h @@ -178,6 +178,15 @@ typedef struct _sd_ssr u32 protected_size; } sd_ssr_t; +typedef struct _sd_ext_reg_t +{ + u8 cmdq; + u8 cmdq_ext; + u8 cache; + u8 cache_ext; + int valid; +} sd_ext_reg_t; + /*! SDMMC storage context. */ typedef struct _sdmmc_storage_t { @@ -198,6 +207,7 @@ typedef struct _sdmmc_storage_t mmc_ext_csd_t ext_csd; sd_scr_t scr; sd_ssr_t ssr; + sd_ext_reg_t ser; } sdmmc_storage_t; typedef struct _sd_func_modes_t @@ -222,9 +232,13 @@ int sdmmc_storage_vendor_sandisk_report(sdmmc_storage_t *storage, void *buf); int mmc_storage_get_ext_csd(sdmmc_storage_t *storage, void *buf); +int sd_storage_get_ext_reg(sdmmc_storage_t *storage, u8 fno, u8 page, u16 offset, u32 len, void *buf); int sd_storage_get_fmodes(sdmmc_storage_t *storage, u8 *buf, sd_func_modes_t *functions); int sd_storage_get_scr(sdmmc_storage_t *storage, u8 *buf); int sd_storage_get_ssr(sdmmc_storage_t *storage, u8 *buf); u32 sd_storage_get_ssr_au(sdmmc_storage_t *storage); +void sd_storage_get_ext_regs(sdmmc_storage_t *storage, u8 *buf); +int sd_storage_parse_perf_enhance(sdmmc_storage_t *storage, u8 fno, u8 page, u16 offset, u8 *buf); + #endif From ea01782c80a934e4e5a79cc638569bd20184cdf0 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 24 Jan 2025 16:45:36 +0200 Subject: [PATCH 277/308] nyx: info: validate A2 support Show info about A2 support. Color coded A2 list: White: No support Green: Fully supported Yellow: CMDQ/Cache needs a quirk Red: Broken --- nyx/nyx_gui/frontend/gui_info.c | 63 +++++++++++++++++++++++++++++---- 1 file changed, 57 insertions(+), 6 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index b0d1012..3279c1f 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -24,6 +24,8 @@ #include "../hos/pkg1.h" #include +#include + #define SECTORS_TO_MIB_COEFF 11 extern hekate_config h_cfg; @@ -2187,15 +2189,64 @@ static lv_res_t _create_window_sdcard_info_status(lv_obj_t *btn) else bus_speed = "SDR12"; + char *cpe = NULL; + if (sd_storage.ssr.app_class == 2) + { + u8 *buf = zalloc(512); + + // Directly get and parse ext reg for performance enhance. + sd_storage_parse_perf_enhance(&sd_storage, 2, 0, 0, buf); + + bool has_perf_enhance = sd_storage.ser.cache && + sd_storage.ser.cmdq && + sd_storage.ser.cache == sd_storage.ser.cache_ext && + sd_storage.ser.cmdq == sd_storage.ser.cmdq_ext; + if (has_perf_enhance) + cpe = "#FFDD00 "; // CMDQ/CACHE support via a quirk. + else + cpe = "#FF3C28 "; // Broken. + + // Get and parse ext reg for performance enhance in spec. + sd_storage_get_ext_regs(&sd_storage, buf); + + if (sd_storage.ser.valid) + { + has_perf_enhance = sd_storage.ser.cache && + sd_storage.ser.cmdq && + sd_storage.ser.cache == sd_storage.ser.cache_ext && + sd_storage.ser.cmdq == sd_storage.ser.cmdq_ext; + + if (has_perf_enhance) + cpe = NULL; // CMDQ/CACHE support in spec. + else + cpe = "#FF3C28 "; // Broken. + } + + free(buf); + } + s_printf(txt_buf, - "#00DDFF v%d.0#\n%02X\n%d MiB\n%X (CP %X)\n%d\n%d MB/s (%d MHz)\n%d (AU: %d %s\nU%d V%d A%d\n%s\n\n%s", - sd_storage.csd.structure + 1, sd_storage.csd.cmdclass, - sd_storage.sec_cnt >> 11, sd_storage.sec_cnt, sd_storage.ssr.protected_size >> 9, - sd_storage.ssr.bus_width, sd_storage.csd.busspeed, + "#00DDFF v%d.0#\n" + "%02X\n" + "%d MiB\n" + "%X (CP %X)\n" + "%d\n" + "%d MB/s (%d MHz)\n" + "%d (AU: %d %s\n" + "U%d V%d %sA%d%s\n" + "%s\n\n" + "%s", + sd_storage.csd.structure + 1, + sd_storage.csd.cmdclass, + sd_storage.sec_cnt >> 11, + sd_storage.sec_cnt, sd_storage.ssr.protected_size >> 9, + sd_storage.ssr.bus_width, + sd_storage.csd.busspeed, (sd_storage.csd.busspeed > 10) ? (sd_storage.csd.busspeed * 2) : 50, sd_storage.ssr.speed_class, uhs_au_size, uhs_au_mb ? "MiB)" : "KiB)", - sd_storage.ssr.uhs_grade, sd_storage.ssr.video_class, sd_storage.ssr.app_class, - bus_speed, wp_info); + sd_storage.ssr.uhs_grade, sd_storage.ssr.video_class, cpe ? cpe : "", sd_storage.ssr.app_class, cpe ? "#" : "", + bus_speed, + wp_info); lv_label_set_text(lb_val2, txt_buf); From 571496d2930ef71e5782ad017972d8416e5c91ce Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 24 Jan 2025 16:46:31 +0200 Subject: [PATCH 278/308] nyx: info: consider FST2 touch panel unknown --- nyx/nyx_gui/frontend/gui_info.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index 3279c1f..13ef658 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -989,13 +989,13 @@ static lv_res_t _create_window_hw_info_status(lv_obj_t *btn) if (touch_panel) panel_ic_paired = touch_panel->idx == 0; // NISSHA NFT-K12D. break; - case 0x98000004: // New 6.2" panel? - case 0x50000001: - case 0x50000002: - strcat(txt_buf, "FST2 UNK"); - if (touch_panel) - panel_ic_paired = touch_panel->idx == 0; - break; + // case 0x98000004: // New 6.2" panel? + // case 0x50000001: + // case 0x50000002: + // strcat(txt_buf, "FST2 UNK"); + // if (touch_panel) + // panel_ic_paired = touch_panel->idx == 0; + // break; case 0x001A0300: case 0x32000102: strcat(txt_buf, "4CD60D/2"); From 21ecb526af630073845b9c72ab7b5c59dc06ca7c Mon Sep 17 00:00:00 2001 From: CTCaer Date: Fri, 24 Jan 2025 16:49:32 +0200 Subject: [PATCH 279/308] hos: update some comments And remove unneeded checks. --- bootloader/hos/pkg1.c | 6 +++--- nyx/nyx_gui/hos/pkg1.c | 6 +++--- nyx/nyx_gui/hos/pkg2.h | 11 ++++++----- 3 files changed, 12 insertions(+), 11 deletions(-) diff --git a/bootloader/hos/pkg1.c b/bootloader/hos/pkg1.c index f4ac124..a80557e 100644 --- a/bootloader/hos/pkg1.c +++ b/bootloader/hos/pkg1.c @@ -1,7 +1,7 @@ /* * Copyright (c) 2018 naehrwert * Copyright (c) 2018 st4rk - * Copyright (c) 2018-2024 CTCaer + * Copyright (c) 2018-2025 CTCaer * Copyright (c) 2018 balika011 * * This program is free software; you can redistribute it and/or modify it @@ -33,7 +33,7 @@ extern hekate_config h_cfg; #define SM_100_ADR 0x4002B020 // Original: 0x40014020. PATCHSET_DEF(_secmon_1_patchset, // Patch the relocator to be able to run from SM_100_ADR. - { 0x1E0, _ADRP(0, 0x7C013000 - _PAGEOFF(SM_100_ADR)) }, + { 0x1E0, _ADRP(0, TZRAM_BASE + 0x3000 - _PAGEOFF(SM_100_ADR)) }, // Patch package2 signature/hash checks. { 0x9F0 + 0xADC, _NOP() } ); @@ -143,7 +143,7 @@ static const u8 sec_map_100[3] = { PK11_SECTION_SM, PK11_SECTION_LD, PK11_SECTIO static const u8 sec_map_2xx[3] = { PK11_SECTION_WB, PK11_SECTION_LD, PK11_SECTION_SM }; static const u8 sec_map_4xx[3] = { PK11_SECTION_LD, PK11_SECTION_SM, PK11_SECTION_WB }; - // ID (Timestamp), KB, Fuses, TSEC, PK11, SECMON, Warmboot. + // Timestamp KB FU TSEC PK11 SECMON Warmboot static const pkg1_id_t _pkg1_ids[] = { { "20161121", 0, 1, 0x1900, 0x3FE0, SM_100_ADR, 0x8000D000, _secmon_1_patchset }, // 1.0.0 (Patched relocator). { "20170210", 0, 2, 0x1900, 0x3FE0, 0x4002D000, 0x8000D000, _secmon_2_patchset }, // 2.0.0 - 2.3.0. diff --git a/nyx/nyx_gui/hos/pkg1.c b/nyx/nyx_gui/hos/pkg1.c index 6d253e4..80602cd 100644 --- a/nyx/nyx_gui/hos/pkg1.c +++ b/nyx/nyx_gui/hos/pkg1.c @@ -1,7 +1,7 @@ /* * Copyright (c) 2018 naehrwert * Copyright (c) 2018 st4rk - * Copyright (c) 2018-2024 CTCaer + * Copyright (c) 2018-2025 CTCaer * Copyright (c) 2018 balika011 * * This program is free software; you can redistribute it and/or modify it @@ -39,7 +39,7 @@ static const u8 sec_map_100[3] = { PK11_SECTION_SM, PK11_SECTION_LD, PK11_SECTIO static const u8 sec_map_2xx[3] = { PK11_SECTION_WB, PK11_SECTION_LD, PK11_SECTION_SM }; static const u8 sec_map_4xx[3] = { PK11_SECTION_LD, PK11_SECTION_SM, PK11_SECTION_WB }; - // ID (Timestamp), KB, TSEC, PK11, SECMON, Warmboot. + // Timestamp KB TSEC PK11 SECMON Warmboot static const pkg1_id_t _pkg1_ids[] = { { "20161121", 0, 0x1900, 0x3FE0, 0x40014020, 0x8000D000 }, // 1.0.0. { "20170210", 0, 0x1900, 0x3FE0, 0x4002D000, 0x8000D000 }, // 2.0.0 - 2.3.0. @@ -124,7 +124,7 @@ const u8 *pkg1_unpack(void *wm_dst, void *sm_dst, void *ldr_dst, const pkg1_id_t // Get correct header mapping. if (id->kb == HOS_KB_VERSION_100 && !memcmp(id->id, "20161121", 8)) sec_map = sec_map_100; - else if (id->kb >= HOS_KB_VERSION_100 && id->kb <= HOS_KB_VERSION_301) + else if (id->kb <= HOS_KB_VERSION_301) sec_map = sec_map_2xx; else sec_map = sec_map_4xx; diff --git a/nyx/nyx_gui/hos/pkg2.h b/nyx/nyx_gui/hos/pkg2.h index 619d01c..df24639 100644 --- a/nyx/nyx_gui/hos/pkg2.h +++ b/nyx/nyx_gui/hos/pkg2.h @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2023 CTCaer + * Copyright (c) 2018-2025 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -20,16 +20,17 @@ #include -#define PKG2_MAGIC 0x31324B50 -#define PKG2_SEC_BASE 0x80000000 +#define PKG2_MAGIC 0x31324B50 +#define PKG2_SEC_BASE 0x80000000 #define PKG2_SEC_KERNEL 0 -#define PKG2_SEC_INI1 1 +#define PKG2_SEC_INI1 1 +#define PKG2_SEC_UNUSED 2 #define INI1_MAGIC 0x31494E49 //! TODO: Update on kernel change if needed. // Offset of OP + 12 is the INI1 offset. On v2 with dynamic crt0 it's + 16. -#define PKG2_NEWKERN_GET_INI1_HEURISTIC 0xD2800015 +#define PKG2_NEWKERN_GET_INI1_HEURISTIC 0xD2800015 // MOV X21, #0. #define PKG2_NEWKERN_START 0x800 extern u32 pkg2_newkern_ini1_start; From 1d75c30c61d1b119753f7607d079c84026652fe3 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 30 Apr 2025 08:11:51 +0300 Subject: [PATCH 280/308] bdk: display: update color mode definitions --- bdk/display/di.h | 25 ++++++++++++++----------- 1 file changed, 14 insertions(+), 11 deletions(-) diff --git a/bdk/display/di.h b/bdk/display/di.h index a7dda47..9a35d4f 100644 --- a/bdk/display/di.h +++ b/bdk/display/di.h @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2024 CTCaer + * Copyright (c) 2018-2025 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -718,7 +718,7 @@ #define MIPI_DCS_READ_DDB_CONTINUE 0xA8 // 0x100 size. /*! MIPI DCS Panel Private CMDs. */ -#define MIPI_DCS_PRIV_SM_SET_COLOR_MODE 0xA0 +#define MIPI_DCS_PRIV_SM_SET_COLOR_MODE 0xA0 // 43 bytes. #define MIPI_DCS_PRIV_SM_SET_REG_OFFSET 0xB0 #define MIPI_DCS_PRIV_SM_SET_ELVSS 0xB1 // OLED backlight tuning. Byte7: PWM transition time in frames. #define MIPI_DCS_PRIV_SET_POWER_CONTROL 0xB1 @@ -728,6 +728,7 @@ #define MIPI_DCS_PRIV_UNK_D6 0xD6 #define MIPI_DCS_PRIV_UNK_D8 0xD8 #define MIPI_DCS_PRIV_UNK_D9 0xD9 +#define MIPI_DCS_PRIV_SM_DISPLAY_ID 0xDD // LVL1 LVL2 LVL3 UNK0 UNK1 #define MIPI_DCS_PRIV_SM_SET_REGS_LOCK 0xE2 // Samsung: Lock (default): 5A5A A5A5 A5A5 A500 A500. Unlock: A5A5 5A5A 5A5A UNK UNK. #define MIPI_DCS_PRIV_READ_EXTC_CMD_SPI 0xFE // Read EXTC Command In SPI. 1 byte. 0-6: EXT_SPI_CNT, 7:EXT_SP. @@ -766,19 +767,21 @@ #define DCS_CONTROL_DISPLAY_SM_FLASHLIGHT BIT(2) #define DCS_CONTROL_DISPLAY_BACKLIGHT_CTRL BIT(2) -#define DCS_CONTROL_DISPLAY_DIMMING_CTRL BIT(3) +#define DCS_CONTROL_DISPLAY_DIMMING_CTRL BIT(3) // Transition fading. #define DCS_CONTROL_DISPLAY_BRIGHTNESS_CTRL BIT(5) +#define DCS_CONTROL_DISPLAY_HBM_CTRL0 BIT(6) +#define DCS_CONTROL_DISPLAY_HBM_CTRL1 BIT(7) -#define DCS_SM_COLOR_MODE_SATURATED 0x00 // Disabled. Similar to vivid but over-saturated. Wide gamut? +#define DCS_SM_COLOR_MODE_SATURATED 0x00 // Disabled. Based on Vivid but over-saturated. #define DCS_SM_COLOR_MODE_WASHED 0x45 -#define DCS_SM_COLOR_MODE_BASIC 0x03 +#define DCS_SM_COLOR_MODE_BASIC 0x03 // Real natural profile. #define DCS_SM_COLOR_MODE_POR_RESET 0x20 // Reset value on power on. -#define DCS_SM_COLOR_MODE_NATURAL 0x23 // Not actually natural.. -#define DCS_SM_COLOR_MODE_VIVID 0x65 -#define DCS_SM_COLOR_MODE_NIGHT0 0x43 // Based on washed out. -#define DCS_SM_COLOR_MODE_NIGHT1 0x15 // Based on basic. -#define DCS_SM_COLOR_MODE_NIGHT2 0x35 // Based on natural. -#define DCS_SM_COLOR_MODE_NIGHT3 0x75 // Based on vivid. +#define DCS_SM_COLOR_MODE_NATURAL 0x23 // Not actually natural.. Extra saturation. +#define DCS_SM_COLOR_MODE_VIVID 0x65 // Saturated. +#define DCS_SM_COLOR_MODE_NIGHT0 0x43 // Based on Washed Out. +#define DCS_SM_COLOR_MODE_NIGHT1 0x15 // Based on Basic. +#define DCS_SM_COLOR_MODE_NIGHT2 0x35 // Based on Natural. +#define DCS_SM_COLOR_MODE_NIGHT3 0x75 // Based on Vivid. #define DCS_SM_COLOR_MODE_ENABLE BIT(0) From c07a155cc16708959c5ed7adbce7e565a9bea7ee Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 30 Apr 2025 08:14:32 +0300 Subject: [PATCH 281/308] bdk: small refactoring --- bdk/power/bq24193.c | 221 +++++++++++++++++---------------- bdk/power/max7762x.c | 2 +- bdk/soc/fuse.c | 2 + bdk/soc/t210.h | 12 +- bdk/soc/uart.h | 2 + bdk/usb/usb_descriptor_types.h | 2 +- bdk/utils/sprintf.c | 16 +-- 7 files changed, 132 insertions(+), 125 deletions(-) diff --git a/bdk/power/bq24193.c b/bdk/power/bq24193.c index 2b2e744..5194279 100644 --- a/bdk/power/bq24193.c +++ b/bdk/power/bq24193.c @@ -29,127 +29,128 @@ int bq24193_get_property(enum BQ24193_reg_prop prop, int *value) { u8 data; - switch (prop) { - case BQ24193_InputVoltageLimit: // Input voltage limit (mV). - data = bq24193_get_reg(BQ24193_InputSource); - data = (data & BQ24193_INCONFIG_VINDPM_MASK) >> 3; - *value = 0; - *value += ((data >> 0) & 1) ? 80 : 0; - *value += ((data >> 1) & 1) ? 160 : 0; - *value += ((data >> 2) & 1) ? 320 : 0; - *value += ((data >> 3) & 1) ? 640 : 0; - *value += 3880; + switch (prop) + { + case BQ24193_InputVoltageLimit: // Input voltage limit (mV). + data = bq24193_get_reg(BQ24193_InputSource); + data = (data & BQ24193_INCONFIG_VINDPM_MASK) >> 3; + *value = 0; + *value += ((data >> 0) & 1) ? 80 : 0; + *value += ((data >> 1) & 1) ? 160 : 0; + *value += ((data >> 2) & 1) ? 320 : 0; + *value += ((data >> 3) & 1) ? 640 : 0; + *value += 3880; + break; + case BQ24193_InputCurrentLimit: // Input current limit (mA). + data = bq24193_get_reg(BQ24193_InputSource); + data &= BQ24193_INCONFIG_INLIMIT_MASK; + switch (data) + { + case 0: + *value = 100; break; - case BQ24193_InputCurrentLimit: // Input current limit (mA). - data = bq24193_get_reg(BQ24193_InputSource); - data &= BQ24193_INCONFIG_INLIMIT_MASK; - switch (data) - { - case 0: - *value = 100; - break; - case 1: - *value = 150; - break; - case 2: - *value = 500; - break; - case 3: - *value = 900; - break; - case 4: - *value = 1200; - break; - case 5: - *value = 1500; - break; - case 6: - *value = 2000; - break; - case 7: - *value = 3000; - break; - } + case 1: + *value = 150; break; - case BQ24193_SystemMinimumVoltage: // Minimum system voltage limit (mV). - data = bq24193_get_reg(BQ24193_PORConfig); - *value = (data & BQ24193_PORCONFIG_SYSMIN_MASK) >> 1; - *value *= 100; - *value += 3000; + case 2: + *value = 500; break; - case BQ24193_FastChargeCurrentLimit: // Fast charge current limit (mA). - data = bq24193_get_reg(BQ24193_ChrgCurr); - data = (data & BQ24193_CHRGCURR_ICHG_MASK) >> 2; - *value = 0; - *value += ((data >> 0) & 1) ? 64 : 0; - *value += ((data >> 1) & 1) ? 128 : 0; - *value += ((data >> 2) & 1) ? 256 : 0; - *value += ((data >> 3) & 1) ? 512 : 0; - *value += ((data >> 4) & 1) ? 1024 : 0; - *value += ((data >> 5) & 1) ? 2048 : 0; - *value += 512; - data = bq24193_get_reg(BQ24193_ChrgCurr); - data &= BQ24193_CHRGCURR_20PCT_MASK; - if (data) - *value = *value * 20 / 100; // Fast charge current limit is 20%. + case 3: + *value = 900; break; - case BQ24193_ChargeVoltageLimit: // Charge voltage limit (mV). - data = bq24193_get_reg(BQ24193_ChrgVolt); - data = (data & BQ24193_CHRGVOLT_VREG) >> 2; - *value = 0; - *value += ((data >> 0) & 1) ? 16 : 0; - *value += ((data >> 1) & 1) ? 32 : 0; - *value += ((data >> 2) & 1) ? 64 : 0; - *value += ((data >> 3) & 1) ? 128 : 0; - *value += ((data >> 4) & 1) ? 256 : 0; - *value += ((data >> 5) & 1) ? 512 : 0; - *value += 3504; + case 4: + *value = 1200; break; - case BQ24193_RechargeThreshold: // Recharge voltage threshold less than voltage limit (mV). - data = bq24193_get_reg(BQ24193_ChrgVolt); - data &= BQ24193_IRTHERMAL_THERM_MASK; - if (data) - *value = 300; - else - *value = 100; + case 5: + *value = 1500; break; - case BQ24193_ThermalRegulation: // Thermal regulation threshold (oC). - data = bq24193_get_reg(BQ24193_IRCompThermal); - data &= BQ24193_IRTHERMAL_THERM_MASK; - switch (data) - { - case 0: - *value = 60; - break; - case 1: - *value = 80; - break; - case 2: - *value = 100; - break; - case 3: - *value = 120; - break; - } + case 6: + *value = 2000; break; - case BQ24193_ChargeStatus: // 0: Not charging, 1: Pre-charge, 2: Fast charging, 3: Charge termination done - data = bq24193_get_reg(BQ24193_Status); - *value = (data & BQ24193_STATUS_CHRG_MASK) >> 4; + case 7: + *value = 3000; break; - case BQ24193_TempStatus: // 0: Normal, 2: Warm, 3: Cool, 5: Cold, 6: Hot. - data = bq24193_get_reg(BQ24193_FaultReg); - *value = data & BQ24193_FAULT_THERM_MASK; + } + break; + case BQ24193_SystemMinimumVoltage: // Minimum system voltage limit (mV). + data = bq24193_get_reg(BQ24193_PORConfig); + *value = (data & BQ24193_PORCONFIG_SYSMIN_MASK) >> 1; + *value *= 100; + *value += 3000; + break; + case BQ24193_FastChargeCurrentLimit: // Fast charge current limit (mA). + data = bq24193_get_reg(BQ24193_ChrgCurr); + data = (data & BQ24193_CHRGCURR_ICHG_MASK) >> 2; + *value = 0; + *value += ((data >> 0) & 1) ? 64 : 0; + *value += ((data >> 1) & 1) ? 128 : 0; + *value += ((data >> 2) & 1) ? 256 : 0; + *value += ((data >> 3) & 1) ? 512 : 0; + *value += ((data >> 4) & 1) ? 1024 : 0; + *value += ((data >> 5) & 1) ? 2048 : 0; + *value += 512; + data = bq24193_get_reg(BQ24193_ChrgCurr); + data &= BQ24193_CHRGCURR_20PCT_MASK; + if (data) + *value = *value * 20 / 100; // Fast charge current limit is 20%. + break; + case BQ24193_ChargeVoltageLimit: // Charge voltage limit (mV). + data = bq24193_get_reg(BQ24193_ChrgVolt); + data = (data & BQ24193_CHRGVOLT_VREG) >> 2; + *value = 0; + *value += ((data >> 0) & 1) ? 16 : 0; + *value += ((data >> 1) & 1) ? 32 : 0; + *value += ((data >> 2) & 1) ? 64 : 0; + *value += ((data >> 3) & 1) ? 128 : 0; + *value += ((data >> 4) & 1) ? 256 : 0; + *value += ((data >> 5) & 1) ? 512 : 0; + *value += 3504; + break; + case BQ24193_RechargeThreshold: // Recharge voltage threshold less than voltage limit (mV). + data = bq24193_get_reg(BQ24193_ChrgVolt); + data &= BQ24193_IRTHERMAL_THERM_MASK; + if (data) + *value = 300; + else + *value = 100; + break; + case BQ24193_ThermalRegulation: // Thermal regulation threshold (oC). + data = bq24193_get_reg(BQ24193_IRCompThermal); + data &= BQ24193_IRTHERMAL_THERM_MASK; + switch (data) + { + case 0: + *value = 60; break; - case BQ24193_DevID: // Dev ID. - data = bq24193_get_reg(BQ24193_VendorPart); - *value = data & BQ24193_VENDORPART_DEV_MASK; + case 1: + *value = 80; break; - case BQ24193_ProductNumber: // Product number. - data = bq24193_get_reg(BQ24193_VendorPart); - *value = (data & BQ24193_VENDORPART_PN_MASK) >> 3; + case 2: + *value = 100; break; - default: - return -1; + case 3: + *value = 120; + break; + } + break; + case BQ24193_ChargeStatus: // 0: Not charging, 1: Pre-charge, 2: Fast charging, 3: Charge termination done + data = bq24193_get_reg(BQ24193_Status); + *value = (data & BQ24193_STATUS_CHRG_MASK) >> 4; + break; + case BQ24193_TempStatus: // 0: Normal, 2: Warm, 3: Cool, 5: Cold, 6: Hot. + data = bq24193_get_reg(BQ24193_FaultReg); + *value = data & BQ24193_FAULT_THERM_MASK; + break; + case BQ24193_DevID: // Dev ID. + data = bq24193_get_reg(BQ24193_VendorPart); + *value = data & BQ24193_VENDORPART_DEV_MASK; + break; + case BQ24193_ProductNumber: // Product number. + data = bq24193_get_reg(BQ24193_VendorPart); + *value = (data & BQ24193_VENDORPART_PN_MASK) >> 3; + break; + default: + return -1; } return 0; } diff --git a/bdk/power/max7762x.c b/bdk/power/max7762x.c index 70756c4..f0aefb5 100644 --- a/bdk/power/max7762x.c +++ b/bdk/power/max7762x.c @@ -327,7 +327,7 @@ void max77620_config_default() return; // Set default voltages and enable regulators. - for (u32 i = 1; i <= REGULATOR_LDO8; i++) + for (u32 i = REGULATOR_SD1; i <= REGULATOR_LDO8; i++) { max77620_regulator_config_fps(i); max7762x_regulator_set_voltage(i, _pmic_regulators[i].uv_default); diff --git a/bdk/soc/fuse.c b/bdk/soc/fuse.c index e0a6dc8..9668196 100644 --- a/bdk/soc/fuse.c +++ b/bdk/soc/fuse.c @@ -24,7 +24,9 @@ #include #include #include +#include #include +#include #include static const u32 evp_thunk_template[] = { diff --git a/bdk/soc/t210.h b/bdk/soc/t210.h index 6690114..eaf59df 100644 --- a/bdk/soc/t210.h +++ b/bdk/soc/t210.h @@ -85,6 +85,7 @@ #define AXBAR_BASE 0x702D0800 #define I2S_BASE 0x702D1000 #define ADMA_BASE 0x702E2000 +#define AMC_BASE 0x702EF000 #define SE2_BASE 0x70412000 #define SE_PKA1_BASE 0x70420000 #define TZRAM_BASE 0x7C010000 @@ -151,6 +152,7 @@ #define CL_DVFS(off) MMIO_REG32(CL_DVFS_BASE, off) #define I2S(off) MMIO_REG32(I2S_BASE, off) #define ADMA(off) MMIO_REG32(ADMA_BASE, off) +#define AMC(off) MMIO_REG32(AMC_BASE, off) #define SE2(off) MMIO_REG32(SE2_BASE, off) #define SE_PKA1(off) MMIO_REG32(SE_PKA1_BASE, off) #define USB(off) MMIO_REG32(USB_BASE, off) @@ -199,7 +201,7 @@ /*! AHB Gizmo registers. */ #define AHB_ARBITRATION_PRIORITY_CTRL 0x8 #define PRIORITY_CTRL_WEIGHT(x) (((x) & 7) << 29) -#define PRIORITY_SELECT_USB BIT(6) // USB-OTG. +#define PRIORITY_SELECT_USB BIT(6) // USB-OTG. #define PRIORITY_SELECT_USB2 BIT(18) // USB-HSIC. #define PRIORITY_SELECT_USB3 BIT(17) // XUSB. #define AHB_GIZMO_AHB_MEM 0x10 @@ -210,7 +212,7 @@ #define AHB_GIZMO_USB 0x20 #define AHB_GIZMO_SDMMC4 0x48 #define AHB_GIZMO_USB2 0x7C -#define AHB_GIZMO_USB3 0x80 +#define AHB_GIZMO_USB3 0x80 // Doesn't exist on T21x?? #define AHB_GIZMO_IMMEDIATE BIT(18) #define AHB_ARBITRATION_XBAR_CTRL 0xE0 #define AHB_AHB_MEM_PREFETCH_CFG3 0xE4 @@ -219,9 +221,9 @@ #define AHB_AHB_MEM_PREFETCH_CFG2 0xF4 #define MST_ID(x) (((x) & 0x1F) << 26) #define MEM_PREFETCH_AHBDMA_MST_ID MST_ID(5) -#define MEM_PREFETCH_USB_MST_ID MST_ID(6) // USB-OTG. -#define MEM_PREFETCH_USB2_MST_ID MST_ID(18) // USB-HSIC. -#define MEM_PREFETCH_USB3_MST_ID MST_ID(17) // XUSB. +#define MEM_PREFETCH_USB_MST_ID MST_ID(6) // USB-OTG. Doesn't exist on T210B01. +#define MEM_PREFETCH_USB2_MST_ID MST_ID(18) // USB-HSIC. Doesn't exist on T210B01. +#define MEM_PREFETCH_USB3_MST_ID MST_ID(17) // XUSB. Doesn't exist on T210B01. #define MEM_PREFETCH_ADDR_BNDRY(x) (((x) & 0xF) << 21) #define MEM_PREFETCH_ENABLE BIT(31) #define AHB_ARBITRATION_AHB_MEM_WRQUE_MST_ID 0xFC diff --git a/bdk/soc/uart.h b/bdk/soc/uart.h index c25973c..a24d5c9 100644 --- a/bdk/soc/uart.h +++ b/bdk/soc/uart.h @@ -70,6 +70,8 @@ #define UART_MCR_CTS_EN BIT(5) #define UART_MCR_RTS_EN BIT(6) +#define UART_FIFO_SIZE 36 + typedef struct _uart_t { /* 0x00 */ vu32 UART_THR_DLAB; diff --git a/bdk/usb/usb_descriptor_types.h b/bdk/usb/usb_descriptor_types.h index 9f86e9d..cb58abc 100644 --- a/bdk/usb/usb_descriptor_types.h +++ b/bdk/usb/usb_descriptor_types.h @@ -99,7 +99,7 @@ typedef struct _usb_cfg_descr_t u8 bConfigurationValue; // Value of this configuration (1 based). u8 iConfiguration; // Index of String Descriptor describing the configuration. u8 bmAttributes; // Configuration characteristics. - u8 bMaxPower; // Maximum power consumed by this configuration. + u8 bMaxPower; // Maximum power consumed by this configuration. In 2mA (usb2) or 8mA (usb3). } __attribute__((packed)) usb_cfg_descr_t; /* Interface descriptor structure */ diff --git a/bdk/utils/sprintf.c b/bdk/utils/sprintf.c index d21c5be..b86b96c 100644 --- a/bdk/utils/sprintf.c +++ b/bdk/utils/sprintf.c @@ -172,14 +172,14 @@ parse_padding_dec: _s_putc(c); break; - case 's': - _s_puts(va_arg(ap, char *), fill, fcnt); - break; - case 'd': _s_putn(va_arg(ap, u32), 10, fill, fcnt); break; + case 's': + _s_puts(va_arg(ap, char *), fill, fcnt); + break; + case 'p': case 'P': case 'x': @@ -261,14 +261,14 @@ parse_padding_dec: _s_putc(c); break; - case 's': - _s_puts(va_arg(ap, char *), fill, fcnt); - break; - case 'd': _s_putn(va_arg(ap, u32), 10, fill, fcnt); break; + case 's': + _s_puts(va_arg(ap, char *), fill, fcnt); + break; + case 'p': case 'P': case 'x': From 08872325c814f351d00252a2916a4d355cd3d2d1 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 30 Apr 2025 08:15:15 +0300 Subject: [PATCH 282/308] bdk: se: add 0 byte sha256 support --- bdk/sec/se.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/bdk/sec/se.c b/bdk/sec/se.c index 7dfb187..1278b1c 100644 --- a/bdk/sec/se.c +++ b/bdk/sec/se.c @@ -513,15 +513,15 @@ int se_calc_sha256(void *hash, u32 *msg_left, const void *src, u32 src_size, u64 return 0; // Src size of 0 is not supported, so return null string sha256. - // if (!src_size) - // { - // const u8 null_hash[SE_SHA_256_SIZE] = { - // 0xE3, 0xB0, 0xC4, 0x42, 0x98, 0xFC, 0x1C, 0x14, 0x9A, 0xFB, 0xF4, 0xC8, 0x99, 0x6F, 0xB9, 0x24, - // 0x27, 0xAE, 0x41, 0xE4, 0x64, 0x9B, 0x93, 0x4C, 0xA4, 0x95, 0x99, 0x1B, 0x78, 0x52, 0xB8, 0x55 - // }; - // memcpy(hash, null_hash, SE_SHA_256_SIZE); - // return 1; - // } + if (!src_size) + { + const u8 null_hash[SE_SHA_256_SIZE] = { + 0xE3, 0xB0, 0xC4, 0x42, 0x98, 0xFC, 0x1C, 0x14, 0x9A, 0xFB, 0xF4, 0xC8, 0x99, 0x6F, 0xB9, 0x24, + 0x27, 0xAE, 0x41, 0xE4, 0x64, 0x9B, 0x93, 0x4C, 0xA4, 0x95, 0x99, 0x1B, 0x78, 0x52, 0xB8, 0x55 + }; + memcpy(hash, null_hash, SE_SHA_256_SIZE); + return 1; + } // Setup config for SHA256. SE(SE_CONFIG_REG) = SE_CONFIG_ENC_MODE(MODE_SHA256) | SE_CONFIG_ENC_ALG(ALG_SHA) | SE_CONFIG_DST(DST_HASHREG); From f110f970992ae4f77050f61aae50e9205a99dbc0 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 30 Apr 2025 08:27:36 +0300 Subject: [PATCH 283/308] hos: refactor fss to pkg3 To `fss0` config is now renamed to `pkg3`. `fss0` still works but is deprecated. Additionally `fss0experimental` key is now renamed to `pkg3ex` --- Makefile | 2 +- README.md | 19 +++--- bootloader/hos/hos.c | 2 +- bootloader/hos/hos.h | 4 +- bootloader/hos/hos_config.c | 9 +-- bootloader/hos/{fss.c => pkg3.c} | 99 ++++++++++++++++---------------- bootloader/hos/{fss.h => pkg3.h} | 6 +- res/hekate_ipl_template.ini | 27 +++++---- 8 files changed, 88 insertions(+), 80 deletions(-) rename bootloader/hos/{fss.c => pkg3.c} (63%) rename bootloader/hos/{fss.h => pkg3.h} (88%) diff --git a/Makefile b/Makefile index f2ba8bb..dd7b786 100755 --- a/Makefile +++ b/Makefile @@ -48,7 +48,7 @@ OBJS += $(addprefix $(BUILDDIR)/$(TARGET)/, \ # Horizon. OBJS += $(addprefix $(BUILDDIR)/$(TARGET)/, \ - hos.o hos_config.o pkg1.o pkg2.o pkg2_ini_kippatch.o fss.o secmon_exo.o \ + hos.o hos_config.o pkg1.o pkg2.o pkg3.o pkg2_ini_kippatch.o secmon_exo.o \ ) # Libraries. diff --git a/README.md b/README.md index 55536e0..a2ff9f3 100644 --- a/README.md +++ b/README.md @@ -98,8 +98,9 @@ There are four possible type of entries. "**[ ]**": Boot entry, "**{ }**": Capti | kernel={FILE path} | Replaces the kernel binary | | kip1={FILE path} | Replaces/Adds kernel initial process. Multiple can be set. | | kip1={FOLDER path}/* | Loads every .kip/.kip1 inside a folder. Compatible with single kip1 keys. | -| fss0={FILE path} | Takes an Atmosphere `package3` binary (formerly fusee-secondary.bin) and `extracts` all needed parts from it. kips, exosphere, warmboot and mesophere if enabled. | -| fss0experimental=1 | Enables loading of experimental content from a FSS0 storage | +| pkg3={FILE path} | Takes an Atmosphere `package3` binary and `extracts` all needed parts from it. kips, exosphere, warmboot and mesophere. | +| fss0={FILE path} | Same as above. Deprecated! | +| pkg3ex=1 | Enables loading of experimental content from a PKG3/FSS0 storage | | exofatal={FILE path} | Replaces the exosphere fatal binary for Mariko | | ---------------------- | ---------------------------------------------------------- | | kip1patch=patchname | Enables a kip1 patch. Specify with multiple lines and/or in one line with `,` as separator. If actual patch is not found, a warning will show up | @@ -109,7 +110,7 @@ There are four possible type of entries. "**[ ]**": Boot entry, "**{ }**": Capti | stock=1 | OFW via hekate bootloader. Disables unneeded kernel patching and CFW kips when running stock. `If emuMMC is enabled, emummc_force_disable=1` is required. emuMMC is not supported on stock. If additional KIPs are needed other than OFW's, you can define them with `kip1` key. No kip should be used that relies on Atmosphère patching, because it will hang. If `NOGC` is needed, use `kip1patch=nogc`. | | fullsvcperm=1 | Disables SVC verification (full services permission). Doesn't work with Mesosphere as kernel. | | debugmode=1 | Enables Debug mode. Obsolete when used with exosphere as secmon. | -| kernelprocid=1 | Enables stock kernel process id send/recv patching. Not needed when `fss0` is used. | +| kernelprocid=1 | Enables stock kernel process id send/recv patching. Not needed when `pkg3`/`fss0` is used. | | ---------------------- | ---------------------------------------------------------- | | payload={FILE path} | Payload launching. Tools, Android/Linux, CFW bootloaders, etc. Any key above when used with that, doesn't get into account. | | ---------------------- | ---------------------------------------------------------- | @@ -129,11 +130,11 @@ There are four possible type of entries. "**[ ]**": Boot entry, "**{ }**": Capti **Note1**: When using the wildcard (`/*`) with `kip1` you can still use the normal `kip1` after that to load extra single kips. -**Note2**: When using FSS0 it parses exosphere, warmboot and all core kips. You can override the first 2 by using `secmon`/`warmboot` after defining `fss0`. +**Note2**: When using PKG3/FSS0 it parses exosphere, warmboot and all core kips. You can override the first 2 by using `secmon`/`warmboot` after defining `pkg3`/`fss0`. You can define `kip1` to load an extra kip or many via the wildcard (`/*`) usage. -**Warning**: Careful when you define *fss0 core* kips when using `fss0` or the folder (when using `/*`) includes them. -This is in case the kips are incompatible between them. If compatible, you can override `fss0` kips with no issues (useful for testing with intermediate kip changes). In such cases, the `kip1` line must be under `fss0` line. +**Warning**: Careful when you define *pkg3/fss core* kips when using `pkg3`/`fss0` or the folder (when using `/*`) includes them. +That's in case the kips are incompatible between them. If compatible, you can override `pkg3`/`fss0` kips with no issues (useful for testing with intermediate kip changes). In such cases, the `kip1` line must be after `pkg3`/`fss0` line. ### Boot entry key/value combinations for Exosphère: @@ -155,7 +156,7 @@ This is in case the kips are incompatible between them. If compatible, you can o ### Payload storage: -hekate has a boot storage in the binary that helps it configure it outside of BPMP enviroment: +hekate has a boot storage in the binary that helps it configure it outside of BPMP environment: | Offset / Name | Description | | ----------------------- | ----------------------------------------------------------------- | @@ -188,9 +189,9 @@ hekate has a boot storage in the binary that helps it configure it outside of BP ``` hekate (c) 2018, naehrwert, st4rk. - (c) 2018-2024, CTCaer. + (c) 2018-2025, CTCaer. -Nyx GUI (c) 2019-2024, CTCaer. +Nyx GUI (c) 2019-2025, CTCaer. Thanks to: derrek, nedwill, plutoo, shuffle2, smea, thexyz, yellows8. Greetings to: fincs, hexkyz, SciresM, Shiny Quagsire, WinterMute. diff --git a/bootloader/hos/hos.c b/bootloader/hos/hos.c index a5b06f0..50df7a4 100644 --- a/bootloader/hos/hos.c +++ b/bootloader/hos/hos.c @@ -698,7 +698,7 @@ out: static void _free_launch_components(launch_ctxt_t *ctxt) { // Free the malloc'ed guaranteed addresses. - free(ctxt->fss0); + free(ctxt->pkg3); free(ctxt->keyblob); free(ctxt->pkg1); free(ctxt->pkg2); diff --git a/bootloader/hos/hos.h b/bootloader/hos/hos.h index 879ab0a..0cb695b 100644 --- a/bootloader/hos/hos.h +++ b/bootloader/hos/hos.h @@ -111,8 +111,8 @@ typedef struct _launch_ctxt_t bool stock; bool emummc_forced; - void *fss0; - u32 fss0_hosver; + void *pkg3; + u32 pkg3_hosver; bool patch_krn_proc_id; int ucid; diff --git a/bootloader/hos/hos_config.c b/bootloader/hos/hos_config.c index 67fbbd4..6bfb4a7 100644 --- a/bootloader/hos/hos_config.c +++ b/bootloader/hos/hos_config.c @@ -21,7 +21,7 @@ #include "hos.h" #include "hos_config.h" -#include "fss.h" +#include "pkg3.h" #include //#define DPRINTF(...) gfx_printf(__VA_ARGS__) @@ -255,9 +255,9 @@ static int _config_exo_cal0_writes_enable(launch_ctxt_t *ctxt, const char *value return 1; } -static int _config_fss(launch_ctxt_t *ctxt, const char *value) +static int _config_pkg3(launch_ctxt_t *ctxt, const char *value) { - return parse_fss(ctxt, value); + return parse_pkg3(ctxt, value); } static int _config_exo_fatal_payload(launch_ctxt_t *ctxt, const char *value) @@ -295,7 +295,8 @@ static const cfg_handler_t _config_handlers[] = { { "kernelprocid", _config_kernel_proc_id }, // To override elements from PKG3, it should be set before others. - { "fss0", _config_fss }, + { "pkg3", _config_pkg3 }, + { "fss0", _config_pkg3 }, { "exofatal", _config_exo_fatal_payload}, { "emummcforce", _config_emummc_forced }, diff --git a/bootloader/hos/fss.c b/bootloader/hos/pkg3.c similarity index 63% rename from bootloader/hos/fss.c rename to bootloader/hos/pkg3.c index aa27982..d6d2f3e 100644 --- a/bootloader/hos/fss.c +++ b/bootloader/hos/pkg3.c @@ -1,7 +1,7 @@ /* - * Atmosphère Fusée Secondary Storage (Package3) parser. + * Atmosphère Package 3 parser. * - * Copyright (c) 2019-2024 CTCaer + * Copyright (c) 2019-2025 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -20,7 +20,7 @@ #include -#include "fss.h" +#include "pkg3.h" #include "hos.h" #include "../config.h" #include @@ -33,12 +33,14 @@ extern hekate_config h_cfg; extern bool is_ipl_updated(void *buf, const char *path, bool force); -// FSS0 Magic and Meta header offset. -#define FSS0_MAGIC 0x30535346 -#define FSS0_META_OFFSET 0x4 -#define FSS0_VERSION_0_17_0 0x110000 +#define PKG3_KIP_SKIP_MAX 16 -// FSS0 Content Types. +// PKG3 Magic and Meta header offset. +#define PKG3_MAGIC 0x30535346 // FSS0. +#define PKG3_META_OFFSET 0x4 +#define PKG3_VERSION_0_17_0 0x110000 + +// PKG3 Content Types. #define CNT_TYPE_FSP 0 #define CNT_TYPE_EXO 1 // Exosphere (Secure Monitor). #define CNT_TYPE_WBT 2 // Warmboot (SC7Exit fw). @@ -53,11 +55,11 @@ extern bool is_ipl_updated(void *buf, const char *path, bool force); #define CNT_TYPE_EXF 11 // Exosphere Mariko fatal payload. #define CNT_TYPE_TKG 12 // Tsec Keygen. -// FSS0 Content Flags. +// PKG3 Content Flags. #define CNT_FLAG0_EXPERIMENTAL BIT(0) -// FSS0 Meta Header. -typedef struct _fss_meta_t +// PKG3 Meta Header. +typedef struct _pkg3_meta_t { u32 magic; u32 size; @@ -67,10 +69,10 @@ typedef struct _fss_meta_t u32 hos_ver; u32 version; u32 git_rev; -} fss_meta_t; +} pkg3_meta_t; -// FSS0 Content Header. -typedef struct _fss_content_t +// PKG3 Content Header. +typedef struct _pkg3_content_t { u32 offset; u32 size; @@ -80,9 +82,9 @@ typedef struct _fss_content_t u8 flags2; u32 rsvd1; char name[0x10]; -} fss_content_t; +} pkg3_content_t; -static void _fss_update_r2p() +static void _pkg3_update_r2p() { u8 *r2p_payload = sd_file_read("atmosphere/reboot_payload.bin", NULL); @@ -91,7 +93,7 @@ static void _fss_update_r2p() free(r2p_payload); } -int parse_fss(launch_ctxt_t *ctxt, const char *path) +int parse_pkg3(launch_ctxt_t *ctxt, const char *path) { FIL fp; @@ -108,7 +110,7 @@ int parse_fss(launch_ctxt_t *ctxt, const char *path) if (kv->val[0] == '1') stock = true; - if (!strcmp("fss0experimental", kv->key)) + if (!strcmp("pkg3ex", kv->key)) if (kv->val[0] == '1') experimental = true; } @@ -121,48 +123,48 @@ int parse_fss(launch_ctxt_t *ctxt, const char *path) return 1; #endif - // Try to open FSS0. + // Try to open PKG3. if (f_open(&fp, path, FA_READ) != FR_OK) return 0; - void *fss = malloc(f_size(&fp)); + void *pkg3 = malloc(f_size(&fp)); - // Read first 1024 bytes of the FSS0 file. - f_read(&fp, fss, 1024, NULL); + // Read first 1024 bytes of the PKG3 file. + f_read(&fp, pkg3, 1024, NULL); - // Get FSS0 Meta header offset. - u32 fss_meta_addr = *(u32 *)(fss + FSS0_META_OFFSET); - fss_meta_t *fss_meta = (fss_meta_t *)(fss + fss_meta_addr); + // Get PKG3 Meta header offset. + u32 pkg3_meta_addr = *(u32 *)(pkg3 + PKG3_META_OFFSET); + pkg3_meta_t *pkg3_meta = (pkg3_meta_t *)(pkg3 + pkg3_meta_addr); - // Check if valid FSS0 and parse it. - if (fss_meta->magic == FSS0_MAGIC) + // Check if valid PKG3 and parse it. + if (pkg3_meta->magic == PKG3_MAGIC) { - gfx_printf("Atmosphere %d.%d.%d-%08x via FSS0/PKG3\n" + gfx_printf("Atmosphere %d.%d.%d-%08x via PKG3\n" "Max HOS: %d.%d.%d\n" "Unpacking.. ", - fss_meta->version >> 24, (fss_meta->version >> 16) & 0xFF, (fss_meta->version >> 8) & 0xFF, fss_meta->git_rev, - fss_meta->hos_ver >> 24, (fss_meta->hos_ver >> 16) & 0xFF, (fss_meta->hos_ver >> 8) & 0xFF); + pkg3_meta->version >> 24, (pkg3_meta->version >> 16) & 0xFF, (pkg3_meta->version >> 8) & 0xFF, pkg3_meta->git_rev, + pkg3_meta->hos_ver >> 24, (pkg3_meta->hos_ver >> 16) & 0xFF, (pkg3_meta->hos_ver >> 8) & 0xFF); ctxt->patch_krn_proc_id = true; - ctxt->fss0_hosver = fss_meta->hos_ver; + ctxt->pkg3_hosver = pkg3_meta->hos_ver; - // Parse FSS0 contents. - fss_content_t *curr_fss_cnt = (fss_content_t *)(fss + fss_meta->cnt_off); + // Parse PKG3 contents. + pkg3_content_t *curr_pkg3_cnt = (pkg3_content_t *)(pkg3 + pkg3_meta->cnt_off); void *content; - for (u32 i = 0; i < fss_meta->cnt_count; i++) + for (u32 i = 0; i < pkg3_meta->cnt_count; i++) { - content = (void *)(fss + curr_fss_cnt[i].offset); + content = (void *)(pkg3 + curr_pkg3_cnt[i].offset); // Check if offset is inside limits. - if ((curr_fss_cnt[i].offset + curr_fss_cnt[i].size) > fss_meta->size) + if ((curr_pkg3_cnt[i].offset + curr_pkg3_cnt[i].size) > pkg3_meta->size) continue; // If content is experimental and experimental config is not enabled, skip it. - if ((curr_fss_cnt[i].flags0 & CNT_FLAG0_EXPERIMENTAL) && !experimental) + if ((curr_pkg3_cnt[i].flags0 & CNT_FLAG0_EXPERIMENTAL) && !experimental) continue; // Prepare content. - switch (curr_fss_cnt[i].type) + switch (curr_pkg3_cnt[i].type) { case CNT_TYPE_KIP: if (stock) @@ -170,30 +172,30 @@ int parse_fss(launch_ctxt_t *ctxt, const char *path) merge_kip_t *mkip1 = (merge_kip_t *)malloc(sizeof(merge_kip_t)); mkip1->kip1 = content; list_append(&ctxt->kip1_list, &mkip1->link); - DPRINTF("Loaded %s.kip1 from FSS0 (size %08X)\n", curr_fss_cnt[i].name, curr_fss_cnt[i].size); + DPRINTF("Loaded %s.kip1 from PKG3 (size %08X)\n", curr_pkg3_cnt[i].name, curr_pkg3_cnt[i].size); break; case CNT_TYPE_KRN: if (stock) continue; - ctxt->kernel_size = curr_fss_cnt[i].size; + ctxt->kernel_size = curr_pkg3_cnt[i].size; ctxt->kernel = content; break; case CNT_TYPE_EXO: - ctxt->secmon_size = curr_fss_cnt[i].size; + ctxt->secmon_size = curr_pkg3_cnt[i].size; ctxt->secmon = content; break; case CNT_TYPE_EXF: - ctxt->exofatal_size = curr_fss_cnt[i].size; + ctxt->exofatal_size = curr_pkg3_cnt[i].size; ctxt->exofatal = content; break; case CNT_TYPE_WBT: if (h_cfg.t210b01) continue; - ctxt->warmboot_size = curr_fss_cnt[i].size; + ctxt->warmboot_size = curr_pkg3_cnt[i].size; ctxt->warmboot = content; break; @@ -202,23 +204,24 @@ int parse_fss(launch_ctxt_t *ctxt, const char *path) } // Load content to launch context. - f_lseek(&fp, curr_fss_cnt[i].offset); - f_read(&fp, content, curr_fss_cnt[i].size, NULL); + f_lseek(&fp, curr_pkg3_cnt[i].offset); + f_read(&fp, content, curr_pkg3_cnt[i].size, NULL); } gfx_printf("Done!\n"); f_close(&fp); - ctxt->fss0 = fss; + ctxt->pkg3 = pkg3; // Update r2p if needed. - _fss_update_r2p(); + _pkg3_update_r2p(); return 1; } + // Failed. Close and free all. f_close(&fp); - free(fss); + free(pkg3); return 0; } diff --git a/bootloader/hos/fss.h b/bootloader/hos/pkg3.h similarity index 88% rename from bootloader/hos/fss.h rename to bootloader/hos/pkg3.h index e7e23bb..8d230ab 100644 --- a/bootloader/hos/fss.h +++ b/bootloader/hos/pkg3.h @@ -14,11 +14,11 @@ * along with this program. If not, see . */ -#ifndef _FSS_H_ -#define _FSS_H_ +#ifndef _PKG3_H_ +#define _PKG3_H_ #include "hos.h" -int parse_fss(launch_ctxt_t *ctxt, const char *path); +int parse_pkg3(launch_ctxt_t *ctxt, const char *path); #endif diff --git a/res/hekate_ipl_template.ini b/res/hekate_ipl_template.ini index b717c44..fcb886a 100644 --- a/res/hekate_ipl_template.ini +++ b/res/hekate_ipl_template.ini @@ -9,10 +9,13 @@ autonogc=1 updater2p=1 bootprotect=0 +# Only include above what you want to change from defaults. +# config.c in bootloader and Nyx have all the defaults. + {-------- Stock -------} [Stock] -fss0=atmosphere/package3 +pkg3=atmosphere/package3 stock=1 emummc_force_disable=1 @@ -26,7 +29,7 @@ emummc_force_disable=1 {-- Custom Firmwares --} [Atmo Vanilla] -fss0=atmosphere/package3 +pkg3=atmosphere/package3 kip1=atmosphere/kips/* # Note: @@ -36,11 +39,11 @@ kip1=atmosphere/kips/* [Atmo EMU] -fss0=atmosphere/package3 +pkg3=atmosphere/package3 emummcforce=1 [Atmo SYS] -fss0=atmosphere/package3 +pkg3=atmosphere/package3 emummc_force_disable=1 # Note: @@ -55,7 +58,7 @@ emummc_force_disable=1 [Atmo EMU2] -fss0=atmosphere/package3 +pkg3=atmosphere/package3 emupath=emuMMC/SD02 emummcforce=1 @@ -68,26 +71,26 @@ emummcforce=1 [Atmo with extra kips] -fss0=atmosphere/package3 +pkg3=atmosphere/package3 kip1=cfw/mods/mods_extra/* kip1=cfw/mods/mods_extra/single/extra.kip # Note: -# The above can be used with any fss0 entry. Like the ones above. -# You can even override atmosphere (fss0) kips with this. +# The above can be used with any pkg3 entry. Like the ones above. +# You can even override atmosphere (pkg3) kips with this. # The wildcard '*' like above can be used to load all kips from a selected directory. {-- Custom Firmwares Old methods --} -[CFW FSS0 extra kips & patches] -fss0=atmosphere/package3 +[CFW PKG3 extra kips & patches] +pkg3=atmosphere/package3 kip1patch=name_of_patch kip1=cfw/mods/mods_extra/* kip1=cfw/mods/mods_extra/single/extra.kip # Note: # Both options for kip1 can be used. Wildcard and single. -# You can override kips loaded from FSS0/PKG3 if you define them after the fss0 key. +# You can override kips loaded from PKG3/FSS0 if you define them after the pkg3 key. # If kip1 patch resides in patches.ini and that file OR the patch for # current HOS version does not exist, it will error out. @@ -106,7 +109,7 @@ atmosphere=1 # Note: # All kips defined method. This can be changed to what is below also. -# atmosphere=1 key is IMPORTANT when no FFS0 is defined. +# atmosphere=1 key is IMPORTANT when no PKG3/FSS0 is defined. From 0c8cd08b55def9d63fcf487b69f03bc540cefb1b Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 30 Apr 2025 08:30:57 +0300 Subject: [PATCH 284/308] hos: add package3 kip skip option By using `pkg3kip1skip`, any kip internal name that fully matches will be skipped from being loaded and the stock one will be used. Multiple can be set by setting more lines with it or by using a comma separator. Only for advanced users. --- bootloader/hos/pkg3.c | 49 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/bootloader/hos/pkg3.c b/bootloader/hos/pkg3.c index d6d2f3e..ce53583 100644 --- a/bootloader/hos/pkg3.c +++ b/bootloader/hos/pkg3.c @@ -93,10 +93,44 @@ static void _pkg3_update_r2p() free(r2p_payload); } +static int _pkg3_kip1_skip(char ***pkg3_kip1_skip, u32 *pkg3_kip1_skip_num, char *value) +{ + int len = strlen(value); + if (!len || (*pkg3_kip1_skip_num) >= PKG3_KIP_SKIP_MAX) + return 0; + + // Allocate pointer list memory. + if (!(*pkg3_kip1_skip)) + (*pkg3_kip1_skip) = calloc(PKG3_KIP_SKIP_MAX, sizeof(char *)); + + // Set first kip name. + (*pkg3_kip1_skip)[(*pkg3_kip1_skip_num)++] = value; + + // Check if more names are set separated by comma. + for (char *c = value; *c != 0; c++) + { + if (*c == ',') + { + *c = 0; // Null termination. + + // Set next kip name to the list. + (*pkg3_kip1_skip)[(*pkg3_kip1_skip_num)++] = c + 1; + + if ((*pkg3_kip1_skip_num) >= PKG3_KIP_SKIP_MAX) + return 0; + } + } + + return 1; +} + int parse_pkg3(launch_ctxt_t *ctxt, const char *path) { FIL fp; + char **pkg3_kip1_skip = NULL; + u32 pkg3_kip1_skip_num = 0; + bool stock = false; bool experimental = false; @@ -113,6 +147,9 @@ int parse_pkg3(launch_ctxt_t *ctxt, const char *path) if (!strcmp("pkg3ex", kv->key)) if (kv->val[0] == '1') experimental = true; + + if (!strcmp("pkg3kip1skip", kv->key)) + _pkg3_kip1_skip(&pkg3_kip1_skip, &pkg3_kip1_skip_num, kv->val); } #ifdef HOS_MARIKO_STOCK_SECMON @@ -169,6 +206,14 @@ int parse_pkg3(launch_ctxt_t *ctxt, const char *path) case CNT_TYPE_KIP: if (stock) continue; + + for (u32 k = 0; k < pkg3_kip1_skip_num; k++) { + if (!strcmp(curr_pkg3_cnt[i].name, pkg3_kip1_skip[k])) { + gfx_printf("Skipped %s.kip1 from PKG3\n", curr_pkg3_cnt[i].name); + continue; + } + } + merge_kip_t *mkip1 = (merge_kip_t *)malloc(sizeof(merge_kip_t)); mkip1->kip1 = content; list_append(&ctxt->kip1_list, &mkip1->link); @@ -216,11 +261,15 @@ int parse_pkg3(launch_ctxt_t *ctxt, const char *path) // Update r2p if needed. _pkg3_update_r2p(); + free(pkg3_kip1_skip); + return 1; } // Failed. Close and free all. f_close(&fp); + + free(pkg3_kip1_skip); free(pkg3); return 0; From 9f29f93078574ece0619986ac67d4a1e0a2744ad Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 30 Apr 2025 08:33:08 +0300 Subject: [PATCH 285/308] nyx: emummc: guard for pointer arithmetics And also explain what type of backup fails on errors. --- nyx/nyx_gui/frontend/fe_emmc_tools.c | 30 ++++++++++++++++++---------- 1 file changed, 20 insertions(+), 10 deletions(-) diff --git a/nyx/nyx_gui/frontend/fe_emmc_tools.c b/nyx/nyx_gui/frontend/fe_emmc_tools.c index 06048aa..2264f8a 100644 --- a/nyx/nyx_gui/frontend/fe_emmc_tools.c +++ b/nyx/nyx_gui/frontend/fe_emmc_tools.c @@ -53,19 +53,19 @@ static void _get_valid_partition(u32 *sector_start, u32 *sector_size, u32 *part_ *sector_start = mbr->partitions[i].start_sct; u8 type = mbr->partitions[i].type; u32 sector_size_safe = backup ? 0x400000 : (*sector_size) + 0x8000; // 2GB min safe size for backup. - if ((curr_part_size >= sector_size_safe) && *sector_start && type != 0x83 && (!backup || type == 0xE0)) + if ((curr_part_size >= sector_size_safe) && (*sector_start) && type != 0x83 && (!backup || type == 0xE0)) { if (backup) { u8 gpt_check[SD_BLOCKSIZE] = { 0 }; - sdmmc_storage_read(&sd_storage, *sector_start + 0xC001, 1, gpt_check); + sdmmc_storage_read(&sd_storage, (*sector_start) + 0xC001, 1, gpt_check); if (!memcmp(gpt_check, "EFI PART", 8)) { *sector_size = curr_part_size; - *sector_start = *sector_start + 0x8000; + *sector_start = (*sector_start) + 0x8000; break; } - sdmmc_storage_read(&sd_storage, *sector_start + 0x4001, 1, gpt_check); + sdmmc_storage_read(&sd_storage, (*sector_start) + 0x4001, 1, gpt_check); if (!memcmp(gpt_check, "EFI PART", 8)) { *sector_size = curr_part_size; @@ -91,7 +91,7 @@ static void _get_valid_partition(u32 *sector_start, u32 *sector_size, u32 *part_ if (backup && *part_idx && *sector_size) { gpt_t *gpt = (gpt_t *)zalloc(sizeof(gpt_t)); - sdmmc_storage_read(&sd_storage, *sector_start + 0x4001, 1, gpt); + sdmmc_storage_read(&sd_storage, (*sector_start) + 0x4001, 1, gpt); u32 new_size = gpt->header.alt_lba + 1; if (*sector_size > new_size) @@ -102,7 +102,7 @@ static void _get_valid_partition(u32 *sector_start, u32 *sector_size, u32 *part_ free(gpt); } else if (!backup && *part_idx) - *sector_start = *sector_start + 0x8000; + *sector_start = (*sector_start) + 0x8000; } static lv_obj_t *create_mbox_text(const char *text, bool button_ok) @@ -622,10 +622,20 @@ static int _dump_emmc_part(emmc_tool_gui_t *gui, char *sd_path, int active_part, while (res_read) { - s_printf(gui->txt_buf, - "\n#FFDD00 Error reading %d blocks @ LBA %08X,#\n" - "#FFDD00 from eMMC (try %d). #", - num, lba_curr, ++retryCount); + if (!gui->raw_emummc) + { + s_printf(gui->txt_buf, + "\n#FFDD00 Error reading %d blocks @ LBA %08X,#\n" + "#FFDD00 from eMMC (try %d). #", + num, lba_curr, ++retryCount); + } + else + { + s_printf(gui->txt_buf, + "\n#FFDD00 Error reading %d blocks @ LBA %08X,#\n" + "#FFDD00 from emuMMC @ %08X (try %d). #", + num, lba_curr + sd_sector_off, lba_curr, ++retryCount); + } lv_label_ins_text(gui->label_log, LV_LABEL_POS_LAST, gui->txt_buf); manual_system_maintenance(true); From 4fff3461507f2cd9a0a2142ee60de51326fd2b16 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 30 Apr 2025 08:38:58 +0300 Subject: [PATCH 286/308] nyx: use the now exported window custom action --- nyx/nyx_gui/frontend/gui_emummc_tools.c | 3 +-- nyx/nyx_gui/frontend/gui_options.c | 6 ++---- 2 files changed, 3 insertions(+), 6 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_emummc_tools.c b/nyx/nyx_gui/frontend/gui_emummc_tools.c index dfc5f55..4182b22 100644 --- a/nyx/nyx_gui/frontend/gui_emummc_tools.c +++ b/nyx/nyx_gui/frontend/gui_emummc_tools.c @@ -42,8 +42,7 @@ static lv_res_t (*emummc_tools)(lv_obj_t *btn); static lv_res_t _action_emummc_window_close(lv_obj_t *btn) { - lv_win_close_action(btn); - close_btn = NULL; + nyx_win_close_action_custom(btn); // Delete and relaunch main emuMMC window. lv_obj_del(emummc_manage_window); diff --git a/nyx/nyx_gui/frontend/gui_options.c b/nyx/nyx_gui/frontend/gui_options.c index 66e4014..999b221 100644 --- a/nyx/nyx_gui/frontend/gui_options.c +++ b/nyx/nyx_gui/frontend/gui_options.c @@ -1168,13 +1168,11 @@ static lv_res_t _action_win_nyx_options_close(lv_obj_t *btn) lv_obj_set_opa_scale(status_bar.mid, LV_OPA_0); lv_obj_set_click(status_bar.mid, false); - lv_win_close_action(btn); - - close_btn = NULL; + lv_res_t res = nyx_win_close_action_custom(btn); _check_nyx_changes(); - return LV_RES_INV; + return res; } lv_res_t create_win_nyx_options(lv_obj_t *parrent_btn) From 51512a30bd9ba206e2fea0490310af4ecfec0a13 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 30 Apr 2025 08:40:25 +0300 Subject: [PATCH 287/308] nyx: improve Nyx reload and auto reload Check that Nyx exists and also improve detection when SD is removed. --- nyx/nyx_gui/frontend/gui.c | 44 ++++++++++++++++++++++-------- nyx/nyx_gui/frontend/gui_options.c | 2 +- nyx/nyx_gui/nyx.c | 2 +- 3 files changed, 35 insertions(+), 13 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui.c b/nyx/nyx_gui/frontend/gui.c index b7be9f3..570deed 100644 --- a/nyx/nyx_gui/frontend/gui.c +++ b/nyx/nyx_gui/frontend/gui.c @@ -38,7 +38,7 @@ extern volatile nyx_storage_t *nyx_str; extern lv_res_t launch_payload(lv_obj_t *list); static bool disp_init_done = false; -static bool do_reload = false; +static bool do_auto_reload = false; lv_style_t hint_small_style; lv_style_t hint_small_style_white; @@ -200,8 +200,8 @@ static void _save_fb_to_bmp() if (get_tmr_ms() < timer) return; - if (do_reload) - return; + if (do_auto_reload) + goto exit; // Invalidate data. bpmp_mmu_maintenance(BPMP_MMU_MAINT_INVALID_WAY, false); @@ -304,6 +304,7 @@ static void _save_fb_to_bmp() manual_system_maintenance(true); lv_mbox_start_auto_close(mbox, 4000); +exit: // Set timer to 2s. timer = get_tmr_ms() + 2000; } @@ -928,8 +929,27 @@ static void _launch_hos(u8 autoboot, u8 autoboot_list) (*main_ptr)(); } -void reload_nyx() +void reload_nyx(lv_obj_t *obj, bool force) { + if (!force) + { + sd_mount(); + + // Check that Nyx still exists. + if (f_stat("bootloader/sys/nyx.bin", NULL)) + { + sd_unmount(); + + // Remove lvgl object in case of being invoked from a window. + if (obj) + lv_obj_del(obj); + + do_auto_reload = false; + + return; + } + } + b_cfg->boot_cfg = BOOT_CFG_AUTOBOOT_EN; b_cfg->autoboot = 0; b_cfg->autoboot_list = 0; @@ -947,7 +967,7 @@ void reload_nyx() static lv_res_t reload_action(lv_obj_t *btns, const char *txt) { if (!lv_btnm_get_pressed(btns)) - reload_nyx(); + reload_nyx(NULL, false); return mbox_action(btns, txt); } @@ -969,7 +989,7 @@ static lv_res_t _removed_sd_action(lv_obj_t *btns, const char *txt) break; case 2: sd_end(); - do_reload = false; + do_auto_reload = false; break; } @@ -978,12 +998,14 @@ static lv_res_t _removed_sd_action(lv_obj_t *btns, const char *txt) static void _check_sd_card_removed(void *params) { + static lv_obj_t *dark_bg = NULL; + // The following checks if SDMMC_1 is initialized. // If yes and card was removed, shows a message box, // that will reload Nyx, when the card is inserted again. - if (!do_reload && sd_get_card_removed()) + if (!do_auto_reload && sd_get_card_removed()) { - lv_obj_t *dark_bg = lv_obj_create(lv_scr_act(), NULL); + dark_bg = lv_obj_create(lv_scr_act(), NULL); lv_obj_set_style(dark_bg, &mbox_darken); lv_obj_set_size(dark_bg, LV_HOR_RES, LV_VER_RES); @@ -999,12 +1021,12 @@ static void _check_sd_card_removed(void *params) lv_obj_align(mbox, NULL, LV_ALIGN_CENTER, 0, 0); lv_obj_set_top(mbox, true); - do_reload = true; + do_auto_reload = true; } // If in reload state and card was inserted, reload nyx. - if (do_reload && !sd_get_card_removed()) - reload_nyx(); + if (do_auto_reload && !sd_get_card_removed()) + reload_nyx(dark_bg, false); } lv_task_t *task_emmc_errors; diff --git a/nyx/nyx_gui/frontend/gui_options.c b/nyx/nyx_gui/frontend/gui_options.c index 999b221..63b098d 100644 --- a/nyx/nyx_gui/frontend/gui_options.c +++ b/nyx/nyx_gui/frontend/gui_options.c @@ -432,7 +432,7 @@ static lv_res_t _save_theme_color_action(lv_obj_t *btn) // Save nyx config. create_nyx_config_entry(true); - reload_nyx(); + reload_nyx(NULL, false); return LV_RES_OK; } diff --git a/nyx/nyx_gui/nyx.c b/nyx/nyx_gui/nyx.c index 86d90cd..05275a2 100644 --- a/nyx/nyx_gui/nyx.c +++ b/nyx/nyx_gui/nyx.c @@ -402,7 +402,7 @@ error_occured: msleep(1000); btn_wait(); - reload_nyx(); + reload_nyx(NULL, true); } } From a1b13214bd5056d50e7546e5e03c0881d55182f9 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 30 Apr 2025 08:40:55 +0300 Subject: [PATCH 288/308] nyx: partition: correct android reserved size --- nyx/nyx_gui/frontend/gui_tools_partition_manager.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/nyx/nyx_gui/frontend/gui_tools_partition_manager.c b/nyx/nyx_gui/frontend/gui_tools_partition_manager.c index fc1572d..3ea91cb 100644 --- a/nyx/nyx_gui/frontend/gui_tools_partition_manager.c +++ b/nyx/nyx_gui/frontend/gui_tools_partition_manager.c @@ -2691,7 +2691,7 @@ lv_res_t create_window_partition_manager(lv_obj_t *btn) // Create Android size slider. lv_obj_t *slider_and = lv_slider_create(h1, NULL); lv_obj_set_size(slider_and, LV_DPI * 7, LV_DPI / 3); - lv_slider_set_range(slider_and, 0, (part_info.total_sct - extra_sct) / SECTORS_PER_GB - 4); // Subtract android reserved size. + lv_slider_set_range(slider_and, 0, (part_info.total_sct - extra_sct) / SECTORS_PER_GB - (ANDROID_SYSTEM_SIZE_MB / 1024)); // Subtract android reserved size. lv_slider_set_value(slider_and, 0); lv_slider_set_style(slider_and, LV_SLIDER_STYLE_BG, &bar_and_bg); lv_slider_set_style(slider_and, LV_SLIDER_STYLE_INDIC, &bar_and_ind); From 9e5860e00b23954c0b3869ab0bddc5c1f2adba1a Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 30 Apr 2025 08:42:00 +0300 Subject: [PATCH 289/308] nyx: update clock min year and about to 2025 --- nyx/nyx_gui/frontend/gui.c | 4 ++-- nyx/nyx_gui/frontend/gui_options.c | 6 +++--- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui.c b/nyx/nyx_gui/frontend/gui.c index 570deed..83c68cc 100644 --- a/nyx/nyx_gui/frontend/gui.c +++ b/nyx/nyx_gui/frontend/gui.c @@ -1254,9 +1254,9 @@ static void _create_tab_about(lv_theme_t * th, lv_obj_t * parent) lv_label_set_recolor(lbl_credits, true); lv_label_set_static_text(lbl_credits, "#C7EA46 hekate# (c) 2018, #C7EA46 naehrwert#, #C7EA46 st4rk#\n" - " (c) 2018-2024, #C7EA46 CTCaer#\n" + " (c) 2018-2025, #C7EA46 CTCaer#\n" "\n" - "#C7EA46 Nyx# (c) 2019-2024, #C7EA46 CTCaer#\n" + "#C7EA46 Nyx# (c) 2019-2025, #C7EA46 CTCaer#\n" "\n" "Thanks to: #00CCFF derrek, nedwill, plutoo, #\n" " #00CCFF shuffle2, smea, thexyz, yellows8 #\n" diff --git a/nyx/nyx_gui/frontend/gui_options.c b/nyx/nyx_gui/frontend/gui_options.c index 63b098d..15feeac 100644 --- a/nyx/nyx_gui/frontend/gui_options.c +++ b/nyx/nyx_gui/frontend/gui_options.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2024 CTCaer + * Copyright (c) 2018-2025 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -24,9 +24,9 @@ #include #include -#define CLOCK_MIN_YEAR 2024 +#define CLOCK_MIN_YEAR 2025 #define CLOCK_MAX_YEAR (CLOCK_MIN_YEAR + 10) -#define CLOCK_YEARLIST "2024\n2025\n2026\n2027\n2028\n2029\n2030\n2031\n2032\n2033\n2034" +#define CLOCK_YEARLIST "2025\n2026\n2027\n2028\n2029\n2030\n2031\n2032\n2033\n2034\n2035" extern hekate_config h_cfg; extern nyx_config n_cfg; From 06f0d2b83fef955aa4ceeaa7a2eb995576f7ff8b Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 30 Apr 2025 08:43:26 +0300 Subject: [PATCH 290/308] nyx: update some messaging --- nyx/nyx_gui/frontend/gui.c | 14 +++++++------- nyx/nyx_gui/frontend/gui_info.c | 4 ++-- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui.c b/nyx/nyx_gui/frontend/gui.c index 83c68cc..47bef3b 100644 --- a/nyx/nyx_gui/frontend/gui.c +++ b/nyx/nyx_gui/frontend/gui.c @@ -816,7 +816,7 @@ bool nyx_emmc_check_battery_enough() return true; } -static void _nyx_sd_card_issues(void *param) +static void _nyx_sd_card_issues_warning(void *param) { lv_obj_t *dark_bg = lv_obj_create(lv_scr_act(), NULL); lv_obj_set_style(dark_bg, &mbox_darken); @@ -827,7 +827,7 @@ static void _nyx_sd_card_issues(void *param) lv_mbox_set_recolor_text(mbox, true); lv_mbox_set_text(mbox, - "#FF8000 SD Card Issues Check#\n\n" + "#FF8000 SD Card Issues Warning#\n\n" "#FFDD00 The SD Card is initialized in 1-bit mode!#\n" "#FFDD00 This might mean detached or broken connector!#\n\n" "You might want to check\n#C7EA46 Console Info# -> #C7EA46 microSD#"); @@ -1030,7 +1030,7 @@ static void _check_sd_card_removed(void *params) } lv_task_t *task_emmc_errors; -static void _nyx_emmc_issues(void *params) +static void _nyx_emmc_issues_warning(void *params) { if (emmc_get_mode() < EMMC_MMC_HS400) { @@ -1046,8 +1046,8 @@ static void _nyx_emmc_issues(void *params) lv_mbox_set_recolor_text(mbox, true); lv_mbox_set_text(mbox, - "#FF8000 eMMC Issues Check#\n\n" - "#FFDD00 Your eMMC is initialized in slower mode!#\n" + "#FF8000 eMMC Issues Warning#\n\n" + "#FFDD00 Your eMMC is initialized in a slower mode!#\n" "#FFDD00 This might mean hardware issues!#\n\n" "You might want to check\n#C7EA46 Console Info# -> #C7EA46 eMMC#"); @@ -2377,7 +2377,7 @@ static void _nyx_main_menu(lv_theme_t * th) lv_task_create(_check_sd_card_removed, 2000, LV_TASK_PRIO_LOWEST, NULL); - task_emmc_errors = lv_task_create(_nyx_emmc_issues, 2000, LV_TASK_PRIO_LOWEST, NULL); + task_emmc_errors = lv_task_create(_nyx_emmc_issues_warning, 2000, LV_TASK_PRIO_LOWEST, NULL); lv_task_ready(task_emmc_errors); // Create top level global line separators. @@ -2477,7 +2477,7 @@ void nyx_load_and_run() // Check if sd card issues. if (sd_get_mode() == SD_1BIT_HS25) { - lv_task_t *task_run_sd_errors = lv_task_create(_nyx_sd_card_issues, LV_TASK_ONESHOT, LV_TASK_PRIO_LOWEST, NULL); + lv_task_t *task_run_sd_errors = lv_task_create(_nyx_sd_card_issues_warning, LV_TASK_ONESHOT, LV_TASK_PRIO_LOWEST, NULL); lv_task_once(task_run_sd_errors); } diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index 13ef658..6c3123c 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -1916,8 +1916,8 @@ out_error: lv_mbox_set_recolor_text(mbox, true); s_printf(txt_buf, - "#FF8000 eMMC Issues Check#\n\n" - "#FFDD00 Your eMMC is initialized in slower mode,#\n" + "#FF8000 eMMC Issues Warning#\n\n" + "#FFDD00 Your eMMC is initialized in a slower mode,#\n" "#FFDD00 or init/read/write errors occurred!#\n" "#FFDD00 This might mean hardware issues!#\n\n" "#00DDFF Bus Speed:# %d MB/s\n\n" From ef9a48033d1496a902b71109fdc217e866b6b344 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 30 Apr 2025 08:44:27 +0300 Subject: [PATCH 291/308] nyx: switch to IRAM for stack --- nyx/nyx_gui/start.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/nyx/nyx_gui/start.S b/nyx/nyx_gui/start.S index 0d1eebf..c2333f7 100644 --- a/nyx/nyx_gui/start.S +++ b/nyx/nyx_gui/start.S @@ -61,7 +61,7 @@ _reloc_ipl: _real_start: /* We place our stack in SDRAM. */ - LDR SP, =0x83100000 + LDR SP, =0x4003F000 LDR R0, =__bss_start EOR R1, R1, R1 LDR R2, =__bss_end From ed816a44c9b44d78e3a4f88ead04c7402b112623 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 19 Jun 2024 21:54:14 +0300 Subject: [PATCH 292/308] hos: secmon exo: fix system_settings.ini parsing A previous change guarded the setting with exosphere.ini parsing succeeding. Correct this, so it always gets parsed. --- bootloader/hos/secmon_exo.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/bootloader/hos/secmon_exo.c b/bootloader/hos/secmon_exo.c index f0b04ee..3b337a8 100644 --- a/bootloader/hos/secmon_exo.c +++ b/bootloader/hos/secmon_exo.c @@ -241,29 +241,29 @@ void config_exosphere(launch_ctxt_t *ctxt, u32 warmboot_base) } break; } + } - // Parse usb mtim settings. Avoid parsing if it's overridden. - if (!ctxt->exo_ctx.usb3_force) + // Parse usb mtim settings. Avoid parsing if it's overridden. + if (!ctxt->exo_ctx.usb3_force) + { + LIST_INIT(ini_sys_sections); + if (ini_parse(&ini_sys_sections, "atmosphere/config/system_settings.ini", false)) { - LIST_INIT(ini_sys_sections); - if (ini_parse(&ini_sys_sections, "atmosphere/config/system_settings.ini", false)) + LIST_FOREACH_ENTRY(ini_sec_t, ini_sec, &ini_sys_sections, link) { - LIST_FOREACH_ENTRY(ini_sec_t, ini_sec, &ini_sys_sections, link) - { - // Only parse usb section. - if (!(ini_sec->type == INI_CHOICE) || strcmp(ini_sec->name, "usb")) - continue; + // Only parse usb section. + if (!(ini_sec->type == INI_CHOICE) || strcmp(ini_sec->name, "usb")) + continue; - LIST_FOREACH_ENTRY(ini_kv_t, kv, &ini_sec->kvs, link) + LIST_FOREACH_ENTRY(ini_kv_t, kv, &ini_sec->kvs, link) + { + if (!strcmp("usb30_force_enabled", kv->key)) { - if (!strcmp("usb30_force_enabled", kv->key)) - { - usb3_force = !strcmp("u8!0x1", kv->val); - break; // Only parse usb30_force_enabled key. - } + usb3_force = !strcmp("u8!0x1", kv->val); + break; // Only parse usb30_force_enabled key. } - break; } + break; } } } From 16428c259cbd948b4e5257d910cb6a874df3ee83 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 30 Apr 2025 08:55:38 +0300 Subject: [PATCH 293/308] hos: secmon exo: always set private debug mode It should always be enabled for CFW mode. --- bootloader/hos/secmon_exo.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/bootloader/hos/secmon_exo.c b/bootloader/hos/secmon_exo.c index 3b337a8..8242113 100644 --- a/bootloader/hos/secmon_exo.c +++ b/bootloader/hos/secmon_exo.c @@ -269,8 +269,8 @@ void config_exosphere(launch_ctxt_t *ctxt, u32 warmboot_base) } } - // To avoid problems, make private debug mode always on if not semi-stock. - if (!ctxt->stock || (emu_cfg.enabled && !h_cfg.emummc_force_disable)) + // Private debug mode always on for CFW mode. + if (!ctxt->stock) exo_flags |= EXO_FLAG_DBG_PRIV; // Enable user debug. From 09818944168ca3c182361e89bf7434fa8bf73346 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 30 Apr 2025 08:58:26 +0300 Subject: [PATCH 294/308] Enable type limits warning --- Makefile | 8 ++++---- nyx/Makefile | 6 +++--- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/Makefile b/Makefile index dd7b786..0f39e64 100755 --- a/Makefile +++ b/Makefile @@ -76,15 +76,15 @@ CUSTOMDEFINES += -DGFX_INC=$(GFX_INC) -DFFCFG_INC=$(FFCFG_INC) # UART Logging: Max baudrate 12.5M. # DEBUG_UART_PORT - 0: UART_A, 1: UART_B, 2: UART_C. -#CUSTOMDEFINES += -DDEBUG_UART_BAUDRATE=115200 -DDEBUG_UART_INVERT=0 -DDEBUG_UART_PORT=0 +#CUSTOMDEFINES += -DDEBUG_UART_BAUDRATE=115200 -DDEBUG_UART_INVERT=0 -DDEBUG_UART_PORT=1 #TODO: Considering reinstating some of these when pointer warnings have been fixed. -WARNINGS := -Wall -Wsign-compare -Wno-array-bounds -Wno-stringop-overread -Wno-stringop-overflow +WARNINGS := -Wall -Wsign-compare -Wtype-limits -Wno-array-bounds -Wno-stringop-overread -Wno-stringop-overflow #-fno-delete-null-pointer-checks #-Wstack-usage=byte-size -fstack-usage -ARCH := -march=armv4t -mtune=arm7tdmi -mthumb -mthumb-interwork -CFLAGS = $(ARCH) -O2 -g -gdwarf-4 -nostdlib -ffunction-sections -fdata-sections -fomit-frame-pointer -fno-inline -std=gnu11 $(WARNINGS) $(CUSTOMDEFINES) +ARCH := -march=armv4t -mtune=arm7tdmi -mthumb -mthumb-interwork $(WARNINGS) +CFLAGS = $(ARCH) -O2 -g -gdwarf-4 -nostdlib -ffunction-sections -fdata-sections -fomit-frame-pointer -fno-inline -std=gnu11 $(CUSTOMDEFINES) LDFLAGS = $(ARCH) -nostartfiles -lgcc -Wl,--nmagic,--gc-sections -Xlinker --defsym=IPL_LOAD_ADDR=$(IPL_LOAD_ADDR) MODULEDIRS := $(wildcard modules/*) diff --git a/nyx/Makefile b/nyx/Makefile index af7ab34..61b9b53 100644 --- a/nyx/Makefile +++ b/nyx/Makefile @@ -93,12 +93,12 @@ CUSTOMDEFINES += -DGFX_INC=$(GFX_INC) -DFFCFG_INC=$(FFCFG_INC) #CUSTOMDEFINES += -DDEBUG_UART_LV_LOG #TODO: Considering reinstating some of these when pointer warnings have been fixed. -WARNINGS := -Wall -Wsign-compare -Wno-array-bounds -Wno-stringop-overread -Wno-stringop-overflow +WARNINGS := -Wall -Wsign-compare -Wtype-limits -Wno-array-bounds -Wno-stringop-overread -Wno-stringop-overflow #-fno-delete-null-pointer-checks #-Wstack-usage=byte-size -fstack-usage -ARCH := -march=armv4t -mtune=arm7tdmi -mthumb-interwork -CFLAGS = $(ARCH) -O2 -g -gdwarf-4 -nostdlib -ffunction-sections -fdata-sections -fomit-frame-pointer -std=gnu11 $(WARNINGS) $(CUSTOMDEFINES) +ARCH := -march=armv4t -mtune=arm7tdmi -mthumb-interwork $(WARNINGS) +CFLAGS = $(ARCH) -O2 -g -gdwarf-4 -nostdlib -ffunction-sections -fdata-sections -fomit-frame-pointer -std=gnu11 $(CUSTOMDEFINES) LDFLAGS = $(ARCH) -nostartfiles -lgcc -Wl,--nmagic,--gc-sections -Xlinker --defsym=NYX_LOAD_ADDR=$(NYX_LOAD_ADDR) ################################################################################ From 01b58760103b5ac39a31df08aa5bb1a1128a2e90 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 30 Apr 2025 08:58:49 +0300 Subject: [PATCH 295/308] Add readme info about pkg3kip1skip --- README.md | 1 + 1 file changed, 1 insertion(+) diff --git a/README.md b/README.md index a2ff9f3..5e144c8 100644 --- a/README.md +++ b/README.md @@ -101,6 +101,7 @@ There are four possible type of entries. "**[ ]**": Boot entry, "**{ }**": Capti | pkg3={FILE path} | Takes an Atmosphere `package3` binary and `extracts` all needed parts from it. kips, exosphere, warmboot and mesophere. | | fss0={FILE path} | Same as above. Deprecated! | | pkg3ex=1 | Enables loading of experimental content from a PKG3/FSS0 storage | +| pkg3kip1skip={KIP name} | Skips loading a kip from `pkg3`/`fss0`. Specify with multiple lines and/or in one line with `,` as separator. | | exofatal={FILE path} | Replaces the exosphere fatal binary for Mariko | | ---------------------- | ---------------------------------------------------------- | | kip1patch=patchname | Enables a kip1 patch. Specify with multiple lines and/or in one line with `,` as separator. If actual patch is not found, a warning will show up | From f3b2d077e3d998a40fc696783f02e1774b953335 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 30 Apr 2025 09:12:39 +0300 Subject: [PATCH 296/308] pkg3: actually skip if instructed --- bootloader/hos/pkg3.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/bootloader/hos/pkg3.c b/bootloader/hos/pkg3.c index ce53583..6752063 100644 --- a/bootloader/hos/pkg3.c +++ b/bootloader/hos/pkg3.c @@ -207,12 +207,18 @@ int parse_pkg3(launch_ctxt_t *ctxt, const char *path) if (stock) continue; - for (u32 k = 0; k < pkg3_kip1_skip_num; k++) { - if (!strcmp(curr_pkg3_cnt[i].name, pkg3_kip1_skip[k])) { + bool should_skip = false; + for (u32 k = 0; k < pkg3_kip1_skip_num; k++) + { + if (!strcmp(curr_pkg3_cnt[i].name, pkg3_kip1_skip[k])) + { gfx_printf("Skipped %s.kip1 from PKG3\n", curr_pkg3_cnt[i].name); - continue; + should_skip = true; + break; } } + if (should_skip) + continue; merge_kip_t *mkip1 = (merge_kip_t *)malloc(sizeof(merge_kip_t)); mkip1->kip1 = content; From 811971dfa082cda47dadf60583135f5475cc56ad Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 30 Apr 2025 09:13:19 +0300 Subject: [PATCH 297/308] bdk: als: no need to check above 255 with u8 --- bdk/input/als.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/bdk/input/als.c b/bdk/input/als.c index acb0ac2..277f0d5 100644 --- a/bdk/input/als.c +++ b/bdk/input/als.c @@ -70,8 +70,6 @@ void set_als_cfg(als_ctxt_t *als_ctxt, u8 gain, u8 cycle) if (!cycle) cycle = 1; - else if (cycle > 255) - cycle = 255; i2c_send_byte(I2C_2, BH1730_I2C_ADDR, BH1730_ADDR(BH1730_GAIN_REG), gain); i2c_send_byte(I2C_2, BH1730_I2C_ADDR, BH1730_ADDR(BH1730_TIMING_REG), (256 - cycle)); From 129a70c32dba3960b8b17e2e6f48e7e6a2b5da97 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 30 Apr 2025 09:13:55 +0300 Subject: [PATCH 298/308] bdk: se: heap is not used anymore --- bdk/sec/se.c | 1 - 1 file changed, 1 deletion(-) diff --git a/bdk/sec/se.c b/bdk/sec/se.c index 1278b1c..4ed04ec 100644 --- a/bdk/sec/se.c +++ b/bdk/sec/se.c @@ -19,7 +19,6 @@ #include "se.h" #include -#include #include #include #include From b3194f6379940e29f7a5dd3149b081f82e07260d Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 30 Apr 2025 09:14:32 +0300 Subject: [PATCH 299/308] bdk: mc: fix warning for arbiter check --- bdk/storage/sdmmc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/bdk/storage/sdmmc.c b/bdk/storage/sdmmc.c index 60053cc..747c28d 100644 --- a/bdk/storage/sdmmc.c +++ b/bdk/storage/sdmmc.c @@ -18,6 +18,7 @@ #include #include +#include #include #include #include From 57e31c09f92cb6ab7b081e343e9e688924b499b1 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 30 Apr 2025 09:15:52 +0300 Subject: [PATCH 300/308] nyx: info: move sd FAT info after showing errors --- nyx/nyx_gui/frontend/gui_info.c | 48 ++++++++++++++++++--------------- 1 file changed, 27 insertions(+), 21 deletions(-) diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index 6c3123c..ab79aa7 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -2263,47 +2263,29 @@ static lv_res_t _create_window_sdcard_info_status(lv_obj_t *btn) lv_obj_set_size(desc3, LV_HOR_RES / 2 / 2 * 2, LV_VER_RES - (LV_DPI * 11 / 8) * 4); lv_obj_t * lb_desc3 = lv_label_create(desc3, lb_desc); - lv_label_set_text(lb_desc3, "#D4FF00 Acquiring FAT volume info...#"); + lv_label_set_text(lb_desc3, "#D4FF00 Acquiring info...#"); lv_obj_set_width(lb_desc3, lv_obj_get_width(desc3)); lv_obj_align(desc3, desc, LV_ALIGN_OUT_BOTTOM_LEFT, 0, LV_DPI / 2); manual_system_maintenance(true); - f_getfree("", &sd_fs.free_clst, NULL); - - lv_label_set_text(lb_desc3, - "#00DDFF Found FAT FS:#\n" - "Filesystem:\n" - "Cluster:\n" - "Size free/total:" - ); lv_obj_set_size(desc3, LV_HOR_RES / 2 / 6 * 2, LV_VER_RES - (LV_DPI * 11 / 8) * 4); - lv_obj_set_width(lb_desc3, lv_obj_get_width(desc3)); lv_obj_align(desc3, desc, LV_ALIGN_OUT_BOTTOM_LEFT, 0, LV_DPI / 2); lv_obj_t *val3 = lv_cont_create(win, NULL); lv_obj_set_size(val3, LV_HOR_RES / 12 * 3, LV_VER_RES - (LV_DPI * 11 / 8) * 4); lv_obj_t * lb_val3 = lv_label_create(val3, lb_desc); + lv_label_set_text(lb_val3, ""); - s_printf(txt_buf, "\n%s\n%d %s\n%d/%d MiB", - sd_fs.fs_type == FS_EXFAT ? ("exFAT "SYMBOL_SHRK) : ("FAT32"), - (sd_fs.csize > 1) ? (sd_fs.csize >> 1) : SD_BLOCKSIZE, - (sd_fs.csize > 1) ? "KiB" : "B", - (u32)(sd_fs.free_clst * sd_fs.csize >> SECTORS_TO_MIB_COEFF), - (u32)(sd_fs.n_fatent * sd_fs.csize >> SECTORS_TO_MIB_COEFF)); - - lv_label_set_text(lb_val3, txt_buf); - - lv_obj_set_width(lb_val3, lv_obj_get_width(val3)); lv_obj_align(val3, desc3, LV_ALIGN_OUT_RIGHT_MID, 0, 0); lv_obj_t *desc4 = lv_cont_create(win, NULL); lv_obj_set_size(desc4, LV_HOR_RES / 2 / 2 * 2, LV_VER_RES - (LV_DPI * 11 / 8) * 4); lv_obj_t * lb_desc4 = lv_label_create(desc4, lb_desc); - lv_label_set_text(lb_desc4, "#D4FF00 Acquiring FAT volume info...#"); + lv_label_set_text(lb_desc4, " "); lv_obj_set_width(lb_desc4, lv_obj_get_width(desc4)); lv_label_set_text(lb_desc4, @@ -2332,6 +2314,30 @@ static lv_res_t _create_window_sdcard_info_status(lv_obj_t *btn) lv_obj_set_width(lb_val4, lv_obj_get_width(val4)); lv_obj_align(val4, desc4, LV_ALIGN_OUT_RIGHT_MID, 0, 0); + manual_system_maintenance(true); + + f_getfree("", &sd_fs.free_clst, NULL); + + lv_label_set_text(lb_desc3, + "#00DDFF Found FAT FS:#\n" + "Filesystem:\n" + "Cluster:\n" + "Size free/total:" + ); + + lv_obj_set_width(lb_desc3, lv_obj_get_width(desc3)); + + s_printf(txt_buf, "\n%s\n%d %s\n%d/%d MiB", + sd_fs.fs_type == FS_EXFAT ? ("exFAT "SYMBOL_SHRK) : ("FAT32"), + (sd_fs.csize > 1) ? (sd_fs.csize >> 1) : SD_BLOCKSIZE, + (sd_fs.csize > 1) ? "KiB" : "B", + (u32)(sd_fs.free_clst * sd_fs.csize >> SECTORS_TO_MIB_COEFF), + (u32)(sd_fs.n_fatent * sd_fs.csize >> SECTORS_TO_MIB_COEFF)); + + lv_label_set_text(lb_val3, txt_buf); + + lv_obj_set_width(lb_val3, lv_obj_get_width(val3)); + free(txt_buf); sd_unmount(); From 466beedb28f95ce762035bf8910f2611d73595ec Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 30 Apr 2025 09:22:04 +0300 Subject: [PATCH 301/308] hos: add 20.0.0 support --- bootloader/hos/hos.c | 2 ++ bootloader/hos/hos.h | 3 ++- bootloader/hos/pkg1.c | 3 ++- bootloader/hos/pkg2_patches.inl | 26 +++++++++++++++++++++ bootloader/hos/secmon_exo.c | 2 +- nyx/nyx_gui/frontend/gui_info.c | 5 ++++- nyx/nyx_gui/hos/hos.c | 40 +++++++++++++++++---------------- nyx/nyx_gui/hos/hos.h | 3 ++- nyx/nyx_gui/hos/pkg1.c | 3 ++- nyx/nyx_gui/hos/pkg2.c | 2 ++ 10 files changed, 64 insertions(+), 25 deletions(-) diff --git a/bootloader/hos/hos.c b/bootloader/hos/hos.c index 50df7a4..4504a4a 100644 --- a/bootloader/hos/hos.c +++ b/bootloader/hos/hos.c @@ -124,6 +124,7 @@ static const u8 master_kekseed_t210_tsec_v4[HOS_KB_VERSION_MAX - HOS_KB_VERSION_ { 0x71, 0xB9, 0xA6, 0xC0, 0xFF, 0x97, 0x6B, 0x0C, 0xB4, 0x40, 0xB9, 0xD5, 0x81, 0x5D, 0x81, 0x90 }, // 17.0.0. { 0x00, 0x04, 0x5D, 0xF0, 0x4D, 0xCD, 0x14, 0xA3, 0x1C, 0xBF, 0xDE, 0x48, 0x55, 0xBA, 0x35, 0xC1 }, // 18.0.0. { 0xD7, 0x63, 0x74, 0x46, 0x4E, 0xBA, 0x78, 0x0A, 0x7C, 0x9D, 0xB3, 0xE8, 0x7A, 0x3D, 0x71, 0xE3 }, // 19.0.0. + { 0xA1, 0x7D, 0x34, 0xDB, 0x2D, 0x9D, 0xDA, 0xE5, 0xF8, 0x15, 0x63, 0x4C, 0x8F, 0xE7, 0x6C, 0xD8 }, // 20.0.0. }; //!TODO: Update on mkey changes. @@ -142,6 +143,7 @@ static const u8 master_kekseed_t210b01[HOS_KB_VERSION_MAX - HOS_KB_VERSION_600 + { 0x8D, 0xEE, 0x9E, 0x11, 0x36, 0x3A, 0x9B, 0x0A, 0x6A, 0xC7, 0xBB, 0xE9, 0xD1, 0x03, 0xF7, 0x80 }, // 17.0.0. { 0x4F, 0x41, 0x3C, 0x3B, 0xFB, 0x6A, 0x01, 0x2A, 0x68, 0x9F, 0x83, 0xE9, 0x53, 0xBD, 0x16, 0xD2 }, // 18.0.0. { 0x31, 0xBE, 0x25, 0xFB, 0xDB, 0xB4, 0xEE, 0x49, 0x5C, 0x77, 0x05, 0xC2, 0x36, 0x9F, 0x34, 0x80 }, // 19.0.0. + { 0x1A, 0x31, 0x62, 0x87, 0xA8, 0x09, 0xCA, 0xF8, 0x69, 0x15, 0x45, 0xC2, 0x6B, 0xAA, 0x5A, 0x8A }, // 20.0.0. }; static const u8 console_keyseed[SE_KEY_128_SIZE] = diff --git a/bootloader/hos/hos.h b/bootloader/hos/hos.h index 0cb695b..a04f650 100644 --- a/bootloader/hos/hos.h +++ b/bootloader/hos/hos.h @@ -46,7 +46,8 @@ enum { HOS_KB_VERSION_1700 = 16, HOS_KB_VERSION_1800 = 17, HOS_KB_VERSION_1900 = 18, - HOS_KB_VERSION_MAX = HOS_KB_VERSION_1900 + HOS_KB_VERSION_2000 = 19, + HOS_KB_VERSION_MAX = HOS_KB_VERSION_2000 }; #define HOS_TSEC_VERSION 4 //! TODO: Update on TSEC Root Key changes. diff --git a/bootloader/hos/pkg1.c b/bootloader/hos/pkg1.c index a80557e..9d6b783 100644 --- a/bootloader/hos/pkg1.c +++ b/bootloader/hos/pkg1.c @@ -171,7 +171,8 @@ static const pkg1_id_t _pkg1_ids[] = { { "20230111", 15, 18, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 16.0.0 - 16.1.0. { "20230906", 16, 19, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 17.0.0 - 17.0.1. { "20240207", 17, 19, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 18.0.0 - 18.1.0. - { "20240808", 18, 20, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 19.0.0+ + { "20240808", 18, 20, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 19.0.0 - 19.0.1. + { "20250206", 19, 21, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000, NULL }, // 20.0.0+ }; const pkg1_id_t *pkg1_get_latest() diff --git a/bootloader/hos/pkg2_patches.inl b/bootloader/hos/pkg2_patches.inl index 23d3c54..baf62ee 100644 --- a/bootloader/hos/pkg2_patches.inl +++ b/bootloader/hos/pkg2_patches.inl @@ -818,6 +818,30 @@ static const kip1_patchset_t _fs_patches_1900_exfat[] = { { NULL, NULL } }; +static const kip1_patch_t _fs_nogc_2000[] = { + { KPS(KIP_TEXT) | 0x17C150, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x1A7D24, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, + { KPS(KIP_TEXT) | 0x1A7F24, 4, KIP1_PATCH_SRC_NO_CHECK, "\x16\x80\x80\x52" }, + { 0, 0, NULL, NULL } +}; + +static const kip1_patchset_t _fs_patches_2000[] = { + { "nogc", _fs_nogc_2000 }, + { NULL, NULL } +}; + +static const kip1_patch_t _fs_nogc_2000_exfat[] = { + { KPS(KIP_TEXT) | 0x187A70, 8, KIP1_PATCH_SRC_NO_CHECK, "\xE0\x03\x1F\x2A\xC0\x03\x5F\xD6" }, + { KPS(KIP_TEXT) | 0x1B3644, 4, KIP1_PATCH_SRC_NO_CHECK, "\x14\x80\x80\x52" }, + { KPS(KIP_TEXT) | 0x1B3844, 4, KIP1_PATCH_SRC_NO_CHECK, "\x16\x80\x80\x52" }, + { 0, 0, NULL, NULL } +}; + +static const kip1_patchset_t _fs_patches_2000_exfat[] = { + { "nogc", _fs_nogc_2000_exfat }, + { NULL, NULL } +}; + // SHA256 hashes. static const kip1_id_t _kip_ids[] = { @@ -883,4 +907,6 @@ static const kip1_id_t _kip_ids[] = { "FS", "\x20\x4C\xBA\x86\xDE\x08\x44\x6A", _fs_patches_1800_exfat }, // FS 18.1.0 exFAT { "FS", "\xD9\x4C\x68\x15\xF8\xF5\x0A\x20", _fs_patches_1900 }, // FS 19.0.0 { "FS", "\xED\xA8\x78\x68\xA4\x49\x07\x50", _fs_patches_1900_exfat }, // FS 19.0.0 exFAT + { "FS", "\x63\x54\x96\x9E\x60\xA7\x97\x7B", _fs_patches_2000 }, // FS 20.0.0 + { "FS", "\x47\x41\x07\x10\x65\x4F\xA4\x3F", _fs_patches_2000_exfat }, // FS 20.0.0 exFAT }; diff --git a/bootloader/hos/secmon_exo.c b/bootloader/hos/secmon_exo.c index 8242113..5b2d9f1 100644 --- a/bootloader/hos/secmon_exo.c +++ b/bootloader/hos/secmon_exo.c @@ -199,7 +199,7 @@ void config_exosphere(launch_ctxt_t *ctxt, u32 warmboot_base) case 12: exo_fw_no = EXO_FW_VER(9, 1); break; - case 13 ... 22: //!TODO: Update on API changes. 22: 19.0.0. + case 13 ... 23: //!TODO: Update on API changes. 23: 20.0.0. exo_fw_no = EXO_FW_VER(exo_fw_no - 3, ctxt->exo_ctx.hos_revision); break; } diff --git a/nyx/nyx_gui/frontend/gui_info.c b/nyx/nyx_gui/frontend/gui_info.c index ab79aa7..d7351ab 100644 --- a/nyx/nyx_gui/frontend/gui_info.c +++ b/nyx/nyx_gui/frontend/gui_info.c @@ -612,7 +612,10 @@ static lv_res_t _create_window_hw_info_status(lv_obj_t *btn) strcpy(fuses_hos_version, "17.0.0 - 18.1.0"); break; case 20: - strcpy(fuses_hos_version, "19.0.0+"); + strcpy(fuses_hos_version, "19.0.0 - 19.0.1"); + break; + case 21: + strcpy(fuses_hos_version, "20.0.0+"); break; case 255: strcpy(fuses_hos_version, "#FFD000 Overburnt#"); diff --git a/nyx/nyx_gui/hos/hos.c b/nyx/nyx_gui/hos/hos.c index 284f092..cef7bbe 100644 --- a/nyx/nyx_gui/hos/hos.c +++ b/nyx/nyx_gui/hos/hos.c @@ -2,7 +2,7 @@ * Copyright (c) 2018 naehrwert * Copyright (c) 2018 st4rk * Copyright (c) 2018 Ced2911 - * Copyright (c) 2018-2024 CTCaer + * Copyright (c) 2018-2025 CTCaer * Copyright (c) 2018 balika011 * * This program is free software; you can redistribute it and/or modify it @@ -76,7 +76,7 @@ static const u8 master_kekseed_620[SE_KEY_128_SIZE] = //!TODO: Update on mkey changes. static const u8 master_kekseed_t210_max[SE_KEY_128_SIZE] = - { 0xD7, 0x63, 0x74, 0x46, 0x4E, 0xBA, 0x78, 0x0A, 0x7C, 0x9D, 0xB3, 0xE8, 0x7A, 0x3D, 0x71, 0xE3 }; // 19.0.0. + { 0xA1, 0x7D, 0x34, 0xDB, 0x2D, 0x9D, 0xDA, 0xE5, 0xF8, 0x15, 0x63, 0x4C, 0x8F, 0xE7, 0x6C, 0xD8 }; // 20.0.0. //!TODO: Update on mkey changes. static const u8 master_kekseed_t210b01[HOS_KB_VERSION_MAX - HOS_KB_VERSION_600 + 1][SE_KEY_128_SIZE] = { @@ -94,6 +94,7 @@ static const u8 master_kekseed_t210b01[HOS_KB_VERSION_MAX - HOS_KB_VERSION_600 + { 0x8D, 0xEE, 0x9E, 0x11, 0x36, 0x3A, 0x9B, 0x0A, 0x6A, 0xC7, 0xBB, 0xE9, 0xD1, 0x03, 0xF7, 0x80 }, // 17.0.0. { 0x4F, 0x41, 0x3C, 0x3B, 0xFB, 0x6A, 0x01, 0x2A, 0x68, 0x9F, 0x83, 0xE9, 0x53, 0xBD, 0x16, 0xD2 }, // 18.0.0. { 0x31, 0xBE, 0x25, 0xFB, 0xDB, 0xB4, 0xEE, 0x49, 0x5C, 0x77, 0x05, 0xC2, 0x36, 0x9F, 0x34, 0x80 }, // 19.0.0. + { 0x1A, 0x31, 0x62, 0x87, 0xA8, 0x09, 0xCA, 0xF8, 0x69, 0x15, 0x45, 0xC2, 0x6B, 0xAA, 0x5A, 0x8A }, // 20.0.0. }; static const u8 console_keyseed[SE_KEY_128_SIZE] = @@ -126,6 +127,7 @@ static const u8 mkey_vectors[HOS_KB_VERSION_MAX + 1][SE_KEY_128_SIZE] = { { 0x25, 0x12, 0x8B, 0xCB, 0xB5, 0x46, 0xA1, 0xF8, 0xE0, 0x52, 0x15, 0xB7, 0x0B, 0x57, 0x00, 0xBD }, // Mkey 15 encrypted with mkey 16. { 0x58, 0x15, 0xD2, 0xF6, 0x8A, 0xE8, 0x19, 0xAB, 0xFB, 0x2D, 0x52, 0x9D, 0xE7, 0x55, 0xF3, 0x93 }, // Mkey 16 encrypted with mkey 17. { 0x4A, 0x01, 0x3B, 0xC7, 0x44, 0x6E, 0x45, 0xBD, 0xE6, 0x5E, 0x2B, 0xEC, 0x07, 0x37, 0x52, 0x86 }, // Mkey 17 encrypted with mkey 18. + { 0x97, 0xE4, 0x11, 0xAB, 0x22, 0x72, 0x1A, 0x1F, 0x70, 0x5C, 0x00, 0xB3, 0x96, 0x30, 0x05, 0x28 }, // Mkey 18 encrypted with mkey 19. }; //!TODO: Update on mkey changes. @@ -146,6 +148,7 @@ static const u8 new_console_keyseed[HOS_KB_VERSION_MAX - HOS_KB_VERSION_400 + 1] { 0xDA, 0xB9, 0xD6, 0x77, 0x52, 0x2D, 0x1F, 0x78, 0x73, 0xC9, 0x98, 0x5B, 0x06, 0xFE, 0xA0, 0x52 }, // 17.0.0 New Device Key Source. { 0x14, 0xF5, 0xA5, 0xD0, 0x73, 0x6D, 0x44, 0x80, 0x5F, 0x31, 0x5A, 0x8F, 0x1E, 0xD4, 0x0D, 0x63 }, // 18.0.0 New Device Key Source. { 0x07, 0x38, 0x9A, 0xEC, 0x9C, 0xBD, 0x50, 0x4A, 0x4C, 0x1F, 0x04, 0xDA, 0x40, 0x68, 0x29, 0xE3 }, // 19.0.0 New Device Key Source. + { 0xA3, 0x6B, 0x0A, 0xB5, 0x6F, 0x57, 0x4C, 0x5E, 0x00, 0xFD, 0x56, 0x21, 0xF5, 0x06, 0x6B, 0xD1 }, // 20.0.0 New Device Key Source. }; //!TODO: Update on mkey changes. @@ -166,6 +169,7 @@ static const u8 new_console_kekseed[HOS_KB_VERSION_MAX - HOS_KB_VERSION_400 + 1] { 0x21, 0xD6, 0x35, 0xF1, 0x0F, 0x7A, 0xF0, 0x5D, 0xDF, 0x79, 0x1C, 0x7A, 0xE4, 0x32, 0x82, 0x9E }, // 17.0.0 New Device Keygen Source. { 0xE7, 0x85, 0x8C, 0xA2, 0xF4, 0x49, 0xCB, 0x07, 0xD1, 0x8E, 0x48, 0x1B, 0xE8, 0x1E, 0x28, 0x3B }, // 18.0.0 New Device Keygen Source. { 0x9B, 0xA5, 0xFD, 0x74, 0x7F, 0xCD, 0x23, 0xD1, 0xD9, 0xBD, 0x6C, 0x51, 0x72, 0x5F, 0x3D, 0x1F }, // 19.0.0 New Device Keygen Source. + { 0xDA, 0xFB, 0x61, 0x39, 0x48, 0x2D, 0xC2, 0x7E, 0x0D, 0x8E, 0x8F, 0x98, 0x57, 0x20, 0xB8, 0x15 }, // 20.0.0 New Device Keygen Source. }; static const u8 gen_keyseed[SE_KEY_128_SIZE] = @@ -269,7 +273,7 @@ static void _hos_eks_save() } // Get keys. - u8 *keys = (u8 *)calloc(2, SZ_4K); + u8 *keys = (u8 *)zalloc(SZ_8K); se_get_aes_keys(keys + SZ_4K, keys, SE_KEY_128_SIZE); // Set magic and personalized info. @@ -333,21 +337,6 @@ out: } } -int hos_keygen_t210b01(u32 kb) -{ - // Use SBK as Device key 4x unsealer and KEK for mkey in T210B01 units. - se_aes_unwrap_key(10, 14, console_keyseed_4xx); - - // Derive master key. - se_aes_unwrap_key(7, 12, master_kekseed_t210b01[kb - HOS_KB_VERSION_600]); - se_aes_unwrap_key(7, 7, master_keyseed_retail); - - // Derive latest pkg2 key. - se_aes_unwrap_key(8, 7, package2_keyseed); - - return 1; -} - int hos_keygen(void *keyblob, u32 kb, tsec_ctxt_t *tsec_ctxt) { u32 retries = 0; @@ -358,8 +347,21 @@ int hos_keygen(void *keyblob, u32 kb, tsec_ctxt_t *tsec_ctxt) if (kb > HOS_KB_VERSION_MAX) return 0; + // Do Mariko keygen. if (h_cfg.t210b01) - return hos_keygen_t210b01(kb); + { + // Use SBK as Device key 4x unsealer and KEK for mkey in T210B01 units. + se_aes_unwrap_key(10, 14, console_keyseed_4xx); + + // Derive master key. + se_aes_unwrap_key(7, 12, master_kekseed_t210b01[kb - HOS_KB_VERSION_600]); + se_aes_unwrap_key(7, 7, master_keyseed_retail); + + // Derive latest pkg2 key. + se_aes_unwrap_key(8, 7, package2_keyseed); + + return 1; + } // Do Erista keygen. diff --git a/nyx/nyx_gui/hos/hos.h b/nyx/nyx_gui/hos/hos.h index 55b4c9b..bdc82b9 100644 --- a/nyx/nyx_gui/hos/hos.h +++ b/nyx/nyx_gui/hos/hos.h @@ -46,7 +46,8 @@ enum { HOS_KB_VERSION_1700 = 16, HOS_KB_VERSION_1800 = 17, HOS_KB_VERSION_1900 = 18, - HOS_KB_VERSION_MAX = HOS_KB_VERSION_1900 + HOS_KB_VERSION_2000 = 19, + HOS_KB_VERSION_MAX = HOS_KB_VERSION_2000 }; #define HOS_TSEC_VERSION 4 //! TODO: Update on TSEC Root Key changes. diff --git a/nyx/nyx_gui/hos/pkg1.c b/nyx/nyx_gui/hos/pkg1.c index 80602cd..f0a4d53 100644 --- a/nyx/nyx_gui/hos/pkg1.c +++ b/nyx/nyx_gui/hos/pkg1.c @@ -67,7 +67,8 @@ static const pkg1_id_t _pkg1_ids[] = { { "20230111", 15, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 16.0.0 - 16.1.0. { "20230906", 16, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 17.0.0 - 17.0.1. { "20240207", 17, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 18.0.0 - 18.1.0. - { "20240808", 18, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 19.0.0+ + { "20240808", 18, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 19.0.0 - 19.0.1. + { "20250206", 19, 0x0E00, 0x6FE0, 0x40030000, 0x4003E000 }, // 20.0.0+ }; const pkg1_id_t *pkg1_identify(u8 *pkg1, char *build_date) diff --git a/nyx/nyx_gui/hos/pkg2.c b/nyx/nyx_gui/hos/pkg2.c index c0d2c6f..7b6d6cb 100644 --- a/nyx/nyx_gui/hos/pkg2.c +++ b/nyx/nyx_gui/hos/pkg2.c @@ -115,6 +115,8 @@ static const u8 mkey_vector_7xx[HOS_KB_VERSION_MAX - HOS_KB_VERSION_810 + 1][SE_ { 0x58, 0x15, 0xD2, 0xF6, 0x8A, 0xE8, 0x19, 0xAB, 0xFB, 0x2D, 0x52, 0x9D, 0xE7, 0x55, 0xF3, 0x93 }, // Master key 17 encrypted with 18. (18.0.0 with 19.0.0) { 0x4A, 0x01, 0x3B, 0xC7, 0x44, 0x6E, 0x45, 0xBD, 0xE6, 0x5E, 0x2B, 0xEC, 0x07, 0x37, 0x52, 0x86 }, + // Master key 18 encrypted with 19. (19.0.0 with 20.0.0) + { 0x97, 0xE4, 0x11, 0xAB, 0x22, 0x72, 0x1A, 0x1F, 0x70, 0x5C, 0x00, 0xB3, 0x96, 0x30, 0x05, 0x28 }, }; static bool _pkg2_key_unwrap_validate(pkg2_hdr_t *tmp_test, pkg2_hdr_t *hdr, u8 src_slot, u8 *mkey, const u8 *key_seed) From 75bac23d01b772de6b138dfdfe1c8fd214972057 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 30 Apr 2025 09:24:42 +0300 Subject: [PATCH 302/308] Change several makefile prints Silence some, fix newline to others. --- Makefile | 13 ++++++------- loader/Makefile | 2 +- nyx/Makefile | 6 +++--- 3 files changed, 10 insertions(+), 11 deletions(-) diff --git a/Makefile b/Makefile index 0f39e64..be95d5c 100755 --- a/Makefile +++ b/Makefile @@ -101,15 +101,14 @@ TOOLS := $(TOOLSLZ) $(TOOLSB2C) all: $(TARGET).bin $(LDRDIR) @printf ICTC49 >> $(OUTPUTDIR)/$(TARGET).bin @echo "--------------------------------------" - @echo -n "Uncompr size: " + @echo "$(TARGET) size:" + @echo -n "Uncompr: " $(eval BIN_SIZE = $(shell wc -c < $(OUTPUTDIR)/$(TARGET)_unc.bin)) @echo $(BIN_SIZE)" Bytes" - @echo "Uncompr Max: 140288 Bytes + 3 KiB BSS" @if [ ${BIN_SIZE} -gt 140288 ]; then echo "\e[1;33mUncompr size exceeds limit!\e[0m"; fi - @echo -n "Payload size: " + @echo -n "Payload: " $(eval BIN_SIZE = $(shell wc -c < $(OUTPUTDIR)/$(TARGET).bin)) @echo $(BIN_SIZE)" Bytes" - @echo "Payload Max: 126296 Bytes" @if [ ${BIN_SIZE} -gt 126296 ]; then echo "\e[1;33mPayload size exceeds limit!\e[0m"; fi @echo "--------------------------------------" @@ -126,7 +125,7 @@ $(NYXDIR): $(LDRDIR): $(TARGET).bin @$(TOOLSLZ)/lz77 $(OUTPUTDIR)/$(TARGET).bin - mv $(OUTPUTDIR)/$(TARGET).bin $(OUTPUTDIR)/$(TARGET)_unc.bin + @mv $(OUTPUTDIR)/$(TARGET).bin $(OUTPUTDIR)/$(TARGET)_unc.bin @mv $(OUTPUTDIR)/$(TARGET).bin.00.lz payload_00 @mv $(OUTPUTDIR)/$(TARGET).bin.01.lz payload_01 @$(TOOLSB2C)/bin2c payload_00 > $(LDRDIR)/payload_00.h @@ -139,11 +138,11 @@ $(TOOLS): @$(MAKE) --no-print-directory -C $@ $(MAKECMDGOALS) -$(MAKEFLAGS) $(TARGET).bin: $(BUILDDIR)/$(TARGET)/$(TARGET).elf $(MODULEDIRS) $(NYXDIR) $(TOOLS) - $(OBJCOPY) -S -O binary $< $(OUTPUTDIR)/$@ + @$(OBJCOPY) -S -O binary $< $(OUTPUTDIR)/$@ $(BUILDDIR)/$(TARGET)/$(TARGET).elf: $(OBJS) @$(CC) $(LDFLAGS) -T $(SOURCEDIR)/link.ld $^ -o $@ - @echo "hekate was built with the following flags:\nCFLAGS: "$(CFLAGS)"\nLDFLAGS: "$(LDFLAGS) + @printf "$(TARGET) was built with the following flags:\nCFLAGS: $(CFLAGS)\nLDFLAGS: $(LDFLAGS)\n" $(BUILDDIR)/$(TARGET)/%.o: %.c @echo Building $@ diff --git a/loader/Makefile b/loader/Makefile index f66a0e0..c2a12c0 100644 --- a/loader/Makefile +++ b/loader/Makefile @@ -46,7 +46,7 @@ clean: @rm -rf $(OBJS) $(TARGET).bin: $(BUILDDIR)/$(TARGET)/$(TARGET).elf - $(OBJCOPY) -S -O binary $< $(OUTPUTDIR)/$(PAYLOAD_NAME).bin + @$(OBJCOPY) -S -O binary $< $(OUTPUTDIR)/$(PAYLOAD_NAME).bin $(BUILDDIR)/$(TARGET)/$(TARGET).elf: $(OBJS) @$(CC) $(LDFLAGS) -T link.ld $^ -o $@ diff --git a/nyx/Makefile b/nyx/Makefile index 61b9b53..71709c5 100644 --- a/nyx/Makefile +++ b/nyx/Makefile @@ -107,7 +107,7 @@ LDFLAGS = $(ARCH) -nostartfiles -lgcc -Wl,--nmagic,--gc-sections -Xlinker --defs all: $(TARGET).bin @echo "--------------------------------------" - @echo -n "Nyx size: " + @echo -n "Nyx size: " $(eval BIN_SIZE = $(shell wc -c < $(OUTPUTDIR)/$(TARGET).bin)) @echo $(BIN_SIZE)" Bytes" @echo "--------------------------------------" @@ -118,11 +118,11 @@ clean: @rm -rf $(OUTPUTDIR) $(TARGET).bin: $(BUILDDIR)/$(TARGET)/$(TARGET).elf - $(OBJCOPY) -S -O binary $< $(OUTPUTDIR)/$@ + @$(OBJCOPY) -S -O binary $< $(OUTPUTDIR)/$@ $(BUILDDIR)/$(TARGET)/$(TARGET).elf: $(OBJS) @$(CC) $(LDFLAGS) -T $(SOURCEDIR)/link.ld $^ -o $@ - @echo "Nyx was built with the following flags:\nCFLAGS: "$(CFLAGS)"\nLDFLAGS: "$(LDFLAGS) + @printf "$(TARGET) was built with the following flags:\nCFLAGS: $(CFLAGS)\nLDFLAGS: $(LDFLAGS)\n" $(BUILDDIR)/$(TARGET)/%.o: %.c @echo Building $@ From 85fa62cafc2933131cfb02e4a8574f141a602df2 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 30 Apr 2025 09:27:34 +0300 Subject: [PATCH 303/308] l4t: use strtol for sld_type --- bootloader/l4t/l4t.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bootloader/l4t/l4t.c b/bootloader/l4t/l4t.c index 899b824..5c84825 100644 --- a/bootloader/l4t/l4t.c +++ b/bootloader/l4t/l4t.c @@ -889,7 +889,7 @@ static void _l4t_set_config(l4t_ctxt_t *ctxt, const ini_sec_t *ini_sec, int entr else if (!strcmp("uart_port", kv->key)) ctxt->serial_port = atoi(kv->val); else if (!strcmp("sld_type", kv->key)) - ctxt->sld_type = atoi(kv->val); + ctxt->sld_type = strtol(kv->val, NULL, 16); // Set key/val to BL33 env. _l4t_bl33_cfg_set_key(bl33_env, kv->key, kv->val); From ff2b275794b2798dc765024379c56b29df9cc062 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 30 Apr 2025 09:28:24 +0300 Subject: [PATCH 304/308] Update readme Add sys/l4t folder description, simplify some wording and also add `sld_type` key. --- README.md | 34 ++++++++++++++++++---------------- 1 file changed, 18 insertions(+), 16 deletions(-) diff --git a/README.md b/README.md index 5e144c8..6101ca1 100644 --- a/README.md +++ b/README.md @@ -50,13 +50,14 @@ Custom Graphical Nintendo Switch bootloader, firmware patcher, tools, and many m | \|__ background.bmp | Nyx - Custom background. User provided. | | \|__ icon_switch.bmp | Nyx - Default icon for CFWs. | | \|__ icon_payload.bmp | Nyx - Default icon for Payloads. | -| bootloader/sys/ | hekate and Nyx system modules folder. | -| \|__ emummc.kipm | emuMMC KIP1 module. !Important! | -| \|__ libsys_lp0.bso | LP0 (sleep mode) module. Important! | -| \|__ libsys_minerva.bso | Minerva Training Cell. Used for DRAM Frequency training. !Important! | -| \|__ nyx.bin | Nyx - hekate's GUI. !Important! | -| \|__ res.pak | Nyx resources package. !Important! | -| \|__ thk.bin | Atmosphère Tsec Hovi Keygen. !Important! | +| bootloader/sys/ | hekate and Nyx system modules folder. !Important! | +| \|__ emummc.kipm | emuMMC KIP1 module. | +| \|__ libsys_lp0.bso | LP0 (sleep mode) module. | +| \|__ libsys_minerva.bso | Minerva Training Cell. Used for DRAM Frequency training. | +| \|__ nyx.bin | Nyx - hekate's GUI. | +| \|__ res.pak | Nyx resources package. | +| \|__ thk.bin | Atmosphère Tsec Hovi Keygen. | +| \|__ /l4t/ | Folder with firmware relevant to L4T (Linux/Android). | | bootloader/screenshots/ | Folder where Nyx screenshots are saved | | bootloader/payloads/ | For the `Payloads` menu. All CFW bootloaders, tools, Linux payloads are supported. Autoboot only supported by including them into an ini. | | bootloader/libtools/ | Reserved | @@ -76,9 +77,9 @@ There are four possible type of entries. "**[ ]**": Boot entry, "**{ }**": Capti ### hekate Global Configuration keys/values (when entry is *[config]*): -| Config option | Description | -| ------------------ | ---------------------------------------------------------- | -| autoboot=0 | 0: Disable, #: Boot entry number to auto boot. | +| Config option | Description | +| ------------------ | -------------------------------------------------------------- | +| autoboot=0 | 0: Disable, #: Boot entry number to auto boot. | | autoboot_list=0 | 0: Read `autoboot` boot entry from hekate_ipl.ini, 1: Read from ini folder (ini files are ASCII ordered). | | bootwait=3 | 0: Disable (It also disables bootlogo. Having **VOL-** pressed since injection goes to menu.), #: Time to wait for **VOL-** to enter menu. Max: 20s. | | noticker=0 | 0: Animated line is drawn during custom bootlogo, signifying time left to skip to menu. 1: Disable. | @@ -86,7 +87,7 @@ There are four possible type of entries. "**[ ]**": Boot entry, "**{ }**": Capti | autonogc=1 | 0: Disable, 1: Automatically applies nogc patch if unburnt fuses found and a >= 4.0.0 HOS is booted. | | bootprotect=0 | 0: Disable, 1: Protect bootloader folder from being corrupted by disallowing reading or editing in HOS. | | updater2p=0 | 0: Disable, 1: Force updates (if needed) the reboot2payload binary to be hekate. | -| backlight=100 | Screen backlight level. 0-255. | +| backlight=100 | Screen backlight level. 0-255. | ### Boot entry key/value combinations: @@ -99,12 +100,12 @@ There are four possible type of entries. "**[ ]**": Boot entry, "**{ }**": Capti | kip1={FILE path} | Replaces/Adds kernel initial process. Multiple can be set. | | kip1={FOLDER path}/* | Loads every .kip/.kip1 inside a folder. Compatible with single kip1 keys. | | pkg3={FILE path} | Takes an Atmosphere `package3` binary and `extracts` all needed parts from it. kips, exosphere, warmboot and mesophere. | -| fss0={FILE path} | Same as above. Deprecated! | +| fss0={FILE path} | Same as above. !Deprecated! | | pkg3ex=1 | Enables loading of experimental content from a PKG3/FSS0 storage | -| pkg3kip1skip={KIP name} | Skips loading a kip from `pkg3`/`fss0`. Specify with multiple lines and/or in one line with `,` as separator. | +| pkg3kip1skip={KIP name} | Skips loading a kip from `pkg3`/`fss0`. Allows multiple and `,` as separator. The name must exactly match the name in `PKG3`. | | exofatal={FILE path} | Replaces the exosphere fatal binary for Mariko | | ---------------------- | ---------------------------------------------------------- | -| kip1patch=patchname | Enables a kip1 patch. Specify with multiple lines and/or in one line with `,` as separator. If actual patch is not found, a warning will show up | +| kip1patch=patchname | Enables a kip1 patch. Allows multiple and `,` as separator. If actual patch is not found, a warning will show up. | | emupath={FOLDER path} | Forces emuMMC to use the selected one. (=emuMMC/RAW1, =emuMMC/SD00, etc). emuMMC must be created by hekate because it uses the raw_based/file_based files. | | emummcforce=1 | Forces the use of emuMMC. If emummc.ini is disabled or not found, then it causes an error. | | emummc_force_disable=1 | Disables emuMMC, if it's enabled. | @@ -121,6 +122,7 @@ There are four possible type of entries. "**[ ]**": Boot entry, "**{ }**": Capti | ram_oc_vdd2=1100 | L4T RAM VDD2 Voltage. Set VDD2 (T210B01) or VDD2/VDDQ (T210) voltage. 1050-1175. | | ram_oc_vddq=600 | L4T RAM VDDQ Voltage. Set VDDQ (T210B01). 550-650. | | uart_port=0 | Enables logging on serial port for L4T uboot/kernel. | +| sld_type=0x31444C53 | Controls the type of seamless display support. 0x0: Disable, 0x31444C53: L4T seamless display. | | Additional keys | Each distro supports more keys. Check README_CONFIG.txt for more info. | | ---------------------- | ---------------------------------------------------------- | | bootwait=3 | Overrides global bootwait from `[config]`. | @@ -134,8 +136,8 @@ There are four possible type of entries. "**[ ]**": Boot entry, "**{ }**": Capti **Note2**: When using PKG3/FSS0 it parses exosphere, warmboot and all core kips. You can override the first 2 by using `secmon`/`warmboot` after defining `pkg3`/`fss0`. You can define `kip1` to load an extra kip or many via the wildcard (`/*`) usage. -**Warning**: Careful when you define *pkg3/fss core* kips when using `pkg3`/`fss0` or the folder (when using `/*`) includes them. -That's in case the kips are incompatible between them. If compatible, you can override `pkg3`/`fss0` kips with no issues (useful for testing with intermediate kip changes). In such cases, the `kip1` line must be after `pkg3`/`fss0` line. +**Warning**: Careful when you override *pkg3/fss core* kips with `kip1`. +That's in case the kips are incompatible between them. If compatible, you can override `pkg3`/`fss0` kips with no issues (useful for testing with intermediate kip changes). In such cases, the `kip1` line must be **after** `pkg3`/`fss0` line. ### Boot entry key/value combinations for Exosphère: From 47f8f3d6da7e06892e4637a3080e1ee75785a387 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 30 Apr 2025 09:28:34 +0300 Subject: [PATCH 305/308] Bump hekate to v6.3.0 and Nyx to v1.7.0 --- Versions.inc | 8 ++++---- bootloader/main.c | 4 ++-- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/Versions.inc b/Versions.inc index f4d3be6..603ed7d 100644 --- a/Versions.inc +++ b/Versions.inc @@ -1,11 +1,11 @@ # IPL Version. BLVERSION_MAJOR := 6 -BLVERSION_MINOR := 2 -BLVERSION_HOTFX := 2 +BLVERSION_MINOR := 3 +BLVERSION_HOTFX := 0 BLVERSION_REL := 0 # Nyx Version. NYXVERSION_MAJOR := 1 -NYXVERSION_MINOR := 6 -NYXVERSION_HOTFX := 4 +NYXVERSION_MINOR := 7 +NYXVERSION_HOTFX := 0 NYXVERSION_REL := 0 diff --git a/bootloader/main.c b/bootloader/main.c index 14b1015..6e123d2 100644 --- a/bootloader/main.c +++ b/bootloader/main.c @@ -1354,7 +1354,7 @@ static void _about() { static const char credits[] = "\nhekate (c) 2018, naehrwert, st4rk\n\n" - " (c) 2018-2024, CTCaer\n\n" + " (c) 2018-2025, CTCaer\n\n" " ___________________________________________\n\n" "Thanks to: %kderrek, nedwill, plutoo,\n" " shuffle2, smea, thexyz, yellows8%k\n" @@ -1450,7 +1450,7 @@ ment_t ment_top[] = { MDEF_END() }; -menu_t menu_top = { ment_top, "hekate v6.2.2", 0, 0 }; +menu_t menu_top = { ment_top, "hekate v6.3.0", 0, 0 }; extern void pivot_stack(u32 stack_top); From f27934388ea162d7fd20a88bc767e4c1a5217e6d Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 28 May 2025 04:51:34 +0300 Subject: [PATCH 306/308] hos: 20.1.0 FS support --- bootloader/hos/pkg2_patches.inl | 2 ++ 1 file changed, 2 insertions(+) diff --git a/bootloader/hos/pkg2_patches.inl b/bootloader/hos/pkg2_patches.inl index baf62ee..075df1b 100644 --- a/bootloader/hos/pkg2_patches.inl +++ b/bootloader/hos/pkg2_patches.inl @@ -909,4 +909,6 @@ static const kip1_id_t _kip_ids[] = { "FS", "\xED\xA8\x78\x68\xA4\x49\x07\x50", _fs_patches_1900_exfat }, // FS 19.0.0 exFAT { "FS", "\x63\x54\x96\x9E\x60\xA7\x97\x7B", _fs_patches_2000 }, // FS 20.0.0 { "FS", "\x47\x41\x07\x10\x65\x4F\xA4\x3F", _fs_patches_2000_exfat }, // FS 20.0.0 exFAT + { "FS", "\xED\x34\xB4\x50\x58\x4A\x5B\x43", _fs_patches_2000 }, // FS 20.1.0 + { "FS", "\xA5\x1A\xA4\x92\x6C\x41\x87\x59", _fs_patches_2000_exfat }, // FS 20.1.0 exFAT }; From 95fede44188144d92fbac8193d81e8271c8e8364 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 28 May 2025 04:53:58 +0300 Subject: [PATCH 307/308] hos: bail if requested emummc patch is not applied --- bootloader/hos/pkg2.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/bootloader/hos/pkg2.c b/bootloader/hos/pkg2.c index 2f2f6fc..4ad838c 100644 --- a/bootloader/hos/pkg2.c +++ b/bootloader/hos/pkg2.c @@ -686,6 +686,10 @@ const char *pkg2_patch_kips(link_t *info, char *patch_names) return patches[i]; } + // Check if emuMMC was applied. + if (emummc_patch_selected) + return "emummc"; + return NULL; } From 5e8b01f7273556c1e1c0919f6e3c0600ecfc77dc Mon Sep 17 00:00:00 2001 From: CTCaer Date: Wed, 28 May 2025 04:54:14 +0300 Subject: [PATCH 308/308] Bump hekate to v6.3.1 --- Versions.inc | 2 +- bootloader/main.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Versions.inc b/Versions.inc index 603ed7d..c2278c1 100644 --- a/Versions.inc +++ b/Versions.inc @@ -1,7 +1,7 @@ # IPL Version. BLVERSION_MAJOR := 6 BLVERSION_MINOR := 3 -BLVERSION_HOTFX := 0 +BLVERSION_HOTFX := 1 BLVERSION_REL := 0 # Nyx Version. diff --git a/bootloader/main.c b/bootloader/main.c index 6e123d2..4ec3eab 100644 --- a/bootloader/main.c +++ b/bootloader/main.c @@ -1450,7 +1450,7 @@ ment_t ment_top[] = { MDEF_END() }; -menu_t menu_top = { ment_top, "hekate v6.3.0", 0, 0 }; +menu_t menu_top = { ment_top, "hekate v6.3.1", 0, 0 }; extern void pivot_stack(u32 stack_top);