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Kernel/USB: Handle non-page aligned EHCI controller BARs correctly
BARs don't have to be page-aligned. This patch correctly calculates the needed memory range and register base address in that region.
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parent
9968c9f7a6
commit
06a32b6e16
Notes:
sideshowbarker
2024-07-18 22:57:59 +09:00
Author: https://github.com/spholz Commit: https://github.com/SerenityOS/serenity/commit/06a32b6e16 Pull-request: https://github.com/SerenityOS/serenity/pull/23246 Reviewed-by: https://github.com/Hendiadyoin1 ✅ Reviewed-by: https://github.com/gmta ✅
2 changed files with 10 additions and 6 deletions
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@ -16,24 +16,28 @@ ErrorOr<NonnullLockRefPtr<EHCIController>> EHCIController::try_to_initialize(con
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// FIXME: This assumes the BIOS left us a physical region for the controller
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auto pci_bar_address = TRY(PCI::get_bar_address(pci_device_identifier, SpaceBaseAddressRegister));
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auto pci_bar_space_size = PCI::get_BAR_space_size(pci_device_identifier, SpaceBaseAddressRegister);
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auto register_region = TRY(MM.allocate_kernel_region(pci_bar_address, pci_bar_space_size, {}, Memory::Region::Access::ReadWrite));
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auto register_region_size = TRY(Memory::page_round_up(pci_bar_address.offset_in_page() + pci_bar_space_size));
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auto register_region = TRY(MM.allocate_kernel_region(pci_bar_address.page_base(), register_region_size, {}, Memory::Region::Access::ReadWrite));
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VirtualAddress register_base_address = register_region->vaddr().offset(pci_bar_address.offset_in_page());
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PCI::enable_bus_mastering(pci_device_identifier);
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PCI::enable_memory_space(pci_device_identifier);
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auto controller = TRY(adopt_nonnull_lock_ref_or_enomem(new (nothrow) EHCIController(pci_device_identifier, move(register_region))));
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auto controller = TRY(adopt_nonnull_lock_ref_or_enomem(new (nothrow) EHCIController(pci_device_identifier, move(register_region), register_base_address)));
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TRY(controller->initialize());
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return controller;
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}
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EHCIController::EHCIController(PCI::DeviceIdentifier const& pci_device_identifier, NonnullOwnPtr<Memory::Region> register_region)
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EHCIController::EHCIController(PCI::DeviceIdentifier const& pci_device_identifier, NonnullOwnPtr<Memory::Region> register_region, VirtualAddress register_base_address)
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: PCI::Device(pci_device_identifier)
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, m_register_region(move(register_region))
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{
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m_cap_regs = bit_cast<CapabilityRegisters const*>(m_register_region->vaddr().get());
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m_op_regs = bit_cast<OperationalRegisters volatile*>(m_register_region->vaddr().get() + m_cap_regs->capability_length);
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m_cap_regs = bit_cast<CapabilityRegisters const*>(register_base_address.get());
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m_op_regs = bit_cast<OperationalRegisters volatile*>(register_base_address.get() + m_cap_regs->capability_length);
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}
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ErrorOr<void> EHCIController::initialize()
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@ -36,7 +36,7 @@ public:
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virtual ErrorOr<void> submit_async_interrupt_transfer(NonnullLockRefPtr<Transfer>, u16) override { return ENOTSUP; }
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private:
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EHCIController(PCI::DeviceIdentifier const& pci_device_identifier, NonnullOwnPtr<Memory::Region> register_region);
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EHCIController(PCI::DeviceIdentifier const& pci_device_identifier, NonnullOwnPtr<Memory::Region> register_region, VirtualAddress register_base_address);
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NonnullOwnPtr<Memory::Region> m_register_region;
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CapabilityRegisters const* m_cap_regs;
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