diff --git a/Userland/Libraries/LibWasm/AbstractMachine/BytecodeInterpreter.cpp b/Userland/Libraries/LibWasm/AbstractMachine/BytecodeInterpreter.cpp index 045a2d3fb25..ffb41333fb3 100644 --- a/Userland/Libraries/LibWasm/AbstractMachine/BytecodeInterpreter.cpp +++ b/Userland/Libraries/LibWasm/AbstractMachine/BytecodeInterpreter.cpp @@ -1700,24 +1700,30 @@ void BytecodeInterpreter::interpret(Configuration& configuration, InstructionPoi return pop_and_store_lane_n<32>(configuration, instruction); case Instructions::v128_store64_lane.value(): return pop_and_store_lane_n<64>(configuration, instruction); + case Instructions::i32x4_trunc_sat_f32x4_s.value(): + return unary_operation>>(configuration); + case Instructions::i32x4_trunc_sat_f32x4_u.value(): + return unary_operation>>(configuration); + case Instructions::i8x16_bitmask.value(): + return unary_operation>(configuration); + case Instructions::i16x8_bitmask.value(): + return unary_operation>(configuration); + case Instructions::i32x4_bitmask.value(): + return unary_operation>(configuration); + case Instructions::i64x2_bitmask.value(): + return unary_operation>(configuration); case Instructions::f32x4_demote_f64x2_zero.value(): case Instructions::f64x2_promote_low_f32x4.value(): - case Instructions::i8x16_bitmask.value(): case Instructions::i8x16_narrow_i16x8_s.value(): case Instructions::i8x16_narrow_i16x8_u.value(): case Instructions::i16x8_q15mulr_sat_s.value(): - case Instructions::i16x8_bitmask.value(): case Instructions::i16x8_narrow_i32x4_s.value(): case Instructions::i16x8_narrow_i32x4_u.value(): - case Instructions::i32x4_bitmask.value(): case Instructions::i32x4_dot_i16x8_s.value(): - case Instructions::i64x2_bitmask.value(): - case Instructions::i32x4_trunc_sat_f32x4_s.value(): - case Instructions::i32x4_trunc_sat_f32x4_u.value(): - case Instructions::f32x4_convert_i32x4_s.value(): - case Instructions::f32x4_convert_i32x4_u.value(): case Instructions::i32x4_trunc_sat_f64x2_s_zero.value(): case Instructions::i32x4_trunc_sat_f64x2_u_zero.value(): + case Instructions::f32x4_convert_i32x4_s.value(): + case Instructions::f32x4_convert_i32x4_u.value(): case Instructions::f64x2_convert_low_i32x4_s.value(): case Instructions::f64x2_convert_low_i32x4_u.value(): dbgln_if(WASM_TRACE_DEBUG, "Instruction '{}' not implemented", instruction_name(instruction.opcode())); diff --git a/Userland/Libraries/LibWasm/AbstractMachine/Operators.h b/Userland/Libraries/LibWasm/AbstractMachine/Operators.h index 69d8536fece..c41fa90c23b 100644 --- a/Userland/Libraries/LibWasm/AbstractMachine/Operators.h +++ b/Userland/Libraries/LibWasm/AbstractMachine/Operators.h @@ -710,6 +710,23 @@ struct VectorIntegerBinaryOp { } }; +template +struct VectorBitmask { + auto operator()(u128 lhs) const + { + using VectorType = NativeVectorType<128 / VectorSize, VectorSize, MakeSigned>; + auto value = bit_cast(lhs); + u32 result = 0; + + for (size_t i = 0; i < VectorSize; ++i) + result |= static_cast(value[i] < 0) << i; + + return result; + } + + static StringView name() { return "bitmask"sv; } +}; + template typename SetSign = MakeSigned> struct VectorIntegerUnaryOp { auto operator()(u128 lhs) const @@ -799,6 +816,34 @@ struct VectorFloatUnaryOp { } }; +template +struct VectorFloatConvertOp { + auto operator()(u128 lhs) const + { + using VectorInput = NativeFloatingVectorType<128, VectorSize, NativeFloatingType<128 / VectorSize>>; + using VectorResult = NativeVectorType<128 / VectorSize, VectorSize, MakeUnsigned>; + auto value = bit_cast(lhs); + VectorResult result; + Op op; + for (size_t i = 0; i < VectorSize; ++i) { + result[i] = op(value[i]); + } + return bit_cast(result); + } + + static StringView name() + { + switch (VectorSize) { + case 4: + return "vecf(32x4).cvt_op"sv; + case 2: + return "vecf(64x2).cvt_op"sv; + default: + VERIFY_NOT_REACHED(); + } + } +}; + struct Floor { template auto operator()(Lhs lhs) const