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Everywhere: Prefix hexadecimal numbers with 0x
Depending on the values it might be difficult to figure out whether a value is decimal or hexadecimal. So let's make this more obvious. Also this allows copying and pasting those numbers into GNOME calculator and probably also other apps which auto-detect the base.
This commit is contained in:
parent
7bfd319652
commit
31f30e732a
Notes:
sideshowbarker
2024-07-18 08:37:00 +09:00
Author: https://github.com/gunnarbeutner Commit: https://github.com/SerenityOS/serenity/commit/31f30e732a9 Pull-request: https://github.com/SerenityOS/serenity/pull/8925 Reviewed-by: https://github.com/awesomekling
15 changed files with 67 additions and 86 deletions
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@ -192,21 +192,21 @@ static void dump(const RegisterState& regs)
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dbgln("Exception code: {:04x} (isr: {:04x})", regs.exception_code, regs.isr_number);
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#if ARCH(I386)
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dbgln(" pc={:04x}:{:08x} eflags={:08x}", (u16)regs.cs, regs.eip, regs.eflags);
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dbgln(" stack={:04x}:{:08x}", ss, esp);
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dbgln(" ds={:04x} es={:04x} fs={:04x} gs={:04x}", (u16)regs.ds, (u16)regs.es, (u16)regs.fs, (u16)regs.gs);
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dbgln(" eax={:08x} ebx={:08x} ecx={:08x} edx={:08x}", regs.eax, regs.ebx, regs.ecx, regs.edx);
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dbgln(" ebp={:08x} esp={:08x} esi={:08x} edi={:08x}", regs.ebp, regs.esp, regs.esi, regs.edi);
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dbgln(" cr0={:08x} cr2={:08x} cr3={:08x} cr4={:08x}", read_cr0(), read_cr2(), read_cr3(), read_cr4());
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dbgln(" pc={:#04x}:{:p} eflags={:p}", (u16)regs.cs, regs.eip, regs.eflags);
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dbgln(" stack={:#04x}:{:p}", ss, esp);
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dbgln(" ds={:#04x} es={:#04x} fs={:#04x} gs={:#04x}", (u16)regs.ds, (u16)regs.es, (u16)regs.fs, (u16)regs.gs);
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dbgln(" eax={:p} ebx={:p} ecx={:p} edx={:p}", regs.eax, regs.ebx, regs.ecx, regs.edx);
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dbgln(" ebp={:p} esp={:p} esi={:p} edi={:p}", regs.ebp, regs.esp, regs.esi, regs.edi);
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dbgln(" cr0={:p} cr2={:p} cr3={:p} cr4={:p}", read_cr0(), read_cr2(), read_cr3(), read_cr4());
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#else
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dbgln(" pc={:04x}:{:16x} rflags={:16x}", (u16)regs.cs, regs.rip, regs.rflags);
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dbgln(" stack={:16x}", rsp);
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dbgln(" pc={:#04x}:{:p} rflags={:p}", (u16)regs.cs, regs.rip, regs.rflags);
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dbgln(" stack={:p}", rsp);
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// FIXME: Add fs_base and gs_base here
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dbgln(" rax={:16x} rbx={:16x} rcx={:16x} rdx={:16x}", regs.rax, regs.rbx, regs.rcx, regs.rdx);
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dbgln(" rbp={:16x} rsp={:16x} rsi={:16x} rdi={:16x}", regs.rbp, regs.rsp, regs.rsi, regs.rdi);
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dbgln(" r8={:16x} r9={:16x} r10={:16x} r11={:16x}", regs.r8, regs.r9, regs.r10, regs.r11);
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dbgln(" r12={:16x} r13={:16x} r14={:16x} r15={:16x}", regs.r12, regs.r13, regs.r14, regs.r15);
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dbgln(" cr0={:16x} cr2={:16x} cr3={:16x} cr4={:16x}", read_cr0(), read_cr2(), read_cr3(), read_cr4());
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dbgln(" rax={:p} rbx={:p} rcx={:p} rdx={:p}", regs.rax, regs.rbx, regs.rcx, regs.rdx);
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dbgln(" rbp={:p} rsp={:p} rsi={:p} rdi={:p}", regs.rbp, regs.rsp, regs.rsi, regs.rdi);
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dbgln(" r8={:p} r9={:p} r10={:p} r11={:p}", regs.r8, regs.r9, regs.r10, regs.r11);
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dbgln(" r12={:p} r13={:p} r14={:p} r15={:p}", regs.r12, regs.r13, regs.r14, regs.r15);
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dbgln(" cr0={:p} cr2={:p} cr3={:p} cr4={:p}", read_cr0(), read_cr2(), read_cr3(), read_cr4());
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#endif
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}
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@ -65,7 +65,7 @@ KResultOr<size_t> Pipe::control_transfer(u8 request_type, u8 request, u16 value,
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transfer->set_setup_packet(usb_request);
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dbgln_if(USB_DEBUG, "Pipe: Transfer allocated @ {:08x}", transfer->buffer_physical());
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dbgln_if(USB_DEBUG, "Pipe: Transfer allocated @ {}", transfer->buffer_physical());
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auto transfer_len_or_error = UHCIController::the().submit_control_transfer(*transfer);
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if (transfer_len_or_error.is_error())
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@ -295,12 +295,7 @@ bool Scheduler::context_switch(Thread* thread)
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from_thread->set_state(Thread::Runnable);
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#ifdef LOG_EVERY_CONTEXT_SWITCH
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const auto msg =
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# if ARCH(I386)
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"Scheduler[{}]: {} -> {} [prio={}] {:04x}:{:08x}";
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# else
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"Scheduler[{}]: {} -> {} [prio={}] {:04x}:{:16x}";
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# endif
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const auto msg = "Scheduler[{}]: {} -> {} [prio={}] {:#04x}:{:p}";
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dbgln(msg,
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Processor::id(), from_thread->tid().value(),
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@ -109,7 +109,7 @@ KResultOr<FlatPtr> handle(RegisterState& regs, FlatPtr function, FlatPtr arg1, F
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current_thread->did_syscall();
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if (function >= Function::__Count) {
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dbgln("Unknown syscall {} requested ({:08x}, {:08x}, {:08x})", function, arg1, arg2, arg3);
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dbgln("Unknown syscall {} requested ({:p}, {:p}, {:p})", function, arg1, arg2, arg3);
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return ENOSYS;
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}
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@ -64,7 +64,7 @@ KResultOr<FlatPtr> Process::sys$fork(RegisterState& regs)
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child_regs.gs = regs.gs;
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child_regs.ss = regs.userspace_ss;
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dbgln_if(FORK_DEBUG, "fork: child will begin executing at {:04x}:{:08x} with stack {:04x}:{:08x}, kstack {:04x}:{:08x}",
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dbgln_if(FORK_DEBUG, "fork: child will begin executing at {:#04x}:{:p} with stack {:#04x}:{:p}, kstack {:#04x}:{:p}",
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child_regs.cs, child_regs.eip, child_regs.ss, child_regs.esp, child_regs.ss0, child_regs.esp0);
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#else
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auto& child_regs = child_first_thread->m_regs;
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@ -88,7 +88,7 @@ KResultOr<FlatPtr> Process::sys$fork(RegisterState& regs)
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child_regs.rip = regs.rip;
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child_regs.cs = regs.cs;
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dbgln_if(FORK_DEBUG, "fork: child will begin executing at {:04x}:{:16x} with stack {:08x}, kstack {:08x}",
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dbgln_if(FORK_DEBUG, "fork: child will begin executing at {:#04x}:{:p} with stack {:p}, kstack {:p}",
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child_regs.cs, child_regs.rip, child_regs.rsp, child_regs.rsp0);
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#endif
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@ -1030,11 +1030,7 @@ DispatchSignalResult Thread::dispatch_signal(u8 signal)
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auto signal_trampoline_addr = process.signal_trampoline().get();
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regs.set_ip_reg(signal_trampoline_addr);
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#if ARCH(I386)
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dbgln_if(SIGNAL_DEBUG, "Thread in state '{}' has been primed with signal handler {:04x}:{:08x} to deliver {}", state_string(), m_regs.cs, m_regs.ip(), signal);
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#else
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dbgln_if(SIGNAL_DEBUG, "Thread in state '{}' has been primed with signal handler {:04x}:{:16x} to deliver {}", state_string(), m_regs.cs, m_regs.ip(), signal);
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#endif
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dbgln_if(SIGNAL_DEBUG, "Thread in state '{}' has been primed with signal handler {:#04x}:{:p} to deliver {}", state_string(), m_regs.cs, m_regs.ip(), signal);
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return DispatchSignalResult::Continue;
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}
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@ -1121,10 +1121,10 @@ void MemoryManager::unregister_region(Region& region)
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void MemoryManager::dump_kernel_regions()
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{
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dbgln("Kernel regions:");
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dbgln("BEGIN END SIZE ACCESS NAME");
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dbgln("BEGIN END SIZE ACCESS NAME");
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ScopedSpinLock lock(s_mm_lock);
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for (auto& region : m_kernel_regions) {
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dbgln("{:08x} -- {:08x} {:08x} {:c}{:c}{:c}{:c}{:c}{:c} {}",
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dbgln("{:p} -- {:p} {:p} {:c}{:c}{:c}{:c}{:c}{:c} {}",
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region.vaddr().get(),
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region.vaddr().offset(region.size() - 1).get(),
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region.size(),
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@ -63,6 +63,6 @@ template<>
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struct AK::Formatter<Kernel::Range> : Formatter<FormatString> {
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void format(FormatBuilder& builder, Kernel::Range value)
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{
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return Formatter<FormatString>::format(builder, "{} - {} (size 0x{:08x})", value.base().as_ptr(), value.base().offset(value.size() - 1).as_ptr(), value.size());
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return Formatter<FormatString>::format(builder, "{} - {} (size {:p})", value.base().as_ptr(), value.base().offset(value.size() - 1).as_ptr(), value.size());
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}
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};
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@ -316,13 +316,13 @@ KResultOr<Vector<Region*, 2>> Space::try_split_region_around_range(const Region&
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void Space::dump_regions()
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{
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dbgln("Process regions:");
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dbgln("BEGIN END SIZE ACCESS NAME");
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dbgln("BEGIN END SIZE ACCESS NAME");
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ScopedSpinLock lock(m_lock);
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for (auto& sorted_region : m_regions) {
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auto& region = *sorted_region;
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dbgln("{:08x} -- {:08x} {:08x} {:c}{:c}{:c}{:c}{:c}{:c} {}", region.vaddr().get(), region.vaddr().offset(region.size() - 1).get(), region.size(),
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dbgln("{:p} -- {:p} {:p} {:c}{:c}{:c}{:c}{:c}{:c} {}", region.vaddr().get(), region.vaddr().offset(region.size() - 1).get(), region.size(),
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region.is_readable() ? 'R' : ' ',
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region.is_writable() ? 'W' : ' ',
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region.is_executable() ? 'X' : ' ',
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@ -86,21 +86,15 @@ static TitleAndText build_cpu_registers(const ELF::Core::ThreadInfo& thread_info
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StringBuilder builder;
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#if ARCH(I386)
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builder.appendff("eax={:08x} ebx={:08x} ecx={:08x} edx={:08x}", regs.eax, regs.ebx, regs.ecx, regs.edx);
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builder.append('\n');
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builder.appendff("ebp={:08x} esp={:08x} esi={:08x} edi={:08x}", regs.ebp, regs.esp, regs.esi, regs.edi);
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builder.append('\n');
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builder.appendff("eip={:08x} eflags={:08x}", regs.eip, regs.eflags);
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builder.appendff("eax={:p} ebx={:p} ecx={:p} edx={:p}\n", regs.eax, regs.ebx, regs.ecx, regs.edx);
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builder.appendff("ebp={:p} esp={:p} esi={:p} edi={:p}\n", regs.ebp, regs.esp, regs.esi, regs.edi);
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builder.appendff("eip={:p} eflags={:p}", regs.eip, regs.eflags);
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#else
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builder.appendff("rax={:16x} rbx={:16x} rcx={:16x} rdx={:16x}", regs.rax, regs.rbx, regs.rcx, regs.rdx);
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builder.append('\n');
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builder.appendff("rbp={:16x} rsp={:16x} rsi={:16x} rdi={:16x}", regs.rbp, regs.rsp, regs.rsi, regs.rdi);
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builder.append('\n');
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builder.appendff(" r8={:16x} r9={:16x} r10={:16x} r11={:16x}", regs.r8, regs.r9, regs.r10, regs.r11);
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builder.append('\n');
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builder.appendff("r12={:16x} r13={:16x} r14={:16x} r15={:16x}", regs.r12, regs.r13, regs.r14, regs.r15);
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builder.append('\n');
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builder.appendff("rip={:16x} rflags={:16x}", regs.rip, regs.rflags);
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builder.appendff("rax={:p} rbx={:p} rcx={:p} rdx={:p}\n", regs.rax, regs.rbx, regs.rcx, regs.rdx);
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builder.appendff("rbp={:p} rsp={:p} rsi={:p} rdi={:p}\n", regs.rbp, regs.rsp, regs.rsi, regs.rdi);
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builder.appendff(" r8={:p} r9={:p} r10={:p} r11={:p}\n", regs.r8, regs.r9, regs.r10, regs.r11);
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builder.appendff("r12={:p} r13={:p} r14={:p} r15={:p}\n", regs.r12, regs.r13, regs.r14, regs.r15);
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builder.appendff("rip={:p} rflags={:p}", regs.rip, regs.rflags);
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#endif
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return {
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@ -39,13 +39,13 @@ static void handle_sigint(int)
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static void handle_print_registers(const PtraceRegisters& regs)
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{
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#if ARCH(I386)
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outln("eax={:08x} ebx={:08x} ecx={:08x} edx={:08x}", regs.eax, regs.ebx, regs.ecx, regs.edx);
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outln("esp={:08x} ebp={:08x} esi={:08x} edi={:08x}", regs.esp, regs.ebp, regs.esi, regs.edi);
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outln("eip={:08x} eflags={:08x}", regs.eip, regs.eflags);
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outln("eax={:p} ebx={:p} ecx={:p} edx={:p}", regs.eax, regs.ebx, regs.ecx, regs.edx);
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outln("esp={:p} ebp={:p} esi={:p} edi={:p}", regs.esp, regs.ebp, regs.esi, regs.edi);
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outln("eip={:p} eflags={:p}", regs.eip, regs.eflags);
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#else
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outln("rax={:016x} rbx={:016x} rcx={:016x} rdx={:016x}", regs.rax, regs.rbx, regs.rcx, regs.rdx);
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outln("rsp={:016x} rbp={:016x} rsi={:016x} rdi={:016x}", regs.rsp, regs.rbp, regs.rsi, regs.rdi);
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outln("rip={:016x} rflags={:08x}", regs.rip, regs.rflags);
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outln("rax={:p} rbx={:p} rcx={:p} rdx={:p}", regs.rax, regs.rbx, regs.rcx, regs.rdx);
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outln("rsp={:p} rbp={:p} rsi={:p} rdi={:p}", regs.rsp, regs.rbp, regs.rsi, regs.rdi);
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outln("rip={:p} rflags={:p}", regs.rip, regs.rflags);
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#endif
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}
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@ -87,7 +87,7 @@ GUI::Variant RegistersModel::data(const GUI::ModelIndex& index, GUI::ModelRole r
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if (index.column() == Column::Register)
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return reg.name;
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if (index.column() == Column::Value)
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return String::formatted("{:08x}", reg.value);
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return String::formatted("{:p}", reg.value);
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return {};
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}
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return {};
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@ -79,9 +79,9 @@ SoftCPU::SoftCPU(Emulator& emulator)
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void SoftCPU::dump() const
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{
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outln(" eax={:08x} ebx={:08x} ecx={:08x} edx={:08x} ebp={:08x} esp={:08x} esi={:08x} edi={:08x} o={:d} s={:d} z={:d} a={:d} p={:d} c={:d}",
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outln(" eax={:p} ebx={:p} ecx={:p} edx={:p} ebp={:p} esp={:p} esi={:p} edi={:p} o={:d} s={:d} z={:d} a={:d} p={:d} c={:d}",
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eax(), ebx(), ecx(), edx(), ebp(), esp(), esi(), edi(), of(), sf(), zf(), af(), pf(), cf());
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outln("#eax={:08x} #ebx={:08x} #ecx={:08x} #edx={:08x} #ebp={:08x} #esp={:08x} #esi={:08x} #edi={:08x} #f={}",
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outln("#eax={:p} #ebx={:p} #ecx={:p} #edx={:p} #ebp={:p} #esp={:p} #esi={:p} #edi={:p} #f={}",
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eax().shadow(), ebx().shadow(), ecx().shadow(), edx().shadow(), ebp().shadow(), esp().shadow(), esi().shadow(), edi().shadow(), m_flags_tainted);
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fflush(stdout);
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}
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@ -106,7 +106,7 @@ ValueWithShadow<u8> SoftCPU::read_memory8(X86::LogicalAddress address)
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{
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VERIFY(address.selector() == 0x1b || address.selector() == 0x23 || address.selector() == 0x2b);
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auto value = m_emulator.mmu().read8(address);
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outln_if(MEMORY_DEBUG, "\033[36;1mread_memory8: @{:04x}:{:08x} -> {:02x} ({:02x})\033[0m", address.selector(), address.offset(), value, value.shadow());
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outln_if(MEMORY_DEBUG, "\033[36;1mread_memory8: @{:#04x}:{:p} -> {:#02x} ({:#02x})\033[0m", address.selector(), address.offset(), value, value.shadow());
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return value;
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}
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@ -114,7 +114,7 @@ ValueWithShadow<u16> SoftCPU::read_memory16(X86::LogicalAddress address)
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{
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VERIFY(address.selector() == 0x1b || address.selector() == 0x23 || address.selector() == 0x2b);
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auto value = m_emulator.mmu().read16(address);
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outln_if(MEMORY_DEBUG, "\033[36;1mread_memory16: @{:04x}:{:08x} -> {:04x} ({:04x})\033[0m", address.selector(), address.offset(), value, value.shadow());
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outln_if(MEMORY_DEBUG, "\033[36;1mread_memory16: @{:#04x}:{:p} -> {:#04x} ({:#04x})\033[0m", address.selector(), address.offset(), value, value.shadow());
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return value;
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}
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@ -122,7 +122,7 @@ ValueWithShadow<u32> SoftCPU::read_memory32(X86::LogicalAddress address)
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{
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VERIFY(address.selector() == 0x1b || address.selector() == 0x23 || address.selector() == 0x2b);
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auto value = m_emulator.mmu().read32(address);
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outln_if(MEMORY_DEBUG, "\033[36;1mread_memory32: @{:04x}:{:08x} -> {:08x} ({:08x})\033[0m", address.selector(), address.offset(), value, value.shadow());
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outln_if(MEMORY_DEBUG, "\033[36;1mread_memory32: @{:#04x}:{:p} -> {:#08x} ({:#08x})\033[0m", address.selector(), address.offset(), value, value.shadow());
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return value;
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}
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@ -130,7 +130,7 @@ ValueWithShadow<u64> SoftCPU::read_memory64(X86::LogicalAddress address)
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{
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VERIFY(address.selector() == 0x1b || address.selector() == 0x23 || address.selector() == 0x2b);
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auto value = m_emulator.mmu().read64(address);
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outln_if(MEMORY_DEBUG, "\033[36;1mread_memory64: @{:04x}:{:08x} -> {:016x} ({:016x})\033[0m", address.selector(), address.offset(), value, value.shadow());
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outln_if(MEMORY_DEBUG, "\033[36;1mread_memory64: @{:#04x}:{:p} -> {:#016x} ({:#016x})\033[0m", address.selector(), address.offset(), value, value.shadow());
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||||
return value;
|
||||
}
|
||||
|
||||
|
@ -138,56 +138,56 @@ ValueWithShadow<u128> SoftCPU::read_memory128(X86::LogicalAddress address)
|
|||
{
|
||||
VERIFY(address.selector() == 0x1b || address.selector() == 0x23 || address.selector() == 0x2b);
|
||||
auto value = m_emulator.mmu().read128(address);
|
||||
outln_if(MEMORY_DEBUG, "\033[36;1mread_memory128: @{:04x}:{:08x} -> {:032x} ({:032x})\033[0m", address.selector(), address.offset(), value, value.shadow());
|
||||
outln_if(MEMORY_DEBUG, "\033[36;1mread_memory128: @{:#04x}:{:p} -> {:#032x} ({:#032x})\033[0m", address.selector(), address.offset(), value, value.shadow());
|
||||
return value;
|
||||
}
|
||||
ValueWithShadow<u256> SoftCPU::read_memory256(X86::LogicalAddress address)
|
||||
{
|
||||
VERIFY(address.selector() == 0x1b || address.selector() == 0x23 || address.selector() == 0x2b);
|
||||
auto value = m_emulator.mmu().read256(address);
|
||||
outln_if(MEMORY_DEBUG, "\033[36;1mread_memory256: @{:04x}:{:08x} -> {:064x} ({:064x})\033[0m", address.selector(), address.offset(), value, value.shadow());
|
||||
outln_if(MEMORY_DEBUG, "\033[36;1mread_memory256: @{:#04x}:{:p} -> {:#064x} ({:#064x})\033[0m", address.selector(), address.offset(), value, value.shadow());
|
||||
return value;
|
||||
}
|
||||
|
||||
void SoftCPU::write_memory8(X86::LogicalAddress address, ValueWithShadow<u8> value)
|
||||
{
|
||||
VERIFY(address.selector() == 0x23 || address.selector() == 0x2b);
|
||||
outln_if(MEMORY_DEBUG, "\033[36;1mwrite_memory8: @{:04x}:{:08x} <- {:02x} ({:02x})\033[0m", address.selector(), address.offset(), value, value.shadow());
|
||||
outln_if(MEMORY_DEBUG, "\033[36;1mwrite_memory8: @{:#04x}:{:p} <- {:#02x} ({:#02x})\033[0m", address.selector(), address.offset(), value, value.shadow());
|
||||
m_emulator.mmu().write8(address, value);
|
||||
}
|
||||
|
||||
void SoftCPU::write_memory16(X86::LogicalAddress address, ValueWithShadow<u16> value)
|
||||
{
|
||||
VERIFY(address.selector() == 0x23 || address.selector() == 0x2b);
|
||||
outln_if(MEMORY_DEBUG, "\033[36;1mwrite_memory16: @{:04x}:{:08x} <- {:04x} ({:04x})\033[0m", address.selector(), address.offset(), value, value.shadow());
|
||||
outln_if(MEMORY_DEBUG, "\033[36;1mwrite_memory16: @{:#04x}:{:p} <- {:#04x} ({:#04x})\033[0m", address.selector(), address.offset(), value, value.shadow());
|
||||
m_emulator.mmu().write16(address, value);
|
||||
}
|
||||
|
||||
void SoftCPU::write_memory32(X86::LogicalAddress address, ValueWithShadow<u32> value)
|
||||
{
|
||||
VERIFY(address.selector() == 0x23 || address.selector() == 0x2b);
|
||||
outln_if(MEMORY_DEBUG, "\033[36;1mwrite_memory32: @{:04x}:{:08x} <- {:08x} ({:08x})\033[0m", address.selector(), address.offset(), value, value.shadow());
|
||||
outln_if(MEMORY_DEBUG, "\033[36;1mwrite_memory32: @{:#04x}:{:p} <- {:#08x} ({:#08x})\033[0m", address.selector(), address.offset(), value, value.shadow());
|
||||
m_emulator.mmu().write32(address, value);
|
||||
}
|
||||
|
||||
void SoftCPU::write_memory64(X86::LogicalAddress address, ValueWithShadow<u64> value)
|
||||
{
|
||||
VERIFY(address.selector() == 0x23 || address.selector() == 0x2b);
|
||||
outln_if(MEMORY_DEBUG, "\033[36;1mwrite_memory64: @{:04x}:{:08x} <- {:016x} ({:016x})\033[0m", address.selector(), address.offset(), value, value.shadow());
|
||||
outln_if(MEMORY_DEBUG, "\033[36;1mwrite_memory64: @{:#04x}:{:p} <- {:#016x} ({:#016x})\033[0m", address.selector(), address.offset(), value, value.shadow());
|
||||
m_emulator.mmu().write64(address, value);
|
||||
}
|
||||
|
||||
void SoftCPU::write_memory128(X86::LogicalAddress address, ValueWithShadow<u128> value)
|
||||
{
|
||||
VERIFY(address.selector() == 0x23 || address.selector() == 0x2b);
|
||||
outln_if(MEMORY_DEBUG, "\033[36;1mwrite_memory128: @{:04x}:{:08x} <- {:032x} ({:032x})\033[0m", address.selector(), address.offset(), value, value.shadow());
|
||||
outln_if(MEMORY_DEBUG, "\033[36;1mwrite_memory128: @{:#04x}:{:p} <- {:#032x} ({:#032x})\033[0m", address.selector(), address.offset(), value, value.shadow());
|
||||
m_emulator.mmu().write128(address, value);
|
||||
}
|
||||
|
||||
void SoftCPU::write_memory256(X86::LogicalAddress address, ValueWithShadow<u256> value)
|
||||
{
|
||||
VERIFY(address.selector() == 0x23 || address.selector() == 0x2b);
|
||||
outln_if(MEMORY_DEBUG, "\033[36;1mwrite_memory256: @{:04x}:{:08x} <- {:064x} ({:064x})\033[0m", address.selector(), address.offset(), value, value.shadow());
|
||||
outln_if(MEMORY_DEBUG, "\033[36;1mwrite_memory256: @{:#04x}:{:p} <- {:#064x} ({:#064x})\033[0m", address.selector(), address.offset(), value, value.shadow());
|
||||
m_emulator.mmu().write256(address, value);
|
||||
}
|
||||
|
||||
|
@ -1327,7 +1327,7 @@ void SoftCPU::CPUID(const X86::Instruction&)
|
|||
return;
|
||||
}
|
||||
|
||||
dbgln("Unhandled CPUID with eax={:08x}", eax().value());
|
||||
dbgln("Unhandled CPUID with eax={:p}", eax().value());
|
||||
}
|
||||
|
||||
void SoftCPU::CWD(const X86::Instruction&)
|
||||
|
|
|
@ -44,9 +44,9 @@ int main(int argc, char** argv)
|
|||
outln("{}:", pid);
|
||||
|
||||
if (extended) {
|
||||
outln("Address Size Resident Dirty Access VMObject Type Purgeable CoW Pages Name");
|
||||
outln("Address Size Resident Dirty Access VMObject Type Purgeable CoW Pages Name");
|
||||
} else {
|
||||
outln("Address Size Access Name");
|
||||
outln("Address Size Access Name");
|
||||
}
|
||||
|
||||
auto file_contents = file->read_all();
|
||||
|
@ -74,11 +74,7 @@ int main(int argc, char** argv)
|
|||
(map.get("shared").to_bool() ? "s" : "-"),
|
||||
(map.get("syscall").to_bool() ? "c" : "-"));
|
||||
|
||||
#if ARCH(I386)
|
||||
out("{:08x} ", address);
|
||||
#else
|
||||
out("{:16x} ", address);
|
||||
#endif
|
||||
out("{:p} ", address);
|
||||
out("{:>10} ", size);
|
||||
if (extended) {
|
||||
auto resident = map.get("amount_resident").to_string();
|
||||
|
|
|
@ -530,14 +530,14 @@ int main(int argc, char** argv)
|
|||
outln("There are no sections in this file.");
|
||||
} else {
|
||||
outln("Section Headers:");
|
||||
outln(" Name Type Address Offset Size Flags");
|
||||
outln(" Name Type Address Offset Size Flags");
|
||||
|
||||
elf_image.for_each_section([](const ELF::Image::Section& section) {
|
||||
out(" {:19} ", section.name());
|
||||
out("{:15} ", object_section_header_type_to_string(section.type()));
|
||||
out("{:08x} ", section.address());
|
||||
out("{:08x} ", section.offset());
|
||||
out("{:08x} ", section.size());
|
||||
out("{:p} ", section.address());
|
||||
out("{:p} ", section.offset());
|
||||
out("{:p} ", section.size());
|
||||
out("{}", section.flags());
|
||||
outln();
|
||||
});
|
||||
|
@ -714,11 +714,11 @@ int main(int argc, char** argv)
|
|||
|
||||
if (object->symbol_count()) {
|
||||
// FIXME: Add support for init/fini/start/main sections
|
||||
outln(" Num: Value Size Type Bind Name");
|
||||
outln(" Num: Value Size Type Bind Name");
|
||||
object->for_each_symbol([](const ELF::DynamicObject::Symbol& sym) {
|
||||
out(" {:>4}: ", sym.index());
|
||||
out("{:08x} ", sym.value());
|
||||
out("{:08x} ", sym.size());
|
||||
out("{:p} ", sym.value());
|
||||
out("{:p} ", sym.size());
|
||||
out("{:8} ", object_symbol_type_to_string(sym.type()));
|
||||
out("{:8} ", object_symbol_binding_to_string(sym.bind()));
|
||||
out("{}", sym.name());
|
||||
|
@ -736,12 +736,12 @@ int main(int argc, char** argv)
|
|||
if (display_symbol_table) {
|
||||
if (elf_image.symbol_count()) {
|
||||
outln("Symbol table '{}' contains {} entries:", ELF_SYMTAB, elf_image.symbol_count());
|
||||
outln(" Num: Value Size Type Bind Name");
|
||||
outln(" Num: Value Size Type Bind Name");
|
||||
|
||||
elf_image.for_each_symbol([](const ELF::Image::Symbol& sym) {
|
||||
out(" {:>4}: ", sym.index());
|
||||
out("{:08x} ", sym.value());
|
||||
out("{:08x} ", sym.size());
|
||||
out("{:p} ", sym.value());
|
||||
out("{:p} ", sym.size());
|
||||
out("{:8} ", object_symbol_type_to_string(sym.type()));
|
||||
out("{:8} ", object_symbol_binding_to_string(sym.bind()));
|
||||
out("{}", sym.name());
|
||||
|
|
Loading…
Add table
Reference in a new issue