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Kernel: Support all Intel-defined CPUID feature flags for EAX=1
We're now able to detect all the regular CPUID feature flags from ECX/EDX for EAX=1 :^) None of the new ones are being used for anything yet, but they will show up in /proc/cpuinfo and subsequently lscpu and SystemMonitor. Note that I replaced the periods from the SSE 4.1 and 4.2 instructions with underscores, which matches the internal enum names, Linux's /proc/cpuinfo and the general pattern of replacing special characters with underscores to limit feature names to [a-z0-9_]. The enum member stringification has been moved to a new function for better re-usability and to avoid cluttering up Processor.cpp.
This commit is contained in:
Linus Groh
Andreas Kling
parent
bc7ec02a82
commit
6ca03b915e
Notes:
sideshowbarker
2024-07-17 16:39:31 +09:00
Author: https://github.com/linusg Commit: https://github.com/SerenityOS/serenity/commit/6ca03b915e Pull-request: https://github.com/SerenityOS/serenity/pull/13290 Reviewed-by: https://github.com/bgianfo ✅
5 changed files with 337 additions and 91 deletions
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@ -38,33 +38,88 @@ private:
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};
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AK_MAKE_ARBITRARY_SIZED_ENUM(CPUFeature, u128,
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NX = CPUFeature(1u) << 0u,
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PAE = CPUFeature(1u) << 1u,
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PGE = CPUFeature(1u) << 2u,
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RDRAND = CPUFeature(1u) << 3u,
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RDSEED = CPUFeature(1u) << 4u,
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SMAP = CPUFeature(1u) << 5u,
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SMEP = CPUFeature(1u) << 6u,
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SSE = CPUFeature(1u) << 7u,
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TSC = CPUFeature(1u) << 8u,
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RDTSCP = CPUFeature(1u) << 9u,
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CONSTANT_TSC = CPUFeature(1u) << 10u,
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NONSTOP_TSC = CPUFeature(1u) << 11u,
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UMIP = CPUFeature(1u) << 12u,
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SEP = CPUFeature(1u) << 13u,
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SYSCALL = CPUFeature(1u) << 14u,
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MMX = CPUFeature(1u) << 15u,
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SSE2 = CPUFeature(1u) << 16u,
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SSE3 = CPUFeature(1u) << 17u,
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SSSE3 = CPUFeature(1u) << 18u,
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SSE4_1 = CPUFeature(1u) << 19u,
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SSE4_2 = CPUFeature(1u) << 20u,
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XSAVE = CPUFeature(1u) << 21u,
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AVX = CPUFeature(1u) << 22u,
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FXSR = CPUFeature(1u) << 23u,
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LM = CPUFeature(1u) << 24u,
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HYPERVISOR = CPUFeature(1u) << 25u,
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PAT = CPUFeature(1u) << 26u,
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__End = CPUFeature(1u) << 27u);
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/* EAX=1, ECX */ //
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SSE3 = CPUFeature(1u) << 0u, // Streaming SIMD Extensions 3
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PCLMULQDQ = CPUFeature(1u) << 1u, // PCLMULDQ Instruction
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DTES64 = CPUFeature(1u) << 2u, // 64-Bit Debug Store
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MONITOR = CPUFeature(1u) << 3u, // MONITOR/MWAIT Instructions
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DS_CPL = CPUFeature(1u) << 4u, // CPL Qualified Debug Store
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VMX = CPUFeature(1u) << 5u, // Virtual Machine Extensions
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SMX = CPUFeature(1u) << 6u, // Safer Mode Extensions
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EST = CPUFeature(1u) << 7u, // Enhanced Intel SpeedStep® Technology
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TM2 = CPUFeature(1u) << 8u, // Thermal Monitor 2
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SSSE3 = CPUFeature(1u) << 9u, // Supplemental Streaming SIMD Extensions 3
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CNXT_ID = CPUFeature(1u) << 10u, // L1 Context ID
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SDBG = CPUFeature(1u) << 11u, // Silicon Debug (IA32_DEBUG_INTERFACE MSR)
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FMA = CPUFeature(1u) << 12u, // Fused Multiply Add
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CX16 = CPUFeature(1u) << 13u, // CMPXCHG16B Instruction
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XTPR = CPUFeature(1u) << 14u, // xTPR Update Control
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PDCM = CPUFeature(1u) << 15u, // Perfmon and Debug Capability (IA32_PERF_CAPABILITIES MSR)
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/* ECX Bit 16 */ // Reserved
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PCID = CPUFeature(1u) << 17u, // Process Context Identifiers
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DCA = CPUFeature(1u) << 18u, // Direct Cache Access
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SSE4_1 = CPUFeature(1u) << 19u, // Streaming SIMD Extensions 4.1
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SSE4_2 = CPUFeature(1u) << 20u, // Streaming SIMD Extensions 4.2
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X2APIC = CPUFeature(1u) << 21u, // Extended xAPIC Support
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MOVBE = CPUFeature(1u) << 22u, // MOVBE Instruction
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POPCNT = CPUFeature(1u) << 23u, // POPCNT Instruction
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TSC_DEADLINE = CPUFeature(1u) << 24u, // Time Stamp Counter Deadline
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AES = CPUFeature(1u) << 25u, // AES Instruction Extensions
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XSAVE = CPUFeature(1u) << 26u, // XSAVE/XSTOR States
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OSXSAVE = CPUFeature(1u) << 27u, // OS-Enabled Extended State Management
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AVX = CPUFeature(1u) << 28u, // Advanced Vector Extensions
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F16C = CPUFeature(1u) << 29u, // 16-bit floating-point conversion instructions
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RDRAND = CPUFeature(1u) << 30u, // RDRAND Instruction
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HYPERVISOR = CPUFeature(1u) << 31u, // Hypervisor present (always zero on physical CPUs)
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/* EAX=1, EDX */ //
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FPU = CPUFeature(1u) << 32u, // Floating-point Unit On-Chip
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VME = CPUFeature(1u) << 33u, // Virtual Mode Extension
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DE = CPUFeature(1u) << 34u, // Debugging Extension
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PSE = CPUFeature(1u) << 35u, // Page Size Extension
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TSC = CPUFeature(1u) << 36u, // Time Stamp Counter
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MSR = CPUFeature(1u) << 37u, // Model Specific Registers
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PAE = CPUFeature(1u) << 38u, // Physical Address Extension
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MCE = CPUFeature(1u) << 39u, // Machine-Check Exception
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CX8 = CPUFeature(1u) << 40u, // CMPXCHG8 Instruction
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APIC = CPUFeature(1u) << 41u, // On-chip APIC Hardware
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/* EDX Bit 10 */ // Reserved
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SEP = CPUFeature(1u) << 43u, // Fast System Call
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MTRR = CPUFeature(1u) << 44u, // Memory Type Range Registers
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PGE = CPUFeature(1u) << 45u, // Page Global Enable
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MCA = CPUFeature(1u) << 46u, // Machine-Check Architecture
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CMOV = CPUFeature(1u) << 47u, // Conditional Move Instruction
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PAT = CPUFeature(1u) << 48u, // Page Attribute Table
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PSE36 = CPUFeature(1u) << 49u, // 36-bit Page Size Extension
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PSN = CPUFeature(1u) << 50u, // Processor serial number is present and enabled
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CLFLUSH = CPUFeature(1u) << 51u, // CLFLUSH Instruction
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/* EDX Bit 20 */ // Reserved
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DS = CPUFeature(1u) << 53u, // CLFLUSH Instruction
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ACPI = CPUFeature(1u) << 54u, // CLFLUSH Instruction
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MMX = CPUFeature(1u) << 55u, // CLFLUSH Instruction
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FXSR = CPUFeature(1u) << 56u, // CLFLUSH Instruction
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SSE = CPUFeature(1u) << 57u, // Streaming SIMD Extensions
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SSE2 = CPUFeature(1u) << 58u, // Streaming SIMD Extensions 2
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SS = CPUFeature(1u) << 59u, // Self-Snoop
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HTT = CPUFeature(1u) << 60u, // Multi-Threading
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TM = CPUFeature(1u) << 61u, // Thermal Monitor
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IA64 = CPUFeature(1u) << 62u, // IA64 processor emulating x86
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PBE = CPUFeature(1u) << 63u, // Pending Break Enable
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/* EAX=7, EBX */ //
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SMEP = CPUFeature(1u) << 64u, // Supervisor Mode Execution Protection
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RDSEED = CPUFeature(1u) << 65u, // RDSEED Instruction
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SMAP = CPUFeature(1u) << 66u, // Supervisor Mode Access Prevention
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/* EAX=7, ECX */ //
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UMIP = CPUFeature(1u) << 67u, // User-Mode Instruction Prevention
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/* EAX=80000001h, EDX */ //
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SYSCALL = CPUFeature(1u) << 68u, // SYSCALL/SYSRET Instructions
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NX = CPUFeature(1u) << 69u, // NX bit
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RDTSCP = CPUFeature(1u) << 70u, // RDTSCP Instruction
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LM = CPUFeature(1u) << 71u, // Long Mode
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/* EAX=80000007h, EDX */ //
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CONSTANT_TSC = CPUFeature(1u) << 72u, // Invariant TSC
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NONSTOP_TSC = CPUFeature(1u) << 73u, // Invariant TSC
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__End = CPUFeature(1u) << 127u);
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StringView cpu_feature_to_string_view(CPUFeature::Type const&);
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}
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160
Kernel/Arch/x86/common/CPUID.cpp
Normal file
160
Kernel/Arch/x86/common/CPUID.cpp
Normal file
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@ -0,0 +1,160 @@
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/*
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* Copyright (c) 2022, Linus Groh <linusg@serenityos.org>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <Kernel/Arch/x86/CPUID.h>
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namespace Kernel {
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StringView cpu_feature_to_string_view(CPUFeature::Type const& feature)
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{
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if (feature == CPUFeature::SSE3)
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return "sse3"sv;
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if (feature == CPUFeature::PCLMULQDQ)
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return "pclmulqdq"sv;
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if (feature == CPUFeature::DTES64)
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return "dtes64"sv;
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if (feature == CPUFeature::MONITOR)
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return "monitor"sv;
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if (feature == CPUFeature::DS_CPL)
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return "ds_cpl"sv;
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if (feature == CPUFeature::VMX)
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return "vmx"sv;
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if (feature == CPUFeature::SMX)
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return "smx"sv;
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if (feature == CPUFeature::EST)
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return "est"sv;
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if (feature == CPUFeature::TM2)
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return "tm2"sv;
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if (feature == CPUFeature::SSSE3)
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return "ssse3"sv;
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// NOTE: This is called cid on Linux, but CNXT_ID in the Intel manual.
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if (feature == CPUFeature::CNXT_ID)
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return "cnxt_id"sv;
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if (feature == CPUFeature::SDBG)
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return "sdbg"sv;
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if (feature == CPUFeature::FMA)
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return "fma"sv;
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if (feature == CPUFeature::CX16)
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return "cx16"sv;
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if (feature == CPUFeature::XTPR)
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return "xtpr"sv;
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if (feature == CPUFeature::PDCM)
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return "pdcm"sv;
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if (feature == CPUFeature::PCID)
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return "pcid"sv;
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if (feature == CPUFeature::DCA)
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return "dca"sv;
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if (feature == CPUFeature::SSE4_1)
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return "sse4_1"sv;
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if (feature == CPUFeature::SSE4_2)
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return "sse4_2"sv;
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if (feature == CPUFeature::X2APIC)
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return "x2apic"sv;
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if (feature == CPUFeature::MOVBE)
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return "movbe"sv;
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if (feature == CPUFeature::POPCNT)
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return "popcnt"sv;
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// NOTE: This is called tsc_deadline_timer on Linux, but TSC_DEADLINE in the Intel manual.
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if (feature == CPUFeature::TSC_DEADLINE)
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return "tsc_deadline"sv;
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if (feature == CPUFeature::AES)
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return "aes"sv;
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if (feature == CPUFeature::XSAVE)
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return "xsave"sv;
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if (feature == CPUFeature::OSXSAVE)
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return "osxsave"sv;
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if (feature == CPUFeature::AVX)
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return "avx"sv;
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if (feature == CPUFeature::F16C)
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return "f16c"sv;
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if (feature == CPUFeature::RDRAND)
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return "rdrand"sv;
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if (feature == CPUFeature::HYPERVISOR)
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return "hypervisor"sv;
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if (feature == CPUFeature::FPU)
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return "fpu"sv;
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if (feature == CPUFeature::VME)
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return "vme"sv;
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if (feature == CPUFeature::DE)
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return "de"sv;
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if (feature == CPUFeature::PSE)
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return "pse"sv;
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if (feature == CPUFeature::TSC)
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return "tsc"sv;
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if (feature == CPUFeature::MSR)
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return "msr"sv;
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if (feature == CPUFeature::PAE)
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return "pae"sv;
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if (feature == CPUFeature::MCE)
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return "mce"sv;
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if (feature == CPUFeature::CX8)
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return "cx8"sv;
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if (feature == CPUFeature::APIC)
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return "apic"sv;
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if (feature == CPUFeature::SEP)
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return "sep"sv;
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if (feature == CPUFeature::MTRR)
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return "mtrr"sv;
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if (feature == CPUFeature::PGE)
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return "pge"sv;
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if (feature == CPUFeature::MCA)
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return "mca"sv;
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if (feature == CPUFeature::CMOV)
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return "cmov"sv;
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if (feature == CPUFeature::PAT)
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return "pat"sv;
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if (feature == CPUFeature::PSE36)
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return "pse36"sv;
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if (feature == CPUFeature::PSN)
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return "psn"sv;
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if (feature == CPUFeature::CLFLUSH)
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return "clflush"sv;
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if (feature == CPUFeature::DS)
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return "ds"sv;
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if (feature == CPUFeature::ACPI)
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return "acpi"sv;
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if (feature == CPUFeature::MMX)
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return "mmx"sv;
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if (feature == CPUFeature::FXSR)
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return "fxsr"sv;
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if (feature == CPUFeature::SSE)
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return "sse"sv;
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if (feature == CPUFeature::SSE2)
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return "sse2"sv;
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if (feature == CPUFeature::SS)
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return "ss"sv;
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if (feature == CPUFeature::HTT)
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return "htt"sv;
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if (feature == CPUFeature::TM)
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return "tm"sv;
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if (feature == CPUFeature::IA64)
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return "ia64"sv;
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if (feature == CPUFeature::PBE)
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return "pbe"sv;
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if (feature == CPUFeature::SMEP)
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return "smep"sv;
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if (feature == CPUFeature::RDSEED)
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return "rdseed"sv;
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if (feature == CPUFeature::SMAP)
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return "smap"sv;
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if (feature == CPUFeature::UMIP)
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return "umip"sv;
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if (feature == CPUFeature::SYSCALL)
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return "syscall"sv;
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if (feature == CPUFeature::NX)
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return "nx"sv;
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if (feature == CPUFeature::RDTSCP)
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return "rdtscp"sv;
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if (feature == CPUFeature::LM)
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return "lm"sv;
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if (feature == CPUFeature::CONSTANT_TSC)
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return "constant_tsc"sv;
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if (feature == CPUFeature::NONSTOP_TSC)
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return "nonstop_tsc"sv;
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VERIFY_NOT_REACHED();
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}
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}
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@ -89,31 +89,109 @@ UNMAP_AFTER_INIT void Processor::cpu_detect()
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if (processor_info.ecx() & (1 << 0))
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m_features |= CPUFeature::SSE3;
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if (processor_info.ecx() & (1 << 1))
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m_features |= CPUFeature::PCLMULQDQ;
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if (processor_info.ecx() & (1 << 2))
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m_features |= CPUFeature::DTES64;
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if (processor_info.ecx() & (1 << 3))
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m_features |= CPUFeature::MONITOR;
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if (processor_info.ecx() & (1 << 4))
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m_features |= CPUFeature::DS_CPL;
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if (processor_info.ecx() & (1 << 5))
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m_features |= CPUFeature::VMX;
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if (processor_info.ecx() & (1 << 6))
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m_features |= CPUFeature::SMX;
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if (processor_info.ecx() & (1 << 7))
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m_features |= CPUFeature::EST;
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if (processor_info.ecx() & (1 << 8))
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m_features |= CPUFeature::TM2;
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if (processor_info.ecx() & (1 << 9))
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m_features |= CPUFeature::SSSE3;
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if (processor_info.ecx() & (1 << 10))
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m_features |= CPUFeature::CNXT_ID;
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if (processor_info.ecx() & (1 << 11))
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m_features |= CPUFeature::SDBG;
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if (processor_info.ecx() & (1 << 12))
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m_features |= CPUFeature::FMA;
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if (processor_info.ecx() & (1 << 13))
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m_features |= CPUFeature::CX16;
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if (processor_info.ecx() & (1 << 14))
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m_features |= CPUFeature::XTPR;
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if (processor_info.ecx() & (1 << 15))
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m_features |= CPUFeature::PDCM;
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if (processor_info.ecx() & (1 << 17))
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m_features |= CPUFeature::PCID;
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if (processor_info.ecx() & (1 << 18))
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m_features |= CPUFeature::DCA;
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if (processor_info.ecx() & (1 << 19))
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m_features |= CPUFeature::SSE4_1;
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if (processor_info.ecx() & (1 << 20))
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m_features |= CPUFeature::SSE4_2;
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if (processor_info.ecx() & (1 << 21))
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m_features |= CPUFeature::X2APIC;
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if (processor_info.ecx() & (1 << 22))
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m_features |= CPUFeature::MOVBE;
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if (processor_info.ecx() & (1 << 23))
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m_features |= CPUFeature::POPCNT;
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if (processor_info.ecx() & (1 << 24))
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m_features |= CPUFeature::TSC_DEADLINE;
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if (processor_info.ecx() & (1 << 25))
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m_features |= CPUFeature::AES;
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if (processor_info.ecx() & (1 << 26))
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m_features |= CPUFeature::XSAVE;
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if (processor_info.ecx() & (1 << 27))
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m_features |= CPUFeature::OSXSAVE;
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if (processor_info.ecx() & (1 << 28))
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m_features |= CPUFeature::AVX;
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if (processor_info.ecx() & (1 << 29))
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m_features |= CPUFeature::F16C;
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if (processor_info.ecx() & (1 << 30))
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m_features |= CPUFeature::RDRAND;
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if (processor_info.ecx() & (1 << 31))
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m_features |= CPUFeature::HYPERVISOR;
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if (processor_info.edx() & (1 << 0))
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m_features |= CPUFeature::FPU;
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if (processor_info.edx() & (1 << 1))
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m_features |= CPUFeature::VME;
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if (processor_info.edx() & (1 << 2))
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m_features |= CPUFeature::DE;
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if (processor_info.edx() & (1 << 3))
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m_features |= CPUFeature::PSE;
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if (processor_info.edx() & (1 << 4))
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m_features |= CPUFeature::TSC;
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if (processor_info.edx() & (1 << 5))
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m_features |= CPUFeature::MSR;
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if (processor_info.edx() & (1 << 6))
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m_features |= CPUFeature::PAE;
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if (processor_info.edx() & (1 << 13))
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m_features |= CPUFeature::PGE;
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if (processor_info.edx() & (1 << 7))
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m_features |= CPUFeature::MCE;
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if (processor_info.edx() & (1 << 8))
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m_features |= CPUFeature::CX8;
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if (processor_info.edx() & (1 << 9))
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m_features |= CPUFeature::APIC;
|
||||
if (processor_info.edx() & (1 << 11))
|
||||
handle_edx_bit_11_feature();
|
||||
if (processor_info.edx() & (1 << 12))
|
||||
m_features |= CPUFeature::MTRR;
|
||||
if (processor_info.edx() & (1 << 13))
|
||||
m_features |= CPUFeature::PGE;
|
||||
if (processor_info.edx() & (1 << 14))
|
||||
m_features |= CPUFeature::MCA;
|
||||
if (processor_info.edx() & (1 << 15))
|
||||
m_features |= CPUFeature::CMOV;
|
||||
if (processor_info.edx() & (1 << 16))
|
||||
m_features |= CPUFeature::PAT;
|
||||
if (processor_info.edx() & (1 << 17))
|
||||
m_features |= CPUFeature::PSE36;
|
||||
if (processor_info.edx() & (1 << 18))
|
||||
m_features |= CPUFeature::PSN;
|
||||
if (processor_info.edx() & (1 << 19))
|
||||
m_features |= CPUFeature::CLFLUSH;
|
||||
if (processor_info.edx() & (1 << 21))
|
||||
m_features |= CPUFeature::DS;
|
||||
if (processor_info.edx() & (1 << 22))
|
||||
m_features |= CPUFeature::ACPI;
|
||||
if (processor_info.edx() & (1 << 23))
|
||||
m_features |= CPUFeature::MMX;
|
||||
if (processor_info.edx() & (1 << 24))
|
||||
|
|
@ -122,6 +200,16 @@ UNMAP_AFTER_INIT void Processor::cpu_detect()
|
|||
m_features |= CPUFeature::SSE;
|
||||
if (processor_info.edx() & (1 << 26))
|
||||
m_features |= CPUFeature::SSE2;
|
||||
if (processor_info.edx() & (1 << 27))
|
||||
m_features |= CPUFeature::SS;
|
||||
if (processor_info.edx() & (1 << 28))
|
||||
m_features |= CPUFeature::HTT;
|
||||
if (processor_info.edx() & (1 << 29))
|
||||
m_features |= CPUFeature::TM;
|
||||
if (processor_info.edx() & (1 << 30))
|
||||
m_features |= CPUFeature::IA64;
|
||||
if (processor_info.edx() & (1 << 31))
|
||||
m_features |= CPUFeature::PBE;
|
||||
|
||||
CPUID extended_features(0x7);
|
||||
if (extended_features.ebx() & (1 << 7))
|
||||
|
|
@ -290,63 +378,6 @@ UNMAP_AFTER_INIT void Processor::cpu_setup()
|
|||
NonnullOwnPtr<KString> Processor::features_string() const
|
||||
{
|
||||
StringBuilder builder;
|
||||
auto feature_to_str = [](CPUFeature::Type const& feature) -> StringView {
|
||||
if (feature == CPUFeature::NX)
|
||||
return "nx"sv;
|
||||
if (feature == CPUFeature::PAE)
|
||||
return "pae"sv;
|
||||
if (feature == CPUFeature::PGE)
|
||||
return "pge"sv;
|
||||
if (feature == CPUFeature::RDRAND)
|
||||
return "rdrand"sv;
|
||||
if (feature == CPUFeature::RDSEED)
|
||||
return "rdseed"sv;
|
||||
if (feature == CPUFeature::SMAP)
|
||||
return "smap"sv;
|
||||
if (feature == CPUFeature::SMEP)
|
||||
return "smep"sv;
|
||||
if (feature == CPUFeature::SSE)
|
||||
return "sse"sv;
|
||||
if (feature == CPUFeature::TSC)
|
||||
return "tsc"sv;
|
||||
if (feature == CPUFeature::RDTSCP)
|
||||
return "rdtscp"sv;
|
||||
if (feature == CPUFeature::CONSTANT_TSC)
|
||||
return "constant_tsc"sv;
|
||||
if (feature == CPUFeature::NONSTOP_TSC)
|
||||
return "nonstop_tsc"sv;
|
||||
if (feature == CPUFeature::UMIP)
|
||||
return "umip"sv;
|
||||
if (feature == CPUFeature::SEP)
|
||||
return "sep"sv;
|
||||
if (feature == CPUFeature::SYSCALL)
|
||||
return "syscall"sv;
|
||||
if (feature == CPUFeature::MMX)
|
||||
return "mmx"sv;
|
||||
if (feature == CPUFeature::FXSR)
|
||||
return "fxsr"sv;
|
||||
if (feature == CPUFeature::SSE2)
|
||||
return "sse2"sv;
|
||||
if (feature == CPUFeature::SSE3)
|
||||
return "sse3"sv;
|
||||
if (feature == CPUFeature::SSSE3)
|
||||
return "ssse3"sv;
|
||||
if (feature == CPUFeature::SSE4_1)
|
||||
return "sse4.1"sv;
|
||||
if (feature == CPUFeature::SSE4_2)
|
||||
return "sse4.2"sv;
|
||||
if (feature == CPUFeature::XSAVE)
|
||||
return "xsave"sv;
|
||||
if (feature == CPUFeature::AVX)
|
||||
return "avx"sv;
|
||||
if (feature == CPUFeature::LM)
|
||||
return "lm"sv;
|
||||
if (feature == CPUFeature::HYPERVISOR)
|
||||
return "hypervisor"sv;
|
||||
if (feature == CPUFeature::PAT)
|
||||
return "pat"sv;
|
||||
VERIFY_NOT_REACHED();
|
||||
};
|
||||
bool first = true;
|
||||
for (auto feature = CPUFeature::Type(1u); feature != CPUFeature::__End; feature <<= 1u) {
|
||||
if (has_feature(feature)) {
|
||||
|
|
@ -354,8 +385,7 @@ NonnullOwnPtr<KString> Processor::features_string() const
|
|||
first = false;
|
||||
else
|
||||
MUST(builder.try_append(' '));
|
||||
auto str = feature_to_str(feature);
|
||||
MUST(builder.try_append(str));
|
||||
MUST(builder.try_append(cpu_feature_to_string_view(feature)));
|
||||
}
|
||||
}
|
||||
return KString::must_create(builder.string_view());
|
||||
|
|
|
|||
|
|
@ -322,6 +322,7 @@ if ("${SERENITY_ARCH}" STREQUAL "i686" OR "${SERENITY_ARCH}" STREQUAL "x86_64")
|
|||
${KERNEL_SOURCES}
|
||||
${CMAKE_CURRENT_SOURCE_DIR}/Arch/x86/common/ASM_wrapper.cpp
|
||||
${CMAKE_CURRENT_SOURCE_DIR}/Arch/x86/common/CPU.cpp
|
||||
${CMAKE_CURRENT_SOURCE_DIR}/Arch/x86/common/CPUID.cpp
|
||||
${CMAKE_CURRENT_SOURCE_DIR}/Arch/x86/common/Interrupts.cpp
|
||||
${CMAKE_CURRENT_SOURCE_DIR}/Arch/x86/common/Processor.cpp
|
||||
${CMAKE_CURRENT_SOURCE_DIR}/Arch/x86/common/ProcessorInfo.cpp
|
||||
|
|
|
|||
|
|
@ -8,8 +8,8 @@ cd "${script_path}/.."
|
|||
MISSING_FLAGS=n
|
||||
|
||||
while IFS= read -r FLAG; do
|
||||
# Ignore ELF_DEBUG because it's not a debug flag.
|
||||
if [ "$FLAG" = "ELF_DEBUG" ]; then
|
||||
# Ignore false positives that are not debug flags.
|
||||
if [ "$FLAG" = "ELF_DEBUG" ] || [ "$FLAG" = "IA32_DEBUG_INTERFACE" ]; then
|
||||
continue
|
||||
fi
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue