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64 commits

Author SHA1 Message Date
Andreas Kling
079021a607 UserspaceEmulator: Put the executable name in argv[0] :^) 
The emulated program can now find its own name in argv[0]. Very cool!
 2020-07-12 21:37:54 +02:00
Andreas Kling
e461e3c8b0 UserspaceEmulator: Fix missing sign extension in PUSH_imm8 2020-07-12 17:44:14 +02:00
Andreas Kling
274ac3c628 UserspaceEmulator: Implement the XADD instruction 2020-07-12 15:35:01 +02:00
Andreas Kling
04695957e2 UserspaceEmulator: Implement the MOVSX instruction 2020-07-12 15:33:29 +02:00
Andreas Kling
8940916232 UserspaceEmulator: Implement JMP_RM32 2020-07-12 14:54:30 +02:00
Andreas Kling
a424208399 UserspaceEmulator: Implement DIV_RM32 
Not using inline assembly for this one since flags are undefined after
a DIV instruction anyway.
 2020-07-12 14:53:19 +02:00
Andreas Kling
062e2f8614 UserspaceEmulator: Implement the XCHG instruction 2020-07-12 14:45:46 +02:00
Andreas Kling
536ca0f8c9 UserspaceEmulator: Implement some more MOV variants 2020-07-12 14:45:35 +02:00
Andreas Kling
2d44f4526a UserspaceEmulator: Implement MOVSB/MOVSW/MOVSD 2020-07-12 14:45:02 +02:00
Andreas Kling
ed57efff4f UserspaceEmulator: Implement the CMPXCHG instruction 2020-07-12 14:43:30 +02:00
Andreas Kling
6ec0a63af1 UserspaceEmulator: Fix broken MOV_RM8_reg8 2020-07-12 14:42:15 +02:00
Andreas Kling
bdf72a7c7a UserspaceEmulator: Implement JMP_NEAR_imm 
This is a full-width relative jump, when the 8-bit immediate variant
isn't large enough.
 2020-07-12 01:36:45 +02:00
Andreas Kling
938a00ecf9 UserspaceEmulator: Implement the CMOVcc instruction 2020-07-12 01:36:45 +02:00
Andreas Kling
adf3775955 UserspaceEmulator: Implement the SBB family of instructions 2020-07-12 01:36:45 +02:00
Andreas Kling
734f63d522 UserspaceEmulator: Add basic TLS (thread-local storage) support 
The SoftMMU now receives full X86::LogicalAddress values from SoftCPU.
This allows the MMU to reroute TLS accesses to a special memory region.

The ELF executable's PT_TLS header tells us how to allocate the TLS.

Basically, the GS register points to a magical 4-byte area which has
a pointer to the TCB (thread control block). The TCB lives in normal
flat memory space and is accessed through the DS register.
 2020-07-12 01:36:45 +02:00
Andreas Kling
df95e25eaa UserspaceEmulator: Implement the NEG instruction 
Per the Intel manuals, NEG is equivalent to subtracting a value from 0.
 2020-07-12 01:36:45 +02:00
Andreas Kling
aa13183615 UserspaceEmulator: Implement SETcc_RM8 2020-07-12 01:36:45 +02:00
Andreas Kling
b524bc123d UserspaceEmulator: Implement the DEC family of instructions 2020-07-12 01:36:45 +02:00
Andreas Kling
8a94622e54 UserspaceEmulator: Put memory read/write logging behind MEMORY_DEBUG 2020-07-11 23:57:14 +02:00
Andreas Kling
775bc158ba UserspaceEmulator: Implement the SHL family of instructions 2020-07-11 23:57:14 +02:00
Andreas Kling
bfacb9583a UserspaceEmulator: Implement RET_imm16 
This is just like RET, but it also pops N bytes off the stack.
 2020-07-11 23:57:14 +02:00
Andreas Kling
eb86264d3b UserspaceEmulator: Simplify op_foo templates 
Instead of templatizing both the destination and source types, simply
templatize the operand type and sign-extend narrower source values at
the call sites instead.
 2020-07-11 23:57:14 +02:00
Andreas Kling
6febad1ef3 UserspaceEmulator: The generic_RM*_imm8 functions need to sign extend 
We are supposed to sign-extend the 8-bit immediate here,
"cmp eax, 0xff" is actually "cmp eax, 0xffffffff"
 2020-07-11 23:57:14 +02:00
Andreas Kling
21837544bb UserspaceEmulator: Implement MOV_EAX_moff32 2020-07-11 23:57:14 +02:00
Andreas Kling
1579cbdc9d UserspaceEmulator: Implement CALL_RM32 2020-07-11 23:57:14 +02:00
Andreas Kling
a6719ede0b UserspaceEmulator: Implement the SHR family of instructions 2020-07-11 23:57:14 +02:00
Andreas Kling
2ee451afed UserspaceEmulator: Implement SHR_RM32_imm8 2020-07-11 23:57:14 +02:00
Andreas Kling
d79f15e219 UserspaceEmulator: Implement the OR family of instructions 2020-07-11 23:57:14 +02:00
Andreas Kling
cb2e36dde7 UserspaceEmulator: Implement PUSH_imm8 
Curiously, the 8-bit immediate is sign-extended.
 2020-07-11 23:57:14 +02:00
Andreas Kling
ab9c7ef63b UserspaceEmulator: Fix broken MOV_RM32_imm32 
Oops, this was incorrectly moving into a GPR rather than the R/M.
 2020-07-11 23:57:14 +02:00
Andreas Kling
6c7ae794ce UserspaceEmulator: Implement the 32-bit LEAVE instruction 
The 16-bit variant is a bit weird. Let's wait until someone needs it.
 2020-07-11 23:57:14 +02:00
Andreas Kling
321ee72fe7 UserspaceEmulator: Implement JMP_imm16 and JMP_imm32 2020-07-11 23:57:14 +02:00
Andreas Kling
12566b9df0 UserspaceEmulator: Implement the MOVZX instruction 2020-07-11 23:57:14 +02:00
Andreas Kling
0af485dfff UserspaceEmulator: Implement STOSB/STOSW/STOSD 
...and add a template to handle REP* instruction prefixes. This can be
further generalized, but let's go one step at a time.
 2020-07-11 23:57:14 +02:00
Andreas Kling
6688ce41b2 UserspaceEmulator: Implement some of the IMUL instruction family 
The single-operand forms of IMUL are a little weird. We can deal with
them when they actually show up.
 2020-07-11 23:57:14 +02:00
Andreas Kling
97f4cebc8d UserspaceEmulator+LibX86: Implement the LEA instruction 
This piggybacks nicely on Instruction's ModR/M resolution code. :^)
 2020-07-11 23:57:14 +02:00
Andreas Kling
b094e5279c UserspaceEmulator: Both ADD and SUB modify the carry flag 2020-07-11 20:10:30 +02:00
Andreas Kling
f23c258290 UserspaceEmulator: Implement the AND and TEST instructions 2020-07-11 20:10:30 +02:00
Andreas Kling
7596ae4596 UserspaceEmulator: Implement the RET instruction 
We can now return from a CALL! :^)
 2020-07-11 17:22:38 +02:00
Andreas Kling
4d366b8b24 UserspaceEmulator: Implement PUSH_imm32 and PUSH_RM32 2020-07-11 17:12:44 +02:00
Andreas Kling
55d2bd9eec UserspaceEmulator: Implement short-range jump instructions 2020-07-11 17:12:21 +02:00
Andreas Kling
42787ae309 UserspaceEmulator: Implement the CALL_imm32 instruction 2020-07-11 17:05:04 +02:00
Andreas Kling
0a448ee960 UserspaceEmulator: Fix broken inline assembly for asymmetric op_foos 
When the Destination and Source of an op_foo were types of different
sizes, the generated assembly was not filling up the "source" register
fully in some cases. This led to incorrect results.
 2020-07-11 17:03:42 +02:00
Andreas Kling
ae1d14bc7a UserspaceEmulator: Load the target executable ELF semi-properly :^) 
This patch adds a basic ELF program loader to the UserspaceEmulator and
creates MMU regions for each PT_LOAD header. (Note that we don't yet
respect the R/W/X flags etc.)

We also turn the SoftCPU into an X86::InstructionStream and give it an
EIP register so we can actually execute code by fetching memory through
our MMU abstraction.
 2020-07-11 16:45:48 +02:00
Andreas Kling
76b9fb258d UserspaceEmulator: Convert the XOR instruction to inline assembly 2020-07-11 16:02:25 +02:00
Andreas Kling
9db588daf1 UserspaceEmulator: Convert the SUB instruction to inline assembly 2020-07-11 15:52:53 +02:00
Andreas Kling
7d41b95071 UserspaceEmulator: Tweak INC and SAR helpers to not be SoftCPU members 
It's quite nice having these as compartmentalized free functions.
 2020-07-11 15:47:53 +02:00
Andreas Kling
e852768ba6 UserspaceEmulator: Add the INC and ADD instructions 
More inline assembly. I'm still figuring out how to combine templates
and inline assembly, but it's turning out pretty cool. :^)
 2020-07-11 14:20:08 +02:00
Andreas Kling
133803b8a7 UserspaceEmulator: Split SAR inline assembly into 8/16/32 bit variants 2020-07-11 13:43:27 +02:00
Andreas Kling
743d4ccb8f UserspaceEmulator: Support MOV_RM32_reg32 with memory destination 2020-07-11 13:29:05 +02:00